Altera 8B10B Encoder User Manual

8B10B Encoder/Decoder MegaCore Function User Guide

8B10B Encoder/Decoder MegaCore Function
User Guide
101 Innovation Drive San Jose, CA 95134
www.altera.com
c The 8B10B Encoder/Decoder MegaCore function is scheduled for product
obsolescence and discontinued support as described in PDN1304. Therefore, Altera does not recommend use of this IP in new designs. For more information about Altera’s current IP offering, refer to Altera’s Intellectual Property website.
UG-IPED8B10B-1.4
Document last updated for Altera Complete Design Suite version:
11.0
May 2011
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© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off. and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and before placing orders for products or services.
8B10B Encoder/Decoder MegaCore Function User Guide May 2011 Altera Corporation

Contents

Chapter 1. About This MegaCore Function
Release Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
Device Family Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–2
Performance and Resource Utilization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–3
Installation and Licensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4
OpenCore Plus Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–4
OpenCore Plus Time-Out Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1–5
Chapter 2. Getting Started
Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
8B10B Encoder /Decoder Walkthrough . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–1
Create a New Quartus II Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–2
Launch MegaWizard Plug-in Manager . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
Parameterize . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
Set Up Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4
Generate Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–4
Set Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–5
Simulate the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
IP Functional Simulation Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–6
Compile the Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
Program a Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–7
Chapter 3. Specifications
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1
Disparity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–1
Generic Framing Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–2
Character Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
Encoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–3
Disparity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
Cascaded Encoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–4
Encoding Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–5
Fibre Channel and IEEE 802.3z 1000BaseX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6
Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–6
Cascaded Decoding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Decoding Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–7
Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8
Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8
Encoder Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–8
Decoder Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3–9
Additional Information
Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–1
How to Contact Altera . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2
Typographic Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Info–2
May 2011 Altera Corporation 8B10B Encoder/Decoder MegaCore Function User Guide
iv Contents
8B10B Encoder/Decoder MegaCore Function User Guide May 2011 Altera Corporation

Release Information

1. About This MegaCore Function

Tab le 1– 1 provides information about this release of the Altera® 8B10B
Encoder/Decoder MegaCore
Table 1–1. 8B10B Encoder/Decoder MegaCore Function Release Information
f For more information about this release, refer to the MegaCore IP Library Release Notes
and Errata.
Altera verifies that the current version of the Quartus previous version of each MegaCore
and Errata report any exceptions to this verification. Altera does not verify
compilation with MegaCore function versions older than one release."

Device Family Support

®
function.
Item Description
Version 11.0
Release Date May 2011
Ordering Code IP-ED8B10B
Product ID 0079
Vendor ID 6AF7
®
®
function. The MegaCore IP Library Release Notes
II software compiles the
MegaCore functions provide either full or preliminary support for target Altera device families:
Full support means the MegaCore function meets all functional and timing
requirements for the device family and may be used in production designs.
Preliminary support means the MegaCore function meets all functional
requirements, but may still be undergoing timing analysis for the device family; it may be used in production designs with caution.
Tab le 1– 2 shows the level of support offered by the 8B10B Encoder/Decoder
MegaCore function to each Altera device family.
Table 1–2. Device Family Support (Part 1 of 2)
Device Family Support
®
Arria
GX Full
Arria II GX Full
®
Cyclone
Cyclone II Full
Cyclone III Full
Cyclone III LS Full
Full
May 2011 Altera Corporation 8B10B Encoder/Decoder MegaCore Function User Guide
1–2 Chapter 1: About This MegaCore Function

Features

Table 1–2. Device Family Support (Part 2 of 2)
Device Family Support
Cyclone IV E Full
Cyclone IV GX Full
®
HardCopy
II Full
HardCopy III Preliminary
HardCopy IV E Preliminary
HardCopy IV GX Preliminary
®
Stratix
Full
Stratix GX Full
Stratix II Full
Stratix II GX Full
Stratix III Full
Stratix IV Full
Other device families No support
Features
The following list summarizes the features of the 8B10B Encoder/Decoder MegaCore function:
8b/10b encoding and decoding.
Cascaded encoding and decoding.
Industry compatible special character coding.
Easy-to-use IP MegaWizard
Support for OpenCore Plus evaluation.
IP functional simulation models for use in Altera-supported VHDL and Verilog
HDL simulators.

General Description

Encoders and decoders are used for physical layer coding for Gigabit Ethernet, Fibre Channel, and other applications. The 8b/10b encoder takes byte inputs, and generates a direct current (DC) balanced stream (equal number of 1s and 0s) with a maximum run length of 5. Some of the individual 10-bit codes will have an equal number of 1s and 0s, while others will have either four 1s and six 0s, or, six 1s and four 0s. In the latter case, the disparity between 1s and 0s is used as an input to the next 10-bit code generation, so that the disparity can be reversed, and maintain an overall balanced stream. For this reason, some 8-bit inputs have two valid 10-bit codes, depending on the input disparity.
interface.
The Altera 8B10B Encoder/Decoder is a compact, high performance MegaCore function capable of encoding and decoding in multi-gigabit applications.
8B10B Encoder/Decoder MegaCore Function User Guide May 2011 Altera Corporation
Chapter 1: About This MegaCore Function 1–3

Performance and Resource Utilization

Performance and Resource Utilization
This section lists the resource utilization and performance of the 8B10B Encoder/Decoder MegaCore function in different Altera device families. These results were obtained using the Quartus replacement feature disabled. Enabling this feature produces a smaller but slower MegaCore function.
Tab le 1– 3 shows the performance and resource utilization for Cyclone II
(EP2C35F484C6) and Cyclone III (EP3C80F780C6).
Table 1–3. Resource Utilization and Performance (Cyclone II and Cyclone III)
Parameters
Device
Mode of Operation
Register
Inputs/Outputs
Encoder On 100 250
Cyclone II
Encoder Off 107 403
Decoder 131 403
Encoder On 100 250
Cyclone III
Encoder Off 107 403
Decoder 131 403
Note to Table 1–3:
(1) f
is for non-cascaded encoders/decoders.
MAX
®
II software version 9.1 with the auto-ROM
LEs f
(MHz) (1)
MAX
Tab le 1– 4 shows the performance and resource utilization for Stratix II
(EP2S30F484C3) and Stratix III (EP3SE110F780C2). The performance of the MegaCore function in Stratix IV devices is similar to Stratix III devices.
Table 1–4. Resource Utilization and Performance (Stratix II and Stratix III)
Parameters
Device
Mode of Operation
Register
Inputs/Outputs
Combinational
Encoder On 61 51 444
Stratix II
Encoder Off 68 13 585
Decoder 55 33 447
Encoder On 60 51 510
Stratix III
Encoder Off 68 13 675
Decoder 55 33 520
Note to Table 1–4:
(1) f
is for non-cascaded encoders/decoders.
MAX
ALUTs
Logic
Registers
f
MAX
(MHz) (1)
May 2011 Altera Corporation 8B10B Encoder/Decoder MegaCore Function User Guide
1–4 Chapter 1: About This MegaCore Function
ed8b10b
Contains the MegaCore function files and documentation.
doc
Contains the documentation for the MegaCore function.
lib
Contains encrypted lower-level design files.
<path>
common
Contains the shared components.
ip
Contains the MegaCore IP Library.
Installation directory
altera
Contains all MegaCore IP Library from Altera.

Installation and Licensing

Installation and Licensing
The 8B10B Encoder/Decoder MegaCore Function is part of the MegaCore® IP Library, which is distributed with the Quartus
®
Altera
website, www.altera.com.
®
II software and downloadable from the
f For system requirements and installation instructions, refer to Altera Software
Installation and Licensing.
Figure 1–1 shows the directory structure after you install the 8B10B Encoder/Decoder
MegaCore Function, where
<
path> is the installation directory. The default installation
directory on Windows is c:\altera\90; on UNIX and Linux it is /opt/altera/90.
Figure 1–1. Directory Structure

OpenCore Plus Evaluation

f For more information on OpenCore Plus hardware evaluation using the 8B10B
With Altera’s free OpenCore Plus evaluation feature, you can perform the following actions:
Simulate the behavior of a megafunction within your system
Verify the functionality of your design, as well as evaluate its size and speed
quickly and easily
Generate time-limited device programming files for designs that include
megafunctions
Program a device and verify your design in hardware
You only need to purchase a license for the megafunction when you are completely satisfied with its functionality and performance, and want to take your design to production.
After you purchase a license for 8B10B Encoder/Decoder, you can request a license file from the Altera website at www.altera.com/licensing and install it on your computer. When you request a license file, Altera emails you a license.dat file. If you do not have Internet access, contact your local Altera representative.
Encoder/Decoder, refer to AN 320: OpenCore Plus Evaluation of Megafunctions.
8B10B Encoder/Decoder MegaCore Function User Guide May 2011 Altera Corporation
Chapter 1: About This MegaCore Function 1–5
Installation and Licensing

OpenCore Plus Time-Out Behavior

OpenCore® Plus hardware evaluation can support the following two modes of operation:
Untethered—the design runs for a limited time
Tethered—requires a connection between your board and the host computer. If
tethered mode is supported by all megafunctions in a design, the device can operate for a longer time or indefinitely
All megafunctions in a device time out simultaneously when the most restrictive evaluation time is reached. If there is more than one megafunction in a design, a specific megafunction’s time-out behavior may be masked by the time-out behavior of the other megafunctions.
1 For MegaCore functions, the untethered timeout is 1 hour; the tethered timeout value
is indefinite.
Your design stops working after the hardware evaluation time expires, and the following events occur:
For the encoder:
The
The
The
For the decoder:
The
The
The
ena
input signal is forced low (deasserted).
dataout valid
output is forced low (deasserted).
ena
input signal is forced low (deasserted).
dataout valid
output is forced low (deasserted).
output is forced to the k28.5 pattern.
output is forced to all zeros.
May 2011 Altera Corporation 8B10B Encoder/Decoder MegaCore Function User Guide
1–6 Chapter 1: About This MegaCore Function
Installation and Licensing
8B10B Encoder/Decoder MegaCore Function User Guide May 2011 Altera Corporation
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