PROTECTION OF EYES FROM LASER BEAM DURING SERVICING
This set employs laser. Therefore, be sure to follow carefully the
instructions below when servicing.
WARNING!
WHEN SERVICING, DO NOT APPROACH THE LASER EXIT
WITH THE EYE TOO CLOSELY. IN CASE IT IS NECESSARY TO
CONFIRM LASER BEAM EMISSION. BE SURE TO OBSERVE
FROM A DISTANCE OF MORE THAN 30cm FROM THE
SURFACE OF THE OBJECTIVE LENS ON THE OPTICAL
PICK-UP BLOCK.
Caution: Invisible laser radiation when
open and interlocks defeated avoid exposure to beam.
Advarsel:Usynling laserståling ved åbning,
når sikkerhedsafbrydere er ude af funktion.
Undgå udsættelse for stråling.
VAROITUS!
Laiteen Käyttäminen muulla kuin tässä käyttöohjeessa mainitulla tavalla saattaa altistaa käyt-täjän turvallisuusluokan 1 ylittävälle näkymättömälle lasersäteilylle.
VARNING!
Om apparaten används på annat sätt än vad som specificeras i
denna bruksanvising, kan användaren utsättas för osynling
laserstrålning, som överskrider gränsen för laserklass 1.
CAUTION
Use of controls or adjustments or performance of procedures
other than those specified herein may result in hazardous
radiation exposure.
ATTENTION
L'utilisation de commandes, réglages ou procédures autres que
ceux spécifiés peut entraîner une dangereuse exposition aux
radiations.
ADVARSEL!
Usynlig laserståling ved åbning, når sikkerhedsafbrydereer ude
af funktion. Undgå udsættelse for stråling.
This Compact Disc player is classified as a CLASS 1 LASER
product.
The CLASS 1 LASER PRODUCT label is located on the rear
exterior.
CLASS 1
KLASSE 1
LUOKAN 1
KLASS 1
LASER PRODUCT
LASER PRODUKT
LASER LAITE
LASER APPARAT
Precaution to replace Optical block
(KSS-213F)
Body or clothes electrostatic potential could ruin
laser diode in the optical block. Be sure ground
body and workbench, and use care the clothes
do not touch the diode.
1) After the connection, remove solder shown in
the right figure.
C355 87-A11-131-080 CAP,TC U 8200P-50 K B
C356 87-A11-131-080 CAP,TC U 8200P-50 K B
C363 87-010-405-080 CAP, ELECT 10-50V
C364 87-010-405-080 CAP, ELECT 10-50V
C367 87-018-043-080 CAP,TC-S 820P-50 B
C368 87-018-043-080 CAP,TC-S 820P-50 B
C369 87-018-118-080 CAP,TC-U 82P-50 B
C370 87-018-118-080 CAP,TC-U 82P-50 B
C373 87-010-401-080 CAP, ELECT 1-50V
C374 87-010-401-080 CAP, ELECT 1-50V
• Regarding connectors, they are not stocked as they are not the initial order items.
The connectors are available after they are supplied from connector manufacturers upon the order is received.
7. Tape speed Adjustment
Settings:• Test tape: TTA-100
• Test point: PHONES JACK (J201)
• Adjustment location: SFR of deck motor
Method:Play back the test tape and adjust so that the
output frequency is 3000Hz ±30Hz.
8. Azimuth Adjustment
Settings:• Test tape: TTA-320
• Test point: PHONES JACK (J201)
• Adjustment location:Azimuth adjustment
screw
Method:Play back the test tape and adjust so that the
output is maximum.
< TUNER SECTION >
< FM SECTION >
IHF Sensitiviy:Less than 18dB
(THD 3%)(at 98MHz)
Signal to Noise Ratio:Mono: More than 60dB
(Input 60dB)Stereo: More than 53dB
Distortion:
(Input: 60dB)Less than 2% (at 98MHz)
(Input: 120dB)Less than 3% (at 98MHz)
Auto stop level:28dB±8dB (at 98MHz)
Stereo separation:More than 28dB (at 98MHz)
Intermediate frequency:10.7MHz
< AM SECTION >
Sensitivity:Less than 48dB
(S/N 10dB)(at 600kHz)
Less than 46dB
(at 1000kHz)
Less than 44dB
(at 1400kHz)
Signal to Noise Ratio:More than 30dB
(at 600, 1000, 1400kHz)
Distortion:
(Input: 74dB)Less than 3% (at 1000kHz)
(Input: 115dB)Less than 10%
(at 1000kHz)
Auto stop level:Less than 60dB
(at 1000kHz)
Intermediate frequency:450kHz
< DECK SECTION >
Tape speed:3000Hz±60Hz
Wow & flutter:Less than 0.35% (R.M.S)
Take-up torque:30-60g-cm (FWD)
FF&REW torque:75-160g-cm
Distortion:Less than 5% (REC/PB, 1kHz)
S/N ratio:More than 40dB (PB, AC, DC)
More than 40dB
(REC/PB, AC, DC)
Max Noise level:Less than 35mV
(PB, VOL MAX)
Erasing Ratio:More than 40dB
Test tape:TTA-320
TTA-602 (NORMAL)
TTA-615 (HIGH POSITION)
13
L006
C39
+
24
2
4
2423
Page 17
IC BLOCK DIAGRAM
IC, TA2149N
IC, LC72121M
25
Page 18
IC, M61500FP
INA1
INB1
INC1
IND1
INE1
QF1
QF2
TONEH1
TONEL1
OUT1
GND
10
11
1
Mono.SW
2
3
4
5
Treble
boost
6
7
8
9
VOLVOL
ATTATT
Bass
boost
MUTE
Treble
boost
Bass
boost
24
23
22
21
20
19
18
17
16
15
14
INA2
INB2
INC2
IND2
INE2
QF4
QF3
TONEH2
TONEL2
OUT2
VSS
IC, BU4094BCF
VDD
Control logic
1312
CONT
26
Page 19
IC, LA6541D
27
Page 20
IC DESCRIPTION
IC, LA9241ML
Pin No.Pin NameI/ODescription
1
FIN2
Pin to which external pickup photo diode is connected. RF signal is created by adding
I
with the FIN1 pin signal. FE signal is created by subtracting from the FIN1 pin signal.
10
11
12
13
14
15
16
2
3
4
5
6
7
8
9
FIN1
E
F
TB
TE–
TE
TESI
SCI
TH
TA
TD–
TD
JP
TO
FD
I
Pin to which external pickup photo diode is connected.
Pin to which external pickup photo diode is connected. TE signal is created by
I
subtracting from the F pin signal.
I
Pin to which external pickup photo diode is connected.
I
DC component of the TE signal is input.
I
Pin to which external resistor setting the TE signal gain is connected between the TE pin.
O
TE signal output pin.
TES “Track Error Sense” comparator input pin. TE signal is passed through a band-
I
pass filter then input.
I
Shock detection signal input pin.
I
Tracking gain time constant setting pin.
O
TA amplifier output pin.
Pin to which external tracking phase compensation constants are connected between
I
the TD and VR pins.
I
Tracking phase compensation setting pin.
I
Tracking jump signal (kick pulse) amplitude setting pin.
O
Tracking control signal output pin.
O
Focusing control signal output pin.
17
18
19
20
21
22
23
24
25
26
27
28
29
30, 31
FD–
FA
FA–
FE
FE–
AGND
SP
SPI
SPG
SP–
SPD
SLEQ
SLD
SL–, SL+
—
—
Pin to which external focusing phase compensation constants are connected between
I
the FD and FA pins.
Pin to which external focusing phase compensation constants are connected between
I
the FD– and FA– pins.
Pin to which external focusing phase compensation constants are connected between
I
the FA and FE pins.
O
FE signal output pin.
I
Pin to which external FE signal gain setting resistor is connected between the FE pin.
Analog signal GND.
No connection.
O
Single ended output of the CV+ and CV– pin input signal.
I
Pin to which external spindle gain setting resistor in 12 cm mode is connected.
Pin to which external spindle phase compensation constants are connected together
I
with SPD pin.
O
Spindle control signal output pin.
I
Pin to which external sled phase compensation constants are connected.
O
Sled control signal output pin.
I
Sled advance signal input pin from microprocessor.
32, 33
34
35
JP–, JP+
TGL
TOFF
I
Tracking jump signal input pin from DSP.
I
Tracking gain control signal input from DSP. Low gain when TGL = H.
I
Tracking off control signal input pin from DSP. Off when TOFF = H.
28
Page 21
Pin No.Pin NameI/ODescription
36
TES
O
Pin from which TES signal is output to DSP.
37
38
39, 40
41
42
43
44
45
46
47
48
49
50
51
52
HFL
SLOF
CV–, CV+
RFSM
RFS–
SLC
SLI
DGND
FSC
TBC
NC
DEF
CLK
CL
DAT
“High Frequency Level” is used to judge whether the main beam position is on top of
O
bit or on top of mirror.
I
Sled servo off control input pin.
I
CLV error signal input pin from DSP.
O
RF output pin.
RF gain setting and EFM signal 3T compensation constant setting pin together with
I
RFSM pin.
“Slice Level Control” is the output pin which controls the RF signal data slice level by
O
DSP.
I
Input pin which control the data slice level by the DSP.
—
Digital system GND.
O
Output pin to which external focus search smoothing capacitor is connected.
I
“Tracking Balance Control” EF balance variable range setting pin.
—
No connection.
O
Disc defect detector output pin.
I
Reference clock input pin. 4.23 MHz of the DSP is input.
Pin to which external bypass capacitor for reference voltage is connected.
O
Reference voltage output pin.
I
Disc defect detector time constant setting pin.
I
Pin to which external capacitor for RF signal peak holding is connected.
I
Pin to which external capacitor for RF signal bottom holding is connected.
O
APC circuit output pin.
I
APC circuit input pin.
—
RF system Vcc pin.
29
Page 22
IC, LC78622ED
Pin No.Pin NameI/ODescription
1
DEFI
I
Defect sense signal (DEF) input pin. (Connect to 0V when not used).
2
3
4
5
6
7
8
9
10
11
12, 13
14
15
16
17
18
TAI
PDO
VVSS
ISET
VVDD
FR
VSS
EFMO
EFMIN
T2
CLV+, CLK-
___
V/P
HFL
TES
TOFF
TGL
—
—
—
I
O
For PLL.
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Phase comparator output pin to control external VCO.
GND pin for built-in VCO. Be sure to connect to 0V.
Pin to which external resistor adjusting the PD0 output current.
Power supply pin for built-in VCO.
I
Pin for VCO frequency range adjustment.
Digital system GND. Be sure to connect to 0V.
O
EFM signal output pin.
For slice level control.
I
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
O
Disc motor control output. Three level output is possible using command.
Rough servo or phase control automatic selection monitoring output pin. Rough servo
O
EFM signal input pin.
at H. Phase servo at L.
I
Track detect signal input pin. Schmidt input.
I
Tracking error signal input pin. Schmidt input.
O
Tracking OFF output pin.
O
Tracking gain selection output pin. Gain boost at L.
19, 20
21
22
23
24
25
26
27
28
29
30
31
32, 33
34
35
36
37
JP+, JP-
PCK
FSEQ
VDD
SL+
SL-
—
PUIN
RW
EMPH
C2F
DOUT
T3, T4
N.C.
MUTEL
LVDD
LCHO
—
—
—
—
O
Track jump control signal output pin. Three level output is possible using command.
O
EFM data playback clock monitoring pin 4.3218 MHz when phase is locked in.
Sync signal detection output pin. H when the sync signal which is detected from EFM
O
signal and thesync signal which is internally generated agree.
Digital system power supply pin.
O
Moves the sled to outer circumference.
O
Moves the sled to inner circumference.
Not connected.
I
CD pickup inner switch detection.
O
Read, wright signal.
O
De-emphasis monitor output pin. De-emphasis disc is being played back at H.
O
C2 flag output pin.
O
DIGITAL OUT output pin. (EIAJ format).
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Not used. Set the pin to open.
O
L-channel 1-bit DAC.
O
L-channel mute output pin.
L-channel power supply pin.
L-channel output pin.
38
39
40
41
42
LVSS
RVSS
RCHO
RVDD
MUTER
—
—
—
O
R-channel 1-bit DAC.
O
L-channel GND. Be sure to connect to 0V.
R-channel GND. Be sure to connect to 0V.
R-channel output pin.
R-channel power supply pin.
R-channel mute output pin.
Pin to which external 16.9344 MHz crystal oscillator is connected.
I
—
Crystal oscillator GND pin. Be sure to connect to 0V.
O
Subcode block sync signal output pin.
O
C1, C2, single and dual correction monitoring pin.
O
Subcode P, Q, R, S, T, U and W output pin.
O
Subcode frame sync signal output pin. Falls down when subcode enters standby.
Subcode read clock input pin. Schmidt input. (Be sure to connected to 0V when not
I
in use.)
Pin outputting the 7.35 kHz sync signal which is generated by dividing frequency of
O
crystal oscillator.
O
Subcode Q output standby output pin.
I
Read/write control input pin. Schmidt input.
O
Subcode Q output pin.
I
Command input pin from microprocessor.
I
Command input read clock or subcode read input clock from SQOUT pin
I
LC78622 reset input pin. Set this pin to L once when the main power is turned on.
O
Test signal output pin. Use this pin as open (normally L output).
60
61
62
63
64
16M
4.2M
T5
______
CS
T1
O
16.9344 MHz output pin.
O
4.2336 MHz output pin.
I
Test signal input pin with built-in pull-down resistor. Be sure to connect to 0V.
Chip select signal input pin with built-in pull-down resistor. Be sure to connect to 0V
I
while it is not controlling.
I
Test signal input pin without built-in pull-down resistor. Be sure to connect to 0V.