Acer TravelMate 291 Schematics Rev1.0
A
1 1
B
C
D
E
2 2
Compal Confidential
DCL53 Schematics Document
Banias uFCBGA/uFCPGA Package with Montara-GM
Core Logic
3 3
4 4
2003-06-12
REV: 1.0
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Cover Sheet
DCL53 LA-1881
140Monday, August 11, 2003
E
1.0
of
A
Compal confidential
B
C
D
E
Block Diagram
Model Name :DCL53
File Name : LA-1881 Rev: 1.0
1 1
Fan Control
page 31
Mobile Banias
uFCBGA/uFCPGA CPU
478 pin
System Bus
400MHz
page 4,5
HD#(0..63)HA#(3..31)
Thermal Sensor
ADM1032
page 4
Clock Generator
ICS950810CG
page 13
Memory
TV-Out Conn.
page 18
LVDS & CRT
Connector
TV Encoder
CH7011
page 18
page 19
DVO
Montara-GM/GM+
uFCBGA-732 pin
page 6,7,8,9
BUS(DDR)
2.5V 200MHz/266MHz
DDR-SO-DIMM X2
BANK 0, 1, 2, 3
page 10,11,12
2 2
PCI BUS
MINI
PCI I/F
1394
Controller
VIA VT6301S
page 23page 24
1394
3 3
Connector
page 23
LAN
RTL 8101L
page 22
RJ45
page 22
3.3V 33MHz
CardBus
ENE CB1410
page 20
Slot 0
page 21
HUB-Link
ICH4-M
BGA-421
LPC BUS
3.3V 33MHz
page 14,15,16
3.3V 48MHz
3.3V 24.576MHz
3.3V ATA100
USB port 0, 2, 4
USB conn
USBx3
page 26
AC-LINK
MBC Conn.
page 25
USB port 1
LED INDICATE
page 28
Winbond
W83L518D
page 25
SD/MS Slot
page 25
HDD
page 17
D
CDROM
AC97
Codec
page 17
ALC202
page 32
AMP& Phone
Jack
page 33
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
Block Diagram
DCL53 LA-1881
E
1.0
of
240Monday, August 11, 2003
page 26
Power On/Off
Reset & RTC
page 31
DC/DC Interface
Suspend
4 4
page 34
Power Circuit
SIO LPC47N227
PARALLEL
page 28
FIR
page 27
SERIAL
NS PC87591L
LPC to X-BUS
& KBC
page 29
EC I/O Bu ffer
page 30
BIOS Int.KBD
page 30 page 28
Touch Pad
DC/DC
page
36,37,38,39,40,41,42,43
A
Legacy I/O Option
B
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
5
H_RS#[0..2] HD#[0..63]
HA#[3..31]5
H_REQ#[0..4]5
D D
C C
B B
A A
+VCCP
ITP_TDI
R275
1 2
150_0402_5%
ITP_TRST#
R278
1 2
680_0402_5%
Note:
Placement near to CPU Conn
1 2
+VCCP
ITP_DBRESET#14
+3VALW
H_PWRGD13
+VCCP
5
R285
56_0402_5%
HA#[3..31]
H_REQ#[0..4]
CLK_CPU_ITP12
CLK_CPU_ITP#12
CLK_CPU_BCLK12
CLK_CPU_BCLK#12
H_DEFER#5
H_LOCK#5
H_CPURST#5
H_TRDY#5
R297
150_0402_5%
1 2
ITP_DBRESET#
1 2
R270
330_0402_5%
H_CPUSLP#13
R266
@1K_0402_5%
THERMTRIP#14
H_ADSTB#05
H_ADSTB#15
H_BPRI#5
H_DPSLP#6,13
H_DPWR#6
R274
@1K_0402_5%
1 2
1 2
H_ADS#5
H_BNR#5
H_BR0#5
H_DRDY#5
H_HIT#5
H_HITM#5
H_DBSY#5
H_RS#[0..2] 5
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_IERR#
H_CPURST#
H_RS#0
H_RS#1
H_RS#2
1 2
R284 0_0402_5%
PRO_CHOT#
ITP_TCK
ITP_TDI
ITP_TDO
TEST1
TEST2
ITP_TMS
ITP_TRST#
THERMDA
THERMDC
AA3
AA2
AF4
AC4
AC7
AC3
AD3
AE4
AD2
AB4
AC6
AD5
AE2
AD6
AF3
AE1
AF1
AE5
A16
A15
B15
B14
B11
C19
A10
B10
B17
A13
C12
A12
F23
C11
B13
B18
A18
C17
P4
U4
V3
R3
V2
W1
T4
W2
Y4
Y1
U1
Y3
R2
P3
T2
P1
T1
U3
N2
L1
J3
N4
L4
H2
K3
K4
A4
J2
H1
K1
L2
M3
C8
B8
A9
C9
A7
M2
B7
E4
A6
C5
4
JP12A
A3#
A4#
A5#
A6#
A7#
A8#
A9#
A10#
A11#
A12#
A13#
A14#
A15#
A16#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
ADDR GROUP
A25#
A26#
A27#
A28#
A29#
A30#
A31#
REQ0#
REQ1#
REQ2#
REQ3#
REQ4#
ADSTB0#
ADSTB1#
ITP_CLK0
ITP_CLK1
BCLK0
HOST CLK
BCLK1
ADS#
BNR#
BPRI#
BR0#
DEFER#
DRDY#
HIT#
CONTROL GROUP
HITM#
IERR#
LOCK#
RESET#
RS0#
RS1#
RS2#
TRDY#
BPM0#
BPM1#
BPM2#
BPM3#
DBR#
DBSY#
DPSLP#
DPWR#
PRDY#
PREQ#
PROCHOT#
PWRGOOD
SLP#
TCK
TDI
TDO
TEST1
TEST2
TMS
TRST#
THERMDA
THERMDC
THERMTRIP#
AMP_1473129-1
4
Banias
MISC
THERMAL
DIODE
DATA GROUP
LEGACY CPU
D0#
D1#
D2#
D3#
D4#
D5#
D6#
D7#
D8#
D9#
D10#
D11#
D12#
D13#
D14#
D15#
D16#
D17#
D18#
D19#
D20#
D21#
D22#
D23#
D24#
D25#
D26#
D27#
D28#
D29#
D30#
D31#
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DINV0#
DINV1#
DINV2#
DINV3#
DSTBN0#
DSTBN1#
DSTBN2#
DSTBN3#
DSTBP0#
DSTBP1#
DSTBP2#
DSTBP3#
A20M#
FERR#
IGNNE#
INIT#
LINT0
LINT1
STPCLK#
SMI#
3
HD#[0..63] 5
HD#0
A19
HD#1
A25
HD#2
A22
HD#3
B21
HD#4
A24
HD#5
B26
HD#6
A21
HD#7
B20
HD#8
C20
HD#9
B24
HD#10
D24
HD#11
E24
HD#12
C26
HD#13
B23
HD#14
E23
HD#15
C25
HD#16
H23
HD#17
G25
HD#18
L23
HD#19
M26
HD#20
H24
HD#21
F25
HD#22
G24
HD#23
J23
HD#24
M23
HD#25
J25
HD#26
L26
HD#27
N24
HD#28
M25
HD#29
H26
HD#30
N25
HD#31
K25
HD#32
Y26
HD#33
AA24
HD#34
T25
HD#35
U23
HD#36
V23
HD#37
R24
HD#38
R26
HD#39
R23
HD#40
AA23
HD#41
U26
HD#42
V24
HD#43
U25
HD#44
V26
HD#45
Y23
HD#46
AA26
HD#47
Y25
HD#48
AB25
HD#49
AC23
HD#50
AB24
HD#51
AC20
HD#52
AC22
HD#53
AC25
HD#54
AD23
HD#55
AE22
HD#56
AF23
HD#57
AD24
HD#58
AF20
HD#59
AE21
HD#60
AD21
HD#61
AF25
HD#62
AF22
HD#63
AF26
D25
J26
T24
AD20
C23
K24
W25
AE24
C22
L24
W24
AE25
C2
D3
A3
B5
D1
D4
C6
B4
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_A20M# 13
H_FERR# 13
H_IGNNE# 13
H_INIT# 13
H_INTR 13
H_NMI 13
H_STPCLK# 13
H_SMI# 13
3
+VCCP
+VCCP
1 2
R282
56_0402_5%
1 2
R281
56_0402_5%
EC_SMB_CK227
EC_SMB_DA227
2
B
PRO_CHOT#
+3VS
R309
10K_0402_5%
1 2
1
C
Q42
2SC2411K_SOT23
E
3
2
2
C100
1
2200P_0402_50V7K
THERMDA
2
THERMDC
PROCHOT# 27
1
+3VS
1
C103
0.1U_0402_16V4Z
2
U18
2
D+
3
D-
8
SCLK
7
SDATA
ADM1032ARM_RM8
Title
Banias Processor in mFCPGA479 with ITP
Size Document Number Rev
A3
Date: Sheet of
1
VDD1
6
ALERT#
4
THERM#
5
GND
Note:
Placement near to ITP Conn
Compal Electronics, Inc.
DCL53 LA-1881
12
R87
@10K_0402_5%
+VCCP
1 2
R286 @54.9_0402_1%
1 2
R277 @54.9_0402_1%
1 2
R272 39.2_0603_1%
1 2
R287 27.4_0402_1%
1
ITP_TDO
H_CPURST#
ITP_TMS
ITP_TCK
340Monday, August 11, 2003
1.0
5
JP12B
1 2
R195 @54.9_0402_1%
1 2
R188 @54.9_0402_1%
+CPU_CORE
+VCCP
12
12
R197
27.4_0402_1%
5
+1.8VS
+VCCP
PSI#37
CPU_VID037
CPU_VID137
CPU_VID237
CPU_VID337
CPU_VID437
CPU_VID537
12
R198
54.9_0402_1%
D D
C C
R190
B B
12
R238
27.4_0402_1%
A A
1K_0402_1%
1 2
R187
2K_0402_1%
12
54.9_0402_1%
R239
VCCSENSE
AE7
VSSSENSE
AF6
F26
B1
N1
AC26
P23
W4
D10
D12
D14
D16
E11
E13
E15
F10
F12
F14
F16
K6
L5
L21
M6
M22
N5
N21
P6
P22
R5
R21
T6
T22
U21
D6
D8
D18
D20
D22
E5
E7
E9
E17
E19
E21
F6
F8
F18
E1
E2
F2
F3
G3
G4
H4
GTL_REF0
AD26
E26
G1
AC1
COMP0
COMP1
COMP2
COMP3
1 2
R276 @1K_0402_5%
1 2
R189 @1K_0402_5%
1 2
R279 @1K_0402_5%
1 2
R273 @1K_0402_5%
1 2
R280 @1K_0402_5%
P25
P26
AB2
AB1
AF7
C14
C16
B2
C3
VCCSENSE
VSSSENSE
VCCA0
VCCA1
VCCA2
VCCA3
VCCQ0
VCCQ1
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
PSI#
VID0
VID1
VID2
VID3
VID4
VID5
GTLREF0
RSVD
RSVD
RSVD
COMP0
COMP1
COMP2
COMP3
RSVD
RSVD
RSVD
RSVD
TEST3
AMP_1473129-1
Banias
POWER, GROUNG, RESERVED SIGNALS AND NC
4
+CPU_CORE
1
+
C249
A2
VSS
A5
VSS
A8
VSS
A11
VSS
A14
VSS
A17
VSS
A20
VSS
A23
VSS
A26
VSS
B3
VSS
B6
VSS
B9
VSS
B12
VSS
B16
VSS
B19
VSS
B22
VSS
B25
VSS
C1
VSS
C4
VSS
C7
VSS
C10
VSS
C13
VSS
C15
VSS
C18
VSS
C21
VSS
C24
VSS
D2
VSS
D5
VSS
D7
VSS
D9
VSS
D11
VSS
D13
VSS
D15
VSS
D17
VSS
D19
VSS
D21
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E10
VSS
E12
VSS
E14
VSS
E16
VSS
E18
VSS
E20
VSS
E22
VSS
E25
VSS
F1
VSS
F4
VSS
F5
VSS
F7
VSS
F9
VSS
F11
VSS
F13
VSS
F15
VSS
F17
VSS
F19
VSS
F21
VSS
F24
VSS
G2
VSS
G6
VSS
G22
VSS
G23
VSS
G26
VSS
H3
VSS
H5
VSS
H21
VSS
H25
VSS
J1
VSS
J4
VSS
J6
VSS
J22
VSS
J24
VSS
K2
VSS
K5
VSS
K21
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L22
VSS
L25
VSS
M1
VSS
4
+1.8VS
+VCCP
2
220U_D2_4VM_R12
+CPU_CORE
1
C266
2
10U_0805_6.3V6M
+CPU_CORE
1
C265
2
10U_0805_6.3V6M
+CPU_CORE
1
C280
2
10U_0805_6.3V6M
+CPU_CORE
1
C278
2
10U_0805_6.3V6M
+CPU_CORE
1
C344
2
10U_0805_6.3V6M
Vcc-core
Decoupling
SPCAP,Polymer
MLCC 0805 X5R
1
1
2
0.01U_0402_16V7K
1
2
150U_D2_6.3VM
C394
C363
2
0.01U_0402_16V7K
1
+
C419
C373
2
0.1U_0402_16V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
1
+
C248
2
220U_D2_4VM_R12
1
1
C318
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C354
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C281
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C259
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
C263
2
2
10U_0805_6.3V6M
10U_0805_6.3V6M
1
1
2
0.01U_0402_16V7K
C272
C328
2
0.01U_0402_16V7K
1
1
C316
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
1
2
220U_D2_4VM_R12
C264
C307
C283
C333
C350
+
C251
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
2
10U_0805_6.3V6M
1
+
C250
2
220U_D2_4VM_R12
1
C355
2
10U_0805_6.3V6M
1
C282
2
10U_0805_6.3V6M
1
C257
2
10U_0805_6.3V6M
1
C309
2
10U_0805_6.3V6M
1
C353
2
10U_0805_6.3V6M
1
+
C247
2
@220U_D2_4VM_R12
1
C324
C314
2
10U_0805_6.3V6M
1
C332
C279
2
10U_0805_6.3V6M
1
C323
C260
2
10U_0805_6.3V6M
1
C261
C258
2
10U_0805_6.3V6M
1
C256
C262
2
10U_0805_6.3V6M
1
+
C246
2
@220U_D2_4VM_R12
1
C356
2
10U_0805_6.3V6M
1
C298
2
10U_0805_6.3V6M
1
C342
2
10U_0805_6.3V6M
1
C359
2
10U_0805_6.3V6M
1
C352
2
10U_0805_6.3V6M
C,uF ESR, mohm ESL,nH
4X220uF 12m ohm/4 3.5nH/4
35X10uF 5m ohm/35 0.6nH/35
1
1
1
1
C374
2
2
10U_1206_10V4Z
10U_1206_10V4Z
1
C382
2
0.1U_0402_16V4Z
C388
1
C379
2
0.1U_0402_16V4Z
2
10U_1206_10V4Z
1
C383
2
0.1U_0402_16V4Z
C320
C372
C276
2
10U_1206_10V4Z
1
C337
2
0.1U_0402_16V4Z
2
1
1
C326
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C371
2
0.1U_0402_16V4Z
C296
1
+CPU_CORE
Title
Size Document Number Rev
A3
Date: Sheet of
JP12C
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
T26
U2
U6
U22
U24
V1
V4
V5
V21
V25
W3
W6
W22
W23
W26
Y2
Y5
Y21
Y24
AA1
AA4
AA6
AA8
AA10
AA12
AA14
AA16
AA18
AA20
AA22
AA25
AB3
AB5
AB7
AB9
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB26
AC2
AC5
AC8
AC10
AC12
AC14
AC16
AC18
AC21
AC24
AD1
AD4
AD7
AD9
AD11
AD13
AD15
AD17
AD19
AD22
AD25
AE3
AE6
AE8
AE10
AE12
AE14
AE16
AE18
AE20
AE23
AE26
AF2
AF5
AF9
AF11
AF13
AF15
AF17
AF19
AF21
AF24
G21
H22
W21
AA5
AA7
AA9
AA11
AA13
AA15
AA17
AA19
AA21
AB6
AB8
AB10
AB12
AB14
AB16
AB18
AB20
AB22
AC9
AC11
AC13
AC15
AC17
AC19
AD8
AD10
AD12
AD14
AD16
AD18
AE9
AE11
AE13
AE15
AE17
AE19
AF8
AF10
AF12
AF14
AF16
AF18
M21
M24
N22
N23
N26
R22
R25
F20
F22
K22
V22
Y22
P21
P24
T21
T23
G5
H6
J5
J21
U5
V6
W5
Y6
M4
M5
N3
N6
P2
P5
R1
R4
R6
T3
T5
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
POWER, GROUND
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AMP_1473129-1
Banias
Compal Electronics, Inc.
Banias Processor in mFCPGA479
DCL53 LA-1881
440Monday, August 11, 2003
1
1.0
5
HA#[3..31]3
H_REQ#[0..4]3
HUB_PD[0..10]13
D D
C C
CLK_MCH_BCLK#12
CLK_MCH_BCLK12
B B
+1.2VS
127Ohm For GM+
HA#[3..31]
H_REQ#[0..4]
HUB_PD[0..10]
H_ADSTB#03
H_ADSTB#13
R242 27.4_0402_1%
1 2
R214 27.4_0402_1%
1 2
HUB_PSTRB13
HUB_PSTRB#13
R269 27.4_0402_1%
HDVREF
HCCVREF
HAVREF
H_DSTBN#03
H_DSTBN#13
H_DSTBN#23
H_DSTBN#33
H_DSTBP#03
H_DSTBP#13
H_DSTBP#23
H_DSTBP#33
H_DINV#03
H_DINV#13
H_DINV#23
H_DINV#33
H_CPURST#3
12
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
HYSWING
HXSWING
HYRCOMP
HXRCOMP
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
CPURST#
HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9
HUB_PD10
HI_PSTRB
HI_PSTRB#
HUB_VSWING
HUB_VREF
U12A
Montara-GM(L)
P23
HA#3
T25
HA#4
T28
HA#5
R27
HA#6
U23
HA7#
U24
HA#8
R24
HA#9
U28
HA#10
V28
HA#11
U27
HA#12
T27
HA#13
V27
HA#14
U25
HA#15
V26
HA#16
Y24
HA#17
V25
HA#18
V23
HA#19
W25
HA#20
Y25
HA#21
AA27
HA#22
W24
HA#23
W23
HA#24
W27
HA#25
Y27
HA#26
AA28
HA#27
W28
HA#28
AB27
HA#29
Y26
HA#30
AB28
HA#31
R28
HREQ#0
P25
HREQ#1
R23
HREQ#2
R25
HREQ#3
T23
HREQ#4
T26
HADSTB#0
AA26
HADSTB#1
AD29
BCLK#
AE29
BCLK
K28
HYSWING
B18
HXSWING
H28
HYRCOMP
B20
HXRCOMP
K21
HVREF0
J21
HVREF1
J17
HVREF2
Y28
HCCVREF
Y22
HAVREF
J28
HDSTBN#0
C27
HDSTBN#1
E22
HDSTBN#2
D18
HDSTBN#3
K27
HDSTBP#0
D26
HDSTBP#1
E21
HDSTBP#2
E18
HDSTBP#3
J25
DINV0#
E25
DINV1#
B25
DINV2#
G19
DINV3#
F15
CPURST#
U7
HL_0
U4
HL_1
U3
HL_2
V3
HL_3
W2
HL_4
W6
HL_5
V6
HL_6
W7
HL_7
T3
HL_8
V5
HL_9
V4
HL_10
W3
HLSTB
V2
HLSTB#
T2
HLRCOMP
U2
PSWING
W1
HLVREF
RG82G4350M_uFCBGA732
HOST
HUB I/F
4
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
ADS#
HTRDY#
DRDY#
DEFER#
HITM#
HIT#
HLOCK#
BREQ0#
BNR#
BPRI#
DBSY#
RS#0
RS#1
RS#2
K22
H27
K25
L24
J27
G28
L27
L23
L25
J24
H25
K23
G27
K26
J23
H26
F25
F26
B27
H23
E27
G25
F28
D27
G24
C28
B26
G22
C26
E26
G23
B28
B21
G21
C24
C23
D22
C25
E24
D24
G20
E23
B22
B23
F23
F21
C20
C21
G18
E19
E20
G17
D20
F19
C19
C17
F17
B19
G16
E16
C16
E17
D16
C18
L28
M25
N24
M28
N28
N27
P27
M23
N25
P28
M26
N23
P26
M27
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HD#[0..63]
H_ADS# 3
H_TRDY# 3
H_DRDY# 3
H_DEFER# 3
H_HITM# 3
H_HIT# 3
H_LOCK# 3
H_BR0# 3
H_BNR# 3
H_BPRI# 3
H_DBSY# 3
H_RS#0 3
H_RS#1 3
H_RS#2 3
HD#[0..63] 3
3
HOST REF VOLTAGE
+VCCP
R204
301_0603_1%
HXSWING HYSWING
1 2
1 2
R283
49.9_0603_1%
1 2
HAVREF
R290
1 2
100_0603_1%
2
C301
0.1U_0402_16V4Z
1
2
C399
0.1U_0402_16V4Z
1
R203
150_0603_1%
+VCCP
HUB I/F REF VOLTAGE
+1.5VS
R265
80.6_0603_1%
1 2
HUB_VSWING
2
0.1U_0402_16V4Z
1 2
0.1U_0402_16V4Z
1 2
C381
C392
1
2
1
R257
51.1_0603_1%
R252
40.2_0603_1%
0.796V
2
C380
0.01U_0402_16V7K
1
0.35V
2
C404
0.01U_0402_16V7K
1
+VCCP
R250
301_0603_1%
1 2
R245
150_0603_1%
1 2
+VCCP
R263
49.9_0603_1%
1 2
HDVREF
R255
1 2
100_0603_1%
HUB_VSWING
HUB_VREF
2
2
C338
0.1U_0402_16V4Z
1
2
C343
1
1U_0603_10V6K
2
C341
0.1U_0402_16V4Z
1
+VCCP
1 2
R289
1 2
100_0603_1%
R299
49.9_0603_1%
HCCVREF
1U_0603_10V6K
1
2
1
C397
2
C398
0.1U_0402_16V4Z
1
A A
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
MONTARA-GM-HOST(1/4)
Size Document Number Rev
DCL53 LA-1881
Date: Sheet
1
of
540Monday, August 11, 2003
1.0
5
DVOC_D[0..11]17
D D
DVOBC_CLKINT
R253
@33_0402_5%
1 2
2
C339
@22P_0402_50V8J
1
C C
RTCCLK14
B B
A A
DVOC_D[0..11]
R219
10K_0603_1%
2
G
AGP_BUSY#14
CLK_MCH_66M12
+1.5VS
1 2
13
D
S
DVOBC_CLKINT17
DVOC_CLK17
DVOC_CLK#17
DVOC_HSYNC17
DVOC_VSYNC17
MI2CCLK17
MI2CDATA17
Q38
BSN20_SOT23
+1.5VS
1K_0402_5%
1 2
1 2
R240
R256
100K_0402_5%
DVOBC_CLKINT
DVOC_CLK
DVOC_CLK#
DVOC_HSYNC
DVOC_VSYNC
R241
1 2
100K_0402_5%
MI2CCLK
MI2CDATA
MDVICLK
MDVIDATA
MDDCCLK
MDDCDATA
DVOC_D0
DVOC_D1
DVOC_D2
DVOC_D3
DVOC_D4
DVOC_D5
DVOC_D6
DVOC_D7
DVOC_D8
DVOC_D9
DVOC_D10
DVOC_D11
R235
1 2
1 2
R2511K_0603_1%
GVREF
DVORCOMP
CLK_MCH_66M
R234
40.2_0603_1%
1K_0402_5%
GST0
GST1
R3
R5
R6
R4
P6
P5
N5
P2
N2
N3
M1
M5
P3
P4
T6
T5
L2
12
M2
G2
M3
J3
J2
K6
L5
L3
H5
K7
N6
N7
M6
P7
T7
K5
K1
K3
K2
J6
J5
H2
H1
H3
H4
H6
G3
E5
F5
E3
E2
G5
F4
G6
F6
L7
D5
F1
F7
D1
Y3
AA5
F2
F3
B2
B3
C2
C3
C4
D2
D3
D7
L4
4
U12B
Montara-GM(L)
DVOBD0/(NC)
DVOBD1/(NC)
DVOBD2/(NC)
DVOBD3/(NC)
DVOBD4/(NC)
DVOBD5/(NC)
DVOBD6/(NC)
DVOBD7/(NC)
DVOBD8/(NC)
DVOBD9/(NC)
DVOBD10/(NC)
DVOBD11/(NC)
DVOBCLK/(NC)
DVOBCLK#/(NC)
DVOBHSYNC/(NC)
DVOBVSYNC/(NC)
DVOBBLANK#/(NC)
DVOBFLDSTL/(NC)
DVOBCINTR#
DVOBCCLKINT
DVOCCLK
DVOCCLK#
DVOCHSYNC
DVOCVSYNC
DVOCBLANK#
DVOCFLDSTL
MI2CCLK
MI2CDATA
MDVICLK
MDVIDATA
MDDCCLK
MDDCDATA
DVOCD0
DVOCD1
DVOCD2
DVOCD3
DVOCD4
DVOCD5
DVOCD6
DVOCD7
DVOCD8
DVOCD9
DVOCD10
DVOCD11
ADDID0
ADDID1
ADDID2
ADDID3
ADDID4
ADDID5
ADDID6
ADDID7
DVODETECT
DPMS
GVREF
AGPBUSY#
DVORCOMP
GCLKIN
RVSD0
RVSD1
RVSD2
RVSD3
RVSD4
RVSD5
GST[1]
GST[0]
RVSD8
RVSD9
RVSD10
RVSD11
RG82G4350M_uFCBGA732
DVO
GREEN
GREEN#
HSYNC
VSYNC
REFSET
DDCACLK
DAC
DDCADATA
ICLKAM
ICLKAP
ICLKBM
ICLKBP
DDCPCLK
DDCPDATA
LVDS
PANELBKLTCTL
PANELBKLTEN
PANELVDDEN
LVREFH
LVREFL
DREFCLK
DREFSSCLK
LCLKCTLA
LCLKCTLB
CLKS
DPWR#/(NC)
DPSLP#
RSTIN#
PWROK
MISCNC
EXTTS0
MCHDETECTVSS
BLUE
BLUE#
RED
RED#
IYAM0
IYAM1
IYAM2
IYAM3
IYAP0
IYAP1
IYAP2
IYAP3
IYBM0
IYBM1
IYBM2
IYBM3
IYBP0
IYBP1
IYBP2
IYBP3
LVBG
LIBG
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
C9
D9
C8
D8
A7
A8
H10
J9
E8
B6
G9
G14
E15
C15
C13
F14
E14
C14
B13
H12
E12
C12
G11
G12
E11
C11
G10
D14
E13
E10
F10
B4
C5
G8
F8
A5
D12
F12
B12
A10
B7
B17
H9
C6
AA22
Y23
AD28
J11
D6
AJ1
B1
AH1
A2
AJ2
A28
AJ28
A29
B29
AH29
AJ29
AA9
AJ4
LCD_DC2
LCD_DD2
R243 @0_0402_5%
R191 1.5K_0603_1%
CLK_MCH_48M
CLK_SSC_66M
LCLKCTLB
PCIRST#
EXTTS
3
B18
G18
R18
HSYNC 18
VSYNC 18
DDC_CLK 18
DDC_DATA 18
TXOUT0- 18
TXOUT1- 18
TXOUT2- 18
TXOUT0+ 18
TXOUT1+ 18
TXOUT2+ 18
TZOUT0- 18
TZOUT1- 18
TZOUT2- 18
TZOUT0+ 18
TZOUT1+ 18
TZOUT2+ 18
TXCLK- 18
TXCLK+ 18
TZCLK- 18
TZCLK+ 18
LCD_CLK 18
LCD_DATA 18
12
ENVDD 18
12
CLK_MCH_48M 12
CLK_SSC_66M 12
H_DPWR# 3
H_DPSLP# 3,13
PCIRST# 13,17 , 1 9,20,21,22,23,25
VGATE 12,14,37
1 2
R200 10K_0603_1%
127Ohm For GM+
REFSET
R247
121_0603_1%
1 2
1 2
C321 22P_0402_50V8J
+3VS
LCD_DC2
LCD_DD2
INVT_PWM 18,27
ENBKL 27
+3VS
R222
@510_0402_5%
1 2
2
CLK_MCH_48M
@33_0402_5%
@22P_0402_50V8J
R217 2.2K_0402_5%
R216 2.2K_0402_5%
GST0
1 2
R227 @1K_0402_5%
GST1
1 2
R226 @1K_0402_5%
12
12
@22P_0402_50V8J
CLK_SSC_66M
@33_0402_5%
CLK_MCH_66M
@33_0402_5%
@22P_0402_50V8J
R291
C405
+1.5VS
R211
C284
R223
C302
1
I2C BUS PULL UP
+1.5VS
1 2
2
1
+3VS
MDVICLK
MDDCCLK
MDVIDATA
MDDCDATA
2.2K_0804_8P4R_5%
MI2CCLK
MI2CDATA
RP50
1 8
2 7
3 6
4 5
R249 2.2K_0402_5%
R264 2.2K_0402_5%
12
12
DVO REF
R236
1K_0603_1%
GVREF
1 2
1 2
VOLTAGE
2
C325
0.1U_0402_16V4Z
1
+1.5VS
1 2
2
1
12
1
2
R237
1K_0603_1%
Starp pin list
LCLKCTLB: High for P4
DVODETECT: Low to enable DVO
GST0 GST1
N.C. for Banias(default low)
High to disable DVO
PSB/Sys Mem/ GFX Core
0 0
0 1
1 0
400/266/200 (default)
400/200/200
400/200/133
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
MONTARA-GM-LVDS(2/4)
Size Document Number Rev
DCL53 LA-1881
Date: Sheet
1
of
640Monday, August 11, 2003
1.0
5
U12C
DDR_SMA09
DDR_SMA19,10
DDR_SMA29,10
DDR_SMA39
DDR_SMA49,10
DDR_SMA59,10
D D
DDR_SWE#9
DDR_SRAS#9
DDR_SCAS#9
DDR_CLK09
DDR_CLK0#9
DDR_CLK19
DDR_CLK1#9
C C
B B
DDR_CLK29
DDR_CLK2#9
DDR_CLK310
DDR_CLK3#10
DDR_CLK410
DDR_CLK4#10
DDR_CLK510
DDR_CLK5#10
DDR_CKE09,10
DDR_CKE19,10
DDR_CKE210
DDR_CKE310
DDR_SCS#09,10
DDR_SCS#19,10
DDR_SCS#210
DDR_SCS#310
DDR_SBS09
DDR_SBS19
DDR_SMA_B110
DDR_SMA_B210
DDR_SMA_B410
DDR_SMA_B510
DDR_SMA0
DDR_SMA1
DDR_SMA2
DDR_SMA3
DDR_SMA4
DDR_SMA5
DDR_SMA6
DDR_SMA7
DDR_SMA8
DDR_SMA9
DDR_SMA10
DDR_SMA11
DDR_SMA12
DDR_SDQS0
DDR_SDQS1
DDR_SDQS2
DDR_SDQS3
DDR_SDQS4
DDR_SDQS5
DDR_SDQS6
DDR_SDQS7
DDR_SDQS8
DDR_SWE#
DDR_SRAS#
DDR_SCAS#
DDR_SBS0
DDR_SBS1
DDR_SDM0
DDR_SDM1
DDR_SDM2
DDR_SDM3
DDR_SDM4
DDR_SDM5
DDR_SDM6
DDR_SDM7
DDR_SDM8
DDR_SMA_B1
DDR_SMA_B2
DDR_SMA_B4
DDR_SMA_B5
MRCOMP
MVSWINGL
MVSWINGH
Montara-GM(L)
AC18
SMA0
AD14
SMA1
AD13
SMA2
AD17
SMA3
AD11
SMA4
AC13
SMA5
AD8
SMA6
AD7
SMA7
AC6
SMA8
AC5
SMA9
AC19
SMA10
AD5
SMA11
AB5
SMA12
AG2
SDQS0
AH5
SDQS1
AH8
SDQS2
AE12
SDQS3
AH17
SDQS4
AE21
SDQS5
AH24
SDQS6
AH27
SDQS7
AD15
SDQS8
AD25
SWE#
AC21
SRAS#
AC24
SCAS#
AB2
SCK0
AA2
SCK0#
AC26
SCK1
AB25
SCK1#
AC3
SCK2
AD4
SCK2#
AC2
SCK3
AD2
SCK3#
AB23
SCK4
AB24
SCK4#
AA3
SCK5
AB4
SCK5#
AC7
SCKE0
AB7
SCKE1
AC9
SCKE2
AC10
SCKE3
AD23
SCS#0
AD26
SCS#1
AC22
SCS#2
AC25
SCS#3
AD22
SBA0
AD20
SBA1
AE5
SDM0
AE6
SDM1
AE9
SDM2
AH12
SDM3
AD19
SDM4
AD21
SDM5
AD24
SDM6
AH28
SDM7
AH15
SDM8
AD16
SMA_B1
AC12
SMA_B2
AF11
SMA_B4
AD10
SMA_B5
AC15
RCVENOUT#
AC16
RCVENIN#
AB1
SMRCOMP
AJ22
SMVSWINGL
AJ19
SMVSWINGH
RG82G4350M_uFCBGA732
4
MEMORY
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
SDQ64
SDQ65
SDQ66
SDQ67
SDQ68
SDQ69
SDQ70
SDQ71
SMVREF0
AF2
AE3
AF4
AH2
AD3
AE2
AG4
AH3
AD6
AG5
AG7
AE8
AF5
AH4
AF7
AH6
AF8
AG8
AH9
AG10
AH7
AD9
AF10
AE11
AH10
AH11
AG13
AF14
AG11
AD12
AF13
AH13
AH16
AG17
AF19
AE20
AD18
AE18
AH18
AG19
AH20
AG20
AF22
AH22
AF20
AH19
AH21
AG22
AE23
AH23
AE24
AH25
AG23
AF23
AF25
AG25
AH26
AE26
AG28
AF28
AG26
AF26
AE27
AD27
AG14
AE14
AE17
AG16
AH14
AE15
AF16
AF17
AJ24
DDR_SDQ0
DDR_SDQ1
DDR_SDQ2
DDR_SDQ3
DDR_SDQ4
DDR_SDQ5
DDR_SDQ6
DDR_SDQ7
DDR_SDQ8
DDR_SDQ9
DDR_SDQ10
DDR_SDQ11
DDR_SDQ12
DDR_SDQ13
DDR_SDQ14
DDR_SDQ15
DDR_SDQ16
DDR_SDQ17
DDR_SDQ18
DDR_SDQ19
DDR_SDQ20
DDR_SDQ21
DDR_SDQ22
DDR_SDQ23
DDR_SDQ24
DDR_SDQ25
DDR_SDQ26
DDR_SDQ27
DDR_SDQ28
DDR_SDQ29
DDR_SDQ30
DDR_SDQ31
DDR_SDQ32
DDR_SDQ33
DDR_SDQ34
DDR_SDQ35
DDR_SDQ36
DDR_SDQ37
DDR_SDQ38
DDR_SDQ39
DDR_SDQ40
DDR_SDQ41
DDR_SDQ42
DDR_SDQ43
DDR_SDQ44
DDR_SDQ45
DDR_SDQ46
DDR_SDQ47
DDR_SDQ48
DDR_SDQ49
DDR_SDQ50
DDR_SDQ51
DDR_SDQ52
DDR_SDQ53
DDR_SDQ54
DDR_SDQ55
DDR_SDQ56
DDR_SDQ57
DDR_SDQ58
DDR_SDQ59
DDR_SDQ60
DDR_SDQ61
DDR_SDQ62
DDR_SDQ63
DDR_CB0
DDR_CB1
DDR_CB2
DDR_CB3
DDR_CB4
DDR_CB5
DDR_CB6
DDR_CB7
2
C436
0.1U_0402_16V4Z
1
+SDREF
3
DDR_SDQ[0..63]
DDR_SDQS[0..8]
DDR_CB[0..7]
DDR_SMA[6..12]
DDR_SDM[0..8]
DDR_SDQ[0..63] 9
DDR_SDQS[0..8] 9
DDR_CB[0..7] 9
DDR_SMA[6..12] 9
DDR_SDM[0..8] 9
DDR REF & SWING VOLTAGE
+2.5V
12
R301
60.4_0603_1%
MRCOMP
C420
12
R323
604_0603_1%
MVSWINGL
12
0.1U_0402_16V4Z
+2.5V
12
MVSWINGH
12
12
R300
60.4_0603_1%
0.497V
2
1
R324
150_0603_1%
C437
2.002V
2
C438
0.1U_0402_16V4Z
1
2
1
0.1U_0402_16V4Z
+2.5V
R322
150_0603_1%
R325
604_0603_1%
2
U12D
C1
VSS0
G1
VSS1
L1
VSS2
U1
VSS3
AA1
VSS4
AE1
VSS5
R2
VSS6
AG3
VSS7
AJ3
VSS8
D4
VSS9
G4
VSS10
K4
VSS11
N4
VSS12
T4
VSS13
W4
VSS14
AA4
VSS15
AC4
VSS16
AE4
VSS17
B5
VSS18
U5
VSS19
Y5
VSS20
Y6
VSS21
AG6
VSS22
C7
VSS23
E7
VSS24
G7
VSS25
J7
VSS26
M7
VSS27
R7
VSS28
AA7
VSS29
AE7
VSS30
AJ7
VSS31
H8
VSS32
K8
VSS33
P8
VSS34
T8
VSS35
V8
VSS36
Y8
VSS37
AC8
VSS38
E9
VSS39
L9
VSS40
N9
VSS41
R9
VSS42
U9
VSS43
W9
VSS44
AB9
VSS45
AG9
VSS46
C10
VSS47
J10
VSS48
AA10
VSS49
AE10
VSS50
D11
VSS51
F11
VSS52
H11
VSS53
AB11
VSS54
AC11
VSS55
AJ11
VSS56
J12
VSS57
AA12
VSS58
AG12
VSS59
A13
VSS60
D13
VSS61
F13
VSS62
H13
VSS63
N13
VSS64
R13
VSS65
U13
VSS66
AB13
VSS67
AE13
VSS68
J14
VSS69
P14
VSS70
T14
VSS71
AA14
VSS72
AC14
VSS73
D15
VSS74
H15
VSS75
N15
VSS76
R15
VSS77
U15
VSS78
AB15
VSS79
AG15
VSS80
F16
VSS81
J16
VSS82
P16
VSS83
T16
VSS84
AA16
VSS85
AE16
VSS86
A17
VSS87
D17
VSS88
H17
VSS89
N17
VSS90
RG82G4350M_uFCBGA732
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
Montara-GM(L)
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
R17
U17
AB17
AC17
F18
J18
AA18
AG18
A19
D19
H19
AB19
AE19
F20
J20
AA20
AC20
A21
D21
H21
M21
P21
T21
V21
Y21
AA21
AB21
AG21
B24
F22
J22
L22
N22
R22
U22
W22
AE22
A23
D23
AA23
AC23
AJ23
F24
H24
K24
M24
P24
T24
V24
AA24
AG24
A25
D25
AA25
AE25
G26
J26
L26
N26
R26
U26
W26
AB26
A27
F27
AC27
AG27
AJ27
AC28
AE28
C29
E29
G29
J29
L29
N29
U29
W29
AA29
AJ10
AJ12
AJ18
AJ20
C22
D28
E28
L6
T9
AJ26
1
A A
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
MONTARA-GM-DDR(3/4)
DCL53 LA-1881
1.0
of
740Monday, August 11, 2003
1
5
+1.2VS
D D
+1.2VS
+1.2VS_PLLA
+1.2VS_PLLB
+1.5VS_DVO
C C
+1.5VS_DAC
+1.5VS_ALVDS
+1.5VS_DLVDS
B B
A A
+2.5V_TXLVDS
+3VS_GPIO
1
C295
10U_1206_10V4Z
2
2
1
0.1U_0402_16V4Z
Montara-GM(L)
J15
VCC0
P13
VCC1
T13
VCC2
N14
VCC3
R14
VCC4
U14
VCC5
P15
VCC6
T15
VCC7
AA15
VCC8
N16
VCC9
R16
VCC10
U16
VCC11
P17
VCC12
T17
VCC13
AA17
VCC14
AA19
VCC15
W21
VCC16
H14
VCC17
V1
VCCHL0
Y1
VCCHL1
W5
VCCHL2
U6
VCCHL3
U8
VCCHL4
W8
VCCHL5
V7
VCCHL6
V9
VCCHL7
D29
VCCAHPLL
Y2
VCCAGPLL
A6
VCCADPLLA
B16
VCCADPLLB
E1
VCCDVO_0
J1
VCCDVO_1
N1
VCCDVO_2
E4
VCCDVO_3
J4
VCCDVO_4
M4
VCCDVO_5
E6
VCCDVO_6
H7
VCCDVO_7
J8
VCCDVO_8
L8
VCCDVO_9
M8
VCCDVO_10
N8
VCCDVO_11
R8
VCCDVO_12
K9
VCCDVO_13
M9
VCCDVO_14
P9
VCCDVO_15
A9
VCCADAC0
B9
VCCADAC1
B8
VSSADAC
A11
VCCALVDS
B11
VSSALVDS
G13
VCCDLVDS0
B14
VCCDLVDS1
J13
VCCDLVDS2
B15
VCCDLVDS3
F9
VCCTXLVDS0
B10
VCCTXLVDS1
D10
VCCTXLVDS2
A12
VCCTXLVDS3
A3
VCCGPIO_0
A4
VCCGPIO_1
RG82G4350M_uFCBGA732
R208
1 2
0_0805_5%
C294
U12E
VTTLF0
VTTLF1
VTTLF2
VTTLF3
VTTLF4
VTTLF5
VTTLF6
VTTLF7
VTTLF8
VTTLF9
VTTLF10
VTTLF11
VTTLF12
VTTLF13
VTTLF14
VTTLF15
VTTLF16
VTTLF17
VTTLF18
VTTLF19
VTTLF20
VTTHF0
VTTHF1
VTTHF2
VTTHF3
VTTHF4
VCCSM0
VCCSM1
VCCSM2
VCCSM3
VCCSM4
VCCSM5
VCCSM6
VCCSM7
POWER
VCCSM8
VCCSM9
VCCSM10
VCCSM11
VCCSM12
VCCSM13
VCCSM14
VCCSM15
VCCSM16
VCCSM17
VCCSM18
VCCSM19
VCCSM20
VCCSM21
VCCSM22
VCCSM23
VCCSM24
VCCSM25
VCCSM26
VCCSM27
VCCSM28
VCCSM29
VCCSM30
VCCSM31
VCCSM32
VCCSM33
VCCSM34
VCCSM35
VCCSM36
VCCQSM0
VCCQSM1
VCCASM0
VCCASM1
+2.5V_TXLVDS+3VS+3VS_GPIO
90mA
1
C286
0.1U_0402_16V4Z
2
22U_1206_16V4Z_V1
G15
H16
H18
J19
H20
L21
N21
R21
U21
H22
M22
P22
T22
V22
Y29
K29
F29
AB29
A26
A20
A18
A22
A24
H29
M29
V29
AC1
AG1
AB3
AF3
Y4
AJ5
AA6
AB6
AF6
Y7
AA8
AB8
Y9
AF9
AJ9
AB10
AA11
AB12
AF12
AA13
AJ13
AB14
AF15
AB16
AJ17
AB18
AF18
AB20
AF21
AJ21
AB22
AF24
AJ25
AF27
AC29
AF29
AG29
AJ6
AJ8
AD1
AF1
2
C304
1
0.1U_0402_16V4Z
4
+VCCP
C289 0.1U_0402_16V4Z
12
C288 0.1U_0402_16V4Z
12
C327 0.1U_0402_16V4Z
12
C347 0.1U_0402_16V4Z
12
12
+2.5V
+2.5V_QSM
+1.2VS_ASM
2
C313
1
2
C317
0.1U_0402_16V4Z
1
C387 0.1U_0402_16V4Z
1 2
R202 0_0805_5%
150U_D2_6.3VM
10U_1206_10V4Z
0.1U_0402_16V4Z
+2.5V
3
+1.2VS
1.4A
1
C319
+
2
10U_1206_10V4Z
+1.2VS
90mA Close to ball D29, Y2
1
C370
2
0.1U_0402_16V4Z
90mA
2
C346
0.1U_0402_16V4Z
1
+VCCP
0.72A
1
+
C349
0.1U_0402_16V4Z
2
150U_D2_6.3VM
+2.5V
1.9A
1
+
C434
C428
0.1U_0402_16V4Z
2
150U_D2_6.3VM
0.1U_0402_16V4Z
For VCC
C389
1
0.1U_0402_16V4Z
2
For VCCHL
2
C410
0.1U_0402_16V4Z
1
1 2
R267 0_0805_5%
2
C368
1
2
C351
1
0.1U_0402_16V4Z
2
C411
1
0.1U_0402_16V4Z
+2.5V_QSM
2
C439
4.7U_1206_16V6K
1
2
C330
1
2
1
2
1
2
1
1
2
2
1
0.1U_0402_16V4Z
2
C409
1
0.1U_0402_16V4Z
+1.5VS+1.5VS_DVO +1.5VS+1.5VS_DAC +1.5VS+1.5VS_ALVDS
2
C376
C365
0.1U_0402_16V4Z
1
2
C412
0.1U_0402_16V4Z
1
L19
1 2
CHB2012U170_0805
C442
R328 1_0603_1%
1 2
C331
2
0.1U_0402_16V4Z
1
2
C308
0.1U_0402_16V4Z
1
C254
220U_D2_4VM_R12
2
C391
1
0.1U_0402_16V4Z
2
C400
1
0.1U_0402_16V4Z
2
C386
0.1U_0402_16V4Z
2
1
C378
0.1U_0402_16V4Z
2
1
0.4A 0.4A
1
+
C403
C270
220U_D2_4VM_R12
2
70mA 90mA
C292
+
0.1U_0402_16V4Z
2
C336
0.1U_0402_16V4Z
1
2
C406
0.1U_0402_16V4Z
1
10U_0805_6.3V6M
2
0.01U_0402_16V7K
1
2
C287
1
0.1U_0402_16V4Z
2
C418
1
0.1U_0402_16V4Z
+1.2VS_ASM
1
C435
2
10U_0805_6.3V6M
1
2
2
C367
C360
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1 2
R199 0_0805_5%
2
C293
1
0.1U_0402_16V4Z
1 2
R193 0_0805_5%
2
C306
1
2
C335
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
2
C417
0.1U_0402_16V4Z
1
2
C416
1
0.1U_0402_16V4Z
2
C427
1
0.1U_0402_16V4Z
2
1
+1.2VS +1.2VS+1.2VS_PLLA +1.2VS_PLLB
2
C290
1
2
1
C426
C366
0.1U_0402_16V4Z
C271
220U_D2_4VM_R12
C291
0.1U_0402_16V4Z
22U_1206_16V4Z_V1
C431
0.1U_0402_16V4Z
1 2
2
1
C340
2
1
C377
2
1
1
2
+
0.1U_0402_16V4Z
2
1
0.01U_0402_16V7K
2
C305
1
70mA
1
2
0.1U_0402_16V4Z
2
C430
1
0.1U_0402_16V4Z
+1.2VS+2.5V
L18
CHB2012U170_0805
1 2
R201 0_0805_5%
1 2
R209 0_0805_5%
C303
1 2
R248 0_0805_5%
2
C322
1
2
C432
C433
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
+1.5VS+1.5VS_DLVDS
2
1
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFO RMATI ON. THIS SHEET MAY NO T BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
MONTARA-GM-POWER(4/4)
Size Document Number Rev
DCL53 LA-1881
Date: Sheet
1
of
840Monday, August 11, 2003
1.0
5
DDR_SDQ5
DDR_SDQ0
DDR_SDQ4
DDR_SDQ1
RP67
1 8
2 7
3 6
4 5
DDR_DQ5
DDR_DQ0
DDR_DQ4
DDR_DQ1
DDR_CB5
DDR_SDM8
DDR_CB6
DDR_CB3
10_8P4R_1206_5%
DDR_SDQS0
DDR_SDQ3
DDR_SDQ2
DDR_SDQ7
D D
DDR_SDQ6
DDR_SDM0
DDR_SDQ13
DDR_SDQ12
RP79
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP66
1 8
2 7
3 6
4 5
DDR_DQS0
DDR_DQ3
DDR_DQ2
DDR_DQ7
DDR_DQ6
DDR_DM0
DDR_DQ13
DDR_DQ12
DDR_SDQ32
DDR_SDQS4
DDR_SDQ33
DDR_SDQ36
DDR_SDQ38
DDR_SDQ37
DDR_SDQ34
DDR_SDM4
10_8P4R_1206_5%
DDR_SDQ9
DDR_SDQS1
DDR_SDQ8
DDR_SDM1
RP78
1 8
2 7
3 6
4 5
DDR_DQ9
DDR_DQS1
DDR_DQ8
DDR_DM1
DDR_SDQ35
DDR_SDQ39
DDR_SDQ44
DDR_SDQ45
10_8P4R_1206_5%
DDR_SDQ15
DDR_SDQ14
DDR_SDQ10
DDR_SDQ11
RP65
1 8
2 7
3 6
4 5
DDR_DQ15
DDR_DQ14
DDR_DQ10
DDR_DQ11
DDR_SDQ40
DDR_SDQ41
DDR_SDQS5
DDR_SDM5
10_8P4R_1206_5%
DDR_SDQ20
DDR_SDQ16
DDR_SDQ17
DDR_SDQS2
C C
DDR_SDQ21
DDR_SDM2
DDR_SDQ18
DDR_SDQ22
RP77
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP64
1 8
2 7
3 6
4 5
DDR_DQ20
DDR_DQ16
DDR_DQ17
DDR_DQS2
DDR_DQ21
DDR_DM2
DDR_DQ18
DDR_DQ22
DDR_SDQ46
DDR_SDQ43
DDR_SDQ47
DDR_SDQ42
DDR_SDQ49
DDR_SDQ52
DDR_SDQ53
DDR_SDQ48
10_8P4R_1206_5%
DDR_SDQ19
DDR_SDQ23
DDR_SDQ24
DDR_SDQ28
RP76
1 8
2 7
3 6
4 5
DDR_DQ19
DDR_DQ23
DDR_DQ24
DDR_DQ28
DDR_SDQS6
DDR_SDM6
DDR_SDQ50
DDR_SDQ51
10_8P4R_1206_5%
DDR_SDQ25
DDR_SDQ29
DDR_SDQS3
DDR_SDM3
RP63
1 8
2 7
3 6
4 5
DDR_DQ25
DDR_DQ29
DDR_DQS3
DDR_DM3
DDR_SDQ55
DDR_SDQ54
DDR_SDQ61
DDR_SDQ57
10_8P4R_1206_5%
DDR_SDQ30
DDR_SDQ26
DDR_SDQ31
DDR_SDQ27
B B
DDR_CB1
DDR_CB0
DDR_CB4
DDR_SDQS8
DDR_CB2
DDR_CB7
DDR_SMA6 DDR_F_SMA6
DDR_SMA7 DDR_F_SMA7
DDR_SMA9 DDR_F_SMA9
A A
DDR_SMA11 DDR_F_SMA11
DDR_SMA12 DDR_F_SMA12
RP75
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP62
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP68
1 4
2 3
10_4P2R_0404_5%
RP15
1 4
2 3
10_4P2R_0404_5%
RP14
1 4
2 3
10_4P2R_0404_5%
RP13
1 4
2 3
10_4P2R_0404_5%
DDR_DQ30
DDR_DQ26
DDR_DQ31
DDR_DQ27
DDR_F_CB1
DDR_F_CB0
DDR_F_CB4
DDR_DQS8
DDR_F_CB2
DDR_F_CB7
DDR_F_SMA8DDR_SMA8
DDR_SDQ56
DDR_SDQ60
DDR_SDQS7
DDR_SDM7
DDR_SDQ62
DDR_SDQ63
DDR_SDQ58
DDR_SDQ59
DDR_SCAS#7
DDR_SWE#7
DDR_SBS17 DDR_F_SBS1 10
DDR_SMA07
DDR_SCAS#
DDR_SWE#
DDR_SRAS#
DDR_SBS1
DDR_SBS0
DDR_SMA10 DDR_F_SMA10
DDR_SMA0 DDR_F_SMA0
DDR_SMA3
4
RP74
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP73
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP61
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP72
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP60
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP71
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP59
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP70
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP58
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP69
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP57
1 8
2 7
3 6
4 5
10_8P4R_1206_5%
RP16
1 4
2 3
10_4P2R_0404_5%
RP12
1 4
2 3
10_4P2R_0404_5%
RP11
1 4
2 3
10_4P2R_0404_5%
RP10
1 4
2 3
10_4P2R_0404_5%
DDR_F_CB5
DDR_DM8
DDR_F_CB6
DDR_F_CB3
DDR_DQ32
DDR_DQS4
DDR_DQ33
DDR_DQ36
DDR_DQ38
DDR_DQ37
DDR_DQ34
DDR_DM4
DDR_DQ35
DDR_DQ39
DDR_DQ44
DDR_DQ45
DDR_DQ40
DDR_DQ41
DDR_DQS5
DDR_DM5
DDR_DQ46
DDR_DQ43
DDR_DQ47
DDR_DQ42
DDR_DQ49
DDR_DQ52
DDR_DQ53
DDR_DQ48
DDR_DQS6
DDR_DM6
DDR_DQ50
DDR_DQ51
DDR_DQ55
DDR_DQ54
DDR_DQ61
DDR_DQ57
DDR_DQ56
DDR_DQ60
DDR_DQS7
DDR_DM7
DDR_DQ62
DDR_DQ63
DDR_DQ58
DDR_DQ59
DDR_F_SCAS#
DDR_F_SWE#
DDR_F_SRAS#
DDR_F_SBS1
DDR_F_SBS0
DDR_F_SMA3
DDR_F_SCAS# 10
DDR_F_SWE# 10
DDR_F_SRAS# 10DDR_SRAS#7
DDR_F_SBS0 10DDR_SBS07
DDR_F_SMA0 10
DDR_F_SMA3 10DDR_SMA37
3
+2.5V
JP25
1
VREF
3
DDR_DQ5
DDR_DQ0
DDR_DQS0
DDR_DQ6
DDR_DQ2
DDR_DQ13
DDR_DQ9
DDR_DQS1
DDR_DQ15
DDR_DQ14
DDR_CLK07
DDR_CLK0#7
DDR_DQ17
DDR_DQ21
DDR_DQS2
DDR_DQ18
DDR_DQ22
DDR_DQ25
DDR_DQ29
DDR_DQS3
DDR_DQ30
DDR_DQ26
DDR_F_CB0
DDR_F_CB1
DDR_DQS8
DDR_F_CB2
DDR_CLK27
DDR_CLK2#7
DDR_CKE17,10
DDR_SMA57,10
DDR_SMA17,10
DDR_SCS#07,10
DDR_CKE1
DDR_SMA12
DDR_SMA9
DDR_SMA7
DDR_SMA5
DDR_SMA3
DDR_SMA1
DDR_SMA10
DDR_SBS0
DDR_SWE#
DDR_SCS#0
DDR_DQ37
DDR_DQ34
DDR_DQS4
DDR_DQ35
DDR_DQ36
DDR_DQ41
DDR_DQS5
DDR_DQ46
DDR_DQ43
DDR_DQ48
DDR_DQ53
DDR_DQS6
DDR_DQ50
DDR_DQ51
DDR_DQ61
DDR_DQ57
DDR_DQS7
DDR_DQ62
DDR_DQ63
SMB_DATA10,12,13
SMB_CLK10,12,13
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
DU/RESET#
DU/BA2
VREF
DQ12
DQ13
DQ14
DQ15
DQ20
DQ21
DQ22
DQ23
DQ28
DQ29
DQ30
DQ31
CKE0
RAS#
CAS#
DQ36
DQ37
DQ38
DQ39
DQ44
DQ45
DQ46
DQ47
CK1#
DQ52
DQ53
DQ54
DQ55
DQ60
DQ61
DQ62
DQ63
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
VDD
DM1
VSS
VDD
VDD
VSS
VSS
VDD
DM2
VSS
VDD
DM3
VSS
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
VSS
VSS
VDD
VDD
VSS
VDD
BA1
VSS
VDD
DM4
VSS
VDD
DM5
VSS
VDD
CK1
VSS
VDD
DM6
VSS
VDD
DM7
VSS
VDD
SA0
SA1
SA2
2
1
+2.5V
+1.25VS_SDREF_R
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
A11
102
A8
104
106
A6
108
A4
110
A2
112
A0
114
116
118
120
122
S1#
124
DU
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DU
DDR_DQ4
DDR_DQ1
DDR_DM0
DDR_DQ3
DDR_DQ7
DDR_DQ12
DDR_DQ8
DDR_DM1
DDR_DQ10
DDR_DQ11
DDR_DQ20
DDR_DQ16
DDR_DM2
DDR_DQ19
DDR_DQ23
DDR_DQ24
DDR_DQ28
DDR_DM3
DDR_DQ31
DDR_DQ27
DDR_F_CB4
DDR_F_CB5
DDR_DM8
DDR_F_CB6
DDR_F_CB7DDR_F_CB3
DDR_CKE0
DDR_SMA11
DDR_SMA8
DDR_SMA6
DDR_SMA4
DDR_SMA2
DDR_SMA0
DDR_SBS1
DDR_SRAS#
DDR_SCAS#
DDR_SCS#1
DDR_DQ32
DDR_DQ33
DDR_DM4
DDR_DQ38
DDR_DQ39
DDR_DQ45
DDR_DQ44DDR_DQ40
DDR_DM5
DDR_DQ47
DDR_DQ42
DDR_DQ49
DDR_DQ52
DDR_DM6
DDR_DQ55
DDR_DQ54
DDR_DQ56
DDR_DQ60
DDR_DM7
DDR_DQ58
DDR_DQ59
1
C495
0.1U_0402_16V4Z
2
DDR_CKE0 7,10
DDR_SMA4 7,10
DDR_SMA2 7,10
DDR_SCS#1 7,10
DDR_CLK1# 7
DDR_CLK1 7
1 2
+SDREF
R408
0_0805_5%
DDR_SDQ[0..63]
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_SDQS[0..8]
DDR_CB[0..7]
DDR_F_CB[0..7]
DDR_F_SMA[6..12]
DDR_SMA[6..12]
DDR_DM[0..8]
DDR_SDM[0..8]
DDR_SDQ[0..63] 7
DDR_DQ[0..63] 10
DDR_DQS[0..8] 10
DDR_SDQS[0..8] 7
DDR_CB[0..7] 7
DDR_F_CB[0..7] 10
DDR_F_SMA[6..12] 10
DDR_SMA[6..12] 7
DDR_DM[0..8] 10
DDR_SDM[0..8] 7
AMP1376409_REVERSE
DIMM0
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
5
4
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR-SODIMM SLOT0
DCL53 LA-1881
1.0
of
940Monday, August 11, 2003
1
A
+1.25VS +1.25VS
DDR_DQ5
DDR_DQ0
RP17
1 4
2 3
56_4P2R_0404_5%
DDR_DQ4
DDR_DQ1
1 1
DDR_DQ6
DDR_DQS0
RP110
1 4
2 3
56_4P2R_0404_5%
RP18
1 4
2 3
56_4P2R_0404_5%
DDR_DM0
DDR_DQ3
RP83
1 4
2 3
56_4P2R_0404_5%
DDR_DQ2
DDR_DQ13
RP19
1 4
2 3
56_4P2R_0404_5%
DDR_DQ7
DDR_DQ12
RP82
1 4
2 3
56_4P2R_0404_5%
DDR_DQS1
DDR_DQ9
RP20
1 4
2 3
56_4P2R_0404_5%
2 2
DDR_DQ8
DDR_DM1
RP81
1 4
2 3
56_4P2R_0404_5%
DDR_DQ14
DDR_DQ15
RP21
1 4
2 3
56_4P2R_0404_5%
DDR_DQ10
DDR_DQ11
RP80
1 4
2 3
56_4P2R_0404_5%
DDR_DQ21
DDR_DQ17
RP22
1 4
2 3
56_4P2R_0404_5%
DDR_DQ20
DDR_DQ16
RP109
1 4
2 3
56_4P2R_0404_5%
DDR_DQ18
3 3
DDR_DQS2
DDR_DM2
DDR_DQ19
RP23
1 4
2 3
56_4P2R_0404_5%
RP108
1 4
2 3
56_4P2R_0404_5%
DDR_DQ25
DDR_DQ22
RP24
1 4
2 3
56_4P2R_0404_5%
DDR_DQ23
DDR_DQ24
RP107
1 4
2 3
56_4P2R_0404_5%
DDR_DQS3
DDR_DQ29
RP25
1 4
2 3
56_4P2R_0404_5%
DDR_DQ28
DDR_DM3
4 4
DDR_DQ26
DDR_DQ30
RP106
1 4
2 3
56_4P2R_0404_5%
RP26
1 4
2 3
56_4P2R_0404_5%
DDR_DQ31
DDR_DQ27
RP105
1 4
2 3
56_4P2R_0404_5%
A
RP27
14
23
56_4P2R_0404_5%
RP104
14
23
56_4P2R_0404_5%
RP28
14
23
56_4P2R_0404_5%
RP103
14
23
56_4P2R_0404_5%
RP102
14
23
56_4P2R_0404_5%
RP37
14
23
56_4P2R_0404_5%
RP93
14
23
56_4P2R_0404_5%
RP36
14
23
56_4P2R_0404_5%
RP92
14
23
56_4P2R_0404_5%
RP38
14
23
56_4P2R_0404_5%
RP91
14
23
56_4P2R_0404_5%
RP39
14
23
56_4P2R_0404_5%
RP90
14
23
56_4P2R_0404_5%
RP40
14
23
56_4P2R_0404_5%
RP89
14
23
56_4P2R_0404_5%
RP41
14
23
56_4P2R_0404_5%
RP88
14
23
56_4P2R_0404_5%
RP42
14
23
56_4P2R_0404_5%
RP87
14
23
56_4P2R_0404_5%
RP43
14
23
56_4P2R_0404_5%
DDR_F_CB0
DDR_F_CB1
DDR_F_CB4
DDR_F_CB5
DDR_F_CB2
DDR_DQS8
DDR_DM8
DDR_F_CB6
DDR_F_CB7
DDR_F_CB3
DDR_DQ35
DDR_DQS4
DDR_DQ32
DDR_DQ33
DDR_DQ34
DDR_DQ37
DDR_DM4
DDR_DQ38
DDR_DQ41
DDR_DQ36
DDR_DQ39
DDR_DQ45
DDR_DQS5
DDR_DQ40
DDR_DQ44
DDR_DM5
DDR_DQ46
DDR_DQ43
DDR_DQ47
DDR_DQ42
DDR_DQ53
DDR_DQ48
DDR_DQ49
DDR_DQ52
DDR_DQ50
DDR_DQS6
DDR_DM6
DDR_DQ55
DDR_DQ61
DDR_DQ51
B
RP86
DDR_DQ54
14
DDR_DQ56
23
56_4P2R_0404_5%
RP44
DDR_DQS7
14
DDR_DQ57
23
56_4P2R_0404_5%
RP85
DDR_DQ60
14
DDR_DM7
23
56_4P2R_0404_5%
RP45
DDR_DQ63
14
DDR_DQ62
23
56_4P2R_0404_5%
RP84
DDR_DQ58
14
DDR_DQ59
23
56_4P2R_0404_5%
RP100
DDR_CKE2
14
DDR_F_SMA7
23
56_4P2R_0404_5%
RP31
DDR_SMA4
14
DDR_F_SMA3
23
56_4P2R_0404_5%
RP32
DDR_SMA5
14
DDR_SMA1
23
56_4P2R_0404_5%
RP30
DDR_SMA_B5
14
DDR_F_SMA9
23
56_4P2R_0404_5%
RP29
DDR_CKE3
14
DDR_F_SMA12
23
56_4P2R_0404_5%
RP99
DDR_F_SMA11
14
DDR_F_SMA8
23
56_4P2R_0404_5%
RP97
DDR_SMA_B2
14
DDR_F_SMA0
23
56_4P2R_0404_5%
RP98
DDR_F_SMA6
14
DDR_SMA_B4
23
56_4P2R_0404_5%
RP95
DDR_F_SCAS#
14
DDR_SCS#3
23
56_4P2R_0404_5%
RP35
DDR_SCS#2
14
DDR_F_SWE#
23
56_4P2R_0404_5%
RP33
DDR_SCS#0
14
DDR_SMA2
23
56_4P2R_0404_5%
RP34
DDR_F_SBS0
14
DDR_F_SMA10
23
56_4P2R_0404_5%
RP94
DDR_SMA_B1
14
DDR_SCS#1
23
56_4P2R_0404_5%
RP101
DDR_CKE0
14
DDR_CKE1
23
56_4P2R_0404_5%
RP96
DDR_F_SBS1
14
DDR_F_SRAS#
23
56_4P2R_0404_5%
B
DDR_SMA4 7,9
DDR_SMA5 7,9
DDR_SMA1 7,9
DDR_SCS#0 7,9
DDR_SMA2 7,9
DDR_F_SBS0 9
DDR_SCS#1 7,9
DDR_CKE0 7,9
DDR_CKE1 7,9
DDR_F_SBS1 9
C
D
+2.5V
JP26
1
VREF
3
DDR_DQ5
DDR_DQ0
DDR_DQS0
DDR_DQ6
DDR_DQ2
DDR_DQ13
DDR_DQ9
DDR_DQS1
DDR_DQ15
DDR_DQ14
DDR_CLK37
DDR_CLK3#7
DDR_DQ17
DDR_DQ21
DDR_DQS2
DDR_DQ18
DDR_DQ22
DDR_DQ25
DDR_DQ29
DDR_DQ30
DDR_DQ26
DDR_F_CB0
DDR_F_CB1
DDR_DQS8
DDR_F_CB2
DDR_CLK57
DDR_CLK5#7
DDR_CKE37
DDR_SMA_B57
DDR_F_SMA39
DDR_SMA_B17
DDR_F_SWE#9
DDR_SCS#27
SMB_DATA9,12,13
SMB_CLK9,12,13
DDR_CKE3
DDR_F_SMA12
DDR_F_SMA9
DDR_F_SMA7
DDR_SMA_B5
DDR_F_SMA3
DDR_SMA_B1
DDR_F_SMA10
DDR_F_SBS0
DDR_F_SWE#
DDR_SCS#2
DDR_DQ37
DDR_DQ34
DDR_DQS4
DDR_DQ35
DDR_DQ36
DDR_DQ41
DDR_DQ40
DDR_DQS5
DDR_DQ46
DDR_DQ43
DDR_DQ48
DDR_DQ53
DDR_DQS6
DDR_DQ50
DDR_DQ51
DDR_DQ61
DDR_DQ57
DDR_DQS7
DDR_DQ62
DDR_DQ63
+3VS
VSS
5
DQ0
7
DQ1
9
VDD
11
DQS0
13
DQ2
15
VSS
17
DQ3
19
DQ8
21
VDD
23
DQ9
25
DQS1
27
VSS
29
DQ10
31
DQ11
33
VDD
35
CK0
37
CK0#
39
VSS
41
DQ16
43
DQ17
45
VDD
47
DQS2
49
DQ18
51
VSS
53
DQ19
55
DQ24
57
VDD
59
DQ25
61
DQS3
63
VSS
65
DQ26
67
DQ27
69
VDD
71
CB0
73
CB1
75
VSS
77
DQS8
79
CB2
81
VDD
83
CB3
85
DU
87
VSS
89
CK2
91
CK2#
93
VDD
95
CKE1
97
DU/A13
99
A12
101
A9
103
VSS
105
A7
107
A5
109
A3
111
A1
113
VDD
115
A10/AP
117
BA0
119
WE#
121
S0#
123
DU
125
VSS
127
DQ32
129
DQ33
131
VDD
133
DQS4
135
DQ34
137
VSS
139
DQ35
141
DQ40
143
VDD
145
DQ41
147
DQS5
149
VSS
151
DQ42
153
DQ43
155
VDD
157
VDD
159
VSS
161
VSS
163
DQ48
165
DQ49
167
VDD
169
DQS6
171
DQ50
173
VSS
175
DQ51
177
DQ56
179
VDD
181
DQ57
183
DQS7
185
VSS
187
DQ58
189
DQ59
191
VDD
193
SDA
195
SCL
197
VDD_SPD
199
VDD_ID
VREF
VSS
DQ4
DQ5
VDD
DM0
DQ6
VSS
DQ7
DQ12
VDD
DQ13
DM1
VSS
DQ14
DQ15
VDD
VDD
VSS
VSS
DQ20
DQ21
VDD
DM2
DQ22
VSS
DQ23
DQ28
VDD
DQ29
DM3
VSS
DQ30
DQ31
VDD
CB4
CB5
VSS
DM8
CB6
VDD
CB7
DU/RESET#
VSS
VSS
VDD
VDD
CKE0
DU/BA2
VSS
VDD
BA1
RAS#
CAS#
VSS
DQ36
DQ37
VDD
DM4
DQ38
VSS
DQ39
DQ44
VDD
DQ45
DM5
VSS
DQ46
DQ47
VDD
CK1#
CK1
VSS
DQ52
DQ53
VDD
DM6
DQ54
VSS
DQ55
DQ60
VDD
DQ61
DM7
VSS
DQ62
DQ63
VDD
SA0
SA1
SA2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
A11
102
A8
104
106
A6
108
A4
110
A2
112
A0
114
116
118
120
122
S1#
124
DU
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
DU
AMP1376408_STANDARD
DIMM1
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
+2.5V
E
+1.25VS_SDREF_R
DDR_DQ4
DDR_DQ1
DDR_DM0
DDR_DQ3
DDR_DQ7
DDR_DQ12
DDR_DQ8
DDR_DM1
DDR_DQ10
DDR_DQ11
1
C491
0.1U_0402_16V4Z
2
DDR_F_SMA[6..12]
DDR_DQ[0..63]
DDR_DQS[0..8]
DDR_F_CB[0..7]
DDR_DQ20
DDR_DQ16
DDR_DM2
DDR_DQ19
DDR_DQ23
DDR_DQ24
DDR_DQ28
DDR_DM3DDR_DQS3
DDR_DQ31
DDR_DQ27
DDR_F_CB4
DDR_F_CB5
DDR_DM8
DDR_F_CB6
DDR_DM[0..8]
DDR_F_CB7DDR_F_CB3
DDR_CKE2
DDR_F_SMA11
DDR_F_SMA8
DDR_F_SMA6
DDR_SMA_B4
DDR_SMA_B2
DDR_F_SMA0
DDR_F_SBS1
DDR_F_SRAS#
DDR_F_SCAS#
DDR_SCS#3
DDR_DQ32
DDR_DQ33
DDR_DM4
DDR_DQ38
DDR_DQ39
DDR_DQ45
DDR_DQ44
DDR_DM5
DDR_DQ47
DDR_DQ42
DDR_DQ49
DDR_DQ52
DDR_DM6
DDR_DQ55
DDR_DQ54
DDR_DQ56
DDR_DQ60
DDR_DM7
DDR_DQ58
DDR_DQ59
DDR_CKE2 7
DDR_SMA_B4 7
DDR_SMA_B2 7
DDR_F_SMA0 9
DDR_F_SRAS# 9
DDR_F_SCAS# 9
DDR_SCS#3 7
DDR_CLK4# 7
DDR_CLK4 7
+3VS
Title
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR-SODIMM SLOT1
DCL53 LA-1881
E
DDR_F_SMA[6..12] 9
DDR_DQ[0..63] 9
DDR_DQS[0..8] 9
DDR_F_CB[0..7] 9
DDR_DM[0..8] 9
of
10 40Monday, August 11, 2003
1.0
A
B
C
D
E
Layout note :
Distribute as close as possible
to DDR-SODIMM.
+2.5V
1 1
1
C146
0.1U_0402_16V4Z
2
1
C145
0.1U_0402_16V4Z
2
1
C169
0.1U_0402_16V4Z
2
1
C142
0.1U_0402_16V4Z
2
1
C160
0.1U_0402_16V4Z
2
1
C140
0.1U_0402_16V4Z
2
1
C151
0.1U_0402_16V4Z
2
1
C165
0.1U_0402_16V4Z
2
1
C141
0.1U_0402_16V4Z
2
1
C147
0.1U_0402_16V4Z
2
1
C144
0.1U_0402_16V4Z
2
+2.5V +2.5V
1
C143
0.1U_0402_16V4Z
2
1
C162
0.1U_0402_16V4Z
2
1
C150
0.1U_0402_16V4Z
2
1
C161
0.1U_0402_16V4Z
2
1
C166
0.1U_0402_16V4Z
2
1
C167
0.1U_0402_16V4Z
2
1
+
C163
150U_D2_6.3VM
2
1
+
C164
150U_D2_6.3VM
2
Layout note :
Place one cap close to every 2 pull up resistors termination to
+1.25V
2 2
+1.25VS
1
C569
0.1U_0402_16V4Z
2
+1.25VS
1
C185
0.1U_0402_16V4Z
2
1
C568
0.1U_0402_16V4Z
2
1
C563
0.1U_0402_16V4Z
2
1
C567
0.1U_0402_16V4Z
2
1
C564
0.1U_0402_16V4Z
2
1
C184
0.1U_0402_16V4Z
2
1
C186
0.1U_0402_16V4Z
2
1
C565
0.1U_0402_16V4Z
2
1
C187
0.1U_0402_16V4Z
2
1
C183
0.1U_0402_16V4Z
2
1
C192
0.1U_0402_16V4Z
2
1
C566
0.1U_0402_16V4Z
2
1
C189
0.1U_0402_16V4Z
2
1
C182
0.1U_0402_16V4Z
2
1
C562
0.1U_0402_16V4Z
2
1
C180
0.1U_0402_16V4Z
2
1
C193
0.1U_0402_16V4Z
2
1
C181
0.1U_0402_16V4Z
2
1
C561
0.1U_0402_16V4Z
2
+1.25VS
1
C560
0.1U_0402_16V4Z
3 3
2
1
C559
0.1U_0402_16V4Z
2
1
C558
0.1U_0402_16V4Z
2
1
C553
0.1U_0402_16V4Z
2
1
C556
0.1U_0402_16V4Z
2
1
C552
0.1U_0402_16V4Z
2
1
C551
0.1U_0402_16V4Z
2
1
C550
0.1U_0402_16V4Z
2
1
C542
0.1U_0402_16V4Z
2
1
C549
0.1U_0402_16V4Z
2
+1.25VS
1
C548
0.1U_0402_16V4Z
2
1
C547
0.1U_0402_16V4Z
2
1
C202
0.1U_0402_16V4Z
2
1
C544
0.1U_0402_16V4Z
2
1
C195
0.1U_0402_16V4Z
2
1
C545
0.1U_0402_16V4Z
2
1
C199
0.1U_0402_16V4Z
2
1
C203
0.1U_0402_16V4Z
2
1
C557
0.1U_0402_16V4Z
2
1
C188
0.1U_0402_16V4Z
2
+1.25VS
1
C554
0.1U_0402_16V4Z
2
1
C546
0.1U_0402_16V4Z
2
1
C555
0.1U_0402_16V4Z
2
1
C191
0.1U_0402_16V4Z
2
1
C201
0.1U_0402_16V4Z
2
1
C200
0.1U_0402_16V4Z
2
1
C190
0.1U_0402_16V4Z
2
1
C197
0.1U_0402_16V4Z
2
1
C196
0.1U_0402_16V4Z
2
1
C198
0.1U_0402_16V4Z
2
+1.25VS
4 4
1
C205
0.1U_0402_16V4Z
2
1
C194
0.1U_0402_16V4Z
2
A
1
C543
0.1U_0402_16V4Z
2
1
C204
0.1U_0402_16V4Z
2
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
B
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
D
Size Document Number Rev
Date: Sheet
Compal Electronics, Inc.
DDR SODIMM Decoupling
DCL53 LA-1881
1.0
of
11 40Monday, August 11, 2003
E
A
ICS950810 Frequency Select Table
SEL2 SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
0
0
0
0
0
111
1 1
CY28346-2 Frequency Select Table
SEL1 SEL0 CPUCLKC[0..2] CPUCLKT[0..2]
SEL2
000
0
0
0
111
0
2 2
3 3
166.67 166.67
00
100.00 100.00
200.00 200.00
01
133.33 133.33
66.67 66.67
100.00 100.00
01
200.00 200.00
133.33 133.33
R367
10K_0402_5%
VGATE6,14,37
+VCCP
CLK_SSC_66M6
CLK_ICH_48M14
SDCLK_48M
CLK_MCH_48M6
CLK_ICH_14M14
CLK_14M_SIO25
B
+3VS
+3VS
1 2
1 2
1 2
R117
@56_0402_5%
1
C110
2
@10P_0402_50V8K
R68
@1K_0402_5%
R67
1K_0402_5%
1 2
1 2
R70
@1K_0402_5%
R118
0_0402_5%
+3VS
+3VS
12
1 2
R116
10K_0402_5%
2
G
1
C107
2
@10P_0402_50V8K
C
12
R69
1K_0402_5%
1 2
R98 1K_0402_5%
SLP_S1#14,27
STP_PCI#14
STP_CPU#14,37
13
D
Q16
2N7002_SOT23
+3VS
S
SMB_DATA9,10,13
SMB_CLK9,10,13
R10633_0402_5%
1 2
R103 33_0402_5%
1 2
R102 33_0402_5%
1 2
R104 33_0402_5%
1 2
1 2
1 2
1
C85
2
@10P_0402_50V8K
+3VS
C89
@10P_0402_50V8K
12
C96
@10P_0402_50V8K
1 2
R93
10K_0402_5%
12
XTALIN
Y1
XTALOUT
SSC_66M
1 2
14.31818MHZ_20P_6X1430004201
1 2
R97
475_0402_1%
R66
33_0402_5%
R65
33_0402_5%
D
L14
CHB2012U121_0805
1 2
L12
CHB2012U121_0805
1 2
U16
2
XTAL_IN
3
XTAL_OUT
54
SEL0
55
SEL1
40
SEL2
25
PWR_DWN#
34
PCI_STOP#
53
CPU_STOP#
28
VTT_PWRGD#
43
MULT0
29
SDATA
30
SCLK
33
3V66_0
35
3V66_1/VCH_CLK
42
IREF
39
48MHZ_USB
38
48MHZ_DOT
56
REF
+3V_CLK
Width=40 mils
32
37
14
1
VDD_REF
VDD_PCI_08VDD_PCI_1
VDD_48MHZ
VDD_3V66_019VDD_3V66_1
GND_REF4GND_PCI_09GND_PCI_115GND_3V66_020GND_3V66_131GND_48MHZ36GND_IREF41GND_CPU
1
C93
10U_1206_10V4Z
2
50
VDDA
VDD_CPU_046VDD_CPU_1
VSSA
CPUCLKT2
CPU_CLKC2
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
3V66_5
3V66_4
3V66_3
3V66_2
PCICLK_F2
PCICLK_F1
PCICLK_F0
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0
ICS950810CG_TSSOP56
47
E
1
C101
2
0.1U_0402_16V4Z
+3V_VDD
26
1
C118
2
27
0.1U_0402_16V4Z
CLK_BCLK
45
CLK_BCLK#
44
CLK_MCH
49
CLK_MCH#
48
CLK_ITP
52
CLK_ITP#
51
24
23
MCH_66M
22
ICH_66M
21
PCI_ICH
7
6
5
PCI_1394
18
PCI_SD
17
PCI_LAN
16
PCI_PCM
13
PCI_MINI
12
PCI_SIO
11
PCI_LPC
10
0.1U_0402_16V4Z
1
C104
2
1
C121
10U_1206_10V4Z
2
1 2
1 2
1 2
1 2
1 2
1 2
0.1U_0402_16V4Z
1
1
C106
2
2
0.1U_0402_16V4Z
L13
CHB2012U121_0805
1 2
R88
33_0402_5%
R90
33_0402_5%
R82
33_0402_5%
R83
33_0402_5%
R71
33_0402_5%
R77
33_0402_5%
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
F
1
C113
C112
2
0.1U_0402_16V4Z
R86
49.9_0402_1%
1 2
1 2
R91
49.9_0402_1%
R80
49.9_0402_1%
1 2
1 2
R84
49.9_0402_1%
R72
49.9_0402_1%
1 2
1 2
R78
49.9_0402_1%
R107 33_0402_5%
R105 33_0402_5%
R81 33_0402_5%
R101 33_0402_5%
R100 33_0402_5%
R96 33_0402_5%
R95 33_0402_5%
R92 33_0402_5%
R89 33_0402_5%
R85 33_0402_5%
C108
@10P_0402_50V8K
0.1U_0402_16V4Z
1
C102
2
0.1U_0402_16V4Z
+3VS
CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3
CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5
CLK_CPU_ITP 3
CLK_CPU_ITP# 3
1
2
0.1U_0402_16V4Z
1
1
C97
2
2
1
C109
2
@10P_0402_50V8K
C116
G
CLK_MCH_66M 6
CLK_ICH_66M 13
CLK_PCI_ICH 13
CLK_PCI_1394 22
CLK_PCI_SD
CLK_PCI_LAN 21
CLK_PCI_PCM 19
CLK_PCI_MINI 23
CLK_PCI_SIO 25
CLK_PCI_LPC 27
H
Clock Generator
4 4
Compal Electronics, Inc.
Title
THIS SHEET OF EN GINEER ING DR AWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
A
B
C
D
MAY BE USED B Y OR D ISCLOS ED T O ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
E
F
Clock Generator
Size Document Number Rev
B
DCL53 LA-1881
Date: Sheet
G
of
12 40Monday, August 11, 2003
H
1.0
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