Acer Aspire One D260 Schematics

A
B
C
D
E
1 1
Compal Confidential
2 2
NAV50/ 60 Schematics Document
Intel Pineview Processor with Tigerpoint + DDRII
3 3
REV: 3.0
4 4
Security Classification
Security Classification
2010-05-11
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
132Friday, May 21, 2010
132Friday, May 21, 2010
132Friday, May 21, 2010
E
D
D
D
of
of
of
A
B
C
D
E
Compal Confidential
Model Name : NAV50/ 60 File Name : LA-5651P
1 1
Thermal Sensor
EMC1402
page 5
ZZZ
ZZZ
PCB
PCB
DA60000E420
DA60000E420
CRT Conn
page 10
LCD Conn.
page 9
RGB
LVDS
Pineview FCBGA 559
DMI
Memory BUS(DDRII)
1.8V DDRII 667
22x22mm
page 4,5,6
Clock Generator CK505
page 8
DDRII-SO-DIMM
page 7
X2 mode GEN1
2 2
PCI-Express
Tigerpoint
USB HDA
PCBGA360
MINI Card x1 3G
page 15
To I/O Board WLAN
page 20
To I/O Board 10/100 Ethernet
AR8132L
page 20
17x17mm
page 11,12,13,14
SATA
HDD
page 16
USB Port X2
page 20
BlueTooth
page 15
CMOS CAM
page 9
3G
page 15
LPC BUS
Transfermer
3 3
Conn. to I/O Board
USB Port x1 To I/O Board Conn.
page 20
Aralia Codec
Power ON/OFF
page 18
DC IN
page 23
DC/DC Interface
3VALW/5VALW
page 25
page 26
I/O Board
RJ45
ENE KBC KB926
page 17
SPI
ALC272
0.89VP/1.5VP
BATT IN
CHARGER
4 4
page 24
page 25
0.9VSP/2.5VSP
page 28
1.8V/VCCP
page 27
Int.KBD
page 19
Touch Pad
page19
SPI ROM
page 17
AMP & INT Speaker
I/O Board
page 20
INT MIC HeadPhone &
MIC Jack
To I/O board Card Reader ENE6252
page 20
SD/MMC/MS CONN
A
CPU_CORE
page 29
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc. SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793 D
401793 D
401793 D
232Friday, May 21, 2010
232Friday, May 21, 2010
232Friday, May 21, 2010
of
of
E
of
A
B
C
D
E
1 1
Voltage Rails
S3S1 VIN B+ +CPU_CORE
+VCCP +1.5VS +1.8V
+0.89V Graphic core power rail
+3VALW +3VS +5VALW
2 2
+5VS +VSB VSB always on power rail ON +RTCVCC
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
DescriptionPower Plane Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU
0.9V switched power rail for DDR terminator+0.9VS VCCP switched power rail
1.5V switched power rail
1.8V power rail for DDR
3.3V always on power rail
3.3V switched power rail 5V always on power rail 5V switched power rail
RTC power
SIGNAL
SLP_S3#
SLP_S4#
HIGH HIGH HIGH
HIGH
LOW
LOW LOW
LOWLOW
SLP_S5#
HIGHHIGHHIGH
HIGH
HIGH
LOW
+VALW
ON
ON
ON
ON
ON
N/A N/A N/A
ON ON OFF ON ON ON
ON ON
+V +VS Clock
ON
ON
ON
OFF
OFF
S5 N/AN/AN/A
OFFON
OFF
OFFON
OFF OFFOFFON OFFOFFON
ON
OFF OFF ON ON* OFF
OFF ON ON* OFF
OFFON
ON*
ON
ON
ON
OFF
OFF
OFF
ONON
LOW
OFF
OFF
OFF
External PCI Devices
DEVICE REQ/GNT #
IDSEL #
No PCI Device
EC SM Bus1 address
Device
Smart Battery
Address
EC SM Bus2 address
Device
EMC1402
PIRQ
Address
100_11000001 011X b
3 3
BOARD ID Table(Page 17)
VCC Ra
ID
0 1
NAV50
2 3
5
NAV60
6 7
4 4
A
3.3V 100K
BRD ID
R01 (EVT) R02 (DVT) R03 (PVT) R10A (MP) R01 (EVT)4 R02 (DVT) R03 (PVT) R10A (MP)
Rb Vab-Typ
Vab-Min
0
8.2K
0.216V
18K
0.436V
33K
1.036V
56K
1.453V 1.759V
100K
1.935V 2.341V
200K
2.500V
NC
0V
0V
0.250V
0.503V
0.819V
1.185V
1.650V
2.200V
3.3V
Vab-Max
0V
0.289V
0.538V
0.875V0.712V
1.264V
3.3V
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
ICH7M SM Bus address
Device
Clock Generator (SLG8SP556VTR)
DDR DIMMA
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
C
Address
1101 001Xb
1010 000Xb
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc. SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
332Friday, May 21, 2010
332Friday, May 21, 2010
332Friday, May 21, 2010
of
of
E
of
D
D
D
5
PINEVIEW_M
U71A
U71A
DMI_RX0_R DMI_RX#0_R DMI_RX1_R DMI_RX#1_R
D D
CLK_CPU_EXP#(8) CLK_CPU_EXP(8)
C435
C435
DMI_RX0(13)
DMI_RX#0(13)
C C
DMI_RX1(13)
DMI_RX#1(13)
C436
C436
C437
C437
C438
C438
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
1 2
0.1U_0402_10V7K
0.1U_0402_10V7K
F3 F2 H4
G3
N7 N6
R10
R9
N10
N9
K2
J1
M4
L3
DMI_RX0_R
DMI_RX#0_R
DMI_RX1_R
DMI_RX#1_R
DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1
EXP_CLKINN EXP_CLKINP
EXP_TCLKINN EXP_TCLKINP RSVD RSVD
RSVD RSVD RSVD RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
PINEVIEW_M
+VCCP
REV = 1.1
REV = 1.1
DMI
DMI
Close to CPU
B B
FAN1 Conn
Modify follow KAV60 schematic 06/12
+5VS
+VCC_FAN1
EN_FAN1(17)
A A
1 2
R47 330_0402_5%R47 330_0402_5%
FAN_SPEED1(17)
5
1 2 3 4
1
C1151
C1151
0.01U_0402_16V7K
0.01U_0402_16V7K
2
U12
U12
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
+3VS
C312 2.2U_0603_10V6KC312 2.2U_0603_10V6K
1 2
EN VIN VOUT VSET
12
1
2
8
GND
7
GND
6
GND
5
GND
R256
R256 10K_0402_5%
10K_0402_5%
C311
C311 100P_0402_50V8J
100P_0402_50V8J
40mil
+VCC_FAN1
+5VS
3
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
1 OF 6
1 OF 6
H_PWRGD(5,13)
SLPIOVR#(13)
PLTRST#(5,13,15,17,20)
2
D19
@D19
@
DAN217_SC59
DAN217_SC59
1
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
C313
C313
1 2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K C1150
C1150
1000P_0402_50V7K
1000P_0402_50V7K
1 2
1 2 3
ACES_85204-03001
ACES_85204-03001
4
RSVD_TP RSVD_TP
RSVD RSVD RSVD RSVD
XDP_PREQ#(5) XDP_PRDY#(5)
XDP_BPM#3(5) XDP_BPM#2(5)
XDP_BPM#1(5) XDP_BPM#0(5)
XDP_TDO(5)
XDP_TRST#(5)
XDP_TCK(5)
C314
C314
JP12
JP12
1 2 3
CONN@
CONN@
4
R354 1K_0402_5%@R354 1K_0402_5%@
PLTRST#
XDP_TDI(5) XDP_TMS(5)
G1 G2
G2 G1 H3 J2
L10 L9 L8
N11 P11
K3 L2 M2 N2
1 2
R347 1K_0402_5%@R347 1K_0402_5%@
1 2 CPU_ITP(8) CPU_ITP#(8)
R348
R348
1 2
@
@
4 5
3
DDR_A_DQS#[0..7](7)
DDR_A_D[0..63](7) DDR_A_DM[0..7](7)
DMI_TX0 (13) DMI_TX#0 (13) DMI_TX1 (13) DMI_TX#1 (13)
R162
R162
49.9_0402_1%
49.9_0402_1%
R203
R203
750_0402_1%
750_0402_1%
T38T38
Must be placed within 500 mils from Pineview-M pins
T39T39
JP16
JP16
CONN@
XDP_PREQ# XDP_PRDY#
XDP_BPM#3 XDP_BPM#2
XDP_BPM#1 XDP_BPM#0
1K_0402_1%
1K_0402_1%
XDP_TDO XDP_TRST# XDP_TDI XDP_TMS
XDP_TCK
ACES_87151-24051
ACES_87151-24051
CONN@
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
G1
26
G2
XDP Reserve
XDP_TDI XDP_TMS XDP_TDO XDP_PREQ#
XDP_TRST# XDP_TCK
R341 51 +-1% 0402R341 51 +-1% 0402
1 2
R342 51 +-1% 0402R342 51 +-1% 0402
1 2
R343 51 +-1% 0402R343 51 +-1% 0402
1 2
R344 51 +-1% 0402R344 51 +-1% 0402
1 2
R345 51 +-1% 0402R345 51 +-1% 0402
1 2
R346 51 +-1% 0402R346 51 +-1% 0402
1 2
Modify D38 D39 D40 Pin define 08/13
XDP_PREQ#
XDP_TDO
XDP_TRST#
XDP_TDI
3
1
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DDR_A_DQS[0..7](7)
DDR_A_MA[0..14](7)
+VCCP
XDP_TMS XDP_TCK
2
3
D39
D39
2
D40
D40
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
3
2
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_WE#(7) DDR_A_CAS#(7) DDR_A_RAS#(7)
DDR_A_BS0(7) DDR_A_BS1(7) DDR_A_BS2(7)
DDR_CS#0(7) DDR_CS#1(7)
DDR_CKE0(7) DDR_CKE1(7)
M_ODT0(7) M_ODT1(7)
M_CLK_DDR0(7) M_CLK_DDR#0(7) M_CLK_DDR1(7) M_CLK_DDR#1(7)
+1.8V +1.8V
12
R50
R50
1K_0402_1%
1K_0402_1%
12
R142
R142
1K_0402_1%
1K_0402_1%
2
3
D38
D38
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
Add 2009-6-17
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
DDR_A_WE# DDR_A_CAS# DDR_A_RAS#
DDR_A_BS0 DDR_A_BS1 DDR_A_BS2
DDR_CS#0 DDR_CS#1
DDR_CKE0 DDR_CKE1
M_ODT0 M_ODT1
M_CLK_DDR0 M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1
+1.8V
R243
R243 R242
R242
Deciphered Date
Deciphered Date
Deciphered Date
80.6_0402_1%
80.6_0402_1%
80.6_0402_1%
80.6_0402_1%
R369
R369 10K_0402_5%
10K_0402_5%
R370
R370 10K_0402_5%
10K_0402_5%
@
@
T40T40 T41T41
2
AH19
AJ18 AK18 AK16
AJ14 AH14 AK14
AJ12 AH13 AK12 AK20 AH12
AJ11
AJ24
AJ10
AK22
AJ22 AK21
AJ20 AH20 AK11
AH22 AK25
AJ21
AJ25 AH10
AH9
AK10
AK24 AH26 AH24 AK27
AG15 AF15 AD13 AC13
AC15 AD15 AF13 AG13
AD17 AC17 AB15 AB17
AB4 AK8
AB11 AB13
AL28 AK28
AJ26 AK29
AJ8
U71B
U71B
DDR_A_MA_0 DDR_A_MA_1 DDR_A_MA_2 DDR_A_MA_3 DDR_A_MA_4 DDR_A_MA_5 DDR_A_MA_6 DDR_A_MA_7 DDR_A_MA_8 DDR_A_MA_9 DDR_A_MA_10 DDR_A_MA_11 DDR_A_MA_12 DDR_A_MA_13 DDR_A_MA_14
DDR_A_WE# DDR_A_CAS# DDR_A_RAS#
DDR_A_BS_0 DDR_A_BS_1 DDR_A_BS_2
DDR_A_CS#_0 DDR_A_CS#_1 DDR_A_CS#_2 DDR_A_CS#_3
DDR_A_CKE_0 DDR_A_CKE_1 DDR_A_CKE_2 DDR_A_CKE_3
DDR_A_ODT_0 DDR_A_ODT_1 DDR_A_ODT_2 DDR_A_ODT_3
DDR_A_CK_0 DDR_A_CK_0# DDR_A_CK_1 DDR_A_CK_1#
DDR_A_CK_3 DDR_A_CK_3# DDR_A_CK_4 DDR_A_CK_4#
RSVD RSVD RSVD RSVD
RSVD RSVD
RSVD_TP RSVD_TP
DDR_VREF DDR_RPD DDR_RPU
RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
1
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0 DDR_A_DQ_0
DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1 DDR_A_DQ_8
DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2 DDR_A_DQ_16
DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3 DDR_A_DQ_24
DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4 DDR_A_DQ_32
DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5 DDR_A_DQ_40
DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A
DDR_A
2 OF 6
2 OF 6
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_A_DM_6 DDR_A_DQ_48
DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7 DDR_A_DQ_56
DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
1
AD3 AD2 AD4
AC4 AC1 AF4 AG2 AB2 AB3 AE2 AE3
AB8 AD7 AA9
AB6 AB7 AE5 AG5 AA5 AB5 AB9 AD6
AD8 AD10 AE8
AG8 AG7 AF10 AG11 AF7 AF8 AD11 AE10
AK5 AK3 AJ3
AH1 AJ2 AK6 AJ7 AF3 AH2 AL5 AJ6
AG22 AG21 AD19
AE19 AG19 AF22 AD22 AG17 AF19 AE21 AD21
AE26 AG27 AJ27
AE24 AG25 AD25 AD24 AC22 AG24 AD27 AE27
AE30 AF29 AF30
AG31 AG30 AD30 AD29 AJ30 AJ29 AE29 AD28
AB27 AA27 AB26
AA24 AB25 W24 W22 AB24 AB23 AA23 W27
DDR_A_DQS0 DDR_A_DQS#0 DDR_A_DM0
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7
DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DM1
DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15
DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DM2
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23
DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DM3
DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31
DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DM4
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39
DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DM5
DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47
DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DM6
DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55
DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DM7
DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
432Friday, May 21, 2010
432Friday, May 21, 2010
432Friday, May 21, 2010
D
D
D
of
of
of
5
4
3
2
1
Add 470PF on H_SMI# for known issue 07/08
PINEVIEW_M
U71C
D12
XDP_RSVD_00
A7
XDP_RSVD_01
D6
XDP_RSVD_02
C5
XDP_RSVD_03
C7
XDP_RSVD_04
C6
XDP_RSVD_05
D8
XDP_RSVD_06
B7
XDP_RSVD_07
A9
XDP_RSVD_08
D9
XDP_RSVD_09
C8
XDP_RSVD_10
B8
XDP_RSVD_11
C10
XDP_RSVD_12
D10
XDP_RSVD_13
B11
XDP_RSVD_14
B10
XDP_RSVD_15
B12
XDP_RSVD_16
C11
XDP_RSVD_17
L11
RSVD
AA7
RSVD_TP
AA6
RSVD_TP
R5
RSVD_TP
R6
RSVD_TP
AA21
RSVD_TP
W21
RSVD_TP
T21
RSVD_TP
V21
RSVD_TP
H_THERMDA
H_THERMDC
5
U71C
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
T2T2 T12T12 T3T3 T4T4
D D
C C
B B
A A
T13T13 T5T5 T6T6
R1378
R1378
T7T7 T14T14
1 2
1K_0402_5%
1K_0402_5%
H_THERMDA, H_THERMDC routing together. Trace width / Spacing = 10 / 10 mil
C79
C79
1 2
T8T8 T15T15 T9T9 T16T16 T10T10 T17T17 T11T11 T28T28
T37T37
T18T18 T19T19 T20T20 T21T21
T22T22 T23T23 T24T24 T25T25
+3VS
1
C80
C80
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2200P_0402_50V7K
2200P_0402_50V7K
PINEVIEW_M
REV = 1.1
REV = 1.1
VGA
VGA
MISC
MISC
CRT_HSYNC CRT_VSYNC
CRT_GREEN
CRT_DDC_DATA
CRT_DDC_CLK
REFCLKINP
REFCLKINN REFSSCLKINP REFSSCLKINN
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
HPL_CLKINN
HPL_CLKINP
3 OF 6
3 OF 6
CRT_RED
CRT_BLUE
CRT_IRTN
DAC_IREF
PWROK
RSTIN#
M30 M29
N31 P30 P29 N30
L31 L30
P28 Y30
Y29 AA30 AA31
K29 J30 L5 AA3
W8 W9
CPU THERMAL SENSOR
U2
U2
GND
8 7 6 5
EC_SMB_CK2 EC_SMB_DA2
10K_0402_5%
10K_0402_5%
R58
R58
1
VDD
2
DP
3
DN
4
THERM#
EMC1402-1-ACZL-TR MSOP 8P SENSOR
EMC1402-1-ACZL-TR MSOP 8P SENSOR
Address:100_1100
SMCLK
SMDATA
ALERT#
GMCH_CRT_HSYNC (10) GMCH_CRT_VSYNC (10)
GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B
CPU_DREFCLK CPU_DREFCLK# CPU_SSCDREFCLK CPU_SSCDREFCLK#
PM_EXTTS#1 PM_EXTTS#0 H_PWROK PLTRST#
CLK_CPU_HPLCLK# CLK_CPU_HPLCLK
GMCH_CRT_R (10) GMCH_CRT_G (10) GMCH_CRT_B (10)
GMCH_CRT_DATA (10) GMCH_CRT_CLK (10)
R201 665_0402_1%R201 665_0402_1%
0_0402_5%
0_0402_5%
R200
R200
PM_EXTTS#0 (7) PLTRST# (4,13,15,17,20)
CPU_DREFCLK (8) CPU_DREFCLK# (8) CPU_SSCDREFCLK (8) CPU_SSCDREFCLK# (8)
PM_DPRSLPVR (13)
CLK_CPU_HPLCLK# (8) CLK_CPU_HPLCLK (8)
Modify 08/04
@
@
R305
H_PWROK
R305
1 2
0_0402_5%
0_0402_5% R306
R306
1 2
0_0402_5%
0_0402_5%
Place closed to chipset
R307
R307
1 2
150_0402_1%
150_0402_1% R308
R308
1 2
150_0402_1%
150_0402_1% R309
R309
1 2
150_0402_1%
150_0402_1% R34
R34
100K_0402_5%
100K_0402_5%
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
12
4
GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B GMCH_ENBKL
EC_SMB_CK2 (17) EC_SMB_DA2 (17)
+3VS
LVDS_ACLK#(9)
LVDS_ACLK(9) LVDS_A0#(9) LVDS_A0(9) LVDS_A1#(9) LVDS_A1(9) LVDS_A2#(9) LVDS_A2(9)
GMCH_ENBKL(17) INVT_PWM(9,17)
Add INVT_PWM 05/11
LVDS_SCL(9) LVDS_SDA(9)
GMCH_ENVDD(9)
Del R323 05/11
VGATE (8,13,17,29)
PCH_POK (13,17)
XDP_TDI(4) XDP_TDO(4) XDP_TCK(4) XDP_TMS(4) XDP_TRST#(4)
XDP_TCK
T58T58
XDP_TDI
T59T59
XDP_TDO
T60T60
XDP_TMS
T61T61
XDP_TRST#
T62T62
H_PWRGD
T63T63
PM_EXTTS#0
Close to Processor pin
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
3
R151
R151
2.37K_0402_1%
2.37K_0402_1%
GMCH_ENBKL
0_0402_5%
0_0402_5%
R213
R213
XDP_BPM#0(4) XDP_BPM#1(4) XDP_BPM#2(4) XDP_BPM#3(4)
H_THERMDA H_THERMDC
+3VS
12
R143
R143 10K_0402_5%
10K_0402_5%
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
U71D
U71D
U25
LA_CLKN
U26
LA_CLKP
R23
LA_DATAN_0
R24
LA_DATAP_0
N26
LA_DATAN_1
N27
LA_DATAP_1
R26
LA_DATAN_2
R27
LA_DATAP_2
R22
LIBG
J28
LVBG
N22
LVREFH
N23
LVREFL
L27
LBKLT_EN
L26
LBKLT_CTL
L23
@
@
T48T48 T49T49 T50T50 T51T51
T55T55
XDP_TDI XDP_TDO
XDP_TCK
XDP_TMS XDP_TRST#
LCTLA_CLK
K25
LCTLB_DATA
K23
LDDC_CLK
K24
LDDC_DATA
H26
LVDD_EN
G11
BPM_1_0#
E15
BPM_1_1#
G13
BPM_1_2#
F13
BPM_1_3#
B18
BPM_2_0#/RSVD
B20
BPM_2_1#/RSVD
C20
BPM_2_2#/RSVD
B21
BPM_2_3#/RSVD
G5
RSVD
D14
TDI
D13
TDO
B14
TCK
C14
TMS
C16
TRST#
D30
THRMDA_1
E30
THRMDC_1
C30
THRMDA_2/RSVD
D31
THRMDC_2/RSVD
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
H_PROCHOT#
+VCCP
Close to Processor pin
R202
R202 68_0402_5%
68_0402_5%
2
PINEVIEW_M
PINEVIEW_M
REV = 1.1
REV = 1.1
ICH
ICH
LVDS
LVDS
CPUPWRGOOD
CPU
CPU
4 OF 6
4 OF 6
H_GTLREF
1
C939
2
@ C939
@
1U_0603_10V6K
1U_0603_10V6K
placed within 0.5" of processor pin.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
SMI# A20M# FERR#
LINT0 LINT1
IGNNE#
STPCLK#
DPRSTP#
DPSLP#
INIT# PRDY# PREQ#
THERMTRIP#
PROCHOT#
GTLREF
VSS
RSVD RSVD
BCLKN BCLKP
BSEL_0 BSEL_1 BSEL_2
VID_0 VID_1 VID_2 VID_3 VID_4 VID_5 VID_6
RSVD RSVD RSVD RSVD
RSVD_TP RSVD_TP
EXTBGREF
+VCCP
R144
R144 1K_0402_1%
1K_0402_1%
R155
R155 2K_0402_1%
2K_0402_1%
C1171
C1171
1 2
470P_0402_50V7K
470P_0402_50V7K
H_SMI#
E7 H7 H6 F10 F11 E5 F8
G6 G10 G8 E11 F15
E13
C18 W1
A13 H27
L6 E17
H10 J10
K5 H5 K6
H30 H29 H28 G30 G29 F29 E29
L7 D20 H13 D18
K9 D19 K7
H_A20M# H_FERR# H_INTR H_NMI H_IGNNE# H_STPCLK#
H_DPRSTP# H_DPSLP#
H_INIT# XDP_PRDY# XDP_PREQ#
H_THERMTRIP#
H_PROCHOT#
H_PWRGD
H_GTLREF
CLK_CPU_BCLK#
CLK_CPU_BCLK
CPU_BSEL0 CPU_BSEL1 CPU_BSEL2
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5
CPU_VID6
T26T26 T27T27
H_EXTBGREF
H_SMI# (12) H_A20M# (12) H_FERR# (12) H_INTR (12) H_NMI (12) H_IGNNE# (12) H_STPCLK# (12)
H_DPRSTP# (13) H_DPSLP# (13)
H_INIT# (12) XDP_PRDY# (4) XDP_PREQ# (4)
H_THERMTRIP# (12)
H_PWRGD (4,13)
CPU_BSEL0 (8) CPU_BSEL1 (8) CPU_BSEL2 (8)
CPU_VID0 (29) CPU_VID1 (29) CPU_VID2 (29) CPU_VID3 (29) CPU_VID4 (29) CPU_VID5 (29) CPU_VID6 (29)
H_EXTBGREF
C940
@ C940
@
1U_0603_10V6K
1U_0603_10V6K
CLK_CPU_BCLK# (8) CLK_CPU_BCLK (8)
+VCCP
R244
R244 976_0402_1%
976_0402_1%
1
R156
R156
3.3K_0402_1%
3.3K_0402_1%
2
placed within 0.5" of processor pin.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc. SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
532Friday, May 21, 2010
532Friday, May 21, 2010
532Friday, May 21, 2010
of
of
1
of
D
D
D
5
GFX supply current: 1.38A Sustained GFX supply current: 1.05A
D D
+0.89V
W14 W16 W18 W19
U71E
U71E
T13
VCCGFX
T14
VCCGFX
T16
VCCGFX
T18
VCCGFX
T19
VCCGFX
V13
VCCGFX
V19
VCCGFX VCCGFX VCCGFX VCCGFX VCCGFX
PINEVIEW_M
PINEVIEW_M
GFX/MCH
GFX/MCH
REV = 1.1
REV = 1.1
DDR supply current 2.27A
+1.8V
2.2U_0603_10V6K
2.2U_0603_10V6K
+1.8V
C C
1
+VCCP
C267
C267
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
Display PLL SFR and CRT DAC supply current: 0.154A
B B
+1.8VS
R321
R321
0_0603_5%
0_0603_5%
+VCCP
DAC, GIO, LVDS, & LGIO, DPLL, HMPLL supply current: 0.33A
A A
2.2U_0603_10V6K
2.2U_0603_10V6K
Modify to 2.2U 05/11
2.2U_0603_10V6K
2.2U_0603_10V6K
2
2
C188
C188
C187
C187
1
1
2.2U_0603_10V6K
2.2U_0603_10V6K
2
2
C186
C186
1
1
2.2U_0603_10V6K
2.2U_0603_10V6K
AK13 AK19
C85
C85
DDR analog supply current: 1.32A
C55
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
12
C192
C192
1U_0603_10V6K
1U_0603_10V6K
+3VS
GIO supply current: 0.006A
+RING_EAST +RING_WEST
+0.89V
2
1
C74
C74
C81
C81
1
2
2
2
1U_0603_10V6K
1U_0603_10V6K
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
C189
C189
2
2
+VCC_CRT_DAC
1U_0603_10V6K
1U_0603_10V6K
1
1
C70
C70
C71
C71
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
AA10 AA11
AA19
AC31
1
1
C76
C76
C75
C75
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
C236
C236
C243
C243
C55
Close Chipset pin
5
AL11 AL16 AL21 AL25
W10 W11
AK9
AK7 AL7
U10
U5 U6 U7 U8 U9
V2 V3 V4
V11
T30
T31 J31
C3
B2
C2
A21
1
C78
C78
2
1U_0402_6.3V6K
1U_0402_6.3V6K
VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM VCCSM
VCCCK_DDR VCCCK_DDR
VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR VCCA_DDR
VCCACK_DDR VCCACK_DDR
VCCD_AB_DPL
VCCD_HMPLL
VCCSFR_AB_DPL
VCCACRTDAC
VCC_GIO VCCRING_EAST VCCRING_WEST VCCRING_WEST VCCRING_WEST VCC_LGI
5 OF 6
5 OF 6
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
1
C77
C77
2
1U_0402_6.3V6K
1U_0402_6.3V6K
DDR
DDR
EXP\CRT\PLL
EXP\CRT\PLL
POWER
POWER
DMI
DMI
VCCSENSE
VSSSENSE
4
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
CPU
CPU
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCSENSE
VSSSENSE
VCCA
VCCP VCCP
VCCP
VCCALVDS
VCCDLVDS
LVDS
LVDS
VCCA_DMI VCCA_DMI VCCA_DMI
RSVD
VCCSFR_DMIHMPLL
VCCP
R32
R32
1 2
100_0402_1%
100_0402_1% R31
R31
1 2
100_0402_1%
100_0402_1%
4
1U_0402_6.3V6K
A23 A25 A27 B23 B24 B25 B26 B27 C24 C26 D23 D24 D26 D28 E22 E24 E27 F21 F22 F25 G19 G21 G24 H17 H19 H22 H24 J17 J19 J21 J22 K15 K17 K21 L14 L16 L19 L21 N14 N16 N19 N21
C29 B29 Y2
D4 B4
B3
V30 W31
T1 T2 T3
P2 AA1
E2
1U_0402_6.3V6K
VCCSENSE VSSSENSE
+VCCP
Processor Core analog supply current: 0.08A
+VCC_ALVD +VCC_DLVD
LVDS supply current: 0.06A
+VCC_DMI
+DMI_HMPLL
1
C1162
C1162
0.1U_0402_10V6K
0.1U_0402_10V6K
2
+CPU_CORE
1U_0402_6.3V6K
1U_0402_6.3V6K
1
1
1
C428
C428
2
1U_0402_6.3V6K
1U_0402_6.3V6K
C430
C430
C429
C429
2
2
PLACE IN CAVITY
VCCSENSE (29) VSSSENSE (29)
+1.5VS
1
C391
C391
0.01U_0402_16V7K
0.01U_0402_16V7K
2
DMI analog supply current: 0.48A
T56T56
SFR & DMIHMPLL supply current: 0.104A
+VCCP
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
1
1
C431
C431
2
2
1U_0402_6.3V6K
1U_0402_6.3V6K
3
+CPU_CORE
1
C1154
C1154
1
C1152
C1152
C1153
C1153 22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
2
2
22UF 6.3V M X5R 0805
22UF 6.3V M X5R 0805
+VCCP
0.1U_0402_10V6K
0.1U_0402_10V6K
+1.8VS
100NH +-5% LL1608-FSLR10J
100NH +-5% LL1608-FSLR10J
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
+CPU_CORE
2 x 330uF(9mohm/2)
1
+
+
C275
C275
330U 2.5V Y
330U 2.5V Y
2
1
1
C1160
C1160
2
2
R20
R20
1 2
0_0603_5%
0_0603_5%
R21
R21
1 2
0_0603_5%
0_0603_5%
1U_0603_10V6K
1U_0603_10V6K
R28
R28
1 2
0_0805_5%
0_0805_5%
R25
R25
1 2
MBK1608601YZF_2P
MBK1608601YZF_2P
R18
R18
1 2
0_0603_5%
0_0603_5%
R26
R26
1 2
22UF 6.3V M X5R 0805 H1.25
22UF 6.3V M X5R 0805 H1.25
R27
R27
1 2
0_0603_5%
0_0603_5%
1
2
1
C64
C64
2
1
C68
C68
1U_0603_10V6K
1U_0603_10V6K
2
+VCC_CRT_DAC
1
C239
C239 1U_0603_10V6K
1U_0603_10V6K
2
1
C69
C69 1U_0603_10V6K
1U_0603_10V6K
2
1
C56
C56
2
1
C235
C235 1U_0603_10V6K
1U_0603_10V6K
2
Deciphered Date
Deciphered Date
Deciphered Date
C1161
C1161
0.1U_0402_10V6K
0.1U_0402_10V6K
Close U71.D4
C242
C242 1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
1U_0603_10V6K
+DMI_HMPLL
+VCC_ALVD
1
2
+VCC_DLVD
2
A11
VSS
A16
VSS
A19
VSS
A29
RSVD_NCTF
AA13 AA14 AA16 AA18
AA2 AA22 AA25 AA26 AA29
AA8 AB19 AB21 AB28 AB29 AB30 AC10 AC11 AC19
AC2 AC21 AC28 AC30 AD26
AD5
AE1 AE11 AE13 AE15 AE17 AE22 AE31 AF11 AF17 AF21 AF24 AF28 AG10
AG3 AH18 AH23 AH28
AH4
AH6
AH8
AJ16 AJ31
AK1
AK2 AK23 AK30 AK31
AL13 AL19
AL23 AL29
AL30
C12
C21
C22
C25
C31
D22
A3
A30
A4
AJ1
AL2
AL3 AL9
B13 B16 B19 B22 B30 B31
B5 B9
C1
E1 E10 E19 E21 E25
E8 F17 F19
RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS RSVD_NCTF RSVD_NCTF RSVD_NCTF VSS VSS VSS VSS VSS RSVD_NCTF RSVD_NCTF VSS VSS RSVD_NCTF VSS VSS VSS VSS RSVD_NCTF VSS RSVD_NCTF VSS VSS VSS VSS VSS VSS VSS
1
+
+
C278
C278 330U 2.5V Y
330U 2.5V Y
2
+RING_EAST
+RING_WEST
1
C241
C241 1U_0603_10V6K
1U_0603_10V6K
2
+VCC_DMI
1
C237
C237
2
C1155
C1155 1U_0603_10V6K
1U_0603_10V6K
Follow Intel check list change to 22uF 06/06
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
1
PINEVIEW_M
PINEVIEW_M
U71F
U71F
REV = 1.1
REV = 1.1
GND
GND
6 OF 6
6 OF 6
PINEVIEW-M_FCBGA8559
PINEVIEW-M_FCBGA8559
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
F24 F28 F4 G15 G17 G22 G27 G31 H11 H15 H2 H21 H25 H8 J11 J13 J15 J4 K11 K13 K19 K26 K27 K28 K30 K4 K8 L1 L13 L18 L22 L24 L25 L29 M28 M3 N1 N13 N18 N24 N25 N28 N4 N5 N8 P13 P14 P16 P18 P19 P21 P3 P4 R25 R7 R8 T11 U22 U23 U24 U27 V14 V16 V18 V28 V29 W13 W2 W23 W25 W26 W28 W30 W4 W5 W6 W7 Y28 Y3 Y4
T29
632Friday, May 21, 2010
632Friday, May 21, 2010
632Friday, May 21, 2010
1
D
D
D
of
of
of
5
DDR_A_DQS#[0..7](4)
DDR_A_D[0..63](4)
DDR_A_DM[0..7](4)
DDR_A_DQS[0..7](4)
DDR_A_MA[0..14](4)
D D
+1.8V
2
2
C129
C129
C110
C128
C128
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
+
+
@
@
C94
C94
C106
C106
2
220U_B2_2.5VM_R35
220U_B2_2.5VM_R35
C C
+0.9VS
1
1
C86
C86
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP6
RP6
1 8 2 7 3 6 4 5
RP2
RP2
1 8 2 7 3 6 4 5
RP3
RP3
1 8 2 7 3 6 4 5
C121
C121
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+0.9VS
1
C117
C117
C119
C119
2
B B
A A
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA13 M_ODT0 DDR_CS#0 DDR_A_RAS#
DDR_A_BS0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3
M_ODT1 DDR_CS#1 DDR_A_CAS# DDR_A_WE#
0.1U_0402_16V4Z
0.1U_0402_16V4Z
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
47_0804_8P4R_5%
C110
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
1
C105
C105
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS
1
1
C87
C87
C88
C88
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RP5
RP5
47_0804_8P4R_5%
47_0804_8P4R_5%
RP4
RP4
47_0804_8P4R_5%
47_0804_8P4R_5%
RP1
RP1
47_0804_8P4R_5%
47_0804_8P4R_5%
2
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
C108
C108
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C122
C122
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_BS1
18 27 36 45
18 27 36
DDR_A_MA14
45
DDR_A_MA5
18
DDR_A_MA8
27
DDR_A_MA9
36
DDR_A_MA12
45
2
C109
C109
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C107
C107
2
1
C115
C115
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
DDR_A_MA0 DDR_A_MA2
DDR_A_MA4
DDR_A_MA6 DDR_A_MA7 DDR_A_MA11
C130
C130
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C91
C91
2
1
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C90
C90
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place near JDIM1
1
C120
C120
2
4
C118
C118
1
1
C89
C89
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Layout Note: Place these resistor closely DIMMA,all trace length<750 mil
C439
C439
3
09/03
+DIMM_VREF
+1.8V
12
R61
R61
1K_0402_1%
1K_0402_1%
+DIMM_VREF
12
R62
R62
1K_0402_1%
1K_0402_1%
1
1
C440
C440
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
C441
C441
1
1
C442
C442
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Share +DIMM_VREF for
1.DDRII VREF
2.GMCH SM_VREF_0 SM_VREF_1
1
1
C445
C445
C444
C444
C443
C443
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
+3VS
C116
C116
1
2
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
1
C446
C446
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C141
C141
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
20mils
C111
C111
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C112
C112
2.2U 6.3V M X5R 0402
2.2U 6.3V M X5R 0402
2
DDR_CKE0(4)
DDR_A_BS2(4)
DDR_A_BS0(4) DDR_A_WE#(4)
DDR_A_CAS#(4)
DDR_CS#1(4)
M_ODT1(4)
CLK_SMBDATA(8,15)
CLK_SMBCLK(8,15)
Follow Intel Layout checklist, add C141 05/12
DDR_A_D0 DDR_A_D1
DDR_A_DQS#0 DDR_A_DQS0
DDR_A_D2 DDR_A_D3
DDR_A_D8 DDR_A_D9
DDR_A_DQS#1 DDR_A_DQS1
DDR_A_D10 DDR_A_D11
DDR_A_D16 DDR_A_D17
DDR_A_DQS#2 DDR_A_DQS2
DDR_A_D18 DDR_A_D19
DDR_A_D24 DDR_A_D25
DDR_A_DM3
DDR_A_D26 DDR_A_D27
DDR_CKE0
DDR_A_BS2 DDR_A_MA12
DDR_A_MA9 DDR_A_MA8
DDR_A_MA5 DDR_A_MA3 DDR_A_MA1
DDR_A_MA10 DDR_A_BS0 DDR_A_WE#
DDR_A_CAS# DDR_CS#1
M_ODT1 DDR_A_D32
DDR_A_D33 DDR_A_DQS#4
DDR_A_DQS4 DDR_A_D34
DDR_A_D35 DDR_A_D40
DDR_A_D41 DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49
DDR_A_DQS#6 DDR_A_DQS6
DDR_A_D50 DDR_A_D51
DDR_A_D56 DDR_A_D57
DDR_A_DM7 DDR_A_D58
DDR_A_D59 CLK_SMBDATA
CLK_SMBCLK
2
+1.8V +1.8V
JDIM1
JDIM1
1
VREF
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DQS0#
13
DQS0
15
VSS
17
DQ2
19
DQ3
21
VSS
23
DQ8
25
DQ9
27
VSS
29
DQS1#
31
DQS1
33
VSS
35
DQ10
37
DQ11
39
VSS
41
VSS
43
DQ16
45
DQ17
47
VSS
49
DQS2#
51
DQS2
53
VSS
55
DQ18
57
DQ19
59
VSS
61
DQ24
63
DQ25
65
VSS
67
DM3
69
NC
71
VSS
73
DQ26
75
DQ27
77
VSS
79
CKE0
81
VDD
83
NC
85
BA2
87
VDD
89
A12
91
A9
93
A8
95
VDD
97
A5
99
A3
101
A1
103
VDD
105
A10/AP
107
BA0
109
WE#
111
VDD
113
CAS#
115
NC/S1#
117
VDD
119
NC/ODT1
121
VSS
123
DQ32
125
DQ33
127
VSS
129
DQS4#
131
DQS4
133
VSS
135
DQ34
137
DQ35
139
VSS
141
DQ40
143
DQ41
145
VSS
147
DM5
149
VSS
151
DQ42
153
DQ43
155
VSS
157
DQ48
159
DQ49
161
VSS
163
NC,TEST
165
VSS
167
DQS6#
169
DQS6
171
VSS
173
DQ50
175
DQ51
177
VSS
179
DQ56
181
DQ57
183
VSS
185
DM7
187
VSS
189
DQ58
191
DQ59
193
VSS
195
SDA
197
SCL
199
VDDSPD
201
G1
FOX_AS0A426-N4RN-7F
FOX_AS0A426-N4RN-7F
CONN@
CONN@
VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
VSS
CK0
CK0#
VSS DQ14 DQ15
VSS
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
NC/CKE1
VDD
NC/A15 NC/A14
VDD
VDD
VDD
BA1
RAS#
VDD ODT0
NC/A13
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
CK1
CK1#
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
SA0
SA1
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
42 44 46 48 50
NC
52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90
A11
92
A7
94
A6
96 98
A4
100
A2
102
A0
104 106 108 110
S0#
112 114 116 118 120
NC
122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200
202
G2
DIMMA
1
Change to SP07F001720 04/30
DDR_A_D4 DDR_A_D5
DDR_A_DM0 DDR_A_D6
DDR_A_D7 DDR_A_D12
DDR_A_D13 DDR_A_DM1 M_CLK_DDR0
M_CLK_DDR#0 DDR_A_D14
DDR_A_D15
DDR_A_D20 DDR_A_D21
DDR_A_DM2 DDR_A_D22
DDR_A_D23 DDR_A_D28
DDR_A_D29 DDR_A_DQS#3
DDR_A_DQS3 DDR_A_D30
DDR_A_D31 DDR_CKE1
DDR_A_MA14 DDR_A_MA11
DDR_A_MA7 DDR_A_MA6
DDR_A_MA4 DDR_A_MA2 DDR_A_MA0
DDR_A_BS1 DDR_A_RAS# DDR_CS#0
M_ODT0 DDR_A_MA13
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53 M_CLK_DDR1
M_CLK_DDR#1 DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D60
DDR_A_D61 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
R66 10K_0402_5%R66 10K_0402_5%
1 2
R65 10K_0402_5%R65 10K_0402_5%
1 2
R64
R64
M_CLK_DDR0 (4) M_CLK_DDR#0 (4)
1 2
DDR_CKE1 (4)
DDR_A_BS1 (4) DDR_A_RAS# (4) DDR_CS#0 (4)
M_ODT0 (4)
M_CLK_DDR1 (4) M_CLK_DDR#1 (4)
0_0402_5%
0_0402_5%
PM_EXTTS#0 (5)
DDR_CKE1 DDR_A_BS2 DDR_CKE0
R163
R163
1 2
47_0402_5%
47_0402_5% R60
R60
1 2
47_0402_5%
47_0402_5% R59
R59
1 2
47_0402_5%
47_0402_5%
Layout Note: Place these resistor closely DIMMA,all trace length Max=1.3"
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
732Friday, May 21, 2010
732Friday, May 21, 2010
732Friday, May 21, 2010
of
of
1
of
D
D
D
5
PCI
SRC
CPU
CLKSEL1
0
FSA
CLKSEL0
MHz
266
MHz
1000
MHz
MHz
33.30
14.318 96.0 48.0
DOT_96 MHz
USB MHz
FSC FSB REF
CLKSEL2
0 1000 133 33.31 14.318 96.0 48.0
0 1001 200 33.30 14.318 96.0 48.0
0 1001 166 33.31 14.318 96.0 48.0
D D
1 1000 333 33.30 14.318 96.0 48.0
1 1000 100 33.31 14.318 96.0 48.0
1 1001 400 33.30 14.318 96.0 48.0
111
+3VS
R435
R435
10K_0402_5%
10K_0402_5%
1 2
CLK_EN
13
Q31
Q31
R52
R52
FSC
R76
R76
2.2K_0402_5%
2.2K_0402_5%
FSA
1 2
R69
R69 0_0402_5%
0_0402_5%
1K_0402_1%
1K_0402_1%
1 2
1 2
R119
R119 0_0402_5%
0_0402_5%
R98
R98 10K_0402_5%
10K_0402_5%
1 2
R84
R84 0_0402_5%
0_0402_5%
2
DTC115EUA_SC70-3
DTC115EUA_SC70-3
+VCCP
12
R68
@R68
@
470_0402_5%
470_0402_5%
12
12
R73
R73 1K_0402_5%
1K_0402_5%
@
@
+VCCP
12
R113
R113 470_0402_5%
470_0402_5%
12
R110
R110
@
@
0_0402_5%
0_0402_5%
+VCCP
12
R92
@R92
@
470_0402_5%
470_0402_5%
12
12
R87
R87
@
@
0_0402_5%
0_0402_5%
CLK_ENABLE#(29)
C C
Rename 06/06
CPU_BSEL0(5)
Add 1K follow Intel check list 05/11
B B
A A
Follow Intel check list change to 27P 06/05
FSB
CPU_BSEL1(5)
CPU_BSEL2(5)
Follow Vendor check change to 22P 10/16
C161 22P 50V J NPO 0402 C161 22P 50V J NPO 0402
C164 22P 50V J NPO 0402 C164 22P 50V J NPO 0402
Reserved
Change co-lay Low power clock GEN
+3VS
+1.5VS
LOWPW@
LOWPW@
R1387
R1387 10K_0402_5%
10K_0402_5%
U77
U77
@
@
FSA
1
XIN/CLKIN
2
XOUT
3
FS
4
GND
PCS3P73Z21BWG-08-CR TDFN 8P
PCS3P73Z21BWG-08-CR TDFN 8P
@
@
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96# Pin28/29 : LCDCLK / LCDCLK#
For PCI2_TME:0=Overclocking of CPU and SRC allowed (ICS only) 1=Overclocking of CPU and SRC NOT allowed
CLK_XTAL_IN
12
Y1
Y1
14.318MHZ_16PF_7A14300083
14.318MHZ_16PF_7A14300083
CLK_XTAL_OUT
12
MODOUT
1 = Pin24/25 : SRC_0 / SRC_0# Pin28/29 : 27M/27M_SS
Routing the trace at least 10mil
5
4
Change C174 C175 to 10U_0603 05/14
+3VS
+VCCP
1 2
R1348 0_0603_5%
R1348 0_0603_5%
NORPW@
NORPW@
1 2
R1349 0_0603_5%
R1349 0_0603_5%
1
47P_0402_50V8J
47P_0402_50V8J
C1147
C1147
2
09/03 Modify
@
@
SS_VDD
8
VCC
7
MR
1 2
R1382 1M +-5% 0402@R1382 1M +-5% 0402@
6 5
1 2
R1384 22_0402_5%
R1384 22_0402_5%
SSEXTR
10U_0603_6.3V6M
10U_0603_6.3V6M
CLK_PCH_48M(13)
CLK_PCH_14M(13)
T57T57
@
@
+1.5VM_CK505
T64T64
R1381
R1381
1 2
C1157
C1157
@
@
1 2
0.1U_0402_16V7K
0.1U_0402_16V7K
CLK_PCH_48M
For EMI
CLK_PCI_LPC(17) CLK_PCI_PCH(11)
+3VS+3VS +3VS
R85
R85 10K_0402_5%
10K_0402_5%
@
@
1 2
ITP_EN PCI4_SEL PCI2_TME
R89
R89 10K_0402_5%
10K_0402_5%
1 2
4
R95
R95 10K_0402_5%
10K_0402_5%
@
@
1 2
R90
R90 10K_0402_5%
10K_0402_5%
1 2
1 2
R1370_0603_5%R1370_0603_5%
R138
R138
1 2
0_0603_5%
0_0603_5%
1
1
C1119
C1119
C140
C140
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
+VCCP
NORPW@
NORPW@
+1.5VS
LOWPW@
LOWPW@
@
@
C386
C386
1 2
CLK_48M_CR
1 2
C390 10P_0402_50V8J
C390 10P_0402_50V8J
3G@
3G@
@
@
5.1 +-5% 0402
5.1 +-5% 0402
1
C389
C389
60-3G@
60-3G@
2
15P 50V J NPO 0402
15P 50V J NPO 0402
3
+3VM_CK505
1
1
C1145
C1145 47P_0402_50V8J
47P_0402_50V8J
2
+1.05VM_CK505
1
C1146
C1146 47P_0402_50V8J
47P_0402_50V8J
2
1
C174
C174
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
C175
C175
10U_0603_6.3V6M
10U_0603_6.3V6M
2
C172
C172
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C139
C139
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C138
C138
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C167
C167
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
SA000020N00 (Realtek : RTM875N-397-GRT ) SA000020H10 (ICS : ICS9LPRS387BKLFT)
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C160
C160
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
R1350 0_0402_5%
R1350 0_0402_5%
1 2
R1351 0_0402_5%
R1351 0_0402_5%
1 2
10P_0402_50V8J
10P_0402_50V8J
R74
R74
1 2
22_0402_5%
22_0402_5% R75
R75
1 2
22_0402_5%
22_0402_5%
R104
R104
1 2
33_0402_5%
33_0402_5%
VGATE(5,13,17,29)
+3VS
R86
R86
1 2
33_0402_5%
33_0402_5%
R80
R80
1 2
33_0402_5%
33_0402_5%
1
C388
C388
60-3G@
60-3G@
2
15P 50V J NPO 0402
15P 50V J NPO 0402
R71
R71 10K_0402_5%
10K_0402_5%
1 2
@
@
R77
R77 10K_0402_5%
10K_0402_5%
1 2
H_STP_CPU#(13)
H_STP_PCI#(13)
PCI2_TME
+3VM_CK505
1
C169
C169
2
+1.05VM_CK505
1
C173
C173
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
FSA FSB FSC
CLK_EN
1 2
R371
R371
0_0402_5%
0_0402_5%
@
@
CLK_XTAL_IN CLK_XTAL_OUT
PCI4_SEL ITP_EN
U4
U4
55
VDD_SRC
6
VDD_REF
12
VDD_PCI
72
VDD_CPU
19
VDD_48
27
VDD_PLL3
66
VDD_CPU_IO
31
VDD_PLL3_IO
62
VDD_SRC_IO
52
VDD_SRC_IO
23
VDD_IO
38
VDD_SRC_IO
20
USB_0/FS_A
2
FS_B/TEST_MODE
7
REF_0/FS_C/TEST_
8
REF_1
1
CKPWRGD/PD#
11
NC
53
CPU_STOP#
54
PCI_STOP#
5
XTAL_IN
4
XTAL_OUT
13
PCI_1
14
PCI_2
15
PCI_3
16
PCI_4/SEL_LCDCL
17
PCIF_5/ITP_EN
18
VSS_PCI
3
VSS_REF
22
VSS_48
26
VSS_IO
69
VSS_CPU
30
VSS_PLL3
34
VSS_SRC
59
VSS_SRC
42
VSS_SRC
73
VSS
ICS9LPRS387BKLFT_QFN72_10X10
ICS9LPRS387BKLFT_QFN72_10X10
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2
1
C148
C148
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
1
C137
C137
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2007/10/15 2008/10/15
2007/10/15 2008/10/15
2007/10/15 2008/10/15
1
2
CPU_0
CPU_0#
CPU_1
CPU_1#
SRC_0/DOT_96
SRC_0#/DOT_96#
LCDCLK/27M
LCDCLK#/27M_SS
SRC_2
SRC_2#
SRC_3
SRC_3#
SRC_4
SRC_4#
SRC_6
SRC_6#
SRC_7
SRC_7#
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
SRC_9
SRC_9#
SRC_10
SRC_10#
SRC_11
SRC_11#
CLKREQ_3# CLKREQ_4# CLKREQ_6# CLKREQ_7#
CLKREQ_9# SLKREQ_10# CLKREQ_11#
USB_1/CLKREQ_A#
Compal Secret Data
Compal Secret Data
Compal Secret Data
C146
C146
0.1U_0402_16V4Z
0.1U_0402_16V4Z
SDA SCL
9 10
71 70 68 67
24 25
28 29
32 33
35 36
39 40
57 56
61 60
64 63
44 45
50 51
CLK_PCIE_WWAN
48
CLK_PCIE_WWAN#
47
37 41 58 65 43 49 46 21
Deciphered Date
Deciphered Date
Deciphered Date
1
C165
C165
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CLK_SMBDATA CLK_SMBCLK
CLK_CPU_BCLK CLK_CPU_BCLK# CLK_CPU_HPLCLK CLK_CPU_HPLCLK#
CLK_CPU_DREFCLK CLK_CPU_DREFCLK#
CPU_SSCDREFCLK CPU_SSCDREFCLK#
CLK_PCIE_WLAN CLK_PCIE_WLAN#
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_PCIE_PCH CLK_PCIE_PCH#
CLK_CPU_EXP CLK_CPU_EXP#
CLK_PCIE_LAN
CLK_PCIE_LAN#
WLAN_CLKREQ#
WWAN_CLKREQ#
2
1
+3VS
R72
R72
2.2K_0402_5%
2.2K_0402_5%
Q10A
Q10A
6 1
2 5
3
4
Q10B
Q10B
SRC PORT LIST
PORT
SRC1
CPU_SSCDREFCLK SRC2 SRC3
PCIE_WLAN
SRC4
PCIE_SATA
SRC6
PCIE_PCH
SRC7
CPU_ITP
SRC8 SRC9
CLK_CPU_EXP
PCIE_LAN
SRC10 SRC11
PCIE_WWAN
Add R107 05/04
WLAN_CLKREQ#
WWAN_CLKREQ#
R121 10K_0402_5%R121 10K_0402_5%
R107 10K_0402_5%R107 10K_0402_5%
REQ PORT LIST
REQ_3# REQ_4#
ICH_SMBDATA(13)
ICH_SMBCLK(13)
CLK_SMBDATA (7,15) CLK_SMBCLK (7,15)
CLK_CPU_BCLK (5) CLK_CPU_BCLK# (5) CLK_CPU_HPLCLK (5) CLK_CPU_HPLCLK# (5)
CPU_DREFCLK (5) CPU_DREFCLK# (5)
CPU_SSCDREFCLK (5) CPU_SSCDREFCLK# (5)
CLK_PCIE_WLAN (20) CLK_PCIE_WLAN# (20)
CLK_PCIE_SATA (12) CLK_PCIE_SATA# (12)
CLK_PCIE_PCH (13) CLK_PCIE_PCH# (13)
CPU_ITP (4) CPU_ITP# (4)
CLK_CPU_EXP (4) CLK_CPU_EXP# (4)
CLK_PCIE_LAN (20) CLK_PCIE_LAN# (20)
CLK_PCIE_WWAN (15) CLK_PCIE_WWAN# (15)
Add WWAN_CLKREQ# 05/04
WLAN_CLKREQ# (20)
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
+3VS
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
REQ_6# REQ_7# REQ_9#
WWAN_CLKREQ# (15)
REQ_10# REQ_11# REQ_A#
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
1
R91
R91
2.2K_0402_5%
2.2K_0402_5%
CLK_SMBDATA
CLK_SMBCLK
DEVICE
12
12
DEVICEPORT
PCIE_WLAN
PCIE_WWAN
832Friday, May 21, 2010
832Friday, May 21, 2010
832Friday, May 21, 2010
+3VS
D
D
D
of
of
of
5
4
3
2
1
LCD POWER CIRCUIT
J1
D D
2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
GMCH_ENVDD(5)
C C
100K_0402_5%
100K_0402_5%
470_0402_5%
470_0402_5%
Q4
Q4
R174
R174
+LCDVDD
R577
R577
1 2
12
+LCDVDD_R
13
D
D
S
S
2
+3VS
2
G
G
R578
R578
100K_0402_5%
100K_0402_5%
1 2
R579 4.7K_0402_5%
R579 4.7K_0402_5%
13
Q5
Q5 DTC115EUA_SC70-3
DTC115EUA_SC70-3
+LCDVDD
W=20mils W=20mils
C1105
C1105
C1106
C1106
1
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
C1108
C1108
0.047U_0402_16V4Z
0.047U_0402_16V4Z
2
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CMOS & LCD/PANEL BD. Conn.
D
D
1 3
1
2
NTR4101PT1G 1P SOT-23-3
NTR4101PT1G 1P SOT-23-3
Q3
Q3
2
+3VS
S
S
G
G
@
@
1
C1107
C1107
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
+3VS
+CAM_VCC
USB20_N3_1
USB20_P3_1
C1167
C1167
@
@
+3VS
1
C1168
C1168
2
USB20_N3_1
1
2
@
@
Modify JLVDS1 08/04
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
10P_0402_50V8J
R1181
1 2
INVT_PWM
BKOFF#
C1156
C1156
R1181
2.2K_0402_5%
2.2K_0402_5%
1 2
12
LVDS_SCL (5) LVDS_SDA (5)
12
C1109
C1109
1000P 50V K X7R 0402
1000P 50V K X7R 0402
For RF
R1180
LVDS_SCL LVDS_SDA
(20 MIL)
B+
C1112
C1112 100P_0402_50V8J
100P_0402_50V8J
R1180
2.2K_0402_5%
2.2K_0402_5%
220P_0402_50V7K
220P_0402_50V7K
JLVDS1
JLVDS1
1 2
B B
A A
3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
ACES_88341-3000B001
ACES_88341-3000B001
CONN@
CONN@
USB20_P3_1 USB20_N3_1
LVDS_SDA LVDS_SCL
INVT_PWMINVT_PWM
+LCDVDD_L
+LEDVDD
LVDS_ACLK
LVDS_ACLK#
LVDS_A2
LVDS_A2#
LVDS_A1
LVDS_A1#
LVDS_A0
LVDS_A0#
BKOFF#
1 2
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
camera
L2
L2
+CAM_VCC
LVDS_ACLK (5)
LVDS_ACLK# (5)
LVDS_A2 (5)
LVDS_A2# (5)
LVDS_A1 (5)
LVDS_A1# (5)
LVDS_A0 (5)
LVDS_A0# (5)
BKOFF# (17)
INVT_PWM (5,17)
+3VS
+LCDVDD
L1
L1
FBMA-L11-201209-221LMA30T_0805
FBMA-L11-201209-221LMA30T_0805
2
C1111
C1111 330P_0402_50V7K
330P_0402_50V7K
1
12
1
2
Add for RF 07/02
J1
2
112
JUMP_43X39
JUMP_43X39
@
@
PJUSB208_SOT23-6
PJUSB208_SOT23-6
6
CH3
CH2
5
Vp
4
CH4
CH1
@
@
R11820_0402_5% R11820_0402_5%
@ L3
@
2
2
3
3
WCM2012F2S-900T04_0805
WCM2012F2S-900T04_0805
R11830_0402_5% R11830_0402_5%
Vn
D6
D6
12
L3
1
4
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
3
2
USB20_P3_1
1
USB20_N3
1
USB20_P3
USB20_P3
4
+CAM_VCC
1
C1113
C1113
2
Add D6 05/14
USB20_N3 (13)
USB20_P3 (13)
5
4
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793
401793
401793
932Friday, May 21, 2010
932Friday, May 21, 2010
932Friday, May 21, 2010
1
of
of
of
B
B
B
A
B
C
D
E
1 1
GMCH_CRT_R(5)
GMCH_CRT_G(5)
GMCH_CRT_B(5)
2 2
GMCH_CRT_HSYNC(5)
Place closed to chipset
GMCH_CRT_VSYNC(5)
Add R1283 R1284 Change R247 R249 to 10 ohm Add @ on U10 U11 C301 C298 06/08
3 3
GMCH_CRT_DATA(5)
GMCH_CRT_CLK(5)
R255
R255
R248
R248
2.2K_0402_5%
2.2K_0402_5%
12
12
R250
R250
R253
R253
150_0402_1%
150_0402_1%
150_0402_1%
150_0402_1%
1 2
C301 0.1U_0402_16V4ZC301 0.1U_0402_16V4Z
R249
R249
1 2
10_0402_5%
10_0402_5%
R247
R247
1 2
10_0402_5%
10_0402_5%
+3VS
12
12
2.2K_0402_5%
2.2K_0402_5% R245
R245
12
150_0402_1%
150_0402_1%
+5VS
1
5
P
A2Y
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
1 2
C298 0.1U_0402_16V4ZC298 0.1U_0402_16V4Z
+3VS
R246
R246
2.2K_0402_5%
2.2K_0402_5%
5
4
2
Q24B
Q24B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
61
Q24A
Q24A 2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Modify C31- C308 C303 C307 C306 C304 BOM Structure 0615
1
1
1
C310
U11
U11
4
OE#
+5VS
A2Y
5
1
U10
U10
P
4
OE#
G
SN74AHCT1G125DCKR_SC70-5
SN74AHCT1G125DCKR_SC70-5
3
CRT_HSYNC_1
CRT_VSYNC_1
C310
10P_0402_50V8J
10P_0402_50V8J
C303
C303
C308
C308
2
10P_0402_50V8J
10P_0402_50V8J
2
2
10P_0402_50V8J
10P_0402_50V8J
CRT PORT
+CRT_VCC
12
12
R251
R251
2.2K_0402_5%
2.2K_0402_5%
3
VGA_DDC_DAT
VGA_DDC_CLK
+5VS
2 1
RB491D_SC59-3
RB491D_SC59-3
1 2
1 2
1 2
D3
D3
L15
L15
BK1608LL121-T_2P
BK1608LL121-T_2P
L14
L14
BK1608LL121-T_2P
BK1608LL121-T_2P
L12
L12
BK1608LL121-T_2P
BK1608LL121-T_2P
10P_0402_50V8J
10P_0402_50V8J
W=40mils
C307
C307
1
2
+CRT_VCC
1
C306
C306 10P_0402_50V8J
10P_0402_50V8J
2
RED VGA_DDC_DAT
GREEN JVGA_HS
BLUE JVGA_VS
VGA_DDC_CLK
Close to CRT CONN for ESD.
2
1
C304
C304 10P_0402_50V8J
10P_0402_50V8J
2
JVGA_HS
JVGA_VS
3
D18
D18
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
2
3
D17
D17
1
PJDLC05C_SOT23-3
PJDLC05C_SOT23-3
RED
GREEN
BLUE
Change CRT_DET# From Page 13 to Page 10 06/12
+3VS
R149
R149 10K_0402_5%
High: CRT Plugged
CRT_DET(13)
CRT_DET#
0.1U_0402_16V4Z
0.1U_0402_16V4Z C142
C142
1 2
JCRT1
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
SUYIN_070546FR015M21RZR
SUYIN_070546FR015M21RZR
CRT_DET
Change JCRT1 P/N to SP010906182 06/22
CONN@JCRT1
CONN@
16 17
1 2 13
D
D
2
G
G
S
S
10K_0402_5%
Q11
Q11 2N7002W-T/R7_SOT323-3
2N7002W-T/R7_SOT323-3
CRT_DET#
R1103
R1103 100K_0402_5%
4 4
A
B
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C
2006/08/18 2007/8/18
2006/08/18 2007/8/18
2006/08/18 2007/8/18
Deciphered Date
Deciphered Date
Deciphered Date
D
1 2
+CRT_VCC
100K_0402_5%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc. SCHEMATICS MB A5651
SCHEMATICS MB A5651
SCHEMATICS MB A5651
401793 D
401793 D
401793 D
E
of
of
of
10 32Friday, May 21, 2010
10 32Friday, May 21, 2010
10 32Friday, May 21, 2010
Loading...
+ 22 hidden pages