Acer Aspire One AOD257 Schematics

Name: Acer Aspire One AOD257
Brand: Acer
SKU: 8194880
Rating: 4.5 (4 reviews)

4.5 (4)

ZE6 Block Diagram

CK505

MEMORYSYSTEMDDR

Pineview

INT_LVDS

10.1 "Panel

InterfacesGraphics

Up to 1280*800 or 1366*768

667 MT/s

DMI

P14

DDRIII-SODIMM

CPU

P4,5,6,7

CRT

P14

N570 1.66G: AJSLBXEVT05

N475 1.83G: AJSLBX5UT08

N455 1.66G: AJSLBX9VT05

DMI(x2)

Charger

P27

+3VPCU

SATA 0

DMI

+5VPCU

SATA - HDD

P19

SATA

PCIE-4

SIM Card

+3V_S5

USB-5

3G/WiMAX

P20

USB-4

P20

+5V_S5

+3VSUS

+3V

Tigerpoint

PCI-Express(Port1~4)

PCIE-2

+5V

P28

WLAN/WiMAX

USB-7

VCC_CORE

USB-0,1,3

USB 2.0 (Port0~7)

P20

P29

USB port*3

USB

PCI-E

P17

PCIE-1

+1.5VSUS

CCD

USB-2

P8,9,10,11,12,13

LAN

+SMDDR_VREF

P14

RTL8105TA

+0.75V_DDR_VTT

RTC

+1.5V

USB-6

P18

P30

Bluetooth module

BATTERY

+1.05V

P15

PN : AJSLGXX0T14

PCIE-3

P31

USB-5

Card Reader

P20

P11

RTS5209-GR

+1.5V

Intel High Definition Audio

P21

WLAN

USB-7

IHDA

Discharge

P20

LPC

VCCGFX

P32

LPC

Audio Codec

Realtek ALC271X

NPCE791L

P22

P16

K/B Con.

Touch Pad /B

SPI Flash

Charger

Int. SPK

Int. AMIC

MIC

Combo

Con.

CONN

Jack

P15

P22

P24

Quanta Computer Inc.

PROJECT : ZE6

Size

Document Number

Rev

Block Diagram

Date:

Friday, March 11, 2011

Sheet 1 of

CLK GEN (CLK)

	+3V				VDD_CLK_3.3V
	+3V
	PBY160808T-301Y-N/2A/300ohm_6			L20
	PBY160808T-301Y-N/2A/300ohm_6
		Place close to L8				C188	C157		C163
						C188	C157		C163
					C185	.1U/10V_4	.1U/10V_4		.1U/10V_4
					4.7U/10V/8
					0.1uF near every power pin
VDD_IO can be ranging
from 1.05V to 3.3V.
+1.05V
						VDD_CLKIO_1.05V
R209		0_6	L21
		PBY160808T-301Y-N/2A/300ohm_6
Place close to L18				C178		C145	C162		C171
				C178		C145	C162		C171
				4.7U/10V/8		.1U/10V_4	.1U/10V_4		.1U/10V_4
C154		CG_XIN			0.1uF near every power pin
33P/50V_4		CG_XIN
	2	Y2					[3,20]	SMBDT1
CL=20p		Y2					[3,20]	SMBCK1
CL=20p							[3,20]	SMBCK1
C152		14.318MHZ				CLK_BSEL1_FSB			R217
C152	1	CG_XOUT				CLK_BSEL1_FSB			R217
33P/50V_4		CG_XOUT							R218
				[8]	CLKUSB_48				R218
				[8]	CLKUSB_48
<Layout note>				[11]	14M_ICH				R191
				[11]	14M_ICH
						CLK_BSEL2_FSC R190
Crystal place within 500mil of CK505						CLK_BSEL2_FSC R190
				[10]	PCLK_ICH				R205
				[10]	PCLK_ICH				R204
				[22]	LCLK_EC				R204
Follow Silegro schematic				[22]	LCLK_EC				R219
Follow Silegro schematic				[20]	PCLK_DEBUG				R219

CG_XOUT

CG_XIN

SMBDT1

SMBCK1

1K_4 FSB

33/J_4 USB_48M

33/J_4

FSC

10K_4

22/J_4 ITP_EN 22/J_4

33/J_4 33M_SEL

VDD_REF_3.3	VDD_CORE_1.5	23
		45
VDD_PCI_3.3	VDD_CORE_1.5
VDD_48M_3.3
	PCI_STOP#	36
		42
VDD_SRC_IO_1.05	CPU_STOP#	53
VDD_SRC_IO_1.05	CPU_0
		52
	CPU_0#
VDD_CPU_IO_1.05		50
	CPU_1
		49
	CPU_1#
NC		44

NC	SRC_1/CPU_ITP	43
NC	SRC_1/CPU_ITP#
NC
	SRC_2	41
		40
XTAL_OUT	SRC_2#
XTAL_IN	SRC_3	38
		37
	SRC_3#
SDA		34

SCL	SRC_4
		33
	SRC_4#	32
USB48_1/FSB	SRC_5
		31
USB48_2	SRC_5#	28
	SRC_6
		27
	SRC_6#
REF/FSC		18
	DOT96/SRC7
		19
	DOT96#/SRC7#
PCIF/ITP_EN		20
	LCD_CLK
		21
25MHz/PCI_2/SEL_33MHz	LCD_CLK#	26
	SATA
		25
VSS_PCI	SATA#
VSS_48M
VSS_LCD		47
VSS_SATA	CLKREQ_A#
		46
VSS_SRC	CLKREQ_B#
		29
VSS_CPU	CLKREQ_C#
VSS_REF	CKPWRGD/PD#	55
Thermal Pad

SLG8LV631V

VDD_CLK_1.5V

R212

2.2/J_6

+1.5V

L22

PBY160808T-301Y-N/2A/300ohm

C191

C146

C195

<20100819_FAE Poyueh> Add 2.2ohm resistor for noise suppress

.1U/10V_4

4.7U/10V/8

Place close to L13

0.1uF near every power pin

1/19 : 439549_439549_CorbettPark_Schm_Rev0.5: If this pin is

used as PCI_STOP#, it is required to provide a 10-k pull-up to

Vcc3_3. It is not recommended to connect this signal to the

PM_STPPCI#_R

R164

*0/J_4

Tiger Point(NM10) as it may cause unexpected system behavior.

PM_STPPCI#

[11]

PM_STPCPU#_R

R157

*0/short_J_4

To SB

PM_STPCPU#

[11]

CLK_CPU_BCLK [4]

To CPU (Core CLK)

166 MHz

CLK_CPU_BCLK# [4]

CLK_MCH_BCLK [4]

To CPU (Host CLK)

166 MHz

CLK_MCH_BCLK# [4]

CLK_PCIE_LANP [18]

To LAN (LAN)

CLK_PCIE_LANN [18]

100 MHz

PE4CLK+

[20]

To Mini Card 2 (3G/Wimax)

100 MHz

PE4CLK-

[20]

PE2CLK+

[20]

To Mini Card 1 (WLAN)

100 MHz

PE2CLK-

[20]

CLK_PCIE_DMIP [4]

To CPU (DMI CLK)

100 MHz

CLK_PCIE_DMIN [4]

CLK_CARDREADER [21]

To Card Reader

100 MHz

CLK_CARDREADER#

[21]

CLK_PCIE_ICH [8]

To SB (DMI CLK)

100 MHz

CLK_PCIE_ICH# [8]

DREFCLK

[4]

DREFCLK#

DREFCLK# [4]

To CPU (PLL CLK)

96 MHz

DREFSSCLK

[4]

To CPU (DPLSS CLK)

100 MHz

DREFSSCLK#

[4]

CLK_PCIE_SATA [9]

To SB (SATA CLK)

100 MHz

CLK_PCIE_SATA# [9]

CLKREQ_LAN#_R

R141

475/F_4

CLKREQ_LAN# [18]

Control SRC_1 Register B5b6 for CLKREQ_A#

CLKREQ_MPC#_R

R142

475/F_4

0 = SRC1,

1=SRC2

CLKREQ_WLAN#

[20]

CLKREQ_MNC#_R

R201

475/F_4

Control SRC_3 Register B5b4 for CLKREQ_B#

CLKREQ_CARD#

[21]

0 = SRC3,

1=SRC4

VR_PWRGD_CK410 [11]

Control SRC_5 Register B5b3 for CLKREQ_C#

0 = SRC5,

1=SRC6

<20100819> Add 475 ohm for current leakage

FSC FSB

Frequency

VR PWRGD

+3V

R206

*10K/J_4

133MHz

1 = Pin 43/44 as CPU_ITP

166MHz

R207

10K/J_4 ITP_EN

0 = Pin 43/44 as SRC_1

200MHz

pin 10 has internal pull down resistor.

100MHz

[23,26] VR_PWRGD_CK410#

R146 *10K_4

no connect FSA to CPU, due	to there is no FSA PIN for CPU.	2
need to check check how to	handle it in CPU CLK_BESEL0

0221 : follow vendor's suggestion, change from 10K to 4.7K			+1.05V	R215	*1K_4	1	3	R147	10K_4	+3V
		[4]	CPU_BSEL1	R214	0_4	CLK_BSEL1_FSB		VR_PWRGD_CK410
		[4]	CPU_BSEL1			2N7002K				VR_PWRGD_CK410	[11]
	R208	4.7K/J_4		R216	*0_4	2N7002K				VR_PWRGD_CK410	[11]
+3V	R208	4.7K/J_4		R216	*0_4	Q9		C182
								C182

R197	*10K/J_4 33M_SEL	1 = Pin 11 as 33MHz		R188	*1K_4	.1U/10V_4
		0= Pin 11 as 25MHz	+1.05V	R188	*1K_4	.1U/10V_4
		[4]	CPU_BSEL2	R187	0_4	CLK_BSEL2_FSC
		[4]	CPU_BSEL2
				R189	*0_4	<20090721(B2A)>
						Change Q3,Q5,Q6 from BAM700200F6 to BAM70020002 (with ESD protection function)
	5		4			3	2

		+3V
PM_STPPCI#_R	R163	10K/J_4
PM_STPCPU#	R153	10K/J_4
CLKREQ_MPC#_R	R149	10K/J_4
CLKREQ_MNC#_R	R202	10K/J_4
CLKREQ_LAN#_R	R148	10K/J_4
USB_48M	R374	20K/F_4

CFG input hardware strapping to allocate PLL assignment.

LOW = Both CPU and SRC clock drive from PLL3

HIGH = CPU clock drive from PLL1, SRC clock drive from PLL3.

Contains 100kȍ pull-down resistor.

<EMI>
USB_48M	C190	*10P/50V_4
ITP_EN	C192	*10P/50V_4
FSB	C189	*10P/50V_4
FSC	C176	*10P/50V_4
33M_SEL	C172	*10P/50V_4

&ORFN *HQ , &

			+3V
				R203
		2		2.2K_4
[11,20]	PCLK_SMB	3	1	SMBCK1	SMBCK1	[3,20]
		2N7002K	+3V
		Q16	+3V
		Q16
				R186
		2		2.2K_4
[11,20]	PDAT_SMB	3	1	SMBDT1	SMBDT1	[3,20]
		2N7002K
		Q15

		Quanta Computer Inc.
		PROJECT : ZE6
Size	Document Number			Rev
	CLOCK GENERATOR			1C
	CLOCK GENERATOR
Date:	Friday, March 11, 2011	1	Sheet 2 of 35
		1

DDR_STD(DDR)

+1.5VSUS

JDIM1B

[5] M_A_A[14:0]

JDIM1A

M_A_DQ[63:0]

[5]

VDD1

VSS16

M_A_A0

M_A_DQ7

2.48A

DQ0

VDD2

VSS17

M_A_A1

DQ1

M_A_DQ6

VDD3

VSS18

M_A_A2

M_A_DQ3

DQ2

VDD4

VSS19

M_A_A3

M_A_DQ2

DQ3

VDD5

VSS20

M_A_A4

M_A_DQ0

DQ4

VDD6

VSS21

M_A_A5

M_A_DQ5

DQ5

VDD7

VSS22

M_A_A6

M_A_DQ1

DQ6

VDD8

VSS23

M_A_A7

M_A_DQ4

DQ7

VDD9

VSS24

M_A_A8

M_A_DQ8

100

DQ8

VDD10

VSS25

M_A_A9

M_A_DQ9

105

DQ9

VDD11

DIMM

VSS26

M_A_A10

107

M_A_DQ10

106

127

A14

DQ14

VDD16

VSS31

M_A_DQ15

123

139

M_A_A11

A10/AP

DQ10

M_A_DQ11

111

VDD12

VSS27

128

M_A_A12

A11

DQ11

M_A_DQ12

112

VDD13

VSS28

133

M_A_A13

119

A12/BC#

DQ12

M_A_DQ13

117

VDD14

VSS29

134

A13

DQ13

VDD15

VSS30

M_A_A14

M_A_DQ14

118

138

A15

DQ15

M_A_DQ24

124

VDD17

VSS32

144

[5]

M_CLK1#

CK1#

-SODIMM

DQ25

[5]

DDR3_DRAMRST#

RESET# SDRAMSO-

VSS42

M_A_DQ22

172

[5]

M_A_BS0

109

DQ16

M_A_DQ25

VDD18

VSS33

145

[5]

M_A_BS1

108

BA1

DQ18

M_A_DQ27

+3V

199

VDDSPD

VSS35

150

[5]

M_A_BS2

BA2

DQ19

M_A_DQ26

VSS36

151

[5]

M_CS#0

114

S0#

DQ20

M_A_DQ29

NC1

VSS37

155

[5]

M_CS#1

121

S1#

DQ21

M_A_DQ28

122

NC2

VSS38

156

101

M_A_DQ30

R119

*10K_4

125

161

[5]

M_CLK0

CK0

DQ22

+3V

NCTEST

VSS39

103

M_A_DQ31

162

[5]

M_CLK0#

CK0#

DQ23

VSS40

102

M_A_DQ18

198

167

[5]

M_CLK1

CK1

DQ24

[4]

PM_EXTTS#0

EVENT#

VSS41

104

DDR3PC2100SDRAM

M_A_DQ23

168

DM7

(204P)

DQ46

VSS15

PC2100DDR3

(204P)

[5]

M_CKE0

160

M_A_DQ43

VSS43

[5]

M_CKE1

CKE1

DQ27

M_A_DQ19

VSS44

173

[5]

M_A_CAS#

115

CAS#

DQ28

M_A_DQ21

+SMDDR_VREF_DQ0

VREF_DQ

VSS45

178

[5]

M_A_RAS#

110

RAS#

DQ29

M_A_DQ17

+SMDDR_VREF_DIMM

126

VREF_CA

VSS46

179

10K_4[5]

M_A_WE#

113

WE#

DQ30

M_A_DQ16

VSS47

184

R130

DIMM0_SA0

197

M_A_DQ20

185

R129

10K_4

DIMM0_SA1

201

SA0

DQ31

129

M_A_DQ33

VSS48

189

SMBCK1

202

SA1

DQ32

131

M_A_DQ32

VSS1

VSS49

190

[2,20]

SMBCK1

SMBDT1

200

SCL

DQ33

141

M_A_DQ35

VSS2

VSS50

195

[2,20]

SMBDT1

SDA

DQ34

143

M_A_DQ34

VSS3

VSS51

196

[5]

M_ODT0

116

DQ35

130

M_A_DQ37

VSS4

VSS52

[5]

M_ODT1

120

ODT1

DQ37

132

M_A_DQ36

VSS6

140

M_A_DQ38

[5]

M_A_DM[7:0]

DQ38

VSS7

M_A_DM0

142

M_A_DQ39

DM0

DQ39

VSS8

M_A_DM1

147

M_A_DQ44

DM1

DQ40

VSS9

M_A_DM3

149

M_A_DQ45

203

+0.75V_DDR_VTT

DM2

DQ41

VSS10

VTT1

M_A_DM2

157

M_A_DQ42

204

DM3

DQ42

VSS11

VTT2

M_A_DM4

136

159

M_A_DQ46

DM4

DQ43

VSS12

M_A_DM5

153

146

M_A_DQ40

205

DM5

DQ44

VSS13

GND

M_A_DM6

170

148

M_A_DQ41

206

DM6

DQ45

VSS14

GND

M_A_DM7

187

158

M_A_DQ47

[5]

M_A_DQS[7:0]

M_A_DQS0

DQ47

163

M_A_DQ48

DQS0

DQ48

M_A_DQS1

165

M_A_DQ49

DDR3-DIMM0_H=4_RVS

DQS1

DQ49

+1.5VSUS

M_A_DQS3

175

M_A_DQ55

DQS2

DQ50

M_A_DQS2

177

M_A_DQ54

DQS3

DQ51

M_A_DQS4

137

164

M_A_DQ53

DQS4

DQ52

M_A_DQS5

154

166

M_A_DQ52

DQS5

DQ53

M_A_DQS6

171

174

M_A_DQ51

R116

DQS6

DQ54

[5]

M_A_DQS#[7:0]

M_A_DQS7

188

176

M_A_DQ50

1K/F_4

DQS7

DQ55

+SMDDR_VREF_DIMM

M_A_DQS#0

181

M_A_DQ61

DQS#0

DQ56

M_A_DQS#1

183

M_A_DQ56

DQS#1

DQ57

M_A_DQS#3

191

M_A_DQ63

+SMDDR_VREF

R115

*0_6

+SMDDR_VREF_DIMM

DQS#2

DQ58

M_A_DQS#2

193

M_A_DQ58

DQS#3

DQ59

M_A_DQS#4

135

180

M_A_DQ57

DQS#4

DQ60

M_A_DQS#5

152

182

M_A_DQ60

R117

C109

DQS#5

DQ61

M_A_DQS#6

169

192

M_A_DQ59

1K/F_4

470p/50V_4

DQS#6

DQ62

M_A_DQS#7

186

194

M_A_DQ62

DQS#7

DQ63

DDR3-DIMM0_H=4_RVS

+1.5VSUS

Place these Caps near So-Dimm0.

R138

1K/F_4

+SMDDR_VREF

R140

*0_6

+SMDDR_VREF_DQ0

+1.5VSUS

+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0

R139

C112

C126

C124

C114

C127

1K/F_4

4.7U/6.3V_6 4.7U/6.3V_6

4.7U/6.3V_6

0.1u/10V_4

C115

+ C108

C110

C107

C132

C131

220u/2V_7343

4.7U/6.3V_6

0.1u/10V_4

2.2u/6.3V_6

C116

C125

C113

C111

C128

2.2u/6.3V_6

4.7U/6.3V_6

0.1u/10V_4

+3V

+0.75V_DDR_VTT

C129

C123

C118

C117

C122

C119

Quanta Computer Inc.

2.2u/6.3V_6

0.1u/10V_4

PROJECT : ZE6

Size

Document Number

Rev

DDRIII SO-DIMM-0

Date:

Friday, March 11, 2011

Sheet

PINEVIEW_M

U21C

Place within 750mil from CPU

U21D

PINEVIEW_M

D12

XDP_RSVD_00

REV = 1.1

M30

VGA_HSYNC_R

R81

15/F_4

CRT_HSYNC

[14]

XDP_RSVD_01

CRT_HSYNC

M29

VGA_VSYNC_R

R80

15/F_4

XDP_RSVD_02

CRT_VSYNC

[14]

REV = 1.1

[14]

INT_TXLCLKN

U25

H_SMI#

[9]

XDP_RSVD_03

LVD_A_CLKM

SMI_B

U26

T34

XDP_RSVD_04

VGA

CRT_R

[14]

INT_TXLCLKP

LVD_A_CLKP

A20M_B

H_A20M#

[9]

XDP_RSVD_05

CRT_RED

N31

CRT_R

[14]

Close to pin within 250mil

[14]

INT_TXLOUTN0

R23

LVD_A_DATAM_0

FERR_B

H_FERR#

[9]

XDP_RSVD_06

CRT_GREEN

P30

CRT_G

[14]

INT_TXLOUTP0

R24

LVD_A_DATAP_0

ICH

LINT00

F10

H_INTR

[9]

P29

CRT_B

CRT_R

CRT_G

CRT_B

N26

F11

XDP_RSVD_07

CRT_BLUE

CRT_B

[14]

INT_TXLOUTN1

LVD_A_DATAM_1

LINT10

H_NMI [9]

N30

N27

R292

1K/F_4

XDP_RSVD_08

CRT_IRTN

[14]

INT_TXLOUTP1

LVD_A_DATAP_1

IGNNE_B

H_IGNNE# [9]

XDP_RSVD_09

R94

R95

R92

[14]

INT_TXLOUTN2

R26

LVD_A_DATAM_2

STPCLK_B

H_STPCLK#

[9]

R27

XDP_RSVD_10

[14]

INT_TXLOUTP2

LVD_A_DATAP_2

T29

150/F_4

XDP_RSVD_11

C10

L31

CRT_SDA

[14]

ICH_DPRSTP#

[11,26]

XDP_RSVD_12

CRT_DDC_DATA

R90

2.37K/F_4

LIBG R22

DPRSTP_B

D10

L30

G10

XDP_RSVD_13

CRT_DDC_CLK

CRT_SCL

[14]

LVD_IBG

LVDS

DPSLP_B

H_DPSLP#

[11]

B10

XDP_RSVD_14

P28

VGA_IREF R96

665/F_4

N22

LVD_VBG

INIT_B

E11

T30

H_INIT# [9]

B11

J28

B12

XDP_RSVD_15

DAC_IREF

Close pin < 500mil

Close to pin within 500mil

N23

LVD_VREFH

PRDY_B

F15

H_PREQ#

T40

XDP_RSVD_16

LBKLT_EN

LVD_VREFL

PREQ_B

C11

Y30

DREFCLK

[2]

L27

XDP_RSVD_17

DPL_REFCLKINP

LBKLT_EN

Y29

L26

DPL_REFCLKINN

DREFCLK# [2]

[14]

INT_LVDS_PWM

R89

*2.2K/J_4 LCTLA_CLK

LBKLT_CTL

H_THRMTRIP#

AA30

L23

E13

DPL_REFSSCLKINP

DREFSSCLK

[2]

+3V

LCTLA_CLK

THERMTRIP_B

AA31

R88

*2.2K/J_4 LCTLB_DATAK25

DPL_REFSSCLKINN

DREFSSCLK#

[2]

LCTLB_CLK

R295

68_4

[14]

LVDS_CLK

K23

+1.05V

<20090511(A1A)_Checklist Rev0.7>

LDDC_CLK

L11

K24

PROCHOT_B:68ohm±5% pull-up to Vcc1_05

RSVD

[14]

LVDS_DATA

LDDC_DATA

H26

(VCCP) at both CPU side and Intel MVP

[14]

INT_LVDS_DIGON

LVDD_EN

C18

PROCHOT_B

H_PROCHOT#

[26]

H_PWRGD

K29

R79

*0/short_4

CPUPWRGOOD

H_PWRGD

[11]

PM_EXTTS#_1/DPRSLPVR

PM_DPRSLPVR

[11,26]

J30

PM_EXTTS#_0

PM_EXTTS#0

[3]

PWROK

IMVP_PWRGD

[11,23,26]

H_GTLREF

RSTINB

AA3

PLTRST#

[11,18,20,21,22,23]

GTLREF

A13

MISC

VSS

H27

HPL_CLKINN

CLK_MCH_BCLK#

[2]

<20090610(A1A)_Sighting Report Rev002_Number:3359187>

HPL_CLKINP

CLK_MCH_BCLK

[2]

Avoid a glitch during system power up

RSVD

AA7

E17

RSVD_TP

LCD Panel Backlight

RSVD

T39

E15

BPM_1B_1

H10

CLK_CPU_BCLK#

[2]

RSVD_TP

BCLKN

AA6

RSVD_TP

G11

BPM_1B_0

RSVD_TP

T13

G13

BPM_1B_2

BCLKP

J10

CLK_CPU_BCLK

[2]

+3V

T10

F13

BPM_1B_3

AA21

RSVD_TP

C82

0.1u/10V_4

CPU

BSEL_0

CPU_BSEL0

W21

T33

B18

BPM_2_0#/RSVD

CPU_BSEL1

[2]

T21

RSVD_TP

T41

B20

BSEL_1

CPU_BSEL2

RSVD_TP

BPM_2_1#/RSVD

BSEL_2

CPU_BSEL2

[2]

V21

3 OF 6

T36

C20

RSVD_TP

BPM_2_2#/RSVD

IMVP_PWRGD

TC7SH08FU

T37

B21

H30

VID0

[26]

BPM_2_3#/RSVD

VID_0

H29

Pineview-M 1.66G

LBKLT_EN

INT_LVDS_BLON

[14]

VID_1

VID1

[26]

H28

VID_2

VID2

[26]

G30

VID_3

VID3

[26]

G29

RSVD

VID_4

VID4

[26]

R93

XDP_TDI

D14

F29

TDI

VID_5

VID5

[26]

T35

D13

E29

TDO

VID_6

VID6

[26]

100K_4

XDP_TCK

B14

TCK

XDP_TMS

C14

PINEVIEW_M

TMS

RSVD

XDP_TRST# C16

D20

CLK GEN no FSA pin for CPU_BSEL0,

U21A

R99

*0_4

TRST_B

RSVD

H13

so just pull high to fix it.

RSVD

D18

REV = 1.1

H_THERMDA

D30

RSVD

THRMDA_1

[8]

DMI_TXP0

DMI_RXP0

[8]

H_THERMDC

E30

DMI_RXP_0

DMI_TXP_0

THRMDC_1

RSVD_TP

D19

[8]

DMI_TXN0

DMI_RXN_0

DMI

DMI_TXN_0

DMI_RXN0

[8]

RSVD_TP

H_EXBGREF

[8]

DMI_TXP1

DMI_RXP_1

DMI_TXP_1

DMI_RXP1

[8]

EXTBGREF

[8]

DMI_TXN1

DMI_RXN_1

DMI_TXN_1

DMI_RXN1

[8]

+1.05V

Place within 500mil from CPU pin

CPU_BSEL0

R65

470/J_4

C30

RSVD_C30

[2]

CLK_PCIE_DMIN

L10

EXP_COMP

R91

49.9/F_4

D31

4 OF 6

CPU_BSEL1

R66

470/J_4

EXP_CLKINN

EXP_RCOMPO

RSVD_D31

PLACE TCK/TDI/TMS TERMINATION NEAR CPU

CPU_BSEL2

R64

470/J_4

[2]

CLK_PCIE_DMIP

EXP_CLKINP

EXP_ICOMPI

EXP_RBIAS

R310

750/F_4

R10

EXP_RBIAS

Pineview-M 1.66G

RSVD

XDP PU

N11

N10

RSVD

RSVD_TP

P11

Place within 500mil from CPU pin

+1.05V

RSVD

RSVD_TP

Place within 500mil from CPU pin and 5mil spacing

Place within 500mil from CPU pin

RSVD

+1.05V

RSVD_K2

RSVD_K3

XDP_TMS

R63

51/J_4

R74

2.2K/J_4

LVDS_CLK

RSVD_J1

RSVD_L2

XDP_TDI

R62

51/J_4

+3V

Max 500mil

Near CPU pin

RSVD_M4

RSVD_M2

R69

2.2K/J_4

LVDS_DATA

R51

R280

RSVD_L3

1 OF 6

RSVD_N2

+3V

H_PREQ#

R294

51/J_4

976/F_4

1K/F_4

XDP_TCK

R293

51/J_4

<EMI>

C52

C61

1D: No Stuff C8007 (CRB v1.0)

Pineview-M 1.66G

H_EXBGREF

H_GTLREF

PM_EXTTS#0 R77

10K_4

XDP_TRST#

R61

51/J_4

*220P/50V_4

XDP_BPM#5 : Length<200mil

R55

C36

R281

C251

C257

3.32K/F_4

1U/6.3V_4

2K/F_4

1U/6.3V_4

*220P/50V_4

CPU FAN CTRL(THM)

&38 7KHUPDO PRQLWRU 7+0

+3V

125 Degree Protection(CPU)

+1.05V

8/11 B-test : for EMI

+3V

R76

R52

R75

*0/short_4

C54

0.1u/10V_4

IMVP_PWRGD

2N7002K

<20090721(B2A)>

FAN_PWM_CN

FAN_SIG

10K_4

*10K_4

H_THERMDA

Change Q7 from BAM700200F6

to BAM70020002 (with ESD

C130

C121

[22] 2ND_MBCLK

SCLK

VCC

protection function)

*220p/50V_6

+3V

[22]

2ND_MBDATA

SDA

DXP

C40

+1.05V

+5V

[11,22]

THERM_ALERT#

R59

*0_4

THERM_ALERT#_R

ALERT#

DXN

2200p/50V_4

R47

+3V

1K_4

R126

FAN_ON#

OVERT#

GND

H_THERMDC

R60

R133

R137

10K_4

CPU

56_4

+3V

IC CTRL(8P) EMC1412-1-ACZL-TR

Routing 10:10 mils and

FAN_SIG

[22]

away from noise source

H_THRMTRIP#

SYS_SHDN# [25,26,30]

10K_4

ALERT#:pull up at SB side

SMSC ADDRESS: 98H

with ground gard

MMBT3904

+5V

R128

CN16

SMSC : AL001412003

R67

*0_4

PM_THRMTRIP#

[9]

10K_4

MMBT3904

Tigerpoint

FAN_PWM_E

FAN_PWM_CN

FAN

Quanta Computer Inc.

FAN_ON# R124

10K_4

FAN_PWM_B 2

PROJECT : ZE6

MMBT3904

CPUFAN#

Size

Document Number

Rev

[22] CPUFAN#

Pineview DMI/Display

Date:

Friday, March 11, 2011

Sheet

PINEVIEW_M

U21B

REV = 1.1

[3] M_A_A[14..0]

M_A_A0 AH19

DDR_A_MA_0

M_A_A1

AJ18

DDR_A_MA_1

M_A_A2

AK18

DDR_A_MA_2

M_A_A3

AK16

DDR_A_MA_3

M_A_A4

AJ14

DDR_A_MA_4

M_A_A5

AH14

DDR_A_MA_5

M_A_A6

AK14

DDR_A_MA_6

M_A_A7

AJ12

DDR_A_MA_7

M_A_A8

AH13

DDR_A_MA_8

M_A_A9

AK12

DDR_A_MA_9

M_A_A10

AK20

DDR_A_MA_10

M_A_A11

AH12

DDR_A_MA_11

M_A_A12

AJ11

DDR_A_MA_12

M_A_A13

AJ24

DDR_A_MA_13

M_A_A14

AJ10

DDR_A_MA_14

[3] M_A_WE#

M_A_WE#

AK22

DDR_A_WEB

M_A_CAS#

AJ22

[3] M_A_CAS#

DDR_A_CASB

M_A_RAS#

AK21

[3] M_A_RAS#

DDR_A_RASB

M_A_BS0

AJ20

[3] M_A_BS0

DDR_A_BS_0

M_A_BS1

AH20

[3] M_A_BS1

DDR_A_BS_1

M_A_BS2

AK11

[3] M_A_BS2

DDR_A_BS_2

M_CS#0

AH22

[3]

M_CS#0

DDR_A_CSB_0

M_CS#1

AK25

[3]

M_CS#1

DDR_A_CSB_1

AJ21

DDR_A_CSB_2

AJ25

M_CKE0

DDR_A_CSB_3

[3]

M_CKE0

AH10

DDR_A_CKE_0

M_CKE1

AH9

[3]

M_CKE1

DDR_A_CKE_1

AK10

DDR_A_CKE_2

AJ8

M_ODT0

DDR_A_CKE_3

[3]

M_ODT0

AK24

DDR_A_ODT_0

M_ODT1

AH26

[3]

M_ODT1

DDR_A_ODT_1

AH24

DDR_A_ODT_2

AK27

M_CLK0

DDR_A_ODT_3

[3]

M_CLK0

AG15

DDR_A_CK_0

M_CLK0#

AF15

[3]

M_CLK0#

DDR_A_CKB_0

M_CLK1

AD13

[3]

M_CLK1

DDR_A_CK_1

M_CLK1#

AC13

[3]

M_CLK1#

DDR_A_CKB_1

DDR3 PWROK

+3V_S5

AC15

DDR_A_CK_3

AD15

DDR_A_CKB_3

AF13

DDR_A_CK_4

[22,23,27,29] SUSON

AG13

DDR_A_CKB_4

[22,23,27] HWPG_1.5V

AD17

TC7SH08FU R121

RSVD_AD17

AC17

12.1K/F_4

+1.5VSUS

AB15

RSVD_AC17

AB17

RSVD_AB15

DDRAM_PWROK

RSVD_AB17

R120

R350

*10K_4

10K_4

DDRAM_PWROK

AB4

VSS

[3] DDR3_DRAMRST#

AK8

RSVD

C294

0.1U/10V_4

AB11

RSVD_TP

AB13

RSVD_TP

Close to pin

DDR_VREF

AL28

DDR_VREF

R348

80.6/F_4

SM_RCOMP

AK28

DDR_RPD

+1.5VSUS

R349

80.6/F_4

SM_RCOMP#

AJ26

DDR_RPU

C295

0.01U/25V_4

AK29

RSVD

DDR_A

+1.5VSUS

Close to DDR_VREF pin

R351

1K/F_4

+SMDDR_VREF

R352

*0_4

DDR_VREF

R353

C296

<EMI>

C297

1K/F_4

0.1u/16V_6

*1000p/50V_4

2 OF 6

DG 2.1 : It is strongly recommended that the SODIMM VREF motherboard traces, going from

their VREF resistor dividers to their specified SODIMM VREF pins, be ground referenced

on the motherboard where ever possible to help minimize risks of any possible noise

Pineview-M 1.66G

being coupled onto VREF. If they can't be referenced to ground we recommend placing

a site for a 0603 capacitor near the VREF divider. These 0603 capacitor sites must be

connected on one end to the non ground reference plane the VREF trace is referenced

to and the other end must be connected to ground.

DDR_A_DQS_0

AD3

M_A_DQS0

M_A_DQ[63..0] [3]

AD2

M_A_DQS#0

M_A_DM[7..0] [3]

DDR_A_DQSB_0

AD4

M_A_DM0

DDR_A_DM_0

DDR_A_DQ_0

AC4

M_A_DQ0

M_A_DQS[7..0] [3]

AC1

M_A_DQ1

DDR_A_DQ_1

AF4

M_A_DQ2

M_A_DQS#[7..0] [3]

DDR_A_DQ_2

AG2

M_A_DQ3

DDR_A_DQ_3

AB2

M_A_DQ4

DDR_A_DQ_4

AB3

M_A_DQ5

DDR_A_DQ_5

AE2

M_A_DQ6

DDR_A_DQ_6

AE3

M_A_DQ7

DDR_A_DQ_7

AB8

M_A_DQS1

DDR_A_DQS_1

AD7

M_A_DQS#1

DDR_A_DQSB_1

AA9

M_A_DM1

DDR_A_DM_1

AB6

M_A_DQ8

DDR_A_DQ_8

AB7

M_A_DQ9

DDR_A_DQ_9

AE5

M_A_DQ10

DDR_A_DQ_10

AG5

M_A_DQ11

DDR_A_DQ_11

AA5

M_A_DQ12

DDR_A_DQ_12

AB5

M_A_DQ13

DDR_A_DQ_13

AB9

M_A_DQ14

DDR_A_DQ_14

AD6

M_A_DQ15

DDR_A_DQ_15

AD8

M_A_DQS2

DDR_A_DQS_2

AD10

M_A_DQS#2

DDR_A_DQSB_2

AE8

M_A_DM2

DDR_A_DM_2

AG8

M_A_DQ16

DDR_A_DQ_16

AG7

M_A_DQ17

DDR_A_DQ_17

AF10

M_A_DQ18

DDR_A_DQ_18

AG11

M_A_DQ19

DDR_A_DQ_19

AF7

M_A_DQ20

DDR_A_DQ_20

AF8

M_A_DQ21

DDR_A_DQ_21

AD11

M_A_DQ22

DDR_A_DQ_22

AE10

M_A_DQ23

DDR_A_DQ_23

AK5

M_A_DQS3

DDR_A_DQS_3

AK3

M_A_DQS#3

DDR_A_DQSB_3

AJ3

M_A_DM3

DDR_A_DM_3

AH1

M_A_DQ24

DDR_A_DQ_24

AJ2

M_A_DQ25

DDR_A_DQ_25

AK6

M_A_DQ26

DDR_A_DQ_26

AJ7

M_A_DQ27

DDR_A_DQ_27

AF3

M_A_DQ28

DDR_A_DQ_28

AH2

M_A_DQ29

DDR_A_DQ_29

AL5

M_A_DQ30

DDR_A_DQ_30

AJ6

M_A_DQ31

DDR_A_DQ_31

AG22

M_A_DQS4

DDR_A_DQS_4

AG21

M_A_DQS#4

DDR_A_DQSB_4

AD19

M_A_DM4

DDR_A_DM_4

AE19

M_A_DQ32

DDR_A_DQ_32

AG19

M_A_DQ33

DDR_A_DQ_33

AF22

M_A_DQ34

DDR_A_DQ_34

AD22

M_A_DQ35

DDR_A_DQ_35

AG17

M_A_DQ36

DDR_A_DQ_36

AF19

M_A_DQ37

DDR_A_DQ_37

AE21

M_A_DQ38

DDR_A_DQ_38

AD21

M_A_DQ39

DDR_A_DQ_39

AE26

M_A_DQS5

DDR_A_DQS_5

AG27

M_A_DQS#5

DDR_A_DQSB_5

AJ27

M_A_DM5

DDR_A_DM_5

AE24

M_A_DQ40

DDR_A_DQ_40

AG25

M_A_DQ41

DDR_A_DQ_41

AD25

M_A_DQ42

DDR_A_DQ_42

AD24

M_A_DQ43

DDR_A_DQ_43

AC22

M_A_DQ44

DDR_A_DQ_44

AG24

M_A_DQ45

DDR_A_DQ_45

AD27

M_A_DQ46

DDR_A_DQ_46

AE27

M_A_DQ47

DDR_A_DQ_47

AE30

M_A_DQS6

DDR_A_DQS_6

AF29

M_A_DQS#6

DDR_A_DQSB_6

AF30

M_A_DM6

DDR_A_DM_6

AG31

M_A_DQ48

DDR_A_DQ_48

AG30

M_A_DQ49

DDR_A_DQ_49

AD30

M_A_DQ50

DDR_A_DQ_50

AD29

M_A_DQ51

DDR_A_DQ_51

AJ30

M_A_DQ52

DDR_A_DQ_52

AJ29

M_A_DQ53

DDR_A_DQ_53

AE29

M_A_DQ54

DDR_A_DQ_54

AD28

M_A_DQ55

DDR_A_DQ_55

AB27

M_A_DQS7

DDR_A_DQS_7

AA27

M_A_DQS#7

DDR_A_DQSB_7

AB26

M_A_DM7

DDR_A_DM_7

AA24

M_A_DQ56

DDR_A_DQ_56

AB25

M_A_DQ57

DDR_A_DQ_57

W24

M_A_DQ58

DDR_A_DQ_58

W22

M_A_DQ59

DDR_A_DQ_59

AB24

M_A_DQ60

DDR_A_DQ_60

AB23

M_A_DQ61

DDR_A_DQ_61

DDR_A_DQ_62

AA23

M_A_DQ62

Quanta Computer Inc.

W27

M_A_DQ63

DDR_A_DQ_63

PROJECT : ZE6

Size

Document Number

Rev

Pineview DDR

Date:

Friday, March 11, 2011

Sheet

VCCGFX

U21E

VCORE

C84

2.2U/6.3V_6

PINEVIEW_M

A23

VCC

A25

C85

1U/6.3V_4

REV = 1.1

VCC

A27

3.5A VCCVCC

C69

1U/6.3V_4

C74

1U/6.3V_4

T13

B23

VCCGFX

VCC

B24

C58

1U/6.3V_4

C72

1U/6.3V_4

T14

VCCGFX 1.38A

VCC

B25

T16

VCCGFX

GFX/MCH

VCC

B26

C39

1U/6.3V_4

T18

B27

VCCGFX

VCC

V13

C26

C57

1U/6.3V_4

C77

1U/6.3V_4

T19

VCCGFX

VCC

C24

C88

1U/6.3V_4

V19

VCCGFX

VCC

D23

VCCGFX

VCC

C32

22u/6.3V_8

W14

D24

C78

1U/6.3V_4

VCCGFX

VCC

W16

D26

VCCGFX

VCC

C34

22u/6.3V_8

W18

CPU

D28

C86

1U/6.3V_4

VCCGFX

VCC

W19

E22

VCCGFX

VCC

E24

C33

22u/6.3V_8

VCC

E27

VCC

F21

VCC

F22

VCC

F25

VCC

G19

+1.5VSUS

VCC

G21

R111

*0/short_8

VCC

G24

VCC

H17

VCC

H19

VCC

H22

C101

2.2U/6.3V_6

VCC

H24

VCC

J17

C100

1U/6.3V_4

VCC

AK13

J19

VCCSM

VCC

AK19

J21

C99

1U/6.3V_4

VCCSM

VCC

AK9

J22

VCCSM

VCC

AL11

K15

C96

1U/6.3V_4

VCCSM

VCC

AL16

K17

VCCSM

VCC

AL21

K21

C103

1U/6.3V_4

VCCSM

VCC

AL25

L14

VCCSM

VCC

L16

VCC

L19

Close to pin

2.27A

VCC

L21

POWER

VCC

N16

VCC

N14

+1.5VSUS

R112

*0/short_6

VCC1.5_VCCCK_DDR

AK7

VCCCK_DDR

DDR

VCC

N19

AL7

N21

C102

VCCCK_DDR

VCC

C106

22U/6.3V_8

1U/6.3V_4

+1.05V

U10

VCCA_DDR

VCORE

VCCA_DDR

1.32A

VCCA_DDR

C278

22u/6.3V_8

VCCA_DDR

R56

VCCA_DDR

100/F_4

C81

4.7U/6.3V_6

VCCA_DDR

W10

VCCA_DDR

W11

C76

1U/6.3V_4

VCCA_DDR

C29

VCCSENSE

VCC_SENSE

[26]

AA10

B29

VCCACK_DDR

VSSSENSE

VCC1.5_VCCA

R322

*0/short_6

VSS_SENSE

[26]

AA11

VCCACK_DDR

0.08AVCCA

C280

0.01U/25V_4

+1.5V

R57

Close to pin

100/F_4

<Layout

note>

VCC

C255

*0.1u/10V_4

+1.05V

<20090526(A1A)_EDS Rev0.7>

Close to pin AA19

VCCP

VCCP_VCCP

D4 pin is VCCP, not VCC

R291

*0/short_4

VCCP

+1.05V

VCCA_DDR and VCCACK_DDR rails can be

C80

*0.1u/10V_4

AA19

VCCD_AB_DPL

on the same source but make sure the

plane shapes are split near Pineview-M

C94

*0.1u/10V_4

to avoid noise coupling

C93

1U/6.3V_4

V11

VCCD_HMPLL

EXP\CRT\PLL

0.06A

W31

C87

LVDS

VCCDLVD

AC31

VCC1.8_LCCALVD

R100

0.1uH/300mA_6

+1.8V

VCCSFR_AB_DPL

C91

1U/6.3V_4

V30

VCCALVD

C92

R98

0.154A

22U/6.3V_8

1u/6.3V_4

VCC1.8_VCCACRTDAC

T30

+1.8V

VCCACRTDAC

0.2A/600ohm_6

+3V

C79

C323

C75

1U/6.3V_4

T31

0.006A

0.33A

0.48A

VCCP_DMI

R315

*0/short_6

1u/6.3V_4

*22U/6.3V_8

DMI

+1.05V

J31

VCC_GIO

VCCA_DMI

C273

1U/6.3V_4

+1.05V

VCCRING_EAST

VCCA_DMI

C272

1U/6.3V_4

+1.05V

C253

1U/6.3V_4

VCCRING_WEST

VCCA_DMI

VCCRING_WEST

VCCP_VCCAPLL_DMI

C254

1U/6.3V_4

0.104A

R313

*0_4

+1.05V

VCCRING_WEST

RSVD

*0/short_4

+1.05V

A21

AA1VCC1.8_DMIHMPLL R326

VCC_LGI_VID

VCCSFR_DMIHMPLL

+1.8V

C256

VCCP

+1.05V

C284

C267

*1u/6.3V_4

1u/6.3V_4

5 OF 6

Quanta Computer Inc.

Pineview-M 1.66G

PROJECT : ZE6

Size

Document Number

Rev

Pineview Power

Date:

Friday, March 11, 2011

Sheet

		U21F	PINEVIEW_M
		U21F
	A11	VSS	REV = 1.1
	A16	VSS
	A16	VSS
	A19	VSS
	A19	VSS
	A29	VSS
	A29	RSVD_NCTF
	A3	RSVD_NCTF
	A3	RSVD_NCTF
	A30	RSVD_NCTF
	A30	RSVD_NCTF
	A4	RSVD_NCTF
	A4	RSVD_NCTF
	AA13	RSVD_NCTF
	AA13	VSS
	AA14	VSS
	AA14	VSS
	AA16	VSS
	AA16	VSS
	AA18	VSS
	AA18	VSS
	AA2	VSS
	AA2	VSS
	AA22	VSS
	AA22	VSS
	AA25	VSS
	AA25	VSS
	AA26	VSS
	AA26	VSS
	AA29	VSS
	AA29	VSS
	AA8	VSS
	AA8	VSS
	AB19	VSS
	AB19	VSS
	AB21	VSS
	AB21	VSS
	AB28	VSS
	AB28	VSS
	AB29	VSS
	AB29	VSS
	AB30	VSS
	AB30	VSS		GND
	AC10	VSS
	AC10	VSS
	AC11	VSS
	AC19	VSS
	AC19	VSS
	AC2	VSS
	AC2	VSS
	AC21	VSS
	AC21	VSS
	AC28	VSS
	AC28	VSS
	AC30	VSS
	AC30	VSS
	AD26	VSS
	AD26	VSS
	AD5	VSS
	AD5	VSS
	AE1	VSS
	AE1	VSS
	AE11	VSS
	AE11	VSS
	AE13	VSS
	AE13	VSS
	AE15	VSS
	AE15	VSS
	AE17	VSS
	AE17	VSS
	AE22	VSS
	AE22	VSS
	AE31	VSS
	AE31	VSS
	AF11	VSS
	AF11	VSS
	AF17	VSS
	AF17	VSS
	AF21	VSS
	AF21	VSS
	AF24	VSS
	AF24	VSS
	AF28	VSS
	AF28	VSS
	AG10	VSS
	AG10	VSS
	AG3	VSS
	AG3	VSS
	AH18	VSS
	AH18	VSS
	AH23	VSS
	AH23	VSS
	AH28	VSS
	AH28	VSS
	AH4	VSS
	AH4	VSS
	AH6	VSS
A	AH6	VSS
A	AH8	VSS
	AH8	VSS
	AJ1	VSS
	AJ1	RSVD_NCTF
	AJ16	RSVD_NCTF
	AJ16	VSS
	AJ31	VSS
	AJ31	VSS
	AK1	VSS
	AK1	RSVD_NCTF
	AK2	RSVD_NCTF
	AK2	RSVD_NCTF
	AK23	RSVD_NCTF
	AK23	VSS
	AK30	VSS
	AK30	RSVD_NCTF
	AK31	RSVD_NCTF
	AK31	RSVD_NCTF
	AL13	RSVD_NCTF
	AL13	VSS
	AL19	VSS
	AL19	VSS
	AL2	VSS
	AL2	RSVD_NCTF
	AL23	RSVD_NCTF
	AL23	VSS
	AL29	VSS
	AL29	RSVD_NCTF
	AL3	RSVD_NCTF
	AL3	RSVD_NCTF
	AL30	RSVD_NCTF
	AL30	RSVD_NCTF
	AL9	RSVD_NCTF
	AL9	VSS
	B13	VSS
	B13	VSS
	B16	VSS
	B16	VSS
	B19	VSS
	B19	VSS
	B22	VSS
	B22	VSS
	B30	VSS
	B30	RSVD_NCTF
	B31	RSVD_NCTF
	B31	RSVD_NCTF
	B5	RSVD_NCTF
	B5	VSS
	B9	VSS
	B9	VSS
	C1	VSS
	C1	RSVD_NCTF
	C12	RSVD_NCTF
	C12	VSS
	C21	VSS
	C21	VSS
	C22	VSS
	C22	VSS
	C25	VSS
	C25	VSS
	C31	VSS
	C31	RSVD_NCTF
	D22	RSVD_NCTF
	D22	VSS
	E1	VSS
	E1	RSVD_NCTF
	E10	RSVD_NCTF
	E10	VSS
	E19	VSS
	E19	VSS
	E21	VSS
	E21	VSS
	E25	VSS
	E25	VSS
	E8	VSS
	E8	VSS
	F17	VSS
	F17	VSS
	F19	VSS
	F19	VSS		6 OF 6
		VSS

		Pineview-M 1.66G

						07
VSS	F24
VSS	F28
VSS	F28
VSS	F4
VSS	F4
VSS	G15
VSS	G15
VSS	G17
VSS	G17
VSS	G22
VSS	G22
VSS	G27
VSS	G27
VSS	G31
VSS	G31
VSS	H11
VSS	H11
VSS	H15
VSS	H15
VSS	H2
VSS	H2
VSS	H21
VSS	H21
VSS	H25
VSS	H25
VSS	H8
VSS	H8
VSS	J11
VSS	J11
VSS	J13
VSS	J13
VSS	J15
VSS	J15
VSS	J4
VSS	J4
VSS	K11
VSS	K11
VSS	K13
VSS	K13
VSS	K19
VSS	K19
VSS	K26
VSS	K26
VSS	K27
VSS	K27
VSS	K28
VSS	K28
VSS	K30
VSS	K30
VSS	K4
VSS	K4
VSS	K8
VSS	K8
VSS	L1
VSS	L1
VSS	L13
VSS	L13
VSS	L18
VSS	L18
VSS	L22
VSS	L22
VSS	L24
VSS	L24
VSS	L25
VSS	L25
VSS	L29
VSS	L29
VSS	M28
VSS	M28
VSS	M3
VSS	M3
VSS	N1
VSS	N1
VSS	N13
VSS	N13
VSS	N18
VSS	N18
VSS	N24
VSS	N24
VSS	N25
VSS	N25
VSS	N28
VSS	N28
VSS	N4
VSS	N4
VSS	N5
VSS	N5
VSS	N8
VSS	N8
VSS	P13
VSS	P13
VSS	P14
VSS	P14
VSS	P16
VSS	P16
VSS	P18
VSS	P18
VSS	P19
VSS	P19					A
VSS	P21					A
VSS	P21
VSS	P3
VSS	P3
VSS	P4
VSS	P4
VSS	R25
VSS	R25
VSS	R7
VSS	R7
VSS	R8
VSS	R8
VSS	T11
VSS	T11
VSS	U22
VSS	U22
VSS	U23
VSS	U23
VSS	U24
VSS	U24
VSS	U27
VSS	U27
VSS	V14
VSS	V14
VSS	V16
VSS	V16
VSS	V18
VSS	V18
VSS	V28
VSS	V28
VSS	V29
VSS	V29
VSS	W13
VSS	W13
VSS	W2
VSS	W2
VSS	W23
VSS	W23
VSS	W25
VSS	W25
VSS	W26
VSS	W26
VSS	W28
VSS	W28
VSS	W30
VSS	W30
VSS	W4
VSS	W4
VSS	W5
VSS	W5
VSS	W6
VSS	W6
VSS	W7
VSS	W7
VSS	Y28
VSS	Y28
VSS	Y3
VSS	Y3
VSS	Y4
VSS	Y4
VSS
VSS	T29
VSS
			Quanta Computer Inc.
			PROJECT : ZE6
	Size	Document Number				Rev
		Pineview GND				1B
		Pineview GND
	Date:	Friday, March 11, 2011	Sheet	7	of	35
	1

[4] DMI_RXN0 [4] DMI_RXP0

[4] DMI_TXN0

[4] DMI_TXP0 [4] DMI_RXN1

[4] DMI_RXP1 [4] DMI_TXN1 [4] DMI_TXP1

LAN	[18]	PE1RX-
LAN	[18]	PE1RX+
	[18]	PE1TX-
	[18]	PE1TX+
WLAN	[20]	PE2RX-
WLAN	[20]	PE2RX+
	[20]	PE2TX-
	[20]	PE2TX+
	[21]	PE3RX-
Card Reader	[21]	PE3RX+
Card Reader	[21]	PE3TX-
A	[21]	PE3TX+
	[20]	PE4RX-
3G	[20]	PE4RX+
3G	[20]	PE4TX-
	[20]	PE4TX+

+1.5V

R23

R24 C53 0.1U/10V_4 DMI_TXN0_C P21 C46 0.1U/10V_4 DMI_TXP0_C P20

T21

T20 C65 0.1U/10V_4 DMI_TXN1_C T24 C59 0.1U/10V_4 DMI_TXP1_C T25

T19

T18

U23

U24

V21

V20

V24

V23

K21

K22 C259 0.1U/10V_4 PCIE_TXN1_C J23

C262 0.1U/10V_4 PCIE_TXP1_C J24 M18

M19 C263 0.1U/10V_4 PCIE_TXN2_C K24

C266 0.1U/10V_4 PCIE_TXP2_C K25

L23

L24 C270 0.1U/10V_4 PCIE_TXN3_C L22

C268 0.1U/10V_4 PCIE_TXP3_C M21

P17

P18

C271 *3G@0.1U/10VPCIE4 _TXN4_C N25

C274 *3G@0.1U/10VPCIE4 _TXP4_C N24

R78	24.9/F_4 DMI_COMP	H24
		J22
[2] CLK_PCIE_ICH#		W23
[2]	CLK_PCIE_ICH	W24

U20B

DMI0RXN

DMI0RXP

DMI0TXN

DMI0TXP

DMI1RXN

DMI1RXP

DMI1TXN

DMI1TXP

DMI2RXN

DMI2RXP

DMI2TXN

DMI2TXP

DMI3RXN

DMI3RXP

DMI3TXN

DMI3TXP

PERN1

PERP1

PETN1

PETP1

PERN2

PERP2

PETN2

PETP2

PERN3

PERP3

PETN3

PETP3

PERN4

PERP4

PETN4

PETP4

DMI_ZCOMP DMI_IRCOMP

DMI_CLKN

DMI_CLKP

Tiger Point

TGP

DMI

USB

E-PCI

			0110 : exchange USB port 1 and port 3
			to fix charger port will auto wake up issue.
USBP0N	H7		USBP0-	[17]	SYSTEM (Right down)
USBP0P	H6		USBP0+	[17]	SYSTEM (Right down)
USBP0P	H3		USBP0+	[17]
USBP1N	H3		USBP1-	[17]	SYSTEM (Right up)
USBP1N	H2		USBP1-	[17]
USBP1P	H2		USBP1+	[17]
USBP1P	J2		USBP1+	[17]
USBP2N	J2		USBP2-	[14]	CCD
USBP2N	J3		USBP2-	[14]
USBP2P	J3		USBP2+	[14]
USBP2P	K6		USBP2+	[14]
USBP3N	K6		USBP3-	[17]	SYSTEM (Left)
USBP3N	K5		USBP3-	[17]
USBP3P	K5		USBP3+	[17]
USBP3P	K1		USBP3+	[17]
USBP4N	K1		USBP4-	[20]	SIM
USBP4N	K2		USBP4-	[20]
USBP4P	K2		USBP4+	[20]
USBP4P	L2		USBP4+	[20]
USBP5N	L2		USBP5-	[20]	3G
USBP5N	L3		USBP5-	[20]
USBP5P	L3		USBP5+	[20]
USBP5P	M6		USBP5+	[20]
USBP6N	M6		USBP6-	[15]	BT
USBP6N	M5		USBP6-	[15]
USBP6P	M5		USBP6+	[15]
USBP6P	N1		USBP6+	[15]
USBP7N	N1		USBP7-	[20]	WLAN
USBP7N	N2		USBP7-	[20]
USBP7P	N2		USBP7+	[20]
USBP7P			USBP7+	[20]
OC0#	D4	USBOC#R_1	R303	*0/short_4	USBOC#R	[17,22]	USBOC#R_1	R305	8.2K_4	+3V_S5
OC1#	C5	USBOC#L_1	R297	*0/short_4	USBOC#L	[17,22]
OC1#	D3	USBOC#			USBOC#L	[17,22]	USBOC#L_1	R298	8.2K_4
OC2#	D3	USBOC#					USBOC#L_1	R298	8.2K_4
OC2#	D2	USBOC#R_1
OC3#	D2	USBOC#R_1
OC3#	E5	USBOC#					USBOC#	R306	1K/F_4
OC4#	E5	USBOC#					USBOC#	R306	1K/F_4
OC4#	E6	USBOC#
OC5#/GPIO29	E6	USBOC#
OC5#/GPIO29	C2	USBOC#
OC6#/GPIO30	C2	USBOC#
OC6#/GPIO30	C3	USBOC#
OC7#/GPIO31	C3	USBOC#
OC7#/GPIO31
USBRBIAS	G2	USBRBIAS	R314	22.6/F_4
USBRBIAS	G3									A
USBRBIAS#	G3									A
USBRBIAS#
		placed within 500 mil of the chipset
CLK48	F4	CLKUSB_48	CLKUSB_48 [2]
CLK48			CLKUSB_48 [2]
			CLKUSB_48
			R309
2			*10/F_4
2
			C258
			*10P/50V_4

		Quanta Computer Inc.
		PROJECT : ZE6
Size	Document Number			Rev
	Tiger Point DMI/PCIE/USB			1B
	Tiger Point DMI/PCIE/USB
Date:	Friday, March 11, 2011		Sheet 8 of 35

			U20C	TGP
D		R12	RSVD03
D		AE20	RSVD03
		AE20	RSVD04
		AD17	RSVD04
		AD17	RSVD05
		AC15	RSVD05
		AC15	RSVD06
		AD18	RSVD06
		AD18	RSVD07
		Y12	RSVD07
		Y12	RSVD08
		AA10	RSVD08
		AA10	RSVD09
		AA12	RSVD09
		AA12	RSVD10
		Y10	RSVD10	SATA
		Y10	RSVD11
		AD15	RSVD11
		W10	RSVD12
		W10	RSVD13
		V12	RSVD13
		V12	RSVD14
		AE21	RSVD14
		AE21	RSVD15
		AE18	RSVD15
		AE18	RSVD16
		AD19	RSVD16
		AD19	RSVD17
		U12	RSVD17
		U12	RSVD18
			RSVD18
		AC17	RSVD19
C		AB13	RSVD19
C		AB13	RSVD20
		AC13	RSVD20
		AC13	RSVD21
		AB15	RSVD21
		AB15	RSVD22
		Y14	RSVD22
		Y14	RSVD23
			RSVD23
		AB16	RSVD24
		AE24	RSVD24
		AE24	RSVD25
		AE23	RSVD25
		AE23	RSVD26
			RSVD26
		AA14	RSVD27
		V14	RSVD27
		V14	RSVD28
			RSVD28
		AD16	RSVD29
		AB11	RSVD29	HOST
		AB11	RSVD30
		AB10	RSVD30
B	PCH_GPIO36	AB10	RSVD31
	PCH_GPIO36	AD23	GPIO36
			GPIO36

	Tiger Point
	NOTE
A	1. CPUSLP# is supported only on nettop platforms.
A

SATA0RXN

AE6

SATA_RXN0

[19]

SATA0RXP

AD6

SATA_RXP0

[19]

SATA HDD

SATA0TXN

AC7

SATA_TXN0

[19]

SATA0TXP

AD7

SATA_TXP0 [19]

AE8

SATA1RXN

AD8

SATA1RXP

<20090514(A1A)_Checklist Rev0.7>

AD9

SATA1TXN

AC9

SERIRQ:8.2K pull-up

SATA1TXP

A20GATE:10K pull-up

+3V

SERIRQ

R107

8.2K_4

GA20

R108

10K_4

KBRST#

R338

10K/J_4

PCH_GPIO36

R339

*10K/J_4

SATA_CLKN

AD4

CLK_PCIE_SATA# [2]

AC4

Close to pin within 500mil

SATA_CLKP

CLK_PCIE_SATA [2]

Close to pin within 200mil

SATARBIAS#

AD11

SATARBIAS#

R335

24.9/F_4

AC11

SATARBIAS

SATALED#

AD25

SATALED# [15]

SATALED#

R340

10K/J_4

+3V

GA20

+1.05V

A20GATE

U16

GA20

[22]

Close to pin

A20M#

Y20

H_A20M#

[4]

Y21

CPUSLP#

R84

Y18

H_IGNNE# [4]

IGNNE#

AD21

56/J_4

INIT3_3V#

+1.05V

AC25

H_INIT#

[4]

INIT#

Close to pin within 1"

AB24

INTR

H_INTR

[4]

Y22

H_FERR#

[4]

FERR#

NMI

T17

H_NMI

[4]

R103

AC21 KBRST#

RCIN#

KBRST#

[22]

SERIRQ

AA16

SERIRQ

[22]

56/J_4

AA21

SMI#

H_SMI#

[4]

V18

STPCLK#

H_STPCLK#

[4]

AA20

PM_THRMTRIP# [4]

THERMTRIP#

Quanta Computer Inc.

PROJECT : ZE6

Size

Document Number

Rev

Tiger Point Sata/Host

Date:

Friday, March 11, 2011

Sheet 9 of 35

						U20A	TGP
			PCI_DEVSEL#		A5	PAR		AD0	B22
					B15	PAR		AD0	D18
					B15	DEVSEL#		AD1	D18
[2]	PCLK_ICH				J12	DEVSEL#		AD1	C17
[2]	PCLK_ICH			T27	J12	PCICLK		AD2	C17
				T27	A23	PCIRST#		AD3	C18
			PCI_IRDY#		B7	PCIRST#		AD3	B17
			PCI_IRDY#		B7	IRDY#		AD4	B17
					C22	IRDY#		AD4	C19
			PCI_SERR#		C22	PME#		AD5	C19
					B11	PME#		AD5	B18
					B11	SERR#		AD6	B18
			PCI_STOP#		F14	SERR#		AD6	B19
			PCI_STOP#		F14	STOP#		AD7	B19
			PCI_LOCK#		A8	STOP#		AD7	D16
			PCI_LOCK#		A8	PLOCK#		AD8	D16
			PCI_TRDY#		A10	PLOCK#	PCI	AD8	D15
			PCI_TRDY#		A10	TRDY#	PCI	AD9	D15
			PCI_PERR#		D10	TRDY#		AD9	A13
			PCI_PERR#		D10	PERR#		AD10	A13
			PCI_FRAME#		A16	PERR#		AD10	E14
			PCI_FRAME#		A16	FRAME#		AD11	E14
						FRAME#		AD11	H14
<20090601(A1A)_Checklist Rev0.7>								AD12	H14
								AD12	L14
								AD13	L14
Strap1#/strap2#: signals have weak								AD13	J14
internal pull-ups				T26				AD14	J14
internal pull-ups					A18			AD14	E10
					A18	GNT1#		AD15	E10
				T31	E16	GNT1#		AD15	C11
				T31	E16	GNT2#		AD16	C11
						GNT2#		AD16	E12
			PCI_REQ1#					AD17	E12
					G16			AD17	B9
					G16	REQ1#		AD18	B9
			PCI_REQ2#		A20	REQ1#		AD18	B13
			PCI_REQ2#		A20	REQ2#		AD19	B13
						REQ2#		AD19	L12
								AD20	L12
								AD20	B8
			PCH_GPIO48					AD21	B8
					G14			AD21	A3
					G14	GPIO48/ STRAP1#		AD22	A3
			PCH_GPIO17		A2	GPIO48/ STRAP1#		AD22	B5
			PCH_GPIO17		A2	GPIO17/ STRAP2#		AD23	B5
			PCH_GPIO22		C15	GPIO17/ STRAP2#		AD23	A6
		EC_SCI#	PCH_GPIO22		C15	GPIO22		AD24	A6
[22] EC_SCI#					C9	GPIO22		AD24	G12
						GPIO1		AD25
						GPIO1		AD25
								AD26	H12
								AD26	C8
								AD27	C8
								AD27	D9
			PCI_INTA#					AD28	D9
					B2			AD28	C7
					B2	PIRQA#		AD29	C7
			PCI_INTB#		D7	PIRQA#		AD29	C1
			PCI_INTB#		D7	PIRQB#		AD30	C1
			PCI_INTC#		B3	PIRQB#		AD30	B1
			PCI_INTC#		B3	PIRQC#		AD31	B1
			PCI_INTD#		H10	PIRQC#		AD31
			PCI_INTD#		H10	PIRQD#
			PCI_INTE#		E8	PIRQD#
			PCI_INTE#		E8	PIRQE#/GPIO2
			PCI_INTF#		D6	PIRQE#/GPIO2
			PCI_INTF#		D6	PIRQF#/GPIO3
			PCI_INTG#		H8	PIRQF#/GPIO3			H16
			PCI_INTG#		H8	PIRQG#/GPIO4		C/BE0#	H16
			PCI_INTH#		F8	PIRQG#/GPIO4		C/BE0#	M15
			PCI_INTH#		F8	PIRQH#/GPIO5		C/BE1#	M15
						PIRQH#/GPIO5		C/BE1#	C13
		T38	PCH_A16WP					C/BE2#	C13
					D11			C/BE2#	L16
					D11	STRAP0#		C/BE3#	L16
	+3V	R271		10K/J_4	K9	STRAP0#		C/BE3#
		R271		10K/J_4	K9	RSVD01
		R73		8.2K/J_4	M13	RSVD01
		R73		8.2K/J_4	M13	RSVD02
						RSVD02
								1
						Tiger Point
ICH Boot BIOS select
PCH_GPIO17		PCH_GPIO48
(INT PU)		(INT PU)			Boot BIOS Location
	0	1		SPI
	1	0		PCI
	1	1		LPC (Default)
*1K_4	R71	PCH_GPIO48		*1K_4	R72		+3V
*1K_4	R299	PCH_GPIO17		*1K_4	R300		+3V
*1K_4	R299	PCH_GPIO17		*1K_4	R300

PCI_INTA#	RP4	1	2	8.2K_8P4R	+3V	10
PCI_INTC#		3	4
PCI_INTF#		5	6
PCI_INTB#		7	8
PCI_IRDY#	RP3	1	2	8.2K_8P4R	+3V
PCI_LOCK#		3	4		+3V
PCI_LOCK#		3	4
PCI_PERR#		5	6
PCI_TRDY#		7	8
PCI_DEVSEL#RP5		1	2	8.2K_8P4R	+3V
PCI_FRAME#		3	4		+3V
PCI_FRAME#		3	4
PCI_REQ1#		5	6
PCI_REQ2#		7	8
PCI_STOP#		R272		8.2K/J_4	+3V
PCI_SERR#		R283		8.2K/J_4	+3V
PCI_SERR#		R283		8.2K/J_4
EC_SCI#		R54		10K_4
PCI_INTD#		RP1	2	8.2K_8P4R
PCI_INTH#		1	2		+3V
		3	4		+3V
		3	4
PCI_INTG#		5	6
PCI_INTE#		7	8

PCH_GPIO22	8.2K_4			R284	+3V
					+3V

IRQ			Description
IRQ


PIRQA	USB UHCI Controller #1, #4
PIRQB	AC'97 Codec; option for SMBUS
PIRQC	USB UH Controller #3; SATA/IDE Native Mode
PIRQD	USB UHCI Controller #2
PIRQE	Internal LAN; Option for SCI, TCO, HPET#0,1,2
PIRQF	Option for SCI, TCO, HPET#0,1,2
PIRQG	Option for SCI, TCO, HPET#0,1,2
PIRQH	USB EHCI Controller; Option for SCI, TCO, HPET#0,1,2


PCI_GNT#2		Internal PU
			Should not be PD

A16 SWAP Override strap

PCH_A16WP	Low = A16 swap override enabled
(INT PU)	High = Default
	High = Default

		Quanta Computer Inc.
		PROJECT : ZE6
Size	Document Number			Rev
	TigerPoint PCI(3/6)			1B
	TigerPoint PCI(3/6)
Date:	Friday, March 11, 2011		Sheet 10 of 35

<20090515(A1A)_Checklist Rev0.7>

EMI

BATLOW#:8.2K pull-up to V3ALWAYS

TGP

WAKE#:10K pull-up to VccSus3_3

14M_ICH

U20D

SYS_RST#:10K pull-up to VccSus3_3

T18

AA5

LDRQ1#/GPIO23

BM_BUSY#/GPIO0

T15

BM_BUSY#

+3V_S5

R327

[20,22]

LPCAD0

W16

PCH_GPIO6

T20

LAD0/FWH0

LPC

GPIO6

*33/J_4

AA6

W14

PCH_GPIO7

PCLK_SMB

R273

2.2K_4

[20,22]

LPCAD1

LAD1/FWH1

GPIO7

T19

[20,22]

LPCAD2

LAD2/FWH2

GPIO8

K18

EC_SMI#

[22]

PDAT_SMB

R288

2.2K_4

H19

PCH_GPIO9

PCH_GPIO10

R277

8.2K_4

[20,22]

LPCAD3

LAD3/FWH3

GPIO9

T17

M17

PCH_GPIO10

PM_BATLOW#

R282

8.2K_4

LDRQ0#

GPIO10

[20,22]

LPCFRAME#

A24

PCH_GPIO12

THERM_ALERT#

R104

8.2K_4

LFRAME#

GPIO12

C285

C23

PCH_GPIO13

DNBSWON#

R276

*10K_4

GPIO13

*10P/50V_4

[16]

ACZ_BITCLK_AUDIO

R321

33/J_4

ACZ_BITCLK_R

PCH_GPIO14

PCH_GPIO9

R275

8.2K_4

HDA_BIT_CLK

GPIO14

R316

33/J_4

ACZ_RST#_R

AUDIO

E24

PCH_GPIO15

[16]

[16] ACZ_SDIN0

HDA_SDI0

DPRSLPVR

PM_DPRSLPVR

[4,26]

EC_SMI#

R286

10K_4

AB20

ACZ_RESET#_AUDIO

HDA_RST#

GPIO15

HDA_SDIN1

STP_PCI#

Y16

PM_STPPCI# [2]

SYS_RST#

R274

10K_4

AB19

SMBALERT#

R285

10K_4

R324

33/J_4

ACZ_SDOUT_R

HDA_SDIN2

STP_CPU#

PCH_GPIO24

PM_STPCPU#

[2]

[16] ACZ_SDOUT_AUDIO

AA1

HDA_SDOUT

GPIO24

T44

SMB_LINK_ALERT#

R278

10K_4

debug port for google require

[16]

ACZ_SYNC_AUDIO

R323

33/J_4

ACZ_SYNC_R

HDA_SYNC

GPIO25

C24

DMI_AC_ENABLE

1C: Intel suggestion enable AC mode

PCIE_WAKE#

R296

10K_4

14M_ICH

AA3

D19

PCH_GPIO26

SMLINK1

R304

10K_4

[2] 14M_ICH

CLK14

GPIO26

T28

D20

PCH_GPIO27

SMLINK0

R308

10K_4

EPROM

GPIO27

F22

PCH_GPIO28

T32

PCH_GPIO15

R301

8.2K_4

EE_DIN

CLKRUN#

[22]

U14

PCH_GPIO33

PCH_GPIO12

R289

10K/J_4

AE2

EE_CS

GPIO28

AC19 CLKRUN#

T11

ICH_RI#

R279

10K_4

<20090529(A1A)_Checklist Rev0.7>

EE_DOUT

GPIO33

AC1

MBID0

T16

PCH_GPIO13

R287

10K/J_4

If integrated LAN is not used

EE_SHCLK

GPIO34

AC23 MBID1

PCH_GPIO14

R317

10K/J_4

GPIO38

LAN_RST# tie it to GND.

AC24 MBID2

LAN_CLK

GPIO39

LANR_STSYNC

+3V

B23

AB22

H_PWRGD

[4]

C279

15P/50V_4

LAN_RST#

CPUPWRGD/GPIO49

AA2

LAN_RXD0

LAN

AD1

AB17

THERM_ALERT#

[4,22]

LAN_RXD1

THRM#

AC2

LAN_RXD2

MISC

VRMPWRGD

V16

VR_PWRGD_CK410

[2]

R320

AC18 MCH_SYNC#

MCH_SYNC#

R337

1K/F_4

LAN_TXD0

MCH_SYNC#

DNBSWON# [22,23]

32.768KHz,+-20PPM

10M/J_4

LAN_TXD1

PWRBTN#

E21

DNBSWON#

CLKRUN#

R106

8.2K_4

H23

ICH_RI#

BM_BUSY#

R333

8.2K_4

LAN_TXD2

RI#

G22

T42

RTC_X1 W4

SUS_STAT#/LPCPD#

SUSCLK

RTCX1

RTC

SUSCLK

D22

SUSCLK [22]

C275

15P/50V_4

RTC_X2 V5

G18

SYS_RST#

RTCRST#

RTCX2

SYS_RESET#

G23

PLT_RST#

VCCRTC

DMI_AC_ENABLE

R290

1K_4

RTCRST#

PLTRSTB

C25

PCIE_WAKE#

[18,20]

SMBALERT#

E20

WAKE#

1M/F_6

TPT_PWROK

R336

10K_4

SMBALERT#/GPIO11

INTRUDER#

SM_INTRUDER#

R347

[2,20]

PCLK_SMB

H18

U10

TPT_PWROK

SMBCLK

SMB

PWROK

PDAT_SMB

E23

AC3

EC_RSMRST#

[22,23]

EC_RSMRST#

R334

10K_4

[2,20]

PDAT_SMB

SMBDATA

RSMRST#

SMB_LINK_ALERT# H21

SMLALERT#

INTVRMEN

AD3

ICH_INTVRMEN

SMLINK0

F25

J16

SB_BEEP [16]

R331

332K/F_4

SMLINK0

SPKR

SMLINK1

F24

SMLINK1

H20

SLP_S3#

SUSB#

[22]

T43

E25

SPI_MISO

SLP_S4#

SUSC#

[22]

T46

F21

SPI_MOSI

SPI

SLP_S5#

T12

T14

SPI_CS#

PM_BATLOW#

T15

B25

SPI_CLK

BATLOW#

T45

AB23

ICH_DPRSTP#

[4,26]

SPI_ARB

DPRSTP#

+3V

AA18

DPSLP#

H_DPSLP#

[4]

F20

RSVD31

Tiger Point

R329

R343

R342

10K_4

*10K_4

MBID2

<20090721(B2A)>

MBID1

Stuff U19 and C275 and un-stuff R205 for power sequence

MBID0

Platform Reset

TPT Power OK

R328

R332

R330

RTC(RTC)

+3V

*10K_4

10K_4

*10K_4

C252 *0.1u/10V_4

C98

*0.1u/10V_4

+3V

VCCRTC

U17

D33

C293

*TC7SH08FU

PLT_RST#

*TC7SH08FU

[22,23] HWPG

TPT_PWROK

+3VPCU

TPT_PWROK [23]

PLTRST#

[4,18,20,21,22,23]

[4,23,26] IMVP_PWRGD

CH500H-40

1u/10V_6

D32	R344					R307	3
D32	R344		RTCRST#		3	R307
VCCRTC_3			RTCRST#			100K_4
CH500H-40	20K/F_6			G1		100K_4
CH500H-40	20K/F_6	C288	1	G1
		C288

R135 0_4

1u/10V_6		R302	*0/short_4
R354	2	*SHORT_PAD
1K_4

[22,23] ECPWROK

R110

*0_4

20MIL			20MIL		+5V_S5
VCCRTC_4	1	3 VCCRTC_1 R160	2K/F_4 VCCRTC_2	R165	2K/F_4
	Q10					ACZ_SDOUT	ACZ_SYNC	Description
	MMBT39042				R161	(INT PD)	(INT PD)	Description
					R161
					68.1K/F_4
1						0	0	* 4 x 1s
						0	0	* 4 x 1s
CN5					R162	1	0	Reserved
RTC SOCKET					150K/F_4
					150K/F_4	0	1	Reserved
2						0	1	Reserved
						1	1	1 x 4s(1 port/4 lanes)

1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

INTVRMEN

	1	Enable internal VccSus1_5 VRM
	1	(default)
		(default)
	0	Disable


			Quanta Computer Inc.
			PROJECT : ZE6
Size	Document Number					Rev
		TigerPoint GPIO				1A
		TigerPoint GPIO
Date:	Friday, March 11, 2011			Sheet 11 of	35

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