Acer MA50, Aspire M3-581, Aspire M3-581T, Aspire M5-800 Schematic

5

4

3

2

1

MA50 Ultrabook Block Diagram Rev 1.0

D D

VRAM

Page 76,77

LCD Panel

Page 45

HDMI

Page 48

HDMI

GPU

nVidia N13PGL

Page 70~79

eDP

LVDS

PEG

CPU

Sandy Bridge

FDI

DMI x4

Debug Conn.

C C

Touchpad

EC

NPCE794LKeyboard

Page 44

Page 30Page 31

LPC

SPI ROM (4M+2M)

Page 28

PCH

Panther Point

FAN

Page 50

Speaker

B B

Page 37

Audio Jack (combo)

Page 37

Azalia Codec

ALC271

Page 38

Discharge Circuit

Page 57

Reset Circuit

Page 32

Azalia

DC & BATT. Conn.

Page 60

Skew Holes

Page 65

USB 3.0

1

A A

Page 3~11

USB 2.0

10

4

2

3

1

Page 20~28

DDR3 1333MHz

PCIEx1

SATA

CMOS Camera

Bluetooth

USB Port(2)

USB Port(3)

Page 61

Page 52

Charger

DDR3 SO-DIMM

&

Memory Down

3

Page 45

Page 52

Page 16~18

0

MiniCard (HALF)

2

WLAN + BT

Broadcom

4

BCM57780

Realtek

1

RTS5209

MiniCard (FULL)

1 0

SSD (mSATA)

0

2

USB Port(1)

Page 33

Page 40

HDD

ODD

Page 52

Page 53

GigaLAN

CardReader

Page 53

Page 51

2 IN 1

RJ45

Page 34

Power

+VCC_CORE +VGFX_CORE

System

VTT

DDR3

+1.8VS

+VCCSA

+VGA_CORE

Charger

Detect

Load Switch

Page 80

Page 81

Page 82

Page 83

Page 84

Page 85

Page 87

Page 88

Page 90

Page 91

Power Protect

Page 92

Title :

Block Diagram

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

1 93Monday, February 13, 2012

PCH_CPT GPIO

D D

C C

B B

A A

5

PCH_CPT GPIO

GPIO 00 GPIO 01

GPIO [2:5]

GPIO 06 GPIO 07 GPIO 08 GPIO 09 GPIO 10 GPIO 11 GPIO 12 GPIO 13 GPIO 14 GPIO 15 GPIO 16 GPIO 17 GPIO 18 GPIO 19 GPIO 20 GPIO 21 GPIO 22 GPIO 23 GPIO 24 GPIO 25 GPIO 26 GPIO 27 GPIO 28 GPIO 29 GPIO 30

GPIO 31 GPIO 32 GPIO 33 GPIO 34 GPIO 35 GPIO 36 GPIO 37 GPIO 38 GPIO 39 GPIO 40 GPIO 41 GPIO 42 GPIO 43 GPIO 44 GPIO 45 GPIO 46 GPIO 47 GPIO 48 GPIO 49

GPIO 50 GPIO 51 GPIO 52 GPIO 53 GPIO 54 GPIO 55 GPIO 56 GPIO 57 GPIO 58 GPIO 59 GPIO 60 GPIO 61 GPIO 62 GPIO 63 GPIO 64 GPIO 65 GPIO 66 GPIO 67 GPIO 72 GPIO 73 GPIO 74 GPIO 75

5

Signal NameUse As Power

4

Internal & External Pull-up/down

4

EC NPCE795L

3

EC GPIO

GPA0 GPA1 GPA2 GPA3 GPA4 GPA5 GPA6 GPA7 GPB0 GPB1 GPB2 GPB3 GPB4 GPB5 GPB6 GPB7 GPC0 GPC1 GPC2 GPC3 GPC4 GPC5 GPC6 GPC7 GPD0 GPD1 GPD2 GPD3 GPD4 GPD5 GPD6 GPD7 GPE0 GPE1 GPE2 GPE3 GPE4 GPE5 GPE6 GPE7 GPF0 GPF1 GPF2 GPF3 GPF4 GPF5 GPF6 GPF7 GPG0 GPG1 GPG2 GPG6 GPH0 GPH1 GPH2 GPH3 GPH4 GPH5 GPH6 GPI0 GPI1 GPI2 GPI3 GPI4 GPI5 GPI6 GPI7 GPJ0 GPJ1 GPJ2 GPJ3 GPJ4 GPJ5

3

Use As Signal Name

2

1

SM_BUS ADDRESS :

SM-Bus Device

SO-DIMM 0

SO-DIMM 1

PCIE 1

N/A

PCIE 2

Minicard WLAN

PCIE 3

PCIE 4

USB3.0

PCIE 5

N/A

PCIE 6

GLAN

PCIE 7

N/A

PCIE 8

N/A

SATA0

SATA HDD

SATA1

N/A

SATA2

SATA ODD

SATA3

N/A

N/ASATA4

SATA5

N/A

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

2

Date: Sheet of

SM-Bus Address

1010000x ( A0h )

1010001x ( A4h )

USB 0

USB Port (1)

USB 1

USB Port (2)

USB 2

USB 3.0 Port (3)N/A

USB 3

USB Port (4)

USB 4

N/A

USB 5

N/A

USB 6

N/A

USB 7

N/A

USB 8

CMOS Camera

USB 9

WLAN

USB 10

Card Reader

USB 11

N/A

USB 12

N/A

USB 13

MA50

Title :

Engineer:

1

System Setting

Joyoung_Chianhg

2 93Monday, February 13, 2012

Rev

1.0

5

D D

4

3

2

+VCCP

+VCCP 4,6,7,30,32,57,82

1

U0301A

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

AA11 AC12

AA10

AG11

AE11

AE10

P10

P11

W11

W1 AA6 W6

AC9

W10

W3 AA7 W7

AA3 AC8

U11

AG8

AF3 AD2

AG4

AF4

AC3 AC4

AE7

AC1 AA4

AE6

M2

P6 P1

N3

P7 P3

K1 M8 N4 R2

K3 M7

P4

T3

U7

V4

Y2

U6

T4

DMI_RX#[0] DMI_RX#[1] DMI_RX#[2] DMI_RX#[3]

DMI_RX[0] DMI_RX[1] DMI_RX[2] DMI_RX[3]

DMI_TX#[0] DMI_TX#[1] DMI_TX#[2] DMI_TX#[3]

DMI_TX[0] DMI_TX[1] DMI_TX[2] DMI_TX[3]

FDI0_TX#[0] FDI0_TX#[1] FDI0_TX#[2] FDI0_TX#[3] FDI1_TX#[0] FDI1_TX#[1] FDI1_TX#[2] FDI1_TX#[3]

FDI0_TX[0] FDI0_TX[1] FDI0_TX[2] FDI0_TX[3] FDI1_TX[0] FDI1_TX[1] FDI1_TX[2] FDI1_TX[3]

FDI0_FSYNC FDI1_FSYNC

FDI_INT

FDI0_LSYNC FDI1_LSYNC

eDP_COMPIO eDP_ICOMPO eDP_HPD

eDP_AUX# eDP_AUX

eDP_TX#[0] eDP_TX#[1] eDP_TX#[2] eDP_TX#[3]

eDP_TX[0] eDP_TX[1] eDP_TX[2] eDP_TX[3]

ES1

01V010000003

DMI Intel(R) FDI DP

PCI EXPRESS -- GRAPHICS

DMI_TXN022 DMI_TXN122 DMI_TXN222 DMI_TXN322

DMI_TXP022 DMI_TXP122 DMI_TXP222 DMI_TXP322

DMI_RXN022 DMI_RXN122 DMI_RXN222 DMI_RXN322

DMI_RXP022 DMI_RXP122 DMI_RXP222 DMI_RXP322

1 2 1 2

FDI_TXN[7:0]22

FDI_TXP[7:0]22

FDI_FSYNC022 FDI_FSYNC122

FDI_INT22

FDI_LSYNC022 FDI_LSYNC122

DP_COMP

12

R030310KOhm /LVDS R030310KOhm /LVDS R03151KOhm /eDP R03151KOhm /eDP

C C

+VCCP

DP_HPD#_PCH45

DP_AUXN_PCH45

B B

DP_AUXP_PCH45

DP_TXN0_PCH45 DP_TXN1_PCH45

DP_TXP0_PCH45 DP_TXP1_PCH45

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]

PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

G3 G1 G4

H22 J21 B22 D21 A19 D17 B14 D13 A11 B10 G8 A8 B6 H8 E5 K7

K22 K19 C21 D19 C19 D16 C13 D12 C11 C9 F8 C8 C5 H6 F6 K6

G22 C23 D23 F21 H19 C17 K15 F17 F14 A15 J14 H13 M10 F10 D9 J4

F22 A23 D24 E21 G19 B18 K17 G17 E14 C15 K13 G13 K10 G10 D8 K4

PEG_COMP

PCIENB_RXN15 PCIENB_RXN14 PCIENB_RXN13 PCIENB_RXN12 PCIENB_RXN11 PCIENB_RXN10 PCIENB_RXN9 PCIENB_RXN8 PCIENB_RXN7 PCIENB_RXN6 PCIENB_RXN5 PCIENB_RXN4 PCIENB_RXN3 PCIENB_RXN2 PCIENB_RXN1 PCIENB_RXN0

PCIENB_RXP15 PCIENB_RXP14 PCIENB_RXP13 PCIENB_RXP12 PCIENB_RXP11 PCIENB_RXP10 PCIENB_RXP9 PCIENB_RXP8 PCIENB_RXP7 PCIENB_RXP6 PCIENB_RXP5 PCIENB_RXP4 PCIENB_RXP3 PCIENB_RXP2 PCIENB_RXP1 PCIENB_RXP0

PCIENB_TXN0

CX0301 0.22UF/10V /DGPUCX0301 0.22UF/10V /DGPU

PCIENB_TXN1

CX0302 0.22UF/10V /DGPUCX0302 0.22UF/10V /DGPU

PCIENB_TXN2

CX0303 0.22UF/10V /DGPUCX0303 0.22UF/10V /DGPU

PCIENB_TXN3

CX0304 0.22UF/10V /DGPUCX0304 0.22UF/10V /DGPU

PCIENB_TXN4

CX0305 0.22UF/10V /DGPUCX0305 0.22UF/10V /DGPU

PCIENB_TXN5

CX0306 0.22UF/10V /DGPUCX0306 0.22UF/10V /DGPU

PCIENB_TXN6

CX0307 0.22UF/10V /DGPUCX0307 0.22UF/10V /DGPU

PCIENB_TXN7

CX0308 0.22UF/10V /DGPUCX0308 0.22UF/10V /DGPU

PCIENB_TXN8

CX0309 0.22UF/10V /DGPUCX0309 0.22UF/10V /DGPU

PCIENB_TXN9

CX0310 0.22UF/10V /DGPUCX0310 0.22UF/10V /DGPU

PCIENB_TXN10

CX0311 0.22UF/10V /DGPUCX0311 0.22UF/10V /DGPU

PCIENB_TXN11

CX0312 0.22UF/10V /DGPUCX0312 0.22UF/10V /DGPU

PCIENB_TXN12

CX0313 0.22UF/10V /DGPUCX0313 0.22UF/10V /DGPU

PCIENB_TXN13

CX0314 0.22UF/10V /DGPUCX0314 0.22UF/10V /DGPU

PCIENB_TXN14

CX0315 0.22UF/10V /DGPUCX0315 0.22UF/10V /DGPU

PCIENB_TXN15

CX0316 0.22UF/10V /DGPUCX0316 0.22UF/10V /DGPUR030224.9Ohm 1% R030224.9Ohm 1%

PCIENB_TXP0

CX0317 0.22UF/10V /DGPUCX0317 0.22UF/10V /DGPU

PCIENB_TXP1

CX0318 0.22UF/10V /DGPUCX0318 0.22UF/10V /DGPU

PCIENB_TXP2

CX0319 0.22UF/10V /DGPUCX0319 0.22UF/10V /DGPU

PCIENB_TXP3

CX0320 0.22UF/10V /DGPUCX0320 0.22UF/10V /DGPU

PCIENB_TXP4

CX0321 0.22UF/10V /DGPUCX0321 0.22UF/10V /DGPU

PCIENB_TXP5

CX0322 0.22UF/10V /DGPUCX0322 0.22UF/10V /DGPU

PCIENB_TXP6

CX0323 0.22UF/10V /DGPUCX0323 0.22UF/10V /DGPU

PCIENB_TXP7

CX0324 0.22UF/10V /DGPUCX0324 0.22UF/10V /DGPU

PCIENB_TXP8

CX0325 0.22UF/10V /DGPUCX0325 0.22UF/10V /DGPU

PCIENB_TXP9

CX0326 0.22UF/10V /DGPUCX0326 0.22UF/10V /DGPU

PCIENB_TXP10

CX0327 0.22UF/10V /DGPUCX0327 0.22UF/10V /DGPU

PCIENB_TXP11

CX0328 0.22UF/10V /DGPUCX0328 0.22UF/10V /DGPU

PCIENB_TXP12

CX0329 0.22UF/10V /DGPUCX0329 0.22UF/10V /DGPU

PCIENB_TXP13

CX0330 0.22UF/10V /DGPUCX0330 0.22UF/10V /DGPU

PCIENB_TXP14

CX0331 0.22UF/10V /DGPUCX0331 0.22UF/10V /DGPU

PCIENB_TXP15

CX0332 0.22UF/10V /DGPUCX0332 0.22UF/10V /DGPU

R0301 24.9Ohm1%R 0301 24.9Ohm1%

1 2

PCIENB_RXN[15:0] 70

PCIENB_RXP[15:0] 70

+VCCP

PCIEG_RXN15 PCIEG_RXN14 PCIEG_RXN13 PCIEG_RXN12 PCIEG_RXN11 PCIEG_RXN10 PCIEG_RXN9 PCIEG_RXN8 PCIEG_RXN7 PCIEG_RXN6 PCIEG_RXN5 PCIEG_RXN4 PCIEG_RXN3 PCIEG_RXN2 PCIEG_RXN1 PCIEG_RXN0

PCIEG_RXP15 PCIEG_RXP14 PCIEG_RXP13 PCIEG_RXP12 PCIEG_RXP11 PCIEG_RXP10 PCIEG_RXP9 PCIEG_RXP8 PCIEG_RXP7 PCIEG_RXP6 PCIEG_RXP5 PCIEG_RXP4 PCIEG_RXP3 PCIEG_RXP2 PCIEG_RXP1 PCIEG_RXP0

R2.1 01/09

PCIEG_RXN[15:0] 70

PCIEG_RXP[15:0] 70

A A

CPU(1)_DMI,DP,PEG,FDI

Title :

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

3 93Monday, February 13, 2012

5

U0301B

BE45

F49

C57

C49

A48

C45

D45

C48

B46

D44

ES1

01V010000003

PROC_SELECT#

PROC_DETECT#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

H_SNB_IVB#25

T0401T0401

1

T0402T0402

D D

+VCCP

H_THRMTRIP#25,32

H_PM_SYNC22

H_CPUPWRGD25

PM_DRAM_PWRGD22

BUF_PLT_RST#24,30,32,33,53,59,70

C C

1

H_PECI25

5%

12

R040462Ohm5%R040462Ohm

H_PROCHOT# H_PROCHOT#_D

R0406

NB_R0402_5MIL_SMALL

12

R040810KOhm R040810KOhm

R0407

NB_R0402_5MIL_SMALL

1 2

R0416 1.5KOhmR0416 1.5KOhm

TP_SKTOCC#_R

TP_CATERR#_R

5%

12

R040356Ohm

10V240000028

H_PM_SYNC_R

12

H_CPUPWRGD_RH_CPUPWRGD_RH_CPUPWRGD_RH_CPUPWRGD_R

12

VDDPWRGOOD_R

12

R0409130Ohm R0409130Ohm

R2.1

BUF_CPU_RST#

12

R0417

R0417 750Ohm

750Ohm

R1.0 0119 Sandy Bridge:R0417 = 750 ohm (10V220000093) Ivy Bridge:R0417 = 680 ohm (10V240000041)

4

CLK_EXP_P_R

J3

BCLK

CLK_EXP_N_R

MISC THERMAL PWR MANAGEMENT

DPLL_REF_CLK

DPLL_REF_CLK#

CLOCKS

SM_DRAMRST#

DDR3

MISC

DDR3

MISC

JTAG & BPM

BCLK#

BCLK_ITP

BCLK_ITP#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PRDY#

PREQ#

TRST#

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

H2

CLK_DP_P_R

AG3

CLK_DP_N_R

AG1

N59 N58

CLK_XDP_ITP_P CLK_XDP_ITP_N

AT30

SM_RCOMP_0

BF44

SM_RCOMP_1

BE43

SM_RCOMP_2

BG43

N53 N55

L56

TCK

L55

TMS

J58

M60

TDI

L59

TDO

K58

G58 E55 E59 G55 G59 H60 J59 J61

XDP_PRDY# XDP_PREQ#

XDP_TCK XDP_TMS XDP_TRST#

XDP_TDI XDP_TDO

XDP_DBRESET#

3

R04220Ohm R 04220Ohm

12

R04230Ohm R 04230Ohm

12

R0431 1KOhm/LVDSR0431 1KOhm/LVDS

1 2

R0430 1KOhm/LVDSR0430 1KOhm/LVDS

1 2

T0420T0420

1

T0421T0421

1

XDP_Debug

1%

1 2

R0418 140Ohm

1%

1 2

1%

R0419 25.5Ohm

1 2

R0420 200Ohm

T0404T0404

1

T0405T0405

1

T0406T0406

1

T0407T0407

1

T0408T0408

1

T0409T0409

1

T0410T0410

1

T0411T0411

1

XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

T0412T0412

1

T0413T0413

1

T0414T0414

1

T0415T0415

1

T0416T0416

1

T0417T0417

1

T0418T0418

1

T0419T0419

1

RN0401A 10VH40000001 RN0401B 10VH40000001

+VCCP

System Memory Impedance Compensation Huron River platform Design Guide 436735 P.88 Table 37.

1 2

0Ohm

3 4

0Ohm

CPUDRAMRST# 5

/eDPRN0401A 10VH40000001

/eDP /eDPRN0401B 10VH40000001

/eDP

DDR3 DRAM RESET

Remove XDP interface.

CLK_EXP_P 21 CLK_EXP_N 21

CLK_DP_P 21 CLK_DP_N 21

2

+1.5VS_VCCDDQ

+3VS

+3VSUS

+VCCP

+3V

+1.5VS_VCCDDQ 7

+3VS 17,20,21,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51, 53,57,59,61,80,91,92

+3VSUS 22,24,28,30,60,81,92

+VCCP 3,6,7,30,32,57,82

+3V 24,45,57,59,61,91

1

R.10 PU/PD for JTAG signals

XDP_TMS XDP_TDI XDP_TDO XDP_PREQ#

XDP_TCK XDP_TRST#

R0438 51OhmR0438 51Ohm

1 2

R0439 51OhmR0439 51Ohm

1 2

R0441 51Ohm

1 2

@

R0440 51Ohm

1 2

@

R0443 51OhmR0443 51Ohm

1 2

R0442 51OhmR0442 51Ohm

1 2

+VCCP

PM_SYS_PWRGD is the power good for +1.5V_VCCD DQ

12

R04600Ohm@R04600Ohm

@

+1.5VS_VCCDDQ

B B

R0451

PM_DRAM_PWRGD

If support S3 power reduction with power good.

1. Mount U0404, D0404, C0413, C0420, R0450, R0452, R0453, Unmount R0460

2. Change R0449 to 1kohm from 200ohm, change R0409 to 0ohm from 130ohm - Design Guide 1.0 page 106

A A

R0451

NB_R0402_5MIL_SMALL

5

12

R0449

200Ohm

1%

1.57 Volt

10V220000034

12

R0450

1KOhm

R2.1

R0452

12

1.1KOhm

1%

@

1%

+3VSUS

@

C0420

1 2

0.1UF/10V

0.1UF/10V U0404

U0404

5

VCC

@

12

Y

Vcc=2~5.5 @

+3VSUS

12

R0453

8.2KOhm@

A

1

B

2

34

GND

1 2

@

4

Different from EVEREST

RB751V-40

0.37V/30mA

D0404

C0413

1UF/6.3V

@

R1.1 add S3 power reduction

PM_PWROK 22,30,92

+1.05VS_PWRGD 82,92

VR_HOT#80

R1.0 0224 Intel Comments

3

H_PROCHOT#

C0401

47PF/50V

12

R04610Ohm@R04610Ohm

@

3

D

Q0401

1 2

@

Q0401 2N7002

2N7002

1

THRO_CPU

G

S

2

THRO_CPU 30

CPU(2)_CLK,MISC,JTAG

Title :

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

Joyoung_Chianhg

4 93Monday, February 13, 2012

Rev

1.0

5

4

3

2

1

+1.5V

U0301C

AP11

AR11

AT13 AU13

BA13 BB11

AY13 AV14 AR14 AY17 AR19 BA14 AU14 BB14 BB17 BA45 AR43

AW48

BC48 BC45 AR45 AT48 AY48 BA49 AV49 BB51 AY53 BB49 AU49 BA53 BB55 BA55 AV56 AP50 AP53 AV54 AT54 AP56 AP52 AN57 AN53 AG56 AG53 AN55 AN52 AG55 AK56

BD37 BF36 BA28

BE39 BD39 AT41

AG6

AJ6

AL6

AJ10

AJ8 AL8 AL7

AP6 AU6 AV9 AR6 AP8

BC7 BB7

BA7 BA9 BB9

U0301C

SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

ES1

01V010000003

AU36

SA_CK[0]

AV36

SA_CK#[0]

AY26

SA_CKE[0]

AT40

SA_CK[1]

AU40

SA_CK#[1]

BB26

SA_CKE[1]

BB40

SA_CS#[0]

BC41

SA_CS#[1]

AY40

SA_ODT[0]

BA41

SA_ODT[1]

M_A_DQS#0

AL11

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

DDR SYSTEM MEMORY A

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AR8 AV11 AT17 AV45 AY51 AT55 AK55

AJ11 AR10 AY11 AU17 AW45 AV51 AT56 AK54

BG35 BB34 BE35 BD35 AT34 AU34 BB32 AT32 AY32 AV32 BE37 BA30 BC30 AW41 AY28 AU26

M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DIM0_CLK_DDR0 16 M_A_DIM0_CLK_DDR#0 16 M_A_DIM0_CKE0 16

T0501T0501

1

T0502T0502

1

T0503T0503

1

M_A_DIM0_CS#0 16

M_A_DIM0_ODT0 16

M_A_DQS#[7:0] 16

M_A_DQS[7:0] 16

M_A_A[15:0] 16

D D

C C

B B

M_A_DQ[63:0]16

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_BS016 M_A_BS116 M_A_BS216

M_A_CAS#16 M_A_RAS#16 M_A_WE#16

+1.5V 16,17,18,57,60,83

M_B_DQ[63:0]17

U0301D

M_B_DQ0

AL4

BD13 BF12

BD10 BD14 BE13 BF16 BE17 BE18 BE21

BE14 BG14 BG18 BF19 BD50 BF48 BD53 BF52 BD49 BE49 BD54 BE53 BF56 BE57 BC59 AY60 BE54 BG54 BA58

AW59 AW58

AU58 AN61 AN59 AU59 AU61 AN58 AR58 AK58

AL58 AG58 AG59 AM60

AL59 AF61 AH60

BG39 BD42 AT22

AV43 BF40 BD45

AL1 AN3 AR4 AK4 AK3 AN4 AR1 AU4 AT2 AV4 BA4 AU3 AR3 AY2 BA3 BE9 BD9

BF8

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

ES1

01V010000003

BA34

SB_CK[0]

AY34

SB_CK#[0]

AR22

SB_CKE[0]

BA36

SB_CK[1]

BB36

SB_CK#[1]

BF27

SB_CKE[1]

BE41

SB_CS#[0]

BE47

SB_CS#[1]

AT43

SB_ODT[0]

BG47

SB_ODT[1]

M_B_DQS#0

AL3

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

AV3 BG11 BD17 BG51 BA59 AT60 AK59

AM2 AV1 BE11 BD18 BE51 BA61 AR59 AK61

BF32 BE33 BD33 AU30 BD30 AV30 BG30 BD29 BE30 BE28 BD43 AT28 AV28 BD46 AT26 AU22

M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_BS017 M_B_BS117 M_B_BS217

M_B_CAS#17 M_B_RAS#17 M_B_WE#17

+1.5V

M_B_DIM0_CLK_DDR0 17 M_B_DIM0_CLK_DDR#0 17 M_B_DIM0_CKE0 17

M_B_DIM0_CLK_DDR1 17 M_B_DIM0_CLK_DDR#1 17 M_B_DIM0_CKE1 17

M_B_DIM0_CS#0 17 M_B_DIM0_CS#1 17

M_B_DIM0_ODT0 17 M_B_DIM0_ODT1 17

M_B_DQS#[7:0] 17

M_B_DQS[7:0] 17

M_B_A[15:0] 17

+1.5V 16,17,18,57,60,83

R1.0 S3 circuit : DRAM_RST# to memory should b e high during S 3 R1.1 add S3 pow er reduction

A A

DDR3_DRAMRST#16,17 CPUDRAMRST# 4

DRAMRST_CNTRL_PCH9,21,30

5

R0508 1KOhmR0508 1KOhm

1 2

R0508 use 1k ohm Design Guide 0.9 p107(436735) Close to DIMM

R2.0 12/14

+1.5V

R0507

always support S3 PWR Reduction

1KOhm

Remove bypass R

1 2

4

3

2N7002

D

Q0501

1

12

S

2

G

C0501

0.1UF/10V

12

1%

4.99KOhm

4.99KOhm R0506

R0506

Title :

CPU(3)_DDR3

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

5 93Monday, February 13, 2012

5

4

3

2

1

+VCCP

+VCORE

U0301F

12

vx_c0603_small

12

vx_c0603_small

1 2

C0613

C0613 1UF/6.3V

1UF/6.3V

C0614

C0614 1UF/6.3V

1UF/6.3V

C0617

C0617 10UF/6.3V

10UF/6.3V

C0629

C0629 1UF/6.3V

1UF/6.3V

vx_c0603_small

C0604

C0604 10UF/6.3V

10UF/6.3V

R0605

54.9Ohm

1%

+VCCP

12

C0630

C0630 1UF/6.3V

1UF/6.3V

12

C0601

C0601 10UF/6.3V

10UF/6.3V

VR_SVID_CLK 80

12

C0633

C0633 1UF/6.3V

1UF/6.3V

R2.0 12/19

+VCCP

SP0602SP0602

1 2

Close to VRClose to CPUClose to VR

R0609

R0609 130Ohm

130Ohm

1%

1 2

D D

C C

B B

+VCORE

AF46

VCCIO34

AG48

VCCIO28

AG50

A26

VCC74

A29

VCC73

A31

VCC72

A34

VCC71

A35

VCC70

A38

VCC69

A39

VCC68

A42

VCC67

C26

VCC66

C27

VCC65

C32

VCC64

C34

VCC63

C37

VCC62

C39

VCC61

C42

VCC60

D27

VCC59

D32

VCC58

D34

VCC57

D37

VCC56

D39

VCC55

D42

VCC54

E26

VCC53

E28

VCC52

E32

VCC51

E34

VCC50

E37

VCC49

E38

VCC48

F25

VCC47

F26

VCC46

F28

VCC45

F32

VCC44

F34

VCC43

F37

VCC42

F38

VCC41

F42

VCC40

G42

VCC39

H25

VCC38

H26

VCC37

H28

VCC36

H29

VCC35

H32

VCC34

H34

VCC33

H35

VCC32

H37

VCC31

H38

VCC30

H40

VCC29

J25

VCC28

J26

VCC27

J28

VCC26

J29

VCC25

J32

VCC24

J34

VCC23

J35

VCC22

J37

VCC21

J38

VCC20

J40

VCC19

J42

VCC18

K26

VCC17

K27

VCC16

K29

VCC15

K32

VCC14

K34

VCC13

K35

VCC12

K37

VCC11

K39

VCC10

K42

VCC9

L25

VCC8

L28

VCC7

L33

VCC6

L36

VCC5

L40

VCC4

N26

VCC3

N30

VCC2

N34

VCC1

N38

VCC0

CORE SUPPLY

POWER

VCCIO27

AG51

VCCIO26

AJ17

VCCIO23

AJ21

VCCIO22

AJ25

VCCIO21

AJ43

VCCIO20

AJ47

VCCIO19

AK50

VCCIO18

AK51

VCCIO17

AL14

VCCIO16

AL15

VCCIO15

AL16

VCCIO14

AL20

VCCIO13

AL22

VCCIO12

AL26

VCCIO11

AL45

VCCIO10

AL48

VCCIO9

AM16

VCCIO8

AM17

VCCIO7

AM21

VCCIO6

AM43

VCCIO5

AM47

VCCIO4

AN20

VCCIO3

AN42

VCCIO2

AN45

VCCIO1

AN48

VCCIO0

AA14

VCCIO47

AA15

VCCIO46

AB17

VCCIO45

AB20

VCCIO44 VCCIO43 VCCIO42 VCCIO41 VCCIO40 VCCIO39 VCCIO38 VCCIO37 VCCIO36 VCCIO35 VCCIO33 VCCIO32 VCCIO31 VCCIO30 VCCIO29 VCCIO25 VCCIO24

VCCIO49 VCCIO48

VCCIO_SEL

VCCPQE1 VCCPQE0

VIDALERT#

VIDSCLK

VIDSOUT

AC13 AD16 AD18 AD21 AE14 AE15 AF16 AF18 AF20 AG15 AG16 AG17 AG20 AG21 AJ14 AJ15

W16 W17

BC22

AM25 AN22

A44 B43 C44

+VCCIO_CPU_F

VCCP_SEL

12

C0622

C0622 1UF/6.3V

1UF/6.3V

H_CPU_SVIDALRT# H_CPU_SVIDCLK H_CPU_SVIDDAT

PEG AND DDRSENSE LINES SVID QUIET RAILS

12

C0628

C0628 1UF/6.3V

1UF/6.3V

12

C0610

C0610 1UF/6.3V

1UF/6.3V

12

C0612

C0612 1UF/6.3V

1UF/6.3V

R0601

1 2

NB_R0603_32MIL_SMALL

1 2

R0613 0OhmR0613 0Ohm

R0602 43Ohm

12

C0631

C0631 1UF/6.3V

1UF/6.3V

12

C0609

C0609 1UF/6.3V

1UF/6.3V

12

C0615

C0615 1UF/6.3V

1UF/6.3V

+VCCP

Close to CPU

5%

1 2

10V240000039

12

C0632

C0635

1UF/6.3V

12

C0606

C0611

1UF/6.3V

vx_c0603_small

12

C0618

C0618 10UF/6.3V

10UF/6.3V

vx_c0603_small

12

C0608

C0624

1UF/6.3V

vx_c0603_small

+VCCP +3VA

R0615

@

10KOhm

1 2

+VCCP +VCCP +VCCP

12

R0603

R0603 75Ohm

75Ohm

1%

VR_SVID_ALERT# 80

12

C0634

C0634 1UF/6.3V

1UF/6.3V

C0607

C0607 1UF/6.3V

1UF/6.3V

vx_c0603_small

C0619

C0619 10UF/6.3V

10UF/6.3V

C0625

C0625 1UF/6.3V

1UF/6.3V

C0602

C0602 10UF/6.3V

10UF/6.3V

vx_c0603_small

12

C0636

C0636 1UF/6.3V

1UF/6.3V

C0623

C0623 1UF/6.3V

1UF/6.3V

C0621

C0621 10UF/6.3V

10UF/6.3V

vx_c0603_small

C0626

C0626 1UF/6.3V

1UF/6.3V

vx_c0603_small

C0603

C0603 10UF/6.3V

10UF/6.3V

12

C0637

C0637 1UF/6.3V

1UF/6.3V

12

C0616

C0616 1UF/6.3V

1UF/6.3V

12

C0620

C0620 10UF/6.3V

10UF/6.3V

12

C0627

C0627 1UF/6.3V

1UF/6.3V

12

C0605

C0605 10UF/6.3V

10UF/6.3V

SP0601SP0601

1 2

+VCCP 3,4,7,30,32,57,82

+VCORE 9,11,80

R0608

R0608 130Ohm

130Ohm

1%

1 2

VR_SVID_DATA 80

SP0603

NB_R0402_20MIL_SMALL

4

NB_R0402_20MIL_SMALL

1 2 1 2

NB_R0402_20MIL_SMALL

+VCCP

SP0604

+VCCP_SENSE 82 +VSSP_SENSE 82

VSSSENSE

VCCSENSE 80 VSSSENSE 80

Title :

CPU(4)_PWR

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

6 93Monday, February 13, 2012

VCC_SENSE

VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

ES1

01V010000003

A A

01V010000003

5

G43

AN16 AN17

VSS_SENSE_R

R0616 10Ohm 1%

R0614 10Ohm 1%

@

1 2

@

VCC_SENSE_R VCCSENSE

F43

5

Decoupling guide from Intel PDDG R0.8 +VGFX_CORE

1uF * 11pcs 10uF * 6pcs 22uF * 6pcs

+VGFX_CORE

D D

12

C0725

C0725 1UF/6.3V

1UF/6.3V

12

C0717

C0717 1UF/6.3V

1UF/6.3V

12

C0738

C0738 22UF/6.3V

22UF/6.3V

C C

B B

A A

12

C0727

C0727 1UF/6.3V

1UF/6.3V

12

C0719

C0719 1UF/6.3V

1UF/6.3V

vx_c0603_small

12

C0739

C0739 22UF/6.3V

22UF/6.3V

PLL supply volt age (DC + AC specif ication)

5

12

C0731

C0731 1UF/6.3V

1UF/6.3V

12

C0722

C0722 1UF/6.3V

1UF/6.3V

12

C0790

C0790 10UF/6.3V

10UF/6.3V

vx_c0603_small

12

C0740

C0740 22UF/6.3V

22UF/6.3V

+VCCSA

vx_c0603_small C0783

vx_c0603_small

Decoupling guide for A14 (EE)

+VCCSA 1uF * 5pcs 10uF * 5pcs

+VGFX_CORE 1uF * 11pcs 10uF * 6pcs 22uF * 8pcs(power request)

Graphics core v oltage Voltage range: 0 - 1.52V

12

C0732

C0726

1UF/6.3V

vx_c0603_small

12

C0788

C0791

10UF/6.3V

vx_c0603_small

12

C0742

C0741

22UF/6.3V

VCCGT_SENSE80

VSSGT_SENSE80

+1.8VS

CE0701

CE0701 330UF/2V

330UF/2V

vx_c0603_small

12

C0783

C0781

10UF/6.3V

vx_c0603_small

12

C0735

C0735 1UF/6.3V

1UF/6.3V

C0736

C0736 1UF/6.3V

1UF/6.3V

12

C0729

C0729 1UF/6.3V

1UF/6.3V

12

C0789

C0789 10UF/6.3V

10UF/6.3V

12

C0743

C0743 22UF/6.3V

22UF/6.3V

C0792

C0792 10UF/6.3V

10UF/6.3V

C0733

C0733 1UF/6.3V

1UF/6.3V

12

vx_c0603_small

12

C0761

C0761 1UF/6.3V

1UF/6.3V

12

vx_c0603_small

12

C0730

C0730 1UF/6.3V

1UF/6.3V

C0787

C0787 10UF/6.3V

10UF/6.3V

C0744

C0744 22UF/6.3V

22UF/6.3V

NB_R0402_20MIL_SMALL

C0777

C0777 10UF/6.3V

10UF/6.3V

C0734

C0734 1UF/6.3V

1UF/6.3V

12

vx_c0603_small

12

SP0701

1 2 1 2

SP0702

vx_c0603_small

C0728

C0728 1UF/6.3V

1UF/6.3V

C0786

C0786 10UF/6.3V

10UF/6.3V

C0745

C0745 22UF/6.3V

22UF/6.3V

MAX:1.2A TDC: 1.2A

12

C0764

C0764 1UF/6.3V

1UF/6.3V

12

C0793

C0793 10UF/6.3V

10UF/6.3V

12

C0737

C0737 1UF/6.3V

1UF/6.3V

4

MAX:10A TDC: 6A

4

+VGFX_CORE

+V_SM_VREF

AA46 AB47 AB50 AB51 AB52 AB53 AB55 AB56 AB58 AB59 AC61 AD47 AD48 AD50 AD51 AD52 AD53 AD55 AD56 AD58 AD59 AE46

N45 P47 P48 P50 P51 P52 P53 P55 P56 P61 T48 T58 T59 T61 U46 V47 V48 V50 V51 V52 V53 V55 V56 V58

V59 W50 W51 W52 W53 W55 W56 W61

Y48

Y61

F45

G45

BB3

BC1

BC4

L17

L21

N16

N20

N22

P17

P20

R16

R18

R21

U15

V16

V17

V18

V21 W20

+VCCP

+1.5V

+VCCSA

+1.8VS

+1.5VS

U0301G

VAXG21 VAXG20 VAXG19 VAXG18 VAXG17 VAXG16 VAXG15 VAXG14 VAXG13 VAXG12 VAXG11 VAXG10 VAXG9 VAXG8 VAXG7 VAXG6 VAXG5 VAXG4 VAXG3 VAXG2 VAXG1 VAXG0 VAXG55 VAXG54 VAXG53 VAXG52 VAXG51 VAXG50 VAXG49 VAXG48 VAXG47 VAXG46 VAXG45 VAXG44 VAXG43 VAXG42 VAXG41 VAXG40 VAXG39 VAXG38 VAXG37 VAXG36 VAXG35 VAXG34 VAXG33 VAXG32 VAXG31 VAXG30 VAXG29 VAXG28 VAXG27 VAXG26 VAXG25 VAXG24 VAXG23 VAXG22

VAXG_SENSE VSSAXG_SENSE

VCCPLL2 VCCPLL1 VCCPLL0

VCCSA15 VCCSA14 VCCSA13 VCCSA12 VCCSA11 VCCSA10 VCCSA9 VCCSA8 VCCSA7 VCCSA6 VCCSA5 VCCSA4 VCCSA3 VCCSA2 VCCSA1 VCCSA0

ES1

01V010000003

+VCCP 3,4,6,30,32,57,82

+1.5V 5, 16,17,18,57,60,83

+VCCSA 85

+1.8VS 25,26,57,80,84

+VGFX_CORE 9,80

+1.5VS 26,53,57,91

+V_SM_VREF 83

GRAPHICS

SENSE

LINES

SENSE

LINES

1.8V RAIL

SA RAIL

POWER

SENSE LINES

SM_VREF

VDDQ25 VDDQ24 VDDQ23 VDDQ22 VDDQ21 VDDQ20 VDDQ19 VDDQ18 VDDQ17 VDDQ16 VDDQ15 VDDQ14 VDDQ13 VDDQ12 VDDQ11 VDDQ10

VDDQ9 VDDQ8 VDDQ7 VDDQ6 VDDQ5 VDDQ4

DDR3 - 1.5V RAILS

VDDQ3 VDDQ2 VDDQ1 VDDQ0

VCCDQ1 VCCDQ0

QUIET RAILS

VDDQ_SENSE

VSS_SENSE_VDDQ

VCCSA_SENSE

VCCSA_VID[0] VCCSA_VID[1]

3

DDR3 Reference Voltage

+V_SM_REF 10mil

+V_SM_VREF

AY43

AJ28 AJ33 AJ36 AJ40 AL30 AL34 AL38 AL42 AM33 AM36 AM40 AN30 AN34 AN38 AR26 AR28 AR30 AR32 AR34 AR36 AR40 AV41 AW26 BA40 BB28 BG33

12

vx_c0603_small

12

MAX:5A

C0704

C0704 1UF/6.3V

1UF/6.3V

C0775

C0775 10UF/6.3V

10UF/6.3V

Filtered(BGA On ly)

AM28 AN26

BC43 BA43

U10

D48 D49

T0701T0701

1

T0702T0702

1

R0704 0Ohm

VCCSA_SEL0 VCCSA_SEL1

1 2

R0707 0OhmR0707 0Ohm

12

C0714

C0714 1UF/6.3V

1UF/6.3V

1 2

Chief River

3

R0703

R0703 1KOhm

1KOhm

R0710

R0710 1KOhm

1KOhm

12

C0705

C0705 1UF/6.3V

1UF/6.3V

12

C0772

C0772 10UF/6.3V

10UF/6.3V

12

vx_c0603_small

R1.1 add S3 power reduction

C0794

0.1UF/10V

12

C0706

C0706 1UF/6.3V

1UF/6.3V

12

C0769

C0769 10UF/6.3V

10UF/6.3V

+VCCSA_SEL0 +VCCSA_SEL1

+1.5VS_VCCDDQ

1 2

12

C0709

C0709 1UF/6.3V

1UF/6.3V

vx_c0603_small

12

C0774

C0774 10UF/6.3V

10UF/6.3V

vx_c0603_small

Chief River

Decoupling guide from Intel (EE)

+1.5VS_VCCDDQ 1uF * 10pcs 10uF * 8pcs 330uF * 1pcs

+1.5VS_VCCDDQ

@

VCCSA_SENSE 85

Close to CPU

VCCSA_SEL0 85 VCCSA_SEL1 85

C0707

C0707 1UF/6.3V

1UF/6.3V

vx_c0603_small

12

L

H

12

C0767

C0767 10UF/6.3V

10UF/6.3V

2

C0708

C0708 1UF/6.3V

1UF/6.3V

vx_c0603_small

2

12

C0765

C0765 10UF/6.3V

10UF/6.3V

C0713

C0713 1UF/6.3V

1UF/6.3V

L

H

L

12

vx_c0603_small

12

C0710

C0710 1UF/6.3V

1UF/6.3V

C0770

C0770 10UF/6.3V

10UF/6.3V

VCCSA

0.9V

0.85V

0.725V

0.675VH H

+1.5VS_VCCDDQ

12

C0712

C0711

1UF/6.3V

R1.1

12

C0768

C0768 10UF/6.3V

10UF/6.3V

vx_c0603_small

> 0 SUSB_EC#

>100 ns

add S3 power reduction

CE0702

CE0702 330UF/2V

330UF/2V

R1.0 0209 Intel Comments

VCCSA_SEL0

VCCSA_SEL1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet

Date: Sheet of

1

Processor I/O supply voltage for DDR3 (DC + AC specification)

112

MA50

+VCCP

+1.5VS

R0708

R0708 1KOhm

1KOhm

@

1 2

R0701

R0701 1KOhm

1KOhm

1 2

1

Title :

Engineer:

+1.5V_VCCDDQ

+1.5V_VCCDDQ Power Good (U0404 pin 4)

+0.75VS

JP0701

2

3MM_OPEN_5MIL@

ICCMAX_VDDQ 5A

R0709

R0709 1KOhm

1KOhm

@

1 2

R0702

R0702 1KOhm

1KOhm

1 2

CPU(5)_GFX_PWR

Joyoung_Chianhg

7 93Monday, February 13, 2012

Rev

1.0

of

5

D D

C C

B B

4

U0301H

A13

VSS299

A17

VSS298

A21

VSS297

A25

VSS296

A28

VSS295

A33

VSS294

A37

VSS293

A40

VSS292

A45

VSS291

A49

VSS290

A53

VSS289

A9

VSS300

AA1

VSS177

AA13

VSS175

AA50

VSS174

AA51

VSS173

AA52

VSS172

AA53

VSS171

AA55

VSS170

AA56

VSS169

AA8

VSS176

AB16

VSS168

AB18

VSS167

AB21

VSS166

AB48

VSS165

AB61

VSS164

AC10

VSS162

AC14

VSS161

AC46

VSS160

AC6

VSS163

AD17

VSS158

AD20

VSS157

AD4

VSS159

AD61 AE13

AF17 AF21 AF47 AF48 AF50 AF51 AF52 AF53 AF55 AF56 AF58

AF59 AG10 AG14 AG18 AG47 AG52 AG61

AH58

AJ13

AJ16

AJ20

AJ22

AJ26

AJ30

AJ34

AJ38

AJ42

AJ45

AJ48

AK52

AL10

AL13

AL17

AL21

AL25

AL28

AL33

AL36

AL40

AL43

AL47

AL61 AM13 AM20 AM22 AM26 AM30 AM34

VSS156 VSS154

AE8

VSS155

AF1

VSS153 VSS152 VSS151 VSS150 VSS149 VSS148 VSS147 VSS146 VSS145 VSS144 VSS143 VSS142 VSS141 VSS139 VSS138 VSS137 VSS136 VSS135 VSS134

AG7

VSS140

AH4

VSS133 VSS132 VSS130 VSS129 VSS128 VSS127 VSS126 VSS125 VSS124 VSS123 VSS122 VSS121 VSS120

AJ7

VSS131

AK1

VSS119 VSS118 VSS117 VSS116 VSS115 VSS114 VSS113 VSS112 VSS111 VSS110 VSS109 VSS108 VSS107 VSS106 VSS104 VSS103 VSS102 VSS101 VSS100 VSS99

VSS

VSS98

VSS105

VSS97 VSS96 VSS95 VSS94 VSS93 VSS92 VSS91 VSS90 VSS89 VSS88 VSS87 VSS86 VSS85 VSS84 VSS83 VSS81 VSS80 VSS79 VSS82 VSS77 VSS76 VSS75 VSS74 VSS73 VSS72 VSS78 VSS70 VSS69 VSS68 VSS71 VSS67 VSS66 VSS65 VSS64 VSS62 VSS61 VSS60 VSS59 VSS63 VSS58 VSS57 VSS56 VSS55 VSS54 VSS53 VSS52 VSS50 VSS49 VSS48 VSS51 VSS45 VSS44 VSS43 VSS42 VSS47 VSS41 VSS40 VSS39 VSS38 VSS37 VSS46 VSS36 VSS35 VSS34 VSS33 VSS32 VSS31 VSS30 VSS29 VSS28 VSS26 VSS27 VSS25 VSS23 VSS22 VSS21 VSS20 VSS19 VSS18 VSS17 VSS16 VSS15 VSS14 VSS13 VSS12 VSS24 VSS11

VSS9

3

AM38 AM4 AM42 AM45 AM48 AM58 AN1 AN21 AN25 AN28 AN33 AN36 AN40 AN43 AN47 AN50 AN54 AP10 AP51 AP55 AP7 AR13 AR17 AR21 AR41 AR48 AR61 AR7 AT14 AT19 AT36 AT4 AT45 AT52 AT58 AU1 AU11 AU28 AU32 AU51 AU7 AV17 AV21 AV22 AV34 AV40 AV48 AV55 AW13 AW43 AW61 AW7 AY14 AY19 AY30 AY36 AY4 AY41 AY45 AY49 AY55 AY58 AY9 BA1 BA11 BA17 BA21 BA26 BA32 BA48 BA51 BB53 BC13 BC5 BC57 BD12 BD16 BD19 BD23 BD27 BD32 BD36 BD40 BD44 BD48 BD52 BD56 BD8 BE5 BG13

BG17 BG21 BG24 BG28 BG37 BG41 BG45 BG49 BG53

BG9 C29 C35 C40 D10 D14 D18 D22 D26 D29 D35

D40 D43 D46 D50 D54 D58

G48 G51

G61 H10 H14 H17 H21

H53 H58

M11 M15

D4

D6 E25 E29

E3 E35 E40 F13 F15 F19 F29 F35 F40 F55

G6

H4

J1 J49 J55 K11 K21 K51

K8 L16 L20 L22 L26 L30 L34 L38 L43 L48 L61

2

U0301I

VSS8 VSS7 VSS6 VSS5 VSS4 VSS3 VSS2 VSS1 VSS0 VSS10 VSS288 VSS287 VSS286 VSS283 VSS282 VSS281 VSS280 VSS279 VSS278 VSS277 VSS285 VSS276 VSS275 VSS274 VSS273 VSS272 VSS271 VSS284 VSS269 VSS268 VSS270 VSS267 VSS266 VSS265 VSS264 VSS263 VSS262 VSS261 VSS260 VSS259 VSS257 VSS256 VSS258 VSS255 VSS253 VSS252 VSS251 VSS250 VSS254 VSS249 VSS248 VSS247 VSS246 VSS245 VSS243 VSS242 VSS241 VSS244 VSS240 VSS239 VSS238 VSS237 VSS236 VSS235 VSS234 VSS233 VSS232 VSS231 VSS228 VSS227

ES1

01V010000003

VSS

NCTF

VSS230 VSS226 VSS229 VSS225 VSS224 VSS223 VSS222 VSS221 VSS220 VSS219 VSS218 VSS217 VSS216 VSS215 VSS214 VSS213 VSS212 VSS211 VSS209 VSS208 VSS207 VSS206 VSS205 VSS204 VSS210 VSS202 VSS201 VSS203 VSS200 VSS199 VSS198 VSS197 VSS196 VSS195 VSS194 VSS193 VSS192 VSS190 VSS191 VSS189 VSS188 VSS186 VSS185 VSS184 VSS183 VSS182 VSS187 VSS181 VSS180 VSS179 VSS178

VSS_NCTF13 VSS_NCTF12

VSS_NCTF6 VSS_NCTF5 VSS_NCTF4 VSS_NCTF3 VSS_NCTF2 VSS_NCTF1

VSS_NCTF0 VSS_NCTF11 VSS_NCTF10

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

M4 M58 M6 N1 N17 N21 N25 N28 N33 N36 N40 N43 N47 N48 N51 N52 N56 N61 P14 P16 P18 P21 P58 P59 P9 R17 R20 R4 R46 T1 T47 T50 T51 T52 T53 T55 T56 U13 U8 V20 V61 W13 W15 W18 W21 W46 W8 Y4 Y47 Y58 Y59

A5 A57 BC61 BD3 BD59 BE4 BE58 BG5 BG57 C3 C58 D59 E1 E61

1

ES1

01V010000003

A A

Title :

CPU(6)_GND

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

8 93Monday, February 13, 2012

5

4

3

2

1

CFG strapping information:

CFG[2]: PCIE Static Numbering Lane Reversal- CFG[2] is for the 16x

- 1: (Default) Normal Operation, Lane # definition matches sockect pin map definition

- 0: Lane Numbers Reversed

CFG[4]: Embedded DisplayPort Detection

- 1: (Default) Disabled ; No Physical Display Port attached to Embedded DisplayPort

D D

- 0: Enabled ; An external Display Port device is connected to the Embedded Display Port

CFG[6:5]: PCI Express Port Bifurcation Straps

- 11 : (Default) x 1 6

- 10 : x 8 , x 8

- 01 : Reserved

- 00 : x 8 , x 4 , x 4

CFG[7]: PEG DEFER TRAINING

- 1: (Default) PEG Train immediately following xxRESETB de assertion

- 0: PEG Wait for BIOS training

CFG2

CFG4

CFG5

CFG6

C C

CFG7

1%

1 2

R0902 1KOhm

/DGPUR0902 1KOhm

/DGPU

1%

1 2

R0903 1KOhm

/eDPR0903 1KOhm

/eDP

1%

1 2

R0904 1KOhm

@R0904 1KOhm

@

1%

1 2

R0905 1KOhm@

1%

1 2

R0906 1KOhm@

Joyoung R1.0

T0918T0918 T0901T0901 T0919T0919 T0902T0902 T0923T0923 T0920T0920 T0921T0921 T0922T0922 T0903T0903 T0904T0904 T0905T0905 T0906T0906 T0907T0907 T0908T0908 T0909T0909 T0910T0910 T0911T0911 T0912T0912

T0913T0913 T0914T0914

T0915T0915 T0916T0916

T0917T0917

R2.1 01/09

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

1 1

1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17

VCC_VAL_SENSE VSS_VAL_SENSE

VAXG_VAL_SENSE VSSAXG_VAL_SENSE

VCC_DIE_SENSE

U0301E

B50

CFG[0]

C51

CFG[1]

B54

CFG[2]

D53

CFG[3]

A51

CFG[4]

C53

CFG[5]

C55

CFG[6]

H49

CFG[7]

A55

CFG[8]

H51

CFG[9]

K49

CFG[10]

K53

CFG[11]

F53

CFG[12]

G53

CFG[13]

L51

CFG[14]

F51

CFG[15]

D52

CFG[16]

L53

CFG[17]

H43

VCC_VAL_SENSE

K43

VSS_VAL_SENSE

H45

VAXG_VAL_SENSE

K45

VSSAXG_VAL_SENSE

F48

VCC_DIE_SENSE

H48

RSVD39

K48

RSVD37

BA19

RSVD15

AV19

RSVD18

AT21

RSVD22

BB21

RSVD12

BB19

RSVD13

AY21

RSVD17

BA22

RSVD14

AY22

RSVD16

AU19

RSVD20

AU21

RSVD19

BD21

RSVD11

BD22

RSVD10

BD25

RSVD9

BD26

RSVD8

BG22

RSVD1

BE22

RSVD6

BG26

RSVD0

BE26

RSVD4

BF23

RSVD3

BE24

RSVD5

RESERVED

RSVD7 RSVD2

RSVD31 RSVD36 RSVD35 RSVD34

RSVD33 RSVD32 RSVD28 RSVD27 RSVD29

RSVD21 RSVD38

RSVD25 RSVD26 RSVD24 RSVD23

RSVD30

DC_TEST_A4 DC_TEST_C4 DC_TEST_D3

DC_TEST_D1 DC_TEST_A58 DC_TEST_A59 DC_TEST_C59 DC_TEST_A61 DC_TEST_C61 DC_TEST_D61

DC_TEST_BD61 DC_TEST_BE61 DC_TEST_BE59 DC_TEST_BG61 DC_TEST_BG59 DC_TEST_BG58

DC_TEST_BG4 DC_TEST_BG3

DC_TEST_BE3

DC_TEST_BG1

DC_TEST_BE1

DC_TEST_BD1

BE7 BG7

N42 L42 L45 L47

M13 M14 U14 W14 P13

AT49 K24

AH2 AG13 AM14 AM15

N50

A4 C4 D3 D1 A58 A59 C59 A61 C61 D61 BD61 BE61 BE59 BG61 BG59 BG58 BG4 BG3 BE3 BG1 BE1 BD1

Chief River

DDR_WR_VREF01 DDR_WR_VREF02

ES1

01V010000003

For iFDIM testing

PROCESSOR DRIVEN Vref PATH WAS STUFFED BY DEFAULT:

B B

DDR_WR_VREF01

DRAMRST_CNTRL_PCH5,21,30

DDR_WR_VREF02

A A

5

R0907 0OhmR0907 0Ohm

1 2

Q0901A

@

UM6K1N

R09091KOhm1%R09091KOhm

12

1%

R0908 0OhmR0908 0Ohm

1 2

Q0901B

@

UM6K1N

R9101KOhm1%R9101KOhm

12

1%

61

2

34

5

DIMM0_VREF_DQ 18

DIMM1_VREF_DQ 18

4

R0912~ R0917 close to pin < 1 inch

12

R0912

@

49.9Ohm

1%

VAXG_VAL_SENSE VCC_VAL_SENSE

R0913

@

100Ohm

1%

1 2

VSSAXG_VAL_SENSE VSS_VAL_SENSE

12

R0914

@

49.9Ohm

1%

3

+VCORE+VGFX_CORE

@

12

1 2

12

R0915

49.9Ohm

1%

R0916

R0916 100Ohm

100Ohm

1%

R0917

49.9Ohm

1%

R1.1 0512

Title :

CPU(7)_RSVD

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

9 93Monday, February 13, 2012

5

D D

C C

4

3

2

1

CPU XDP connector

Check Connector

PCH XDP connector

B B

A A

Title :

CPU_PCH_XDP

Joyoung_Chianhg

1

Joyoung_Chianhg

Rev

1.0

10 93Monday, February 13, 2012

1.0

Engineer:

BG1-HW RD Div.2-NB RD Dept.5

Size Project Name

Custom

Date: Sheet of

5

4

3

2

Date: Sheet of

MA50

Engineer:

5

D D

4

3

2

1

Chief River Decoupling guide from Intel PDDG R0.8

+VCORE 2.2uF * 16 pcs 22uF * 12 pcs

+VCORE

vx_c0402_small

12

C1101

2.2UF/6.3V

12

C1111

2.2UF/6.3V

12

C1102

2.2UF/6.3V

vx_c0402_small

12

C1112

2.2UF/6.3V

vx_c0402_small

12

C1103

2.2UF/6.3V

vx_c0402_small

12

C1113

2.2UF/6.3V

12

C1104

2.2UF/6.3V

vx_c0402_small

12

C1114

2.2UF/6.3V

vx_c0402_small

12

C1105

2.2UF/6.3V

vx_c0402_small

12

C1115

2.2UF/6.3V

12

C1106

2.2UF/6.3V

vx_c0402_small

12

C1117

2.2UF/6.3V

vx_c0402_small

12

C1107

2.2UF/6.3V

12

C1108

2.2UF/6.3V

vx_c0402_small

12

C1109

2.2UF/6.3V

12

C1110

2.2UF/6.3V

vx_c0402_small

Chief River

+VCORE 2.2uF * 16 pcs

C C

22uF * 18 pcs (power request)

12

C1139

C1139 22UF/6.3V

22UF/6.3V

C1147

C1147 22UF/6.3V

22UF/6.3V

12

C1140

C1140 22UF/6.3V

22UF/6.3V

C1148

C1148 22UF/6.3V

22UF/6.3V

12

C1136

C1136 22UF/6.3V

22UF/6.3V

12

C1144

C1144 22UF/6.3V

22UF/6.3V

B B

C1137

C1137 22UF/6.3V

22UF/6.3V

C1145

C1145 22UF/6.3V

22UF/6.3V

12

C1138

C1138 22UF/6.3V

22UF/6.3V

C1146

C1146 22UF/6.3V

22UF/6.3V

12

C1141

C1141 22UF/6.3V

22UF/6.3V

C1149

C1149 22UF/6.3V

22UF/6.3V

12

C1142

C1142 22UF/6.3V

22UF/6.3V

C1150

C1150 22UF/6.3V

22UF/6.3V

12

C1143

C1143 22UF/6.3V

22UF/6.3V

C1151

C1151 22UF/6.3V

22UF/6.3V

12

C1153

C1153 22UF/6.3V

22UF/6.3V

C1152

C1152 22UF/6.3V

22UF/6.3V

A A

Title :

CPU DECOUPLING

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

11 93Monday, February 13, 2012

5

4

3

2

1

Memory Down CH A

M_A_DIM0 _ODT05

M_A_A[15 :0]5

M_A_DIM0 _CS#05

DDR3_D RAMRST#5,17

1.6PF/16 V

1AV200 000069

R1.1 11/04

C1631

12

M_A_CAS #5

M_A_DIM0 _CKE0

M_A_RAS #5

M_A_WE #5

U1601

M_A_A0

K3

M_A_A1 M_A_A2 M_A_A3

K2

M_A_A4 M_A_A5 M_A_A6

M8

M_A_A7

M2

M_A_A8

N8

M_A_A9

M3

M_A_A10

H7

M_A_A11

M7

M_A_A12

K7

M_A_A13

N3

M_A_A14

N7

M_A_A15

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS # M_A_DIM0 _CLK_D DR0 M_A_DIM0 _CLK_D DR#0

M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST# M_A_WE #

M_A_DIM0 _ODT0

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

M_A_WE #

M_A_DIM0 _ODT0

K8

M_A_DQ3

B3

M_A_DQ0

C7

M_A_DQ5

C2

M_A_DQ4

C8

M_A_DQ6

E3

0 1

M_A_DQ2

E8

M_A_DQ7

D2

M_A_DQ1

E7

M_A_DQS 0

C3

M_A_DQS #0

D3

G3

G7 G9 H2

N2 H3

G1 H8

12

R1601

R1601 240Ohm

240Ohm

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ3 3 M_A_DQ3 2 M_A_DQ3 5 M_A_DQ3 9 M_A_DQ3 4 M_A_DQ3 7 M_A_DQ4 1 M_A_DQ3 8

4 56

M_A_DQ3 6

M_A_DQS 4 M_A_DQS #4

DDR3_D RAMRST#

12

R1605

R1605 240Ohm

240Ohm

A0

L7

A1

L3

A2 A3

L8

A4

L2

A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14

J7

A15

J2

BA0 BA1

J3

BA2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

DQS DQS#

CAS#

F7

CK CK# CKE CS#

F3

RAS#

RESET# WE#

ODT ZQ

EDJ420 8BASE-D J-F

03V150 000026

U1605

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

C3

DQS

D3

DQS#

G3

CAS#

F7

CK

G7

CK#

G9

CKE

H2

CS#

F3

RAS#

N2

RESET#

H3

WE#

G1

ODT

H8

ZQ

EDJ420 8BASE-D J-F

03V150 000026

VREFCA VREFDQ

DM/TDQS

NU/TDQS#

DM/TDQS

NU/TDQS#

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8

VSS9 VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDDQ1 VDDQ2 VDDQ3 VDDQ4

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VREFCA VREFDQ

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3

NC1

F1

NC2

F9

NC3

H1

NC4

H9

NC5

J8 E1

B7 A7

A1

VSS1

A8

VSS2

B1

VSS3

D8

VSS4

F2

VSS5

F8

VSS6

J1

VSS7

J9

VSS8

L1

VSS9

L9

VSS10

N1

VSS11

N9

VSS12

B2 B8 C9 D1 D9

A2

VDD1

A9

VDD2

D7

VDD3

G2

VDD4

G8

VDD5

K1

VDD6

K9

VDD7

M1

VDD8

M9

VDD9

B9 C1 E2 E9

A3

NC1

F1

NC2

F9

NC3

H1

NC4

H9

NC5

J8 E1

B7 A7

+1.5V

FBA_VR EF_CA0 _MD FBA_VR EF_DQ0 _MD

Follow design guide 460452 / 2.6.14

+1.5V

FBA_VR EF_CA0 _MD FBA_VR EF_DQ0 _MD

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST#

M_A_WE #

M_A_DIM0 _ODT0

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST#

M_A_WE #

M_A_DIM0 _ODT0

2

+1.5V

+1.5V 5,17,18,5 7,60,83

+0.75VS

+0.75VS 17,5 7,83

+V_VREF _DQ_D IMM017,18

+V_VREF _CA_D IMM017,18

M_A_DQ[6 3:0]5

D D

M_A_DQS [7:0]5

M_A_DQS #[7:0]5

M_A_BS[2 :0]5

C C

B B

FBA_VR EF_DQ0 _MD

FBA_VR EF_CA0 _MD

M_A_DIM0 _CLK_D DR05

M_A_DIM0 _CLK_D DR#05

M_A_DIM0 _CKE05

Near Memory Controller

M_A_DQS 2 M_A_DQS #2

12

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS 6 M_A_DQS #6

12

R1606

R1606 240Ohm

240Ohm

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ2 3 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 0 M_A_DQ1 9 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 6

R1602

R1602 240Ohm

240Ohm

M_A_DQ5 0 M_A_DQ4 9 M_A_DQ5 4 M_A_DQ5 2 M_A_DQ5 1 M_A_DQ4 8 M_A_DQ5 5 M_A_DQ5 3

K3

L7 L3

K2

L8

L2 M8 M2 N8 M3 H7 M7 K7 N3 N7

J7

J2 K8

J3

B3 C7 C2 C8 E3 E8 D2 E7

C3 D3

G3 F7 G7 G9 H2 F3

N2 H3

G1 H8

U1606

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

C3

DQS

D3

DQS#

G3

CAS#

F7

CK

G7

CK#

G9

CKE

H2

CS#

F3

RAS#

N2

RESET#

H3

WE#

G1

ODT

H8

ZQ

EDJ420 8BASE-D J-F

03V150 000026

U1602

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

VDDQ1

DQS

VDDQ2

DQS#

VDDQ3

VDDQ4 CAS# CK CK# CKE CS# RAS#

VREFCA

RESET#

VREFDQ

WE#

ODT

DM/TDQS

ZQ

NU/TDQS#

EDJ420 8BASE-D J-F

03V150 000026

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDDQ1 VDDQ2 VDDQ3 VDDQ4

VREFCA

VREFDQ

DM/TDQS

NU/TDQS#

VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

NC1 NC2 NC3 NC4 NC5

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

NC1 NC2 NC3 NC4 NC5

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

J8 E1

B7 A7

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

FBA_VR EF_CA0 _MD

J8

FBA_VR EF_DQ0 _MD

E1

B7 A7

FBA_VR EF_CA0 _MD FBA_VR EF_DQ0 _MD

U1603

M_A_A0

K3

M_A_A1 M_A_A2 M_A_A3

K2

M_A_A4 M_A_A5 M_A_A6

M8

M_A_A7

M2

M_A_A8

N8

M_A_A9

M3

M_A_A10

H7

M_A_A11

M7

M_A_A12

K7

M_A_A13

N3

M_A_A14

N7

M_A_A15

M_A_BS0 M_A_BS1

+1.5V

M_A_BS2

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST#

M_A_WE #

M_A_DIM0 _ODT0

M_A_BS0 M_A_BS1 M_A_BS2

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

M_A_WE #

M_A_DIM0 _ODT0

M_A_DQS 1 M_A_DQS #1

12

R1603

R1603 240Ohm

240Ohm

M_A_DQS 5 M_A_DQS #5

DDR3_D RAMRST#

12

M_A_DQ8 M_A_DQ1 4 M_A_DQ1 3 M_A_DQ1 1 M_A_DQ1 5 M_A_DQ1 0 M_A_DQ9 M_A_DQ1 2

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 0 M_A_DQ4 7 M_A_DQ4 6

M_A_DQ4 2 M_A_DQ4 3

R1607

R1607 240Ohm

240Ohm

K8

B3 C7 C2 C8 E3 E8 D2 E7

C3 D3

G3

G7 G9 H2

N2 H3

G1 H8

A0

L7

A1

L3

A2 A3

L8

A4

L2

A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14

J7

A15

J2

BA0 BA1

J3

BA2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

DQS DQS#

CAS#

F7

CK CK# CKE CS#

F3

RAS#

RESET# WE#

ODT ZQ

EDJ420 8BASE-D J-F

03V150 000026

U1607

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

C3

DQS

D3

DQS#

G3

CAS#

F7

CK

G7

CK#

G9

CKE

H2

CS#

F3

RAS#

N2

RESET#

H3

WE#

G1

ODT

H8

ZQ

EDJ420 8BASE-D J-F

03V150 000026

VDDQ1 VDDQ2 VDDQ3 VDDQ4

VREFCA VREFDQ

DM/TDQS

NU/TDQS#

DM/TDQS

NU/TDQS#

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8

VSS9 VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VREFCA VREFDQ

NC1 NC2 NC3 NC4 NC5

VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

NC1 NC2 NC3 NC4 NC5

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

FBA_VR EF_CA0 _MD

J8

FBA_VR EF_DQ0 _MD

E1

B7 A7

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

J8 E1

B7 A7

FBA_VR EF_CA0 _MD FBA_VR EF_DQ0 _MD

M_A_BS0

+1.5V

M_A_BS1 M_A_BS2

3

M_A_CAS #

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0 M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST#

M_A_WE #

M_A_DIM0 _ODT0

M_A_BS0

+1.5V

M_A_BS1 M_A_BS2

7

M_A_CAS #

M_A_DIM0 _CLK_D DR0 M_A_DIM0 _CLK_D DR#0

M_A_DIM0 _CKE0 M_A_DIM0 _CS#0 M_A_RAS #

DDR3_D RAMRST#

M_A_WE #

M_A_DIM0 _ODT0

M_A_DQS 7 M_A_DQS #7

12

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

12

R1608

R1608 240Ohm

240Ohm

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ3 0 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 4 M_A_DQ3 1

M_A_DQS 3 M_A_DQS #3

R1604

R1604 240Ohm

240Ohm

M_A_DQ6 3 M_A_DQ5 7 M_A_DQ5 6 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 0 M_A_DQ5 8 M_A_DQ5 9

K3

L7 L3

K2

L8

L2 M8 M2 N8 M3 H7 M7 K7 N3 N7

J7

J2 K8

J3

B3 C7 C2 C8 E3 E8 D2 E7

C3 D3

G3

F7 G7 G9 H2

F3

N2 H3

G1 H8

U1608

K3

A0

L7

A1

L3

A2

K2

A3

L8

A4

L2

A5

M8

A6

M2

A7

N8

A8

M3

A9

H7

A10/AP

M7

A11

K7

A12/BC#

N3

A13

N7

A14

J7

A15

J2

BA0

K8

BA1

J3

BA2

B3

DQ0

C7

DQ1

C2

DQ2

C8

DQ3

E3

DQ4

E8

DQ5

D2

DQ6

E7

DQ7

C3

DQS

D3

DQS#

G3

CAS#

F7

CK

G7

CK#

G9

CKE

H2

CS#

F3

RAS#

N2

RESET#

H3

WE#

G1

ODT

H8

ZQ

EDJ420 8BASE-D J-F

03V150 000026

U1604

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

DQS DQS#

CAS# CK CK# CKE CS# RAS#

VREFCA

RESET#

VREFDQ

WE#

ODT

DM/TDQS

ZQ

NU/TDQS#

EDJ420 8BASE-D J-F

03V150 000026

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8

VSS9 VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

VDD7

VDD8

VDD9

VDDQ1 VDDQ2 VDDQ3 VDDQ4

NC1 NC2 NC3 NC4 NC5

VREFCA VREFDQ

DM/TDQS NU/TDQS#

VDDQ1 VDDQ2 VDDQ3 VDDQ4

VSS10 VSS11 VSS12

VSSQ1 VSSQ2 VSSQ3 VSSQ4 VSSQ5

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

NC1 NC2 NC3 NC4 NC5

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

J8 E1

B7 A7

A1 A8 B1 D8 F2 F8 J1 J9 L1 L9 N1 N9

B2 B8 C9 D1 D9

A2 A9 D7 G2 G8 K1 K9 M1 M9

B9 C1 E2 E9

A3 F1 F9 H1 H9

FBA_VR EF_CA0 _MD

J8

FBA_VR EF_DQ0 _MD

E1

B7 A7

FBA_VR EF_CA0 _MD FBA_VR EF_DQ0 _MD

+1.5V

M_A_DIM0 _ODT0

M_A_WE #

M_A_RAS # M_A_CAS #

M_A_DIM0 _CKE0

12

C1619

0.1UF/10V

M_A_DIM0 _CS#0

2

Place each cap close to each VrefDQ or VrefCA Dram Ball

C1625

C1625 10UF/6.3V

10UF/6.3V

12

C1608

0.1UF/10V

FBA_VR EF_CA0 _MD

12

C1642

0.1UF/10V

FBA_VR EF_DQ0 _MD

12

C1656

0.1UF/10V

12

4

12

C1657

0.1UF/10V

C1643

0.1UF/10V

12

C1650

0.1UF/10V

C1644

0.1UF/10V

12

C1651

0.1UF/10V

12

C1645

0.1UF/10V

12

C1652

0.1UF/10V

C1646

0.1UF/10V

C1647

0.1UF/10V

12

C1655

0.1UF/10V

12

C1648

0.1UF/10V

12

C1654

0.1UF/10V

C1649

0.1UF/10V

M_A_DIM0 _CLK_D DR0

M_A_DIM0 _CLK_D DR#0

3

R1613

R1613 30OHM

30OHM

10V220 000217

1 2

R1614

R1614 30OHM

30OHM

10V220 000217

1 2

+0.75VS

C1630

C1630 1UF/6.3V

1UF/6.3V

12

C1615

C1629

0.1UF/10V

1UF/6.3V

C1616

0.1UF/10V

12

C1617

0.1UF/10V

12

C1618

0.1UF/10V

12

C1628

C1613

C1614

0.1UF/10V

C1614

0.1UF/10V

0.1UF/16V

1 2

GND

12

C1653

0.1UF/10V

+1.5V

Layout Note: Place th ese caps near SO DIM M 0

12

C1621

C1620

10UF/6.3V

@

+1.5V

A A

Layout Note: Place th ese caps near SODIMM 0

12

C1601

0.1UF/10V

12

C1602

0.1UF/10V

C1622

C1622 10UF/6.3V

10UF/6.3V

12

C1603

0.1UF/10V

12

C1623

C1623 10UF/6.3V

10UF/6.3V

12

C1604

0.1UF/10V

12

C1605

0.1UF/10V

12

C1606

0.1UF/10V

12

C1624

C1624 10UF/6.3V

10UF/6.3V

12

C1607

0.1UF/10V

place close to balls

5

M_A_BS0

M_A_BS1

M_A_BS2

M_A_A10 M_A_A15

M_A_A0 M_A_A7

M_A_A14 M_A_A13 M_A_A9 M_A_A2

M_A_A5

M_A_A1 M_A_A3

M_A_A11 M_A_A4 M_A_A6 M_A_A8

M_A_A12

1 2 3 4 5 6 7 8

+0.75VS

RN1601A

36Ohm

RN1601B

36Ohm

RN1601C

36Ohm

RN1601D

36Ohm

RN1602A

36Ohm

RN1602B

36Ohm

RN1602C

36Ohm

RN1602D

36Ohm

RN1603A

36Ohm

RN1603B

36Ohm

RN1603C

36Ohm

RN1603D

36Ohm

RN1604A

36Ohm

RN1604B

36Ohm

RN1604C

36Ohm

RN1604D

36Ohm

RN1605A

36Ohm

RN1605B

36Ohm

RN1605C

36Ohm

RN1605D

36Ohm

RN1606A

36Ohm

RN1606B

36Ohm

RN1606C

36Ohm

RN1606D

36Ohm

RN1607A

36Ohm

RN1607B

36Ohm

RN1607C

36Ohm

RN1607D

36Ohm

Title :

DDR3(1)_SO-DIMM0

Engineer:

Joyoung_Chianhg

Engineer:

Joyoung_Chianhg

Engineer:

BG1-HW R D Div.2-NB RD Dept.5

Size Project Nam e

D

MA50

Date: Sheet o f

1

Joyoung_Chianhg

16 93Monday, February 13 , 2012

Rev

1.0

5

+1.5V

+1.5V 5,16,18,57,60,83

+0.75VS

+V_VREF_CA_DIMM1

+V_VREF_DQ_DIMM1

D D

+0.75VS 16,57,83

+3VS

+3VS 20,21,22,23,24,25,26,27,28,30,32,33,36,37,44, 45,48,50,51,53,57,59,61,80,91,92

+V_VREF_CA_DIMM1 16,18

+V_VREF_DQ_DIMM1 16,18

4

+1.5V

12

+

CE1703

CE1703 220UF/4V

220UF/4V

@

+1.5V +0.75VS

Layout Note: Place these caps near SO DIMM 1

12

C1709

C1709 10UF/6.3V

10UF/6.3V

@

12

C1710

C1710 10UF/6.3V

10UF/6.3V

3

12

C1711

C1711 10UF/6.3V

10UF/6.3V

@

12

C1712

C1712 10UF/6.3V

10UF/6.3V

12

C1713

C1713 10UF/6.3V

10UF/6.3V

@

12

C1718

C1718 10UF/6.3V

10UF/6.3V

@

2

12

C1717

C1716

1UF/6.3V

12

C1719

C1719 1UF/6.3V

1UF/6.3V

@

C1730

C1730 1UF/6.3V

1UF/6.3V

@

1

M_B_A[15:0]5

M_B_DIM0_CLK_DDR15

M_B_DIM0_CLK_DDR0

M_B_DIM0_CLK_DDR#0

C C

M_B_DIM0_CLK_DDR1

M_B_DIM0_CLK_DDR#1

12

C1720

C1720 10PF/50V

10PF/50V

@

C1721

C1721 10PF/50V

10PF/50V

@

12

@

150Ohm

150Ohm R1707

R1707

12

@

150Ohm

150Ohm R1708

R1708

PLACE CLOSE TO SODIMM

SMBus Slave Address: A4H

B B

SMB_CLK_S28,53,59 SMB_DAT_S28,53,59

M_B_DIM0_CLK_DDR#15

M_B_DIM0_CLK_DDR05

M_B_DIM0_CLK_DDR#05

M_B_DIM0_CS#15 M_B_DIM0_CS#05

M_B_DIM0_ODT15 M_B_DIM0_ODT05

M_B_WE#5 M_B_RAS#5 M_B_CAS#5

M_B_BS25 M_B_BS15 M_B_BS05

M_B_DIM0_CKE15 M_B_DIM0_CKE05

R1709 10KOhmR1709 10KOhm

+3VS

take care if can't boot or S3 issue

M_B_DQS[7:0]5

M_B_DQS#[7:0]5

DM should connect to GND directly Design Guide 1.0 P.88 (436735)

SP1701 R0402SP1701 R0402 SP1702 R0402SP1702 R0402

SP1703SP1703

12 12

1 2

M_B_DQS7 M_B_DQS#7 M_B_DQS6 M_B_DQS#6 M_B_DQS5 M_B_DQS#5 M_B_DQS4 M_B_DQS#4 M_B_DQS3 M_B_DQS#3 M_B_DQS2 M_B_DQS#2 M_B_DQS1 M_B_DQS#1 M_B_DQS0 M_B_DQS#0

SMB_CLK_S_CHB SMB_DAT_S_CHB

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

12

J1701A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

102

CK1

104

CK1#

101

CK0

103

CK0#

121

S1#

114

S0#

120

ODT1

116

ODT0

113

WE#

110

RAS#

115

CAS#

79

BA2

108

BA1

109

BA0

74

CKE1

73

CKE0

201

SA1

197

SA0

188

DQS7

186

DQS#7

171

DQS6

169

DQS#6

154

DQS5

152

DQS#5

137

DQS4

135

DQS#4

64

DQS3

62

DQS#3

47

DQS2

45

DQS#2

29

DQS1

27

DQS#1

12

DQS0

10

DQS#0

187

DM7

170

DM6

153

DM5

136

DM4

63

DM3

46

DM2

28

DM1

11

DM0

202

SCL

200

SDA

DDR3_DIMM_204P

12V02GBRM000

0

1

2

3

4

5

6

7

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

RESET#

M_B_DQ1

5

DQ0

M_B_DQ5

7

DQ1

M_B_DQ7

15

DQ2

M_B_DQ2

17

DQ3

M_B_DQ4

4

DQ4

M_B_DQ0

6

DQ5

M_B_DQ6

16

DQ6

M_B_DQ3

18

DQ7

M_B_DQ8

21

DQ8

M_B_DQ12

23

DQ9

M_B_DQ10

33

M_B_DQ15

35

M_B_DQ9

22

M_B_DQ13

24

M_B_DQ11

34

M_B_DQ14

36

M_B_DQ16

39

M_B_DQ20

41

M_B_DQ21

51

M_B_DQ17

53

M_B_DQ23

40

M_B_DQ22

42

M_B_DQ19

50

M_B_DQ18

52

M_B_DQ25

57

M_B_DQ28

59

M_B_DQ30

67

M_B_DQ26

69

M_B_DQ29

56

M_B_DQ24

58

M_B_DQ27

68

M_B_DQ31

70

M_B_DQ32

129

M_B_DQ33

131

M_B_DQ38

141

M_B_DQ34

143

M_B_DQ36

130

M_B_DQ37

132

M_B_DQ39

140

M_B_DQ35

142

M_B_DQ44

147

M_B_DQ40

149

M_B_DQ46

157

M_B_DQ41

159

M_B_DQ42

146

M_B_DQ45

148

M_B_DQ47

158

M_B_DQ43

160

M_B_DQ53

163

M_B_DQ52

165

M_B_DQ55

175

M_B_DQ54

177

M_B_DQ49

164

M_B_DQ48

166

M_B_DQ50

174

M_B_DQ51

176

M_B_DQ63

181

M_B_DQ61

183

M_B_DQ57

191

M_B_DQ59

193

M_B_DQ60

180

M_B_DQ56

182

M_B_DQ58

192

M_B_DQ62

194

30

M_B_DQ[63:0] 5

0~7

8~15

16~23

24~31

32~39

40~47

48~55

56~63

DDR3_DRAMRST# 5,16

Layout Note: Place these caps near SO DIMM 1

+1.5V

Reserve

12

C1705

0.1UF/16V

PM_EXTTS#0_DIM_B

T1701T1701

1

+V_VREF_CA_DIMM1

12

C1724

2.2UF/6.3V

@

+V_VREF_DQ_DIMM1

12

C1722

2.2UF/6.3V

@

12

C1706

0.1UF/16V

J1701B

75

VDD1 VDD381VDD4 VDD587VDD6 VDD793VDD8

99 105 111 117 123

2

8 13 19 25 31 37 43 48 54 60 65 71

127 133 138 144 150 155 161 167 172 178 184 189 195

198 125

77

122

126

12

C1723

0.1UF/16V

C1725

0.1UF/16V

1



Frank 20110513 VREFCA and VREFDQ need to separate It follow EVEREST and Intel spec.

DDR3_DIMM_204P

12V02GBRM000

VDD9 VDD11 VDD13 VDD15 VDD17

VSS1 VSS3 VSS5 VSS7 VSS9 VSS11 VSS13 VSS15 VSS17 VSS19 VSS21 VSS23 VSS25 VSS27 VSS29 VSS31 VSS33 VSS35 VSS37 VSS39 VSS41 VSS43 VSS45 VSS47 VSS49 VSS51

EVENT# TEST

NC1 NC2

VREFCA VREFDQ

VDD10 VDD12 VDD14 VDD16 VDD18

VSS10 VSS12 VSS14 VSS16 VSS18 VSS20 VSS22 VSS24 VSS26 VSS28 VSS30 VSS32 VSS34 VSS36 VSS38 VSS40 VSS42 VSS44 VSS46 VSS48 VSS50 VSS52

NP_NC1 NP_NC2

VDDSPD

VDD2

VSS2 VSS4 VSS6 VSS8

GND1 GND2

VTT1 VTT2

76 82 88 94 100 106 112 118 124

3 9 14 20 26 32 38 44 49 55 61 66 72 128 134 139 145 151 156 162 168 173 179 185 190 196

207 208

205 206

203 204

199

12

C1707

0.1UF/16V

+0.75VS

12

C1715

0.1UF/16V

+1.5V

12

C1708

0.1UF/16V

+3VS

12

C1714

2.2UF/6.3V

@

H:5.2mm

A A

Title :

DDR3(2)_SO-DIMM1

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

17 93Monday, February 13, 2012

5

DDR3 Vref

4

3

2

+1.5V

+V_VREF_CA_DIMM0

+V_VREF_DQ_DIMM0

1

+1.5V 5,16,17,57,60,83

+V_VREF_CA_DIMM0 16,17

+V_VREF_DQ_DIMM0 16,17

M1: Fixed SO-DIMM VREF_DQ

D D

+1.5V +V_VREF_DDR3

R1811

R1811 1KOhm

1KOhm

1 2

12

R1813

C1803

1KOhm

0.1UF/16V

M1Default

+V_VREF_CA_DIMM0

+V_VREF_CA_DIMM1

For DDR3_VREF command & address.

R1814

R1814 0Ohm

0Ohm

1 2

+V_VREF_DQ_DIMM0

+V_VREF_DQ_DIMM1

R1812

1KOhm

R1815

1KOhm

+1.5V

1 2

12

0.1UF/16V

C1804

12

+5VSUS

+5VA

+3V

+3V 24, 45,57,59,61,91

+5VSUS 51,57,59, 91

+5VA 37,60,81,91

R1.0 1231

R1805 0Ohm@R1805 0Ohm@

DIMM0_VREF_DQ9

C C

DIMM1_VREF_DQ9

1 2

R1806 0Ohm@R1806 0Ohm@

1 2

M3

M3: Processor Generated SO-DIMM VREFDQ – New Requirement

If support M3 :

1. Mount R1802,R1803,R1805,R1806,R1810,R1811,C1802

2. Un mount R1801,R1804

B B

A A

Title :

DDR3(3)_CA/DQ Voltage

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

of

18 93Monday, February 13, 2012

5

D D

C C

4

3

2

1

B B

A A

R1.4--2

Title :

VID Controller

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet of

5

4

3

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

19 93Monday, February 13, 2012

5

RTC battery

T2030T2030

1

12

C2004

1UF/10V

GND GND

12

C2005

1UF/10V

R2001 1KOhmR2001 1KOhm

1

2

1

JRST2002

1

2

SGL_JUMP

@

2

GNDGND

JRST2002

Shunt

Open (Default)

+RTCBAT

+RTCBAT59,60

D D

+VCC_RTC

RTCRST# RC delay should be 18ms~25ms

5%

R2003 20KOhm

5%

12

R2004 20KOhm

R2005

1MOhm

1 2

C C

TPM Settings

Clear ME RTC

Registers Keep ME RTC Registers

Intel 1.5 Design Guide, page 260

+3VA

PR2.1

D2002

1

2

1V/0.2A

Request by CSC for CMOS clear function

CMOS Settings

Clear CMOS

JRST2001

1

2

SGL_JUMP

@

Keep CMOS

INTVRMEN: Integrated SUS 1.05V VRM Enables Low: Enable External VRs High:Enable Internal VRs

PCH_INTVRMEN

+VCC_RTC

+RTC_BAT

3

12

C2003

1UF/10V

GND

JRST2001

Shunt Open (Default)

R2030 200KOhm

@R2030 200KOhm

@

1 2

1%

isolate schematic for ACZ _SYNC and SDOUT follow EIH31

B B

R1.0 For JTAG to pull high and low.

20110718 Frank add C2006 for EMI request

GND

4

C2001

T2015T2015

1

GND

15PF/50V

GND

C2002 15PF /50VC2002 15PF /50V

GND

T2011T2011

1

T2012T2012

1

+VCC_RTC

ACZ_BCLK_AUD36

ACZ_SYNC_AUD36

SB_SPKR36

ACZ_RST#_AUD36,37

ACZ_SDIN0_AUD36

R1.1 10/31 IOAC

ACZ_SDOUT_AUD36

SPI_CLK28

SPI_CS#028

SPI_CS#128

C2001

SPI_SO28

SPI_SI28

RTC_X1_C

12

GND

T2021T2021

T2022T2022

T2002T2002

T2004T2004

T2005T2005

T2006T2006

T2007T2007

2

3

T2001T2001

1

14

X2001

32.768KHZ

SP2009SP2009

SP2008SP2008

SP2010SP2010

1

SP2011SP2011

1

SPI_CS#1

1 2

C2006 33PF /50V@C2006 33PF/ 50V@

1 2

SP2005SP2005

12

1 2

R2006330KOhm 1% R2006330KOhm 1%

R2002

10MOhm

3

12

RTC_X1

RTC_X2

RTC_RST#

SRTC_RST#

SM_INTRUDER#

PCH_INTVRMEN

ACZ_BCLK

ACZ_SYNC

ACZ_RST#

Remove TP

ACZ_SDIN2_AUD

ACZ_SDIN3_AUD

ACZ_SDOUT

R2050 near R2008

HDA_DOCK_EN#

CARDREADER_RESET

PCH_JTAG_TCK_BUF

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

+3VSUS_ORG

+1.05VM_ORG

+VTT_PCH_VCCIO

U2001A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN#/GPIO33

N32

HDA_DOCK_RST#/GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

COUGAR_POINT_ES1

02V000000001

+VCC_RTC

2

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

R1.0 Delete +RTCBAT

C38 A38 B37 C37

D36

SNN_PCH_DRQ#0

E36

SNN_LPC_DRQ#1

K36

Serial Interrupt Request

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

Y10

AB12

AB13

RBIAS_SATA3

AH1

P3

SATA0GP

V14

P1

SATA_COMP

SATA3_COMP

+VCC_RTC 22,27

+3VA

+3VA 6,26,27,30,31,57,59,60,81,88,93

+3VS

+3VS 17,21,22,23,24,25,26,27,28,30,32,33,36,37,44, 45,48,50,51,53,57,59,61,80,91,92

+3VSUS_ORG 21,22,24,25,26,27,33

+1.05VM_ORG 27

+VTT_PCH_VCCIO 26,27

LPC

FWH4/LFRAME#

LDRQ1#/GPIO23

RTCIHDA

SATA 6G

SATA

SATAICOMPO

SATAICOMPI

JTAG

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SPI

SATA0GP/GPIO21

SATA1GP/GPIO19

T2032T2032

1

T2033T2033

1

R1.0

R2007 37.4Ohm1%R2007 37.4Ohm1%

1 2

R2047 49.9Ohm1%R2047 49.9Ohm1%

1 2

R2048 750Ohm1%R2048 750Ohm1%

1 2

R2025 10KOhmR 2025 10KOhm

SATA_LED#

T2034T2034

1

R1.1 11/04

R1.0

LPC_AD0 30,44,59 LPC_AD1 30,44,59 LPC_AD2 30,44,59 LPC_AD3 30,44,59

LPC_FRAME# 30,44,59

INT_SERIRQ 30,44,59

SATA_RXN0 51 SATA_RXP0 51 SATA_TXN0 51 SATA_TXP0 51

SATA_RXN1 53 SATA_RXP1 53 SATA_TXN1 53 SATA_TXP1 53

SATA_RXN2 51 SATA_RXP2 51 SATA_TXN2 51 SATA_TXP2 51

+VTT_PCH_VCCIO

GND

+3VS

BBS_BIT0 24

1

HDD1

HDD2

ODD

mSATA

Remove JTAG schematic

A A

5

4

Strap information:

SB_SPKR: No reboot strap Low: Disable (Default) High:Enable

ACZ_SDOUT:

1.Flash descriptor security: Sampled Low: in effect. Sampled High: override

2.ACZ_SDOUTwhich sample high on the rising edge of PWROK Will also disable Intel ME.

ACZ_SYNC: On Die PLL VR voltage selector Low: 1.8V (Default) High: 1.5V note : CRB has no strap Hrron River Platform Schematic Design Checklist (438390 page 48)

SB_SPKR

ACZ_SDOUT

ACZ_SYNC

3

R2020 1KOhm@R2020 1KOhm@

1 2

R2034 1KOhm@R2034 1KOhm@

1 2

R2036 1KOhmR2036 1KOhm

1 2

VCCVRAM use +1.5VS in mobile

+3VS

+3VSUS_ORG

2

Pull High

INT_SERIRQ

SATA0GP

1 2

R2026 10KOhmR2026 10KOhm

1 2

R2027 10KOhmR2027 10KOhm

+3VS

Title :

PCH(1)_SATA,IHDA,RTC,LPC

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet

Date: Sheet of

Joyoung_Chianhg

20 93Monday, February 13, 2012

Rev

1.0

of

5

Frank 0513_Add USB3.0 and Card Reader PCIE and CLKRQ

Frank 0517_Add 3G PCIE and CLKRQ in Port3.

Joyoung R1.0

PCIE_RXN1_CR59

D D

C C

B B

PCIE_RXP1_CR59 PCIE_TXN1_CR59 PCIE_TXP1_CR59

PCIE_RXN2_WLAN53

PCIE_RXP2_WLAN53 PCIE_TXN2_WLAN53 PCIE_TXP2_WLAN53

PCIE_RXN3_mSATA53

PCIE_RXP3_mSATA53 PCIE_TXN3_mSATA53 PCIE_TXP3_mSATA53

PCIE_RXN4_GLAN33 PCIE_RXP4_GLAN33

PCIE_TXN4_GLAN33

PCIE_TXP4_GLAN33

R1.1 remove /niAMT remark

CLK_PCIE_CR#59

CLK_PCIE_CR59

CLK_REQ_CR#59

CLK_PCIE_WLAN#_PCH53

CLK_PCIE_WLAN_PCH53

CLK_REQ1_WLAN#53

CLK_PCIE_mSATA#_PCH53

CLK_PCIE_mSATA_PCH53

CLK_REQ3_mSATA#53

CLK_PCIE_LAN#33

CLK_PCIE_LAN33

CLK_REQ_LAN#33

C2112 0.1UF/16VC2112 0.1U F/16V

1 2

C2114 0.1UF/16VC2114 0.1U F/16V

1 2

C2103 0.1UF/16VC2103 0.1U F/16V

1 2

C2104 0.1UF/16VC2104 0.1U F/16V

1 2

C2110 0.1UF/16VC2110 0.1UF/16V

1 2

C2111 0.1UF/16VC2111 0.1UF/16V

1 2

T2101T2101

1

T2102T2102

1

T2108T2108

1

T2109T2109

1

T2104T2104

1

T2105T2105

1

T2106T2106

1

T2107T2107

1

SP2112SP2112

1 2

SP2114SP2114

1 2

SP2110SP2110

1 2

SP2101SP2101

1 2

SP2102SP2102

1 2

SP2103SP2103

1 2

SP2117SP2117

1 2

SP2119SP2119

1 2

R2101 0Ohm /NON_mSATAR2101 0Ohm /NON_mSATA

1 2

SP2107SP2107

1 2

SP2108SP2108

1 2

SP2109SP2109

1 2

T2117T2117

1

T2119T2119

1

PCIE_TXN1_CR_C PCIE_TXP1_CR_C

PCIE_TXN2_WLAN_C PCIE_TXP2_WLAN_C

PCIE_TXN4_GLAN_C PCIE_TXP4_GLAN_C

PCIE_TXN5_CR_C PCIE_TXP5_CR_C

PCIE_TXN6_USB30_C PCIE_TXP6_USB30_C

CLK_REQ0#

CLK_REQ1#

CLK_PCH_SRC2_N CLK_PCH_SRC2_P

CLK_REQ2#

CLK_PCH_SRC3_N CLK_PCH_SRC3_P

CLK_REQ3#

CLK_PCH_SRC4_N CLK_PCH_SRC4_P

CLK_REQ4#

CLK_PCH_SRC5_N CLK_PCH_SRC5_P

CLK_REQ5#

CLK_REQ_PEG_B#

CLK_PCH_SRC6_N

T2114T2114

1

CLK_PCH_SRC6_P

T2115T2115

1

CLK_REQ6#

T2116T2116

1

CLK_REQ7#

Remove XDP.

Joyoung R2.0 add GPIO Table for on board RAM Strap.

BG34

BJ34 AV32 AU32

BE34 BF34 BB32 AY32

BG36

BJ36 AV34 AU34

BF36 BE36 AY34 BB34

BG37 BH37 AY36 BB36

BJ38 BG38 AU36 AV36

BG40

BJ40 AY40 BB40

BE38 BC38

AW38

AY38

AB49 AB47

AA48 AA47

AB42 AB40

AK14 AK13

Y40 Y39

J2

M1

V10

Y37 Y36

A8

Y43 Y45

L12

V45 V46

L14

E6

V40 V42

T13

V38 V37

K12

On Board RAM Setting

A A

5

0000 0001

0010

0110

0101 Micron 1333MHz 2GB

XXXX 1000

1001

GPIO65GPIO66GPIO67

4

U2001B

PERn1 PERp1 PETn1 PETp1

PERn2 PERp2 PETn2 PETp2

PERn3 PERp3 PETn3 PETp3

PERn4 PERp4 PETn4 PETp4

PERn5 PERp5 PETn5 PETp5

PERn6 PERp6 PETn6 PETp6

PERn7 PERp7 PETn7 PETp7

PERn8 PERp8 PETn8 PETp8

CLKOUT_PCIE0N CLKOUT_PCIE0P

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

CLKOUT_PCIE6N CLKOUT_PCIE6P

PCIECLKRQ6#/GPIO45

CLKOUT_PCIE7N CLKOUT_PCIE7P

PCIECLKRQ7#/GPIO46

CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P

02V000000001

4

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SMBUSController

SML1ALERT#/PCHHOT#/GPIO74

PCI-E*

100MHz

CLOCKS

100MHz

COUGAR_POINT_ES1

100MHz

On Board RAM SettingGPIO64

No on board RAM Micron 1333MHz 4GB

Elpida 1333MHz 4GB

Elpida 1333MHz 2GB

TBD Common Definition 1333MHz 4GB

Common Definition 1600MHz 4GB

33MHz

FLEX CLOCKS

SML1CLK/GPIO58

SML1DATA/GPIO75

Link

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N

100MHz

CLKOUT_PEG_A_P

CLKOUT_DMI_N

100MHz

CLKOUT_DMI_P

CLKOUT_DP_N

120MHz

CLKOUT_DP_P

CLKIN_DMI_N

100MHz

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_DOT_96N

96MHz

CLKIN_DOT_96P

CLKIN_SATA_N

100MHz

CLKIN_SATA_P

14.31818MHz

CLKIN_PCILOOPBACK

XCLK_RCOMP

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

SML0DATA

CL_DATA1

CL_RST1#

CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

E12

H14

C9

A12

C8

G12

C13

E14

M16

M7

T11

P10

CLK_REQ_PEG_A#

M10

CLK_PCIE_PEG#_PCH_L

AB37

CLK_PCIE_PEG_PCH_L

AB38

AV22 AU22

CLK_DP_N

AM12

CLK_DP_P

AM13

BF18 BE18

BJ30 BG30

G24 E24

AK7 AK5

K45

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_COMP

Y47

K43

F47

H47

K49

R2.0 12/15

EXT_SCI#

SCL_3A

SDA_3A

DRAMRST_CNTRL_PCH_R

SML0_CLK

SML0_DAT

SML1ALERT#

SML1_CLK

SML1_DAT

CLK_BUF_EXP_N CLK_BUF_EXP_P

CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P

CLK_BUF_DOT96_N CLK_BUF_DOT96_P

CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

SYSRAM00

SYSRAM01

SYSRAM02

SYSRAM03

+3VS +3VS +3VS +3VS

3

R2.0 12/14

/NON_DS3

1 2

R2161 0Ohm

NB_R0402_20MIL_SMALL

R2103

R2103 R2104

R2104

NB_R0402_20MIL_SMALL

R2106 90.9OhmR2106 90.9Ohm

1 2

12

R2152

R2144

10KOhm

/2G

@

12

R2149

R2153

10KOhm

/4G

3

EXT_SCI# 30,59

SCL_3A 28

SDA_3A 28

DRAMRST_CNTRL_PCH 5,9,30

T2133T2133

1

T2134T2134

1

SML1_CLK 28

SML1_DAT 28

12 12

R2.0 Modify RAM Strap PIN

12

R2154

R2154 10KOhm

10KOhm

/ELPIDA

12

R2155

R2155 10KOhm

10KOhm

/MICRON

GNDGNDGND

CLK_PCIE_PEG#_PCH 70 CLK_PCIE_PEG_PCH 70

CLK_EXP_N 4 CLK_EXP_P 4

CLK_DP_N 4 CLK_DP_P 4

CLK_PCI_FB 24

+VCCDIFFCLKN

12

R2156

R2156 10KOhm

10KOhm

/MICRON

12

R2157

R2157 10KOhm

10KOhm

/ELPIDA

GND

R1.0

CLKREQ_PEG# 70

2

+3VS

+VTT_PCH_ORG

+3VSUS_ORG

To EC

Joyoung R1.0 modify CLK_REQ

25-MHz is required in:

1. FCIM

2. BTM for PCH Display Clock gereration in Integrated Graphics platforms

R21421MOhm R21421M Ohm

1 2

SP2111SP2111

1 2

SYSRAM00 SYSRAM01 SYSRAM02 SYSRAM03

2

+3VS 17,20,22,23,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53, 57,59,61,80,91,92

+VTT_PCH_ORG 22,26,27

+3VSUS_ORG 20,22,24,25,26,27,33

R2.0 12/20

R1.1 S3 RAM reset CTRL

XTAL25_OUT_C

R2.0 12/14

C2101

1 2

10PF/50V

4

2

X2103

X2103 25MHZ

25MHZ

1 3

C2102

1 2

10PF/50V

CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P

CLK_BUF_EXP_N CLK_BUF_EXP_P CLK_BUF_DOT96_N CLK_BUF_DOT96_P CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

EXT_SCI#

SCL_3A

SDA_3A

DRAMRST_CNTRL_PCH_R

SML0_CLK

SML0_DAT

SML1_CLK

SML1_DAT

SML1ALERT#

PCH CLKREQ Setting: Not connected to device.

R1.0 0118

CLK_REQ0#

CLK_REQ5#

CLK_REQ7#

GND

CLK_REQ_PEG_B#

CLK_REQ6#

GND

Connected to device.

GND

Default : Clock free run. (PD 10K). Reserver 10K PU for power saving purpose. Eric Fang to Alan Chien on 11/15/2010

CLK_REQ1#

CLK_REQ2#

CLK_REQ3#

CLK_REQ4#

CLK_REQ_PEG_A#

CLK_REQ3#

CLK_REQ4#

CLK_REQ1#

CLK_REQ2#

Date: Sheet of

3 4 1 2

3 4 1 2 3 4 1 2 3 4 1 2

R2116 10KOhmR2116 10KOhm

1 2

CLOCK TERMINATION for FCIM Default power-on mode is ICC.

R2117 10KOhmR2117 10KOhm

1 2

RN2103B 2.2KOhmRN2103B 2.2KOhm

RN2103A 2.2KOhmRN2103A 2.2KOhm

R2120 10KOhm@R2120 10KOhm@

1 2

3 4

1 2

3 4

R2125 10KOhm@R2125 10KOhm@

1 2

R2150 10KOhm@R2150 10KOhm@

1 2

R2139 10KOhm@R2139 10KOhm@

1 2

3 4

1 2

R2143 10KOhm@R2143 10KOhm@

1 2

R2133 10KOhmR2133 10KOhm

1 2

R2128 10KOhmR2128 10KOhm

1 2

R2151 10KOhmR2151 10KOhm

1 2

R2135 10KOhmR2135 10KOhm

1 2

R2140 10KOhmR2140 10KOhm

1 2

R2141 10KOhm@R2141 10KOhm@

1 2

R2148 10KOhm@R2148 10KOhm@

1 2

R2146 10KOhm@R2146 10KOhm@

1 2

R2138 10KOhm@R2138 10KOhm@

1 2

R2145 10KOhm@R2145 10KOhm@

1 2

PEGATRON COMPUTER INC

Size Project Name

C

MA50

10KOhm

10KOhm 10KOhm

10KOhm

10KOhm 10KOhm

10KOhm

2.2KOhm

10KOhm

34

12

1

RN2108B

RN2108B RN2108A

RN2108A

RN2109B

RN2109B RN2109A

RN2109A RN2110B

RN2110B RN2110A

RN2110A RN2111B

RN2111B RN2111A

RN2111A

RN2104B

RN2104A

RN2105A

RN2105B

RN2107B

RN2107A

Title :

Engineer:

1

GND

+3VSUS_ORG

**UNSTUFF**

+3VSUS_ORG

**UNSTUFF**

+3VS

+3VSUS_ORG

GND

PCH(2)_PCIE,CLK,SMB,PEG

Joyoung_Chianhg

21 93Monday, February 13, 2012

Rev

1.0

5

DMI_RXN03 DMI_RXN13 DMI_RXN23 DMI_RXN33

DMI_RXP03 DMI_RXP13 DMI_RXP23

D D

Remove SUSACK#.

R1.0 Add XDP_DBRESET#

C C

Add ME_PWROK.

PM_RSMRST# has pull down 10k ohm in EC

R1.0 Add PM_PWRBTN#_R

DMI_RXP33

DMI_TXN03 DMI_TXN13 DMI_TXN23 DMI_TXN33

DMI_TXP03 DMI_TXP13 DMI_TXP23 DMI_TXP33

+VTT_PCH_ORG

GND

SUSACK#30

+3VS

PM_PWROK4,30,92

ME_PWROK30 SUSCLK 30

PM_DRAM_PWRGD4

PM_RSMRST#30

ME_SUSPWRDNACK30

PM_PWRBTN#30

ME_AC_PRESENT30

T2201T2201

T2202T2202

R2201 49.9Ohm1%R2201 49.9Ohm1%

R2202 750Ohm1%R2202 750Ohm1%

R2205 10KOhmR2205 10KOhm

SYS_PWROK

R2240 0OhmR2240 0Ohm R2242 0Ohm@R2242 0Ohm@

R1.1 DS3 10/31

1

SYS_PWROK for PCH

R2244 0Ohm/DS3R2244 0Ohm/DS3

4

12

0Ohm

12

R2246

/NON_DS3 R2246

/NON_DS3

12

1 2

D22011.2V/0.1A @ D22011.2V/0.1A @

12 12

R2245 0OhmR2245 0Ohm

R2243 0OhmR2243 0Ohm

R2241 0OhmR2241 0Ohm

R1.1 DS3 10/31

12

DMI_COMP_R

RBIAS_CPY

R1.1 DS3 10/31

PM_SYSRST#_R

PM_APWROK_R

12

BATLOW#

RI#

SUSACK#_RSUS_PWR_ACK_R

PM_RSMRST_R

SUS_PWR_ACK_R

U2001C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

02V000000001

COUGAR_POINT_ES1

3

BJ14

FDI_RXN0

AY14

FDI_RXN1

BE14

FDI_RXN2

BH13

FDI_RXN3

BC12

FDI_RXN4

BJ12

FDI_RXN5

BG10

FDI_RXN6

BG9

FDI_RXN7

BG14

FDI_RXP0

BB14

FDI_RXP1

BF14

FDI_RXP2

BG13

FDI_RXP3

BE12

FDI_RXP4

BG12

FDI_RXP5

BJ10

FDI_RXP6

DMI

FDI

DMI

FDI

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

System Power Management

SLP_LAN#/GPIO29

SUSCLK/GPIO62

SLP_S5#/GPIO63

FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

BH9

AW16

AV12

BC10

AV14

BB10

A18

E22

B9

N3

G8

N14

D10

H4

F4

G10

G16

AP14

K14

DSWODVREN

PCH_DPROK

PCIE_WAKE#

PM_SUS_STAT#

SLP_S5#

SLP_DSW#_RAC_PRESENT_R

R1.1 Remove some SP in P22

R2215 200KOhm 1%@R2215 200KOhm 1%@

1 2

R2214 200KOhm 1%R2214 200KOhm 1%

1 2

R1.1 DS3 10/31

R2247 0OhmR2247 0Ohm

/NON_DS3

R2219 0Ohm

R2219 0Ohm R2218 0Ohm

R2218 0Ohm

/DS3

R2217 0Ohm

@

12

GND

+VCC_RTC

12 12

R1.1 IOAC, 10/31

12

PM_RSMRST_R

T2203T2203

1

T2204T2204

1

2

+3VSUS_ORG

+3VS

+VTT_PCH_ORG

FDI_TXN0 3 FDI_TXN1 3 FDI_TXN2 3 FDI_TXN3 3

FDI_TXN4 3 FDI_TXN5 3 FDI_TXN6 3 FDI_TXN7 3

FDI_TXP0 3 FDI_TXP1 3 FDI_TXP2 3 FDI_TXP3 3

FDI_TXP4 3 FDI_TXP5 3 FDI_TXP6 3 FDI_TXP7 3

FDI_INT 3

FDI_FSYNC0 3

FDI_FSYNC1 3

FDI_LSYNC0 3

FDI_LSYNC1 3

DSWODVREN - On Die DSW VR Enable HIGH - Enabled(DEFAULT) ; LOW-Disabled

LAN_WAKE# 30,33

PM_CLKRUN# 30,59

PM_SUSC# 30

PM_SUSB# 30

ME_PM_SLP_M# 30

SLP_SUS# 30,91

H_PM_SYNC 4

ME_PM_SLP_LAN# 30

+VCC_RTC

+12VSUS

EC_RST# 30,32

R1.0

+3VSUS

+5VSUS

+3VA

R1.0

1

+3VSUS_ORG 20,21,24,25,26,27,33

+3VS 17,20,21,23,24,25,26,27,28,30,32,33,36,37,44, 45,48,50,51,53,57,59,61,80,91,92

+VTT_PCH_ORG 26,27

+3VA 6,20,26,27,30,31,57,59,60,81,88,93

+VCC_RTC 20,27

+3VSUS 4,24, 28,30,60,81,92

+5VSUS 51,57,59, 91

+12VSUS 28,51,81,91

+3VSUS

B B

DELAY_VR_AND_ALL_SYS92

A A

PM_PWROK

5

U2201

A

1

VCC

B

2

3 4

GND

Vcc=2~5.5

5

Y

SYS_PWROK

+3VSUS_ORG

RI#

R2223 10KOhmR2223 10KOhm

1 2

BATLOW#

R2224 10KOhmR2224 10KOhm

R1.0

PCIE_WAKE#

R1.0

PM_CLKRUN#

PM_PWROK

4

R2220 10KOhmR2220 10KOhm

1 2

R2221 10KOhmR2221 10KOhm

1 2

3

+3VS

ME_PM_SLP_M#

ME_SUSPWRDNACK

R1.1 11/10

GND

ME_AC_PRESENT

ME_PM_SLP_LAN#

R2225 1KOhmR2225 1KOhm

R2226 10KOhm@R2226 10KOhm@

R2227 10KOhmR2227 10KOhm

R2228 10KOhmR2228 10KOhm

R2229 10KOhm@R2229 10KOhm@

2

1 2

Title :

PCH(3)_FDI,DMI,SYS PWR

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet

Date: Sheet of

Joyoung_Chianhg

22 93Monday, February 13, 2012

Rev

1.0

of

5

+3VS

+3VS 17,20,21,22,24,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53, 57,59,61,80,91,92

L_CTRL_CLK

L_CTRL_DATA

EDID_CLK_PCH

EDID_DATA_PCH

D D

1 2

2.2KOhm

3 4

2.2KOhm

1 2

2.2KOhm

3 4

2.2KOhm

RN2301A

RN2301B

RN2302A

RN2302B

+3VS

Pull up 2.2k ohm in DDC bus for LVDS .

Remove LVDS net name and add port B.

C C

4

SP2301SP2301 SP2302SP2302

L_CTRL_CLK L_CTRL_DATA

12 12

R2307 1KOhm0.5%R2307 1KOhm0.5%

1 2 1 2

LVD_VREF

12

LVD_IBG LVD_VBG

EDID_DATA_PCH45

R1.0

LCD_BKEN_PCH45

L_VDDEN_PCH45

L_BKLT_CTRL45

EDID_CLK_PCH45

GND

LVDS_LCLKN_PCH45 LVDS_LCLKP_PCH45

LVDS_L0N_PCH45 LVDS_L1N_PCH45 LVDS_L2N_PCH45

LVDS_L0P_PCH45 LVDS_L1P_PCH45 LVDS_L2P_PCH45

R2301 2.37KOhmR2301 2.37KOhm R2302 0Ohm@R2302 0Ohm@

SP2303SP2303

1 2

GND

U2001D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

COUGAR_POINT_ES1

02V000000001

3

SDVO_STALLN SDVO_STALLP

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

2

Display Port BDisplay Port C

HDMI_DDC_CLK_PCH 48 HDMI_DDC_DATA_PCH 48

HDMI_HPD_PCH 48

HDMI_TXN2_PCH 48 HDMI_TXP2_PCH 48 HDMI_TXN1_PCH 48 HDMI_TXP1_PCH 48 HDMI_TXN0_PCH 48 HDMI_TXP0_PCH 48 HDMI_CLKN_PCH 48 HDMI_CLKP_PCH 48

1

SDVO

Display Port D

CRT Disable: (For discrete graphic)

1. NC:

CRT_RED,CRT_GREEN,CRT_BLUE

CRT_HSYCN,CRT_VSYNC

2. 1-kΩ ±0.5% pull-down to GND:

DAC_IREF

3. Connected to GND:

CRT_ITRN

B B

4. Connect to +V3.3:

VCCADAC

A A

5

DisPlay Port Disable: (For discrete graphic)

1. NC:

ALL

4

LVDS Disable: (For discrete graphic)

1. NC:

LVDSA_DATA [3:0], LVDSA_DATA# [3:0],

LVDSA_CLK, LVDSA_CLK#, LVDSB_DATA [3:0],

LVDSB_DATA# [3:0], LVDSB_CLK, LVDSB_CLK#

L_VDD_EN, L_BKLTEN, L_BKLTCTL, LVD_VREFH

LVD_VREFL, LVD_IBG, LVD_VBG

2. Connected to GND:

VccALVDS,VccTX_LVDS

3

Title :

PCH(4)_DP,LVDS,CRT

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet of

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

23 93Monday, February 13, 2012

5

+3VS

12

R2430

R2430 10KOhm

10KOhm

@

U2403

1 2

**UNSTUFF**

**UNSTUFF** **UNSTUFF**

+3VSUS

VGA_PWRON91

D D

C C

Frank 20110608 SP2401 is removed in EIH31. SATA_ODD_DA# has short pin in EIH31.

R2414 0Ohm@R2414 0Ohm@

R1.1 add Zero Power ODD

B B

5

A

VCC

B

4

GND3Y

SN74LVC1G08DCKR

@

R2413 0Ohm

1 2

/DGPU

+3VS

R2431 10KOhm@R2431 10KOhm@

1 2

R2432 10KOhmR2432 10KOhm

1 2

R2433 10KOhm@R2433 10KOhm@

1 2

R2434 10KOhm@R2434 10KOhm@

1 2

BBS_BIT0,BBS_BIT1 : Boot BIOS Strap

Boot BIOS Strap

BBS_BIT0BBS_BIT1 Boot BIOS Location

0 0

0 1

1 0

1 1 SPI

A A

This Signal has a weak internal pull-up.

R1.0 Add BBS_BIT1 signal.

Sampled on rising edge of PWROK.

BBS_BIT020

5

BBS_BIT0

BBS_BIT1

R2417 1KOhm@R2417 1KOhm@

R2418 1KOhm@R2418 1KOhm@

1 2

LPC

Reserved (NAND)

Reserved

R2415 0Ohm@R2415 0Ohm@

1 2

GND

DGPU_HOLD_RST#70

DGPU_PWR_EN57

DGPU_PWR_EN is active high

(PCH)

GND

1 2

SUSB_EC# 30,57,91,92

MPC_PWR_CTRL#

SATA_ODD_DA#

EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH

STP_A16OVR: A16 swap override Strap/ Top-Block swap override jumper

Low=Enabled A16 swap override/ Top-Block swap override

High=Default

STP_A16OVR

4

DGPU_PWR_EN

R2419 1KOhm@R2419 1KOhm@

4

SATA_ODD_DA#51

CLK_TPM59

CLK_PCI_FB21

CLK_KBCPCI_PCH30

CLK_DEBUG44

1 2

USB3_RX1_N52 USB3_RX2_N52 USB3_RX3_N52

USB3_RX1_P52 USB3_RX2_P52 USB3_RX3_P52

USB3_TX1_N52 USB3_TX2_N52 USB3_TX3_N52

USB3_TX1_P52 USB3_TX2_P52 USB3_TX3_P52

R1.0 0209

+3VS

SP2401 R0402SP2401 R0402

1 2

T2401T2401

C2404

@

1 2

GND

T2407T2407

T2404T2404

1

PLT_RST#

T2405T2405

C2403

C2403 10PF/50V

10PF/50V

1 2

@

GND

SP2402 R0402SP2402 R0402

10PF/50V

10KOhm

7 8

10KOhm

1 2

10KOhm

5 6

10KOhm

1

DGPU_PWR_EN_R

1

R2405 1KOhm@R2405 1KOhm@

1 2

A15:R2409=100ohm for EA .

1

RN2403D

RN2403D RN2403A

RN2403A RN2403C

RN2403C

12 12 12 12

R241222Ohm R241222Ohm R240922Ohm R240922Ohm R241022Ohm R241022Ohm R241122Ohm R241122Ohm

INT_PIRQB# INT_PIRQC# INT_PIRQD#

DGPU_HOLD_RST#_R DGPU_SELECT#

BBS_BIT1 DGPU_PWM_SELECT# STP_A16OVR

MPC_PWR_CTRL# SATA_ODD_DA# EXTTS_SNI_DRV0_PCH EXTTS_SNI_DRV1_PCH

PCI_PME#

CLK_TPM_R CLK_PCI_FB_R CLK_KBCPCI_PCH_R CLK_DEBUG_R CLK_DBG_R

INT_PIRQA#

RN2403B

3 4

10KOhm

Reserved for Wireless team

**UNSTUFF** **UNSTUFF**

DGPU_PWM_SELECT# DGPU_SELECT# DGPU_HOLD_RST#_R

DGPU_PWR_EN_R

3

U2001E

BG26

TP1

BJ26

TP2

BH25

TP3

BJ16

TP4

BG16

TP5

AH38

TP6

AH37

TP7

AK43

TP8

AK45

TP9

C18

TP10

N30

TP11

H3

TP12

AH12

TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18

AB46

TP19

AB45

TP20

RSVD

B21

TP21

M20

TP22

AY16

TP23

BG46

TP24

0

BE28

TP25

1

BC30

TP26

2

BE32

TP27

3

BJ32

TP28

0

BC28

TP29

1

BE30

TP30

2

BF32

TP31

3

BG32

TP32

0

AV26

TP33

1

BB26

TP34

2

AU28

TP35

3

AY30

TP36

0

AU26

TP37

1

AY26

TP38

2

AV28

TP39

3

AW30

TP40

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

COUGAR_POINT_ES1

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

02V000000001

3

RSVD

USB30 port 1 RXN USB30 port 2 RXN USB30 port 3 RXN USB30 port 4 RXN

USB30 port 1 RXP USB30 port 2 RXP USB30 port 3 RXP USB30 port 4 RXP

USB30 port 1 TXN USB30 port 2 TXN USB30 port 3 TXN USB30 port 4 TXN

USB30 port 1 TXP USB30 port 2 TXP USB30 port 3 TXP USB30 port 4 TXP

PCI

33MHz

R2420 10KOhm@R2420 10KOhm@

1 2

R2421 10KOhm@R2421 10KOhm@

1 2

R2422 10KOhmR2422 10KOhm

1 2

R2423 1KOhmR2423 1KOhm

1 2

RSVD1 RSVD2 RSVD3 RSVD4

RSVD5 RSVD6

RSVD7 RSVD8

RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14 RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20 RSVD21 RSVD22

RSVD23 RSVD24

RSVD25

RSVD26 RSVD27

RSVD28 RSVD29

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N USBP9P

USBP10N USBP10P

USB

USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

+3VS

AY7 AV7 AU3 BG4

AT10 BC8

AU2 AT4 AT3 AT1 AY3 AT5 AV3 AV1 BB1 BA3 BB5 BB3 BB7 BE8 BD4 BF6

AV5 AV10

AT8

AY5 BA2

AT12 BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

NV_RCOMP

USB_PN0 USB_PP0 USB_PN1 USB_PP1 USB_PN2 USB_PP2 USB_PN3 USB_PP3 USB_PN4 USB_PP4 USB_PN5 USB_PP5 USB_PN6 USB_PP6

USB_PN9 USB_PP9 USB_PN10 USB_PP10 USB_PN11 USB_PP11

USB_PN13 USB_PP13

USB_BIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43 OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

PLT_RST#

2

+3VSUS

+3VSUS_ORG

+12VS

+1.8VS

PLT_RST#

R2427 32.4Ohm1%

1 1 1 1

1 1

+3VSUS 4,22,28,30,60,81,92

+3VS

+3VS 17,20,21,22,23,25,26,27,28,30,32,33,36,37,44,45,48,50,51,53, 57,59,61,80,91,92

+3V

+3V 45,57,59,61,91

+3VSUS_ORG 20,21,22,25,26,27,33

+12VS 28,36,48,91

+1.8VS 7,25,26,57,80,84

PLT_RST#

1 2

@

T2414T2414 T2415T2415 T2420T2420 T2421T2421

T2428T2428 T2429T2429

A15: R2416=19.6 ohm for EA.

R2424 22.6Ohm1%R 2424 22.6Ohm1%

1 2

10KOhm

5 6

10KOhm

7 8

10KOhm

5 6

10KOhm

3 4

10KOhm

1 2

10KOhm

7 8

10KOhm

3 4

10KOhm

1 2

R2436 0Ohm

/HRUSB20

1 2

R2435 0OhmR2435 0Ohm

1 2

R2429 0OhmR2429 0Ohm

U2402

A

1

5

VCC

B

2

3 4

GND

Y

Vcc=2~5.5

06V030000005

GND

@

1 2

R2425 0Ohm

2

GND

USB_PN0 53 USB_PP0 53 USB_PN1 52 USB_PP1 52 USB_PN2 52 USB_PP2 52 USB_PN3 52

USB_PP3 52 USB_PN4 61 USB_PP4 61

USB_PN9 52 USB_PP9 52

USB_PN10 45

USB_PP10 45

USB_PN11 53

USB_PP11 53

GND

RN2401A

RN2401A RN2402C

RN2402C RN2401D

RN2401D RN2401C

RN2401C RN2402B

RN2402B RN2402A

RN2402A RN2402D

RN2402D RN2401B

RN2401B

Place within 500 mils of PCH

R2437

R2437 0Ohm

0Ohm

/CRUSB30

1 2

+3V

1

USB PORT

USB P00

Mini PCIE (mSATA)

USB P01

External 2.0/3.0

USB P02

External Main

USB P03

External Main

USB P04

BT

USB P05

USB P08

USB P09

Debug Port

USB P10

Camera

USB P11

WiFi

USB P12

USB P13

+3VSUS_ORG

Remove OC# to XDP.

USB_OC9# 52

R1.1 add OC# pin for add USB port9

USB_OC1# 52

USB_OC0# 52

BUF_PLT_RST# 4,30,32,33,53,59,70

12

R2426

R2426 10KOhm

10KOhm

GND

Title :

PCH(5)_PCI,NVRAM,USB

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

24 93Monday, February 13, 2012

5

4

3

+3VSUS

+3VSUS_ORG

2

+3VS

+3VS 17,20,21,22,23,24,26,27,28,30,32,33,36,37,44, 45,48,50,51,53,57,59,61,80,91,92

+3VSUS 4,22, 24,28,30,60,81,92

+3VSUS_ORG 20,21,22,24,26,27,33

1

R1.0

D D

+3VS

R2.0 12/22

@

C C

**UNSTUFF**

B B

**UNSTUFF**

GND

EXT_SMI#

USB30_EXT_SMI#

PM_LANPHY_EN

AOAC_ON

Joyoung R1.0 mount if suppot AOAC

RCIN# has pull high at EC side

DGPU_HPD_INTR#

DGPU_PWROK

Unused GPIO

GPIO0

GPIO1

STP_PCI#

WLAN_LED

GPIO27

#438390 Checklist

DGPU_PWROK

12

R2525

10KOhm

R2526

10KOhm

12

R2527

R2527 10KOhm

10KOhm

/DS3

12

R2528

10KOhm

/NON_DS3

GND

R2529 1KOhmR2529 1KOhm

1 2

R2531 10KOhm@R2531 10KOhm@

R2538 10KOhm@R2538 10KOhm@

R2541 10KOhm@R2541 10KOhm@

R2534 10KOhm@R2534 10KOhm@

R2539 10KOhmR2539 10KOhm

R2536 10KOhmR2536 10KOhm

R2545 10KOhm@R2545 10KOhm@

R2537 10KOhmR2537 10KOhm

R2542 10KOhm@R2542 10KOhm@

R2548 10KOhm@R2548 10KOhm@

R2540 10KOhm@R2540 10KOhm@

PCB_ID0

PCB_ID1

12

Joyoung R1.0

DGPU_PRSNT#

A A

DGPU_PRSNT#

Joyoung R1.0 for BIOS detect Panel

GPIO7

R2126 10KOhm/UMAR2126 10KOhm/UM A

1 2

R2134 10KOhm/DGPUR2134 10KOhm/DGPU

1 2

R2549 10KOhm/LVDSR2549 10KOhm/LVDS

R2547 10KOhm/eDPR2547 10KOhm/eDP

5

12

Add PM_LANPHY_EN

Add HOST_ALERT#1_R.

DGPU_PWROK has 100 ms software delay , no hardware delay requirement

Reserve PCH_GPIO24

Add SATA_ODD_PRSNT#_R and FDI_OVRVLTG.

Add CRIT_TEMP_REP#_R.

+3VSUS_ORG

R1.0 Intel Comments

Joyoung R1.0

Joyoung R1.1 remove /niAMT remark

+3VS

R1.0

R2518 1KOhm1%

+3VS GND

FDI TERMINATION VOLTAGE OVERRIDE

- GPIO37 (FDI_OVRVLTG) LOW - TX, RX terminated to same voltage (DC Couplong Mode)

GND

+3VS

GND

+3VS

GND

DEFAULT

R2520 200KOhmR2520 200KOhm

+3VS

DMI TERMINATION VOLTAGE OVERRIDE

- GPIO36 (SATA_ODD_PRSNT#) LOW - TX, RX terminated to same voltage (DC Couplong Mode) DEFAULT

R1.1 add Zero Power ODD

1 2

@

1 2

WLAN_ON_R

4

LAN_LPWR33

DGPU_PWROK87,91

R1.0 0105

R1.1 Change WLAN_ON to WLAN_ON_PCH

Frank 0531 EE define GPIO for BROADCOM LAN chip.

SATA_ODD_PRSNT#_R51

R1.1 add Zero Power ODD

BT_ON30,53,61

R1.1 DS3 10/31

Frank 0502 NO BT module, but the GPIO control pin will conntact to page 55. It supports combo card. Frank 0502 No WLAN LED,so GPIO pin change test point

Frank 0504 CRIT_TEMP_REP#_R change net name CRIT_TEMP_REP# and contact to EC(follow BIC50)

Frank 0516 Remove SATA_DET#4_R to XDP

Frank 0516 Remove PLL_ODVR_EN and SATA_PWR_EN#1_R to XDP

Frank 0516 Remove FDI_OVRVLTG to XDP

Frank 0516 Remove CRIT_TEMP_REP#_R to XDP

FDI_OVRVLTG

SATA_ODD_PRSNT#_R

R2521 1KOhm@R2521 1KOhm@

1 2

Remove CRIT_PCH_GPIO0_R to XDP

EXT_SMI#30,44

AOAC_ON53

RF_ON30,53

SP2501SP2501

T2141T2141

1

T2506T2506

1

PCH_ALERT#

T2512T2512

1

T2511T2511

1

R2519 100KOhmR2519 100KOhm

1 2

SP2505 R0402SP2505 R0402

1 2

DGPU_PWROK

1 2

SATA_PWR_EN#1_R

R2.0 12/13

BT_ON

R2530

@

10KOhm

PLL ON DIE VR ENABLE HIGH - DISABLED (DEFAULT)

GND

LOW - ENABLED

T2503T2503

R25170Ohm @ R25170Ohm @

1 2

GND

GPIO0

GPIO1

DGPU_HPD_INTR#

1

GPIO7

USB30_EXT_SMI#

PM_LANPHY_EN

HOST_ALERT#1_R

DGPU_PRSNT#

WLAN_LED

AOAC_ON

GPIO27

WLAN_ON_R

STP_PCI#

SATA_ODD_PRSNT#_R

FDI_OVRVLTG

PCB_ID0

PCB_ID1

R25230Ohm @ R25230Ohm @

BT_LED

R1.0 0111

3

U2001F

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/GPIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24/MEM_LED

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49

D6

GPIO57

A4

Vss_NCTF1

A44

Vss_NCTF2

A45

Vss_NCTF3

A46

Vss_NCTF4

A5

Vss_NCTF5

A6

Vss_NCTF6

B3

Vss_NCTF7

B47

Vss_NCTF8

BD1

Vss_NCTF9

BD49

Vss_NCTF10

BE1

Vss_NCTF11

BE49

Vss_NCTF12

BF1

Vss_NCTF13

BF49

Vss_NCTF14

COUGAR_POINT_ES1

GPIO

02V000000001

NCTF

TACH4/GPIO68

TACH5/GPIO69

TACH6/GPIO70

TACH7/GPIO71

A20GATE

PROCPWRGD

THRMTRIP#

INIT3_3V#

CPU/MISC

TS_VSS1

TS_VSS2

TS_VSS3

TS_VSS4

Vss_NCTF15

Vss_NCTF16

Vss_NCTF17

Vss_NCTF18

Vss_NCTF19

Vss_NCTF20

Vss_NCTF21

Vss_NCTF22

Vss_NCTF23

Vss_NCTF24

Vss_NCTF25

Vss_NCTF26

Vss_NCTF27

Vss_NCTF28

Vss_NCTF29

Vss_NCTF30

Vss_NCTF31

Vss_NCTF32

PECI

RCIN#

DF_TVS

NC_1

R1.1

SATA_ODD_PWRGT

C40

B41

C41

A40

P4

AU16

P5

AY11

AY10

T14

AY1

AH8

AK11

AH10

AK10

P37

BG2

BG48

BH3

BH47

BJ4

BJ44

BJ45

BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

F1

F49

H_PECI_R

PM_THRMTRIP#

INIT3_3V#

NV_CLE

2

T2508T2508

1

T2507T2507

1

T2505T2505

1

Frank 20110608 H_THRMTRIP# is not connected pull up resister but EIH 31 does not.

GND

R1.1 11/04

1 2

T2504T2504

1

R2502 1KOhmR2502 1KOhm

1 2

TS Signal Disable Guideline TS_VSS[1:4] should pull down to GND Design Guide 0.9 (436735)

add Zero Power ODD

SATA_ODD_PWRGT 51

**UNSTUFF**

R25140Ohm @ R25140Ohm @

R2516390Ohm 1% R2516390Ohm 1%

R2503 2.2KOhmR2503 2.2KOhm

R251543Ohm R251543Ohm

1 2

PEGATRON COMPUTER INC

Size Project Name

C

MA50

Date: Sheet of

MA50

H_THRMTRIP# 4,32

+1.8VS

Title :

Engineer:

1

A20GATE 30

H_PECI 4 H_PECI_EC 30

RCIN# 30

H_CPUPWRGD 4

R1.0

H_SNB_IVB# 4

PCH(6)_CPU,GPIO,MISC

Joyoung_Chianhg

25 93Monday, February 13, 2012

Rev

1.0

5

U2001H

H5

VSS0

AA17

VSS1

AA2

VSS2

AA3

VSS3

AA33

VSS4

AA34

VSS5

AB11

VSS6

AB14

VSS7

AB39

VSS8

AB4

VSS9

AB43

VSS10

AB5

VSS11

AB7

VSS12

AC19

VSS13

AC2

VSS14

D D

C C

AC21

VSS15

AC24

VSS16

AC33

VSS17

AC34

VSS18

AC48

VSS19

AD10

VSS20

AD11

VSS21

AD12

VSS22

AD13

VSS23

AD19

VSS24

AD24

VSS25

AD26

VSS26

AD27

VSS27

AD33

VSS28

AD34

VSS29

AD36

VSS30

AD37

VSS31

AD38

VSS32

AD39

VSS33

AD4

VSS34

AD40

VSS35

AD42

VSS36

AD43

VSS37

AD45

VSS38

AD46

VSS39

AD8

VSS40

AE2

VSS41

AE3

VSS42

AF10

VSS43

AF12

VSS44

AD14

VSS45

AD16

VSS46

AF16

VSS47

AF19

VSS48

AF24

VSS49

AF26

VSS50

AF27

VSS51

AF29

VSS52

AF31

VSS53

AF38

VSS54

AF4

VSS55

AF42

VSS56

AF46

VSS57

AF5

VSS58

AF7

VSS59

AF8

VSS60

AG19

VSS61

AG2

VSS62

AG31

VSS63

AG48

VSS64

AH11

VSS65

AH3

VSS66

AH36

VSS67

AH39

VSS68

AH40

VSS69

AH42

VSS70

AH46

VSS71

AH7

VSS72

AJ19

VSS73

AJ21

VSS74

AJ24

VSS75

AJ33

VSS76

AJ34

VSS77

AK12

VSS78

AK3

VSS79

COUGAR_POINT_ES1

GND GND

COUGAR_POINT_ES1

02V000000001

VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158

AK38 AK4 AK42 AK46 AK8 AL16 AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34 AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2 AN29 AN3 AN31 AP12 AP19 AP28 AP30 AP32 AP38 AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22 AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24 AU30 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8 AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40 AW48 AV11 AY12 AY22 AY28

+VTT_PCH_ORG

+VTT_PCH_VCCIO

R2605 0Ohm@R2605 0Ohm@

SP2606

4

+VTT_PCH_VCC

vx_c0603_small C2601

vx_c0603_small

SP2604

+VTT_PCH_ORG

+VTT_PCH_VCC_EXP

vx_c0603_small C2606

vx_c0603_small

+3VS_VCC3_3

+VTT_PCH_VCCAPLL_FDI

12

+VTT_PCH_VCCDPLL_FDI

1 2

NB_R0402_20MIL_SMALL

12

C2602

C2601

1UF/6.3V

10UF/6.3V

GND

+VTT_PCH_VCCDPLL_EXP

1 2

NB_R0402_20MIL_SMALL

L2601 1kOhm/ 100Mhz

2 1

@

+VTT_PCH_VCCAPLL_EXP

R1.0 Intel Comments

12

C2606 10UF/6.3V

10UF/6.3V

12

C2608

C2607

1UF/6.3V

SP2605

1 2

NB_R0402_20MIL_SMALL

R1.0 Intel Comments

12

C2603

C2603 1UF/6.3V

1UF/6.3V

GND

+VTT_PCH_VCCDPLL_EXP

vx_c0603_small@C2605

vx_c0603_small

12

C2609

@ C2609

@

1UF/6.3V

+3VS_VCCA3GBG

12

C2611

0.1UF/16V

GND

3.799A/29=131mA

+VCCIO_CPU_VCC_DMI

12

C2623

@ C2623

@

1UF/6.3V

GND

3.799A/29=131mA

12

C2605 10UF/6.3V

10UF/6.3V

@

GND

3.799A/29*12= 1.572A

12

C2610

C2610 1UF/6.3V

1UF/6.3V

GND

178mA/8=22.25mA

147mA/4=36.75mA

+VCCAFDI_VRM

47mA/2=23.5mA

3

1.73A

AA23

VccCore1

AC23

VccCore2

AD21

VccCore3

AD23

VccCore4

AF21

VccCore5

AF23

VccCore6

AG21

VccCore7

AG23

VccCore8

AG24

VccCore9

AG26

VccCore10

AG27

VccCore11

AG29

VccCore12

AJ23

VccCore13

AJ26

VccCore14

AJ27

VccCore15

AJ29

VccCore16

AJ31

VccCore17

AN19

VccIO1

BJ22

VccAPLLEXP

AN16

VccIO2

AN17

VccIO3

AN21

VccIO4

AN26

VccIO5

AN27

VccIO6

AP21

VccIO7

AP23

VccIO8

AP24

VccIO9

AP26

VccIO10

AT24

VccIO11

AN33

VccIO12

AN34

VccIO13

BH29

Vcc3_3_1

AP16

VccVRM1

BG6

VccAFDIPLL

AP17

VccIO14

AU20

VccDMI1

COUGAR_POINT_ES1

U2001G

POWER

VCC CORE

VCCIO

FDI

2

+VCCA_DAC_1_2

1kOhm/100Mhz

C2612

0.1UF/16V

+3VS_VCCA_LVD

+1.8VS_VCCTX_LVD

C2616

0.01UF/25V

R1.1 11/02

1 2

NB_R0402_20MIL_SMALL

R1.1 11/04

12

1 2

NB_R0402_20MIL_SMALL

SP2608

12

@

@ GNDGND

12

C2614

C2614 22UF/6.3V

22UF/6.3V

C2617

C2617 22UF/6.3V

22UF/6.3V

@

1 2

+VTT_PCH_ORG

12

C2613

0.01UF/25V

63mA

U48

VccADAC

U47

VssADAC

CRTLVDS

AK36

VccALVDS

AK37

VssALVDS

AM37

VccTX_LVDS1

AM38

VccTX_LVDS2

AP36

VccTX_LVDS3

AP37

VccTX_LVDS4

V33

Vcc3_3_2

V34

Vcc3_3_3

147mA/4=36.75mA

AT16

VccVRM2

AT20

VccDMI2

DMI

VccClkDMI

VccDFTERM1

VccDFTERM2

VccDFTERM3

VccDFTERM4

DFT / SPI HVCMOS

02V000000001

VccSPI

AB36

AG16

AG17

AJ16

AJ17

V1

R1.2

75mA

10mA

GND

1mA

GND

40mA

178mA/8*2pin=45mA

+VCCAFDI_VRM

+VCCIO_CPU_VCC_DMI

47mA/2=23.5mA

12

GND

12

GND

20mA

12

GND

12

C2622

0.1UF/16V

GND

R1.0

C2619

C2619 1UF/6.3V

1UF/6.3V

+VTT_PCH_ORG_VCCCLKDMI

C2620

C2620 10UF/10V

10UF/10V

@

+V_NVRAM_VCCPNAND +1.8VS

C2621

0.1UF/16V

+3VM_VCCPSPI

GND

12

C2615

0.01UF/25V

GND GND GND

+3VS_VCC_GIO

12

C2618

0.1UF/16V

GND

SP2609

R2614 0OhmR2614 0Ohm

SP2610

R2616 0OhmR2616 0Ohm

R2617 0Ohm@R2617 0Ohm@

1kOhm/100Mhz

12

C2624

C2624 10PF/50V

10PF/50V

GND

12

C2625

C2625 10PF/50V

10PF/50V

GND

NB_R0402_20MIL_SMALL

+VTT_PCH_ORG

+3VA

R2.0 12/13

+3VSUS_ORG

R1.1 11/10

L2604

21

SP2607

1 2

NB_R0402_20MIL_SMALL

L26021kOhm/100Mhz L26021kOhm/100Mhz

21

+3VS_VCC3_3

1

+3VS

+1.8VS

R1.0

B B

+1.05VS +VTT_PCH_ORG

A A

JP2601

4.56A=330mA+1.3A+2.925A

2

112

3MM_OPEN_5MIL

Frank 20110614 Follow Everest

5

JP2602

112

2MM_OPEN_5MIL

JP2603

112

2MM_OPEN_5MIL

+VTT_PCH_VCC

1.3A

2

+VTT_PCH_VCCIO

2.925A

2

+1.5VS

VCCVRAM use +1.5VS in mobile HAD_SYNC should pull high to +3VSUS

Frank 20110608 EVERST remove 1.8VS and +VTT_PCH_ORG

4

SR2602

1 2

NB_R0402_20MIL_SMALL

+VCCAFDI_VRM

160mA

3

+VTT_PCH_VCCIO

+VTT_PCH_ORG

+1.05VS

+1.5VS

+VCCAFDI_VRM

+3VS_VCC3_3

+3VM_SPI

+1.8VS

+VCCP

R1.0 Delete +VTT_PCH_VCC +VTT_PCH_VCCDPLL_EXP +VTT_PCH_VCCAPLL_EXP +VTT_PCH_VCCDPLL_FDI +VTT_PCH_VCCAPLL_FDI +3VS_VCCA3GBG +3VS_VCC_GIO +VCCA_DAC_1_2 +3VS_VCCA_LVDS +3VM_VCCPSPI +V_NVRAM_VCCPNAND +1.8VS_VCCTX_LVD +VCCIO_CPU_VCC_DMI +VTT_PCH_ORG_VCCCLKDMI

+VTT_PCH_VCCIO 20,27 +VTT_PCH_ORG 22,27 +1.05VS 27,57,82, 87 +1.5VS 7,53,57,91 +VCCAFDI_VRM 27

+3VS

+3VS 17,20,21,22,23,24,25,27,28,30,32,33,36,37,44, 45,48,50,51,53,57,59,61,80,91,92 +3VS_VCC3_3 27 +3VM_SPI 28 +1.8VS 7,25,57,80,84 +VCCP 3,4,6,7,30,32,57,82

Title :

PCH(7)_POWER,GND

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet of

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.0

26 93Monday, February 13, 2012

U2001I

AY4

VSS159

AY42

VSS160

AY46

VSS161

AY8

VSS162

B11

VSS163

B15

VSS164

B19

VSS165

B23

VSS166

B27

VSS167

B31

VSS168

B35

VSS169

B39

VSS170

B7

VSS171

F45

VSS172

BB12

VSS173

BB16

D D

C C

B B

A A

VSS174

BB20

VSS175

BB22

VSS176

BB24

VSS177

BB28

VSS178

BB30

VSS179

BB38

VSS180

BB4

VSS181

BB46

VSS182

BC14

VSS183

BC18

VSS184

BC2

VSS185

BC22

VSS186

BC26

VSS187

BC32

VSS188

BC34

VSS189

BC36

VSS190

BC40

VSS191

BC42

VSS192

BC48

VSS193

BD46

VSS194

BD5

VSS195

BE22

VSS196

BE26

VSS197

BE40

VSS198

BF10

VSS199

BF12

VSS200

BF16

VSS201

BF20

VSS202

BF22

VSS203

BF24

VSS204

BF26

VSS205

BF28

VSS206

BD3

VSS207

BF30

VSS208

BF38

VSS209

BF40

VSS210

BF8

VSS211

BG17

VSS212

BG21

VSS213

BG33

VSS214

BG44

VSS215

BG8

VSS216

BH11

VSS217

BH15

VSS218

BH17

VSS219

BH19

VSS220

H10

VSS221

BH27

VSS222

BH31

VSS223

BH33

VSS224

BH35

VSS225

BH39

VSS226

BH43

VSS227

BH7

VSS228

D3

VSS229

D12

VSS230

D16

VSS231

D18

VSS232

D22

VSS233

D24

VSS234

D26

VSS235

D30

VSS236

D32

VSS237

D34

VSS238

D38

VSS239

D42

VSS240

D8

VSS241

E18

VSS242

E26

VSS243

G18

VSS244

G20

VSS245

G26

VSS246

G28

VSS247

G36

VSS248

G48

VSS249

H12

VSS250

H18

VSS251

H22

VSS252

H24

VSS253

H26

VSS254

H30

VSS255

H32

VSS256

H34

VSS257

F3

VSS258

02V000000001

COUGAR_POINT_ES1

Frank 20110608 R2701 is un-mounted and L2701 is mounted in EIH31

R1.0

+3VS_VCC3_3

Intel Comments

R2701 0OhmR2701 0Ohm

1 2

L2701 1kOhm/ 100Mhz@ L2701 1kOhm/100Mhz@

5

H46

VSS259

K18

VSS260

K26

VSS261

K39

VSS262

K46

VSS263

K7

VSS264

L18

VSS265

L2

VSS266

L20

VSS267

L26

VSS268

L28

VSS269

L36

VSS270

L48

VSS271

M12

VSS272

P16

VSS273

M18

VSS274

M22

VSS275

M24

VSS276

M30

VSS277

M32

VSS278

M34

VSS279

M38

VSS280

M4

VSS281

M42

VSS282

M46

VSS283

M8

VSS284

N18

VSS285

P30

VSS286

N47

VSS287

P11

VSS288

P18

VSS289

T33

VSS290

P40

VSS291

P43

VSS292

P47

VSS293

P7

VSS294

R2

VSS295

R48

VSS296

T12

VSS297

T31

VSS298

T37

VSS299

T4

VSS300

W34

VSS301

T46

VSS302

T47

VSS303

T8

VSS304

V11

VSS305

V17

VSS306

V26

VSS307

V27

VSS308

V29

VSS309

V31

VSS310

V36

VSS311

V39

VSS312

V43

VSS313

V7

VSS314

W17

VSS315

W19

VSS316

W2

VSS317

W27

VSS318

W48

VSS319

Y12

VSS320

Y38

VSS321

Y4

VSS322

Y42

VSS323

Y46

VSS324

Y8

VSS325

BG29

VSS326

N24

VSS327

AJ3

VSS328

AD47

VSS329

B43

VSS330

BE10

VSS331

BG41

VSS332

G14

VSS333

H16

VSS334

T36

VSS335

BG22

VSS336

BG24

VSS337

C22

VSS338

AP13

VSS339

M14

VSS340

AP3

VSS341

AP1

VSS342

BE16

VSS343

BC16

VSS344

BG28

VSS345

BJ28

VSS346

GNDGND

+3VS_VCC_CLKF33

21

5

12

C2701

10UF/10V

GND GND

12

C2702

1UF/6.3V

Frank 20110608 C2741,C2719, C2713,C2740 is mounted in EIH31

SP2716

+VTT_PCH_VCCIO

SP2716

1 2

NB_R0402_20MIL_SMALL

+VTT_PCH_VCCA_A_DPL

+VTT_PCH_VCCA_B_DPL

+1.05VM_ORG

12

C2715

C2715 1UF/6.3V

1UF/6.3V

GND

+1.05VM_ORG

+VTT_PCH_ORG

R1.1 11/02

12

R2702

R2702 0Ohm

0Ohm

@

+VTT_PCH_VCCA_B_DPL

4

+VTT_PCH_ORG

NB_R0603_32MIL_SMALL

12

C2703

1UF/6.3V

GND

12

C2704

1UF/6.3V

GND

4

+VTT_PCH_ORG

+3VSUS_ORG

+3VA

L2704 1kOhm/ 100Mhz@ L2704 1kOhm/100Mhz@

12

1 2

R2710 0Ohm@R2710 0Ohm@

+VTT_CPU_VCCPCPU

SP2701

1 2

R1.0 Intel Comments

12

C2713

22UF/6.3V

GND

12

C2740

22UF/6.3V

GND

R2703 0Ohm@R2703 0Ohm@

1 2

R2704 0Ohm/ NON_DS3R2704 0Ohm/N ON_DS3

1 2

R2705 0Ohm

1 2

R1.1 DS3 10/31

21

12

C2707

@C2707

@

+VTT_PCH_VCCIO

10UF/10V

GND

12

C2710

C2709

22UF/6.3V

GNDGND

12

C2714

0.1UF/16V

GND

R27080Ohm R27080Ohm

12

GND

1 2

R1.0 Intel Comments

12

C2720

4.7UF/6.3V

GND

+VCC_RTC

1kOhm/100Mhz

/DS3

0.1UF/16V

GND

+VTT_PCH_VCCA_A_DPL

+VTT_PCH_VCCA_B_DPL

C2716

C2716 1UF/6.3V

1UF/6.3V

+VTT_PCH_ORG

L2702

21

L2703

21

12

C2705

12

C2706

@

GND

0.1UF/16V

GND

SP2715

1 2

NB_R0402_20MIL_SMALL

+VCCSUS1

12

C2708

C2708 1UF/6.3V

1UF/6.3V

@

GND

R1.0 Intel Comments

0.803A/23*20= 698mA

12

C2712

C2711

1UF/6.3V

GND

+VCCAFDI_VRM

+VCCDIFFCLK

+VCCDIFFCLKN

+VTT_PCH_ORG_SSCVCC

R2709 0OhmR2709 0Ohm

1 2

C2717

1UF/6.3V

GND

C2719

@C2719

@

1UF/6.3V

12

GND

C2723

C2723 1UF/6.3V

1UF/6.3V

R1.1 11/02

R1.1 10/31 Link

3

U2001J

1mA

VCCSST

6uA

R1.1 11/04

112

U2001J

AD49

VccAClk

T16

VccDSW3_3

V12

DcpSusByp

T38

Vcc3_3_4

BH23

VccAPLLDMI2

AL29

VccIO15

AL24

DcpSus1

AA19

VccASW1

AA21

VccASW2

AA24

VccASW3

AA26

VccASW4

AA27

VccASW5

AA29

VccASW6

AA31

VccASW7

AC26

VccASW8

AC27

VccASW9

AC29

VccASW10

AC31

VccASW11

AD29

VccASW12

AD31

VccASW13

W21

VccASW14

W23

VccASW15

W24

VccASW16

W26

VccASW17

W29

VccASW18

W31

VccASW19

W33

VccASW20

N16

DcpRTC

Y49

VccVRM3

BD47

VccADPLLA

BF47

VccADPLLB

AF17

VccIO16

AF33

VccDIFFCLKN1

AF34

VccDIFFCLKN2

AG34

VccDIFFCLKN3

AG33

VccSSC

V16

DcpSST

T17

DcpSus2

V19

DcpSus3

BJ8

V_PROC_IO

A22

VccRTC

COUGAR_POINT_ES1

109mA

266mA

Frank 20110614 Follow Everest

+VTT_PCH_VCCACLK

+VCCPDSW

PCH_VCCDSW

+3VS_VCC_CLKF33

178mA/8=22.25mA

+VCCAPLL_CPY_PCH

3.799A/29=131mA

+VCCDPLL_CPY

120mA/3=40mA

12

C2741

@ C2741

@

1UF/6.3V

GND

+VCCRTCEXT

147mA/4=36.75mA

75mA

3.799A/29=131mA 50mA

95mA

12

0.1UF/16V

12

C2718

GND

+V1.05VM_ORG_VCCSUS

12

2mA

12

C2722

0.1UF/16V

GND

12

C2724

0.1UF/16V

GND

+3VSUS_DS3 +3VSUS_ORG

JP2701

2

1MM_OPEN_M1M2

+5VSUS_DS3 +5VSUS_ORG

JP2702

2

1MM_OPEN_M1M2

+3VS +3VS_VCC3_3

JP2703

2

1MM_OPEN_M1M2

3

POWER

Clock and Misce llaneous

CPURTC

R1.0

N26

VccIO17

P26

VccIO18

P28

VccIO19

T27

VccIO20

T29

VccIO21

T23

VccSus3_3_1

T24

VccSus3_3_2

V23

VccSus3_3_3

V24

VccSus3_3_4

P24

VccSus3_3_5

T26

VccIO22

M26

V5REF_Sus

AN23

DcpSus4

AN24

VccSus3_3_6

P34

V5REF

N20

VccSus3_3_7

N22

VccSus3_3_8

P20

VccSus3_3_9

P22

VccSus3_3_10

AA16

Vcc3_3_5

W16

Vcc3_3_6

PCI/GPIO/LPCMISC

SATA USB

HDA

Frank 0503 Remove Remove +1.05VM.

+1.05VS

Vcc3_3_7

Vcc3_3_8

VccIO23

VccIO24

VccIO25

VccIO26

VccAPLLSATA

VccVRM4

VccIO27

VccIO28

VccIO29

VccASW21

VccASW22

VccASW23

VccSusHDA

+VCC_RTC

+VTT_PCH_ORG

+VTT_PCH_VCCIO

+1.05VM_ORG +VCCDIFFCLKN +VCCAFDI_VRM

+3VS_VCC3_3

+VCCP

+3VSUS_ORG

T34

AJ2

AF13

AH13

AH14

AF14

AK1

AF11

AC16

AC17

AD17

T21

V21

T19

P32

R1.0 Intel Comments

+3VA

+1.05VS

+3VS

+5VSUS

+5VS

+3VSUS

2

3.799A/29*5= 655mA

12

GND

65mA

3.799A/29=131mA

+VCCAUPLL

1mA

+VCCA_USBSUS

1mA

178mA/8*2pin=44.5mA

C2727

0.1UF/16V

12

GND

SP2705

+3VSUS_ORG_VCCPSUS

12

C2732

C2732 1UF/6.3V

1UF/6.3V

GND

187mA/8=22.25mA

+VTT_PCH_VCCUSBCORE

C2726

C2726 1UF/6.3V

1UF/6.3V

+3VSUS_ORG_VCCPUSB

R1.1 10/31 Line up

1 2

NB_R0402_20MIL_SMALL

SP2706

+3VS_VCCPCORE

R1.1 10/31 Link

SP2702

NB_R0603_32MIL_SMALL

SP2703

NB_R0603_32MIL_SMALL

+VTT_PCH_VCCIO

12

C2730

C2730 1UF/6.3V

1UF/6.3V

@

GND

1 2

NB_R0402_20MIL_SMALL

12

C2735

0.1UF/16V

1 2

+5VS_PCH_VCC5REF

187mA/8=22.25mA

+VTT_PCH_VCCIO_SATA3

SP2709

3.799A/29*4= 0.524mA

147mA/4=36.75mA

3.799A/29*3= 393mA

PCH_VCC_1_1_20

PCH_VCC_1_1_21

PCH_VCC_1_1_22

10mil trace

10mA

2

1MM_OPEN_M1M2

2

12

C2736

C2736 1UF/6.3V

1UF/6.3V

GND

+VCCAFDI_VRM

+VTT_PCH_VCCIO_VCC_SATA

12

C2738

C2738 1UF/6.3V

1UF/6.3V

GND

0.803A/23*3= 105mA

12

C2739

0.1UF/16V

GND

JP2705

+VCC_RTC 20,22 +3VA 6,20,26,30,31,57,59,60,81,88,93 +1.05VS 26,57,82,87 +VTT_PCH_ORG 22,26 +VTT_PCH_VCCIO 20,26 +1.05VM_ORG +VCCDIFFCLKN 21 +VCCAFDI_VRM 26 +3VS 17,20,21,22,23,24,25,26,28,30,32,33,36,37,44,45,48,50,51,53, 57,59,61,80,91,92 +3VS_VCC3_3 26 +VCCP 3,4,6,7,30,32,57,82 +5VSUS 51,57,59,91 +5VS 36,37,48,50,51,57,80,87,91 +3VSUS_ORG 20,21,22,24,25,26,33 +3VSUS 4,22,24,28,30,60,81, 92

+1.05VM_ORG

1.01A

112

SP2709

1 2

NB_R0603_32MIL_SMALL

+VTT_PCH_ORG_VCCAPLL_SATA3

12

C2737

C2737 10UF/10V

10UF/10V

@

GND

SP2710

1 2

NB_R0603_32MIL_SMALL

R1.0 Intel Comments

Frank 20110608 Remove short pins but EIH31 does not.

+3VSUS_ORG_VCCPAZSUS

SP2714

1 2

Frank

NB_R0603_32MIL_SMALL

20110608 C2739 is 1uF in EIH31.

R1.0 Delete +VTT_PCH_VCCUSBCORE +VTT_PCH_VCCIO_SATA3 +VTT_PCH_ORG_VCCAPLL_SATA3 +VTT_PCH_VCCA_A_DPL +VTT_PCH_VCCA_B_DPL +VTT_PCH_ORG_SSCVCC +VCCDPLL_CPY +VTT_PCH_VCCIO_VCC_SATA +3VS_VCC_CLKF33 +3VS_VCCPCORE +3VS_VCCPPCI +VTT_CPU_VCCPCPU +5VSUS_ORG +5VSUS_PCH_VCC5REFSUS +5VS_PCH_VCC5REF +3VSUS_ORG_VCCPAZSUS +3VSUS_ORG_VCCPSUS

PEGATRON COMPUTER INC

Date: Sheet of

+5VSUS_PCH_VCC5REFSUS

C2729

C2729 1UF/6.3V

1UF/6.3V

+3VSUS_ORG

12

C2734

0.1UF/16V

GND

@

+1.05VM_ORG

Size Project Name

C

MA50

1

+VTT_PCH_VCCIO

+3VSUS_ORG

1

2

3

1 2

12

GND

12

C2731

C2731 1UF/6.3V

1UF/6.3V

GND

SP2707

12

C2733

0.1UF/16V

+VTT_PCH_VCCIO

L27051kOhm/100Mhz

21

+VTT_PCH_VCCIO

+3VSUS_ORG

Engineer:

1

D2701

D2701 1V/0.2A

1V/0.2A

R2711

R2711 100Ohm

100Ohm

1

2

D2702

D2702 1V/0.2A

1V/0.2A

3

R2712

1 2

100Ohm

1 2

NB_R0402_20MIL_SMALL

+VTT_PCH_ORG

Title :

PCH(8)_POWER,GND

+3VSUS_ORG

+5VSUS_ORG

+3VS

+5VS

+3VS_VCC3_3

Joyoung_Chianhg

Rev

1.0

27 93Monday, February 13, 2012

5

PCH SPI ROM

+3VA_EC reserved for share ROM

SHARE ROM CONFIG1

U2801

U2802

D D

ummount:

R2855, R2856, R2864, R2865, R2853, R2852, R2834, R2850, R2851, R2832, C2803, U2802,R2869, R2870, R2868, D2802, U2801

@

ME+BIOS+EC

4MBU2803

+3VA_EC

+3VSUS

SPI_CS#1_EC30

SPI_SO_EC30

R2.0 12/15

R2867 0OhmR2867 0Ohm

R2863 0Ohm@R2863 0Ohm@

SHARE ROM CONFIG2

U2801

ME Firmware

2MB

SPI_CLK_EC30

SPI_SI_EC30

U2802 EC+BIOS 4MB

ummount:

R2858, R2862, R2866, R2867, U2803

C C

12

4

@

1

2

1V/0.2A

R2848 0OhmR2848 0Ohm

R2858 0Ohm/SPI4MR2858 0Ohm/SPI4M R2864 0Ohm/SPI4MR2864 0Ohm/SPI4M

R2855 0Ohm/SPI6MR2855 0Ohm/SPI6M R2856 0Ohm/SPI6MR2856 0Ohm/SPI6M

R2866 0Ohm/SPI4MR2866 0Ohm/SPI4M R2869 0Ohm/SPI4MR2869 0Ohm/SPI4M

R2871 0Ohm/SPI6MR2871 0Ohm/SPI6M R2865 0Ohm/SPI6MR2865 0Ohm/SPI6M

D2802

3

+3VM_SPI

/SPI6M

+3VA_EC

3

+3VSUS

12

SPI1_CS#0

12

SPI1_SO

12

SPI2_CS#1

12

SPI2_SO

12

SPI1_CLK

12

SPI1_SI

12

SPI2_CLK

12

SPI2_SI

12

/SPI6M

R2872 0Ohm

R2870 0Ohm@R2870 0Ohm@

SPI_CS#020

SPI_SO20

SPI_CS#120

12

R2868 0Ohm

1

2

+3VM_SPI2

D2803

@

3

1V/0.2A

12

/SPI6M

R2860 0OhmR 2860 0Ohm R2859 33Ohm1%R2859 33Ohm1%

1 2

R2834 3.3KOhmR2834 3.3KOhm

+3VM_SPI

+3VM_SPI2

PCH EC

1 2

R2853 0Ohm/SPI6MR2853 0Ohm/SPI6M R2854 33Ohm 1%/SPI6MR2854 33Ohm 1%/SPI6M

1 2

R2835 3.3KOhm/SPI6MR2835 3.3KOhm/SPI6M

1 2

<6.5 inch <6.5 inch

SPI ROM

SPI1_CS#0

12

SPI1_SO

+3VM_SPI1_WP#

12

+3VM_SPI2_WP#

SPI2_CS#1 SPI2_SO

co-lay

1 2 3

U2805

/SPI4M

CS# DO(IO1) WP#(IO2) GND4DI(IO0)

MX25L3206EM2I-12G

05V000000005

U2801

/SPI6M

1

CS#

2

SO/SIO1

3

WP#/ACC GND4SI/SIO0

MX25L1606EM2I-12G

05V000000010

U2804

/SPI6M

CS# DO(IO1) WP#(IO2) GND4DI(IO0)

MX25L3206EM2I-12G

05V000000005

(4MB)

VCC

HOLD#(IO3)

(2MB)

VCC

HOLD#

SCLK

VCC

HOLD#(IO3)

(4MB)

2

+3VS

+12VS

+12VSUS

+3VM_SPI

8 7 6

CLK

5

8 7 6 5

8 7 6

CLK

5

32Mb (05V000000 005) 0500-00NF000 W INBOND/W25Q32BV SSIG 0500-00VV000 M XIC/MX25L3206EM 2I-12G

+3VS 17,20,21,22,23,24,25,26,27,30,32,33,36,37,44,45,48,50,51,53, 57,59,61,80,91,92

+12VS 36,48,91

+12VSUS 51,81,91

+3VM_SPI

12

C2803

0.1UF/25V

SPI1_CLK SPI1_SI

0.1UF/25V

SPI2_HOLD# SPI2_CLK SPI2_SI

/SPI6M

C2804

R2836

3.3KOhm

1 2

R2849 33Ohm 1%R2849 33Ohm 1% R2852 33Ohm 1%R2852 33Ohm 1%

+3VM_SPI2

12

R2832

3.3KOhm

/SPI6M

1 2

R2850 33Ohm 1%/SPI6MR2850 33Ohm 1%/SPI6M R2851 33Ohm 1%/SPI6MR2851 33Ohm 1%/SPI6M

1 2 1 2

1

SPI_CLK 20 SPI_SI 20

+12VS

5

1 2

R2801 0Ohm

1 2

R2802 0OhmR2802 0Ohm

34

Joyoung R1.0

+3VS

SMBUS Link device

12

R2803

R2804

4.7KOhm

eDP WLAN CPU XDP PCH XDP

+3VS

SMB_CLK_S 17,53,59

SMB_DAT_S 17,53,59

@

+12VSUS

+12VS

SML1_CLK 21

PCH

SML1_DAT 21

SMB1_CLK_Thermal 30,50,74 SMB1_DAT_Thermal 30,50,74

2

+3VS

Plamrest Thermal

PEGATRON COMPUTER INC

Size Project Name

C

Date: Sheet

Date: Sheet of

MA50

Title :

Engineer:

1

PCH(9)_SPI,SMB

Joyoung_Chianhg

of

28 93Monday, February 13, 2012

Rev

1.0

SPI Debug Connector

layout space issue, so remove J2801.

B B

A A

5

4

PCH SMBus

PCH

EC, VGA Thermal

+3VSUS

SCL_3A21

SDA_3A21

+3VS +3VSUS

SMB1_CLK30,50,74

SMB1_DAT30,50, 74

3

6 1

Q2801A

UM6K1N

2

Q2802A

UM6K1N

61

2

3 4

Q2801B

UM6K1N

5

Q2802B

UM6K1N

5

D D

C C

4

3

2

1

B B

A A

Title :

CLK_ICS9LRS3197

Joyoung_Chianhg

Engineer:

MA50

Engineer:

PEGATRON COMPUTER INC

Size Project Name

Custom

Date: Sheet of

5

4

3

Date: Sheet of

2

Joyoung_Chianhg

29 93Monday, February 13, 2012

1

Rev

1.0

5

4

3

2

+3VA_EC

+3VSUS

+3VS

+3VA

+3VA_EC 28,32 +3VS 17,20,21,22,23,24,25,26,27,28,32,33,36,37,44,45,48,50 ,51,53,57,59,61,80,91,92 +3VSUS 4,22,24,28,60 ,81,92 +3VA 6,20,26,27,31,57,59,60,81,88,93

1

EIH

LAD0 LAD1 LAD2

VCCIO_CPU_EC

NUM_LED# NC_GPIO40

BAT2_IN_OC#

CAP_LED#

USB_CB1

KB_ID0

3G_ON#/NC

LAD3

1 2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

128

127

LAD2

LAD1

LAD3 LCLK LFRAME# VDD GND1 GPIO24 LRESET# GPIO11/CLKRUN# GPIO65/SMI# GPIO26/PSCLK2 GPIO27/PSDAT2 VTT PECI GPIO34 GPIO36 GPIO40/F_PWM GPIO42/TCK GND2 VCC1 GPIO43/TMS GPIO44/TDI GPIO45/E_PWM GPIO46/TRST# GPIO47/SCL4 GPIO50/PSCLK3/TDO GPIO51 GPIO52/PSDAT3/RDY# GPIO53/SDA4 ECSCI#/GPIO54 GPIO55/CLKOUT/IOX_DIN_DIO GPIO56/TA1 GPIO15/A_PWM GPIO57/KBSOUT17 GPIO60/KBSOUT16 KBSOUT15/GPIO61/XOR_OUT KBSOUT14/GPIO62 KBSOUT13/GPIO63 KBSOUT12/GPIO64

KBSOUT11&P80_DAT39KBSOUT10&P80_CLK40KBSOUT9/SDP_VIS#41KBSOUT842KBSOUT743VCORF44GND345VCC246KBSOUT6/RDY#47KBSOUT5/TDO48KBSOUT4/JEN0#49KBSOUT3/TDI50KBSOUT2/TMS51KBSOUT1/TCK52KBSOUT0/JENK#53KBSIN054KBSIN155KBSIN256KBSIN357KBSIN458KBSIN559KBSIN660KBSIN761GPIO13/C_PWM62GPIO14/TB163GPIO01/TB2

C30091UF/10V C30091UF/10V

12

PWR_LED_standby#59

DRAMRST_CNTRL_PCH5,9,21

D D

R1.1 11/02

LPC_AD020,44,59 LPC_AD120,44,59 LPC_AD220,44,59 LPC_AD320,44,59

CLK_KBCPCI_PCH24

LPC_FRAME#20,44,59

R2.0 12/13

R1.1 IOAC, 10/3 1

C C

ER 1129 Remvoe the VPS

ALL_SYSTEM_PWRGD92

CHG_LED_ORANGE#59

B B

USBCHG_EN81

SUSACK#22

A20GATE25

RCIN#25 SUSC_EC#57,91 SUSB_EC#24,57,91,92

INT_SERIRQ20,44,59

IOAC_EN53,81

BUF_PLT_RST#4,24,32,33,5 3,59,70

PM_CLKRUN#22,59

EXT_SMI#25,44

TP_CLK59

TP_DAT59

+VCCP

H_PECI_EC25 SPI_CS#1_EC 28

ME_AC_PRESENT22

PM_PWRBTN#22

+3VA_EC

PM_RSMRST#22

PM_SUSC#22

LCD_BACKOFF#45

THRO_CPU4

SUS_PWRGD81,92

EXT_SCI#21,59

SLP_SUS#22,91

USB_CB152

PWR_LED#59

KSO1731

KSO1631

KSO1531

KSO1431

KSO1331

KSO1231

KSO1131

KSO1031

KSO931

KSO831

KSO731

+3VA_EC KSO631 KSO531 KSO431 KSO331 KSO231 KSO1 31

R3024 0 Ohm

+3VS

GND

1 2

R3023 0Ohm/IOACR3023 0Ohm/IOAC

SP3006

T3016T3016 T3014T3014

GND

T3003T3003

T3008T3008

GND

1 2

1 1

1

GND

/DS3

1 2

Remove short pin, have 0 ohmat PCH side

RNX3004A

1 2

47Ohm

RNX3004B

3 4

47Ohm

RNX3004C

5 6

47Ohm

RNX3004D

7 8

47Ohm

NB_R0402_20MIL_SMALL

GND

+3VA_EC

126

125

124

123

122

121

120

119

118

117

116

115

114

113

112

111

110

109

108

107

106

LAD0

SERIRQ

GPIO10/LPCPD#

VCC5

GND6

GPIO16

GPIO30

GPIO05

GPIO23/SCL3

GPIO85/GA20

GPIO31/SDA3

GPIO21/B_PWM

KBRST#/GPIO86

GPIO67/PWUREQ#

GPIO20/TA2/IOX_DIN_DIO

GPIO97

GPIO87/SIN_CR

GPO82/IOX_LDSH/TEST#

GPO83/SOUT_CR/TRIST#

GPO84/IOX_SCLK/XORTR#

VSUS_ON_EC

EC_CLK_EN/NC

105

104

103

VREF

AGND

GPIO96/DA2

GPIO95/DA1

GPIO94/DA0 GPIO93/AD3 GPIO92/AD2 GPIO91/AD1 GPIO90/AD0

GPIO04 GPIO03 GPIO07

GPIO06/IOX_DOUT

F_SCK GPIO81 F_CS0#

F_SDIO&F_SDIO0

F_SDI&F_SDIO1

VCC_POR#

GPIO77

GPO76/SHBM

GPIO75

GPIO66/G_PWM

GPIO41 GPIO02

GPIO00/EXTCLK

GPIO72 GPIO71 GPIO70

GPIO37/PSCLK1 GPIO35/PSDAT1

GPIO17/SCL1 GPIO22/SDA1 GPIO74/SDA2

GPIO73/SCL2 GPIO33/H_PWM GPIO32/D_PWM

64

SCRL_LED#/NC

AVCC

GND5 VCC4

GND4

VCC3

U3001

U3001 NPCE794LA0DX

NPCE794LA0DX

102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65

1

1 2

+3VACC

EC_AGND

R3010 0OhmR3010 0Ohm

1

R3047

R3047 1KOhm

1KOhm

1 2

R3048

R3048 100KOhm

100KOhm

1 2

+3VACC

SP3002SP3002

RF_DET#

VREF

EC_AGND

R1.3

ME_PM_SLP_LAN# G_Y_OUT/ME_+VM_PWRGD/NC ME_PM_SLP_M#

F_SCK_EC

F_CS0#_EC

F_SDIO_EC F_SDI_EC

PRECHG/NC SHBM 3G_ON#

WLAN_W AKE#

VGA_THRALARM# CRT_IN#_EC

794L:06V3800000 03 795L:06V3800000 01 (BOM use)

R1.1 For IOAC, 10/31 PLT_RST#

T3005T3005

R1.1 IOAC 10/31

1 2

no RF Switch no DISTP_LED#

1 1 1

1

T3006T3006

GND +3VA_EC

T3011T3011 T3012T3012 T3023T3023

GND

+3VA_EC

T3026T3026

12

C3010

1UF/10V

Change to 5% R1.3

USBP02_EN 52

VSUS_ON 57,81,91,93

USBP03_EN 52

CHG_LED_BLUE# 59 AC_IN_OC 74,88 VRM_PWRGD 80,92

RF_DET# 53

ME_PWROK 22 ME_PM_SLP_LAN# 22

ME_PM_SLP_M# 22

AD_IINP 88 BAT1_IN_OC# 90 PWR_SW # 59

CPU_VRON 80

EC_RST# 22,32

FAN0_PWM 50

WLAN_W AKE# 53

ME_SUSPWRDNACK 22

SUSCLK 22

LID_SW# 31,45 PM_SUSB# 22

OP_SD# 37

VGA_THRALARM# 74

SMB0_CLK 60,88

SMB0_DAT 60,88 SMB1_DAT 28,50,74 SMB1_CLK 28,50,74

EC_SPKR 36

LCD_BL_PWM 45

FAN0_TACH 50

WLAN_RST# 53

PM_PWROK 4,22,92

KSI7 31 KSI6 31 KSI5 31 KSI4 31 KSI3 31 KSI2 31 KSI1 31 KSI0 31

KSO0 31

RF_ON 25,53

AC_IN_OC is active high, OD pull high at power

R2.1 01/18

Remove short pin, have short pin at PCH side

R1.1 IOAC /10/3 1

1 2

R3014 0 OhmR3014 0Ohm

1 2

R3003 0 OhmR3003 0Ohm

JM50 ADPS FUNC EIH

R1.1

EIH

BT_ON 25,53,61

LAN_WAKE# 22,33

SPI_CLK_EC 28

SPI_SI_EC 28 SPI_SO_EC 28

For NPCE795 Power

T3017T3017

1

+3VA_EC

12

C3001

C3001 10UF/10V

10UF/10V

GND

1 2

R3002 0OhmR3002 0Ohm

GND

For PU / PD

+3VA_EC

No cap sensor

R2.0 12/20

R3025 10KOhmR3025 10 KOhm

R3004 100KOhmR3004 100KOhm

R3005 47KOhm@R3005 47KOhm@

RN3001A

RN3001A RN3001B

RN3001B

+3VS

RN3001D

RN3001D RN3001C

RN3001C

PM_SUSB# PM_SUSC#

CPU_VRON

PM_RSMRST#

AC_IN_OC is pulled high at power

VSUS_ON

Remove Vsus_ON pull hight to +3VSUS

+3VA_EC

G_Y_OUT/ME_+VM_PWRGD/NC

1 2

4.7KOhm

3 4

4.7KOhm

7 8

4.7KOhm

5 6

4.7KOhm

R3006 100KOhmR3006 100KOhm

1 2

R3007 100KOhmR3007 100KOhm

1 2

R3009 100KOhmR3009 100KOhm

1 2

No cap sensor

R3011 10KOhmR3011 10KOhm

1 2

R3008 100KOhm

1 2

@

R1.3 VSUS_ON Pull High to +3VA_EC

JRST3001

2

112

SGL_JUMP

Joyoung R1.0

@

EC REQUEST for ROM clear

12

T3018T3018

C3002

0.1UF/16V

T3019T3019

1

EC_AGND

BAT1_IN_OC#

BAT2_IN_OC#

SMB0_CLK SMB0_DAT

SMB1_DAT SMB1_CLK

R3054100KOhm R3054100KOhm

SCRL_LED#/NC

12

C3003

0.1UF/16V

VSUS_ON

R2.0 12/13

GND

+3VA_EC

12

C3004

C3004 10UF/10V

10UF/10V

GND

+3VS

12

C3006

0.1UF/16V

GND

+3VA_EC

R3012 10KOhmR3012 10 KOhm

R3026 10KOhmR3026 10 KOhm

R3015 10KOhmR3015 10 KOhm

R3016 10KOhmR3016 10 KOhm

R3027 10KOhm @R3027 10KOhm @

+3VS

R1.1 for GPU off logic control.

R3022 10KOhmR3022 10 KOhm

R3017 10KOhmR3017 10 KOhm

R3018 10KOhmR3018 10 KOhm R3019 4.7KOhmR3019 4.7KOhm R3021 4.7KOhmR3021 4.7KOhm

GND

+3VSUS

R2.0 12/14

R3020 1 0KOhm

GND

L3001

L3001 120Ohm/100Mhz

120Ohm/100Mhz

21

1 2

R3001 0OhmR3001 0Ohm

1 2

+3VA_EC+3VA

12

C3005

0.1UF/16V

GND

+3VACC

12

C3007

0.1UF/16V

EC_AGND

LID_SW#

WLAN_W AKE#

LAN_WAKE#

PWR_SW #

RF_DET#

VGA_THRALARM#

A20GATE

RCIN#

12 12

@

R301310KOhm R301310KOhm

12

R302810KOhm R302810KOhm

R2.1 01/18

R1.1 IOAC 10/31

R2.1 01/18

Remove PU to TP CON side.

Joyoung R1.0

SUSB_EC# SUSC_EC#

PM_PWRBTN#

3G_ON#

RF_DET#

Pull down for nc

R2.1 01/18

Joyoung R1.1

A A

Title :

NPCE794L

Joyoung_Chianhg

Engineer:

MA50

1

Engineer:

Rev

1.3

30 93Monday, February 13, 2012

Size Project Name

Custom

Date: Sheet of

5

4

3

2

Date: Sheet of

5

D D

C C

4

3

LID Switch

LID_SW#30,45

LID_SW#

2

+5VS

+5VS 27,36,37,48,50,51,57,80,87,91

SR-85

R1.0 change net name. Joyoung 0630

+3VA

C3101 0.1UF/10VC3101 0.1UF/10V

12

R3101

R3101 100KOhm

100KOhm

1 2

AH180-WG-7

1

Vdd

2

OUTPUT

U3101

3

GND

1

Keyboard

12V18ABSM012

FPC_CON_26P

26

28

GND

B B

27

GND

need check

A A

5

25

GND2

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

GND1

1

J3101

The pin define is checked to keyboard spec. R is KSO, C is KSI. The connector pin define is the same the KB.

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

4

KSO0 30 KSO1 30 KSO2 30 KSO3 30 KSO4 30 KSO5 30 KSO6 30 KSO7 30 KSO8 30 KSO9 30 KSO10 30 KSO11 30 KSO12 30 KSO13 30 KSO14 30 KSO15 30 KSO16 30 KSO17 30

3

KSI0 30 KSI1 30 KSI2 30 KSI3 30 KSI4 30 KSI5 30 KSI6 30 KSI7 30

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 7 8 5 6 3 4 1 2 3 4 1 2

R2.1 01/17

CN3105D33PF/50V CN3105D33PF/50V CN3105C33PF/50V CN3105C33PF/50V CN3105B33PF/50V CN3105B33PF/50V CN3105A33PF/50V CN3105A33PF/50V CN3102D33PF/50V CN3102D33PF/50V CN3102C33PF/50V CN3102C33PF/50V CN3102B33PF/50V CN3102B33PF/50V CN3102A33PF/50V CN3102A33PF/50V CN3103D33PF/50V CN3103D33PF/50V CN3103C33PF/50V CN3103C33PF/50V CN3103B33PF/50V CN3103B33PF/50V CN3103A33PF/50V CN3103A33PF/50V CN3101D33PF/50V CN3101D33PF/50V CN3101C33PF/50V CN3101C33PF/50V CN3101B33PF/50V CN3101B33PF/50V CN3101A33PF/50V CN3101A33PF/50V CN3106D33PF/50V CN3106D33PF/50V CN3106C33PF/50V CN3106C33PF/50V CN3106B33PF/50V CN3106B33PF/50V CN3106A33PF/50V CN3106A33PF/50V CN3104D33PF/50V CN3104D33PF/50V CN3104C33PF/50V CN3104C33PF/50V CN3104B33PF/50V CN3104B33PF/50V CN3104A33PF/50V CN3104A33PF/50V CN3107B33PF/50V CN3107B33PF/50V CN3107A33PF/50V CN3107A33PF/50V

Title :

EC_IT8512(2)KB, TP,FP

Joyoung_Chianhg

Engineer:

MA50

Engineer:

1

Size Project Name

C

Date: Sheet of

2

Date: Sheet of

Joyoung_Chianhg

Rev

1.3

31 93Monday, February 13, 2012

5

4

3

2

1

+VCCP

D D

+3VS

Thermal Policy

R3206

R3206 10KOhm

10KOhm

1 2

+3VA_EC

2

Q3202A

Q3202A UM6K1N

UM6K1N

6 1

34

Q3202B

Q3202B UM6K1N

UM6K1N

5

3

C

B

1

B

1

Q3201

12

Q3201 PMBS390 4

PMBS390 4

E

E 2

2

R3204 47KOhmR3204 47KOhm

D3202 1.2V/0.1AD3202 1.2V/0.1A

D3203 1.2V/0.1AD3203 1.2V/0.1A

Q3203B

UM6K1N

+3VS

@

5

1 2

R3208

R3208 10KOhm

10KOhm

@

1 2

34

Q3203A

UM6K1N

R32070Ohm @ R32070Ohm @

+VCCP

@

2

61

VGA_OVE RTEMP#_R

PR_OVER TEMP#_R

R3201

R3201 330Ohm

330Ohm

R1.1 add for NV FAE request choke temp sense.

VGA_HOT #87

C C

CPU_THE RM#50

B B

VGA_OVE RTEMP#74

PR_OVER TEMP#50

SP3201

1 2

BUF_PLT _RST#4,24,30,33 ,53,59,70

SP3202 R0402SP 3202 R0402

NB_R040 2_20MIL_SMALL

+3VA_EC

+3VS

NPCE795 has internal power-on reset circuit Use 47k ohm to make sure that raising time of POR is less than 10us

12

+VCCP 3,4 ,6,7,30,57,82

+3VA_EC 2 8,30

+3VS 17,20,21,22,23 ,24,25,26,27,28,30 ,33,36,37,44,45,48,5 0,51,53,57,59,61,8 0,91,92

EC_RST# 22 ,30FORCE_O FF#81,92

12

C3201

4.7UF/6.3V

@

H_THRMT RIP#4,2 5

A A

Title :

Engineer:

MA50

Engineer:

Size P roject Name

Custom

Date: Sheet of

5

4

3

2

Date: Sheet of

RST_Reset Circuit

1

Joyoung_Chianhg

32 93Monday, February 13, 20 12

Rev

1.0

5

D D

Close to LAN chip within 250mils

PCIE_RXP4_LOM

PCIE_RXN4_LOM

C C

B B

C3334 0.1UF/10VC3334 0.1U F/10V

12

C3339 0.1UF/10VC3339 0.1U F/10V

12

PCIE_TXP4_GLAN PCIE_TXN4_GLAN

CLK_PCIE_LAN CLK_PCIE_LAN#

+VDD1.2_LAN

12

C3313

0.1UF/10V

Frank 0503 LAN_LPWR is not defined GPIO in PCH .

BUF_PLT_RST#

PCIE_WAKE#_LAN

XTALO

R2.0 12/15

R3337 4.7KOhm@R3337 4.7KOhm@

R3331 4.7KOhm@R3331 4.7KOhm@

R3110

1 2

200Ohm

R1.1 change value for -R test report

+3VSUS_ORG

L3314

VDDC LX

12

4.7UH

C3331

10UF/6.3V

1 2

X3303 25MHZX3303 25MHZ

1 3

2

C3333

C3333 15PF/50V

15PF/50V

1AV200000005

R1.1 10/31 EMI CHANGE

L3320

1.5KOhm/100Mhz

09V010000039

PCIE_RXP4_GLAN 21

PCIE_RXN4_GLAN 21

PCIE_TXP4_GLAN 21 PCIE_TXN4_GLAN 21

CLK_PCIE_LAN 21 CLK_PCIE_LAN# 21

XTALIXT ALO_R

4

C3332

C3332 15PF/50V

15PF/50V

1AV200000005

21

R3340

R3340 10KOhm

10KOhm

LAN_LPWR25

BUF_PLT_RST#4,24,30,32,53,59,70

R1.1 IOAC 10/31

12

C3352

4.7UF/6.3V

4

+VDD1.2_LAN

R1.0 Remove PU R for FAE suggestion.

@

0Ohm

R3312

CLK_REQ_LAN#21

PCIE_WAKE#_LAN

C3310

4.7UF/6.3V

+VDD33_LOM

12

+VDD33_LOM

SP3302

12

C3320

0.1UF/10V

R3321 0OhmR 3321 0Ohm

NB_R0603_32MIL_SMALL

1 2

12

C3338

12

C3354

4.7UF/6.3V

LAN_LPWR_R

12

VDDC

+VDD1.2_LAN

SR_VDD

0.1UF/10V

LX XTALI

12

C3321

0.1UF/10V

U3301

1

LOW_PWR

2

PERST#

3

CLKREQ#

4

WAKE#

5

MODE

6

VDDC1

7

VREGPNP_CTL

8

SR_VFB

9

SR_VDD

10

SR_VDDP

11

SR_LX

12

XTALI

BCM57780A0KMLG

02V0H0000001

XTALO XTALVDD

12

C3315

0.1UF/10V

+VDD33_LOM

EEDAT

EECLK

49

48

47

46

45

44

43

GND

EECLK

EEDATA

LINKLED#

SPD100LED#

TRAFFICLED#

SPD1000LED#

XTALO13XTALVDDH14VDDC215PCIE_TXD_N16PCIE_TXD_P17PCIE_PLLVDDL118PCIE_REFCLK_N19PCIE_REFCLK_P20PCIE_PLLVDDL221PCIE_RXD_P22PCIE_RXD_N23GPHY_PLLVDDL

VDDC

+VDD_LANPLL

CLK_PCIE_LAN#

PCIE_RXN4_LOM

PCIE_RXP4_LOM

R1.0 OTP mode

C3316

VDDO

42

CLK_PCIE_LAN

+3VS

12

R3304

R3304 1KOhm

1KOhm

VDDC

AVDDL

41

40

39

VDDO

VDDC3

AVDDL3

VMAIN_PRSNT

+VDD_GPHYPLL

+VDD_LANPLL

PCIE_TXN4_GLAN

PCIE_TXP4_GLAN

3

R1.0 chnge VP P/N.

38

37

36

TRD3_P

TRD3_N

AVDDH2

35

TRD2_N

34

TRD2_P

33

AVDDL2

32

TRD1_P

31

TRD1_N

30

AVDDH1

29

TRD0_N

28

TRD0_P

27

AVDDL1

26

RDAC

25

BIASVDDH

24

EECLK EEDAT

L_TRDP3 34 L_TRDN3 34

+VDD33_LOM

R1.1 change pin define.

R1.1 Delete R5308 for unuse.

AVDDH

AVDDL

AVDDH

AVDDL RDAC

R3303

1 2

BIASVDD

@

1 2

R3306

R3306 1KOhm

1KOhm

1 2

R3308

R3308 1KOhm

1KOhm

1 2

R3307

R3307 1KOhm

1KOhm

1 2

R3305

R3305 1KOhm

1KOhm

@

10V220000198

+VDD33_LOM

AT24C02C-XHM-T

1.24KOhmR3303

1.24KOhm

U3302

8

VCC

7

WP

6

SCL

5

SDA

05V020000003

@

L_TRDN2 34 L_TRDP2 34

L_TRDP1 34 L_TRDN1 34

L_TRDN0 34 L_TRDP0 34

1

A0

2

A1

3

A2

4

GND

2

R1.1 change pin define.

12

C3314

0.1UF/10V

@

+VDD_GPHYPLL

C3351

0.1UF/10V

+VDD_LANPLL

C3360

0.1UF/10V

AVDDL

C3358

0.1UF/10V

AVDDH

C3337

0.1UF/10V

XTALVDD

C3353

0.1UF/10V

BIASVDD

C3356

0.1UF/10V

12

4.7UF/6.3V

12

4.7UF/6.3V

12

4.7UF/6.3V

12

C3340

0.1UF/10V

12

C3359

C3357

C3350

L3311

12

R1.2-26 EMI

12

21

1KOhm/100Mhz

09V010000038

L3318

1KOhm/100Mhz

09V010000038

L3317

1.5KOhm/100Mhz

09V010000039

L3312

21

1KOhm/100Mhz

09V010000038

L3313

1KOhm/100Mhz

09V010000038

L3316

1KOhm/100Mhz

09V010000038

1

+VDD1.2_LAN

21

+VDD1.2_LAN

R1.1 10/31 EMI CHANGE

+VDD33_LOM+VDD33_LOM

+VDD33_LOM

21

+VDD33_LOM

21

1

G

PCIE_WAKE#_LANLAN_WAKE#

3

2

3

R3313

D

2N7002

2N7002 Q5306

Q5306

@

0Ohm

S

2

R1.1 IOAC 10/31

12

LAN_BCM57780

Title :

Joyoung_Chianhg

Engineer:

MA50

1

Engineer:

Rev

1.0

33 93Monday, February 13, 2012

BG1-HW RD Div.2-NB RD Dept .5

Size Project Name

C

Date: Sheet of

4

3

2

Date: Sheet of

LAN_WAKE#22,30

A A

5