Acer Aspire 5538, Aspire 7538 Schematics

A

hexainf@hotmail.com

1 1

B

C

D

E

Compal Confidential

2 2

NAL00 Schematics Document

AMD L310/L110 Processor with RS780MN/SB710/M92-S2/S3 LP

3 3

2009-04-24

REV:0.2

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

149Monday, May 04, 2009

E

A

Compal Confidential

Model Name : NAL00

B

C

D

E

VRAM 512MB

1 1

LVDS Conn.

page 21

64M16 x 4

page 18

DDR3

Fan Control

page 4

ATI M92-S2 LP

CRT Conn.

page 23

HDMI Conn.

page 22

uFCBGA-631

Page 14,15,16,17,19

PCI-Express 8x

Gen1

PCI-Express 1x

Port 2

2 2

MINI Card 2 WWAN

page 31

Port 0

MINI Card 1 WLAN

page 31

Port 1

To IO board LAN(GbE)

Realtek RTL8111CA

page 31

AMD S1G1 Processor

uPGA-638 Package

page 4,5,6,7

Hyper Transport Link 16 x 16

ATI RS780MN

uFCBGA-528

page 10,11,12,13

A link Express2

ATI SB710

uFCBGA-528

Memory BUS(DDRII)

Dual Channel

1.8V DDRII 667/800

Thermal Sensor

ADM1032

page 32

page 6 page 20

page 31

USB conn X 2

USB

3.3V 48MHz

HD Audio

Port 1 Port 6

3.3V 24.576MHz/48Mhz

Clock Generator

SLG8SP626VTR

To IO Board USB conn X 2

page 21

Port 0 Port 2

Camera

200pin DDRII-SO-DIMM X2

BANK 0, 1, 2, 3

page 32

page 8,9

page 31

Mini Card 2

BT Conn

page 31

(WWAN)

Mini Card 1 (WLAN)

Port 3 Port 12 Port 5

Port 8

5 in 1 socket

page 30

Card Reader

RTS5159

page 30

Port 4

S-ATA

IO Board

page 31

PWR Board

page 35

page 24,25,26,27,28

port 0

SATA HDD Conn.

page 29

port 1

CDROM Conn.

page 29

LPC BUS

TP Board

page 34

3 3

LID SW/Cap sensor Board

page 33

LED

page 35

ENE KB926

page 33

HDA Codec ALC269X-GR

page 36

Phone Jack x2

page 37

Digital MIC

page 37

Power On/Off CKT.

RTC CKT.

page 24

DC/DC Interface CKT.

page 35

page 38

Int.KB

page 34

BIOS

page 34

Power Circuit

page 39,40,41,42,43,44,4546,47

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

249Monday, May 04, 2009

E

A

of

A

hexainf@hotmail.com

Voltage Rails

Power Plane Description

VIN

1 1

2 2

B+ +CPU_CORE

+NB_CORE 1.0V switched power rail ON OFFOFF +0.9V 0.9V switched power rail for DDR terminator +1.1VS +1.2V_HT 1.2V switched power rail ON OFF OFF +VGA_CORE +1.5VS +1.8V +1.8VS 1.8V switched power rail +2.5VS +3VALW +3V_LAN 3.3V power rail for LAN ON ON ON +3VS +5VALW +5VS +VSB VSB always on power rail ON ON* +RTCVCC RTC power

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

Adapter power supply (19V) AC or battery power rail for power circuit. Core voltage for CPU (0.7-1.2V)

1.1V switched power rail for NB VDDC & VGA

0.90-0.95V switched power rail

1.5V power rail for PCIE Card

1.8V power rail for CPU VDDIO and DDR

2.5V for CPU_VDDA

3.3V always on power rail

3.3V switched power rail 5V always on power rail 5V switched power rail

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

B

S1 S3 S5

N/A N/A N/A

ON OFF

ON

ON ON OFF OFF

ON

OFF OFF

ON

OFF OFF

ON ON

ON ON*

ON

OFF

ON

OFF ON ON

N/AN/AN/A OFF

OFF

OFFOFFON

OFF OFF OFF

OFF ON* OFFON

ONON

C

STATE

SIGNAL

Full ON

S1(Power On Suspend)

S3 (Suspend to RAM)

S4 (Suspend to Disk)

S5 (Soft OFF)

SLP_S1# SLP_S3#

SLP_S4# SLP_S5# +VALW +V +VS Clock

HIGH HIGH HIGH HIGH

LOW

LOW LOW LOW LOW

HIGH

LOWLOWLOW

D

HIGHHIGHHIGH

HIGH

ON

OFF

ON ON

ON

OFF

ON

Board ID / SKU ID Table for AD channel

Vcc 3.3V +/- 5%

Board ID

0 1 2 3 4 5 6 7 NC

100K +/- 5%Ra/Rc/Re

Rb / Rd / Rf V min

0

8.2K +/- 5% 18K +/- 5% 33K +/- 5% 56K +/- 5% 100K +/- 5% 200K +/- 5%

AD_BID

0 V

0.216 V 0.250 V 0.289 V

0.436 V

0.712 V

1.036 V

1.453 V 1.650 V 1.759 V

1.935 V

2.500 V

V typ

AD_BID

V

AD_BID

0 V 0 V

0.503 V

0.819 V

0.538 V

0.875 V

1.185 V 1.264 V

2.200 V

3.300 V

2.341 V

3.300 V

max

BOARD ID Table BTO Option Table

Board ID

0 1 2 3 4 5

PCB Revision

0.1

0.2

0.3

1.0

BTO Item BOM Structure

Discrete

VGA@

UMA UMA@ UMA_HDMI UMA_H@ Side port SP@ JM51 HM52

JM@

HM@

E

LOW

OFF

6 7

3 3

EC SM Bus1 address

Device

Smart Battery

Address Address

HEX

SB710 SM Bus 0 address

Device

Clock Generator (SILEGO SLG8SP626)

DDR DIMM1 DDR DIMM2 Mini card

4 4

A

Address

1101 001Xb

1001 000Xb 1001 010Xb

HEX

D2 90

94

EC SM Bus2 address

Device

ADI ADM1032 (CPU)

SB-Temp Sensor

1001 100X b0001 011X b

SB700 SM Bus 1 address

Device Address

New card

B

HEX 98H16H

9CH

PX_GPIO0

IGP only mode

PX_GPIO1

IGP only mode

PowerXpress mode

IGP only mode

PowerXpress mode

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Enable +1.1VS_PXFunction Description PX MODE SWITCH Enable +3VS_DELAY

H : Enable Reserved

Trigger from SB to Enable (PX_GPIO1/PX_+3VS/PX_+1.8VS/PX_+VGA_CORE)Function Description

2008/10/06 2009/10/06

C

dGPU_ResetFunction Description dGPU_PWR_Enable PX Mode Switch

XX

PX_GPIO1_SB

Compal Secret Data

PX_GPIO1

XX

H : EnableH : Enable L : iGPU(DC) / H : dGPU(AC)

KB926

PX_+3VSPX_GPIO2

X

H : Enable

KB926

X

H : Enable

Deciphered Date

RS780MNSB700 SB700 PX_GPIO2

PX_+1.8VS

Enable +1.8VS_PX

H : Enable

D

DISPLAY OUTPUT

X

Date: Sheet of

LVDS / CRTPowerXpress mode

PX_+VGA_CORE Enable +VGA_CORE

X

H : Enable

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

PX_GPIO2_NB

Trigger from SB

X

Reserved

E

349Monday, May 04, 2009

A

5

4

3

2

1

D D

C C

B B

H_CADIP[0..15]<10>

H_CLKIP1<10> H_CLKIN1<10> H_CLKIP0<10> H_CLKIN0<10>

H_CTLIP1<10> H_CTLOP1 <10> H_CTLIN1<10>

1 2

R225 0_0402_5%R225 0_0402_5%

1 2

R226 0_0402_5%R226 0_0402_5%

H_CTLIP0<10> H_CTLOP0 <10> H_CTLIN0<10>

+1.2V_HT

H_CADIP[0..15] H_CADIN[0..15]

VLDT=500mA

H_CADIP15 H_CADIN15 H_CADIP14 H_CADIN14 H_CADIP13 H_CADIN13 H_CADIP12 H_CADIN12 H_CADIP11 H_CADIN11 H_CADIP10 H_CADIN10 H_CADIP9 H_CADIN9 H_CADIP8 H_CADIN8 H_CADIP7 H_CADIN7 H_CADIP6 H_CADIN6 H_CADIP5 H_CADIN5 H_CADIP4 H_CADIN4 H_CADIP3 H_CADIN3 H_CADIP2 H_CADIN2 H_CADIP1 H_CADIN1 H_CADIP0 H_CADIN0

H_CTLIP1_R H_CTLIN1_R

H_CTLIP0

R829 51_0402_1%@R829 51_0402_1%@ R814 51_0402_1%@R814 51_0402_1%@

+1.2V_HT

12 12

D4

VLDT_A3

D3

VLDT_A2

D2

VLDT_A1

D1

VLDT_A0

N5

L0_CADIN_H15

P5

L0_CADIN_L15

M3

L0_CADIN_H14

M4

L0_CADIN_L14

L5

L0_CADIN_H13

M5

L0_CADIN_L13

K3

L0_CADIN_H12

K4

L0_CADIN_L12

H3

L0_CADIN_H11

H4

L0_CADIN_L11

G5

L0_CADIN_H10

H5

L0_CADIN_L10

F3

L0_CADIN_H9

F4

L0_CADIN_L9

E5

L0_CADIN_H8

F5

L0_CADIN_L8

N3

L0_CADIN_H7

N2

L0_CADIN_L7

L1

L0_CADIN_H6

M1

L0_CADIN_L6

L3

L0_CADIN_H5

L2

L0_CADIN_L5

J1

L0_CADIN_H4

K1

L0_CADIN_L4

G1

L0_CADIN_H3

H1

L0_CADIN_L3

G3

L0_CADIN_H2

G2

L0_CADIN_L2

E1

L0_CADIN_H1

F1

L0_CADIN_L1

E3

L0_CADIN_H0

E2

L0_CADIN_L0

J5

L0_CLKIN_H1

K5

L0_CLKIN_L1

J3

L0_CLKIN_H0

J2

L0_CLKIN_L0

P3

L0_CTLIN_H1

P4

L0_CTLIN_L1

N1

L0_CTLIN_H0

P1

L0_CTLIN_L0

FOX_PZ63823-284S-41F

CONN@

H_CTLIP1_R H_CTLIN1_R

JCPU1A

L0_CADOUT_H15

L0_CADOUT_L15

L0_CADOUT_H14

L0_CADOUT_L14

L0_CADOUT_H13

L0_CADOUT_L13

L0_CADOUT_H12

L0_CADOUT_L12

L0_CADOUT_H11

L0_CADOUT_L11

L0_CADOUT_H10

L0_CADOUT_L10

L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0

HTT Interface

L0_CADOUT_L0 L0_CLKOUT_H1

L0_CLKOUT_L1

L0_CLKOUT_H0

L0_CLKOUT_L0

L0_CTLOUT_H1 L0_CTLOUT_L1

L0_CTLOUT_H0 L0_CTLOUT_L0

VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0

Athlon 64 S1 Processor Socket

AE5 AE4 AE3 AE2

T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1

Y4 Y3 Y1 W1

T5 R5

R2 R3

H_CADOP[0..15] H_CADON[0..15]

C904 4.7U_0805_10V4ZC904 4.7U_0805_10V4Z

H_CADOP15 H_CADON15 H_CADOP14 H_CADON14 H_CADOP13 H_CADON13 H_CADOP12 H_CADON12 H_CADOP11 H_CADON11 H_CADOP10 H_CADON10 H_CADOP9 H_CADON9 H_CADOP8 H_CADON8 H_CADOP7 H_CADON7 H_CADOP6 H_CADON6 H_CADOP5 H_CADON5 H_CADOP4 H_CADON4 H_CADOP3 H_CADON3 H_CADOP2 H_CADON2 H_CADOP1 H_CADON1 H_CADOP0 H_CADON0

H_CTLOP1_R H_CTLON1_R

H_CTLOP0 H_CTLON0H_CTLIN0

1 2

H_CLKOP1 <10> H_CLKON1 <10> H_CLKOP0 <10> H_CLKON0 <10>

1 2

R227 0_0402_5%R227 0_0402_5%

1 2

R250 0_0402_5%R250 0_0402_5%

H_CTLON0 <10>

H_CADOP[0..15] <10> H_CADON[0..15] <10>H_CADIN[0..15]<10>

H_CTLON1 <10>

FAN1 Conn

+5VS

+VCC_FAN1

EN_DFAN1<33>

R62 300_0402_5%R62 300_0402_5%

12

1

2

U10

1

EN

2

VIN

3

VOUT

4

VSET

APL5607KI-TRG_SO8

C105

0.1U_0402_16V4Z

FAN_SPEED1<33>

C108 10U_0805_10V4ZC108 10U_0805_10V4Z

1 2

8

GND

7

GND

6

GND

5

GND

+3VS

12

R298

R298 10K_0402_5%

10K_0402_5%

1

C670

C670 1000P_0402_50V7K

1000P_0402_50V7K

2

40mil

+VCC_FAN1

+5VS

12

D11

D11 1SS355_SOD323-2

1SS355_SOD323-2

@

1 2

10U_0805_10V4Z

1000P_0402_50V7K

D12

BAS16_SOT23-3@

BAS16_SOT23-3@ C121

C121

1 2

C119

1 2

ACES_85205-03001

CONN@

JP13

1 2 3

AMD : 49.9 1% ATI : 51 1%

+1.2V_HT

250 mil

A A

5

VLDT CAP.

1

C910

4.7U_0805_10V4Z

2

1

C911

4.7U_0805_10V4Z

2

1

C912

0.22U_0603_16V4Z

2

4

1

C913

0.22U_0603_16V4Z

2

Near CPU Socket

1

C914

C914 180P_0402_50V8J

180P_0402_50V8J

2

1

C915

C915 180P_0402_50V8J

180P_0402_50V8J

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

A

of

449Monday, May 04, 2009

A

hexainf@hotmail.com

B

C

D

E

DDR_B_D[63..0]<9>

DDR_B_DM[7..0]<9> DDR_A_DM[7..0] <8>

DDR_B_DQS7<9> DDR_B_DQS#7<9> DDR_B_DQS6<9> DDR_B_DQS#6<9> DDR_B_DQS5<9> DDR_B_DQS#5<9> DDR_B_DQS4<9> DDR_B_DQS#4<9> DDR_B_DQS3<9> DDR_B_DQS#3<9> DDR_B_DQS2<9> DDR_B_DQS#2<9> DDR_B_DQS1<9> DDR_B_DQS#1<9> DDR_B_DQS0<9> DDR_B_DQS#0<9>

R801

1K_0402_1%

R800

1K_0402_1%

+1.8V

1 2

1

2

1 2

R802

R802 R803

R803

DDR_CS3_DIMMA#<8> DDR_CS2_DIMMA#<8> DDR_CS1_DIMMA#<8> DDR_CS0_DIMMA#<8>

DDR_CS3_DIMMB#<9> DDR_CS2_DIMMB#<9> DDR_CS1_DIMMB#<9> DDR_CS0_DIMMB#<9>

DDR_CKE1_DIMMB<9> DDR_CKE0_DIMMB<9> DDR_CKE1_DIMMA<8> DDR_CKE0_DIMMA<8>

DDR_A_MA[15..0]<8>

PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH

C916

1 2

DDR_A_BS#2<8> DDR_A_BS#1<8> DDR_A_BS#0<8>

DDR_A_RAS#<8> DDR_A_CAS#<8> DDR_A_WE#<8>

0.1U_0402_16V4Z

C917

2

12

DDR_A_CLK2

DDR_A_CLK#2 DDR_A_CLK1

DDR_A_CLK#1

+CPU_M_VREF

1000P_0402_50V7K

+CPU_M_VREF

TP1TP1

39.2_0402_1%

DDR_CS3_DIMMA# DDR_CS2_DIMMA# DDR_CS1_DIMMA# DDR_CS0_DIMMA#

DDR_CS3_DIMMB# DDR_CS2_DIMMB# DDR_CS1_DIMMB# DDR_CS0_DIMMB#

DDR_CKE1_DIMMB DDR_CKE0_DIMMB DDR_CKE1_DIMMA DDR_CKE0_DIMMA

DDR_A_MA15 DDR_A_MA14 DDR_A_MA13 DDR_A_MA12 DDR_A_MA11 DDR_A_MA10 DDR_A_MA9 DDR_A_MA8 DDR_A_MA7 DDR_A_MA6 DDR_A_MA5 DDR_A_MA4 DDR_A_MA3 DDR_A_MA2 DDR_A_MA1 DDR_A_MA0

DDR_A_BS#2 DDR_A_BS#1 DDR_A_BS#0

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

W17

VTT_SENSE

Y10

M_ZN

AE10

M_ZP

AF10

V19 J22 V22 T19

Y26 J24

W24

U23 H26

J23 J20 J21

K19 K20 V24 K24 L20 R19 L19 L22

L21 M19 M20 M24 M22

N22

N21

R21

K22

R20

T22

T20

U20

U21

CONN@ FOX_PZ63823-284S-41F

1

C918

1.5P_0402_50V8C

2

1

C920

1.5P_0402_50V8C

2

M_VREF VTT_SENSE

M_ZN M_ZP

MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0

MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0

MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0

MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0

MA_BANK2 MA_BANK1 MA_BANK0

MA_RAS_L MA_CAS_L MA_WE_L

Athlon 64 S1 Processor Socket

JCPU1B

MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1

MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1

DDRII Cmd/Ctrl//Clk

DDR_B_CLK2

DDR_B_CLK#2 DDR_B_CLK1

DDR_B_CLK#1

VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9

MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0

MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10

MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0

MB_BANK2 MB_BANK1 MB_BANK0

MB_RAS_L MB_CAS_L

MB_WE_L

1

2

1

2

D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10

Y16 AA16 E16 F16

AF18 AF17 A17 A18

W23 W26 V20 U19

J25 J26 W25 L23 L25 U25 L24 M26 L26 N23 N24 N25 N26 P24 P26 T24

K26 T26 U26

U24 V26 U22

C919

1.5P_0402_50V8C

C921

1.5P_0402_50V8C

+0.9V

DDR_A_CLK2 DDR_A_CLK#2 DDR_A_CLK1 DDR_A_CLK#1

DDR_B_CLK2 DDR_B_CLK#2 DDR_B_CLK1 DDR_B_CLK#1

DDR_B_ODT1 DDR_B_ODT0 DDR_A_ODT1 DDR_A_ODT0

DDR_B_MA15 DDR_B_MA14 DDR_B_MA13 DDR_B_MA12 DDR_B_MA11 DDR_B_MA10 DDR_B_MA9 DDR_B_MA8 DDR_B_MA7 DDR_B_MA6 DDR_B_MA5 DDR_B_MA4 DDR_B_MA3 DDR_B_MA2 DDR_B_MA1 DDR_B_MA0

DDR_B_BS#2 DDR_B_BS#1 DDR_B_BS#0

DDR_B_RAS# DDR_B_CAS# DDR_B_WE#

DDR_A_CLK2 <8> DDR_A_CLK#2 <8> DDR_A_CLK1 <8> DDR_A_CLK#1 <8>

DDR_B_CLK2 <9> DDR_B_CLK#2 <9> DDR_B_CLK1 <9> DDR_B_CLK#1 <9>

DDR_B_ODT1 <9> DDR_B_ODT0 <9> DDR_A_ODT1 <8> DDR_A_ODT0 <8>

DDR_B_MA[15..0] <9>

DDR_B_BS#2 <9> DDR_B_BS#1 <9> DDR_B_BS#0 <9>

DDR_B_RAS# <9> DDR_B_CAS# <9> DDR_B_WE# <9>

4 4

3 3

2 2

1 1

DDR_B_D63 DDR_B_D62 DDR_B_D61 DDR_B_D60 DDR_B_D59 DDR_B_D58 DDR_B_D57 DDR_B_D56 DDR_B_D55 DDR_B_D54 DDR_B_D53 DDR_B_D52 DDR_B_D51 DDR_B_D50 DDR_B_D49 DDR_B_D48 DDR_B_D47 DDR_B_D46 DDR_B_D45 DDR_B_D44 DDR_B_D43 DDR_B_D42 DDR_B_D41 DDR_B_D40 DDR_B_D39 DDR_B_D38 DDR_B_D37 DDR_B_D36 DDR_B_D35 DDR_B_D34 DDR_B_D33 DDR_B_D32 DDR_B_D31 DDR_B_D30 DDR_B_D29 DDR_B_D28 DDR_B_D27 DDR_B_D26 DDR_B_D25 DDR_B_D24 DDR_B_D23 DDR_B_D22 DDR_B_D21 DDR_B_D20 DDR_B_D19 DDR_B_D18 DDR_B_D17 DDR_B_D16 DDR_B_D15 DDR_B_D14 DDR_B_D13 DDR_B_D12 DDR_B_D11 DDR_B_D10 DDR_B_D9 DDR_B_D8 DDR_B_D7 DDR_B_D6 DDR_B_D5 DDR_B_D4 DDR_B_D3 DDR_B_D2 DDR_B_D1 DDR_B_D0

DDR_B_DM7 DDR_B_DM6 DDR_B_DM5 DDR_B_DM4 DDR_B_DM3 DDR_B_DM2 DDR_B_DM1 DDR_B_DM0

DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DQS0 DDR_B_DQS#0

AD11

MB_DATA63

AF11

MB_DATA62

AF14

MB_DATA61

AE14

MB_DATA60

Y11

MB_DATA59

AB11

MB_DATA58

AC12

MB_DATA57

AF13

MB_DATA56

AF15

MB_DATA55

AF16

MB_DATA54

AC18

MB_DATA53

AF19

MB_DATA52

AD14

MB_DATA51

AC14

MB_DATA50

AE18

MB_DATA49

AD18

MB_DATA48

AD20

MB_DATA47

AC20

MB_DATA46

AF23

MB_DATA45

AF24

MB_DATA44

AF20

MB_DATA43

AE20

MB_DATA42

AD22

MB_DATA41

AC22

MB_DATA40

AE25

MB_DATA39

AD26

MB_DATA38

AA25

MB_DATA37

AA26

MB_DATA36

AE24

MB_DATA35

AD24

MB_DATA34

AA23

MB_DATA33

AA24

MB_DATA32

G24

MB_DATA31

G23

MB_DATA30

D26

MB_DATA29

C26

MB_DATA28

G26

MB_DATA27

G25

MB_DATA26

E24

MB_DATA25

E23

MB_DATA24

C24

MB_DATA23

B24

MB_DATA22

C20

MB_DATA21

B20

MB_DATA20

C25

MB_DATA19

D24

MB_DATA18

A21

MB_DATA17

D20

MB_DATA16

D18

MB_DATA15

C18

MB_DATA14

D14

MB_DATA13

C14

MB_DATA12

A20

MB_DATA11

A19

MB_DATA10

A16

MB_DATA9

A15

MB_DATA8

A13

MB_DATA7

D12

MB_DATA6

E11

MB_DATA5

G11

MB_DATA4

B14

MB_DATA3

A14

MB_DATA2

A11

MB_DATA1

C11

MB_DATA0

AD12

MB_DM7

AC16

MB_DM6

AE22

MB_DM5

AB26

MB_DM4

E25

MB_DM3

A22

MB_DM2

B16

MB_DM1

A12

MB_DM0

AF12

MB_DQS_H7

AE12

MB_DQS_L7

AE16

MB_DQS_H6

AD16

MB_DQS_L6

AF21

MB_DQS_H5

AF22

MB_DQS_L5

AC25

MB_DQS_H4

AC26

MB_DQS_L4

F26

MB_DQS_H3

E26

MB_DQS_L3

A24

MB_DQS_H2

A23

MB_DQS_L2

D16

MB_DQS_H1

C16

MB_DQS_L1

C12

MB_DQS_H0

B12

MB_DQS_L0

CONN@ FOX_PZ63823-284S-41F

Athlon 64 S1 Processor Socket

JCPU1C

MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14

DDRII Data

MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10

MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0

MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0

MA_DQS_H7

MA_DQS_L7

MA_DQS_H6

MA_DQS_L6

MA_DQS_H5

MA_DQS_L5

MA_DQS_H4

MA_DQS_L4

MA_DQS_H3

MA_DQS_L3

MA_DQS_H2

MA_DQS_L2

MA_DQS_H1

MA_DQS_L1

MA_DQS_H0

MA_DQS_L0

AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12

Y13 AB16 Y19 AC24 F24 E19 C15 E12

W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13

DDR_A_D63 DDR_A_D62 DDR_A_D61 DDR_A_D60 DDR_A_D59 DDR_A_D58 DDR_A_D57 DDR_A_D56 DDR_A_D55 DDR_A_D54 DDR_A_D53 DDR_A_D52 DDR_A_D51 DDR_A_D50 DDR_A_D49 DDR_A_D48 DDR_A_D47 DDR_A_D46 DDR_A_D45 DDR_A_D44 DDR_A_D43 DDR_A_D42 DDR_A_D41 DDR_A_D40 DDR_A_D39 DDR_A_D38 DDR_A_D37 DDR_A_D36 DDR_A_D35 DDR_A_D34 DDR_A_D33 DDR_A_D32 DDR_A_D31 DDR_A_D30 DDR_A_D29 DDR_A_D28 DDR_A_D27 DDR_A_D26 DDR_A_D25 DDR_A_D24 DDR_A_D23 DDR_A_D22 DDR_A_D21 DDR_A_D20 DDR_A_D19 DDR_A_D18 DDR_A_D17 DDR_A_D16 DDR_A_D15 DDR_A_D14 DDR_A_D13 DDR_A_D12 DDR_A_D11 DDR_A_D10 DDR_A_D9 DDR_A_D8 DDR_A_D7 DDR_A_D6 DDR_A_D5 DDR_A_D4 DDR_A_D3 DDR_A_D2 DDR_A_D1 DDR_A_D0

DDR_A_DM7 DDR_A_DM6 DDR_A_DM5 DDR_A_DM4 DDR_A_DM3 DDR_A_DM2 DDR_A_DM1 DDR_A_DM0

DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DQS0 DDR_A_DQS#0

DDR_A_D[63..0] <8>

DDR_A_DQS7 <8> DDR_A_DQS#7 <8> DDR_A_DQS6 <8> DDR_A_DQS#6 <8> DDR_A_DQS5 <8> DDR_A_DQS#5 <8> DDR_A_DQS4 <8> DDR_A_DQS#4 <8> DDR_A_DQS3 <8> DDR_A_DQS#3 <8> DDR_A_DQS2 <8> DDR_A_DQS#2 <8> DDR_A_DQS1 <8> DDR_A_DQS#1 <8> DDR_A_DQS0 <8> DDR_A_DQS#0 <8>

Processor DDR2 Memory Interface

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

SCHEMATICS,MB A5401

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

401728

549Monday, May 04, 2009

E

A

5

+1.8VS

A:Need to re-Link "SGN00000200"

R339

R339 300_0402_5%

300_0402_5%

1 2

LDT_RST#<24>

D D

H_PWRGD<24>

C C

B B

LDT_STOP#<11,24>

C929

2200P_0402_50V7K

1

2

LDT_RST#

1

C721

0.01U_0402_25V4Z

@

2

+1.8VS

R338

R338 300_0402_5%

300_0402_5%

1 2

H_PWRGD

1

C720

0.01U_0402_25V4Z

@

2

+1.8VS

R337

R337 300_0402_5%

300_0402_5%

1 2

LDT_STOP#

1

C719

0.01U_0402_25V4Z

@

2

+3VS

C928

0.1U_0402_16V4Z

1 2

U55

CPU_THERMDA CPU_THERMDC

1 2 3

ADM1032ARMZ-2REEL_MSOP8

F75383M_MSOP8

SMBus Address: 1001110X (b)

AMD: suggest DBREQ need pull high

+1.8V

VDD D+

ALERT#

DTHERM#4GND

SCLK

SDATA

+2.5VS

CLK_CPU_BCLK<20>

CLK_CPU_BCLK#<20>

8 7 6 5

4

L91

1 2

FCM2012CF-800T06_2P

1

+

C391

C391 150U_B2_6.3VM

150U_B2_6.3VM

2

3900P_0402_50V7K

1 2

C926

12

R816

R816 169_0402_1%

169_0402_1%

1 2

C927 3900P_0402_50V7KC927 3900P_0402_50V7K

EC_SMB_CK2 <19,33> EC_SMB_DA2 <19,33>

+2.5VDDA

1

C923

2

4.7U_0805_10V4Z

+1.2V_HT

VDDA=300mA

3300P_0402_50V7K

1

C924

C925

0.22U_0603_16V4Z

2

LDT_RST# H_PWRGD LDT_STOP#

R808 300_0402_5%

R811 44.2_0402_1%R811 44.2_0402_1%

1 2

R812 44.2_0402_1%R812 44.2_0402_1%

CPU_VCC_SENSE<46>

CPU_CLKIN_SC_P CPU_CLKIN_SC_N

1 2

R61&R16 close to CPU within 1"

CPU_DBRDY CPU_TMS

CPU_TCK CPU_TDO CPU_TRST# CPU_TDI

CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

CPU_SIC

12

CPU_HTREF1 CPU_HTREF0

TP2TP2

TP3TP3

TP4TP4 TP6TP6 TP8TP8 TP10TP10 TP11TP11

CPU_THERMDC CPU_THERMDA

3

F8

VDDA2

F9

VDDA1

B7

RESET_L

A7

PWROK

F10

LDTSTOP_L

AF4

SIC

AF5

SID

P6

HTREF1

R6

HTREF0

F6

VDD_FB_H

E6

VDD_FB_L

W9

VDDIO_FB_H

Y9

VDDIO_FB_L

A9

CLKIN_H

A8

CLKIN_L

G10

DBRDY

AA9

TMS

AC9

TCK

AD9

TRST_L

AF9

TDI TEST25_HE9TEST29_H

E8

TEST25_L

G9

TEST19

H10

TEST18

AA7

TEST13

C2

TEST9

D7

TEST17

E7

TEST16

F7

TEST15

C7

TEST14

AC8

TEST12

C3

TEST7

AA6

TEST6

W7

THERMDC

W8

THERMDA

Y6

TEST3

AB6

TEST2

P20

RSVD0

P19

RSVD1

N20

RSVD2

N19

RSVD3

R26

RSVD4

R25

RSVD5

P22

RSVD6

R22

RSVD7

FOX_PZ63823-284S-41F

CONN@

JCPU1D

THERMTRIP_L

PROCHOT_L

VID5 VID4 VID3 VID2 VID1 VID0

CPU_PRESENT_L

PSI_L

DBREQ_L

TDO

TEST29_L

TEST24 TEST23

MISC

TEST22 TEST21 TEST20

TEST28_H

TEST28_L

TEST27 TEST26 TEST10

TEST8

RSVD8 RSVD9

RSVD10 RSVD11

RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20

+1.8V

12

R830

R830 300_0402_5%

300_0402_5%

CPU_THERMTRIP#_R

AF6

CPU_PROCHOT#_1.8

AC7

A5 C6 A6 A4 C5 B5

CPU_PRESENT#

AC6 A3

CPU_DBREQ#

E10

AE9

CPU_TEST29_H_FBCLKOUT_P

C9

CPU_TEST29_L_FBCLKOUT_N

C8

ROUTE AS 80 Ohm DIFFERENTIAL PAIR PLACE IT CLOSE TO CPU WITHIN 1"

AE7 AD7 AE8 AB8 AF7

J7 H8 AF8 AE6 K8 C4

H16 B18

B3 C1

H6 G6 D5

R24 W18 R23 AA8 H18 H19

TP5TP5 TP7TP7 TP9TP9

TP12TP12

CPU_TEST26_BURNIN#

R372

1 2

0_0402_5%

CPU_VID5 <46> CPU_VID4 <46> CPU_VID3 <46> CPU_VID2 <46> CPU_VID1 <46> CPU_VID0 <46>

PSI_L <46>CPU_VSS_SENSE<46>

1 2

CPU_TEST21_SCANEN

300_0402_5%

CPU_THERMTRIP#_R H_THERMTRIP#

2

R819

80.6_0402_1%

+1.8V

12

R822

H_PROCHOT_R# <24>

+1.8V

12

R820

R820 1K_0402_5%

1K_0402_5%

B

2

Q69

E

3 1

C

MMBT3904_NL_SOT23-3

CPU_VID1 CPU_PRESENT# CPU_TEST26_BURNIN#

CPU_TEST21_SCANEN

+1.8V

R813 510_0402_5%

R815 510_0402_5%

R815 510_0402_5% R817 300_0402_5%

R817 300_0402_5% R818 300_0402_5%

R818 300_0402_5%

+3VALW

12

R823

R823 10K_0402_5%

10K_0402_5%

1 2

R805 300_0402_5%

1 2

R806 1K_0402_5%

1 2

R807 300_0402_5%

1 2

R809 300_0402_5%

CPU_TEST25_H_BYPASSCLK_H

12

CPU_TEST25_L_BYPASSCLK_L

12 12 12

+3VALW

12

R821

1K_0402_5%@

B

2

Q70

Q70 MMBT3904_NL_SOT23-3

MMBT3904_NL_SOT23-3

E

3 1

C

@

H_THERMTRIP# <25>

1

+1.8V

VID1: For compatibility with future processors

CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1

MAINPWON <42,45>

R824220_0402_5%@ R824220_0402_5%@12R826220_0402_5%@ R826220_0402_5%@

R827220_0402_5%@ R827220_0402_5%@

R825220_0402_5%@ R825220_0402_5%@

R828220_0402_5%R828220_0402_5%

12

CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST#

A A

CPU_TDO

NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.

5

HDT Connector

JP18

2

1

4

3

6

5

8

7

10

9

12

11

14

13

16

15

18

17

20

19

22

21

2423 26

SAMTEC_ASP-68200-07

@SAMTEC_ASP-68200-07

@

HDT_RST#

4

Y

+3VS

5

LDT_RST#

2

P

B

1

A

G

U56

@U56

@

3

NC7SZ08P5X_NL_SC70-5

SB_PWRGD <25,35>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

A

of

649Monday, May 04, 2009

5

hexainf@hotmail.com

VDD(+CPU_CORE) decoupling.

D D

C C

+CPU_CORE

1

+

2

+CPU_CORE

1

2

+CPU_CORE

1

2

C931

C931 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

C936

C936 22U_0805_6.3V6M

22U_0805_6.3V6M

C945

0.22U_0603_16V4Z

1

+

C930

C930 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

Near CPU Socket

1

C937

C937 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C946

0.22U_0603_16V4Z

2

1

C938

C938 22U_0805_6.3V6M

22U_0805_6.3V6M

2

+CPU_CORE +CPU_CORE

1

C947

0.01U_0402_25V7K

2

1

+

C934

C934 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

1

C939

C939 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VDDIO decoupling.

+1.8V

1

C949

C949 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C950

C950 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

B B

+1.8V

1

C954

0.22U_0603_16V4Z

2

+1.8V +1.8V

1

C966

0.01U_0402_25V7K

2

+1.8V

1

A A

2

Between CPU Socket and DIMM

1

C955

0.22U_0603_16V4Z

2

1

C967

0.01U_0402_25V7K

2

C980

4.7U_0805_10V4Z

1

C981

4.7U_0805_10V4Z

2

+1.8V

1

C951

0.22U_0603_16V4Z

2

1

C956

0.22U_0603_16V4Z

2

1

2

1

2

180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>

C968

C968 180P_0402_50V8J

180P_0402_50V8J

C982

4.7U_0805_10V4Z

1

C952

0.22U_0603_16V4Z

2

1

C957

0.22U_0603_16V4Z

2

1

C969

C969 180P_0402_50V8J

180P_0402_50V8J

2

1

C983

4.7U_0805_10V4Z

2

4

1

+

C935

C935 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

2

1

C940

C940 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C948

C948 180P_0402_50V8J

180P_0402_50V8J

2

1

C941

C941 22U_0805_6.3V6M

22U_0805_6.3V6M

2

Under CPU Socket

1

C970

C970 180P_0402_50V8J

180P_0402_50V8J

2

1

+

C536

C536 220U_B2_2.5VM_R35

220U_B2_2.5VM_R35

2

1

C942

C942 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C971

C971 180P_0402_50V8J

180P_0402_50V8J

2

3

+CPU_CORE +CPU_CORE

1

C943

C943 22U_0805_6.3V6M

22U_0805_6.3V6M

2

1

C944

C944 22U_0805_6.3V6M

22U_0805_6.3V6M

2

VTT decoupling.

+0.9V

1

2

+0.9V

1

2

C958

4.7U_0805_10V4Z

C972

4.7U_0805_10V4Z

1

C959

4.7U_0805_10V4Z

2

Near CPU Socket Right side.

1

C973

4.7U_0805_10V4Z

2

Near CPU Socket Left side.

1

2

1

2

AC4

VDD1

AD2

VDD2

G4

VDD3

H2

VDD4

J9

VDD5

J11

VDD6

J13

VDD7

K6

VDD8

K10

VDD9

K12

VDD10

K14

VDD11

L4

VDD12

L7

VDD13

L9

VDD14

L11

VDD15

L13

VDD16

M2

VDD17

M6

VDD18

M8

VDD19

M10

VDD20

N7

VDD21

N9

VDD22

N11

VDD23

P8

VDD24

P10

VDD25

R4

VDD26

R7

VDD27

R9

VDD28

R11

VDD29

T2

VDD30

T6

VDD31

T8

VDD32

T10

VDD33

T12

VDD34

T14

VDD35

U7

VDD36

U9

VDD37

U11

VDD38

U13

VDD39

V6

VDD40

V8

VDD41

V10

VDD42

FOX_PZ63823-284S-41F

CONN@

Athlon 64 S1 Processor Socket

C960

0.22U_0603_16V4Z

C974

0.22U_0603_16V4Z

JCPU1E

VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54

VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8 VDDIO9

VDDIO10

Power

VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27

+0.9V

Near Power Supply

1

C: Change to NBO CAP

+

C392

C392 150U_B2_6.3VM

150U_B2_6.3VM

2

1

C961

0.22U_0603_16V4Z

2

1

C975

0.22U_0603_16V4Z

2

V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16

H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25

2

+1.8V

1

C962

C962 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C976

C976 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C963

C963 1000P_0402_50V7K

1000P_0402_50V7K

2

1

C977

C977 1000P_0402_50V7K

1000P_0402_50V7K

2

AA4

VSS1

AA11

VSS2

AA13

VSS3

AA15

VSS4

AA17

VSS5

AA19

VSS6

AB2

VSS7

AB7

VSS8

AB9

VSS9

AB23

VSS10

AB25

VSS11

AC11

VSS12

AC13

VSS13

AC15

VSS14

AC17

VSS15

AC19

VSS16

AC21

VSS17

AD6

VSS18

AD8

VSS19

AD25

VSS20

AE11

VSS21

AE13

VSS22

AE15

VSS23

AE17

VSS24

AE19

VSS25

AE21

VSS26

AE23

VSS27

B4

VSS28

B6

VSS29

B8

VSS30

B9

VSS31

B11

VSS32

B13

VSS33

B15

VSS34

B17

VSS35

B19

VSS36

B21

VSS37

B23

VSS38

B25

VSS39

D6

VSS40

D8

VSS41

D9

VSS42

D11

VSS43

D13

VSS44

D15

VSS45

D17

VSS46

D19

VSS47

D21

VSS48

D23

VSS49

D25

VSS50

E4

VSS51

F2

VSS52

F11

VSS53

F13

VSS54

F15

VSS55

F17

VSS56

F19

VSS57

F21

VSS58

F23

VSS59

F25

VSS60

H7

VSS61

H9

VSS62

H21

VSS63

H23

VSS64

J4

VSS65

FOX_PZ63823-284S-41F

CONN@

Athlon 64 S1 Processor Socket

JCPU1F

Ground

1

C964

C964 180P_0402_50V8J

180P_0402_50V8J

2

1

C978

C978 180P_0402_50V8J

180P_0402_50V8J

2

VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

1

C965

C965 180P_0402_50V8J

180P_0402_50V8J

2

1

C979

C979 180P_0402_50V8J

180P_0402_50V8J

2

1

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

A

749Monday, May 04, 2009

A

5

4

3

2

1

C987

2

Issued Date

3

+1.8V+DIMM_VREF

12

R832

1K_0402_1%

12

R833

1K_0402_1%

DDR_A_D[0..63] DDR_A_DM[0..7] DDR_A_DQS[0..7] DDR_A_MA[0..15] DDR_A_DQS#[0..7]

DDR_A_MA11 DDR_A_MA7 DDR_A_MA6 DDR_A_MA4

DDR_A_MA12 DDR_A_BS#2 DDR_CS2_DIMMA# DDR_CKE0_DIMMA

DDR_A_MA2 DDR_A_MA0 DDR_A_BS#1 DDR_CS0_DIMMA#

DDR_A_MA5 DDR_A_MA8 DDR_A_MA9

DDR_A_BS#0 DDR_A_MA10 DDR_A_MA1 DDR_A_MA3

DDR_A_ODT1 DDR_CS1_DIMMA# DDR_A_CAS# DDR_A_WE#

DDR_A_RAS# DDR_A_ODT0 DDR_A_MA13 DDR_CS3_DIMMA#

DDR_CKE1_DIMMA DDR_A_MA15 DDR_A_MA14

Compal Secret Data

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

2

47_0804_8P4R_5%

RP24

RP25

RP26

RP27

RP28

RP29

RP30

RP31

+0.9V

18

1 2

C985 0.1U_0402_16V4Z

27 36

1 2

C988 0.1U_0402_16V4Z

45

18 27 36 45

1 2

C989 0.1U_0402_16V4Z

1 2

C990 0.1U_0402_16V4Z

1 2

C991 0.1U_0402_16V4Z

1 2

C992 0.1U_0402_16V4Z

1 2

C993 0.1U_0402_16V4Z

1 2

C994 0.1U_0402_16V4Z

1 2

C995 0.1U_0402_16V4Z

1 2

C996 0.1U_0402_16V4Z

1 2

C998 0.1U_0402_16V4Z

1 2

C997 0.1U_0402_16V4Z

1 2

C999 0.1U_0402_16V4Z

1 2

C1000 0.1U_0402_16V4Z

1 2

C1002 0.1U_0402_16V4Z

1 2

C1001 0.1U_0402_16V4Z

Title

Size Document Number Rev

Custom

401728

Date: Sheet

+1.8V

Compal Electronics, Inc.

SCHEMATICS,MB A5401

1

A

of

849Monday, May 04, 2009

+1.8V

0.1U_0402_16V4Z

JDIMM1

1

VREF

3

DDR_A_D0

D D

C C

DDR_CKE0_DIMMA<5> DDR_CS2_DIMMA#<5>

DDR_A_BS#2<5>

DDR_A_BS#0<5> DDR_A_WE#<5>

DDR_A_CAS#<5> DDR_CS1_DIMMA#<5>

DDR_A_ODT1<5>

B B

A A

SB_CK_SDAT<9,20,25,31>

SB_CK_SCLK<9,20,25,31>

DDR_A_D1 DDR_A_DQS#0

DDR_A_DQS0 DDR_A_D2

DDR_A_D3 DDR_A_D8

DDR_A_D9 DDR_A_DQS#1

DDR_A_DQS1 DDR_A_D10

DDR_A_D11

DDR_A_D16 DDR_A_D17

DDR_A_DQS#2 DDR_A_DQS2

DDR_A_D18 DDR_A_D22 DDR_A_D19

DDR_A_D24 DDR_A_D25

DDR_A_DM3

DDR_A_D26 DDR_A_D27

DDR_CKE0_DIMMA DDR_CS2_DIMMA#

DDR_A_BS#2 DDR_A_MA12

DDR_A_MA9

DDR_A_MA5 DDR_A_MA3 DDR_A_MA1

DDR_A_MA10 DDR_A_BS#0 DDR_A_WE#

DDR_A_CAS# DDR_CS1_DIMMA#

DDR_A_ODT1 DDR_A_D32

DDR_A_D33 DDR_A_DQS#4

DDR_A_DQS4 DDR_A_D34

DDR_A_D35 DDR_A_D40

DDR_A_D41 DDR_A_DM5 DDR_A_D42

DDR_A_D43 DDR_A_D47 DDR_A_D48

DDR_A_D49 DDR_A_D53

DDR_A_DQS#6 DDR_A_DQS6

DDR_A_D50 DDR_A_D51 DDR_A_D55

DDR_A_D56 DDR_A_D57

DDR_A_DM7 DDR_A_D58

DDR_A_D59 SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C1003

0.1U_0402_16V4Z

2

5

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

203

GND

FOX_AS0A426-M2RN-7F

CONN@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0 CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

NC DM2 VSS

DQ22 DQ23

VSS

DQ28 DQ29

VSS

DQS3#

DQS3

VSS

DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

A11

A7

A6 VDD

A4

A2

A0 VDD BA1

RAS#

S0#

VDD

ODT0

NC/A13

VDD

NC VSS

DQ36 DQ37

VSS DM4 VSS

DQ38 DQ39

VSS

DQ44 DQ45

VSS

DQS5#

DQS5

VSS

DQ46 DQ47

VSS

DQ52 DQ53

VSS CK1

CK1#

VSS DM6 VSS

DQ54 DQ55

VSS

DQ60 DQ61

VSS

DQS7#

DQS7

VSS

DQ62 DQ63

VSS SAO SA1

GND

JAWD0 used

DIMM1 REV H:5.2mm (BOT)

+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 204

4

DDR_A_D4 DDR_A_D5

DDR_A_DM0 DDR_A_D6

DDR_A_D7 DDR_A_D12

DDR_A_D13 DDR_A_DM1 DDR_A_CLK1

DDR_A_CLK#1 DDR_A_D14

DDR_A_D15

DDR_A_D20 DDR_A_D21

DDR_A_DM2

DDR_A_D23 DDR_A_D28

DDR_A_D29 DDR_A_DQS#3

DDR_A_DQS3 DDR_A_D30

DDR_A_D31 DDR_CKE1_DIMMA DDR_A_MA15

DDR_A_MA14 DDR_A_MA11

DDR_A_MA7 DDR_A_MA6DDR_A_MA8

DDR_A_MA4 DDR_A_MA2 DDR_A_MA0

DDR_A_BS#1 DDR_A_RAS# DDR_CS0_DIMMA#

DDR_A_ODT0 DDR_A_MA13

DDR_CS3_DIMMA# DDR_A_D36

DDR_A_D37 DDR_A_DM4 DDR_A_D38

DDR_A_D39 DDR_A_D44

DDR_A_D45 DDR_A_DQS#5

DDR_A_DQS5 DDR_A_D46

DDR_A_D52

DDR_A_CLK2 DDR_A_CLK#2

DDR_A_DM6 DDR_A_D54

DDR_A_D60 DDR_A_D61

DDR_A_DQS#7 DDR_A_DQS7

DDR_A_D62 DDR_A_D63

R834 10K_0402_5%R834 10K_0402_5%

1 2

R835 10K_0402_5%R835 10K_0402_5%

1 2

DDR_A_CLK1 <5> DDR_A_CLK#1 <5>

DDR_CKE1_DIMMA <5>

DDR_A_BS#1 <5> DDR_A_RAS# <5> DDR_CS0_DIMMA# <5>

DDR_A_ODT0 <5>

DDR_CS3_DIMMA# <5>

DDR_A_CLK2 <5> DDR_A_CLK#2 <5>

0.1U_0402_16V4Z

C986

1

2

4.7U_0805_10V4Z

DDR_A_D[0..63]<5> DDR_A_DM[0..7]<5>

DDR_A_DQS[0..7]<5> DDR_A_MA[0..15]<5>

DDR_A_DQS#[0..7]<5>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

hexainf@hotmail.com

4

3

2

1

4.7U_0805_10V4Z

1

2

+3VS

Issued Date

DDR_B_D[0..63]<5> DDR_B_DM[0..7]<5>

DDR_B_DQS[0..7]<5> DDR_B_MA[0..15]<5>

DDR_B_DQS#[0..7]<5>

C1006

+DIMM_VREF

0.1U_0402_16V4Z

3

C1007

1

2

DDR_B_D[0..63] DDR_B_DM[0..7] DDR_B_DQS[0..7] DDR_B_MA[0..15] DDR_B_DQS#[0..7]

Compal Secret Data

2007/5/18 2009/06/11

Compal Secret Data

Deciphered Date

+0.9V

RP32

DDR_CS0_DIMMB# DDR_B_BS#1 DDR_B_MA2 DDR_B_MA0

DDR_B_MA6 DDR_B_MA4 DDR_B_MA11 DDR_B_MA7

DDR_CS2_DIMMB# DDR_B_BS#2 DDR_CKE0_DIMMB

DDR_B_MA5 DDR_B_MA8 DDR_B_MA9 DDR_B_MA12

DDR_B_BS#0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA3

DDR_B_ODT1 DDR_CS1_DIMMB# DDR_B_CAS# DDR_B_WE#

DDR_B_ODT0 DDR_B_MA13 DDR_CS3_DIMMB# DDR_B_RAS#

DDR_B_MA14 DDR_B_MA15 DDR_CKE1_DIMMB

2

RP32

18 27 36

47_0804_8P4R_5%

45

RP33

18 27 36 45

RP34

18 27 36 45

RP35

18 27 36 45

RP36

18 27 36 45

RP37

18 27 36 45

RP38

18 27 36 45

RP39

18 27 36 45

Title

Size Document Number Rev

Custom

401728

Date: Sheet of

12

C1005 0.1U_0402_16V4Z

1 2

C1004 0.1U_0402_16V4Z

12

C1009 0.1U_0402_16V4Z

1 2

C1008 0.1U_0402_16V4Z

12

C1011 0.1U_0402_16V4Z

1 2

C1010 0.1U_0402_16V4Z

12

C1013 0.1U_0402_16V4Z

1 2

C1012 0.1U_0402_16V4Z

12

C1014 0.1U_0402_16V4Z

1 2

C1015 0.1U_0402_16V4Z

12

C1016 0.1U_0402_16V4Z

1 2

C1017 0.1U_0402_16V4Z

12

C1018 0.1U_0402_16V4Z

1 2

C1019 0.1U_0402_16V4Z

12

C1020 0.1U_0402_16V4Z

1 2

C1021 0.1U_0402_16V4Z

Compal Electronics, Inc.

SCHEMATICS,MB A5401

+1.8V

949Monday, May 04, 2009

1

949Monday, May 04, 2009

+1.8V

JDIMM2

1

VREF

3

DDR_B_D0 DDR_B_D1

D D

C C

DDR_CKE0_DIMMB<5> DDR_CS2_DIMMB#<5>

DDR_B_BS#2<5>

DDR_B_BS#0<5> DDR_B_WE#<5>

DDR_B_CAS#<5> DDR_CS1_DIMMB#<5>

DDR_B_ODT1<5>

B B

SB_CK_SDAT<8,20,25,31>

A A

SB_CK_SCLK<8,20,25,31>

DDR_B_DQS#0 DDR_B_DQS0

DDR_B_D2 DDR_B_D3

DDR_B_D8 DDR_B_D9

DDR_B_DQS#1 DDR_B_DQS1

DDR_B_D10 DDR_B_D11

DDR_B_D16 DDR_B_D17

DDR_B_DQS#2 DDR_B_DQS2

DDR_B_D18 DDR_B_D22 DDR_B_D19

DDR_B_D24 DDR_B_D25

DDR_B_DM3

DDR_B_D26 DDR_B_D27

DDR_CKE0_DIMMB DDR_CS2_DIMMB#

DDR_B_BS#2 DDR_B_MA12

DDR_B_MA9

DDR_B_MA5 DDR_B_MA3 DDR_B_MA1

DDR_B_MA10 DDR_B_BS#0 DDR_B_WE#

DDR_B_CAS# DDR_CS1_DIMMB#

DDR_B_ODT1 DDR_B_D32

DDR_B_D33 DDR_B_DQS#4

DDR_B_DQS4 DDR_B_D34

DDR_B_D35 DDR_B_D40

DDR_B_D41 DDR_B_DM5 DDR_B_D42

DDR_B_D43 DDR_B_D47 DDR_B_D48

DDR_B_D49 DDR_B_D53

DDR_B_DQS#6 DDR_B_DQS6

DDR_B_D50 DDR_B_D51 DDR_B_D55

DDR_B_D56 DDR_B_D57

DDR_B_DM7 DDR_B_D58

DDR_B_D59 SB_CK_SDAT

SB_CK_SCLK

+3VS

1

C1022

0.1U_0402_16V4Z

2

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

P-TWO_A5652C-A0G16

CONN@

VSS DQ4 DQ5 VSS DM0 VSS DQ6 DQ7

VSS DQ12 DQ13

VSS

DM1

VSS

CK0

CK0#

VSS DQ14 DQ15

VSS

VSS DQ20 DQ21

VSS

NC DM2 VSS

DQ22 DQ23

VSS

DQ28 DQ29

VSS

DQS3#

DQS3

VSS

DQ30 DQ31

VSS

NC/CKE1

VDD

NC/A15 NC/A14

VDD

A11

A7 A6

VDD

A4 A2

A0 VDD BA1

RAS#

S0#

VDD

ODT0

NC/A13

VDD

NC

VSS

DQ36 DQ37

VSS DM4 VSS

DQ38 DQ39

VSS

DQ44 DQ45

VSS

DQS5#

DQS5

VSS

DQ46 DQ47

VSS

DQ52 DQ53

VSS CK1

CK1#

VSS DM6 VSS

DQ54 DQ55

VSS

DQ60 DQ61

VSS

DQS7#

DQS7

VSS

DQ62 DQ63

VSS SAO SA1

KAV10 used

DIMM2 H:5.2mm (BOT)

5

4

+1.8V

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196

R836 10K_0402_5%R836 10K_0402_5%

198

R837 10K_0402_5%R837 10K_0402_5%

200

DDR_B_D4 DDR_B_D5

DDR_B_DM0 DDR_B_D6

DDR_B_D7 DDR_B_D12

DDR_B_D13 DDR_B_DM1 DDR_B_CLK1

DDR_B_CLK#1 DDR_B_D14

DDR_B_D15

DDR_B_D20 DDR_B_D21

DDR_B_DM2

DDR_B_D23 DDR_B_D28

DDR_B_D29 DDR_B_DQS#3

DDR_B_DQS3 DDR_B_D30

DDR_B_D31 DDR_CKE1_DIMMB DDR_B_MA15

DDR_B_MA14 DDR_B_MA11

DDR_B_MA7 DDR_B_MA6DDR_B_MA8

DDR_B_MA4 DDR_B_MA2 DDR_B_MA0

DDR_B_BS#1 DDR_B_RAS# DDR_CS0_DIMMB#

DDR_B_ODT0 DDR_B_MA13

DDR_CS3_DIMMB# DDR_B_D36

DDR_B_D37 DDR_B_DM4 DDR_B_D38

DDR_B_D39 DDR_B_D44

DDR_B_D45 DDR_B_DQS#5

DDR_B_DQS5 DDR_B_D46

DDR_B_D52

DDR_B_CLK2 DDR_B_CLK#2

DDR_B_DM6 DDR_B_D54

DDR_B_D60 DDR_B_D61

DDR_B_DQS#7 DDR_B_DQS7

DDR_B_D62 DDR_B_D63

1 2 1 2

DDR_B_CLK1 <5> DDR_B_CLK#1 <5>

DDR_CKE1_DIMMB <5>

DDR_B_BS#1 <5> DDR_B_RAS# <5> DDR_CS0_DIMMB# <5>

DDR_B_ODT0 <5>

DDR_CS3_DIMMB# <5>

DDR_B_CLK2 <5> DDR_B_CLK#2 <5>

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

C

D

E

PCIE_GTX_C_MRX_P[0..15]<14> PCIE_GTX_C_MRX_N[0..15]<14>

1 1

PCIE_PTX_C_IRX_P0<31> PCIE_PTX_C_IRX_N0<31>

2 2

PCIE_PTX_C_IRX_P1<31> PCIE_PTX_C_IRX_N1<31> PCIE_PTX_C_IRX_P2<31> PCIE_PTX_C_IRX_N2<31>

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15]

PCIE_GTX_C_MRX_P0 PCIE_GTX_C_MRX_N0 PCIE_GTX_C_MRX_P1 PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P2 PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P3 PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P4 PCIE_GTX_C_MRX_N4 PCIE_GTX_C_MRX_P5 PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P6 PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P7 PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P8 PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P9 PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P10 PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P11 PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P12 PCIE_GTX_C_MRX_N12 PCIE_GTX_C_MRX_P13 PCIE_GTX_C_MRX_N13 PCIE_GTX_C_MRX_P14 PCIE_GTX_C_MRX_N14 PCIE_GTX_C_MRX_P15 PCIE_GTX_C_MRX_N15

SB_RX0P<24> SB_RX0N<24> SB_RX1P<24> SB_RX1N<24> SB_RX2P<24> SB_RX2N<24> SB_RX3P<24> SB_RX3N<24>

U3B

D4

GFX_RX0P

C4

GFX_RX0N

A3

GFX_RX1P

B3

GFX_RX1N

C2

GFX_RX2P

C1

GFX_RX2N

E5

GFX_RX3P

F5

GFX_RX3N

G5

GFX_RX4P

G6

GFX_RX4N

H5

GFX_RX5P

H6

GFX_RX5N

J6

GFX_RX6P

J5

GFX_RX6N

J7

GFX_RX7P

J8

GFX_RX7N

L5

GFX_RX8P

L6

GFX_RX8N

M8

GFX_RX9P

L8

GFX_RX9N

P7

GFX_RX10P

M7

GFX_RX10N

P5

GFX_RX11P

M5

GFX_RX11N

R8

GFX_RX12P

P8

GFX_RX12N

R6

GFX_RX13P

R5

GFX_RX13N

P4

GFX_RX14P

P3

GFX_RX14N

T4

GFX_RX15P

T3

GFX_RX15N

AE3

GPP_RX0P

AD4

GPP_RX0N

AE2

GPP_RX1P

AD3

GPP_RX1N

AD1

GPP_RX2P

AD2

GPP_RX2N

V5

GPP_RX3P

W6

GPP_RX3N

U5

GPP_RX4P

U6

GPP_RX4N

U8

GPP_RX5P

U7

GPP_RX5N

AA8

SB_RX0P

Y8

SB_RX0N

AA7

SB_RX1P

Y7

SB_RX1N

AA5

SB_RX2P

AA6

SB_RX2N

W5

SB_RX3P

Y5

SB_RX3N

RS780M_FCBGA528

PART 2 OF 6

GFX_TX10P

GFX_TX10N

GFX_TX11P

GFX_TX11N

GFX_TX12P

GFX_TX12N

GFX_TX13P

GFX_TX13N

GFX_TX14P

GFX_TX14N

GFX_TX15P

GFX_TX15N

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

PCE_CALRP(PCE_BCALRP) PCE_CALRN(PCE_BCALRN)

GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N

GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N

SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N

PCIE_MTX_GRX_P0 PCIE_MTX_C_GRX_P0

A5 B5

PCIE_MTX_GRX_P1

A4

PCIE_MTX_GRX_N1 PCIE_MTX_C_GRX_N1

B4

PCIE_MTX_GRX_P2

C3

PCIE_MTX_GRX_N2

B2

PCIE_MTX_GRX_P3

D1

PCIE_MTX_GRX_N3

D2

PCIE_MTX_GRX_P4

E2

PCIE_MTX_GRX_N4

E1

PCIE_MTX_GRX_P5

F4

PCIE_MTX_GRX_N5 PCIE_MTX_C_GRX_N5

F3

PCIE_MTX_GRX_P6

F1

PCIE_MTX_GRX_N6

F2

PCIE_MTX_GRX_P7

H4

PCIE_MTX_GRX_N7 PCIE_MTX_C_GRX_N7

H3

PCIE_MTX_GRX_P8

H1

PCIE_MTX_GRX_N8 PCIE_MTX_C_GRX_N8

H2

PCIE_MTX_GRX_P9

J2

PCIE_MTX_GRX_N9

J1

PCIE_MTX_GRX_P10 PCIE_MTX_C_GRX_P10

K4

PCIE_MTX_GRX_N10

K3

PCIE_MTX_GRX_P11

K1

PCIE_MTX_GRX_N11

K2

PCIE_MTX_GRX_P12

M4

PCIE_MTX_GRX_N12

M3

PCIE_MTX_GRX_P13

M1

PCIE_MTX_GRX_N13 PCIE_MTX_C_GRX_N13

M2

PCIE_MTX_GRX_P14

N2

PCIE_MTX_GRX_N14

N1

PCIE_MTX_GRX_P15

P1

PCIE_MTX_GRX_N15 PCIE_MTX_C_GRX_N15

P2

PCIE_ITX_PRX_P0

AC1

PCIE_ITX_PRX_N0

AC2

PCIE_ITX_PRX_P1

AB4

PCIE_ITX_PRX_N1

AB3

PCIE_ITX_PRX_P2

AA2

PCIE_ITX_PRX_N2

AA1 Y1 Y2 Y4 Y3 V1 V2

SB_TX0P_C

AD7

SB_TX0N_C

AE7

SB_TX1P_C

AE6

SB_TX1N_C

AD6

SB_TX2P_C

AB6

SB_TX2N_C

AC6

SB_TX3P_C

AD5

SB_TX3N_C

AE5 AC8

AB8

R32 1.27K_0402_1%R32 1.27K_0402_1% R267 2K_0402_1%R267 2K_0402_1%

RS780M Display Port Support (muxed on GFX)

DP0

3 3

4 4

DP1

GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0

GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1

PCIE_MTX_C_GRX_P[0..15]

PCIE_MTX_C_GRX_N[0..15]

C646 0.1U_0402_16V7K@C646 0.1U_0402_16V7K@

1 2

C648 0.1U_0402_16V7K@C648 0.1U_0402_16V7K@

1 2

C650 0.1U_0402_16V7K@C650 0.1U_0402_16V7K@

1 2

C652 0.1U_0402_16V7K@C652 0.1U_0402_16V7K@

1 2

C655 0.1U_0402_16V7K@C655 0.1U_0402_16V7K@

1 2

C657 0.1U_0402_16V7K@C657 0.1U_0402_16V7K@

1 2

C659 0.1U_0402_16V7K@C659 0.1U_0402_16V7K@

1 2

C641 0.1U_0402_16V7K@C641 0.1U_0402_16V7K@

1 2

C636 0.1U_0402_16V7KVGA@C636 0.1U_0402_16V7KVGA@

1 2

C635 0.1U_0402_16V7KVGA@C635 0.1U_0402_16V7KVGA@

1 2

C632 0.1U_0402_16V7KVGA@C632 0.1U_0402_16V7KVGA@

1 2

C630 0.1U_0402_16V7KVGA@C630 0.1U_0402_16V7KVGA@

1 2

C627 0.1U_0402_16V7KVGA@C627 0.1U_0402_16V7KVGA@

1 2

C623 0.1U_0402_16V7KVGA@C623 0.1U_0402_16V7KVGA@

1 2

C624 0.1U_0402_16V7KVGA@C624 0.1U_0402_16V7KVGA@

1 2

C619 0.1U_0402_16V7KVGA@C619 0.1U_0402_16V7KVGA@

1 2

C617 0.1U_0402_16V7KC617 0.1U_0402_16V7K

1 2

C618 0.1U_0402_16V7KC618 0.1U_0402_16V7K

1 2

C614 0.1U_0402_16V7KC614 0.1U_0402_16V7K

1 2

C613 0.1U_0402_16V7KC613 0.1U_0402_16V7K

1 2

C46 0.1U_0402_16V7K@C46 0.1U_0402_16V7K@

1 2

C42 0.1U_0402_16V7K@C42 0.1U_0402_16V7K@

1 2

C615 0.1U_0402_16V7KC615 0.1U_0402_16V7K

1 2

C609 0.1U_0402_16V7KC609 0.1U_0402_16V7K

1 2

C38 0.1U_0402_16V7KC38 0.1U_0402_16V7K

1 2

C33 0.1U_0402_16V7KC33 0.1U_0402_16V7K

1 2

C37 0.1U_0402_16V7KC37 0.1U_0402_16V7K

1 2

C32 0.1U_0402_16V7KC32 0.1U_0402_16V7K

1 2

C610 0.1U_0402_16V7KC610 0.1U_0402_16V7K

1 2

C616 0.1U_0402_16V7KC616 0.1U_0402_16V7K

1 2

1 2 1 2

C647 0.1U_0402_16V7K@C647 0.1U_0402_16V7K@ C649 0.1U_0402_16V7K@C649 0.1U_0402_16V7K@ C651 0.1U_0402_16V7K@C651 0.1U_0402_16V7K@ C653 0.1U_0402_16V7K@C653 0.1U_0402_16V7K@ C654 0.1U_0402_16V7K@C654 0.1U_0402_16V7K@ C656 0.1U_0402_16V7K@C656 0.1U_0402_16V7K@ C658 0.1U_0402_16V7K@C658 0.1U_0402_16V7K@ C642 0.1U_0402_16V7K@C642 0.1U_0402_16V7K@ C638 0.1U_0402_16V7KVGA@C638 0.1U_0402_16V7KVGA@ C637 0.1U_0402_16V7KVGA@C637 0.1U_0402_16V7KVGA@ C634 0.1U_0402_16V7KVGA@C634 0.1U_0402_16V7KVGA@ C631 0.1U_0402_16V7KVGA@C631 0.1U_0402_16V7KVGA@ C629 0.1U_0402_16V7KVGA@C629 0.1U_0402_16V7KVGA@ C625 0.1U_0402_16V7KVGA@C625 0.1U_0402_16V7KVGA@ C620 0.1U_0402_16V7KVGA@C620 0.1U_0402_16V7KVGA@ C621 0.1U_0402_16V7KVGA@C621 0.1U_0402_16V7KVGA@

+1.1VS

PCIE_MTX_C_GRX_P[0..15] <14> PCIE_MTX_C_GRX_N[0..15] <14>

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

PCIE_ITX_C_PRX_P0 <31> PCIE_ITX_C_PRX_N0 <31> PCIE_ITX_C_PRX_P1 <31> PCIE_ITX_C_PRX_N1 <31> PCIE_ITX_C_PRX_P2 <31> PCIE_ITX_C_PRX_N2 <31>

SB_TX0P <24> SB_TX0N <24> SB_TX1P <24> SB_TX1N <24> SB_TX2P <24> SB_TX2N <24> SB_TX3P <24> SB_TX3N <24>

PCIE_MTX_C_GRX_N0PCIE_MTX_GRX_N0 PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_P2 PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P3 PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P4 PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_P6 PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_P8 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_N10

PCIE_MTX_C_GRX_P11 PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P12 PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_P14 PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P15

WLAN GLAN

( Remove 3G Function )

WWAN

H_CLKOP0<4> H_CLKON0<4> H_CLKOP1<4> H_CLKON1<4>

H_CTLOP0<4> H_CTLON0<4> H_CTLOP1<4> H_CTLON1<4>

R56

1 2

301_0402_1%~D

0718 Place within 1" layout 1:2

301_0402_1%~D

PCIE_MTX_GRX_N[0..3]

PCIE_MTX_GRX_P[0..3]

For M92 S2-LP disable PCIE GFX 0~7

H_CADOP[0..15]<4> H_CADON[0..15]<4> H_CADIN[0..15] <4>

H_CADOP0 H_CADON0 H_CADOP1 H_CADON1 H_CADOP2 H_CADON2 H_CADOP3 H_CADON3 H_CADOP4 H_CADON4 H_CADOP5 H_CADON5 H_CADOP6 H_CADON6 H_CADOP7 H_CADON7

H_CADOP8 H_CADON8 H_CADOP9

H_CADON9 H_CADOP10 H_CADON10 H_CADOP11 H_CADON11 H_CADOP12 H_CADON12 H_CADOP13 H_CADON13 H_CADOP14 H_CADON14 H_CADOP15 H_CADON15

H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLIP1 H_CTLON1

H_CADON[0..15]

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25 AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22 M23

R21

R20

C23

A24

PCIE_MTX_GRX_N[0..3] <22> PCIE_MTX_GRX_P[0..3] <22>

U3A

HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N

HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N

HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N

HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N

HT_RXCALP HT_RXCALN

RS780M_FCBGA528

H_CADIP[0..15]H_CADOP[0..15] H_CADIN[0..15]

PART 1 OF 6

HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N

HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P

HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N

HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N

HYPER TRANSPORT CPU I/F

HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N

HT_TXCALP HT_TXCALN

H_CADIP[0..15] <4>

H_CADIP0

D24

H_CADIN0

D25

H_CADIP1

E24

H_CADIN1

E25

H_CADIP2

F24

H_CADIN2

F25

H_CADIP3

F23

H_CADIN3

F22

H_CADIP4

H23

H_CADIN4

H22

H_CADIP5

J25

H_CADIN5

J24

H_CADIP6

K24

H_CADIN6

K25

H_CADIP7

K23

H_CADIN7

K22

H_CADIP8

F21

H_CADIN8

G21

H_CADIP9

G20

H_CADIN9

H21

H_CADIP10

J20

H_CADIN10

J21

H_CADIP11

J18

H_CADIN11

K17

H_CADIP12

L19

H_CADIN12

J19

H_CADIP13

M19

H_CADIN13

L18

H_CADIP14

M21

H_CADIN14

P21

H_CADIP15

P18

H_CADIN15

M18 H24

H25 L21 L20

H_CTLIP0

M24

H_CTLIN0

M25 P19

H_CTLIN1

R18 B24

B25

0718 Place within 1" layout 1:2

301_0402_1%~D

SA00002DR30 S IC 216-0674026 A13 RS780MN FCBGA 0FA

H_CLKIP0 <4> H_CLKIN0 <4> H_CLKIP1 <4> H_CLKIN1 <4>

H_CTLIP0 <4>

H_CTLIN0 <4>

H_CTLIP1 <4>

H_CTLIN1 <4>

R51

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

10 49Monday, May 04, 2009

E

A

of

A

hexainf@hotmail.com

For RS780M A13 RED: Connected to GND through two separate 140ohm 1% resistor

UMA@

1 2

R45 140_0402_1%

UMA@

1 2

R49 150_0402_1%

UMA@

1 2

R50 150_0402_1%

1 1

+1.1VS

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

+1.8VS

1 2

MBK2012221YZF 0805

2 2

3 3

4 4

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

+1.8VS

1 2

MBK2012221YZF 0805

2.2U_0603_6.3V4Z

CLK_NB_14.318M

12

R477

R477 100_0402_5%

100_0402_5%

@

1

C854

C854 100P_0402_25V8K

100P_0402_25V8K

2

@

+3VS

R295 4.7K_0402_5%R295 4.7K_0402_5% R289 4.7K_0402_5%R289 4.7K_0402_5%

PLLVDD=65mA

L59

L13

L9

L14

ALLOW_LDTSTOP<24>

+NB_PLLVDD

1

C645

C93

1 2 1 2

1

2

PLLVDD18=20mA

+NB_HTPVDD+1.8VS

1

2

VDDA18HTPLL=20mA

+VDDA18HTPLL

1

C66

2

VDDA18PCIEPLL=0.12A

+VDDA18PCIEPLL

1

C87

2

+1.1VS

A

C663

C663 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C84

C84 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C72

C72 1U_0402_6.3V4Z

1U_0402_6.3V4Z

C86

C86 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1 2

R293

4.7K_0402_5%

GMCH_LCD_CLK GMCH_LCD_DATA

Un-stuff for Tigris

R50 150_0402_1%

FBM-L11-201209-300LMA30T_0805

NB_PWRGD<25>

1 2

R290

4.7K_0402_5%

+1.8VS

2.2U_0603_6.3V4Z

PLT_RST#<13,14,24,31,33>

+1.8VS

R283 300_0402_5%R283 300_0402_5%

R60

R60 300_0402_5%

300_0402_5%

1 2

R59 0_0402_5%R59 0_0402_5%

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

+1.8VS

1 2

B

+3VS

1 2

FBM-L11-201209-300LMA30T_0805

AVDDDI=20mA

L10

1 2

FBM-L11-201209-300LMA30T_0805

AVDDQ=4mA

L8

C61

12

POWER_SEL<43>

0.1U_0402_16V4Z

+AVDDQ

1

2

GMCH_CRT_HSYNC<13,23> GMCH_CRT_VSYNC<13,23>

GMCH_CRT_CLK<23> GMCH_CRT_DATA<23>

1 2

R296 0_0402_5%R296 0_0402_5%

CLK_NB_14.318M<20>

CLK_NBGFX<20> CLK_NBGFX#<20>

CLK_SBLINK_BCLK<20> CLK_SBLINK_BCLK#<20>

GMCH_LCD_CLK<21>

GMCH_LCD_DATA<21>

+3VS

C74

GMCH_CRT_R<23> GMCH_CRT_G<23> GMCH_CRT_B<23>

CLK_NBHT<20> CLK_NBHT#<20>

POWER_SEL

HIGH 1.0V

1.1VLOW

Change as 1K_5% ohm for Tigris

NB_ALLOW_LDTSTOP

B

AVDD=0.11A

L15

1

2

+NB_PLLVDD +NB_HTPVDD

+VDDA18HTPLL

+VDDA18PCIEPLL

R288 10K_0402_5%

POWER_SEL

+AVDD1

+AVDD2

GMCH_CRT_R GMCH_CRT_G GMCH_CRT_B

GMCH_CRT_HSYNC GMCH_CRT_VSYNC

R42 715_0402_1%R42 715_0402_1%

1 2

NB_LDTSTOP#

NB_ALLOW_LDTSTOP

CLK_NB_14.318M

GMCH_LCD_CLK GMCH_LCD_DATA

GMCH_HDMI_DATA_R2 GMCH_HDMI_CLK_R2 GMCH_HDMI_CLK_R1 GMCH_HDMI_DATA_R1

DVT

@

12

AUX_CAL<13>

Strap pin

DVT

1

2.2U_0603_6.3V4Z

2

GMCH_CRT_CLK GMCH_CRT_DATA

+NB_PLLVDD +NB_HTPVDD

NB_RESET#

GMCH_HDMI_CLK<22>

GMCH_HDMI_DATA<22>

C

C94

U3C

F12

AVDD1(NC)

E12

AVDD2(NC)

F14

AVDDDI(NC)

G15

AVSSDI(NC)

H15

AVDDQ(NC)

H14

AVSSQ(NC)

E17

C_Pr(DFT_GPIO5)

F17

Y(DFT_GPIO2)

F15

COMP_Pb(DFT_GPIO4)

G18

RED(DFT_GPIO0)

G17

REDb(NC)

E18

GREEN(DFT_GPIO1)

F18

GREENb(NC)

E19

BLUE(DFT_GPIO3)

F19

BLUEb(NC)

A11

DAC_HSYNC(PWM_GPIO4)

B11

DAC_VSYNC(PWM_GPIO6)

F8

DAC_SCL(PCE_RCALRN)

E8

DAC_SDA(PCE_TCALRN)

G14

DAC_RSET(PWM_GPIO1)

A12

PLLVDD(NC)

D14

PLLVDD18(NC)

B12

PLLVSS(NC)

H17

VDDA18HTPLL

D7

VDDA18PCIEPLL1

E7

VDDA18PCIEPLL2

D8

SYSRESETb

A10

POWERGOOD

C10

LDTSTOPb

C12

ALLOW_LDTSTOP

C25

HT_REFCLKP

C24

HT_REFCLKN

E11

REFCLK_P/OSCIN(OSCIN)

F11

REFCLK_N(PWM_GPIO3)

T2

GFX_REFCLKP

T1

GFX_REFCLKN

U1

GPP_REFCLKP

U2

GPP_REFCLKN

V4

GPPSB_REFCLKP(SB_REFCLKP)

V3

GPPSB_REFCLKN(SB_REFCLKN)

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DATA0/AUX0N(NC)

A8

DDC_CLK0/AUX0P(NC)

B7

DDC_CLK1/AUX1P(NC)

A7

DDC_DATA1/AUX1N(NC)

B10

STRP_DATA

G11

RSVD

C8

AUX_CAL(NC)

RS780M_FCBGA528

GMCH_HDMI_CLK GMCH_HDMI_DATA

LDT_STOP#<6,24>

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PART 3 OF 6

TXOUT_U1P(PCIE_RESET_GPIO3)

TXOUT_U1N(PCIE_RESET_GPIO2)

TXOUT_U3P(PCIE_RESET_GPIO5)

CRT/TVOUT

TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET_GPIO1)

LVTM

PM

CLOCKs PLL PWR

MIS.

R491 0_0402_5%@R491 0_0402_5%@

1 2

R488 0_0402_5%UMA@R488 0_0402_5%UMA@

1 2 1 2

R489 0_0402_5%UMA@R489 0_0402_5%UMA@

1 2

R492 0_0402_5%@R492 0_0402_5%@

0_0402_5%

1 2

R280

2008/10/06 2009/10/06

C

TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)

TXOUT_L2N(DBG_GPIO0)

TXOUT_L3P(NC)

TXOUT_L3N(DBG_GPIO2)

TXOUT_U0P(NC) TXOUT_U0N(NC)

TXOUT_U2P(NC) TXOUT_U2N(NC)

TXOUT_U3N(NC)

TXCLK_LP(DBG_GPIO1)

TXCLK_LN(DBG_GPIO3)

VDDLTP18(NC) VSSLTP18(NC)

VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)

VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)

LVDS_DIGON(PCE_TCALRP)

LVDS_BLON(PCE_RCALRP)

LVDS_ENA_BL(PWM_GPIO2)

TMDS_HPD(NC)

SUS_STAT#(PWM_GPIO5)

THERMALDIODE_P THERMALDIODE_N

GMCH_HDMI_CLK_R2

GMCH_HDMI_CLK_R1 GMCH_HDMI_DATA_R1

GMCH_HDMI_DATA_R2

NB_LDTSTOP#

Compal Secret Data

HPD(NC)

TESTMODE

Deciphered Date

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

1.27K_0402_1%

D9 D10

D12 AE8

AD8 D13

+VDDLTP18

+VDDLT18

12

R469

@

DVT

1 2

R297 0_0402_5%R297 0_0402_5%

1 2

R279

1.8K_0402_5%

D

GMCH_TXOUT0+ <21> GMCH_TXOUT0- <21> GMCH_TXOUT1+ <21> GMCH_TXOUT1- <21> GMCH_TXOUT2+ <21> GMCH_TXOUT2- <21>

GMCH_TZOUT0+ <21> GMCH_TZOUT0- <21> GMCH_TZOUT1+ <21> GMCH_TZOUT1- <21> GMCH_TZOUT2+ <21> GMCH_TZOUT2- <21>

GMCH_TXCLK+ <21> GMCH_TXCLK- <21> GMCH_TZCLK+ <21> GMCH_TZCLK- <21>

UMA@

R294

1 2

1.27K_0402_1%

D

UMA_ENVDD UMA_ENBKL UMA_DPST

UMA@

R29

1 2

1.27K_0402_1%

HDMI_DET <15,22>

SUS_STAT# <25> SUS_STAT_R# <13>

UMA_ENVDD

NB_PWRGD

UMA_ENBKL

E

VDDLTP18=15mA

+VDDLTP18

1U_0402_6.3V4Z

VDDLT18=0.3A

+VDDLT18

C90

0.1U_0402_16V4Z

UMA_ENBKL <21>

C665

1

2

1

2

L56

1 2

MBC1608121YZF_0603

MBC1608121YZF_0603 C644

C644

2.2U_0603_6.3V4Z

L12

1 2

MBC1608121YZF_0603

C95

4.7U_0805_10V4Z

+1.8VS

AMD Vari bright function

UMA_DPST ENBKL

1 2

R758 0_0402_5%@R758 0_0402_5%@

Strap pin

R744 0_0402_5%R744 0_0402_5%

1 2

+3VS

C857 0.1U_0402_16V4ZC857 0.1U_0402_16V4Z

5

2

P

B

4

Y

1

A

G

U48

U48 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

@

5

2

P

B

4

Y

1

A

G

U49

U49 NC7SZ08P5X_NL_SC70-5

NC7SZ08P5X_NL_SC70-5

3

UMA@

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

E

UMA_ENVDD_R <21>

ENBKL <33>

11 49Monday, May 04, 2009

A

VDDHTRX+VDDHT=0.68A

0.1U_0402_16V4Z

L49

+1.1VS

FBMA-L11-201209-221LMA30T_0805

1 1

FBMA-L11-201209-221LMA30T_0805

L4

+1.2V_HT

FBMA-L11-201209-221LMA30T_0805

FOR Version A11 pop 1.35VS A12 use 1.2V_HT

2 2

L4

+1.8VS

FBMA-L11-201209-221LMA30T_0805

L49

L11

12

VDDA18PCIE=0.7A

L5

12

C45

10U_0805_10V4Z

0.1U_0402_16V4Z

12

1

C612

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

12

1

C82

C83

2

4.7U_0805_10V4Z

VDDHTTX=0.68A

0.1U_0402_16V4Z

1

C31

2

4.7U_0805_10V4Z

0.1U_0402_16V4Z

1

C47

2

4.7U_0805_10V4Z

+1.8VS

1U_0402_6.3V4Z

C75

1

2

C49

C40

C89

1

C71

2

0.1U_0402_16V4Z

1U_0402_6.3V4Z

1

C85

C91

2

0.1U_0402_16V4Z

1

C50

2

0.1U_0402_16V4Z

1

C51

2

0.1U_0402_16V4Z

+1.8VS

VDD18_MEM=25mA

1

2

1U_0402_6.3V4Z

1

C62

2

1

2

1

C54

C52

2

1U_0402_6.3V4Z

1

C48

C73

2

0.1U_0402_16V4Z

VDD18=10mA

1 2

R224 0_0402_5%SP@R224 0_0402_5%SP@

+VDDHT

+VDDHTRX

+VDDHTTX

1

2

+VDDA18PCIE

1

2

0_0402_5%

+1.8V_VDD_SP

12

R223

VGA@

B

1

2

U3E

J17

VDDHT_1

K16

VDDHT_2

L16

VDDHT_3

M16

VDDHT_4

P16

VDDHT_5

R16

VDDHT_6

T16

VDDHT_7

H18

VDDHTRX_1

G19

VDDHTRX_2

F20

VDDHTRX_3

E21

VDDHTRX_4

D22

VDDHTRX_5

B23

VDDHTRX_6

A23

VDDHTRX_7

AE25

VDDHTTX_1

AD24

VDDHTTX_2

AC23

VDDHTTX_3

AB22

VDDHTTX_4

AA21

VDDHTTX_5

Y20

VDDHTTX_6

W19

VDDHTTX_7

V18

VDDHTTX_8

U17

VDDHTTX_9

T17

VDDHTTX_10

R17

VDDHTTX_11

P17

VDDHTTX_12

M17

VDDHTTX_13

J10

VDDA18PCIE_1

P10

VDDA18PCIE_2

K10

VDDA18PCIE_3

M10

VDDA18PCIE_4

L10

VDDA18PCIE_5

W9

VDDA18PCIE_6

H9

VDDA18PCIE_7

T10

VDDA18PCIE_8

R10

VDDA18PCIE_9

Y9

VDDA18PCIE_10

AA9

VDDA18PCIE_11

AB9

VDDA18PCIE_12

AD9

VDDA18PCIE_13

AE9

VDDA18PCIE_14

U10

VDDA18PCIE_15

F9

VDD18_1

G9

VDD18_2

AE11

VDD18_MEM1(NC)

AD11

VDD18_MEM2(NC)

C92

RS780M_FCBGA528

SP@

1U_0402_6.3V4Z

PART 5/6

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12

POWER

VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)

VDD33_1(NC) VDD33_2(NC)

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

C

VDDPCIE=1.1A

+VDDA11PCIE

DVT

C350.1U_0402_16V4Z C350.1U_0402_16V4Z

1

2

VDD_MEM=70mA

R407 0_0603_5%SP@R407 0_0603_5%SP@

R406 0_0603_5%VGA@R406 0_0603_5%VGA@

VDD33=60mA

C80

0.1U_0402_16V4Z

L3

1 2

FBMA-L11-201209-221LMA30T_0805

C30 10U_0603_6.3V6MC30 10U_0603_6.3V6M

1 2

C28 10U_0603_6.3V6MC28 10U_0603_6.3V6M

1 2

C29 4.7U_0805_10V4ZC29 4.7U_0805_10V4Z

1 2

C53 1U_0402_6.3V4ZC53 1U_0402_6.3V4Z

1 2

C79 1U_0402_6.3V4ZC79 1U_0402_6.3V4Z

1 2 1 2

C88 0.1U_0402_16V4ZC88 0.1U_0402_16V4Z

1 2

C57 0.1U_0402_16V4ZC57 0.1U_0402_16V4Z

VDDC=7.6A

1 2

L6 0_1206_5%@L6 0_1206_5%@

1 2

L7 0_1206_5%@L7 0_1206_5%@

C340.1U_0402_16V4Z C340.1U_0402_16V4Z

C430.1U_0402_16V4Z C430.1U_0402_16V4Z

C760.1U_0402_16V4Z C760.1U_0402_16V4Z

C690.1U_0402_16V4Z C690.1U_0402_16V4Z

1

2

C78

C640.1U_0402_16V4Z C640.1U_0402_16V4Z

1

2

+1.8VS

1

0.1U_0402_16V4Z

2

1

2

C249 4.7U_0805_10V4ZSP@C249 4.7U_0805_10V4ZSP@ C248 0.1U_0402_16V4ZSP@C248 0.1U_0402_16V4ZSP@ C597 0.1U_0402_16V4ZSP@C597 0.1U_0402_16V4ZSP@ C598 0.1U_0402_16V4ZSP@C598 0.1U_0402_16V4ZSP@ C599 0.1U_0402_16V4ZSP@C599 0.1U_0402_16V4ZSP@

C600.1U_0402_16V4Z C600.1U_0402_16V4Z

1

2

12 12

1

2

D

U3F

A25

VSSAHT1

D23

VSSAHT2

+1.1VS

+NB_CORE+1.1VS

C27 330U_D2E_2.5VM_R9MUMA@+C27 330U_D2E_2.5VM_R9MUMA@

C810.1U_0402_16V4Z C810.1U_0402_16V4Z

C680.1U_0402_16V4Z C680.1U_0402_16V4Z

1

2

+3VS

1

C3610U_0603_6.3V6M C3610U_0603_6.3V6M

C4410U_0603_6.3V6M C4410U_0603_6.3V6M

1

+

2

12 12 12 12 12

E22

VSSAHT3

G22

VSSAHT4

G24

VSSAHT5

G25

VSSAHT6

H19

VSSAHT7

J22

VSSAHT8

L17

VSSAHT9

L22

VSSAHT10

L24

VSSAHT11

L25

VSSAHT12

M20

VSSAHT13

N22

VSSAHT14

P20

VSSAHT15

R19

VSSAHT16

R22

VSSAHT17

R24

VSSAHT18

R25

VSSAHT19

H20

VSSAHT20

U22

VSSAHT21

V19

VSSAHT22

W22

VSSAHT23

W24

VSSAHT24

W25

VSSAHT25

Y21

VSSAHT26

AD25

VSSAHT27

L12

VSS11

M14

VSS12

N13

VSS13

P12

VSS14

P15

VSS15

R11

VSS16

R14

VSS17

T12

VSS18

U14

VSS19

U11

VSS20

U15

VSS21

V12

VSS22

W11

VSS23

W15

VSS24

AC12

VSS25

AA14

VSS26

Y18

VSS27

AB11

VSS28

AB15

VSS29

AB17

VSS30

AB19

VSS31

AE20

VSS32

AB21

VSS33

K11

VSS34

RS780M_FCBGA528

PART 6/6

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

E

3 3

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

12 49Monday, May 04, 2009

E

A

of

A

hexainf@hotmail.com

B

C

D

E

DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb

Enables the Test Debug Bus using GPIO. (VSYNC) 1 : Disable (RS780) 0 : Enable (Rs780)

U61

R117

R120

1 2

L2 L3

R2

P7

M2

P3 P8

P2 N7 N3 N8 N2 M7 M3 M8

K8

J8

K2

L8

K3

K7

L7

F3

B3

K9

F7

E8

B7

A8

J2

A2

E2

L1 R3 R7 R8

SP@

1K_0402_1%

SP@

1K_0402_1%

U61

BA0 BA1

A12 A11 A10/AP A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

CK CK

CKE

CS WE RAS CAS LDM

UDM

ODT

LDQS LDQS

UDQS UDQS

VREF NC

NC NC NC NC NC

HY5PS561621AFP-25_FBGA84

@

C628

DQ15 DQ14 DQ13 DQ12 DQ11 DQ10

DQ9 DQ8 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VDD VDD VDD VDD VDD

VDDL

VSSDL

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

1

SP@

VSS VSS VSS VSS VSS

C626

1U_0402_6.3V4Z

1 1

MEM_CLKN

R135

SP@

100_0402_1%

MEM_CLKP

2 2

MEM_BA0 MEM_BA1

MEM_A12 MEM_A11 MEM_A10 MEM_A9 MEM_A8 MEM_A7 MEM_A6 MEM_A5 MEM_A4 MEM_A3 MEM_A2 MEM_A1 MEM_A0

12

MEM_CKE

MEM_CS# MEM_WE# MEM_RAS# MEM_CAS# MEM_DM0

MEM_DM1

MEM_ODT

MEM_DQS_P0 MEM_DQS_N0

MEM_DQS_P1 MEM_DQS_N1

+MEM_VREF

MEM_BA2

Support 8M x 16bit x 8 bank side port

03/16 SA000031O00 S IC D2 64M16/500 K4N1G164QE-HC20 FBGA84 03/16 SA00002UH00 S IC D2 64M16/500 H5PS1G63EFR-20L FBGA84

3 3

+1.8V_MEM_VDDQ+1.8V_MEM_VDDQ

C197

C200

1

2

SP@

0.1U_0402_16V4Z

1

2

SP@

0.1U_0402_16V4Z

1

C195

SP@

2

0.1U_0402_16V4Z

1 2

SP@ C195

SP@

R118 1K_0402_1%

+MEM_VREF +MEM_VREF1

1

C207

4 4

SP@ C207

SP@

2

SP@

0.1U_0402_16V4Z

1 2

R119 1K_0402_1%

B9 B1 D9 D1 D3 D7 C2 C8 F9 F1 H9 H1 H3 H7 G2 G8

A9 C1 C3 C7 C9 E9 G1 G3 G7 G9

A1 E1 J9 M9 R1

J1 J7

A7 B2 B8 D2 D8 E7 F2 F8 H2 H8

A3 E3 J3 N1 P9

2

1

SP@

C201

1U_0402_6.3V4Z

MEM_DQ12 MEM_DQ13 MEM_DQ9 MEM_DQ14 MEM_DQ15 MEM_DQ8 MEM_DQ10 MEM_DQ11 MEM_DQ5 MEM_DQ2 MEM_DQ6 MEM_DQ1 MEM_DQ0 MEM_DQ4 MEM_DQ3 MEM_DQ7

+1.8V_MEM_VDDQ

1

2

220 ohm @ 100MHz,2A

1

C208

C206

2

0.1U_0402_16V4Z

SP@

L23

SP@ L23

SP@

FBMA-L11-160808-221LMT 0603

C184

Layout Note: 50 mil for VSSDL

SP@ C184

SP@

1U_0402_6.3V4Z

+1.8VS+1.8V_MEM_VDDQ

1 2

L16 0_0805_5%SP@L16 0_0805_5%SP@

1

2

SP@

22U_0805_6.3V6M

+1.8V_MEM_VDDQ

12

+1.8V_MEM_VDDQ

R140 40.2_0402_1%SP@R140 40.2_0402_1%SP@ R136 40.2_0402_1%SP@R136 40.2_0402_1%SP@

12 12

MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11

MEM_BA0 MEM_BA1 MEM_BA2

MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CLKP MEM_CLKN

MEM_COMP_P MEM_COMP_N

GMCH_CRT_VSYNC<11,23>

DFT_GPIO1: LOAD_EEPROM_STRAPS

Selects Loading of STRAPS from EPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values 0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected RS740/RX780: DFT_GPIO1 RS780:SUS_STAT

AUX_CAL<11>

RS780 DFT_GPIO1

SUS_STAT_R#<11> PLT_RST# <11,14,24,31,33>

RS780 use HSYNC to enable SIDE PORT

RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)

0. Enable (RS780) 1 : Disable(RS780)

GMCH_CRT_HSYNC<11,23>

U3D

PAR 4 OF 6

MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)

MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)

MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)

MEM_CKP(NC) MEM_CKN(NC)

MEM_COMPP(NC) MEM_COMPN(NC)

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC(NC)

MEM_DQ1/DVO_HSYNC(NC)

MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)

MEM_DQ4(NC) MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC) MEM_DQ9/DVO_D5(NC)

MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)

MEM_DQ12(NC)

MEM_DQ13/DVO_D9(NC) MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)

MEM_DQS0P/DVO_IDCKP(NC) MEM_DQS0N/DVO_IDCKN(NC)

MEM_DQS1P(NC)

MEM_DQS1N(NC)

MEM_DM0(NC)

MEM_DM1/DVO_D8(NC)

SBD_MEM/DVO_I/F

IOPLLVDD18(NC)

IOPLLVDD(NC) IOPLLVSS(NC)

MEM_VREF(NC)

AB12 AE16

V11 AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14

Y14 AD16

AE17 AD17

W12

Y12 AD18 AB13 AB18

V14

V15

W14

AE12 AD12

RS780M_FCBGA528

+1.8VS=W/S=20/10mil For Memory PLL power +1.1VS=W/S=20/10mil For Memory PLL power

12

R286 3K_0402_5%R286 3K_0402_5%

12

R287 3K_0402_5%@R287 3K_0402_5%@

1 2

R284 150_0402_1%@R284 150_0402_1%@

D29

D29 CH751H-40_SC76@

CH751H-40_SC76@

2 1

12

R299 3K_0402_5%@R299 3K_0402_5%@

RS780 use HSYNC to enable SIDE PORT

12 12

L22

12

C185

SP@

2.2U_0603_6.3V4Z

15mA

+1.1VS

1

2

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23 AE18

MEM_DQ0 MEM_DQ1 MEM_DQ2 MEM_DQ3 MEM_DQ4 MEM_DQ5 MEM_DQ6 MEM_DQ7 MEM_DQ8 MEM_DQ9 MEM_DQ10 MEM_DQ11 MEM_DQ12MEM_A12 MEM_DQ13 MEM_DQ14 MEM_DQ15

MEM_DQS_P0 MEM_DQS_N0 MEM_DQS_P1 MEM_DQS_N1

MEM_DM0 MEM_DM1

26mA

+MEM_VREF1

R281 3K_0402_5%VGA@R281 3K_0402_5%VGA@ R282 3K_0402_5%SP@R282 3K_0402_5%SP@

FBMA-L11-160808-221LMT 0603

1

2

+3VS

+1.8VS

L21

12

FBMA-L11-160808-221LMT 0603

C183

SP@

2.2U_0603_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

13 49Monday, May 04, 2009

E

A

5

4

3

2

1

PCIE_GTX_C_MRX_P[0..15]<10> PCIE_GTX_C_MRX_N[0..15]<10> PCIE_MTX_C_GRX_P[0..15]<10> PCIE_MTX_C_GRX_N[0..15]<10>

D D

U64A

PCIE_MTX_C_GRX_N15 PCIE_MTX_C_GRX_P15

PCIE_MTX_C_GRX_N14 PCIE_MTX_C_GRX_P14

PCIE_MTX_C_GRX_N13 PCIE_MTX_C_GRX_P13

PCIE_MTX_C_GRX_N12 PCIE_MTX_C_GRX_P12

PCIE_MTX_C_GRX_N11 PCIE_MTX_C_GRX_P11

PCIE_MTX_C_GRX_N10 PCIE_MTX_C_GRX_P10

C C

PCIE LANE REVERSAL

B B

CLK_PCIE_VGA<20> CLK_PCIE_VGA#<20>

PLT_RST#<11,13,24,31,33>

ESD

PCIE_MTX_C_GRX_N9 PCIE_MTX_C_GRX_P9

PCIE_MTX_C_GRX_N8 PCIE_MTX_C_GRX_P8

PCIE_MTX_C_GRX_N7 PCIE_MTX_C_GRX_P7

PCIE_MTX_C_GRX_N6 PCIE_MTX_C_GRX_P6

PCIE_MTX_C_GRX_N5 PCIE_MTX_C_GRX_P5

PCIE_MTX_C_GRX_N4 PCIE_MTX_C_GRX_P4

PCIE_MTX_C_GRX_N3 PCIE_MTX_C_GRX_P3

PCIE_MTX_C_GRX_N2 PCIE_MTX_C_GRX_P2

PCIE_MTX_C_GRX_N1

PCIE_MTX_C_GRX_P1

PCIE_MTX_C_GRX_N0

PCIE_MTX_C_GRX_P0

CLK_PCIE_VGA CLK_PCIE_VGA#

For Future ASIC Pin N10 need pull down

10K_0402_5%@

R955

12

C780 10P_0402_50V8J@C780 10P_0402_50V8J@

AF30

PCIE_RX0P

AE31

PCIE_RX0N

AE29

PCIE_RX1P

AD28

PCIE_RX1N

AD30

PCIE_RX2P

AC31

PCIE_RX2N

AC29

PCIE_RX3P

AB28

PCIE_RX3N

AB30

PCIE_RX4P

AA31

PCIE_RX4N

AA29

PCIE_RX5P

Y28

PCIE_RX5N

Y30

PCIE_RX6P

W31

PCIE_RX6N

W29

PCIE_RX7P

V28

PCIE_RX7N

V30

PCIE_RX8P

U31

PCIE_RX8N

U29

PCIE_RX9P

T28

PCIE_RX9N

T30

PCIE_RX10P

R31

PCIE_RX10N

R29

PCIE_RX11P

P28

PCIE_RX11N

P30

PCIE_RX12P

N31

PCIE_RX12N

N29

PCIE_RX13P

M28

PCIE_RX13N

M30

PCIE_RX14P

L31

PCIE_RX14N

L29

PCIE_RX15P

K30

PCIE_RX15N

CLOCK

AK30

PCIE_REFCLKP

AK32

PCIE_REFCLKN

L9

NC#1

N9

NC#2

N10

12

NC_PWRGOOD

AL27

PERSTB

216-0728002 A11 M92-S2_FCBGA631

VGA@

PCIE_GTX_C_MRX_P[0..15] PCIE_GTX_C_MRX_N[0..15] PCIE_MTX_C_GRX_P[0..15] PCIE_MTX_C_GRX_N[0..15]

PCIE_TX0P PCIE_TX0N

PCIE_TX1P PCIE_TX1N

PCIE_TX2P PCIE_TX2N

PCIE_TX3P PCIE_TX3N

PCI EXPRESS INTERFACE

PCIE_TX4P PCIE_TX4N

PCIE_TX5P PCIE_TX5N

PCIE_TX6P PCIE_TX6N

PCIE_TX7P PCIE_TX7N

PCIE_TX8P PCIE_TX8N

PCIE_TX9P PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

CALIBRATION

PCIE_CALRP PCIE_CALRN

PEG_NRX_C_GTX_P15 PCIE_GTX_C_MRX_P15

AG31

AG29

PEG_NRX_C_GTX_P14 PCIE_GTX_C_MRX_P14

AF28

PEG_NRX_C_GTX_N13 PCIE_GTX_C_MRX_N13

AF27 AF26

AD27 AD26

PEG_NRX_C_GTX_N11

AC25 AB25

PEG_NRX_C_GTX_N10

Y23 Y24

PEG_NRX_C_GTX_N9

AB27

PEG_NRX_C_GTX_P9

AB26

PEG_NRX_C_GTX_N8

Y27

PEG_NRX_C_GTX_P8

Y26

PEG_NRX_C_GTX_N7

W24

PEG_NRX_C_GTX_P7

W23

PEG_NRX_C_GTX_N6

V27

PEG_NRX_C_GTX_P6

U26

PEG_NRX_C_GTX_N5

U24 U23

T26 T27

PEG_NRX_C_GTX_N3

T24 T23

PEG_NRX_C_GTX_N2

P27 P26

PEG_NRX_C_GTX_N1

P24 P23

M27 N26

R864 1.27K_0402_1%

Y22

1 2

R865 2K_0402_1%

AA22

1 2

PEG_NRX_C_GTX_N15 PCIE_GTX_C_MRX_N15

AH30

C1061 0.1U_0402_16V7K

1 2

C1060 0.1U_0402_16V7K

1 2

VGA@

C1063 0.1U_0402_16V7K

1 2

C1062 0.1U_0402_16V7K

1 2

VGA@

C1065 0.1U_0402_16V7K

1 2

C1064 0.1U_0402_16V7K

1 2

VGA@

C1067 0.1U_0402_16V7K

1 2

C1066 0.1U_0402_16V7K

1 2

VGA@

C1069 0.1U_0402_16V7K

1 2

C1068 0.1U_0402_16V7K

1 2

VGA@

C1071 0.1U_0402_16V7K

1 2

C1070 0.1U_0402_16V7K

1 2

VGA@

C1073 0.1U_0402_16V7K

1 2

C1072 0.1U_0402_16V7K

1 2

VGA@

C1075 0.1U_0402_16V7K

1 2

C1074 0.1U_0402_16V7K

1 2

VGA@

C1077 0.1U_0402_16V7K

1 2

C1076 0.1U_0402_16V7K

1 2

@

C1079 0.1U_0402_16V7K

1 2

C1078 0.1U_0402_16V7K

1 2

@

C1081 0.1U_0402_16V7K

1 2

C1080 0.1U_0402_16V7K

1 2

@

C1083 0.1U_0402_16V7K

1 2

C1082 0.1U_0402_16V7K

1 2

@

C1085 0.1U_0402_16V7K

1 2

C1084 0.1U_0402_16V7K

1 2

@

C1087 0.1U_0402_16V7K

1 2

C1086 0.1U_0402_16V7K

1 2

@

C1089 0.1U_0402_16V7K

1 2

C1088 0.1U_0402_16V7K

1 2

@

C1091 0.1U_0402_16V7K

1 2

C1090 0.1U_0402_16V7K

1 2

@

VGA@

+1.1VS

PCIE_GTX_C_MRX_N14PEG_NRX_C_GTX_N14

PCIE_GTX_C_MRX_P13PEG_NRX_C_GTX_P13

PCIE_GTX_C_MRX_N12PEG_NRX_C_GTX_N12 PCIE_GTX_C_MRX_P12PEG_NRX_C_GTX_P12

PCIE_GTX_C_MRX_N11 PCIE_GTX_C_MRX_P11PEG_NRX_C_GTX_P11

PCIE_GTX_C_MRX_N10 PCIE_GTX_C_MRX_P10PEG_NRX_C_GTX_P10

PCIE_GTX_C_MRX_N9 PCIE_GTX_C_MRX_P9

PCIE_GTX_C_MRX_N8 PCIE_GTX_C_MRX_P8

PCIE_GTX_C_MRX_N7 PCIE_GTX_C_MRX_P7

PCIE_GTX_C_MRX_N6 PCIE_GTX_C_MRX_P6

PCIE_GTX_C_MRX_N5 PCIE_GTX_C_MRX_P5PEG_NRX_C_GTX_P5

PCIE_GTX_C_MRX_N4PEG_NRX_C_GTX_N4 PCIE_GTX_C_MRX_P4PEG_NRX_C_GTX_P4

PCIE_GTX_C_MRX_N3 PCIE_GTX_C_MRX_P3PEG_NRX_C_GTX_P3

PCIE_GTX_C_MRX_N2 PCIE_GTX_C_MRX_P2PEG_NRX_C_GTX_P2

PCIE_GTX_C_MRX_N1 PCIE_GTX_C_MRX_P1PEG_NRX_C_GTX_P1

PCIE_GTX_C_MRX_N0PEG_NRX_C_GTX_N0 PCIE_GTX_C_MRX_P0PEG_NRX_C_GTX_P0

PCIE LANE REVERSAL

For M92 S2-LP disable PCIE GFX 0~7

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

14 49Monday, May 04, 2009

1

A

of

For M92-S2: DO NOT Install any Component

hexainf@hotmail.com

in this Box.

+1.8VS

L125

1 2

MCK1608471YZF 0603@

10U_0603_6.3V6M@

D D

+1.1VS

L128

1 2

MCK1608471YZF 0603@

10U_0603_6.3V6M@

+3.3V_DELAY

R871 4.7K_0402_5%VGA@R871 4.7K_0402_5%VGA@

R873 4.7K_0402_5%VGA@R873 4.7K_0402_5%VGA@

R875

C C

+VGA_CORE

12

@

R882

R882 10K_0402_5%

10K_0402_5%

BB_EN

Do not use Back Bais than pull high to +VDDC

+3.3V_DELAY

12

@

GPIO23_CLKREQB

B B

27M_NSSC<20>

+3.3V_DELAY

12

R548

5.1K_0402_1%@

TESTEN

12

R889

5.1K_0402_1%

VGA@

A A

5

(1.8V@120mA +DPLL_PVDD)

1

C1251

2

(1.8V@120mA +DPLL_PVDD)

1

C1258

2

VGA_LCD_CLK

1 2

VGA_LCD_DATA

1 2

12

10K_0402_5%@

VGA_PWRSEL<47>

1U_0402_6.3V4Z@

1

2

1U_0402_6.3V4Z@

1

2

VGA_PWRSEL

GPU_GPIO0<19> GPU_GPIO1<19> GPU_GPIO2<19>

VGA_ENBKL<33> SOUT_GPIO8<19> GPU_GPIO9<19>

GPU_GPIO11<19> GPU_GPIO12<19> GPU_GPIO13<19>

27M_SSC<20>

THM_ALERT#<19>

C1250

C1260

0.1U_0402_10V6K@

+DPC_VDD18

+DPC_VDD10

10/24 Reference AMD REF136-1

+1.8VS

R883

R883 10K_0402_5%

10K_0402_5%

+1.8VS

VGA@

+1.1VS

R887

MCK1608471YZF 0603

VGA@

499_0402_1%

VGA@

249_0402_1%

VGA@

75_0402_1%

1 2

R888

100_0402_5%

VGA@

+1.8VS

BLM18PG121SN1D_0603

VGA@

(1.8V@20mA TSVDD)

L102

1 2

10U_0603_6.3V6M

VGA@

(1.1V@300mA +DPLL_VDDC)

L103

1 2

10U_0603_6.3V6M

VGA@

5

R884

R886

1 2

L109

10U_0603_6.3V

VGA@

(1.8V@120mA +DPLL_PVDD)

VGA@

1

C1092

2

VGA@

1

C1095

2

1

2

1

2

BB_EN

12

VRAM_ID0<19>

C1252

VRAM_ID1<19> VRAM_ID2<19> VRAM_ID3<19>

C1259

LCD

VGA_LCD_CLK<21> VGA_LCD_DATA<21>

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2

R877 0_0402_5%@R877 0_0402_5%@

1 2

R878 10K_0402_5%VGA@R878 10K_0402_5%VGA@

1 2

SOUT_GPIO8 GPU_GPIO9

GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

VGA_PWRSEL

R879 0_0402_5%@R879 0_0402_5%@

1 2

R880 10K_0402_5%@ R880 10K_0402_5%@

1 2

R881 0_0402_5%@ R881 0_0402_5%@

1 2

TESTEN<17>

HDMI_DET<11,22>

VGA@

0.1U_0402_10V6K

1

C1110

2

GPU_THERMAL_D+<19> GPU_THERMAL_D-<19>

VGA@

1U_0402_6.3V4Z

12

1

C1114

2

1U_0402_6.3V4Z

1

C1093

2

1U_0402_6.3V4Z

1

C1096

2

R278 150_0402_1%@R278 150_0402_1%@

+DPC_VDD10

R957 0_0402_5%@R957 0_0402_5%@

1

C1115

2

+DPLL_PVDD

1

C1094

0.1U_0402_10V6K

2

VGA@

+DPLL_VDDC

1

C1097

0.1U_0402_10V6K

2

VGA@

1 2

VRAM_ID0 VRAM_ID1 VRAM_ID2 VRAM_ID3

1 2

GPIO23_CLKREQB

GPIO24_TRSTB

T5 PADT5 PAD T6 PADT6 PAD T7 PADT7 PAD T8 PADT8 PAD

TESTEN

+DPLL_PVDD

+DPLL_VDDC

1.8V

27MCLK XTALOUT

T9 PADT9 PAD

1

C1116

0.1U_0402_10V6K

2

VGA@

+DPC_VDD18

R_27M_SSC

GPU_CTF

GPU_GPIO21

4

U64B

MUTI GFX

AA1

DVPCNTL_MVP_0

Y4

DVPCNTL_MVP_1

AC7

DVPCNTL_0

Y2

DVPCNTL_1

U5

DVPCNTL_2

U1

DVPCLK

Y7

DVPDATA_0

V2

DVPDATA_1

Y8

DVPDATA_2

V4

DVPDATA_3

AB7

DVPDATA_4

W1

DVPDATA_5

AB8

DVPDATA_6

W3

DVPDATA_7

AB9

DVPDATA_8

W5

DVPDATA_9

AC6

DVPDATA_10

W6

DVPDATA_11

AD7

DVPDATA_12

AA3

DVPDATA_13

AC8

DVPDATA_14

AA5

DVPDATA_15

AE8

DVPDATA_16

AA6

DVPDATA_17

AE9

DVPDATA_18

AB4

DVPDATA_19

AD9

DVPDATA_20

AB2

DVPDATA_21

AC10

DVPDATA_22

AC5

DVPDATA_23

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16_SSIN

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

T11

GPIO_29_DRM_0

R11

GPIO_30_DRM_1

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

AF24

TESTEN

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

AC16

VREFG

PLL/CLOCK

AF14

DPLL_PVDD

AE14

DPLL_PVSS

AD14

DPLL_VDDC

AM28

XTALIN

AK28

XTALOUT

T4

DPLUS

T2

DMINUS

R5

TS_FDO

AD17

TSVDD

AC17

TSVSS

216-0728002 A11 M92-S2_FCBGA631

VGA@

4

3

AF2

TXCAP_DPA3P

AF4

TXCAM_DPA3N

AG3

TX0P_DPA2P

AG5

TX0M_DPA2N

DPA

DPB

DAC1

I2C

DAC2

DDC/AUX

THERMAL

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

HSYNC VSYNC

RSET

AVDD

AVSSQ VDD1DI

VSS1DI

COMP

H2SYNC V2SYNC

VDD2DI VSS2DI

A2VDD A2VDDQ A2VSSQ

R2SET

DDC1CLK

DDC1DATA

AUX1P

AUX1N

DDC2CLK

DDC2DATA

AUX2P

AUX2N

DDCAUX5P DDCAUX5N

DDC6CLK

DDC6DATA

NC_DDCAUX7P NC_DDCAUX7N

AH3 AH1

AK3 AK1

AK5 AM3

AK6 AM5

AJ7 AH6

AK8 AL7

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26 AJ27

AD22

1 2

VGA@

+AVDD

AG24 AE22

+VDD1DI

AE23 AD23

AM12

R2

AK12

R2B

AL11

G2

AJ11

G2B

AK10

B2

AL9

B2B

AH12

C

AM10

Y

AJ9

AL13 AJ13

+VDD2DI

AD19 AC19

+A2VDD

AE20

+A2VDDQ

AE17 AE19

AG13

1 2

AE6 AE5

AD2 AD4

AC11 AC13

AD13 AD11

AB22

NC1

AC22

NC2

AE16 AD16

AC1 AC3

AD20 AC20

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

R876

R876 499_0402_1%

499_0402_1%

T2PADT2PAD T3PADT3PAD T4PADT4PAD

R885

R885 715_0402_1%

715_0402_1%

VGA@

T14PADT14PAD T13PADT13PAD

3

HDMI_CLK+_VGA <22> HDMI_CLK-_VGA <22>

HDMI_TX0+_VGA <22> HDMI_TX0-_VGA <22>

HDMI_TX1+_VGA <22> HDMI_TX1-_VGA <22>

HDMI_TX2+_VGA <22> HDMI_TX2-_VGA <22>

VGA_CRT_R <23>

GND IN

C1117

@C1117

@

CRT

Y6

@Y6

@

3

OUT

2

GND

VGA_CRT_R

R870 150_0402_1%

VGA_CRT_G

R872 150_0402_1%

VGA_CRT_B

R874 150_0402_1%

HDMI

12

R896

@R896

@

1M_0402_5%

1

22P_0402_50V8J

2

Close to M92

Compal Secret Data

Deciphered Date

VGA_CRT_G <23>

VGA_CRT_B <23>

VGA_CRT_HSYNC <19,23> VGA_CRT_VSYNC <19,23>

HSYNC_DAC2 <19> VSYNC_DAC2 <19>

VGA_CRT_CLK <23> VGA_CRT_DATA <23>

VGA_HDMI_SCLK <22> VGA_HDMI_SDATA <22>

4 1

1

27MHz_16PF_6P27000126

2

22P_0402_50V8J

2007/10/11 200810/11

2

U64F

LVDS CONTROL

LVTMDP

VGA@

1 2

VGA@

1 2

VGA@

1 2

216-0728002 A11 M92-S2_FCBGA631

VGA@

+1.8VS +AVDD

BLM18PG121SN1D_0603

VGA@

BLM18PG121SN1D_0603

VGA@

BLM18PG121SN1D_0603

VGA@

BLM18PG121SN1D_0603

VGA@

BLM18PG121SN1D_0603

VGA@

L104

L106

VGA@

L107

VGA@

L108

VGA@

L105

VGA@

12

10U_0603_6.3V

VGA@

12

10U_0603_6.3V

12

C1104

10U_0603_6.3V

12

C1107

10U_0603_6.3V

12

10U_0603_6.3V

(1.8V@70mA AVDD)

VGA@

1U_0402_6.3V4Z

1

C1098

2

(1.8V@45mA VDD1DI)

VGA@

1U_0402_6.3V4Z

1

C1101

2

(1.8V@1mA A2VDDQ)

VGA@

1U_0402_6.3V4Z

1

2

(1.8V@40mA VDD2DI)

VGA@

1U_0402_6.3V4Z

1

2

(3.3V@65mA A2VDD)

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

1

C1111

2

DO NOT INSTALL for M93-S3

27MCLK

XTALOUT

C1118

@C1118

@

2

1

AB11

VARY_BL

AB12

DIGON

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

1

2

1

2

1

C1105

2

0.1U_0402_10V6K

VGA@

1

C1108

2

0.1U_0402_10V6K

VGA@

1

C1112

2

0.1U_0402_10V6K

VGA@

Title

Size Document Number Rev

Date: Sheet

AH20 AJ19

AL21 AK20

AH22 AJ21

AL23 AK22

AK24

TXOUT_U3P

AJ23

TXOUT_U3N

AL15 AK14

AH16 AJ15

AL17 AK16

AH18 AJ17

AL19

TXOUT_L3P

AK18

TXOUT_L3N

1

C1100

C1099

2

0.1U_0402_10V6K

VGA@

+VDD1DI

1

C1103

C1102

2

0.1U_0402_10V6K

VGA@

+A2VDDQ

1

C1106

2

+VDD2DI

1

C1109

2

+A2VDD+3.3V_DELAY

1

C1113

2

GPIO24_TRSTB

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

VGA_TZCLK+ VGA_TZCLK-

VGA_TZOUT0+ VGA_TZOUT0-

VGA_TZOUT1+ VGA_TZOUT1-

VGA_TZOUT2+ VGA_TZOUT2-

+3.3V_DELAY

12

1

VGA_DPST <21> VGA_ENVDD <21>

VGA_TZCLK+ <21> VGA_TZCLK- <21>

VGA_TZOUT0+ <21> VGA_TZOUT0- <21>

VGA_TZOUT1+ <21> VGA_TZOUT1- <21>

VGA_TZOUT2+ <21> VGA_TZOUT2- <21>

VGA_TXCLK+ <21> VGA_TXCLK- <21>

VGA_TXOUT0+ <21> VGA_TXOUT0- <21>

VGA_TXOUT1+ <21> VGA_TXOUT1- <21>

VGA_TXOUT2+ <21> VGA_TXOUT2- <21>

@

R890

R890 10K_0402_5%

10K_0402_5%

@

R895

R895 1K_0402_5%

1K_0402_5%

15 49Monday, May 04, 2009

of

A

5

4

3

2

1

MAA[12..0] BA[2..0]

D D

C C

+1.5VS

B B

+1.5VS +1.5VS

12

R906

100_0402_1%

VGA@

A A

12

R908

100_0402_1%

VGA@

MAA[12..0] <18>

BA[2..0] <18>

U64C

MDA0

K27

DQA_0

MDA1

J29

DQA_1

MDA2

H30

DQA_2

MDA3

H32

DQA_3

MDA4

G29

DQA_4

MDA5

F28

DQA_5

MDA6

F32

DQA_6

MDA7

F30

DQA_7

MDA8

C30

DQA_8

MDA9

F27

1

2 12

A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11

A9

C9

F9

D8

E7 A7

C7

F7 A5 E5

C3

E1 G7 G6 G1 G3

J6

J1

J3

J5

K26

J26 J25

K7

J8

K25 L10

K8

L7

1

2

12

C3

0.1U_0402_16V4Z

R905

R905 51_0402_1%

51_0402_1%

VGA@

DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63

MVREFDA MVREFSA

NC_MEM_CALRN0 NC_MEM_CALRN1

MEM_CALRP1 NC_MEM_CALRP0

DRAM_RST CLKTESTA

CLKTESTB

216-0728002 A11 M92-S2_FCBGA631

VGA@

MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

+VDD_MEM15_REFD +VDD_MEM15_REF1

R900243_0402_1%@ R900243_0402_1%@

1 2

R901243_0402_1%@ R901243_0402_1%@

1 2

R902243_0402_1%VGA@ R902243_0402_1%VGA@

1 2

R903243_0402_1%@ R903243_0402_1%@

1 2

DRAM_RST#

VGA@

C2

0.1U_0402_16V4Z

R904

51_0402_1%

VGA@

Close to K26 Close to J26

+VDD_MEM15_REFD

1

C1140

0.1U_0402_16V4Z

VGA@

2

5

MDA[0..63]<18>

MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8

MAA_9 MAA_10 MAA_11 MAA_12

MAA_13/BA2 MAA_14/BA0 MAA_15/BA1

DQMA_0 DQMA_1 DQMA_2 DQMA_3 DQMA_4 DQMA_5 DQMA_6

MEMORY INTERFACE

DQMA_7

RDQSA_0 RDQSA_1 RDQSA_2 RDQSA_3 RDQSA_4 RDQSA_5 RDQSA_6 RDQSA_7

WDQSA_0 WDQSA_1 WDQSA_2 WDQSA_3 WDQSA_4 WDQSA_5 WDQSA_6 WDQSA_7

ODTA0

ODTA1

CLKA0 CLKA0B

CLKA1 CLKA1B

RASA0B RASA1B

CASA0B CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0

CKEA1

WEA0B WEA1B

RSVD#1 RSVD#2 RSVD#3

R907

100_0402_1%

VGA@

R909

100_0402_1%

VGA@

K17 J20 H23 G23 G24 H24 J19 K19 J14 K14 J11 J13 H11 G11 J16 L15

E32 E30 A21 C21 E13 D12 E3 F4

H28 C27 A23 E19 E15 D10 D6 G5

H27 A27 C23 C19 C15 E9 C5 H4

L18 K16

H26 H25

G9 H9

G22 G17

G19 G16

H22 J22

G13 K13

K20 J17

G25 H10

AB16 G14 G20

12

MDA[0..63]

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 BA2 BA0 BA1

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

QSA#0 QSA#1 QSA#2 QSA#3 QSA#4 QSA#5 QSA#6 QSA#7

ODTA0 ODTA1 +DPB_PVDD

CLKA0 CLKA0#

CLKA1 CLKA1#

RASA#0 RASA#1

CASA#0 CASA#1

CSA0#

CSA1#

CKEA0 CKEA1

WEA#0 WEA#1

+VDD_MEM15_REF1

1

C1141

0.1U_0402_16V4Z

VGA@

2

4

T10PADT10PAD T11PADT11PAD T12PADT12PAD

ODTA0 <18> ODTA1 <18>

CLKA0 <18> CLKA0# <18>

CLKA1 <18> CLKA1# <18>

RASA#0 <18> RASA#1 <18>

CASA#0 <18> CASA#1 <18>

CSA0# <18>

CSA1# <18>

CKEA0 <18> CKEA1 <18>

WEA#0 <18> WEA#1 <18>

DQMA#[7..0] <18>

QSA[7..0] <18>

QSA#[7..0] <18>

DRAM_RST#<18>

(1.8V@200mA +DPE_VDD18)

+1.8VS +DPE_VDD18

+DPE_VDD18

+1.8VS

@ L112

@

BLM18PG121SN1D_0603

(1.1V@170mA +DPF_VDD10)

BLM18PG121SN1D_0603

VGA@

L110

BLM18PG121SN1D_0603

VGA@

10U_0603_6.3V

VGA@

R897

VGA@

R897

VGA@

0_0402_5%

1 2

12

L112

10U_0603_6.3V

VGA@

+1.1VS

BLM18PG121SN1D_0603

VGA@

10U_0603_6.3V

VGA@

+1.8VS +1.8VS

(1.8V@20mA +DPE_PVDD)

10U_0603_6.3V

VGA@

L2

L113

12

1

C1119

2

VGA@

1U_0402_6.3V4Z

1

C1125

2

1U_0402_6.3V4Z

12

1

C1128

2

12

1

C1131

2

VGA@

1U_0402_6.3V4Z

1

C1120

2

1

C1126

2

0.1U_0402_10V6K

VGA@

1

C1129

2

VGA@

1U_0402_6.3V4Z

1

C1132

VGA@

2

(For future use only)

+1.8VS

MCK1608471YZF 0603@

+1.5VS

12

R316

4.7K_0402_5%

VGA@

DRAM_RST#

1U_0402_6.3V4ZVGA@

C337

R3174.7K_0402_5%@ R3174.7K_0402_5%@

1

2

1 2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

1

C1121

0.1U_0402_10V6K

2

VGA@

1

C1127

2

1

C1130

0.1U_0402_10V6K

2

VGA@

1

C1133

0.1U_0402_10V6K

2

L126

1 2

10U_0603_6.3V6M@

AG15

R898

AG16

AG20 AG21

AG14

AH14 AM14 AM16 AM18

AF16

AG17

AF22

AG22

AF23

AG23 AM20 AM22 AM24

AF17

AG18

AF19

AG19

AF20

+DPF_VDD10

+DPF_VDD18

+DPF_VDD10

150_0402_1%

1 2

+DPE_PVDD

(1.8V@120mA +DPLL_PVDD)

1U_0402_6.3V4Z@

1

C1254

2

Compal Secret Data

Deciphered Date

U64G

DPE_VDD18#1 DPE_VDD18#2

DPE_VDD10#1 DPE_VDD10#2

DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5

DPF_VDD18#1 DPF_VDD18#2

DPF_VDD10#1 DPF_VDD10#2

DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5

DPEF_CALR

DP PLL POWER

DPE_PVDD DPE_PVSS

NC_DPF_PVDD NC_DPF_PVSS

216-0728002 A11 M92-S2_FCBGA631

VGA@

+DPA_VDD18

1

C1255

C1253

0.1U_0402_10V6K@

2

DP A/B POWERDP E/F POWER

NC_DPA_VDD18#1 NC_DPA_VDD18#2

DPA_VDD10#1 DPA_VDD10#2

DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

NC_DPB_VDD18#1 NC_DPB_VDD18#2

DPB_VDD10#1 DPB_VDD10#2

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

DPAB_CALR

DPA_PVDD DPA_PVSS

DPB_PVDD DPB_PVSS

+DPA_VDD18

AE11 AF11

(1.1V@200mA +DPA_VDD10)

+DPA_VDD10

AF6 AF7

AE1 AE3 AG1 AG6 AH5

AE13 AF13

AF8 AF9

AF10 AG9 AH8 AM6 AM8

AE10

AG8 AG7

AG10 AG11

VGA@

150_0402_1%

1 2

VGA@

1

VGA@

10U_0603_6.3V

2

R899

+DPA_PVDD

C1122

VGA@

1U_0402_6.3V4Z

1

C1123

C1124

0.1U_0402_10V6K

2

0.1U_0402_10V6K

2

VGA@

(1.8V@20mA +DPA_PVDD)

VGA@

1U_0402_6.3V4Z

1

C1135

C113410U_0603_6.3V

2

+1.1VS

L111

12

BLM18PG121SN1D_0603

VGA@

L114

12

BLM18PG121SN1D_0603

VGA@

1

C1136

0.1U_0402_10V6K

2

VGA@

(1.8V@20mA +DPB_PVDD)

L115

VGA@

1U_0402_6.3V4Z

1

C1138

C1137

2

10U_0603_6.3V

VGA@

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Compal Electronics, Inc.

2

SCHEMATICS,MB A5401

401728

1

BLM18PG121SN1D_0603

VGA@

1

C1139

0.1U_0402_10V6K

2

VGA@

16 49Monday, May 04, 2009

L115

of

+1.8VS

12

A

5

hexainf@hotmail.com

4

3

2

U64E

1

AA27

PCIE_VSS#1

AB24

D D

+1.5VS

VGA@

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

10U_0603_6.3V

+1.8VS +VDDC_CT

L117

BLM18PG121SN1D_0603

VGA@

C C

B B

A A

VGA@

+3.3V_DELAY

10U_0603_6.3V

VGA@

1

2

+1.5VS

+1.8VS

BLM18PG121SN1D_0603

VGA@

+1.8VS

BLM18PG121SN1D_0603

VGA@

C1177

1U_0402_6.3V4Z

VGA@

L119

BLM18PG121SN1D_0603

VGA@

L121

BLM18PG121SN1D_0603

VGA@

+VGA_CORE

MCK1608471YZF 0603

VGA@

L123

L118

C1146

1

2

1U_0402_6.3V4Z

VGA@

1

2

VGA@

10U_0603_6.3V

12

VGA@

1U_0402_6.3V4Z

C1178

1

2

12

10U_0603_6.3V

VGA@

10U_0603_6.3V

VGA@

L122

1 2

12

5

(1.5V@2200mA)

VGA@

1U_0402_6.3V4Z

C1147

C1143

1

2

C1153

10U_0603_6.3V

VGA@

C1163

1

2

1U_0402_6.3V4Z

VGA@

C1179

1

2

1U_0402_6.3V4Z

VGA@

VGA@ 1

2

VGA@

+VGA_CORE

10U_0603_6.3V

VGA@

10U_0603_6.3V

VGA@

10U_0603_6.3V

VGA@

10U_0603_6.3V

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

C1144

1

2

1U_0402_6.3V4Z

VGA@

10U_0603_6.3V

C1154

1

2

C1142

C1148

1

2

1U_0402_6.3V4Z

VGA@

C1155

1

2

10U_0603_6.3V

VGA@

C1149

C1150

1

2

C1156

1

2

(1.8V@110mA +VDDC_CT) (+VGA_CORE@9000mA +VDDC)

C1164

C1165

1

2

C1180

TESTEN<15>

+VDDR5 +VDDR4

VGA@

1U_0402_6.3V4Z

C1197

1

2

0.1U_0402_10V6K

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1203

1

2

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1209

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1181

1

2

C1165

0.1U_0402_10V6K

VGA@

1 2

R2 0_0402_5%

1 2

R3 0_0402_5%

1 2

R12 0_0402_5%

1 2

R7 0_0402_5%

1 2

R13 0_0402_5%

1 2

R300 150_0402_1%@R300 150_0402_1%@ R11 0_0402_5%

R11 0_0402_5% R14 0_0402_5%

R14 0_0402_5%

C1194

1

2

C1198

1

2

C1204

C1205

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K 1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1210

1

2

0.1U_0402_10V6K

VGA@

+VDDR5

C1182

1

2

0.1U_0402_10V6K

VGA@

1 2

R9 0_0402_5%

@

R9 0_0402_5%

@

VGA@

VGA@ VGA@

VGA@

@

VGA@

1 2

VGA@

1 2

VGA@

VGA@ VGA@

VGA@

1U_0402_6.3V4Z

1

2

+PCIE_PVDD

+SPV10

C1206

1

2

0.1U_0402_10V6K

VGA@

+VDDR4

C1211

C1183

C1195

1

2

1

2

C1196

10U_0603_6.3V

U64D

MEM I/O

H13

VDDR1#1

H16

VDDR1#2

H19

VDDR1#3

J10

VDDR1#4

J23

VDDR1#5

J24

VDDR1#6

J9

VDDR1#7

K10

VDDR1#8

K23

VDDR1#9

K24

VDDR1#10

K9

VDDR1#11

L11

VDDR1#12

L12

VDDR1#13

L13

VDDR1#14

L20

VDDR1#15

L21

VDDR1#16

L22

VDDR1#17

LEVEL

LEVEL TRANSLATION

TRANSLATION

AA20

VDD_CT#1

AA21

VDD_CT#2

AB20

VDD_CT#3

AB21

VDD_CT#4

I/O

AA17

VDDR3#1

AA18

VDDR3#2

AB17

VDDR3#3

AB18

VDDR3#4

U11

VDDR5#1

U12

VDDR5#2

V11

VDDR5#3

V12

VDDR5#4

AA11

VDDR4#1

AA12

VDDR4#2

Y11

VDDR4#3

Y12

VDDR4#4

MEM CLK

L17

VDDRHA

L16

VSSRHA

PLL

AM30

PCIE_PVDD

L8

NC_MPV18

H7

NC_SPV18

H8

SPV10

J7

SPVSS

BACK BIAS

M11

BBP#1

M12

BBP#2

C1207

1

216-0728002 A11 M92-S2_FCBGA631

2

216-0728002 A11 M92-S2_FCBGA631

VGA@

4

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

CORE

POWER

ISOLATED

ISOLATED CORE I/O

CORE I/O

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

AA15 N15 N17 R13 R16 R18 R21 T12 T15 T17 T20 U13 U16 U18 U21 V15 V17 V20 V21 Y13 Y16 Y18 Y21

M13 M15 M16 M17 M18 M20 M21 N20

VGA@

+PCIE_GDDR

+PCIE_VDDC

+VDDCI

(1.8V@500mA +PCIE_GDDR)

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1157

1

2

0.1U_0402_10V6K

VGA@

1U_0402_6.3V4Z

1

2

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1166

C1167

C1168

C1169

C1170

1

2

1U_0402_6.3V4Z

VGA@

10U_0603_6.3V

VGA@

C1256

VGA@

2

1U_0402_6.3V4Z

VGA@

10U_0603_6.3V

VGA@

10U_0603_6.3V

VGA@

C1185

1

2

10U_0603_6.3V

VGA@

1

C1257

@

2

1U_0402_6.3V4Z

10U_0603_6.3V

VGA@

1U_0402_6.3V4Z

C1199

1

2

1U_0402_6.3V4Z

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C1170

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

C1186

C1187

1

2

L124

BLM18PG121SN1D_0603

VGA@

L127

BLM18PG121SN1D_0603

VGA@

10U_0603_6.3V

C1200

C1201

1

2

1U_0402_6.3V4Z

VGA@

3

VGA@

10U_0603_6.3V

C1152

C1145

0.1U_0402_10V6K

VGA@

1U_0402_6.3V4Z

VGA@

(1.1V@2000mA +PCIE_VDDC)

VGA@

1U_0402_6.3V4Z

C1159

C1158

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1171

1

2

1U_0402_6.3V4Z

C1188

1

2

1U_0402_6.3V4Z

VGA@

12

C1202

+3VS

2007/10/11 200810/11

C1152

C1151

1

2

VGA@

C1160

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

C1173

C1174

C1172

1

2

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

VGA@

1U_0402_6.3V4Z

C1190

C1189

C1191

1

2

1U_0402_6.3V4Z

VGA@

For S2: Install L124 and DO not Install L127

+1.1VS

For S3: Install L127 and DO not Install L124

(+VGA_CORE@2000mA +VDDCI)

1 2

L120

MCK2012221YZF 0805

VGA@

+3.3V_DELAY

1 2

R911 4.7K_0402_5%

VGA@

1 2

MCK2012221YZF 0805

VGA@

10U_0603_6.3V

C1161

C1162

1

2

1

C1175

1

+

C1176

C1176 330U_D2E_2.5VM_R9M

330U_D2E_2.5VM_R9M

VGA@

2

VGA@

1U_0402_6.3V4Z

C1192

1

2

SI2301BDS_SOT23

VGA@

Compal Secret Data

Deciphered Date

L116

Q73

1 3

D

2

G

1

C1208

0.1U_0402_10V6K

VGA@

2

+1.8VS

+1.1VS

+VGA_CORE

S

G

2

13

D

Q74

Q74 2N7002_SOT23-3

2N7002_SOT23-3

S

VGA@

1 2

2

+3VS

R910

R910 100K_0402_5%

100K_0402_5%

VGA@

PCIE_VSS#2

AB32

PCIE_VSS#3

AC24

PCIE_VSS#4

AC26

PCIE_VSS#5

AC27

PCIE_VSS#6

AD25

PCIE_VSS#7

AD32

PCIE_VSS#8

AE27

PCIE_VSS#9

AF32

PCIE_VSS#10

AG27

PCIE_VSS#11

AH32

PCIE_VSS#12

K28

PCIE_VSS#13

K32

PCIE_VSS#14

L27

PCIE_VSS#15

M32

PCIE_VSS#16

N25

PCIE_VSS#17

N27

PCIE_VSS#18

P25

PCIE_VSS#19

P32

PCIE_VSS#20

R27

PCIE_VSS#21

T25

PCIE_VSS#22

T32

PCIE_VSS#23

U25

PCIE_VSS#24

U27

PCIE_VSS#25

V32

PCIE_VSS#26

W25

PCIE_VSS#27

W26

PCIE_VSS#28

W27

PCIE_VSS#29

Y25

PCIE_VSS#30

Y32

PCIE_VSS#31

M6

GND#56

N11

GND#57

N12

GND#58

N13

GND#59

N16

GND#60

N18 N21

P6

P9 R12 R15 R17 R20

T13 T16 T18 T21

T6 U15 U17 U20

U3

U9

V13 V16 V18

V6

Y10 Y15 Y17 Y20

Y6

Title

Size Document Number Rev

Date: Sheet of

GND

GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87

216-0728002 A11 M92-S2_FCBGA631

VGA@

SCHEMATICS,MB A5401

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

Compal Electronics, Inc.

401728

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

A32 AM1 AM32

A

17 49Monday, May 04, 2009

1

17 49Monday, May 04, 2009

A

5

VREFC_A1 VREFD_Q1

D D

MDA[0..63]<16>

MAA[12..0]<16>

DQMA#[7..0]<16>

QSA[7..0]<16>

QSA#[7..0]<16>

C C

MDA[0..63]

MAA[12..0]

DQMA#[7..0]

QSA[7..0]

QSA#[7..0]

CLKA0<16> CLKA0#<16> CKEA0<16>

DRAM_RST#<16>

R912

R912 240_0402_1%

240_0402_1%

VGA@

BA0<16> BA1<16> BA2<16>

ODTA0<16> CSA0#<16> RASA#0<16> CASA#0<16> WEA#0<16>

QSA0 QSA2

DQMA#0 DQMA#2

QSA#0 QSA#2

12

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

U65

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

K4W1G1646E-HC12_FBGA96

VRAM@

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

4

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U66

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

VRAM@

VGA@

VREFC_A2 VREFD_Q2

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

BA0 BA1 BA2

CLKA0 CLKA0# CKEA0

ODTA0 CSA0# RASA#0 CASA#0 WEA#0

QSA1 QSA3

DQMA#1 DQMA#3

QSA#1 QSA#3

DRAM_RST#

12

MDA4

E3

MDA6

F7

MDA1

F2

MDA2

F8

MDA5

H3

MDA0

H8

MDA7

G2

MDA3

H7

MDA18

D7

MDA19

C3

MDA16

C8

MDA22

C2

MDA20

A7

MDA23

A2

MDA17

B8

MDA21

A3

+1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

R913

R913 240_0402_1%

240_0402_1%

3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

U67

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

VRAM@

R914

R914 240_0402_1%

240_0402_1%

VGA@

VREFC_A3 VREFD_Q3

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

BA0 BA1 BA2

CLKA1<16> CLKA1#<16> CKEA1<16>

ODTA1<16> CSA1#<16> RASA#1<16> CASA#1<16> WEA#1<16>

QSA5 QSA4

DQMA#5 DQMA#4

QSA#5 QSA#4

DRAM_RST# DRAM_RST#

12

MDA10

E3

MDA12

F7

MDA8

F2

MDA13

F8

MDA11

H3

MDA15

H8

MDA9

G2

MDA14

H7

MDA28

D7

MDA26

C3

MDA29

C8

MDA27

C2

MDA30

A7

MDA24

A2

MDA31

B8

MDA25

A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

+1.5VS

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

2

R915

R915 240_0402_1%

240_0402_1%

VGA@

VREFC_A4 VREFD_Q4

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8

MAA9 MAA10 MAA11 MAA12

BA0 BA1 BA2

CLKA1 CLKA1# CKEA1

ODTA1 CSA1# RASA#1 CASA#1 WEA#1

QSA7 QSA6

DQMA#7 DQMA#6

QSA#7 QSA#6

12

MDA40

E3

MDA45

F7

MDA44

F2

MDA43

F8

MDA42

H3

MDA47

H8

MDA41

G2

MDA46

H7

MDA34

D7

MDA35

C3

MDA38

C8

MDA36

C2

MDA37

A7

MDA32

A2

MDA39

B8

MDA33

A3

+1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

U68

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12

T3

A13

T7

A14

M7

A15/BA3

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE/CKE0

K1

ODT/ODT0

L2

CS/CS0

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ/ZQ0

J1

NC/ODT1

L1

NC/CS1

J9

NC/CE1

L9

NCZQ1

96-BALL

96-BALL SDRAM DDR3

SDRAM DDR3

K4W1G1646E-HC12_FBGA96

VRAM@

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

1

MDA63

E3

MDA57

F7

MDA58

F2

MDA56

F8

MDA62

H3

MDA60

H8

MDA61

G2

MDA59

H7

MDA50

D7

MDA54

C3

MDA51

C8

MDA52

C2

MDA48

A7

MDA55

A2

MDA49

B8

MDA53

A3

+1.5VS

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5VS

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

B B

12

R916

4.99K_0402_1%

VGA@

VREFD_Q1

12

0.1U_0402_10V6K

R924

4.99K_0402_1%

VGA@

CLKA0

1 2

R932 56_0402_1%

A A

R932 56_0402_1%

CLKA0#

1 2

R934 56_0402_1%

5

VGA@

1

C1246

0.01U_0402_25V7K

VGA@

2

1

C1212

2

VGA@

CLKA1

1 2

R933 56_0402_1%

CLKA1#

1 2

R935 56_0402_1%

R917

4.99K_0402_1%

VGA@

R925

4.99K_0402_1%

VGA@

4

+1.5VS+1.5VS

12

+1.5VS

1

C1247

0.01U_0402_25V7K

VGA@

2

VREFC_A1

1

C1213

2

0.1U_0402_10V6K

VGA@

4.99K_0402_1%

VGA@

4.99K_0402_1%

VGA@

10U_0603_6.3V6M

1

C1220

2

10U_0603_6.3V6M

VGA@

C1221

R918

R926

+1.5VS+1.5VS +1.5VS+1.5VS +1.5VS+1.5VS

12

4.99K_0402_1%

VGA@

VREFC_A2 VREFD_Q2 VREFD_Q3VREFC_A3 VREFC_A4 VREFD_Q4

12

0.1U_0402_10V6K

1

C1214

4.99K_0402_1%

VGA@

2

VGA@

10U_0603_6.3V6M

1

C1222

2

1

C1237

2

10U_0603_6.3V6M

VGA@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

12

R919

12

R927

VGA@

10U_0603_6.3V6M

1

C1224

C1223

2

10U_0603_6.3V6M

VGA@

3

4.99K_0402_1%

VGA@

0.1U_0402_10V6K

1

C1215

2

1

2

2009/01/09 2010/01/09

VGA@

4.99K_0402_1%

VGA@

+1.5VS

1U_0402_6.3V4Z

VGA@

12

R920

12

R928

VGA@

1U_0402_6.3V4Z

C1238

C1239

C1225

1

2

1U_0402_6.3V4Z

VGA@

Compal Secret Data

Deciphered Date

0.1U_0402_10V6K

1

C1216

2

1U_0402_6.3V4Z

C1240

1

2

1U_0402_6.3V4Z

VGA@

4.99K_0402_1%

VGA@

C1226

C1241

1

2

1U_0402_6.3V4Z

VGA@

12

R929

VGA@

1U_0402_6.3V4Z

C1227

C1228

1

2

1U_0402_6.3V4Z

2

R921

4.99K_0402_1%

VGA@

1

C1217

2

VGA@

1U_0402_6.3V4Z

C1242

1

2

VGA@

0.1U_0402_10V6K

VGA@

+1.5VS

C1229

1U_0402_6.3V4Z

VGA@

12

R922

4.99K_0402_1%

VGA@

0.1U_0402_10V6K

12

R930

4.99K_0402_1%

VGA@

1U_0402_6.3V4Z

C1230

C1243

C1231

1

2

C1231

1

2

1U_0402_6.3V4Z

VGA@

Title

Size Document Number Rev

Date: Sheet

1

C1218

4.99K_0402_1%

2

VGA@

1U_0402_6.3V4Z

C1232

C1244

C1233

1

2

C1233

1

2

1U_0402_6.3V4Z

VGA@

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

R931

1U_0402_6.3V4Z

C1245

C1234

1

2

1U_0402_6.3V4Z

1

12

R923

4.99K_0402_1%

VGA@

12

VGA@

C1235

1

2

VGA@

C1219

C1236

1

2

18 49Monday, May 04, 2009

0.1U_0402_10V6K

1

2

VGA@

A

of

5

hexainf@hotmail.com

4

3

2

1

CONFIGURATION STRAPS

STRAPS

R948

R948 10K_0402_5%

10K_0402_5%

VGA@

12

R949

R949 10K_0402_5%

10K_0402_5%

VGA@

2N7002DW-T/R7_SOT363-6

VGA@

C1248

VGA@

GPU_GPIO0 GPU_GPIO1 GPU_GPIO2 SOUT_GPIO8

GPU_GPIO9 GPU_GPIO11 GPU_GPIO12 GPU_GPIO13

+3VS

2

6 1

Q75A

2N7002DW-T/R7_SOT363-6

VGA@

+3.3V_DELAY

2

1

ADM1032ARMZ REEL_MSOP8

VGA@

3

1 2 3

GPU_GPIO0<15> GPU_GPIO1<15> GPU_GPIO2<15> SOUT_GPIO8<15>

D D

C C

GPU_GPIO9<15> GPU_GPIO11<15> GPU_GPIO12<15> GPU_GPIO13<15>

VGA_CRT_VSYNC<15,23> VGA_CRT_HSYNC<15,23>

VSYNC_DAC2<15> HSYNC_DAC2<15>

EC_SMB_CK2_PX

EC_SMB_DA2_PX

+3.3V_DELAY

12

VGA Thermal Sensor

0.1U_0402_16V4Z

GPU_THERMAL_D+<15>

B B

GPU_THERMAL_D-<15>

C1249 2200P_0402_50V7KVGA@C1249 2200P_0402_50V7KVGA@

1 2

R936 10K_0402_5%@R936 10K_0402_5%@ R937 10K_0402_5%@R937 10K_0402_5%@ R938 10K_0402_5%@R938 10K_0402_5%@ R939 10K_0402_5%@R939 10K_0402_5%@

R940 10K_0402_5%@R940 10K_0402_5%@ R941 10K_0402_5%R941 10K_0402_5% R942 10K_0402_5%@R942 10K_0402_5%@ R943 10K_0402_5%@R943 10K_0402_5%@

R944 10K_0402_5%R944 10K_0402_5% R945 10K_0402_5%R945 10K_0402_5% R946 10K_0402_5%@R946 10K_0402_5%@ R947 10K_0402_5%@R947 10K_0402_5%@

GPIO5_AC_BATT TEST

5

4

Q75B

Closed to GPU

U69

VDD D+ DTHERM#4GND

SCLK

SDATA

ALERT#

8 7 6 5

12 12 12 12

EC_SMB_CK2 <6,33>

EC_SMB_DA2 <6,33>

+3.3V_DELAY

EC_SMB_CK2_PX EC_SMB_DA2_PX

1 2

R950 4.7K_0402_5%VGA@R950 4.7K_0402_5%VGA@

VSYNC_DAC1 and HSYNC_DAC1 pull up to HDMI & DISPLAYPORT AUDIO funciton

VRAM_ID0=VRAM_ID0_0 VRAM_ID1=VRAM_ID1_1

THM_ALERT# <15>

+3.3V_DELAY

VRAM_ID2=VRAM_ID2_2 VRAM_ID3=VRAM_ID3_3

Change to SA010320120

R951 10K_0402_5%@R951 10K_0402_5%@

12

+1.8VS

VRAM_ID0 <15> VRAM_ID1 <15>

R952 10K_0402_5%@R952 10K_0402_5%@

12

+1.8VS

VRAM_ID[3:0]

DVPDATA (3,2,1,0)

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS

GPIO0 PCIE FULL TX OUTPUT SWINGTX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

BIF_GEN2_EN_A

BIF_CLK_PM_EN

BIF_RX_PLL_CALIB_BP

BIOS_ROM_EN

VIP_DEVICE_STRAP_ENA V2SYNC

SMS_EN_HARD

AUD[1]

GPIO2

GPIO8

GPIO9 VGA ENABLEDBIF_VGA DIS

GPIO21

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0)

H2SYNC

GENERICC 0CCBYPASS

HSYNC VSYNCAUD[0]

DESCRIPTION OF DEFAULT SETTINGSPIN

PCIE GNE2 ENABLED

BIF_CLK_PM_EN 0

BIF_RX_PLL_CALIB_BP

ENABLE EXTERNAL BIOS ROM

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT IGNORE VIP DEVICE STRAPS

AUD[1] AUD[0] 0 0 No audio function 0 1 Audio for DisplayPort and HDMI if dongle is detected 1 0 Audio for DisplayPort only 1 1 Audio for both DisplayPort and HDMI

AMD RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GENERICC

H2SYNC

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

GPIO21_BB_EN

Vendor Part Number#STRAPS

Samsung 64Mx16 1.5V

Hynix 64Mx16 1.5V

Compal Part Number#

SA000035700

SA000032400

GPU

M92 S2-LP

Project

JM51_PU

GPIO_28_TDO

VRAM size

512MB(x4)

RECOMMENDED SETTINGS

1

0 0

1

010

0

X X

VRAM_ID 3,2,1,0

0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1

Internal pull low

12

R953 10K_0402_5%@R953 10K_0402_5%@

A A

5

+1.8VS

VRAM_ID2 <15> VRAM_ID3 <15>

R954 10K_0402_5%@R954 10K_0402_5%@

12

+1.8VS

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/10/11 200810/11

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

19 49Monday, May 04, 2009

A

of

5

+1.2V_HT

FBMA-L11-201209-221LMA30T_0805

D D

C518

27P_0402_50V8J

C C

+VDDCLK_IO

L39

1 2

1

2

1

C432

2

22U_0805_10V4Z

CLK_XTAL_OUT CLK_XTAL_IN

Y1

12

14.31818MHZ_20P_6X14300202

1

C517

C517 27P_0402_50V8J

27P_0402_50V8J

2

0.1U_0402_16V4Z

1

C471

2

0.1U_0402_16V4Z

+3VS

FBMA-L11-201209-221LMA30T_0805

+3VS_CLK

0.1U_0402_16V4Z

C475

1 2

22U_0805_10V4Z

+3VS_CLK

1

C516

2

0.1U_0402_16V4Z

L40

C500 0.1U_0402_16V4ZC500 0.1U_0402_16V4Z

+3VS_CLK

0.1U_0402_16V4Z

1

C530

2

+3VS_CLKVDDA

1

C463

2

+VDDCLK_IO

Routing the trace at least 10mil

ESD

FBMA-L11-160808-601LMT 0603

C41 0.1U_0402_16V4ZC41 0.1U_0402_16V4Z

LAN WWAN WLAN

12

LAN_CLKREQ#<31> WWAN_CLKREQ#<31> MINI1_CLKREQ#<31>

1 2

R175 8.2K_0402_5%R175 8.2K_0402_5%

1 2

R219 8.2K_0402_5%R219 8.2K_0402_5%

FBMA-L11-160808-601LMT 0603

1 2

R176 8.2K_0402_5%R176 8.2K_0402_5%

CLK_NB_14.318M

1.1V 158R/90.0RRS780

For Tigris

SB710_CLK_14M<24>

CLK_NB_14.318M<11>

B B

+3VS_CLK

R200

8.2K_0402_5%

@

1 2

R186

8.2K_0402_5%

A A

1 2

R187 90.9_0402_1%R187 90.9_0402_1%

R198

8.2K_0402_5%

1 2

SEL_SATA 27M_SEL

1 2

R201 158_0402_1%R201 158_0402_1%

CLK_48M_SD<30>

CLK_48M_USB<25>

C870 22P_0402_50V8J@ C870 22P_0402_50V8J@

R185 33_0402_5%R185 33_0402_5%

CLK_14.318M

12

R676 22_0402_5%R676 22_0402_5% R209 33_0402_5%R209 33_0402_5%

4

0.1U_0402_16V4Z

1

C527

C529

2

1

C473

0.1U_0402_16V4Z

2

12

L45

1 2

12

C538 0.1U_0402_16V4ZC538 0.1U_0402_16V4Z

27M_SEL SEL_SATA

12

For EMI

CLK_48MHZ

12

CLK_48M

12

CLK_XTAL_IN CLK_XTAL_OUT

1st (SILEGO) : SA00001Z310 S IC SLG8SP626VTR QFN 72P CLK GEN 2nd (ICS) : SA000023H10 S IC ICS9LPRS488CKLFT MLF 72P CLK GEN

+3VS

FBMA-L11-201209-221LMA30T_0805

U18

ICS 9LPRS488

49 48

62 66

12 18 28 37 53

17 29 38 44 54 61 69

24 51 50 43 42

63 64 65

71 70

67 68

11 19 27 36 47 52 58 72 73

ICS 9LPRS488

VDDA GNDA

VDDREF GNDREF

VDDSRC_IO VDDSRC_IO VDDATIG_IO VDDSB_SRC_IO VDDCPU_IO

3

VDDDOT VDDSRC VDDATIG VDDSB_SRC VDDSATA VDDCPU VDDHTT VDD48

CLKREQ0 # CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

REF2/SEL_27 REF1/SEL_SATA REF0/SEL_HTT66

48MHz_0 48MHz_1

X1 X2

6

GNDDOT GNDSRC GNDSRC GNDATIG GNDSB_SRC GNDSATA GNDCPU GNDHTT GND48 GNDPAD

SLG8SP626VTR_QFN72_10x10

+3VS_CLK

L41

1 2

SB_SRC_SLOW#

CPUKG0T_LPRS

CPUKG0C_LPRS

HTT0T_LPRS / 66 M HTT0C_LPRS / 66 M

SB_SRC0T_LPRS SB_SRC0C_LPRS

SB_SRC1T_LPRS SB_SRC1C_LPRS

ATIG0T_LPRS ATIG0C_LPRS

ATIG1T_LPRS ATIG1C_LPRS

ATIG2T_LPRS ATIG2C_LPRS

SRC0T_LPRS SRC0C_LPRS

SRC1T_LPRS SRC1C_LPRS

SRC2T_LPRS SRC2C_LPRS

SRC3T_LPRS SRC3C_LPRS

SRC4T_LPRS SRC4C_LPRS

SRC5T_LPRS SRC5C_LPRS

SRC6T/SATAT_LPRS

SRC6C/SATAC_LPRS

SRC7T_LPRS/27MHz_SS SRC7C_LPRS/27MHz_NS

SMBCLK SMBDAT

PD#

1

2

C483

C483 22U_0805_10V4Z

22U_0805_10V4Z

0.1U_0402_16V4Z

1 2

SRC_SLOW

41

CPUCLK_EXT_R

56

CPUCLK#_EXT_R

55

60 59

40 39

35 34

33 32

31 30

26 25

23 22

21 20

16 15

14 13

10 9

8 7

46 45

5 4

57

3

0.1U_0402_16V4Z

1

C476

2

R428

R428 R429

R429

CLK_SRC7T CLK_SRC7C

R210 0_0402_5%@R210 0_0402_5%@ R461 0_0402_5%

R461 0_0402_5%

R184 8.2K_0402_5%R184 8.2K_0402_5%

12

1

C480

2

0.1U_0402_16V4Z

SB_CK_SCLK <8,9,25,31>

SB_CK_SDAT <8,9,25,31>

47.5_0402_1%

1 2 1 2

47.5_0402_1%

1 2 1 2

VGA@

+3VS_CLK

1

C526

2

261_0402_1%

1 2

0.1U_0402_16V4Z

1

C479

2

R430

2

0.1U_0402_16V4Z

1

C498

2

0.1U_0402_16V4Z

CLK_NBHT <11> CLK_NBHT# <11>

CLK_NBGFX <11> CLK_NBGFX# <11>

CLK_PCIE_VGA <14> CLK_PCIE_VGA# <14>

CLK_PCIE_LAN <31> CLK_PCIE_LAN# <31>

CLK_PCIE_WWAN <31> CLK_PCIE_WWAN# <31>

CLK_PCIE_MINI1 <31> CLK_PCIE_MINI1# <31>

CLK_SBLINK_BCLK <11> CLK_SBLINK_BCLK# <11>

CLK_SBSRC_BCLK <24> CLK_SBSRC_BCLK# <24>

27M_SSC <15> 27M_NSSC <15>

NB GFX

0.1U_0402_16V4Z

1

2

1

C477

C511

CLK_CPU_BCLK <6> CLK_CPU_BCLK# <6>

C477

2

0.1U_0402_16V4Z

CPU

VGA

GLAN

WWAN

WLAN

NB A LINK

SB RCLK

NB CLOCK INPUT TABLE

NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF

VGA (Spread spectrum) VGA (Non spread spectrum)

1

2

C508

1

C528

2

0.1U_0402_16V4Z

1

C474

C474 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

1U CLOSE PIN 69

+3VS_CLK

12

R178

8.2K_0402_5%

SRC_SLOW

12

R177

@

8.2K_0402_5%

RS740 RX780 RS780

66M SE(SINGLE END)

NC

14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref

100M DIFF NC 100M DIFF

100M DIFF 100M DIFF

100M DIFF(IN/OUT)*

NC

SEL_HTT66

SEL_SATA

* default

1

single-ended 66MHz HTT output

*0

differential 100MHz HTT output

1*

NON SPREAD 100M SATA SRC6 output SPREAD 100M SATA SRC6 output

0

5

27M_SEL

NON SPREAD 27M and SPREAD 27M output1*

differential spread SRC_7 output

0

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

20 49Monday, May 04, 2009

1

of

A

5

hexainf@hotmail.com

4

3

2

1

+LCDVDD

12

R254

R254 300_0603_5%

300_0603_5%

D D

2N7002DW-T/R7_SOT363-6

R36

R35

R36

1 2

UMA_ENVDD_R<11>

VGA_ENVDD<15>

Q32A

0_0402_5%UMA@

1 2

R508

2.7K_0402_5%

UMA@

0_0402_5%VGA@

10K_0402_5%

61

R251

VGA@

AMD Vari bright function

C C

R500 0_0402_5%@R500 0_0402_5%@

VGA_DPST<15>

UMA_ENBKL<11>

B B

USB20_N3<25>

USB20_P3<25>

A A

USB20_N3

USB20_P3

W=40mils

C581

470P_0402_50V7K

1 2 1 2

R502 0_0402_5%@R502 0_0402_5%@

Add D2<SC300000B00> for ESD 20081114

USB20_P3_1

1

2

6

5

+3VS

4

Add L8<SM0700001310> for EMI 20081114

R147 0_0402_5%@R147 0_0402_5%@

L17

4

1

WCM2012F2S-900T04_0805

R146 0_0402_5%@R146 0_0402_5%@

+INVPWR_B+

L47

KC FBM-L11-201209-221LMAT_0805@

L46

KC FBM-L11-201209-221LMAT_0805

1

C580

C580 100P_0402_50V8J

100P_0402_50V8J

2

5

D2

CH3

Vp

CH4

CM1293-04SO_SOT23-6@D2CM1293-04SO_SOT23-6@

1 2

4

1

1 2

2

12

R504

4.7K_0402_5%@

3

2

LCD POWER CIRCUIT

+3VALW

12

R252

R252 100K_0402_5%

100K_0402_5%

CH2

CH1

2

5

12

+3VS

12

61

Q52A

2N7002DW-T/R7_SOT363-6@

3

2

Vn

1

3

2

12

R253 1K_0402_5%R253 1K_0402_5%

3

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q32B

Q32B

4

R501

4.7K_0402_5%@

5

+INVPWR_B+

USB20_N3_1

USB20_N3_1 USB20_P3_1

B+

+3VS

12

3

4

12

1

C578

0.1U_0402_16V4Z

2

R503

4.7K_0402_5%@

INVT_PWM_R

@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q52B

Q52B

LCD/PANEL BD. Conn.

+3VS

I2CC_SCL I2CC_SDA

TZOUT0TZOUT0+

TZOUT1+ TZOUT1-

TZOUT2+ TZOUT2-

TZCLKTZCLK+

Camera

4

+3VS

S

G

2

D

1 3

1

C582

4.7U_0805_10V4Z

2

40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10

W=60mils

AO3413_SOT23-3

AO3413_SOT23-3 Q33

Q33

+LCDVDD

BKOFF#<33>

JLVDS1

GND42GND 40

39

38

37

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

8

6

4

2

ACES_88242-4001

CONN@

1

C579

4.7U_0805_10V4Z

2

1

C583

0.1U_0402_16V4Z

2

41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11 9

9

7

5

3

1

TZOUT0+ TZOUT0-

TZOUT1+ TZOUT1- VGA_TZOUT1-

TZOUT2+

W=60mils

+3VS

12

R255

4.7K_0402_5%

D24

RB751V_SOD323

21

DAC_BRIG INVT_PWM_R DISPOFF#

+LCDVDD

W=60mils

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2+ TXOUT2-

TXCLKTXCLK+

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4.7K_0402_5%

1 2

R514

R514 0_0402_5%

0_0402_5%

+3VS

3

DISPOFF#

DAC_BRIG <33> INVT_PWM <33>

2008/10/06 2009/10/06

TZOUT2TZCLK+

TZCLK-

TXOUT0+ TXOUT0-

TXOUT1+ TXOUT1-

TXOUT2TXOUT2+

TXCLK+ TXCLK-

+3VS

Q50A

2

2N7002DW-T/R7_SOT363-6

VGA@

6 1

5

I2CC_SCL I2CC_SDA

TXOUT0TXOUT0+

TXOUT1TXOUT1+

TXOUT2+ TXOUT2-

TXCLKTXCLK+

TZOUT0TZOUT0+

TZOUT1TZOUT1+

TZOUT2TZOUT2+

TZCLKTZCLK+

DAC_BRIG

C587 220P_0402_50V8JC587 220P_0402_50V8J

INVT_PWM

C586 220P_0402_50V8JC586 220P_0402_50V8J

DISPOFF#

C588 220P_0402_50V8JC588 220P_0402_50V8J

Compal Secret Data

Deciphered Date

1 2 1 2 1 2

2 3 1 4

RP41 0_0404_4P2R_5%@RP41 0_0404_4P2R_5%@

1 4 2 3

RP43 0_0404_4P2R_5%@RP43 0_0404_4P2R_5%@

1 4 2 3

RP40 0_0404_4P2R_5%@RP40 0_0404_4P2R_5%@

1 4 2 3

RP42 0_0404_4P2R_5%@RP42 0_0404_4P2R_5%@

1 4 2 3

RP21 0_0404_4P2R_5%VGA@RP21 0_0404_4P2R_5%VGA@

1 4 2 3

RP22 0_0404_4P2R_5%VGA@RP22 0_0404_4P2R_5%VGA@

1 4 2 3

RP23 0_0404_4P2R_5%VGA@RP23 0_0404_4P2R_5%VGA@

1 4 2 3

RP20 0_0404_4P2R_5%VGA@RP20 0_0404_4P2R_5%VGA@

4

Q50B

Q50B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

VGA@

3

1 4 2 3

RP15 0_0404_4P2R_5%UMA@RP15 0_0404_4P2R_5%UMA@

1 4 2 3

RP19 0_0404_4P2R_5%UMA@RP19 0_0404_4P2R_5%UMA@

1 4 2 3

RP18 0_0404_4P2R_5%UMA@RP18 0_0404_4P2R_5%UMA@

1 4 2 3

RP17 0_0404_4P2R_5%UMA@RP17 0_0404_4P2R_5%UMA@

1 4 2 3

RP16 0_0404_4P2R_5%UMA@RP16 0_0404_4P2R_5%UMA@

1 4 2 3

RP5 0_0404_4P2R_5%@RP5 0_0404_4P2R_5%@

2 3 1 4

RP6 0_0404_4P2R_5%@RP6 0_0404_4P2R_5%@

2 3 1 4

RP7 0_0404_4P2R_5%@RP7 0_0404_4P2R_5%@

2 3 1 4

RP8 0_0404_4P2R_5%@RP8 0_0404_4P2R_5%@

2

VGA_TZOUT0+ VGA_TZOUT0-

VGA_TZOUT1+

VGA_TZOUT2+ VGA_TZOUT2-

VGA_TZCLK+ VGA_TZCLK-

VGA_TXOUT0+ VGA_TXOUT0-

VGA_TXOUT1+ VGA_TXOUT1-

VGA_TXOUT2VGA_TXOUT2+

VGA_TXCLK+ VGA_TXCLK-

GMCH_LCD_CLK GMCH_LCD_DATA

GMCH_TXOUT0GMCH_TXOUT0+

GMCH_TXOUT1GMCH_TXOUT1+

GMCH_TXOUT2+ GMCH_TXOUT2-

GMCH_TXCLKGMCH_TXCLK+

GMCH_TZOUT0GMCH_TZOUT0+

GMCH_TZOUT1GMCH_TZOUT1+

GMCH_TZOUT2GMCH_TZOUT2+

GMCH_TZCLKGMCH_TZCLK+

Title

Size Document Number Rev

B

Date: Sheet of

VGA_TZOUT0+ <15> VGA_TZOUT0- <15>

VGA_TZOUT1+ <15> VGA_TZOUT1- <15>

VGA_TZOUT2+ <15> VGA_TZOUT2- <15>

VGA_TZCLK+ <15> VGA_TZCLK- <15>

VGA_TXOUT0+ <15> VGA_TXOUT0- <15>

VGA_TXOUT1+ <15> VGA_TXOUT1- <15>

VGA_TXOUT2- <15> VGA_TXOUT2+ <15>

VGA_TXCLK+ <15> VGA_TXCLK- <15>

VGA_LCD_CLK <15> VGA_LCD_DATA <15>

GMCH_LCD_CLK <11> GMCH_LCD_DATA <11>

GMCH_TXOUT0- <11> GMCH_TXOUT0+ <11>

GMCH_TXOUT1- <11> GMCH_TXOUT1+ <11>

GMCH_TXOUT2+ <11> GMCH_TXOUT2- <11>

GMCH_TXCLK- <11> GMCH_TXCLK+ <11>

GMCH_TZOUT0- <11>

GMCH_TZOUT0+ <11>

GMCH_TZOUT1- <11>

GMCH_TZOUT1+ <11>

GMCH_TZOUT2- <11>

GMCH_TZOUT2+ <11>

GMCH_TZCLK- <11>

GMCH_TZCLK+ <11>

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

21 49Monday, May 04, 2009

1

A

5

4

3

2

1

DDC to HDMI CONN

R114

D D

0.1U_0402_16V4Z

C C

C751

JM@ C751

JM@

GMCH_HDMI_CLK<11>

VGA_HDMI_SCLK<15>

GMCH_HDMI_DATA<11>

VGA_HDMI_SDATA<15>

1

5

2

P

OE#

A2Y

G

JM@ U28

JM@

3

SN74AHCT1G125GW_SOT353-5

4

U28

HDMI_DET

UMA_H@

1 2

R124 0_0402_5%

UMA_H@

1 2

R121 0_0402_5%

JM@ R352

JM@

2.2K_0402_5%

12

VGA@

12

+3VS

R352

HDMI_DET <11,15>

10K_0402_5%

R132

12

VGA@

R116

12

10K_0402_5%

UMA_H@

R354

JM@ R354

JM@

1 2

100K_0402_5%

+3VS+3VS_DELAY

R128

12

4.7K_0402_5%

VGA_HDMI_SCLK

UMA_H@

VGA_HDMI_SDATA

HDMI_HPD

1

C749

@

0.1U_0402_16V4Z

2

G

S

G

2

JM@

BSH111 1N_SOT23-3

13

D

S

D

S

Q10

JM@

Q10

JM@

BSH111 1N_SOT23-3

Close to NB Close to GPU

HDMI_CLK-_VGA<15>

R155

HDMI_CLK+_VGA<15>

HDMI_TX0-_VGA<15>

HDMI_TX0+_VGA<15>

HDMI_TX1-_VGA<15> HDMI_TX1+_VGA<15>

HDMI_TX2-_VGA<15> HDMI_TX2+_VGA<15>

12

R152

UMA_H@

715_0402_1%

HDMICLKHDMICLK+

HDMITX0HDMITX0+

HDMITX1HDMITX1+

HDMITX2HDMITX2+

HDMI_TX2HDMI_TX2+HDMI_CLK+

R158

UMA_H@

715_0402_1%

12

R157

UMA_H@

715_0402_1%

UMA_H@

C98 0.1U_0402_16V7K

PCIE_MTX_GRX_N3<10> PCIE_MTX_GRX_P3<10>

PCIE_MTX_GRX_N2<10>

PCIE_MTX_GRX_P2<10>

PCIE_MTX_GRX_N1<10> PCIE_MTX_GRX_P1<10>

B B

PCIE_MTX_GRX_N0<10> PCIE_MTX_GRX_P0<10>

HDMI_CLK- HDMI_TX0-

12

R141

715_0402_1%

12

UMA_H@

1 2

C97 0.1U_0402_16V7K

1 2

UMA_H@

C100 0.1U_0402_16V7K

1 2

C99 0.1U_0402_16V7K

1 2

UMA_H@

C102 0.1U_0402_16V7K

1 2

C101 0.1U_0402_16V7K

1 2

UMA_H@

C104 0.1U_0402_16V7K

1 2

C103 0.1U_0402_16V7K

1 2

UMA_H@

HDMI_TX0+

UMA_H@

R137

R137 715_0402_1%

715_0402_1%

UMA_H@

715_0402_1%

R149

12

HDMI_TX1HDMI_TX1+

UMA_H@

715_0402_1%

R145

UMA_H@

715_0402_1%

UMA_H@

1 2

R315 0_0402_5%

1 2

R314 0_0402_5%

UMA_H@

1 2

R313 0_0402_5%

1 2

R312 0_0402_5%

UMA_H@

1 2

R311 0_0402_5%

1 2

R310 0_0402_5%

UMA_H@

1 2

R309 0_0402_5%

1 2

R307 0_0402_5%

UMA_H@

Update (For Puma / Tigris default value)

UMA use 715 ohm VGA use 499 ohm

+HDMI_5V_OUT+3VS

12

R332

R326

2

13

D

Q13

JM@ R326

JM@

2K_0402_5%

HDMI_SDATA

JM@ R332

JM@

Place closed to JHDMI1

D17

JM@ D17

JM@

+HDMI_5V_OUT_1

2 1

+5VS

RB491D_SC59-3

VGA@

C708 0.1U_0402_16V7K

1 2

C707 0.1U_0402_16V7K

1 2

VGA@

C705 0.1U_0402_16V7K

1 2

C704 0.1U_0402_16V7K

1 2

VGA@

C701 0.1U_0402_16V7K

1 2

C700 0.1U_0402_16V7K

1 2

VGA@

C699 0.1U_0402_16V7K

1 2

C698 0.1U_0402_16V7K

1 2

VGA@

2K_0402_5%

HDMI_SCLK

F2

JM@ F2

JM@

21

1.1A_6VDC_FUSE

HDMI_CLKHDMI_CLK+

HDMI_TX0HDMI_TX0+

HDMI_TX1HDMI_TX1+

HDMI_TX2HDMI_TX2+

+HDMI_5V_OUT+HDMI_5V_OUT

W=40mils

1

C743

JM@

0.1U_0402_16V4Z

2

+HDMI_5V_OUT

HDMI_SDATA HDMI_SCLK HDMI_HPD

HDMI_R_CKHDMI_R_CK+

HDMI_R_D0-

HDMI_R_D0+

HDMI_R_D1-

HDMI_R_D1+

HDMI_R_D2-

HDMI_R_D2+

HDMI_CLK+

HDMI_CLK-

HDMI_TX0+

HDMI_TX0-

HDMI_TX1+

HDMI_TX1-

HDMI_TX2+

HDMI_TX2-

DIP

JHDMI1

18

+5V

16

SDA

15 19

12 10

9 7 6 4 3 1

1

4

1

4

1

4

1

4

Reserved

SCL HP_DET

CKCK+ D0D0+ D1D1+ D2D2+

DDC/CEC_GND

SUYIN_100042MR019S153ZL

CONN@

1 2

R340 0_0402_5%@R340 0_0402_5%@ WCM-2012-900T_0805

WCM-2012-900T_0805

1

4

L72

JM@ L72

JM@

1 2

R333 0_0402_5%@R333 0_0402_5%@

1 2

R342 0_0402_5%@R342 0_0402_5%@ WCM-2012-900T_0805

WCM-2012-900T_0805

1

4

L73

JM@ L73

JM@

1 2

R341 0_0402_5%@R341 0_0402_5%@

1 2

R344 0_0402_5%@R344 0_0402_5%@ WCM-2012-900T_0805

WCM-2012-900T_0805

1

4

L74

JM@ L74

JM@

1 2

R343 0_0402_5%@R343 0_0402_5%@

1 2

R346 0_0402_5%@R346 0_0402_5%@ WCM-2012-900T_0805

WCM-2012-900T_0805

1

4

L75

JM@ L75

JM@

1 2

R345 0_0402_5%@R345 0_0402_5%@

13

CEC

14 2

GND

5

GND

8

GND

11

GND

20

GND

21

GND

22

GND

23

GND

17

HDMI_R_CK+

2

3

HDMI_R_CK-

HDMI_R_D0+

2

3

HDMI_R_D0-

HDMI_R_D1+

2

3

HDMI_R_D1-

HDMI_R_D2+

2

3

HDMI_R_D2-

+3VS

R505 0_0402_5%

+5VS

5

R505 0_0402_5%

1 2 1 2

R506 0_0402_5%

JM@

JM@ @

@

A A

61

2

JM@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q53A

Q53A

3

5

4

JM@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q53B

Q53B

61

2

JM@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q54A

Q54A

4

3

5

4

JM@

2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6 Q54B

Q54B

DVT

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

22 49Monday, May 04, 2009

1

of

A

hexainf@hotmail.com

B

C

D

E

CRT CONNECTOR

DDCDATA

HSYNC

VSYNC

DDCCLK

3

C622

+CRT_VCC

10K_0402_5%

5

Q6B

VGA@

+CRT_VCC+5VS

1

2

R269

R269 100K_0402_5%

100K_0402_5%

1 2

+3VS_DELAY

R55

VGA@

4

JCRT1

6

11

1 7

12

2 8

13

3 9

14

4 10 15

5

SUYIN_070546FR015S297ZR

CONN@

CRT_DET# <25>

12

G

G G

G

12

R48

R48 10K_0402_5%

10K_0402_5%

VGA@

16 17

VGA_CRT_DATA <15>

VGA_CRT_CLK <15>

D27

D28

D28 DAN217_SC59

DAN217_SC59

1 1

C662

UMA@

5P_0402_50V8C

1

2

HSYNC_L

VSYNC_L

L57 FCM2012C-800_0805L57 FCM2012C-800_0805

1 2

L54 FCM2012C-800_0805L54 FCM2012C-800_0805

1 2

L52 FCM2012C-800_0805L52 FCM2012C-800_0805

1 2

C667

UMA@

5P_0402_50V8C

R479

1 2

10K_0402_5%

L50 FCM1608C-121T_0603L50 FCM1608C-121T_0603

1 2

L51 FCM1608C-121T_0603L51 FCM1608C-121T_0603

1 2

UMA@

GMCH_CRT_R<11>

GMCH_CRT_G<11>

GMCH_CRT_B<11>

DVT

VGA_CRT_R<15>

VGA_CRT_G<15>

VGA_CRT_B<15>

2 2

3 3

12

R291 0_0402_5%

UMA@

12

R277 0_0402_5%

UMA@

12

R274 0_0402_5%

VGA@

12

R493 0_0402_5%

VGA@

12

R495 0_0402_5%

VGA@

12

R494 0_0402_5%

GMCH_CRT_HSYNC<11,13>

VGA_CRT_HSYNC<15,19>

GMCH_CRT_VSYNC<11,13>

VGA_CRT_VSYNC<15,19>

CRT_R

CRT_G

CRT_B

R285

UMA@

12

R325 0_0402_5%

VGA@

12

R507 0_0402_5%

UMA@

12

R327 0_0402_5%

VGA@

12

R511 0_0402_5%

12

R276

140_0402_1%

UMA@

12

R273

150_0402_1%

12

C633

150_0402_1%

1 2

C674

0.1U_0402_16V4Z

1 2

C678

0.1U_0402_16V4Z

1

C640

2

UMA@

5P_0402_50V8C

+CRT_VCC

1

5

P

4

OE#

A2Y

G

U33

U33 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

5

1

P

4

OE#

A2Y

G

U34

U34 SN74AHCT1G125GW_SOT353-5

SN74AHCT1G125GW_SOT353-5

3

D27 DAN217_SC59

DAN217_SC59

1

2

3

1

C660

2

6P_0402_50V8K

UMA@

HSYNC

VSYNC

DDCDATA

DDCCLK

1

2

CRT_R_1

CRT_G_1

CRT_B_1

C639

6P_0402_50V8K

UMA@

D26

D26 DAN217_SC59

DAN217_SC59

3

1

2

R57

33_0402_5%

R44

33_0402_5%

2

6P_0402_50V8K

UMA@

1

3

4.7K_0402_5%

12

DDCDATA_R

DDCCLK_R

+3VS

L58 FCM2012C-800_0805L58 FCM2012C-800_0805

1 2

L55 FCM2012C-800_0805L55 FCM2012C-800_0805

1 2

L53 FCM2012C-800_0805L53 FCM2012C-800_0805

1 2

R54

UMA@

+CRT_VCC

Place closed to chipset

+CRT_VCC

12

2N7002DW-T/R7_SOT363-6

D25

2 1

RB491D_SC59-3

CRT_R_2

CRT_G_2

CRT_B_2

R46

4.7K_0402_5%

UMA@

6 1

Q6A

VGA@

W=40mils

0.1U_0402_16V4Z

+3VS

2

2N7002DW-T/R7_SOT363-6

1 2

R58 0_0402_5%

UMA@

1 2

R47 0_0402_5%

UMA@

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

D

DVT

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

GMCH_CRT_DATA <11>

GMCH_CRT_CLK <11>

23 49Monday, May 04, 2009

E

A

1 1

PCIE_CALRP=W/S=4/8(55ohm impedance), <1" PCIE_CALRN=W/S=4/8(55ohm impedance), <1"

+3VALW

C798

12

0.1U_0402_16V4Z

R426

8.2K_0402_5%

@

1 2

0.1U_0402_16V4Z

A_RST#

2 2

3 3

2

B

1

A

5

U30

NC7SZ08P5X_NL_SC70-5

P

PLT_RST#

4

Y

G

3

12

R373

R373 100K_0402_5%

100K_0402_5%

SB_RX0P<10> SB_RX0N<10> SB_RX1P<10> SB_RX1N<10> SB_RX2P<10> SB_RX2N<10> SB_RX3P<10> SB_RX3N<10>

SB_TX0P<10> SB_TX0N<10> SB_TX1P<10> SB_TX1N<10> SB_TX2P<10> SB_TX2N<10> SB_TX3P<10> SB_TX3N<10>

+PCIE_VDDR

+1.2V_HT

1 2

MBC1608121YZF_0603

2.2U_0603_6.3V4Z

PLT_RST# <11,13,14,31,33>

C853 100P_0402_25V8K@C853 100P_0402_25V8K@

SB710_CLK_14M<20>

Close to SB

R380 20M_0402_5%@ R380 20M_0402_5%@

1 2

C779

1 2

18P_0402_50V8J

20M_0603_5%

18P_0402_50V8J

4 4

R382

C787

1 2

12

A

Y4

4

OUT

NC

1

IN

NC

32.768KHZ_12.5P_MC-306

SB_32KHI

3 2

SB_32KHO

B

C468 0.1U_0402_16V7KC468 0.1U_0402_16V7K

1 2

C465 0.1U_0402_16V7KC465 0.1U_0402_16V7K

1 2

C459 0.1U_0402_16V7KC459 0.1U_0402_16V7K

1 2

C431 0.1U_0402_16V7KC431 0.1U_0402_16V7K

1 2

C429 0.1U_0402_16V7KC429 0.1U_0402_16V7K

1 2

C430 0.1U_0402_16V7KC430 0.1U_0402_16V7K

1 2

C460 0.1U_0402_16V7KC460 0.1U_0402_16V7K

1 2

C464 0.1U_0402_16V7KC464 0.1U_0402_16V7K

1 2

R356 562_0402_1%R356 562_0402_1% R173 2.05K_0402_1%R173 2.05K_0402_1%

L78

PCIE_PVDD=43mA

C757

CLK_SBSRC_BCLK<20> CLK_SBSRC_BCLK#<20>

12

R470 100_0402_5%

A_RST#

1

C762

1U_0402_6.3V4Z

2

@

12

For Tigris

ALLOW_LDTSTOP<11> H_PROCHOT_R#<6>

H_PWRGD<6> LDT_STOP#<6,11>

LDT_RST#<6>

B

C

U14A

SB_RX0P_C SB_RX0N_C SB_RX1P_C SB_RX1N_C SB_RX2P_C SB_RX2N_C SB_RX3P_C SB_RX3N_C

12 12

+SB_PCIEVDD

SB_32KHI

SB_32KHO

H_PROCHOT_R#

U14A

N2

A_RST#

V23

PCIE_TX0P

V22

PCIE_TX0N

V24

PCIE_TX1P

V25

PCIE_TX1N

U25

PCIE_TX2P

U24

PCIE_TX2N

T23

PCIE_TX3P

T22

PCIE_TX3N

U22

PCIE_RX0P

U21

PCIE_RX0N

U19

PCIE_RX1P

V19

PCIE_RX1N

R20

PCIE_RX2P

R21

PCIE_RX2N

R18

PCIE_RX3P

R17

PCIE_RX3N

T25

PCIE_CALRP

T24

PCIE_CALRN

P24

PCIE_PVDD

P25

PCIE_PVSS

N25

PCIE_RCLKP/NB_LNK_CLKP

N24

PCIE_RCLKN/NB_LNK_CLKN

K23

NB_DISP_CLKP

K22

NB_DISP_CLKN

M24

NB_HT_CLKP

M25

NB_HT_CLKN

P17

CPU_HT_CLKP

M18

CPU_HT_CLKN

M23

SLT_GFX_CLKP

M22

SLT_GFX_CLKN

J19

GPP_CLK0P

J18

GPP_CLK0N

L20

GPP_CLK1P

L19

GPP_CLK1N

M19

GPP_CLK2P

M20

GPP_CLK2N

N22

GPP_CLK3P

P22

GPP_CLK3N

L18

25M_48M_66M_OSC

J21

25M_X1

J20

25M_X2

A3

X1

B3

X2

F23

ALLOW_LDTSTP

F24

PROCHOT#

F22

LDT_PG

G25

LDT_STP#

G24

LDT_RST#

218S7EALA11FG_BGA528_SB700

SB700

Part 1 of 5

PCI EXPRESS INTERFACE

LPC

RTC XTAL

CPU

RTC

PCICLK5/GPIO41

PCI CLKS

PCI INTERFACE

CLOCK GENERATOR

LDRQ1#/GNT5#/GPIO68

BMREQ#/REQ5#/GPIO65

INTRUDER_ALERT#

SA00001S570 S IC 218S7EBLA12FG SB700 BGA 528P SB 0FA

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

D

P4

PCICLK0

P3

PCICLK1

P1

PCICLK2

P2

PCICLK3

T4

PCICLK4

T3

N1

PCIRST#

U2

AD0

P7

AD1

V4

AD2

T1

AD3

V3

AD4

U1

AD5

V1

AD6

V2

AD7

T2

AD8

W1

AD9

T9

AD10

R6

AD11

R7

AD12

R5

AD13

U8

AD14

U5

AD15

Y7

AD16

W8

AD17

V9

AD18

Y8

AD19

AA8

AD20

Y4

AD21

Y3

AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30

AD31 CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0# REQ1# REQ2#

REQ3#/GPIO70 REQ4#/GPIO71

GNT0# GNT1# GNT2#

GNT3#/GPIO72 GNT4#/GPIO73

CLKRUN#

LOCK#

INTE#/GPIO33 INTF#/GPIO34

INTG#/GPIO35

INTH#/GPIO36

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ

RTCCLK

VBAT

2008/10/06 2009/10/06

PCI_AD23

Y2

PCI_AD24

AA2

PCI_AD25

AB4

PCI_AD26

AA1

PCI_AD27

AB3

PCI_AD28

AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5

AD3 AC4 AE2 AE3

CLK_LPC_EC

G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15

C3 C2

R403 1M_0402_5%

B2

C795

1

2

0.1U_0402_16V4Z

Compal Secret Data

R357 22_0402_5%R357 22_0402_5%

@

1 2

C794

1

2

1U_0402_6.3V4Z

Deciphered Date

PCI_AD23 <28> PCI_AD24 <28> PCI_AD25 <28> PCI_AD26 <28> PCI_AD27 <28> PCI_AD28 <28>

1 2

LPC_AD0 <33> LPC_AD1 <33> LPC_AD2 <33> LPC_AD3 <33> LPC_FRAME# <33>

SERIRQ <33>

RTC_CLK <28>

+RTCVCC

1 2

R400 510_0402_5%R400 510_0402_5%

W=20mils

for Clear CMOS

D

CLK_PCI_EC

STRAP PIN

+RTCVCC

R397

@

0_0603_5%

1 2

E

PCI_CLK2 <28> PCI_CLK3 <28> PCI_CLK4 <28> PCI_CLK5 <28>

CLK_PCI_EC <28,33>

LPCCLK1 <28>

C566

Title

Size Document Number Rev

Custom

Date: Sheet

STRAP PIN

D22

3

1

2

0.1U_0402_16V4Z

2

BAS40-04_SOT23-3

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

+RTCBATT

12

R237

R237 1K_0402_5%

1K_0402_5%

1

+CHGRTC

of

24 49Monday, May 04, 2009

E

A

hexainf@hotmail.com

+3VALW

R368

R368 100K_0402_5%

100K_0402_5%

1 2

CRT_DET

13

D

2N7002_SOT23

2

Q37

G

S

SB_PCIE_WAKE#<31>

H_THERMTRIP#<6>

NB_PWRGD<11>

R212 10K_0402_5%@R212 10K_0402_5%@

1 2

R182 10K_0402_5%@R182 10K_0402_5%@

+3VS

1 2

R509 2.2K_0402_5%VGA@R509 2.2K_0402_5%VGA@ R510 2.2K_0402_5%UMA@R510 2.2K_0402_5%UMA@

1 2 1 2

+3VS

CRT_DET#<23>

1 1

+3VS

2 2

1 2

R405 4.7K_0402_5%R405 4.7K_0402_5%

1 2

R404 2.2K_0402_5%R404 2.2K_0402_5%

+3VS

R183 2.2K_0402_5%R183 2.2K_0402_5%

1 2

R179 2.2K_0402_5%R179 2.2K_0402_5%

1 2

SUS_STAT#

EC_RSMRST#

VRAM ID High->HYNIX Low->SAMSUNG

SB_CK_SCLK SB_CK_SDAT

SB_SPKR=W/S=4/4(55ohm impedance)

+3VALW

1 2

R388 10K_0402_5%R388 10K_0402_5%

@

1 2

R379 100K_0402_5%

HDA_BITCLK_AUDIO<36> HDA_SDOUT_AUDIO<36>

HDA_SDIN0<36>

3 3

SB_PCIE_WAKE#

EC_LID_OUT#

R414 33_0402_5%R414 33_0402_5% R416 33_0402_5%R416 33_0402_5%

HDA_SYNC_AUDIO<36>

HDA_RST_AUDIO#<36>

HDA_RST#<28>

1 2 1 2

R412 33_0402_5%R412 33_0402_5%

R408 33_0402_5%R408 33_0402_5%

HDA_BITCLK HDA_SDOUT

1 2

STRAP PIN

+3VALW

12

R435

R435 100K_0402_5%

100K_0402_5%

USB_OC#2

1

C811

0.1U_0402_16V4Z

2

B

demo circuit LID use RI#

EC_SWI#<33>

PM_SLP_S3#<33> PM_SLP_S5#<33> PBTN_OUT#<33> SB_PWRGD<6,35> SUS_STAT#<11>

EC_GA20<33>

EC_KBRST#<33>

EC_SCI#<33> EC_SMI#<33>

EC_RSMRST#<33>

SB700 has internal PD

SB_SPKR<36> SB_CK_SCLK<8,9,20,31> SB_CK_SDAT<8,9,20,31>

EC_LID_OUT#<33>

USB_OC#1<32> USB_OC#0<32>

AMD (un-used)

HDA_SDIN0

CRT_DET

SUS_STAT#

TP13TP13 TP14TP14 TP15TP15

H_THERMTRIP# NB_PWRGD

EC_RSMRST#

LFB_ID SKU_ID

SB_CK_SCLK SB_CK_SDAT

EC_LID_OUT# USB_OC#2

USB_OC#1 USB_OC#0

HDA_SYNC

HDA_RST#

U14D

E1

PCI_PME#/GEVENT4#

E2

RI#/EXTEVNT0#

H7

SLP_S2/GPM9#

F5

SLP_S3#

G1

SLP_S5#

H2

PWR_BTN#

H1

PWR_GOOD

K3

SUS_STAT#

H5

TEST2

H4

TEST1

H3

TEST0

Y15

GA20IN/GEVENT0#

W15

KBRST#/GEVENT1#

K4

LPC_PME#/GEVENT3#

K24

LPC_SMI#/EXTEVNT1#

F1

S3_STATE/GEVENT5#

J2

SYS_RESET#/GPM7#

H6

WAKE#/GEVENT8#

F2

BLINK/GPM6#

J6

SMBALERT#/THRMTRIP#/GEVENT2#

W14

NB_PWRGD

D3

RSMRST#

AE18

SATA_IS0#/GPIO10

AD18

CLK_REQ3#/SATA_IS1#/GPIO6

AA19

SMARTVOLT1/SATA_IS2#/GPIO4

W17

CLK_REQ0#/SATA_IS3#/GPIO0

V17

CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39

W20

CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40

W21

SPKR/GPIO2

AA18

SCL0/GPOC0#

W18

SDA0/GPOC1#

K1

SCL1/GPOC2#

K2

SDA1/GPOC3#

AA20

DDC1_SCL/GPIO9

Y18

DDC1_SDA/GPIO8

C1

LLB#/GPIO66

Y19

SMARTVOLT2/SHUTDOWN#/GPIO5

G5

DDR3_RST#/GEVENT7#

B9

USB_OC6#/IR_TX1/GEVENT6#

B8

USB_OC5#/IR_TX0/GPM5#

A8

USB_OC4#/IR_RX0/GPM4#

A9

USB_OC3#/IR_RX1/GPM3#

E5

USB_OC2#/GPM2#

F8

USB_OC1#/GPM1#

E4

USB_OC0#/GPM0#

M1

AZ_BITCLK

M2

AZ_SDOUT

J7

AZ_SDIN0/GPIO42

J8

AZ_SDIN1/GPIO43

L8

AZ_SDIN2/GPIO44

M3

AZ_SDIN3/GPIO46

L6

AZ_SYNC

M4

AZ_RST#

L5

AZ_DOCK_RST#/GPM8#

H19

IMC_GPIO0

H20

IMC_GPIO1

H21

SPI_CS2#/IMC_GPIO2

F25

IDE_RST#/F_RST#/IMC_GPO3

D22

IMC_GPIO4

E24

IMC_GPIO5

E25

IMC_GPIO6

D23

IMC_GPIO7

218S7EALA11FG_BGA528_SB700

C

SB700

USBCLK/14M_25M_48M_OSC

ACPI / WAKE UP EVENTS

USB OC

HD AUDIO

INTEGRATED uC

Part 4 of 5

USB_RCOMP

USB_FSD13P

USB MISC

USB_FSD13N USB_FSD12P

USB_FSD12N

USB 1.1

USB_HSD11P

USB_HSD11N

USB_HSD10P

USB_HSD10N

USB_HSD9P USB_HSD9N

USB_HSD8P USB_HSD8N

USB_HSD7P USB_HSD7N

USB_HSD6P USB_HSD6N

USB_HSD5P USB_HSD5N

USB_HSD4P

USB 2.0

USB_HSD4N USB_HSD3P

USB_HSD3N

GPIO

USB_HSD2P USB_HSD2N

USB_HSD1P USB_HSD1N

USB_HSD0P USB_HSD0N

IMC_GPIO8 IMC_GPIO9

IMC_PWM0/IMC_GPIO10

SCL2/IMC_GPIO11

SDA2/IMC_GPIO12

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

IMC_PWM1/IMC_GPIO15

IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17

IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25

IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41

D

@

1 2

R376 100_0402_5%

C8

USB_RCOMP

G8

E6 E7

USB20_P12

F7

USB20_N12

E8 H11

J10 E11

F11 A11

B11

USB20_P8

C10

USB20_N8

D10 G11

H12

USB20_P6

E12

USB20_N6

E14

USB20_P5

C12

USB20_N5

D12

USB20_P4

B12

USB20_N4

A12

USB20_P3

G12

USB20_N3

G14

USB20_P2

H14

USB20_N2

H15

USB20_P1

A13

USB20_N1

B13

USB20_P0

B14

USB20_N0

A14 A18

B18 F21 D21 F19 E20 E21 E19 D19 E18

G20 G21 D25 D24 C25 C24 B25 C23

B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18

R376 100_0402_5%

1 2

R37011.8K_0402_1% R37011.8K_0402_1%

USB20_P12 <32> USB20_N12 <32>

USB20_P8 <31> USB20_N8 <31>

USB20_P6 <32> USB20_N6 <32>

USB20_P5 <31> USB20_N5 <31>

USB20_P4 <30> USB20_N4 <30>

USB20_P3 <21> USB20_N3 <21>

USB20_P2 <31> USB20_N2 <31>

USB20_P1 <32> USB20_N1 <32>

USB20_P0 <31> USB20_N0 <31>

GPIO16 <28> GPIO17 <28>

STRAP PIN STRAP PIN

@

C775 100P_0402_25V8K

1 2

CLK_48M_USB <20>

USB-12 Bluetooth

USB-8 MiniCard(WLAN)

USB-6 Int USB 1st (Dedicated HS USB port / lower-left)

USB-5 MiniCard(WWAN) USB-4 USB Card reader USB-3 USB Camera USB-2 Ext USB 4rd USB-1 Int USB 2nd USB-0 Ext USB 3rd

E

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

25 49Monday, May 04, 2009

E

A

1 1

SATA_STX_C_DRX_P0<29> SATA_STX_C_DRX_N0<29>

HDD

SATA_DTX_C_SRX_N0<29> SATA_DTX_C_SRX_P0<29>

SATA_STX_C_DRX_P1<29> SATA_STX_C_DRX_N1<29>

ODD

SATA_DTX_C_SRX_N1<29> SATA_DTX_C_SRX_P1<29>

2 2

3 3

C770

12

10P_0402_50V8J

C772

12

10P_0402_50V8J

+1.2V_HT

+3VS

12

Y325MHZ_20P Y325MHZ_20P

BLM18PG121SN1D_0603

12

R371

R371 10M_0402_5%

10M_0402_5%

L82

L81

SATA_X1

SATA_X2

12

Close chip

C504 0.01U_0402_25V7KC504 0.01U_0402_25V7K

1 2

C507 0.01U_0402_25V7KC507 0.01U_0402_25V7K

1 2

C522 0.01U_0402_25V7KC522 0.01U_0402_25V7K

1 2

C519 0.01U_0402_25V7KC519 0.01U_0402_25V7K

1 2

SATA_CAL=W/S=9/20(35ohm impedance), <1"

R375 1K_0402_1%R375 1K_0402_1%

R377 10K_0402_5%R377 10K_0402_5%

1 2

+3VS

SATA_LED#<35>

+PLLVDD_SATA

PLLVDD_SATA=93mA

2.2U_0603_6.3V4Z

XTLVDD_SATA=6mA

1U_0402_6.3V4Z

C784

C777

1

2

+XTLVDD_SATA

2

1

SATA_STX_DRX_P0 SATA_STX_DRX_N0

SATA_STX_DRX_P1 SATA_STX_DRX_N1

12

1

C783

0.1U_0402_16V4Z

2

1

C776

0.1U_0402_16V4Z

2

B

SATA_CALSATA_CAL

SATA_X1 SATA_X2

U14B

AD9

SATA_TX0P

AE9

SATA_TX0N

AB10

SATA_RX0N

AC10

SATA_RX0P

AE10

SATA_TX1P

AD10

SATA_TX1N

AD11

SATA_RX1N

AE11

SATA_RX1P

AB12

SATA_TX2P

AC12

SATA_TX2N

AE12

SATA_RX2N

AD12

SATA_RX2P

AD13

SATA_TX3P

AE13

SATA_TX3N

AB14

SATA_RX3N

AC14

SATA_RX3P

AE14

SATA_TX4P

AD14

SATA_TX4N

AD15

SATA_RX4N

AE15

SATA_RX4P

AB16

SATA_TX5P

AC16

SATA_TX5N

AE16

SATA_RX5N

AD16

SATA_RX5P

V12

SATA_CAL

Y12

SATA_X1

AA12

SATA_X2

W11

SATA_ACT#/GPIO67

AA11

PLLVDD_SATA

W12

XTLVDD_SATA

218S7EALA11FG_BGA528_SB700

SB700

Part 2 of 5

SATA PWR SERIAL ATA

HW MONITOR

C

IDE_IORDY

IDE_IRQ

IDE_A0 IDE_A1 IDE_A2

IDE_DACK#

IDE_DRQ IDE_IOR#

IDE_IOW#

IDE_CS1# IDE_CS3#

IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23

ATA 66/100/133

IDE_D9/GPIO24 IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30

SPI_DI/GPIO12

SPI_DO/GPIO11 SPI_CLK/GPIO47

SPI_HOLD#/GPIO31

SPI_CS1#/GPIO32

LAN_RST#/GPIO13

SPI ROM

ROM_RST#/GPIO14

FANOUT0/GPIO3

FANOUT1/GPIO48 FANOUT2/GPIO49

FANIN0/GPIO50

FANIN1/GPIO51

FANIN2/GPIO52

TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63

TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55 VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60

AVDD AVSS

AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24

AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23

G6 D2 D1 F4 F3

U15 J1

M8 M5 M7

P5 P8 R8

C6 B6 A6 A5 B5

A4 B4 C4 D4 D5 D6 A7 B7

F6 G7

+3VALW

AVDD=5mA

EC_THERM# <33>

2 1

D30 RB751V_SOD323D30 RB751V_SOD323

R369 100K_0402_5%R369 100K_0402_5% R374 100K_0402_5%

R374 100K_0402_5%

12 12

@

D

ACIN <33,39>

+3VALW +3VS

E

Port Number

Port 0

Port 1

Port 2

Port 3

4 4

Port 4

Port 5

Pri/SEC,Mas/Slave assignment SATA drive controlled by

Primary master

Secondary master

Primary slave

Secondary slave

Primary (Secondary) master

Primary (Secondary) slave

A

SATA controler

PATA controler

B

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

26 49Monday, May 04, 2009

E

of

A

hexainf@hotmail.com

+3VS

1 1

2 2

3 3

C472 22U_0805_6.3V6MC472 22U_0805_6.3V6M

C489 0.1U_0402_16V4ZC489 0.1U_0402_16V4Z C499 0.1U_0402_16V4ZC499 0.1U_0402_16V4Z C493 0.1U_0402_16V4ZC493 0.1U_0402_16V4Z

+3VS

+1.2V_HT

FBMA-L11-201209-221LMA30T_0805

+3VALW

VDDQ=131mA

1 2

1 2 1 2 1 2

VDD33=71mA

PCIE_VDDR=0.6A

L37

1 2 1 2

1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

1 2

12

L79

12

L38

12

FBMA-L11-201209-221LMA30T_0805

C466 10U_0805_10V4ZC466 10U_0805_10V4Z C763 1U_0402_6.3V4ZC763 1U_0402_6.3V4Z

C759 0.1U_0402_16V4ZC759 0.1U_0402_16V4Z C497 0.1U_0402_16V4ZC497 0.1U_0402_16V4Z

AVDD_SATA=567mA

C764 22U_0805_6.3V6MC764 22U_0805_6.3V6M C766 1U_0402_6.3V4ZC766 1U_0402_6.3V4Z C765 1U_0402_6.3V4ZC765 1U_0402_6.3V4Z C767 0.1U_0402_16V4ZC767 0.1U_0402_16V4Z C768 0.1U_0402_16V4ZC768 0.1U_0402_16V4Z

AVDDTX/RX=658mA

FBMA-L11-201209-221LMA30T_0805

C461 10U_0805_10V4ZC461 10U_0805_10V4Z C469 10U_0805_10V4ZC469 10U_0805_10V4Z C495 1U_0402_6.3V4ZC495 1U_0402_6.3V4Z C485 1U_0402_6.3V4ZC485 1U_0402_6.3V4Z

C481 0.1U_0402_16V4ZC481 0.1U_0402_16V4Z

+PCIE_VDDR

+1.2V_SATA

+AVDD_USB

B

U14C

L9

VDDQ_1

M9

VDDQ_2

T15

VDDQ_3

U9

VDDQ_4

U16

VDDQ_5

U17

VDDQ_6

V8

VDDQ_7

W7

VDDQ_8

Y6

VDDQ_9

AA4

VDDQ_10

AB5

VDDQ_11

AB21

VDDQ_12

Y20

VDD33_18_1

AA21

VDD33_18_2

AA22

VDD33_18_3

AE25

VDD33_18_4

P18

PCIE_VDDR_1

P19

PCIE_VDDR_2

P20

PCIE_VDDR_3

P21

PCIE_VDDR_4

R22

PCIE_VDDR_5

R24

PCIE_VDDR_6

R25

PCIE_VDDR_7

AA14

AVDD_SATA_1

AB18

AVDD_SATA_4

AA15

AVDD_SATA_2

AA17

AVDD_SATA_3

AC18

AVDD_SATA_5

AD17

AVDD_SATA_6

AE17

AVDD_SATA_7

A16

AVDDTX_0

B16

AVDDTX_1

C16

AVDDTX_2

D16

AVDDTX_3

D17

AVDDTX_4

E17

AVDDTX_5

F15

AVDDRX_0

F17

AVDDRX_1

F18

AVDDRX_2

G15

AVDDRX_3

G17

AVDDRX_4

G18

AVDDRX_5

218S7EALA11FG_BGA528_SB700

SB700

Part 3 of 5

PCI/GPIO I/O

IDE/FLSH I/O

POWER

A-LINK I/O

3.3V_S5 I/OCORE S5

SATA I/O

USB_PHY_1.2V_1 USB_PHY_1.2V_2

PLL CLKGEN I/O

USB I/O

VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8

CORE S0

VDD_9

CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4

S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7

S5_1.2V_1 S5_1.2V_2

V5_VREF AVDDCK_3.3V AVDDCK_1.2V

AVDDC

VDD=0.51A

+1.2V_SB_CORE

L15 M12 M14 N13 P12 P14 R11 R15 T16

VDD=138mA

+1.2V_HT

L21 L22 L24 L25

+S5_3V

A17 A24 B17 J4 J5 L1 L2

+S5_1.2V

G2 G4

USB_PHY_1.2V=197mA

+1.2_USB

A10 B10

+V5_VREF

AE7

+AVDDCK_3.3V

J16

+AVDDCK_1.2V

K17

+AVDDC

E9

AVDDC=17mA

C

1 2

R171 0_0805_5%R171 0_0805_5%

1 2

12 12 12 12

S5_3.3V=32mA

C7692.2U_0603_6.3V4Z C7692.2U_0603_6.3V4Z

1 2

C4862.2U_0603_6.3V4Z C4862.2U_0603_6.3V4Z

1 2

S5_1.2V=113mA

+1.2VALW

L80 FBMA-L11-160808-221LMT 0603L80 FBMA-L11-160808-221LMT 0603

12

C771 10U_0805_10V4ZC771 10U_0805_10V4Z

1 2

C773 0.1U_0402_16V4ZC773 0.1U_0402_16V4Z

12

C774 0.1U_0402_16V4ZC774 0.1U_0402_16V4Z

12

V5_VREF=1mA

2

C786

C786 1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

L42

BLM18PG121SN1D_0603

12

C46710U_0805_10V4Z C46710U_0805_10V4Z

C4781U_0402_6.3V4Z C4781U_0402_6.3V4Z C4871U_0402_6.3V4Z C4871U_0402_6.3V4Z C4940.1U_0402_16V4Z C4940.1U_0402_16V4Z C4820.1U_0402_16V4Z C4820.1U_0402_16V4Z

+3VALW

12 12

+1.2V_HT

C797 1U_0402_6.3V4ZC797 1U_0402_6.3V4Z C796 1U_0402_6.3V4ZC796 1U_0402_6.3V4Z

12

D31

21

CH751H-40PT_SOD323-2

+3VALW

C4842.2U_0603_6.3V4Z C4842.2U_0603_6.3V4Z C4960.1U_0402_16V4Z C4960.1U_0402_16V4Z

D

U14E

SB700

T10

AVSS_SATA_1

U10

AVSS_SATA_2

U11

AVSS_SATA_3

U12

AVSS_SATA_4

V11

AVSS_SATA_5

V14

AVSS_SATA_6

W9

AVSS_SATA_7

Y9

AVSS_SATA_8

Y11

AVSS_SATA_9

Y14

AVSS_SATA_10

Y17

AVSS_SATA_11

AA9

AVSS_SATA_12

AB9

AVSS_SATA_13

AB11

AVSS_SATA_14

AB13

AVSS_SATA_15

AB15

AVSS_SATA_16

AB17

AVSS_SATA_17

AC8

AVSS_SATA_18

AD8

AVSS_SATA_19

AE8

AVSS_SATA_20

A15

AVSS_USB_1

B15

AVSS_USB_2

C14

AVSS_USB_3

D8

AVSS_USB_4

D9

AVSS_USB_5

D11

AVSS_USB_6

D13

AVSS_USB_7

D14

AVSS_USB_8

D15

AVSS_USB_9

E15

AVSS_USB_10

F12

AVSS_USB_11

F14

AVSS_USB_12

G9

AVSS_USB_13

H9

+1.2VALW

12 12

R3861K_0402_5% R3861K_0402_5%

+5VS +3VS

AVSS_USB_14

H17

AVSS_USB_15

J9

AVSS_USB_16

J11

AVSS_USB_17

J12

AVSS_USB_18

J14

AVSS_USB_19

J15

AVSS_USB_20

K10

AVSS_USB_21

K12

AVSS_USB_22

K14

AVSS_USB_23

K15

AVSS_USB_24

H18

PCIE_CK_VSS_1

J17

PCIE_CK_VSS_2

J22

PCIE_CK_VSS_3

K25

PCIE_CK_VSS_4

M16

PCIE_CK_VSS_5

M17

PCIE_CK_VSS_6

M21

PCIE_CK_VSS_7

P16

PCIE_CK_VSS_8

F9

AVSSC

Part 5 of 5

218S7EALA11FG_BGA528_SB700

VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8

VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42

GROUND

VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50

PCIE_CK_VSS_9 PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21

AVSSCK

A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24

P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25

L17

E

AVDDCK_1.2V=62mA

+AVDDCK_1.2V

AVDDCK_3.3V=47mA

+AVDDCK_3.3V

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

A

B

L77

12

BLM18PG121SN1D_0603

L76

12

BLM18PG121SN1D_0603

2008/10/06 2009/10/06

+1.2V_HT

C7582.2U_0603_6.3V4Z C7582.2U_0603_6.3V4Z

12

C7610.1U_0402_16V4Z C7610.1U_0402_16V4Z

12

+3VS

C7562.2U_0603_6.3V4Z C7562.2U_0603_6.3V4Z

12

C7600.1U_0402_16V4Z C7600.1U_0402_16V4Z

12

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

27 49Monday, May 04, 2009

E

of

A

B

C

D

E

REQUIRED STRAPS

PCI_CLK2

PULL

1 1

2 2

HIGH

PULL LOW

PCI_CLK2<24> PCI_CLK3<24> PCI_CLK4<24> PCI_CLK5<24>

CLK_PCI_EC<24,33>

LPCCLK1<24> RTC_CLK<24> HDA_RST#<25>

GPIO17<25> GPIO16<25>

BOOTFAIL TIMER ENABLED

BOOTFAIL TIMER DISABLED

DEFAULT

R427

@

R424

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

+3VS +3VS +3VS +3VS +3VALW +3VALW +3VALW +3VALW +3VALW +3VALW

12

R425

10K_0402_5%

R425

@

12

R422

12

10K_0402_5%

12

10K_0402_5%

PCI_CLK4 PCI_CLK5

RESERVED

R423

@

R420

@

12

10K_0402_5%

12

10K_0402_5%

RESERVED

NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK

LPC_CLK0

R421

10K_0402_5%

@

R398

10K_0402_5%

@

12

CLK_PCI_EC

ENABLE PCI MEM BOOT

DISABLE PCI MEM BOOT

DEFAULT

12

R359

10K_0402_5%

@

12

R358

10K_0402_5%

CLKGEN ENABLED

CLKGEN DISABLED

DEFAULT

R361

10K_0402_5%

@

R360

10K_0402_5%

RTC_CLKLPC_CLK1

INTERNAL RTC

DEFAULT

EXT. RTC

(PD on X1, apply 32KHz to RTC_CLK)

R401

10K_0402_5%

@

R402

2.2K_0402_5%

@

12

AZ_RST_CD#

EC ENABLED

EC DISABLED

DEFAULT

12

R411

10K_0402_5%

@

12

R410

10K_0402_5%

GP17

GP16

Internal pull up H,H = Reserved

H,L = SPI ROM L,L = FWH ROM

L,H = LPC ROM (SB700) L,NC = LPC ROM (SB710)

12

R363

R367

2.2K_0402_5%

@

12

R362

R366

2.2K_0402_5%

@

DEBUG STRAPS

SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]

12

2.2K_0402_5%

PCI_AD27 PCI_AD26

USE PCI PLL

DEFAULT

BYPASS PCI PLL

R393

@

USE ACPI BCLK

DEFAULT

BYPASS ACPI BCLK

12

R395

2.2K_0402_5%

@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PCI_AD28

PULL

3 3

PCI_AD28<24> PCI_AD27<24> PCI_AD26<24> PCI_AD25<24> PCI_AD24<24> PCI_AD23<24>

4 4

A

HIGH

PULL LOW

B

USE LONG RESET

DEFAULT

USE SHORT RESET

R392

@

12

2.2K_0402_5%

C

PCI_AD25 PCI_AD24

USE IDE PLL

DEFAULT

BYPASS IDE PLL

R389

@

USE DEFAULT PCIE STRAPS

DEFAULT

USE EEPROM PCIE STRAPS

12

R396

2.2K_0402_5%

@

2008/10/06 2009/10/06

12

2.2K_0402_5%

PCI_AD23

RESERVED

12

R399

2.2K_0402_5%

@

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

28 49Monday, May 04, 2009

E

A

of

A

hexainf@hotmail.com

B

C

D

E

F

G

H

1 1

SATA_STX_C_DRX_P1<26> SATA_STX_C_DRX_N1<26>

SATA_DTX_C_SRX_N1<26>

SATA_DTX_C_SRX_P1<26>

C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K

1 2

C510 0.01U_0402_25V7KC510 0.01U_0402_25V7K

1 2

Close conn

SI3456DV: N CHANNEL VGS: 4.5V, RDS: 65 mOHM Id(MAX): 5.1A VGS,+-20V

+VSB

R216

R216 200K_0402_5%

SUSP<35,38>

200K_0402_5%

2N7002DW-T/R7_SOT363-6

2 2

3 3

+5VALW

SI3456BDV-T1-E3_TSOP6

12

5

Q67B

Q66

D

6

S

2 1

G

3

1

C204

0.1U_0603_25V7K

4

0.1U_0603_25V7K

2

+5VMOD

45

12

R214

R214 470_0402_5%

470_0402_5%

61

Q67A

Q67A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

SUSP

2

1000P_0402_50V7K

Placea caps. near ODD CONN.

+5VMOD

0.1U_0402_16V4Z

1

2

SATA_STX_C_DRX_P0<26> SATA_STX_C_DRX_N0<26>

SATA_DTX_C_SRX_N0<26> SATA_DTX_C_SRX_P0<26>

C490

C491

1

2

1U_0402_6.3V4Z

10U_0805_10V4Z

1

2

1

C492

C505

2

C515 0.01U_0402_25V7KC515 0.01U_0402_25V7K

1 2

C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K

1 2

SATA_STX_C_DRX_P1 SATA_STX_C_DRX_N1

SATA_DTX_SRX_N1 SATA_DTX_SRX_P1

R199 1K_0402_1%

1 2

@

+5VMOD

SATA_STX_C_DRX_P0 SATA_STX_C_DRX_N0

SATA_DTX_SRX_N0 SATA_DTX_SRX_P0

Close conn

+3VS

1

C792

0.1U_0402_16V4Z

2

+5VS

0.1U_0402_16V4Z

1

C556

2

1000P_0402_50V7K

1

C554

2

1

C557

2

1U_0402_6.3V4Z

10U_0805_10V4Z

1

C551

2

1

C555

2

0.1U_0402_16V4Z

1

C552

2

0.1U_0402_16V4Z

+5VS

SATA ODD Conn.

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

DP

9

+5V

10

+5V

11

MD

12

GND GND13GND

SANTA_206401-1_13P

CONN@

SATA HDD Conn.

JSATA2

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12 V1222GND

OCTEK_SAT-22SO1G_RV

CONN@

IAT50 (CL 4.3mm)

GND

15 14

24 23

for ESD issue

4 4

Security Classification

A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

C

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

D

2008/10/06 2009/10/06

E

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

F

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

G

A

of

29 49Monday, May 04, 2009

H

5

+3VS

+3VALW

D D

1 2

1

2

1

C863

@C863

@

47P_0402_50V8J

C C

CLK_48M_SD<20>

2

12

@

1

@ C865

@

2

4

12

R746 0_0603_5%R746 0_0603_5%

12

R747 0_0603_5%@R747 0_0603_5%@

1

C860

4.7U_0805_10V4Z@

R748

R748 100K_0402_5%@

100K_0402_5%@

RST#_L RST#

R749 0_0402_5%R749 0_0402_5%

Vender suggesttion

C862

C862 1U_0402_6.3V4Z

1U_0402_6.3V4Z

MODE_SEL

12

R751

R751 0_0402_5%

0_0402_5%

R756

R756 33_0402_5%

33_0402_5%

C865 22P_0402_50V8J

22P_0402_50V8J

2

12

Change to 0ohm for RTS5159 20081128

1 2

R753 0_0402_5%R753 0_0402_5%

C861

0.1U_0402_16V4Z

3

12

R745 0_0402_5%R745 0_0402_5%

U21

12

C858 0.1U_0402_16V4ZC858 0.1U_0402_16V4Z

+XDPWR_SDPWR_MSPWR

RST# MODE_SEL

5IN1_LED#<35>

USB20_N4<25> USB20_P4<25>

XTLI

R754

6.19K_0402_1%

USB20_N4 USB20_P4

1 2

1

2

XTLI

U21

1 3 7

9 11 33

8 44 45 47 48

4

5 14

2 12

32

6 46

RTS5158E-GR_LQFP48_7X7

R755

R755 0_0402_5%

0_0402_5%

1 2

AV_PLL NC NC CARD_3V3 D3V3 D3V3

3V3_IN RST# MODE_SEL XTLO XTLI

DM DP GPIO0

RREF DGND

DGND AGND

AGND

10

VREG

22

MS_D4

30

NC

XD_D5_SP5

SD_CD#_SP3

SD_WP_SP2

XD_CD#_SP1

EEDI

XTAL_CTR

MS_D5

EEDO

EECS EESK

SD_CMD

43 42 41 40 39 38 37 35 34 31 29 28 27 26 25 23 21 20 19 18

XTAL_CTR

13 24

15 16 17 36

XD_CLE_SP19 XD_CE#_SP18

XD_ALE_SP17

SD_DAT2/XD_RE#_SP16

SD_DAT3/XD_WE#_SP15

SD_DAT4/XD_WP#/MS_D7_SP13

Change to RT5159-GR <SA00002YP00> 20081104

XD_RDY_SP14

SD_DAT5/XD_D0/MS_D6_SP12 SD_CLK/XD_D1/MS_CLK_SP11 SD_DAT6/XD_D7/MS_D3_SP10

MS_INS#_SP9 SD_DAT7/XD_D2/MS_D2_SP8 SD_DAT0/XD_D6/MS_D0_SP7 SD_DAT1/XD_D3/MS_D1_SP6

XD_D4/SD_DAT1_SP4

2

1 2

C859 1U_0402_6.3V4ZC859 1U_0402_6.3V4Z

XDCLE XDCE#

XDALE SDDAT2_XDRE# SDDAT3_XDWE#

XD_RDY SDDAT4_XDWP#_MSD7 SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK_L SDDAT6_XDD7_MSD3 MS_INS# SDDAT7_XDD2_MSD2 SDDAT0_XDD6_MSD0 SDDAT1_XDD3_MSD1

XDD5_MSBS

XDD4_SDDAT1

SDCD SDWP XDCD

12

R752 0_0603_5%R752 0_0603_5%

SD_CMD

SDCLK_XDD1_MSCLK

12

R750 0_0402_5%R750 0_0402_5%

+3VS

XTAL_CTR If Open , use 12MHz. crystal If Pull high , use CLKGEN 48MHz.

1

EMI

+XDPWR_SDPWR_MSPWR

SD_CMD

SDCD SDWP

MS_INS#

XDD5_MSBS

2

+XDPWR_SDPWR_MSPWR

1

C868

2

10U_0805_10V4Z

SDCLK_XDD1_MSCLK

1

C869

C869 22P_0402_50V8J@

22P_0402_50V8J@

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

of

30 49Monday, May 04, 2009

A

JREAD1

3

B B

100K_0402_5%

MSCLK and SDCLK solution

A A

5

該二電阻是預留給

使用

, (

但請靠近

4

1

C867

R757

0.1U_0402_16V4Z

2

1 2

RTS5158E側).

EMI

SDDAT5_XDD0_MSD6 SDCLK_XDD1_MSCLK SDDAT7_XDD2_MSD2 SDDAT1_XDD3_MSD1 XDD4_SDDAT1 XDD5_MSBS SDDAT0_XDD6_MSD0 SDDAT6_XDD7_MSD3

SDDAT3_XDWE# SDDAT4_XDWP#_MSD7 XDALE XDCD XD_RDY SDDAT2_XDRE# XDCE# XDCLE

XD-VCC

32

XD-D0

10

34 33 35 40 39 38 37 36

11 31

41 42

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7 XD-WE

XD-WP XD-ALE XD-CD XD-R/B XD-RE XD-CE XD-CLE

7IN1 GND 7IN1 GND

TAITW_R015-B10-LM

CONN@

Issued Date

7 IN 1 CONN

21

SD-VCC

28

MS-VCC

SD_CLK SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3 SD-DAT4 SD-DAT5 SD-DAT6 SD-DAT7

SD-CMD

SD-CD-SW

SD-WP-SW

MS-SCLK MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

MS-INS

MS-BS

2006/08/04 2007/8/18

SDCLK_XDD1_MSCLK

20

SDDAT0_XDD6_MSD0

14 12 30 29

SDDAT4_XDWP#_MSD7

27

SDDAT5_XDD0_MSD6

23

SDDAT6_XDD7_MSD3

18

SDDAT7_XDD2_MSD2

16 25 1

2

SDCLK_XDD1_MSCLK

26

SDDAT0_XDD6_MSD0

17

SDDAT1_XDD3_MSD1

15

SDDAT7_XDD2_MSD2

19

SDDAT6_XDD7_MSD3

24 22 13

Compal Secret Data

XDD4_SDDAT1 SDDAT2_XDRE# SDDAT3_XDWE#

Deciphered Date

A

hexainf@hotmail.com

B

C

D

E

For Wireless LAN

+3VS

1 2

1

C813

0.1U_0402_16V4Z

2

JMINI1

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

MINI1_CLKREQ#<20>

CLK_PCIE_MINI1#<20>

CLK_PCIE_MINI1<20>

PCIE_PTX_C_IRX_N0<10>

PCIE_PTX_C_IRX_P0<10>

PCIE_ITX_C_PRX_N0<10> PCIE_ITX_C_PRX_P0<10>

1

C842

4.7U_0805_10V4Z

2

SB_PCIE_WAKE#

R432

1 1

SB_PCIE_WAKE#<25>

2 2

E51TXD_P80DATA<33>

E51RXD_P80CLK<33>

+3VS

0_0402_5%

1 2

1

C841

0.1U_0402_16V4Z

2

R457 0_0402_5%@R457 0_0402_5%@

E51TXD_P80DATA_R E51RXD_P80CLK

Mini-Express Card for WWAN

SB_PCIE_WAKE#

WWAN_CLKREQ#<20>

3 3

UIM_VPP

UIM_RST

UIM_VPP UIM_DATA

4 4

1

C123

2

@

Reserve for SIM card does not meet rise time and pull-up is needed.

22P_0402_50V8J

+UIM_PWR

R217

@

A

WWAN_CLKREQ#

CLK_PCIE_WWAN#<20>

CLK_PCIE_WWAN<20>

PCIE_PTX_C_IRX_N2<10> PCIE_PTX_C_IRX_P2<10>

PCIE_ITX_C_PRX_N2<10>

PCIE_ITX_C_PRX_P2<10>

+3VS_WWAN

D8 CM1293-04SO_SOT23-6@D8CM1293-04SO_SOT23-6@

1

CH1

2

Vn

3

CH2

JP5

4

GND

5

VPP

6

I/O

7

DET

12

10K_0402_5%

TAITW_PMPAT6-06GLBS7N14N0 CONN@

CH4

CH3

1 2

R460 0_0402_5%@R460 0_0402_5%@

1 2

C317 10U_0805_10V4Z3G@C317 10U_0805_10V4Z3G@

UIM_CLK

4

5

6

VCC

RST CLK

GND GND

1 2 3

8 9

+UIM_PWR

UIM_DATA

+UIM_PWR UIM_RST UIM_CLK

@

C124

40mil

1

C325

2

@

22P_0402_50V8J

B

Vp

+1.5VS

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40

(MINI1_LED#)

42 44 46 48 50 52

FOX_AS0B226-S99N-7F

56

CONN@

+3VS

R218 0_1206_5%3G@R218 0_1206_5%3G@

JMINI2

1

3

5

7

9

9 111112 131314 151516

171718 191920 212122 232324 252526 272728 292930 313132 333334 353536 373738 393940 414142 434344 454546 474748 494950 515152

G153G254G355G3

1

C277

2

3G@ C277

3G@

1U_0402_6.3V4Z

22P_0402_50V8J

1

C825

4.7U_0805_10V4Z

2

WL_OFF# PLT_RST#

+3V_WLAN

SB_CK_SCLK SB_CK_SDAT

1 2

2

4

6

8

10

12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

FOX_AS0B226-S99N-7F

56

CONN@

1

C272

2

3G@ C272

3G@

0.1U_0402_16V4Z

@

1

C823

0.1U_0402_16V4Z

2

SB_CK_SCLK <8,9,20,25> SB_CK_SDAT <8,9,20,25>

USB20_N8 <25> USB20_P8 <25>

1

C808

0.1U_0402_16V4Z

2

R458 0_0603_5%R458 0_0603_5%

1 2

R459 0_0603_5%

1 2

(9~16mA)

+3VS_WWAN

R156 0_1206_5%@R156 0_1206_5%@

+3VALW

1 2

+UIM_PWR UIM_DATA UIM_CLK UIM_RST UIM_VPP

WXMIT_OFF# PLT_RST#

1 2

R159 0_0402_5%3G@R159 0_0402_5%3G@

1 2

R409 0_0402_5%@R409 0_0402_5%@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS +1.5VS

WL_OFF# <33> PLT_RST# <11,13,14,24,33>

+3VS +3VALW

MINI1_LED# <33>

1

C324

3G@

0.1U_0402_16V4Z

2

C

+5VALW

1

2

C819

4.7U_0805_10V4Z

+3VS_WWAN

1

+

C394

3G@

150U_B2_6.3VM

+1.5VS

WXMIT_OFF# <33> +3VS_WWAN +3VALW

USB20_N5 <25> USB20_P5 <25>

WWAN_LED# <33>

2

Close to WWAN CONN

(9~16mA)

+3VS_WWAN

1

C125

3G@

10U_0805_10V4Z

2

2008/10/06 2009/10/06

1

C205

3G@

0.1U_0402_16V4Z

2

Compal Secret Data

Deciphered Date

Power

+3VS +3V +1.5VS

LAN_CLKREQ#<20>

EJECTBTN#<33>

PCIE_PTX_C_IRX_N1<10> PCIE_PTX_C_IRX_P1<10>

PCIE_ITX_C_PRX_N1<10>

PCIE_ITX_C_PRX_P1<10>

CLK_PCIE_LAN<20>

CLK_PCIE_LAN#<20>

1

C203

3G@

0.01U_0402_25V7K

2

LAN_DET<33>

EC_PME#<33>

SYSON#<32,38,44>

USB20_N0<25> USB20_P0<25> USB20_P2<25> USB20_N2<25>

PLT_RST#<11,13,14,24,33>

D

Mini Card Power Rating Primary Power (mA) Peak Normal 1000 330 500

+5VALW

160mil 80mil

+3VALW

20mil

+3VS

Auxiliary Power (mA)

Normal 750 250 375

250 (wake enable) 5 (Not wake enable)

JP2

1

2

3

4

5

6

7

8

9

10

11 12 13 14 15 16

1 2 3 4 5 6 7 8 9

10

Title

Size Document Number Rev

B

Date: Sheet of

17

11

GND

18

12

GND 13 14 15 16

ACES_85201-1605N

CONN@

JP21

1 2 3 4 5 6 7 8 GND1 GND2

ACES_88231-08001

CONN@

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

E

31 49Monday, May 04, 2009

A

B

C

D

E

Bluetooth Conn.

+3VALW

1 1

BT_ON#<33>

2 2

C839

0.1U_0402_16V4Z

1 2

R451 10K_0402_5%R451 10K_0402_5%

C840

0.1U_0402_16V4Z

USB20_P12<25> USB20_N12<25>

+3VS

S

G

AO3413_SOT23-3

2

Q41

D

1 3

W=40mils

1

C831

C830

4.7U_0805_10V4Z

C831

2

0.1U_0402_16V4Z

2

G

+BT_VCC

Swap for new footprint 20090303

JP4

8

GND

7

6

5

4

3

2

1

GND

CONN@

ACES_87213-0800G

1

C832

C832 1U_0402_6.3V4Z

1U_0402_6.3V4Z

2

+BT_VCC

12

R450

R450 300_0603_5%

300_0603_5%

13

D

Q42

Q42 2N7002_SOT23

2N7002_SOT23

S

10

9

USB20_N6<25>

USB20_P6<25>

USB20_N1<25>

USB20_P1<25>

USB PORT x 2

+USB_VCCA

1

+

2

1 2

R172 0_0402_5%@R172 0_0402_5%@

L36

JM@ L36

USB20_N6

USB20_P6

USB20_N1

USB20_P1

JM@

4

1

WCM2012F2S-900T04_0805

1 2

R170 0_0402_5%@R170 0_0402_5%@

+USB_VCCA

1

+

2

1 2

R102 0_0402_5%@R102 0_0402_5%@

L29

4

1

WCM2012F2S-900T04_0805

1 2

R103 0_0402_5%@R103 0_0402_5%@

+USB_VCCA

C531

C531 150U_B2_6.3VM

150U_B2_6.3VM

3

2

+USB_VCCA

C406

@

150U_B2_6.3VM

3

2

W=80mils

1

C427

JM@

470P_0402_50V7K

2

USB20_N6_R USB20_P6_R

W=80mils

1

C246

C246 470P_0402_50V7K

470P_0402_50V7K

2

USB20_N1_R USB20_P1_R

JUSB1

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MB004S580ZL-C

CONN@

JUSB2

1

2

3

4

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MB004S580ZL-C

CONN@

+USB_VCCA

USB20_N6_R

D18

6

CH3

5

Vp

4

CH4

CM1293-04SO_SOT23-6

CH2

CH1

USB20_P6_RUSB20_P1_R

3

2

Vn

USB20_N1_R

1

Change to Panjit SC300000B00

+3VALW

+5VALW

3 3

1

C428

4.7U_0805_10V4Z

2

SYSON#<31,38,44>

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

U16

1

GND

2

IN

3

IN

4

EN#

TPS2061DRG4_SO8

2008/10/06 2009/10/06

+USB_VCCA

80mil

8

OUT

7

OUT

6

OUT

5

FLG

Compal Secret Data

12

R168

R168 100K_0402_5%

100K_0402_5%

R167 10K_0402_5%R167 10K_0402_5%

1 2

0.1U_0402_16V4Z

Deciphered Date

C421

D

R166

R166 0_0402_5%

0_0402_5%

1 2

1

2

USB_OC#1 <25>

USB_OC#0 <25>

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

32 49Monday, May 04, 2009

E

of

A

5

hexainf@hotmail.com

+3VL

LID_SW#

12

1 2

R562 0_0402_5%JM@ R562 0_0402_5%JM@

1 2

R563 0_0402_5%JM@ R563 0_0402_5%JM@

1 2

R564 0_0402_5%HM@ R564 0_0402_5%HM@

1 2

R565 0_0402_5%HM@ R565 0_0402_5%HM@

1 2

R568 0_0402_5%HM@R568 0_0402_5%HM@

1 2

R569 0_0402_5%JM@R569 0_0402_5%JM@

+3VL

0.1U_0402_16V4Z

0.1U_0402_16V4Z C501

1

2

0.1U_0402_16V4Z

12

PWR_SUSP_LED<35> LAN_DET<31>

+5VS

MINI1_LED# WWAN_LED# MEDIA_LED# LID_SW#

C501

1

C537

2

0.1U_0402_16V4Z

EC_GA20<25>

EC_KBRST#<25>

SERIRQ<24>

LPC_FRAME#<24>

LPC_AD3<24> LPC_AD2<24> LPC_AD1<24> LPC_AD0<24>

PLT_RST#<11,13,14,24,31>

EC_SCI#<25>

EC_SMB_CK1<40> EC_SMB_DA1<40> EC_SMB_CK2<6,19> EC_SMB_DA2<6,19>

PM_SLP_S3#<25> PM_SLP_S5#<25> EC_LID_OUT# <25>

EC_SMI#<25>

AD_ON#<39>

FAN_SPEED1<4>

BT_ON#<32>

ON/OFF<35>

For Lid SW

+3VL

+3VS

1 2

MEDIA_CK MEDIA_DA

3 4 5 6 7 8

9 10 11 12

+3VALW

60mil

+3VLP

60mil

D D

ESD

+5VS

C C

+3VS

+3VL

B B

+3VL

KSO3

A A

KSI5 EC_I2C_INT1

KSI4

1 2

R256 0_0805_5%@R256 0_0805_5%@

1 2

R261 0_0805_5%R261 0_0805_5%

+3VL

R221 100K_0402_5%R221 100K_0402_5%

22P_0402_50V8J@

1 2

R189 4.7K_0402_5%R189 4.7K_0402_5%

1 2

R188 4.7K_0402_5%R188 4.7K_0402_5%

1 2

R257 2.2K_0402_5%R257 2.2K_0402_5%

1 2

R258 2.2K_0402_5%R258 2.2K_0402_5%

1 2

R191 2.2K_0402_5%R191 2.2K_0402_5%

1 2

R190 2.2K_0402_5%R190 2.2K_0402_5%

1 2

R259 2.2K_0402_5%R259 2.2K_0402_5%

1 2

R193 2.2K_0402_5%R193 2.2K_0402_5%

1 2

R192 2.2K_0402_5%R192 2.2K_0402_5%

1 2

R75 47K_0402_5%R75 47K_0402_5%

1 2

R78 47K_0402_5%R78 47K_0402_5%

1 2

R260 2.2K_0402_5%R260 2.2K_0402_5%

1 2

R222 10K_0402_5%@R222 10K_0402_5%@

ESB_CK

ESB_DA

1 2

R566 0_0402_5%JM@R566 0_0402_5%JM@

1 2

R567 0_0402_5%HM@R567 0_0402_5%HM@

12

C778 10P_0402_50V8J@C778 10P_0402_50V8J@

C547

R220 33_0402_5%@R220 33_0402_5%@

12

CLK_PCI_EC<24,28>

+3VL

R215 47K_0402_5%R215 47K_0402_5%

C533 0.1U_0402_16V4ZC533 0.1U_0402_16V4Z

TP_CLK TP_DATA

ESB_CK ESB_DA EC_SMB_CK2 EC_SMB_DA2

EC_I2C_INT1

Follow ENE check

EC_SMB_CK1 EC_SMB_DA1 KSO1 KSO2

Follow ENE AP sheet KB926D-AN1-100

EJECTBTN#

Follow ENE check

C541 33P_0402_50V8K@C541 33P_0402_50V8K@

C540 33P_0402_50V8K@C540 33P_0402_50V8K@

TP_LOCK _LED#

PLT_RST#

EC_PME#

MINI1_LED#<31> WWAN_LED#<31> MEDIA_LED#<35>

To Media/B Conn.

5

4

0.1U_0402_16V4Z

1

C525

2

EC_GA20 EC_KBRST# SERIRQ LPC_FRAME# LPC_AD3 LPC_AD2 LPC_AD1 LPC_AD0

CLK_PCI_EC PLT_RST#

EC_SCI#

KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7 KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17

EC_SMB_CK1 EC_SMB_DA1 EC_SMB_CK2 EC_SMB_DA2

PM_SLP_S3# PM_SLP_S5# EC_SMI#

AD_ON# ESB_CK ESB_DA

FAN_SPEED1

BT_ON#

E51TXD_P80DATA

E51RXD_P80CLK

ON/OFF

LAN_DET

EC_CRY1 EC_CRY2

JP3

1 2 3 4 5 6 7 8 9 10

13

11

GND

14

12

GND

ACES_85201-1205N

CONN@

4

2

C546

C548

1000P_0402_50V7K

1

U20

1

GA20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

10

LPC & MISC

LAD0

12

PCICLK

13

PCIRST#/GPIO05

37

ECRST#

20

SCI#/GPIO0E

38

CLKRUN#/GPIO1D

55

KSI0/GPIO30

56

KSI1/GPIO31

57

KSI2/GPIO32

58

KSI3/GPIO33

59

KSI4/GPIO34

60

KSI5/GPIO35

61

KSI6/GPIO36

62

KSI7/GPIO37

39

KSO0/GPIO20

40

KSO1/GPIO21

41

KSO2/GPIO22

42

KSO3/GPIO23

43

KSO4/GPIO24

44

KSO5/GPIO25

45

KSO6/GPIO26

46

KSO7/GPIO27

47

KSO8/GPIO28

48

KSO9/GPIO29

49

KSO10/GPIO2A

50

KSO11/GPIO2B

51

KSO12/GPIO2C

52

KSO13/GPIO2D

53

KSO14/GPIO2E

54

KSO15/GPIO2F

81

KSO16/GPIO48

82

KSO17/GPIO49

77

SCL1/GPIO44

78

SDA1/GPIO45

79

SCL2/GPIO46

80

SDA2/GPIO47

6

PM_SLP_S3#/GPIO04

14

PM_SLP_S5#/GPIO07

15

EC_SMI#/GPIO08

16

LID_SW#/GPIO0A

17

SUSP#/GPIO0B

18

PBTN_OUT#/GPIO0C

19

EC_PME#/GPIO0D

25

EC_THERM#/GPIO11

28

FAN_SPEED1/FANFB1/GPIO14

29

FANFB2/GPIO15

30

EC_TX/GPIO16

31

EC_RX/GPIO17

32

ON_OFF/GPIO18

34

PWR_LED#/GPIO19

36

NUMLED#/GPIO1A

122

XCLK1

123

XCLK0

KS03

KSI4

TP Lock

KSI5

WL_BTN#

Modify for e-Machine 20090415

3

+3VL

L43

1 2

FBM-L11-160808-800LMT_0603

2

C549

C549 1000P_0402_50V7K

1000P_0402_50V7K

1

9

22

VCC

PS2 Interface

Int. K/B

Int. K/B Matrix

Matrix

SM Bus

11

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+EC_VCCA

ECAGND

33

96

111

125

67

VCC

AVCC

INVT_PWM/PWM1/GPIO0F

BEEP#/PWM2/GPIO10

ACOFF/FANPWM2/GPIO13

PWM Output

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

DA Output

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

SPI Device Interface

SPI Flash ROM

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03 EC_LID_OUT#/GPXO04

ICH_PWROK/GPXO06

GPO

GPIO

PM_SLP_S4#/GPXID1

GPI

GND

AGND

GND

KB926QFB1_LQFP128_14X14

35

69

94

113

KB926QFB1_LQFP128_14X14

20mil

ECAGND

FBM-L11-160808-800LMT_0603

24

1

C502

2

0.1U_0402_16V4Z

FANPWM1/GPIO12

ADP_I/AD2/GPIO3A

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A PSDAT1/GPIO4B PSCLK2/GPIO4C PSDAT2/GPIO4D

SDICS#/GPXOA00 SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICLK/GPIO58

SPICS#

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

EC_SWI#/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

GPXO10 GPXO11

ENBKL/GPXID2

GPXID3 GPXID4 GPXID5 GPXID6 GPXID7

V18R

L44

21 23 26 27

63 64 65 66 75 76

68 70 71 72

83 84 85 86 87 88

97 98 99 109

119 120 126 128

73 74 89 90 91 92 93 95 121 127

100 101 102 103 104 105 106 107 108

110 112 114 115 116 117 118

124

12

INVT_PWM BEEP#

ACOFF

BATT_TEMP BATT_OVP ADP_I AD_BID0

AD_PID0

DAC_BRIG EN_DFAN1 IREF CALIBRATE#

WXMIT_OFF# TP_LOCK _LED# TP_CLK

TP_DATA

3S/4S# 65W/90W# EC_VLDT_EN LID_SW#

EC_I2C_INT1 BATT_BLUE_LED#

EJECTBTN# BATT_AMB_LED# PWR_LED SYSON VR_ON ACIN

EC_RSMRST# EC_LID_OUT# EC_ON EC_SWI# EC_PWROK BKOFF# WL_OFF#

VGATE ENBKL EAPDPWR_SUSP_LED EC_THERM# SUSP# PBTN_OUT# EC_PME#

1

C534

4.7U_0805_10V4Z

2

KSI[0..7] KSO[0..17] KSI[0..7] ENBKL

INVT_PWM <21>

BEEP# <36> ACOFF <41,45>

BATT_OVP <41> ADP_I <41>

DAC_BRIG <21> EN_DFAN1 <4> IREF <41> CALIBRATE# <41>

WXMIT_OFF# <31> TP_LOCK _LED# <34> TP_CLK <34>

TP_DATA <34>

3S/4S# <41> 65W/90W# <41>

EC_VLDT_EN <35>

EC_SI_SPI_SO <34> EC_SO_SPI_SI <34> EC_SPICLK <34> EC_SPICS#/FSEL# <34>

FSTCHG <41>

BATT_BLUE_LED# <35> EJECTBTN# <31> BATT_AMB_LED# <35> PWR_LED <35>

SYSON <38,43> VR_ON <46> ACIN <26,39>

EC_RSMRST# <25>

EC_ON <35>

EC_SWI# <25>

EC_PWROK <35> BKOFF# <21>

WL_OFF# <31>

VGATE <46>

EAPD <36>

EC_THERM# <26>

SUSP# <35,38,41,45>

PBTN_OUT# <25> EC_PME# <31>

KB926 Rev:D3(SA00001J580)

Compal Secret Data

2008/10/06 2009/10/06

3

Compal Secret Data

Deciphered Date

2

12

C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K

DVT

2

KSI[0..7] <34> KSO[0..17] <34> KSI[0..7] <34>

ENBKL <11>

DVT2

ECAGND

BATT_TEMP <40>

ESD

EJECTBTN#

D41 RB751V_SOD323

12

R211

R211 10K_0402_5%

10K_0402_5%

1

For EC Tools

+3VL

JP6

1

2

3

4

ACES_85205-0400

@

65W/90W#

R205 100K_0402_5%R205 100K_0402_5%

VR_ON

R213 100K_0402_5%R213 100K_0402_5%

3S/4S#

R203 4.7K_0402_5%R203 4.7K_0402_5%

Analog Project ID definition

+3VL

R181

R181 100K_0402_5%

100K_0402_5%

Ra

1 2

R180

Rb

33K_0402_5%

1 2

Analog Board ID definition

1 2

C39 0.1U_0402_16V4ZC39 0.1U_0402_16V4Z

2

C532

15P_0402_50V8J

21

VGA_ENBKL <15>

VGA@

Title

Size Document Number Rev

B

Date: Sheet of

Date: Sheet

1

BATT_TEMP BATT_OVP ACIN

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

Place on RAM door

E51RXD_P80CLK E51TXD_P80DATA

12 12

1 2

AD_PID0

1

C488

0.1U_0402_16V4Z

2

+3VL

R195

Ra

100K_0402_5%

1 2

AD_BID0

12

R194

Rb

18K_0402_5%

DVT2

EC_CRY1 EC_CRY2

4

1

IN

OUT

NC3NC

2

X1

32.768KHZ_12.5P_MC-306

C523 100P_0402_50V8JC523 100P_0402_50V8J

12

C514 100P_0402_50V8JC514 100P_0402_50V8J

12

C539 100P_0402_50V8JC539 100P_0402_50V8J

12

1

E51RXD_P80CLK <31> E51TXD_P80DATA <31>

2

1

+3VL

1

C503

0.1U_0402_16V4Z

2

C535

C535 15P_0402_50V8J

15P_0402_50V8J

of

33 49Monday, May 04, 2009

A

EC_SPICS#/FSEL#

<

33>

+3VALW

(Left)

(Right)

R207 4.7K_0402_5%R207 4.7K_0402_5%

1 2

R204 4.7K_0402_5%R204 4.7K_0402_5%

1 2

KSO0 KSO1 KSO2 KSO3 KSO4 KSO5 KSO6 KSO7 KSO8 KSO9 KSO10 KSO11 KSO12 KSO13 KSO14 KSO15 KSO16 KSO17 KSI0 KSI1 KSI2 KSI3 KSI4 KSI5 KSI6 KSI7

KSO15

C448 100P_0402_50V8JC448 100P_0402_50V8J

KSO14 KSO13 KSO12

KSI0 KSO11 KSO10 KSI1

KSI2 KSO9 KSI3 KSO8

1 2

C447 100P_0402_50V8JC447 100P_0402_50V8J

1 2

C446 100P_0402_50V8JC446 100P_0402_50V8J

1 2

C445 100P_0402_50V8JC445 100P_0402_50V8J

1 2

C451 100P_0402_50V8JC451 100P_0402_50V8J

1 2

C444 100P_0402_50V8JC444 100P_0402_50V8J

1 2

C443 100P_0402_50V8JC443 100P_0402_50V8J

1 2

C452 100P_0402_50V8JC452 100P_0402_50V8J

1 2

C453 100P_0402_50V8JC453 100P_0402_50V8J

1 2

C442 100P_0402_50V8JC442 100P_0402_50V8J

1 2

C454 100P_0402_50V8JC454 100P_0402_50V8J

1 2

C441 100P_0402_50V8JC441 100P_0402_50V8J

1 2

+3VALW

EC_SPICS#/FSEL#

SPI_WP# SPI_HOLD#

INT_KBD Conn.

JP8

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25 26

ACES_85201-26051

CONN@

27

25

G1

28

26

G2

BIOS(SYS / EC / VGA)

C512 0.1U_0402_16V4ZC512 0.1U_0402_16V4Z

1 2

+SPI_VCC

U19

1

CE#

3 7 4

MX25L8005M2C-15G_SOP8

KSO16 KSO17

KSO7 KSO6 KSO5 KSO4

KSO3 KSI4 KSO2 KSO1

KSO0 KSI5 KSI6 KSI7

VDD

WP#

SCK HOLD# VSS

SI

SO

KSI[0..7] KSO[0..17]

C449 100P_0402_50V8JC449 100P_0402_50V8J

1 2

C450 100P_0402_50V8JC450 100P_0402_50V8J

1 2

C440 100P_0402_50V8JC440 100P_0402_50V8J

1 2

C439 100P_0402_50V8JC439 100P_0402_50V8J

1 2

C438 100P_0402_50V8JC438 100P_0402_50V8J

1 2

C437 100P_0402_50V8JC437 100P_0402_50V8J

1 2

C436 100P_0402_50V8JC436 100P_0402_50V8J

1 2

C455 100P_0402_50V8JC455 100P_0402_50V8J

1 2

C435 100P_0402_50V8JC435 100P_0402_50V8J

1 2

C434 100P_0402_50V8JC434 100P_0402_50V8J

1 2

C433 100P_0402_50V8JC433 100P_0402_50V8J

1 2

C456 100P_0402_50V8JC456 100P_0402_50V8J

1 2

C457 100P_0402_50V8JC457 100P_0402_50V8J

1 2

C458 100P_0402_50V8JC458 100P_0402_50V8J

1 2

8 6 5 2

KSI[0..7] <33> KSO[0..17] <33>

R208 0_0402_5%R208 0_0402_5%

1 2

12

R206

R206 22_0402_5%

22_0402_5%

@

C524

C524 33P_0402_50V8K

33P_0402_50V8K

@

EC_SPICLK <33> TP_DATA<33> EC_SO_SPI_SI <33>

EC_SI_SPI_SO <33>

KSO2 KSO3

Volume Down

Volume Up

KSI5

KSI6

KSO4

BT_BTN#

KSI4 T/P lock

TP_CLK<33>

100P_0402_50V8J

Back UpWL_BTN#

Program (KBLG0)

Battery (KALG0)

C403

1

2

1

TP_CLK TP_DATA

1

2

TP_CLK TP_DATA

3

D9

D9 PSOT24C_SOT23

PSOT24C_SOT23

TP_LOCK _LED#<33>

C404

C404 100P_0402_50V8J

100P_0402_50V8J

To TP/B Conn.

+5VS +3VS

KSO3 KSI4

TP_LOCK _LED#

+5VS

C402

0.1U_0402_16V4Z

JP7

12

GND

11

GND

10

9

8

7

6

5

4

3

2

1

ACES_85201-1005N

CONN@

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

34 49Monday, May 04, 2009

of

A

hexainf@hotmail.com

B

C

D

E

Power Button

ON/OFF switch

TOP Side

1 1

1 2

R5 10K_0603_5%@R5 10K_0603_5%@

1 2

R4 10K_0603_5%@R4 10K_0603_5%@

Bottom Side

ON/OFFBTN#

GA_ON/OFFBTN#<39>

Green adapter on/off control

2 2

GA_ON/OFFBTN#

1 2

R268 0_0402_5%R268 0_0402_5%

EC_ON<33>

10K_0402_5%

EC_ON

R6

+3VALW

D3

2

1

DAN202UT106_SC70-3

1 2

3

2

G

R8

R8 100K_0402_5%

100K_0402_5%

1 2

13

D

Q1

2N7002_SOT23

S

ON/OFF <33>

51ON# <39>

Power ON Circuit

+3VS

12

R235

180K_0402_5%@

13

D

SUSP<29,38>

3 3

SUSP#<33,38,41,45>

2

G

Q25

S

SUSP#

S

D23

21

RB751V_SOD323@

0.1U_0402_16V4Z@

2N7002_SOT23@

1

2

+3VS

12

R236

10K_0402_1%@

2

C567

1

U22A

U22A SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

@

P

1

O2I

G

7

C568

1U_0402_6.3V4Z

@

+3VALW +3VALW

U22C

14

SN74LVC14APWLE_TSSOP14

@

P

5

O6I

G

7

+3VALW+3VALW

U22B

U22B SN74LVC14APWLE_TSSOP14

SN74LVC14APWLE_TSSOP14

14

@

P

3

O4I

G

7

U22D

14

SN74LVC14APWLE_TSSOP14

@

P

9

O8I

G

7

EC_VLDT_EN<33>

EC_PWROK<33>

1 2

R234 0_0402_5%@R234 0_0402_5%@

1 2

R233 0_0402_5%R233 0_0402_5%

1 2

R232 0_0402_5%

1 2

R228 0_0402_5%R228 0_0402_5%

For South Bridge

SB_PWRGD <6,25>

For +1.2HT

@

VLDT_EN <38,43,44>

To PWR/B Conn.

+5VALW+5VS

ON/OFFBTN# PWR_LED# PWR_SUSP_LED#

PWR_LED<33> PWR_SUSP_LED<33>

R240

10K_0402_5%

MEDIA_LED#<33>

JP9

1 2 3 4 5 6

ACES_85201-0605

CONN@

PWR_LED# PWR_SUSP_LED#

61

Q31A

2

2N7002DW-T/R7_SOT363-6

12

Q2A

6 1 3

Q2B

LED9

2 1

LED10

LED11

2 1

LED12

+5VALW

2N7002DW-T/R7_SOT363-6

MEDIA_LED#

2N7002DW-T/R7_SOT363-6

1 2

R245 4.99K_0402_1%R245 4.99K_0402_1%

1 2

R244 4.99K_0402_1%R244 4.99K_0402_1%

1 2

R247 4.99K_0402_1%R247 4.99K_0402_1%

1 2

R246 4.99K_0402_1%R246 4.99K_0402_1%

BLUE / AMBER

+3VS

@R10

@

10K_0402_5%

2

1 2

4

5

+3VS

BATT_BLUE_LED#

HT-191NBQA_BLUE_0603

BATT_AMB_LED#

HT-191NBQA_BLUE_0603

BATT_BLUE_LED#

HT-191NBQA_BLUE_0603

BATT_AMB_LED#

HT-191NBQA_BLUE_0603

10K_0402_5%

R10

5

12

R249

5IN1_LED# <30> SATA_LED# <26>

BATT_BLUE_LED# <33>

BATT_AMB_LED# <33>

BATT_BLUE_LED# <33>

BATT_AMB_LED# <33>

3

Q31B

4

2N7002DW-T/R7_SOT363-6

+3VALW +3VALW

C565 0.1U_0402_16V4Z@C565 0.1U_0402_16V4Z@

1 2

U22E

14

SN74LVC14APWLE_TSSOP14

@

P

11

O10I

G

7

C564

0.22U_0603_16V7K

@

B

D21 RB751V_SOD323@D21 RB751V_SOD323@

R230 200K_0402_5%@R230 200K_0402_5%@

1 2

21

2

1

SUSP#

4 4

A

U22F

14

SN74LVC14APWLE_TSSOP14

@

P

13

O12I

G

7

@

1 2

R231 0_0402_5%

VGA@

SUSP#

1 2

R229 0_0402_5%

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date

For +VGA_CORE

2

1

C

VGA_ON <47>

C563

0.1U_0402_16V4Z

@

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

35 49Monday, May 04, 2009

E

A

of

5

4

3

2

1

+5VS

4.7U_0805_10V4Z

4.7U_0805_10V4Z C1023

C1023

C1024

0.1U_0402_16V4Z

D D

INT MIC

+MIC1_VREFO_L +MIC1_VREFO_R

10mil

12

R845

4.7K_0402_5%

C C

MIC1_L<37> MIC1_R<37>

B B

+5VS

R846

4.7K_0402_5%

R850 1K_0402_5% R850 1K_0402_5%

NBA_PLUG<37>

MIC_SENSE<37>

1 2

R841 10K_0402_5%R841 10K_0402_5%

10mil

MIC1_R_L

12

MIC1_R_R

12

ImpedanceSense Pin

SENSE A

A A

SENSE B

5

Codec Regulator

U62

1 2 3

APL5151-475BC-TRL_SOT23-5

+3VS +3VS_HD

FBMA-L11-160808-800LMT_0603

C1042 100P_0402_50V8J

1 2

@

1 2

C1045 4.7U_0805_10V4Z

1 2

C1043 4.7U_0805_10V4Z

@

1 2

C1044 100P_0402_50V8J

12

R853 39.2K_0402_1%

1 2

R854 20K_0402_1%

Codec Signals

39.2K 20K 10K

5.1K

39.2K 20K 10K

5.1K

PORT-A (PIN 32, 33) PORT-B (PIN 21, 22) PORT-C (PIN 23, 24) PORT-D (PIN 48) PORT-E (PIN 14, 15) PORT-F (PIN 16, 17) PORT-G (PIN 20) PORT-H (PIN 47)

VIN GND SHDN#

L92

VOUT

BP

5

4

0.22U_0402_6.3V6K

12

1

C1034

@

2

100P_0402_50V8J

MIC1_C_L MIC1_C_R

HDA_RST_AUDIO#<25>

SENSE_A

+5V_VDDA_HD

C1026

12

10U_0805_10V4Z

1

C1035

2

0.1U_0402_16V4Z

DMIC_DATA DMIC_CLK

EAPD<33>

1 2

C1052 2.2U_0402_6.3V4Z

4.75v

C1025

4.7U_0805_10V4Z

@

0.1U_0402_16V4Z

1

C1036

2

MIC1_C_L MIC1_C_R

MONO_IN

SENSE_A

4

20mil

C1037

1

2

U63

23 24

14 15

21 22

16 17

11

12

13 18 36 35 31 43

42

46

9

1

DVDD

PVDD139PVDD2

DVDD_IO

LINE1_L LINE1_R

LINE2_L LINE2_R

MIC1_L MIC1_R

MIC2_L MIC2_R

2

GPIO0/DMIC_DATA

3

GPIO1/DMIC_CLK

4

PD#

RESET#

PCBEEP

SENSE A SENSE B CBP CBN CPVREF PVSS2

PVSS1

7

DVSS

SPK_OUT_L+

SPK_OUT_L-

SPK_OUT_R+

SPK_OUT_R-

HP_OUT_L HP_OUT_R

SDATA_OUT

EAPD/SPDIFO2

MONO_OUT

MIC2_VREFO

MIC1_VREFO_R

MIC1_VREFO_L

EXPOSE_PAD

ALC269Q-GR_QFN48_7X7

49

DGND To AGND Bypass

1 2

R857 0_0603_5%

1 2

R858 0_0603_5%

1 2

R859 0_0603_5%R859 0_0603_5%

1 2

R860 0_0603_5%R860 0_0603_5%

1 2

R861 0_0603_5%R861 0_0603_5%

DGND AGND

+HD_AVDD

AVDD125AVDD2

SYNC BCLK

SDATA_IN

SPDIFO

VREF

JDREF

CPVEE

AVSS1 AVSS2

100P_0402_50V8J

C1038

@

38

40 41

45 44

32 33

10 6

5 8

47 48 20

29 30

28 27 19 34 26

37

AGNDDGND

W=40mil

1

C1028

10U_0805_10V4Z

2

W=40mil

1

C1032

10U_0805_10V4Z

2

1

C1039

2

0.1U_0402_16V4Z

SPKL+ SPKL-

SPKR+ SPKR-

HDA_BITCLK_AUDIO

AZ_SDIN0_HD_R

10mil 10mil

2

1

0.1U_0402_16V4Z

1

C1040

2

10U_0805_10V4Z

R852

1 2

33_0402_5%

C1055

2.2U_0402_6.3V4Z

+5VS

1

C1029

0.1U_0402_16V4Z

2

+5VS

1

C1033

0.1U_0402_16V4Z

2

40mil

FBMA-L11-160808-800LMT_0603

1

C1041

2

HDA_SYNC_AUDIO <25>

HDA_BITCLK_AUDIO <25>

HDA_SDOUT_AUDIO <25> HDA_SDIN0 <25>

SPDIF <37>

+MIC1_VREFO_R +MIC1_VREFO_L

1

12

2

R856

20K_0402_1%

3

10K_0402_5%

R840

1 2

560_0402_5%

R842

1 2

560_0402_5%

D43

+3VS +5V_VDDA_HD

12

R838

2

B

12

R844

R844 10K_0402_5%

10K_0402_5%

@

2 1

12

R839

R839 20K_0402_1%

20K_0402_1%

C1030

1 2

1U_0402_6.3V4Z

1 2

C

Q72

E

3 1

MMBT3904_SOT23-3

+5V_VDDA_HD

L93

Beep Circuit

EC Beep

BEEP#<33>

SB_SPKR<25>

12

C1027

1 2

1U_0402_6.3V4Z

C1031

1 2

1U_0402_6.3V4Z

CH751H-40PT_SOD323-2

Left Main Speaker Connector

For EMI Chage to BEAD SM01000CB00

DMIC_CLK DMIC_CLK_R

R849 0_0603_5%R849 0_0603_5%

DMIC_DATA

R848 0_0603_5%R848 0_0603_5%R847 1K_0402_5% R847 1K_0402_5%

HP_L <37>

HP_R <37>

HDA_BITCLK_AUDIO

+MIC1_VREFO_R +MIC1_VREFO_L

C1050

0.1U_0402_16V4Z

C1053

C1053 10U_0805_10V4Z

10U_0805_10V4Z

@

1

C1054

0.1U_0402_16V4Z

2

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C1051

0.1U_0402_16V4Z

1 2

R851

22_0402_5%@

1 2

C1048

C1048 10P_0402_50V8J@

10P_0402_50V8J@

SPKL+

SPKLSPKR+

SPKR-

Compal Secret Data

For EMI Change to SM01000AL00

L94 0_0603_5%L94 0_0603_5%

1 2

L95 0_0603_5%L95 0_0603_5%

1 2

L96 0_0603_5%L96 0_0603_5%

1 2

L97 0_0603_5%L97 0_0603_5%

1 2

Deciphered Date

2

DMIC_DATA_R

SM05T1G_SOT23-3

PJDLC05_SOT23-3

MONO_IN

R843

2.4K_0402_5%

D44

2

D45

+3VS

JP19

1

2

3

G1

4

G2

ACES_88266-04001

CONN@

2

3

1

2

1

C1046

C1046 220P_0402_50V8J

220P_0402_50V8J

2

C1047

C1047 220P_0402_50V8J

220P_0402_50V8J

1

CONN@

Speaker Conn.

SPK_L1

SPK_L2 SPK_R1

SPK_R2

3

1

Title

Size Document Number Rev

Custom

401728

Date: Sheet

JP20

1

2

3

5

3

G1

4

6

4

G2

ACES_88266-04001

CONN@

2

3

D46

D46 PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

Compal Electronics, Inc.

SCHEMATICS,MB A5401

1

5 6

A

36 49Monday, May 04, 2009

A

of

5

hexainf@hotmail.com

4

3

2

1

+5VAMP change to +5VS 20090408

+5VS

GNDA

H4

H2

H2 H_3P0

H_3P0

1

H12

H12 H_3P0

H_3P0

1

H22

H22 H_4P2

H_4P2

1

@

H3

H_3P0

@

1

H13

H13 H_3P4

H_3P4

H24

H23

H_4P2

@

1

H32

H32 H_4P1X4P4N

H_4P1X4P4N

@

1

FD2

FD2 FIDUCIAL_C40M80

FIDUCIAL_C40M80

@

1

@

1

@

1

@

1

FD3

FD3 FIDUCIAL_C40M80

FIDUCIAL_C40M80

H1

D D

C C

H1 H_7P0

H_7P0

@

1

H11

H11 H_3P0

H_3P0

@

1

H21

H21 H_4P2

H_4P2

@

1

H31

H31 H_4P0N

H_4P0N

@

1

FD1

FD1 FIDUCIAL_C40M80

FIDUCIAL_C40M80

@

1

H4

H3

H5

H5 H_3P0

H_3P0

@

1

H14

H14 H_3P9

H_3P9

@

1

H33

H33 H_4P1X4P4N

H_4P1X4P4N

@

1

@

1

H6

H6 H_3P0

H_3P0

@

1

H15

H15 H_3P9

H_3P9

@

1

FD4

FD4 FIDUCIAL_C40M80

FIDUCIAL_C40M80

1

H7

H7 H_3P0

H_3P0

1

H16

H16 H_3P0

H_3P0

1

H34

H34 H_2P2N

H_2P2N

1

@

H8

H8 H_3P0

H_3P0

1

H9

H10

H_3P0

S

Q43

@

1

@

1

Q43

JM@

AO3413_SOT23-3

+5VSPDIF

D

1 3

20mil

HP_L<36> HP_R<36>

R512

R512 100K_0402_5%

100K_0402_5%

1 2

G

SPDIF_PLUG#

2

3

D32

D32 PJDLC05_SOT23-3

PJDLC05_SOT23-3

1

1 2

R862 75_0402_1%R862 75_0402_1%

1 2

R863 75_0402_1%R863 75_0402_1%

+5VS

R513

R513 100K_0402_5%

100K_0402_5%

1 2 61

Q77A

Q77A 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

2

For ESD Protect

1 2

L98 BLM15AG121SN1D_0402L98 BLM15AG121SN1D_0402

HPR_R

1 2

L99 BLM15AG121SN1D_0402L99 BLM15AG121SN1D_0402

NBA_PLUG

3

Q77B

Q77B 2N7002DW-T/R7_SOT363-6

2N7002DW-T/R7_SOT363-6

5

4

1

C1056

@

2

NBA_PLUG <36>

JHP1 connector Pin1/4 need change by PVT-3/17 Update ok-4/14

1

C1057

@

2

10P_0402_50V8J

D47

PJDLC05_SOT23-3

HPLHPR_L HPR

2

3

1

SPDIF_PLUG#

+5VSPDIF

SPDIF<36>

100P_0402_50V8J

C584

HeadPhone JACK

JHP1

6 1

4 5 7

3 8

2

SINGA_2SJ1533-000111

CONN@

SPDIF

1

2

B B

Ext.MIC JACK

JMIC1

MIC1_L<36> MIC1_R<36>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MIC1_L MIC1_L_1 MIC1_R

Compal Secret Data

3

1 2

L100BLM15AG121SN1D_0402L100BLM15AG121SN1D_0402

1 2

L101BLM15AG121SN1D_0402L101BLM15AG121SN1D_0402

Deciphered Date

C1058

1

@

2

220P_0402_50V8J

C1059

MIC1_R_1

1

@

2

220P_0402_50V8J

2

3

MIC_SENSE<36>

D48

PJDLC05_SOT23-3

1

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1 2

3 4 5

6

SINGA_2SJ-0960-C01

CONN@

1

A

of

37 49Monday, May 04, 2009

of

37 49Monday, May 04, 2009

of

37 49Monday, May 04, 2009

A

+5VALW TO +5VS

+5VALW

1

C570

C571

C571 10U_0805_10V4Z

+VSB

10U_0805_10V4Z

R239

R239 200K_0402_5%

200K_0402_5%

SUSP

1 1

2

12

2

10U_0805_10V4Z

3

2N7002DW-T/R7_SOT363-6

5

Q29B

4

U24

8

D

7

D

6

D

5

D

SI4800BDY_SO8

5VS_GATE

4.305A

S S S G

1 2 3 4

1

2

+5VS

1

C576

C576 10U_0805_10V4Z

10U_0805_10V4Z

2

1U_0402_6.3V4Z

2N7002DW-T/R7_SOT363-6

C577

0.1U_0603_25V7K

1

C573

2

Q29A

+3VALW TO +3VS

+3VALW +3VS

2 2

1

C575

C575 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C574

2

10U_0805_10V4Z

U23

8

D

7

D

6

D

5

D

SI4800BDY_SO8

5VS_GATE

4.121A

S S S G

1 2 3 4

1

C572

C572 10U_0805_10V4Z

10U_0805_10V4Z

2

1

C569

2

1U_0402_6.3V4Z

1 2 13

D

S

B

R238

470_0603_5%

1 2 61

2

R243

470_0603_5%

SUSP

2

G

Q27

2N7002_SOT23

SUSP

DVT

R202

1K_0402_5%

+VSB

R196

R196 200K_0402_5%

200K_0402_5%

VLDT_EN#

2N7002DW-T/R7_SOT363-6

+1.2VALW TO +1.2V_HT

+1.2VALW

12

1

C509

2

10U_0805_10V4Z

12

Q22B

5

U17

8

D

7

D

6

D

5

D

SI4800BDY_SO8

1.2VS_GATE

3

4

S S S

G

3.265A

1 2 3 4

C

+1.2V_HT

1

C470

C470 10U_0805_10V4Z

10U_0805_10V4Z

2

2N7002DW-T/R7_SOT363-6

1

C506

0.1U_0603_25V7K

2

1

C462

2

1U_0402_6.3V4Z

Q22A

1 2 61

R197

470_0603_5%

2

VLDT_EN#

D

SYSON#<31,32,44>

SYSON<33,43>

SUSP<29,35>

SUSP#<33,35,41,45>

VLDT_EN<35,43,44>

SYSON#

SYSON

R174

100K_0402_5%

SUSP

R248

10K_0402_5%

VLDT_EN#

R40

10K_0402_5%

E

+5VALW

R169

R169 100K_0402_5%

100K_0402_5%

1 2

13

D

Q21

2

2N7002_SOT23

G

S

12

+5VALW

R242

R242 100K_0402_5%

100K_0402_5%

1 2

13

D

Q30

2

2N7002_SOT23

G

S

12

+5VALW

R43

R43 100K_0402_5%

100K_0402_5%

1 2

13

D

Q4

2

2N7002_SOT23

G

S

12

+1.8V to +1.8VS

+1.8V

1

C710

2

10U_0805_10V4Z

R271

R271 200K_0402_5%

200K_0402_5%

SUSP

1

2

12

Q46B

D

S

A

5

R153

R153 470_0603_5%

470_0603_5%

1 2 13

G

Q18

Q18 2N7002_SOT23

2N7002_SOT23

C714

3 3

+1.5VS +2.5VS +1.8V+0.9V

4 4

R241

R241 470_0603_5%

470_0603_5%

1 2 13

D

S

C714

10U_0805_10V4Z

+VSB

2N7002DW-T/R7_SOT363-6

SUSP SUSP SYSON# SYSON#

2

G

Q26

Q26 2N7002_SOT23

2N7002_SOT23

6.988A

U40

8

S

D

7

S

D

6

S

D

5

G

D

SI4800BDY_SO8

1.8VS_GATE SUSP

3

4

2

1 2 3 4

1

2

C711

0.1U_0603_25V7K

+1.8VS

1

C712

C712 10U_0805_10V4Z

10U_0805_10V4Z

2

1U_0402_6.3V4Z

2N7002DW-T/R7_SOT363-6

R112

R112 470_0603_5%

470_0603_5%

1 2 13

D

2

G

Q11

S

2N7002_SOT23

1

C709

2

Q46A

1 2 61

R292

470_0603_5%

2

R113

R113 470_0603_5%

470_0603_5%

1 2 13

D

S

B

2

G

Q12

Q12 2N7002_SOT23

2N7002_SOT23

+1.1VS

D

S

1 2 13

R41

R41 470_0603_5%

470_0603_5%

VLDT_EN#

2

G

Q5

Q5 2N7002_SOT23

2N7002_SOT23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2008/10/06 2009/10/06

Compal Secret Data

Deciphered Date

D

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet of

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

38 49Monday, May 04, 2009

E

of

A

hexainf@hotmail.com

B

C

D

PR5

10K_0402_1%

1 2

PJ1

112

JUMP_43X118

PJ3

112

JUMP_43X118

PJ5

112

JUMP_43X39

PJ7

112

JUMP_43X118

PJ9

112

JUMP_43X118

PJ11

112

JUMP_43X79@

PJ13

112

JUMP_43X118@

Vin Dectector

PR1

1M_0402_1%

1 2

VS

8

P

1

0

+1.1VS+1.1VSP

G

4

+5VALW

+2.5VS

PU1A

LM358DT_SO8

2

VINVIN

12

PR3

84.5K_0402_1%

12

0.1U_0603_25V7K

84.5K_0402_1%

12

PR7

20K_0402_1%

RTCVREF

PJ2

2

JUMP_43X79

PJ4

2

JUMP_43X118

PC5

PC5 1000P_0402_50V7K

1000P_0402_50V7K

112

+0.9V+0.9VP

+1.8V+1.8VP

PR6

PR6 22K_0402_5%

22K_0402_5%

1 2

3

+

2

-

PC6

PR11

10K_0402_1%

1 2

Delete one of PJ6 for 1.8V jumper (0305) EVT

PJ8

2

+1.5VSP

+VGA_COREP

112

PJ10

112

JUMP_43X79@

+1.5VS

2

+VGA_CORE

Delete one VGA jumper (0306) EVT

PJ14

2

+NB_COREP

112

JUMP_43X79@

+NB_CORE

03/05 change footprint (refer to the JAL70)

PC3

PR9

13

LL4148_LL34-2

PD4

PR22

VIN

PD1

LL4148_LL34-2

1 2 12

12

PC8

0.1U_0603_25V7K

12

PQ3

12

PC4

1000P_0402_50V7K

12

PR10

PR10 68_1206_5%

68_1206_5%

2

VS

12

PD14

PD14 LL4148_LL34-2

LL4148_LL34-2

13

PR19

470_0402_5%

1 2

AD_ON

PR4

10K_0402_5%

0_0402_5%

ACIN<26,33> PACIN<41,45>

1 2

10K_0402_1%

PACIN

+3VALWP +3VALW

+5VALWP

+VSBP +VSB

+1.2VALWP +1.2VALW

+NB_COREP +NB_CORE

+2.5VSP

PL1

PJP1

1 1

ACES_88299-0600

-+

2 2

1

2

3

4

5

6

7

GND

8

GND

PBJ1

ML1220T13RE

BATT+

51ON#<35>

DC_IN_S1

12

CHGRTCP

AD_ON

+RTCBATT

LL4148_LL34-2

200_0603_5%

1 2

100K_0402_1%

22K_0402_1%

12

+RTCBATT

PD3

PR12

PR13

PR14

1 2

PC1

PC1 1000P_0402_50V7K

1000P_0402_50V7K

12

N1

12

RTCVREF

PU2

G920AT24U_SOT89-3

PR17

560_0603_5%

1 2

PR20

100K_0402_1%

PR17

+RTCBATT

12

GA_ON/OFFBTN#

3.3V

12

PR16

560_0603_5%

+CHGRTC

3 3

4 4

1 2

GA_ON/OFFBTN#<35>

G920AT24U_SOT89-3

3

OUT

PC9

PC9 10U_0805_10V4Z

10U_0805_10V4Z

PQ2

TP0610K-T1-E3_SOT23-3

PR23

0_0402_5%

1 2

PL1

SMB3025500YA_2P

1 2

12

PC2

100P_0402_50V8J

TP0610K-T1-E3_SOT23-3

N1

PC7

0.22U_0603_25V7K

N2

2

IN

GND

1

13

2

PD15

PD15 LL4148_LL34-2

LL4148_LL34-2

1 2

PQ1

12

PR15

PR15 200_0603_5%

200_0603_5%

12

PC10

PC10 1U_0805_25V4Z

1U_0805_25V4Z

0_0402_5%

1 2

AD_ON#<33>

DC_IN_S2

12

100P_0402_50V8J

68_1206_5%

2

PR18

TP0610K-T1-E3_SOT23-3

100K_0402_1%

Min. Typ Max. H-->L 16.976V 17.525V 17.728V L-->H 17.430V 17.901V 18.384V

12

PR2

@PR2

@

12

PD2

PR8

PD2 GLZ4.3B_LL34-2

GLZ4.3B_LL34-2

2

+3VLP

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

D

39 49Monday, May 04, 2009

A

S5 W/O WOL

AD_ON#

A

HL

S5 W WOL S3/S0

L

B

A

--03/05--OK->add OLB to Library)

--03/09--PJP1 mirror to correct location (update OK)

B

C

D

PH1 under CPU botten side :

CPU thermal protection at 93 degree C Recovery at 57 degree C

12

3 2

12

PR32

PR32 100K_0402_1%

100K_0402_1%

VL

47K_0402_1%

1 2

8

P

+

-

G

LM393DG_SO8

4

PR29

100K_0402_1%

<40,41>

PJP2

1 1

1

2

PI

3

4

5

6

7

8

9

GND

10

GND

SUYIN_200275GR008G13GZR

12

BATT_S1

100_0402_1%

PR216

PR216 1K_0402_5%

1K_0402_5%

EC_SMCA

EC_SMDA

PR27

TH

PR28

PR28 100_0402_1%

100_0402_1%

1 2

12

PR33

PR33 1K_0402_1%

1K_0402_1%

PR31

6.49K_0402_1%@

12

VMB

12

PC12

PC12 1000P_0402_50V7K

1000P_0402_50V7K

PL2

SMB3025500YA_2P

1 2

+3VLP

BATT+

12

PC13

0.01U_0402_25V7K

<40,41>

100K_0603_1%_TH11-4H104FT

PH1

12

PC14

0.22U_0603_16V7K

VL

12

0.1U_0603_25V7K

PR26

13.7K_0402_1%

1 2

PR30

15.4K_0402_1%

PC11

TM_REF1

12

PC15

1000P_0402_50V7K

PR25

O

PU3A

12

VL

PR24

PR24 47K_0402_1%

47K_0402_1%

1 2

PQ52

PD5

1

VL

12

LL4148_LL34-2

PQ52

2

G

PQ51

2

G

ENTRIP2 <42>

13

D

2N7002W-T/R7_SOT323-3

S

ENTRIP1 <42>

13

D

2N7002W-T/R7_SOT323-3

S

2 2

TP0610K-T1-E3_SOT23-3

B+

100K_0402_1%

PQ6

2

G

PC19

0.1U_0402_16V7K

100K_0402_1%

22K_0402_1%

13

D

2N7002W-T/R7_SOT323-3

S

3 3

VL

PR40

100K_0402_1%

POK<42,44>

1 2

PR41

PR41 0_0402_5%

0_0402_5%

12

@

PR36

PR38

1 2

12

PC16

@

0.22U_1206_25V7K

PQ5

2

BATT_TEMP <33>

EC_SMB_CK1 <33>

EC_SMB_DA1 <33>

13

12

@

+VSBP

PC17

0.1U_0603_25V7K

PH2 near main Battery CONN :

BAT. thermal protection at 79 degree C Recovery at 47 degree C

VL

12

PH2

@PH2

PC18

@PC18

@

PR37

@PR37

@

13.7K_0402_1%

1 2

12

PR39

@PR39

@

15.4K_0402_1%

TM_REF1

100K_0603_1%_TH11-4H104FT

0.22U_0603_16V7K

@PR35

@

47K_0402_1%

1 2

VL

5

+

6

-

PR35

8

P

O

G

PU3B

LM393DG_SO8

4

7

VL

1 2

PR34

@PR34

@

47K_0402_1%

PD6

@PD6

@

LL4148_LL34-2

12

4 4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

D

of

40 49Monday, May 04, 2009

A

hexainf@hotmail.com

B

C

D

Iada=0~4.74A(90W/19V=4.736A)

PQ7

PQ7 AO4407_SO8

VIN

1 1

12

PR43

PR43 47K_0402_1%

47K_0402_1%

2

13

D

PQ16

2

2N7002W-T/R7_SOT323-3

G

S

2 2

3 3

S

ACON<45>

PACIN<39,45>

ACOFF<33,45>

CP mode

AO4407_SO8

8 7

5

47K

2

47K

13

PQ14

1 3

PDTC115EU_SOT323

ACON

22K_0402_5%

PACIN

1 2

PDTC115EU_SOT323

ACOFF

4

PQ12

PQ12 PDTA144EU_SOT323-3

PDTA144EU_SOT323-3

PR62

PQ21

2

Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05) where Vaclm=1.502V, Iinput=4.07A

CC=0.6~4.48A IREF=0.7224*Icharge IREF=0.43V~3.24V

BATT Type

4 4

Normal 3S LI-ON Cells

Charging Voltage (0x15)

12600mV

ADP_I = 19.9*Iadapter*Rsense

P2

PQ8

PQ8 AO4407_SO8

AO4407_SO8

PC25

0.1U_0603_25V7K

PQ19

2

G

12

13

D

S

IREF<33>

1 2 3 6

4

PR45

PR45 200K_0402_1%

200K_0402_1%

FSTCHG<33>

6251VDD

PR51

PR51 150K_0402_1%

150K_0402_1%

3S/4S#<33>

2N7002W-T/R7_SOT323-3

PR63

80.6K_0402_1%

PR65

100K_0402_1%

1 2

2

0.01U_0402_25V7K

1 2 36

12

13

CV mode

12.60V

8 7

5

1 2

PC21

5600P_0402_25V7K

1SS355TE-17_SOD323-2

PR52 47K_0402_5%PR52 47K_0402_5%

13

1 2

PC32

ADP_I<33>

12

6251VREF 6251aclim

PC37

0.01U_0402_25V7K

65W/90W#<33>

CP = 85%*Iada ; CP = 4.07A

PR42

PR46

100K_0402_1%

1 2

PR50

10K_0402_5%

1 2

PC27

1 2

PC34

PC35

1 2

PR66

PQ22

2

G

PR42

0.02_2512_1%

1 2

12

4 3

PQ10 TP0610K-T1-E3_SOT23-3PQ10 TP0610K-T1-E3_SOT23-3

6251VDD

12

PR53

100K_0402_1%

PR59

100_0402_1%

1 2

PR67

2.37K_0402_1%

PR67

2.37K_0402_1%

12

20K_0402_1%

PR69

12

13

D

2N7002W-T/R7_SOT323-3

S

PR70

18.2K_0402_1%

1 2

2

PC26

6251_EN CSON

6251VREF

P3

PD9

0.1U_0402_16V7K

PQ17

PQ17 PDTC115EU_SOT323

PDTC115EU_SOT323

PC31 6800P_0402_25V7KPC31 6800P_0402_25V7K

PR57 10K_0402_1%PR57 10K_0402_1%

1 2

100P_0402_50V8J@

0.1U_0402_16V7K

1 2

11.5K_0402_1%

CALIBRATE#<33>

Part Number is wrong with 18.2K

12

2.2U_0603_6.3V6K

31.6K_0402_1%

1 2

B+

DCIN

13

PR48

12

100K_0402_1%

PU4

1

VDD

2

ACSET

3

EN

4

CELLS

5

ICOMP

6

VCOMP

7

ICM

8

VREF

9

CHLIM

10

ACLIM

11

VADJ

12

GND

ISL6251AHAZ-T_QSOP24

PR72

PJ15

2

112

JUMP_43X118

PQ11

13

PDTC115EU_SOT323

PD8

2

1

3

BAS40CW_SOT323-3

PC28

0.1U_0603_25V7K

12

20_0402_5%

1 2

PC30

0.047U_0603_16V7K

1 2

PR55

20_0402_5%

12

PR56

PR56 20_0402_5%

20_0402_5%

1 2

2_0402_5%

PR64

2.2_0603_5%

1 2

PC41

1 2

4.7U_0805_6.3V6K

DCIN

ACPRN

CSON

CSOP

CSIN

CSIP

PHASE

UGATE

BOOT

VDDP

LGATE

PGND

24

23

22

21

20

19

18

17

16

15

14

13

2

DCIN

1 2

PC33

0.1U_0603_25V7K

1 2

LX_CHG

DH_CHG

BST_CHG

6251VDDP

DL_CHG

LI-3S :13.5V----BATT-OVP=1.5012V BATT-OVP=0.1112*VMB Per cell=3.5V

PR74

10K_0402_1%

BATT_OVP<33>

1 2

CSIN

CSIP

PC20

FSTCHG

SUSP#

wrong Value

PR54

PR58

PC36

0.1U_0603_25V7K

BST_CHGA

12

PD11

PD11 RB751V-40TE17_SOD323-2

RB751V-40TE17_SOD323-2

6251VDD

1 2

PR68

4.7_0603_5%

LM358DT_SO8

12

PC22

PC23

10U_1206_25V6M

FSTCHG<33>

SUSP# <33,35,38,45>

CSOP

12

8

PU1B

7

5

P

+

0

6

-

G

4

12

PC24

0.1U_0603_25V7K

0.1U_0603_25V7K 2200P_0402_25V7K

2200P_0402_25V7K

578

VS

12

PC42

0.01U_0402_25V7K

CHG_B+

3 6

VMB

B+

1 2 3 6

PR47

10K_0402_1%

PQ13

PDTC115EU_SOT323

PQ18

PQ18 AO4466_SO8

AO4466_SO8

02/26 EVT

PL3

1 2

12

PR61

4.7_1206_5%

12

PC38

680P_0402_50V7K

PL3

10UH_PCMB104T-100MS_6A_20%

241

PQ20

PQ20 AO4466_SO8

AO4466_SO8

241

<40,41>

12

PR71

PR71 340K_0402_1%

340K_0402_1%

12

PR73

PR73 499K_0402_1%

499K_0402_1%

12

PR75

105K_0402_1%

12

PQ9

PQ9 AO4407_SO8

AO4407_SO8

4

1 2 13

PC43

0.01U_0402_25V7K

8 7

5

PR44

47K_0402_1%

1 2

1SS355TE-17_SOD323-2

1 2

PD10

1SS355TE-17_SOD323-2

2

1 2

CHGCHG

1 2

PR60

0.02_2512_1%

VIN

PD7

200K_0402_1%

12

PC29

0.1U_0603_25V7K

ACOFF

PR49

1 2

D

PQ15

S

4 3

13

VIN

PACIN

2

2N7002W-T/R7_SOT323-3

G

<40,41>

12

PC40

PC39

10U_1206_25V6M

BATT+

Security Classification

Issued Date

-

A

B

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

D

41 49Monday, May 04, 2009

A

5

4

3

2

1

Frequency different

2VREF_51125

RT8205C 300KHZ/375KHZ

TPS51125 245KHZ/305KHZ

OCP calculation method different

D D

PR76

13K_0402_1%

1 2

PR78

196K_0402_1%

BST_3V UG_3V LX_3V LG_3V

PR78

20K_0402_1%

1 2

PR80

1 2

PU5

25

P PAD

7

VO2

8

VREG3

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

12

B++

PJ16

@PJ16

@

2

B+

C C

B B

112

JUMP_43X118

12

PC45

2200P_0402_50V7K

PC46

10U_1206_25V6M

02/27_EVT_ change 7_7

8.2UH_PCMB063T-8R2MS_4.5A_20%

+3VALWP

(ME interference)

578

PQ23

PQ23 AO4466_SO8

AO4466_SO8

3 6

PL4

12

PR84

1

+

PC52

2

330U_D2E_6.3VM_R25M

PR84

PC54

ENTRIP2 <40>ENTRIP1 <40>

241

12

4.7_1206_5%

12

3 6

241

680P_0603_50V7K

578

PQ25

PQ25 AO4712_SO8

AO4712_SO8

PC47

4.7U_0805_10V6K

B+

+3VLP

12

1 2

2.2_0603_1%

PC50

0.1U_0402_16V7K

MAINPWON<6,45>

PR86

499K_0402_1%

1 2

PR88

PR82

12

PC89

PC89 1U_0603_10V6K

1U_0603_10V6K

100K_0402_1%

PC44

0.22U_0603_10V7K

ENTRIP2

6

5

VFB2

ENTRIP2

SKIPSEL

EN0

14

13

1 2

PR87

0_0402_5%@

B++

12

3

2

4

VREF

TONSEL

GND

VIN

17

15

16

12

RT8205C Rtrip*Itrip/10

GND pad need add via to ground Add pull high resistor to +3VLP on pin13

PR77

30K_0402_1%

1 2

PR79

19.1K_0402_1%

1 2

PR81

226K_0402_1%

ENTRIP1

1 2

1

VFB1

ENTRIP1

24

VO1

23

PGOOD

VBST1

DRVH1

LL1

DRVL1

VREG5

VCLK

TPS51125RGER_QFN24_4X4

18

BST_5V

22

UG_5V

21

LX_5V

20

LG_5V

19

VL

PC56

4.7U_0805_10V6K

TPS51125 (Rtrip*Itrip/9)-24mV

B++

12

PC48

2200P_0402_50V7K

POK <40,44>

PC51

PR83

0.1U_0402_16V7K

2.2_0603_1%

1 2

0.1U_0402_16V7K

1 2

12

PC49

10U_1206_25V6M

AO4466_SO8

AO4712_SO8

PQ24

PQ26

578

3 6

241

8.2UH_PCMB063T-8R2MS_4.5A_20%

578

3 6

1 2

12

PR85

4.7_1206_5%

12

PC55

241

680P_0603_50V7K

PL5

(ME interference)

02/27_EVT_change 7_7

+5VALWP

1

+

PC53

2

330U_D2E_6.3VM_R25M

2VREF_51125

PQ27

13

D

S

2

G

2N7002W-T/R7_SOT323-3

G

2N7002W-T/R7_SOT323-3

PQ28

2

G

13

D

S

2N7002W-T/R7_SOT323-3

+3.3VALWP Ipeak=5.6A ; Imax=3.92A ; DCR=54m~60m ohm C (330U,ESR=25m ohm)

VL

100K_0402_1%

1 2

VS

A A

PR90

100K_0402_1%

PR89

12

PR91

49.9K_0402_1%

5

12

PQ29

2

G

PC58

@ PC58

@

0.01U_0402_16V7K

13

D

2N7002W-T/R7_SOT323-3

S

Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Iocp=11.41~13.58A (Freq=305KHz) (Rtrip=196K)

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/11/12 2008/11/12

3

PC57

0.1U_0603_25V7K

Compal Secret Data

Deciphered Date

+5VALWP Ipeak=7A ; Imax=4.9A;DCR=54m~60m ohm C(330U,ESR=25m ohm) Rds(on)=18m ohm(max) ; Rds(on)=15m ohm(typical) Iocp=13.63~16.18A (Freq=245KHz) (Rtrip=226K)

Note:Poscap (P/N:SGA*)

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

SCHEMATICS,MB A5401

KAQB0

Monday, May 04, 2009

1

42 49

of

A

hexainf@hotmail.com

B

C

D

Confirm :UMA (pop-->o/p:adjustable) Discrete(unpop-->o/p:fix)

PR94

R*C>1ms

FB2_NB_COREP

@

PR92

PR92 12K_0402_1%

12K_0402_1%

1 2 13

D

2

G

S

PQ30

12

PQ30

SSM3K7002F_SC59-3@

+NB_COREP

1

+

PC80

PC80 330U_D2E_2.5VM

330U_D2E_2.5VM

2

avoid ME interference

POWER_SEL

PC60

12

1U_0402_6.3V6K

4

VCC1

1U_0402_6.3V6K

PR96

2.2_0603_1%

1 2

3

VCC2

12

PC64

0.1U_0603_25V7K

10_0603_1%

PC68

2

VIN2

+5VALW

PC84

PC84 1U_0402_6.3V6K

1U_0402_6.3V6K

1 2

PR99

12

1000P_0402_50V7K

1

GND_T

FSET2

PGOOD2

FB2

VO2

OCSET2

EN2

PHASE2

UGATE2

21

BST_1.1V

LG_1.1V

PR100

22K_0402_1%

1 2

29

28

27

26

OCSET_1.1V

25

1.1V_EN

24

LX_1.1V

23

UG_1.1V

22

PR116

0_0603_5%

1 2

FB2_NB_COREP +NB_COREP

6228_1.1VO2

PC81

0.1U_0402_16V7K

1 2

PC59

1U_0402_6.3V6K

PR95

2.2_0603_1%

1 1

PJ17

JUMP_43X118

2

B+

2 2

112

PC65

22.6K_0402_1%

1 2

ISL6228_B+

1

Avoid ME Interference (03/10)

+

68U_25V_M_R0.44

PR105

+

2

PC67

1000P_0402_50V7K

45.3K_0402_1%

12

1 2

PR104

3.3K_0402_5%

PR102

12

PR103

22.6K_0402_1%

6228_1.8VO1

1 2

FB_1.8V-1

ISL6228_B+ ISL6228_B+

1000P_0402_50V7K

ISL6228_B+

12

PC72

22P_0402_50V8J

1 2

+1.8VP

3 3

avoid ME interference

change to big for efficiency

1 2

PL6

1.8UH_1164AY-1R8N=P3_9.5A_30%

1

+

PC75

PC75 330U_D2E_2.5VM

330U_D2E_2.5VM

2

680P_0402_50V7K

1 2

4.7_1206_5%

SYSON<33,38>

PC70

4.7U_1206_25V6K

PR110

PR110 11K_0402_1%

11K_0402_1%

12

PR112

12

PC78

0_0402_5%

12

PR111

12

PC73

@PC73

@

0.01U_0402_25V7K

12

PC71

4.7U_1206_25V6K

241

8

D6D5D7D

G

S

3

2

1

1.8V_EN

578

PQ32

PQ32 AO4466_SO8

AO4466_SO8

3 6

PQ33

PQ33 FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

4

PC79

0.1U_0402_16V7K

OCSET_1.8V

UG_1.8V

12

LX_1.8V

PR114

0_0603_5%

1.8V_EN

BST_1.8V

12

10

11

12

13

14

+5VALW

1U_0402_6.3V6K

LG_1.8V

+5VALW +5VALW

PC63

0.1U_0603_25V7K

PR98

10_0603_1%

12

PC66

8

9

PC66

FB1

VO1

OCSET1

EN1

PHASE1

UGATE1

BOOT1

PC83

PR101

18.2K_0402_1%

1 2

7

6

FSET1

PGOOD1

ISL6228HRTZ-T_QFN28_4X4

PVCC115LGATE116PGND117PGND218LGATE219PVCC220BOOT2

1 2

12

5

VIN1

Vref=0.6V

PU6

POWER_SEL<11>

HIGH 1.0V

1 2

0.1U_0402_16V7K

@

ISL6228_B+

578

AO4466_SO8

AO4466_SO8 PQ34

PQ34

3 6

241

8

D6D5D7D

PQ35

4

PQ35

G

S

3

2

1

1.1VLOW

PR97

PR97 10K_0402_5%@

10K_0402_5%@

PC62

PR106

30K_0402_1%

12

FDS6670AS_NL_SO8

SSM3K7002F_SC59-3

12

R*C>1ms

1 2

12

PC74

4.7U_1206_25V6K

12

PR115

4.7_1206_5%

12

PC82

680P_0402_50V7K

PQ31

@

PQ31

@

2

G

3.3K_0402_5%

PC76

4.7U_1206_25V6K

1UH_PCMB103E-1R0MS_20A_20%

1 2

PR93

10K_0402_1%@

13

D

S

PR107

12

PR108

20K_0402_1%

1 2

PR109

8.66K_0402_1%

1 2

PC77

0.033U_0402_16V7K

1 2

PR113

8.66K_0402_1%

1 2

PL7

+5VALW

12

10K_0402_5%@

1 2

PC61

@PC61

@

0.1U_0402_16V7K

PC69

1000P_0402_50V7K

1 2

DCR=3.5m ohm /tolerance :20%/(L=1uH )

PR117

0_0402_5%

DCR=7.5m ohm /tolerance :30%/(L=1.8uH ) C(330U,ESR=15m ohm)

1.8VP Ipeak=9.023A, Imax=6.316A, Iocp=1.2*Ipeak=10.8276A Fsw=1/1.5E-10*18.2k =366K Vo=Vref*((PR97+PR99)/PR97) Roset=change to 11k ohm (remember) Csen=change to 0.022UF=22PF (remember)

4 4

Iocp=11.282A

VLDT_EN<35,38,44>

0_0402_5%

1 2

1.1V_EN

12

@PC85

@

0.1U_0402_16V7K

PC85

C(330U,ESR=15m ohm)

1.8VP Ipeak=11.93A, Imax=8.351A, Iocp=1.2*Ipeak=14.316A Fsw=1/1.5E-10*22k =303K Vo=Vref*((PR97+PR99)/PR97) Roset=change to 8.66k ohm (remember) Csen=change to 0.033UF=33PF (remember) Iocp=20.619A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

C

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

43 49Monday, May 04, 2009

D

A

5

PR119

0_0402_5%

D D

POK<40,42>

+5VALW

C C

VFB=0.75V ; Rdson=15.8m ~ 19.6m ohm L(2.2U,DCR=21m ohm) ; C(330U,ESR=15 mohm) Vo=VFB*(1+PR116/PR117)=1.2V Fsw=274.6KHz

Ipeak=2.865A, Imax=2.0055A,1.2*Ipeak=3.438A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=2.589A =>1/2DeltaI=1.2945A Vtrip=Rtrip*10uA=10K*10uA=0.1V Iocp=4.938~6.568A

B B

12

@

PR200

100K_0402_5%

Add pull down resistance

PR121

300_0603_5%

1 2

PC95

1U_0603_10V6K

PC90

@PC90

@

0.01U_0402_25V7K

12

4

PC94

@PC94

@

47P_0402_50V8J

1 2

PR123

6.34K_0402_1%

1 2

12

PR124

PR124 10K_0402_1%

10K_0402_1%

PR118

200K_0402_5%

1 2

2 3 4 5 6

PU7

TON VOUT V5FILT VFB PGOOD

15

1

TP

EN_PSV

VFB=0.75V

GND7PGND

8

14

VBST

V5DRV

TPS51117RGYR_QFN14_3.5x3.5

DRVH

TRIP

DRVL

BST_1.2V

DH_1.2V

13

LX_1.2V

12

LL

11 10

DL_1.2V

9

3

PR120

0_0603_5%

1 2

12

VLDT_EN<35,38,43>

BST_1.2V-1

PR122

10K_0402_1%

VLDT_EN

PC91

0.1U_0603_25V7K

1 2

+5VALW

12

PC93

4.7U_0805_10V6K

PR125

PR125 0_0402_5%

0_0402_5%

1 2

1U_0603_10V6K

1U_0402_6.3V6K

12

PC99

@PC99

@

pull down resistance

DH_1.2V

12

@

PR127

PR127 47K_0402_5%

47K_0402_5%

2

PQ36

8

G2

D2 D2

S2/D1

G1

S2/D1 S2/D1

S1

AO4932_SO8

2.2UH +-20% FDV0630-2R2M=P3 7.2A

2.2UH +-20% FDV0630-2R2M=P3 7.2A PL8

PL8

1 2

+5VALW

12

6

PU8

VIN

POK

VOUT

VCNTL

VOUT

EN

FB

VIN

GND

APL5912-KAC-TRL_SO8

1

PC96

7 6 5

7

8

1 2 3 4

5 4 3 2 9

DL_1.2V

51117_B+

12

PC86

4.7U_0805_25V6-K

+1.2VALW

1

2

PC97

12

4.7U_0805_6.3V6K

1.15K_0402_1%

3K_0402_1%

12

PC87

PJ19

PJ19 JUMP_43X79

JUMP_43X79

@

PR126

PR128

JUMP_43X118

2

4.7U_0805_25V6-K

1 2

PC88

12

PJ18

112

2200P_0402_25V7K

1

+

PC92

PC92 330U_D2E_2.5VM

330U_D2E_2.5VM

2

12

PC100

0.01U_0402_25V7K

B+

PC98

12

1

+1.2VALWP

+1.1VSP

22U_0805_6.3V6M

+1.8V

1

PJ20

1

JUMP_43X79

2

PC101

4.7U_0603_6.3V6M

PR130

2N7002W-T/R7_SOT323-3

0_0402_5%

SYSON#<31,32,38>

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1 2

PC105

0.1U_0402_16V7K

Compal Secret Data

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

1 2

13

D

PQ37

2

G

12

S

PR129

1K_0402_1%

PR131

1K_0402_1%

2

12

PC103

0.1U_0402_16V7K

PU9

1

VIN

2

GND

3

REFEN

4

VOUT

RT9173DPSP_SO8

+0.9VP

12

PC104

PC104 10U_0805_6.3V6M

10U_0805_6.3V6M

Title

SCHEMATICS,MB A5401

Size Document Number Rev

Custom

401728

Date: Sheet

6

VCNTL

5

NC

7

NC

8

NC

9

GND

Compal Electronics, Inc.

1

+3VALW

12

PC102

PC102 1U_0402_6.3V6K

1U_0402_6.3V6K

of

44 49Monday, May 04, 2009

A

5

hexainf@hotmail.com

PR141

0_0402_5%

D D

VFB=0.75V ; Rdson=15.8m ~ 19.6m ohm L(2.2U,DCR= 21m ohm); C(330U,ESR=15m ohm) Vo=VFB*(1+PR116/PR117)=1.5V Fsw=207.756KHz Ipeak=1A, Imax=0.7A,1.2*Ipeak=1.2A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=3.0227A =>1/2DeltaI=1.5113A Vtrip=Rtrip*10uA=10K*10uA=0.1V Iocp=5.1556~6.7856A

C C

SUSP#<33,35,38,41>

12

@

PR207

100K_0402_5%

Add pull down resistance

+5VALW

PR213

300_0603_5%

1 2

1U_0603_10V6K

N1

8

PU12B

5

P

+

7

O

6

-

G

LM393DG_SO8

4

VL

12

PC158

@PC158

@

0.01U_0402_25V7K

12

PC106

PR143

2.2M_0402_5%

12

4

PC109

@PC109

@

47P_0402_50V8J

1 2

PR214

10K_0402_1%

1 2

12

PR140

PR140 10K_0402_1%

10K_0402_1%

PR139

300K_0402_5%

1 2

3

PC108

14

1

PU10

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

15

TP

EN_PSV

VFB=0.75V

GND7PGND

8

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

BST_1.5V

DH_1.5V LX_1.5V

DL_1.5V

0_0603_5%

1 2

12

PR142

PR215

0_0603_5%

0.1U_0603_25V7K

BST_1.5V-1

+5VALW

12

10K_0402_1%

PC108

1 2

PC159

4.7U_0805_10V6K

+3VS

B+

DH_1.5V

12

1U_0402_6.3V6K

2

PQ45

8

G2

D2 D2

S2/D1

G1

S2/D1 S2/D1

S1

AO4932_SO8

2.2UH +-20% FDV0630-2R2M=P3 7.2A

2.2UH +-20% FDV0630-2R2M=P3 7.2A PL14

PL14

1 2

PU11

APL5508-25DC-TRL_SOT89-3

2

IN

GND

1

PC112

7 6 5

1 2 3 4

DL_1.5V

OUT

3

1.5V_51117

12

PC110

4.7U_0805_25V6-K

PC111

4.7U_0805_6.3V6K

PC111

4.7U_0805_6.3V6K

PC157

4.7U_0805_25V6-K

1 2

12

PR145

@PR145

@

150_1206_5%

PJ21

JUMP_43X118

2

112

PC160

2200P_0402_25V7K

1

+

2

+2.5VSP

1

B+

PC161

PC161 330U_D2E_2.5VM

330U_D2E_2.5VM

+1.5VSP

12

PR144

PR144 499K_0402_1%

1

O

N1

8

PU12A

P

+

-

G

LM393DG_SO8

4 <BOM Structure>

PR149

34K_0402_1%

3 2

12

PC114

1000P_0402_50V7K

12

32.4

PRG++

13

D

PQ41

S

PR151

@PR151

@

66.5K_0402_1%

PR147

191K_0402_1%

499K_0402_1%

2

2N7002W-T/R7_SOT323-3

G

13

12

PR146

100K_0402_1%

PD13

B B

MAINPWON<6,42>

ACON<41>

PD13

2

1

3

BAS40CW_SOT323-3

12

PC113

0.1U_0603_25V7K

RTCVREF

ACIN

Precharge detector Min. typ. Max.

A A

H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V

12

PR148

PR150

47K_0402_5%

12

PQ42

PQ42 PDTC115EU_SOT323

PDTC115EU_SOT323

2

499K_0402_1%

12

PC115

0.01U_0402_25V7K

+5VALW

VIN

PACIN <39,41>

PD12

12

LL4148_LL34-2

ACOFF<33,41>

PR132

1K_1206_5%

1 2

PR133

1K_1206_5%

1 2

PR134

1K_1206_5%

1 2

PR135

1K_1206_5%

1 2

TP0610K-T1-E3_SOT23-3

PQ38

13

12

PR136

PR137

100K_0402_5%

13

PQ39

PQ39 PDTC115EU_SOT323

PDTC115EU_SOT323

2

100K_0402_5%

2

12

PR138

100K_0402_5%

13

PQ40

PQ40 PDTC115EU_SOT323

PDTC115EU_SOT323

B+

BATT ONLY

Precharge detector

Min. typ. Max. H-->L 6.138V 6.214V 6.359V L-->H 7.196V 7.349V 7.505V

5

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet of

Compal Electronics, Inc.

SCHEMATICS,MB A5401

SCHEMATICS,MB A5401 401728

401728

1

45 49Monday, May 04, 2009

A

5

D D

VGATE<33>

VCC_PRM

PC123

PR167

1 2

4.02K_0402_1%

1 2

PR164

36.5K_0402_1%

0.047U_0402_16V7K

PC131

@PC131

@

0.068U_0402_16V7K

1 2

PC137

@

1000P_0402_50V7K

PC138

1 2

0.22U_0402_6.3V6K

1 2

PC122

@

PR166

1 2

PC121

1 2

1000P_0402_50V7K

6.81K_0402_1%

1000P_0402_50V7K

C C

PR174

97.6K_0402_1%

1 2

PR177

255_0402_1%

1 2

220P_0402_50V8J

1K_0402_1%

CPU_VCC_SENSE<6>

PR179

10_0402_5%

+CPU_CORE

平行線

B B

10_0402_5%

from output Bulk Cap

PR182

10_0402_5%

1 2

CPU_VSS_SENSE<6>

One phase :Ipeak=10A ; Imax=6A ; 1.2Ipeak=12A L(1U, DCR= 10m ohm) Rdson=4.5m ~ 5.6m ohm

Rocset=13K ohm // Iocp=12.873A MLCC*9(22U,6.3V,X5R) ; Poscap*4(330U,ESR=9m ohm)

470P_0402_50V7K

PC128

1 2

PR175

12

PC129

1000P_0402_50V7K

1 2

12

PC125

1 2

PR178

PR178 0_0402_5%

0_0402_5%

1 2

PC130

@

12

PR184

0_0402_5%

@

1000P_0402_50V7K

12

PR165

1 2

150K_0402_1%

1 2

PR180

1K_0402_1%

VCC_PRM

1 2

PC140

PC139

0.022U_0402_16V7K

4

+3VS

PR152

10K_0402_5%

+3VS

PR158

1 2

10K_0402_5%

1 2 3 4 5 6 7 8

9 10 41

PC133

180P_0402_50V8J

1 2

1.4K_0402_1%

12

1 2

PR163

@

1 2

10K_0402_5%

SET RBIAS OFS SOFT OCSET VW COMP FB VDIFF VSEN GND PAD

PR181

PSI_L

1 2

PR154 0_0402_5%PR154 0_0402_5%

40

PGOOD

RTN

11

39

PSI_L

DROOP

12

<6>

1 2

38

ISL6264CRZ-T_QFN40_6X6

13

Close to Phase1 Choke PL11

PH3

1 2

PR192

1 2

2.61K_0402_1%

Rn

PH3

10K_0603_5%_TSM1A103J4302RE

VSUM

0.22U_0402_6.3V6K

PR186

11K_0402_1%

1 2

VR_ON

PR153 0_0402_5%PR153 0_0402_5%

PR159 0_0402_5%PR159 0_0402_5%

1 2

37

VR_ON

VO

DFB

14

PU13

1 2

15

PR160 0_0402_5%PR160 0_0402_5%

VSUM

<33>

CPU_VID5 <6>

PR155 0_0402_5%PR155 0_0402_5%

1 2

GND

VIN

17

16

B+

1 2

PC143

1 2

0.01U_0402_50V7K

CPU_VID4 <6>

CPU_VID3 <6>

12

PR157 0_0402_5%PR157 0_0402_5%

PR156 0_0402_5%PR156 0_0402_5%

1 2

VID032VID133VID234VID335VID436VID5

ISEN2

VDD

19

18

PR183

PR185

10_0603_5%

PC141

CPU_VID2 <6>

CPU_VID1 <6>

PR161 0_0402_5%PR161 0_0402_5%

31

BOOT1

UGATE1 PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2 PHASE2 UGATE2

BOOT2

ISEN1

20

CPU_ISEN1

CPU_ISEN2

+5VS

10_0402_5%

1 2

12

1U_0402_6.3V6K

3

CPU_VID0 <6>

30 29 28 27 26 25 24 23 22 21

12

1 2

PR162

2.2_0603_1%

PR173 0_0402_5%PR173 0_0402_5%

4.7U_0603_6.3V6K

12

PR176

2.2_0603_1%

PC132

0.22U_0603_25V7K

PC120

0.22U_0603_25V7K

LG_CPU1

12

+5VS

12

PC126

1 2

PHASE_CPU2

PQ43

UG_CPU1

PHASE_CPU1

PQ44

AO4456_SO8

578

PQ46 AO4466_SO8PQ46 AO4466_SO8

3 6

578

PQ47

AO4456_SO8

LG_CPU2

3 6

578

AO4466_SO8

3 6

241

578

3 6

241

03/03_EVT

241

2

CPU_B+

03/03_EVT

CPU_B+

12

PC116

2200P_0402_50V7K

PR168

1 2

4.7_1206_5%

1 2

12

PC127

VSUM

680P_0603_50V8J

12

1 2

PC134

2200P_0402_50V7K

1UH_FDV0630-1R0M-P3_10.3A_20%

PR188

PR189

1 2

4.7_1206_5%

3.65K_0805_1%

12

PC144

VSUM

680P_0603_50V8J

1

(ME interference /change to 6mm)

PL9

FBMA-L18-453215-900LMA90T_1812

1 2

PC118

PC117

10U_1206_25V6M

PL10

1UH_FDV0630-1R0M-P3_10.3A_20%

1 2

PR171

10K_0402_1%

0.22U_0603_16V7K

PR170

1 2

3.65K_0805_1%

CPU_ISEN1 VCC_PRM

Rs

1 2

PC136

PC135

10U_1206_25V6M

PL11

1 2

10K_0402_1%

PR190

PC142

0.22U_0603_16V7K

1 2

CPU_ISEN2 VCC_PRM

PC124

1 2

10U_1206_25V6M

PR191

1_0402_5%

PR191

1_0402_5%

1 2

PR172

1_0402_5%

PR172

1_0402_5%

B+

1

+

PC119

PC119 68U_25V_M_R0.44

68U_25V_M_R0.44

2

+CPU_CORE

PR169

PR169 10K_0402_1%

10K_0402_1%

1 2

CPU_ISEN2

+CPU_CORE

PR187

PR187 10K_0402_1%

10K_0402_1%

1 2

CPU_ISEN1

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/09/20 2008/09/20

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

A

of

46 49Monday, May 04, 2009

5

hexainf@hotmail.com

4

3

2

PQ49

AO4466_SO8

UMA@

1

578

D D

PR193

+5VALW

1 2

100K_0402_1%

UMA@

300_0402_5%

1 2

1U_0603_10V6K

VFB=0.75Volt

VGA_ON<35>

C C

VFB=0.75V ; Rdson=4.6m ~ 5.6m ohm L(1U,DCR= 2.7~3.0m ohm); C(330 U,ESR= 9m ohm) Vo=VFB*(1+PR116/PR117)=0.95V Fsw=254.237KHz

Ipeak=6.52A, Imax=4.564A,1.2*Ipeak=7.824A Delta I=((19-1.2)*(1.2/19))/(L*Fsw)=4.8735A =>1/2DeltaI=2.4367A Vtrip=Rtrip*10uA=7.5K*10uA=0.075V Iocp=12.0031~16.0237A

M92-M2 XT

B B

0

Core Voltage LevelVGA_PWRSEL

0.95V

1 0.9V

02/27_EVT (high:0.95/low:0.9)

PR194

10K_0402_5%

PR206

UMA@PR206

UMA@

PC153

UMA@PC153

UMA@

+3VS

@

1 2

12

PC146

0.1U_0402_16V7K

UMA@

12

PR201

UMA@PR201

UMA@

10K_0402_1%

12

VFB

EN_PSV

@PC151

@

47P_0402_50V8J

PR199

2K_0402_1%

PC151

1 2

UMA@

12

PR195

200K_0402_5%

1 2

1

PU14

2

TON

EN_PSV

3

VOUT

4

VFB=0.75V

V5FILT

5

VFB

6

PGOOD

GND7PGND

02/27_EVT (high:0.95/low:0.9)

UMA@

30K_0402_1%

30K_0402_1% PR202

PR202

1 2

2N7002W-T/R7_SOT323-3

2N7002W-T/R7_SOT323-3 PQ48

UMA@

PQ48

UMA@

13

D

2

G

S

PR208

10K_0402_1%

1 2

12

UMA@

PC175

0.1U_0402_16V7K

15

14

TP

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS51117RGYR_QFN14_3.5x3.5

8

UMA@

UMA@PR208

UMA@

PR209

@ PR209

@

10K_0402_1%

1 2

PR196

BST_VCORE

DH_VCORE LX_VCORE

PR196

2.2_0603_5%

1 2

UMA@

0.1U_0603_25V7K

BST_VCORE-1

PC147

1 2

UMA@

+5VALW

DL_VCORE DL_VCORE

12

+3VS

PR210

10K_0402_5%

1 2

PR198

UMA@

7.5K_0402_1%

+3VS

12

PC150

4.7U_0805_10V6K

UMA@

+VGA_COREP

UMA@

3 6

241

578

JUMP_43X118

B+_core

PQ50

PQ50 AO4456_SO8

AO4456_SO8

change to AO4456 (EVT)

3 6

241

12

4.7U_1206_25V6K UMA@

PL13

1UH_PCMB103E-1R0MS_20A_20%

1 2

UMA@

PR197

4.7_1206_5%

UMA@

PC148

PC148 680P_0402_50V7K

680P_0402_50V7K

UMA@

PC145

JUMP_43X118

2

12

1.Remember to change input cap from 4.7U*1 to 10U*2

2.change one of the input cap from 4.7U*1 to 10U*1

3.C-test --> change to input cap 10U*1 -->10U*2

PJ22

112

+VGA_COREP

1

PC149

+

330U_V_2.5VM_R9M

UMA@

2

B+

PR204

UMA@

BOM control (R*C>1ms) (03/12)

PQ53

UMA@

2N7002W-T/R7_SOT323-3

A A

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

PR203

13

D

10K_0402_1%

1 2

2

G

UMA@

S

2007/12/18 2008/12/18

UMA@

10K_0402_5%

1 2

VGA_PWRSEL

PR205

@PR205

@

10K_0402_1%

1 2

Compal Secret Data

Deciphered Date

VGA_PWRSEL <15>

2

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

47 49Monday, May 04, 2009

of

A

5

4

3

2

1

Version change list (P.I.R. List) Page 1 of 2

for PWR

Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem

1

D D

2

3

4

5

6

ADD circuit

ADD snubber

ADD CPU boot

Switch NB_core voltage

Switch NB_core voltage ADD PC110, PC111, PC108, PC109, PC1113, PR1128,

EMI requestmrnt Add PR104 4.7 ohm and PC83 680p

EMI requestmrnt 50

EMI requestmrnt

Change resistance value Switch NB_core voltage

0.1 50

0.1

0.1 DVT

0.1

ADD PC107, PC105, PR121, PR123, PR122, PR102, PQ25, PQ28 at UMA Sku

51 2009/01/04

PR194, PR129, PR127 at UMA Sku

50

Add PR108 4.7 ohm and PC89 680p

53

50

Add PR229 2.2 ohm

Add PR243 2.2 ohm

Change PR95 from 51 Kohm to 39.2 Kohm

7

8

Change resistance value

C C

Change resistance value

Switch NB_core voltage

soft start of Switch NB_core voltage

0.1

50

Change PR122 from 12 Kohm to 226 Kohm

Change PR123 from 0 ohm to 10 Kohm

9

Change capacitor value

0.1

50

Change PC105 from 0.01 uF to o.1 uFsoft start of Switch NB_core voltage

10

11

Change IC part number Change IC part number 0.1 48 Change PU4 part number to SA00002V400

12

2009/01/04 DVT

DVT

2009/01/04

DVT

DVT0.1

2009/01/04

DVT

13

14

15

B B

16

17

18

19

20

21

22

A A

23

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/09/20 2008/09/20

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

Custom

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

1

A

48 49Monday, May 04, 2009

A

of

5

hexainf@hotmail.com

4

3

2

1

Modification list PURPOSEPHASE PAGE

PVT P.29 Delete Q24 and modify ODD power circuit Modify ODD power circuit to follow up SUSP#

P.36 P.37

D D

P.33 Add R566、R567 for e-machine 4/20 Add H34

4/22 Add R212 For VRAM ID

4/23 Add C39、C41、C778、C780 For ESD 4/24 Change Lid SW power to +3VL

C C

Change L94~L97 to bead , delete C1184/C1193 Follow Realtek suggest Change SPDIF detec power +5VAMP to +5VS C45

、

C466 Change to 10U

For FAN Add LAN_DET function4/21 For FAN IO/B PLT_RST# change to JP21 For ESD

Update USB footprint -FOX_UB511AC-RABA7-7F_4P-T C536 Change to 220U

For Discrete

B B

HDMICRT

21

R285 150_0402_1%VGA@

21

R54 2.2K_0402_5%VGA@

21

R46 2.2K_0402_5%VGA@

C662

C633

1

1 2

2

VGA@

A A

3.3P_0402_50V8J

C667

1

VGA@

2

8P_0402_50V8J

C662

C640

1

1 2

2

VGA@

3.3P_0402_50V8J

C639

C660

1

VGA@

2

8P_0402_50V8J

1

1 2

2

1

1 2

2

5

21

R141 499_0402_1%VGA@

21

R137 499_0402_1%VGA@

21

R149 499_0402_1%VGA@

21

R145 499_0402_1%VGA@

21

R155 499_0402_1%VGA@

21

R152 499_0402_1%VGA@

21

R158 499_0402_1%VGA@

21

R157 499_0402_1%VGA@

For E-Machine disable side port

R281 3K_0402_5%HM@R281 3K_0402_5%HM@

R223 0_0402_5%HM@R223 0_0402_5%HM@

R406 0_0603_5%HM@R406 0_0603_5%HM@

12

1 2

12

4

Security Classification

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ZZZ

PCB

PCB 06F LA-5401P REV0 M/B

LA5401P MB Rev0: DA80000ET00 LA5401P MB Rev1: DA80000ET10 LA5401P MB with Sub/B Rev1: DAZ~

2008/10/06 2009/10/06

3

Compal Secret Data

Deciphered Date

Compal Electronics, Inc.

Title

Size Document Number Rev

B

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

SCHEMATICS,MB A5401

401728

49 49Monday, May 04, 2009

1

A

of

Acer Aspire 5538, Aspire 7538 Schematics

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