5
4
3
2
1
Project code: 91.4GW01.001(HM42-CP)
+0&3%ORFN
+0&3%ORFN
+0&3%ORFN +0&3%ORFN
PCB P/N : 48.4GW01.011
X3
27Mhz
REVISION : -1 09920
'LDJUDP
'LDJUDP
'LDJUDP 'LDJUDP
Clock Generator
D D
ICS9LRS3197AKLFT
3
X2
DDRIII
800/1066
DDRIII
800/1066
Slot 0
Slot 1
20
21
DDRII Channel A
DDR II Channel B
14.318Mhz
Intel CPU
Arrandale
FDIx8
4,5,..,9,10
DMIx4
PCI EXPRESS GRAPHIC
X16
N11P-GE1
N11M-GE1
Nvida
22
91.4GY01.001(JE40-CP)
91.4GZ01.001(SJV41-CP)
91.4JD01.001(BA40-CP)
RGB CRT
LVDS 1CH
HDMI
CRT
LCD
WXGA+
HDMI
24
23
25
SYSTEM DC/DC
RT8223
INPUTS
DCBATOUT
OUTPUTS
5V_S5
3D3V_S5
SYSTEM DC/DC
RT8209E
INPUTS
DCBATOUT
OUTPUTS
1D5V_S3
SYSTEM DC/DC
49
50
RT8209E
WEBCAM
Mini-Card
WLAN
38
PCIE
INTEL
BLUETOOTH
PCH
Mini-Card
C C
RJ45
CONN
MIC IN
3G
38
Giga LAN
32
BCM57780
HD AUDIO
CODEC
INT MIC
B B
ALC272
31
X1
25Mhz
33
USB 2.0
PCIE
X5
25Mhz
AZALIA
14 USB 2.0/1.1 ports
(10/100/1000Mb) ETHERNET
High Definition Audio
6 SATA ports
8 PCIE ports
ACPI 1.1
LPC I/F
PCI/PCI BRIDGE
USB 2.0
SATA
Card Reader
AU 6433
USB x 3
37
23
29
30
USB_BD
09736-1
SD/MMC
MS/MS Pro/xD
SATA HDD
JE40_Power_ BD
09738-1
HM42_Power_ BD
09737-1
SJV41_Power_ BD
09740-1
SJV41_LED_ BD
09739-1
37
26
PCB STACKUP
40
SPI
LPC debug
X4
32.768Khz
41
TOP
GND
S
S
GND
BOTTOM
LINE OUT
OP AMP
G1454
34
X6
32.768Khz
SPI
11,12,...,18,19
LPC Bus
KBC
ENE 3930
2CH SPEAKER
A A
SATA ODD
Flash ROM
4MB
41
BA40_Power_ BD
Diserete N11M
Diserete N11M
Diserete N11M
27
09768-1
INPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
DCBATOUT
SYSTEM DC/DC
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS5161
INPUTS
DCBATOUT
CPU DC/DC
ISL62882C
INPUTS
DCBATOUT
CHARGER
INPUTS
DCBATOUT
OUTPUTS
1D05V_VTT
1D05V_S0
RT9025
OUTPUTS
1D8V_S0
RT8209E
OUTPUTS
VGA_CORE
OUTPUTS
VCC_GFXCORE
OUTPUTS
VCC_CORE
ISL88731C
OUTPUTS
BT+
51
52
55
47,48
47,48
53
Wistron Corporation
Wistron Corporation
Flash ROM
128KB
Thermal
Sensor
41
G792
Touch
39
PAD
43
CPU FAN
5
4
3
Int.
KB
Title
Title
40
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
HM42-CP
HM42-CP
HM42-CP
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
17 2 Friday, January 22, 2010
17 2 Friday, January 22, 2010
17 2 Friday, January 22, 2010
1
SC
SC
SC
A
B
C
D
E
Processor Strapping PCH Strapping
Name Schematics Notes
SPKR
4 4
3 3
INIT3_3V#
GNT3#/
GPIO55
INTVRMEN
GNT0#,
GNT1#
GNT2#/
GPIO53
GPIO33
SPI_MOSI
NV_ALE
NC_CLE
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO
HDA_SYNC
GPIO15
GPIO8
GPIO27
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kȍ
No Reboot Mode with TCO Disabled:
- 10-kȍ weak pull-up resistor.
Weak internal pull-down. Do not pull high.
Internal pull-up.
Default Mode:
(Connect to ground with 4.7-kȍ weak
Low (0) = Top Block Swap Mode
pull-down resistor).
High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Left both GNT0# and GNT1# floating. No pull up
Default (SPI):
required.
Connect GNT1# to ground with 1-kȍ pull-down
Boot from PCI:
resistor. Leave GNT0# Floating.
Connect both GNT0# and GNT1# to ground with 1-kȍ
Boot from LPC:
pull-down resistor.
Default - Internal pull-up.
= Configures DMI for ESI compatible operation (for servers
Low (0)
only. Not for mobile/desktops).
Do not pull low.
Default:
Connect to ground with 1-kȍ
Disable ME in Manufacturing Mode:
pull-down resistor.
Connect to Vcc3_3 with 8.2-kȍ weak pull-up resistor.
Enable iTPM:
Left floating, no pull-down required.
Disable iTPM:
Connect to Vcc3_3 with 8.2-kȍ weak pull-up
Enable Danbury:
resistor.
Connect to ground with 4.7-kȍ weak pull-down
Disable Danbury:
resistor.
Weak internal pull-up. Do not pull low.
Flash Descriptor Security will be overridden.
Low (0):
Flash Descriptor Security will be in effect.
High (1) :
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Pin Name
CFG[4]
CFG[3]
CFG[0]
CFG[7]
Strap Description Configuration (Default value for each bit is
DisplayPort
Presence
PCI-Express Static
Lane Reversal
PCI-Express
Configuration
Select
Reserved Temporarily used
for early
Clarksfield
samples.
1 unless specified otherwise)
Disabled - No Physical Display Port attached to
1: Embedded
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connected to the Embedded Display Port.
Normal Operation.
1:
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Single PCI-Express Graphics
1:
Bifurcation enabled
0:
-
Clarksfield (only for early samples pre-ES1)
Connect to GND with 3.01K Ohm/5% resistor
Only temporary for early CFD samples
Note:
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
Default
Value
1
1
1
0
2 2
USB Table
PCIE Routing
LANE1
LANE2
LAN
MiniCard1
Pair
MiniCard2 LANE3
1 1
Device
USB3
0
USB2
1
USB4
2
3
MINICARD1
4 WECAM
Touch Panel
5
NC
6
NC
7
8
NC
USB1(HS)
9
10
Finger Print
11
Blue Tooth
1213MINIC2
Cardreader
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipe i Hsien 221 , Taiwan, R.O.C.
Taipe i Hsien 221 , Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Table of Content
Table of Content
Table of Content
HM42-CP
HM42-CP
HM42-CP
Taipe i Hsien 221 , Taiwan, R.O.C.
of
of
of
27 2 Friday, January 22, 2010
27 2 Friday, January 22, 2010
27 2 Friday, January 22, 2010
SC
SC
SC
A
3D3V_S0
0R0603-PAD
4 4
0R0603-PAD
1 2
R310
R310
1130 -SC
B
3D3V_CK505
C360
C360
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0113 -1
1D5V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C356
C356
R311
R311
0R3J-0-U -GP
0R3J-0-U -GP
R308
R308
0R3J-0-U -GP
0R3J-0-U -GP
1 2
1 2
DY
DY
C
1D5V_S0_CLKGEN
0120 -1
1D5V_S0_CLKGEN
C366
C366
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
3D3V_CK505_IO
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C357
C357
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C361
C361
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C359
C359
1130 -SC
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C358
C358
DY
DY
C354
C354
1 2
C353
C353
SC1U10V2ZY-GP
SC1U10V2ZY-GP
D
C355
C355
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
E
1130 -SC
1D05V_S0
0R0603-PAD
0R0603-PAD
1 2
R307
R307
3D3V_S0
R306
R306
1 2
0R3J-0-U -GP
0R3J-0-U -GP
1 2
DY
DY
SA 0622 EMI
VGA_XIN1_L
OSC_SPREAD_L
U16
U16
1D5V_S0_CLKGEN
3D3V_CK505
3D3V_CK505_IO
1118 -SC
RNT1
PCH_SMBCLK 12,20,21
R316
R316
RNT1
1
2 3
DY
DY
1 2
VGA_XIN1_L
4
OSC_SPREAD_L
GEN_XTAL_IN
GEN_XTAL_OUT
CPU_STOP#
CLK_EN
FSC
3 3
VGA_XIN1 62
OSC_SPREAD 62
CLK_ICH14 12
C365
C365
1 2
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
DY
DY
SRN33J -5-GP-U
SRN33J -5-GP-U
PCH_SMBDATA 12,20,21
33R2J-2-GP
33R2J-2-GP
1
VDD96_1_5
5
VDD27_3_3
15
VDDPCIEX_IO_LV
17
VDDPCIEX_1_5
18
VDDCPU_IO_LV
24
VDDCPU_1_5
29
VDDREF_3_3
6
27FIX
7
27SS
32
SCLK_3_3
31
SDATA_3_3
28
X1
27
X2
25
VTTPWRGD/PD#_3_3
30
REF/FSLC
16
NC#16
9LVS3197BKLFT-GP
9LVS3197BKLFT-GP
71.93197.B03
71.93197.B03
2ND = 71.08595.003
2ND = 71.08595.003
SATAT_LR
SATAC_LR
DOT96T_LR
DOT96C_LR
CPUT_LR0
CPUC_LR0
CPUT_LR1
CPUC_LR1
PCIEXT_LR
PCIEXC_LR
GND96
GND27
GNDSATA
GNDPCIEX
GNDCPU
GNDREF
GND
CLK_PCIE_SATA_R
10
CLK_PCIE_SATA#_R
11
3
4
CLK_CPU_BCLK_R
23
CLK_CPU_BCLK#_R
22
20
19
13
14
2
8
9
12
21
26
33
DREFCLK_R
DREFCLK#_R
CLKIN_DMI_R
CLKIN_DMI#_R
0113 -1
2 2
1118 -SC
C364
C364
SC12P50V2JN-3GP
SC12P50V2JN-3GP
1 2
1 2
X2
C363
C363
SC12P50V2JN-3GP
SC12P50V2JN-3GP
1 2
SB 0813
CL = 10pF
Freq tolertance :+/- 30 ppm
X2
X-14D31818M-50GP
X-14D31818M-50GP
GEN_XTAL_OUT_R
82.30005.A51
82.30005.A51
2ND = 82.30005.901
2ND = 82.30005.901
3rd = 82.30005.B81
3rd = 82.30005.B81
R313
R313
200R2J-L1-GP
200R2J-L1-GP
1 2
GEN_XTAL_IN
1 2
R314
R314
10MR2J-L-GP
10MR2J-L-GP
DY
DY
GEN_XTAL_OUT
1D05V_VTT
DY
DY
1 2
1 2
R317
R317
2K2R2J-2-GP
2K2R2J-2-GP
R315
R315
2K2R2J-2-GP
2K2R2J-2-GP
FSC 0 1
SPEED
FSC
133MHz
(Default)
100MHz
1130 -SC
R371 0R0402-PAD R371 0R0402-PAD
1 2
R695 0R0402-PAD R695 0R0402-PAD
1 2
R547 0R0402-PAD R547 0R0402-PAD
1 2
R411 0R0402-PADR411 0R0402-PAD
1 2
R697 0R0402-PAD R697 0R0402-PAD
1 2
R696 0R0402-PAD R696 0R0402-PAD
1 2
R367 0R0402-PAD R367 0R0402-PAD
1 2
R548 0R0402-PAD R548 0R0402-PAD
1 2
CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12
DREFCLK 12
DREFCLK# 12
CLK_CPU_BCLK 12
CLK_CPU_BCLK# 12
CLKIN_DMI 12
CLKIN_DMI# 12
1130 -SC
3D3V_S0
CLK_EN
1016 -SA
2ND = 84.2N702.E31
2ND = 84.2N702.E31
4
RN32
RN32
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
CPU_STOP#
D
.
.....
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
PCH_SMBDATA
PCH_SMBCLK
Q18
Q18
G
.
...
S
1 2
EC49 SC22P50V2JN-4GP
EC49 SC22P50V2JN-4GP
1 2
DY
DY
EC48 SC22P50V2JN-4GP
EC48 SC22P50V2JN-4GP
DY
DY
DY
DY
1 2
ECT3 SC33P50V2JN-3GP
ECT3 SC33P50V2JN-3GP
DY
DY
1 2
ECT4 SC33P50V2JN-3GP
ECT4 SC33P50V2JN-3GP
VR_CLKEN# 47
SA 0629 RF
1 1
A
B
C
D
UMA
UMA
UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Clock Generator
Clock Generator
Clock Generator
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
37 2 Friday, January 22, 2010
37 2 Friday, January 22, 2010
37 2 Friday, January 22, 2010
E
SC
SC
SC
5
D D
DMI_TXN0 13
DMI_TXN1 13
DMI_TXN2 13
DMI_TXN3 13
DMI_TXP0 13
DMI_TXP1 13
DMI_TXP2 13
DMI_TXP3 13
DMI_RXN0 13
DMI_RXN1 13
DMI_RXN2 13
DMI_RXN3 13
DMI_RXP0 13
DMI_RXP1 13
DMI_RXP2 13
DMI_RXP3 13
FDI_TXN0 13
FDI_TXN1 13
FDI_TXN2 13
C C
B B
FDI_TXN3 13
FDI_TXN4 13
FDI_TXN5 13
FDI_TXN6 13
FDI_TXN7 13
FDI_TXP0 13
FDI_TXP1 13
FDI_TXP2 13
FDI_TXP3 13
FDI_TXP4 13
FDI_TXP5 13
FDI_TXP6 13
FDI_TXP7 13
FDI_FSYNC0 13
FDI_FSYNC1 13
FDI_ INT 13
FDI_LSYNC0 13
FDI_LSYNC1 13
RN33
RN33
1
2
3
4 5
SRN1KJ -4-GP
SRN1KJ -4-GP
DIS
DIS
FDI_FSYNC1
8
FDI_LSYNC1
7
FDI_LSYNC0
6
FDI_FSYNC0
1130 -SC
For Graphics Disable , Pull-down to
GND via 1-k ± 5% resistor
A A
4
CPU1A
CPU1A
A24
DMI_RX0#
C23
DMI_RX1#
B22
DMI_RX2#
A21
DMI_RX3#
B24
DMI_RX0
D23
DMI_RX1
B23
DMI_RX2
A22
DMI_RX3
D24
DMI_TX0#
G24
DMI_TX1#
F23
DMI_TX2#
H23
DMI_TX3#
D25
DMI_TX0
F24
DMI_TX1
E23
DMI_TX2
G23
DMI_TX3
E22
FDI_TX0#
D21
FDI_TX1#
D19
FDI_TX2#
D18
FDI_TX3#
G21
FDI_TX4#
E19
FDI_TX5#
F21
FDI_TX6#
G18
FDI_TX7#
D22
FDI_TX0
C21
FDI_TX1
D20
FDI_TX2
C18
FDI_TX3
G22
FDI_TX4
E20
FDI_TX5
F20
FDI_TX6
G19
FDI_TX7
F17
FDI_FSYNC0
E17
FDI_FSYNC1
C17
FDI_INT
F18
FDI_LSYNC0
D17
FDI_LSYNC1
1 2
R481
R481
1KR2J-1-GP
1KR2J-1-GP
DIS
DIS
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3RD = 62.10055.341
3RD = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
0113 -1
Del 3rd 62.10055.341 and 4th 62.10055.321
3rd and 4th have been purged
CE will confrim SQM if it can add BOM
CE will release EC to add to BOM
3
1 OF 9
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX0#
PEG_RX1#
PEG_RX2#
DMI
DMI
PEG_RX3#
PEG_RX4#
PEG_RX5#
AUBURNDALE
AUBURNDALE
PEG_RX6#
PEG_RX7#
PEG_RX8#
PEG_RX9#
PEG_RX10#
PEG_RX11#
PEG_RX12#
PEG_RX13#
PEG_RX14#
PEG_RX15#
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
Intel(R) FDI
Intel(R) FDI
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX0#
PEG_TX1#
PEG_TX2#
PEG_TX3#
PEG_TX4#
PEG_TX5#
PEG_TX6#
PEG_TX7#
PEG_TX8#
PEG_TX9#
PEG_TX10#
PEG_TX11#
PEG_TX12#
PEG_TX13#
PEG_TX14#
PEG_TX15#
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
PEG_IRCOMP_R
B26
A26
B27
EXP_RBIAS
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
PEG_TXN15_L PEG_TXN15
L33
PEG_TXN14_L PEG_TXN14
M35
PEG_TXN13_L PEG_TXN13
M33
PEG_TXN12_L PEG_TXN12
M30
PEG_TXN11_L PEG_TXN11
L31
PEG_TXN10_L PEG_TXN10
K32
PEG_TXN9_L PEG_TXN9
M29
PEG_TXN8_L PEG_TXN8
J31
PEG_TXN7_L PEG_TXN7
K29
PEG_TXN6_L PEG_TXN6
H30
PEG_TXN5_L PEG_TXN5
H29
PEG_TXN4_L PEG_TXN4
F29
PEG_TXN3_L PEG_TXN3
E28
PEG_TXN2_L PEG_TXN2
D29
PEG_TXN1_L PEG_TXN1
D27
PEG_TXN0_L PEG_TXN0
C26
PEG_TXP15_L PEG_TXP15
L34
PEG_TXP14_L PEG_TXP14
M34
PEG_TXP13_L PEG_TXP13
M32
PEG_TXP12_L PEG_TXP12
L30
PEG_TXP11_L PEG_TXP11
M31
PEG_TXP10_L PEG_TXP10
K31
PEG_TXP9_L PEG_TXP9
M28
PEG_TXP8_L PEG_TXP8
H31
PEG_TXP7_L PEG_TXP7
K28
PEG_TXP6_L PEG_TXP6
G30
PEG_TXP5_L PEG_TXP5
G29
PEG_TXP4_L PEG_TXP4
F28
PEG_TXP3_L PEG_TXP3
E27
PEG_TXP2_L PEG_TXP2
D28
PEG_TXP1_L PEG_TXP1
C27
PEG_TXP0_L PEG_TXP0
C25
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
R201
R201
1 2
R206
R206
1 2
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxles s
DIS_Muxles s
1 2
DIS_Muxless
DIS_Muxless
2
49D9R2F-GP
49D9R2F-GP
750R2F-GP
750R2F-GP
PEG_RXN[15..0] 62
PEG_RXP[15..0] 62
C498 SCD1U10V2KX-5GP
C498 SCD1U10V2KX-5GP
C496 SCD1U10V2KX-5GP
C496 SCD1U10V2KX-5GP
C481 SCD1U10V2KX-5GP
C481 SCD1U10V2KX-5GP
C494 SCD1U10V2KX-5GP
C494 SCD1U10V2KX-5GP
C479 SCD1U10V2KX-5GP
C479 SCD1U10V2KX-5GP
C492 SCD1U10V2KX-5GP
C492 SCD1U10V2KX-5GP
C477 SCD1U10V2KX-5GP
C477 SCD1U10V2KX-5GP
C490 SCD1U10V2KX-5GP
C490 SCD1U10V2KX-5GP
C475 SCD1U10V2KX-5GP
C475 SCD1U10V2KX-5GP
C488 SCD1U10V2KX-5GP
C488 SCD1U10V2KX-5GP
C473 SCD1U10V2KX-5GP
C473 SCD1U10V2KX-5GP
C500 SCD1U10V2KX-5GP
C500 SCD1U10V2KX-5GP
C502 SCD1U10V2KX-5GP
C502 SCD1U10V2KX-5GP
C504 SCD1U10V2KX-5GP
C504 SCD1U10V2KX-5GP
C506 SCD1U10V2KX-5GP
C506 SCD1U10V2KX-5GP
C508 SCD1U10V2KX-5GP
C508 SCD1U10V2KX-5GP
C497 SCD1U10V2KX-5GP
C497 SCD1U10V2KX-5GP
C495 SCD1U10V2KX-5GP
C495 SCD1U10V2KX-5GP
C480 SCD1U10V2KX-5GP
C480 SCD1U10V2KX-5GP
C493 SCD1U10V2KX-5GP
C493 SCD1U10V2KX-5GP
C478 SCD1U10V2KX-5GP
C478 SCD1U10V2KX-5GP
C491 SCD1U10V2KX-5GP
C491 SCD1U10V2KX-5GP
C476 SCD1U10V2KX-5GP
C476 SCD1U10V2KX-5GP
C489 SCD1U10V2KX-5GP
C489 SCD1U10V2KX-5GP
C474 SCD1U10V2KX-5GP
C474 SCD1U10V2KX-5GP
C487 SCD1U10V2KX-5GP
C487 SCD1U10V2KX-5GP
C472 SCD1U10V2KX-5GP
C472 SCD1U10V2KX-5GP
C501 SCD1U10V2KX-5GP
C501 SCD1U10V2KX-5GP
C503 SCD1U10V2KX-5GP
C503 SCD1U10V2KX-5GP
C505 SCD1U10V2KX-5GP
C505 SCD1U10V2KX-5GP
C507 SCD1U10V2KX-5GP
C507 SCD1U10V2KX-5GP
C509 SCD1U10V2KX-5GP
C509 SCD1U10V2KX-5GP
lab stuff 2nd,3rd and 4 th in BOM
Eng add 1st source(62.10040.611)
Eng do not stuff 4 th in BOM
becasue 4 th have been purge ,so stuff 1st in BOM
but CE said, 4th need stuff in PD if not any concern
1
PEG_TXN[15..0] 62
PEG_TXP[15..0] 62
Diserete N11M
Diserete N11M
Diserete N11M
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipe i Hsien 221 , Taiwan, R.O.C.
Taipe i Hsien 221 , Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (1/7)
CPU (1/7)
CPU (1/7)
HM42-CP
HM42-CP
HM42-CP
Taipe i Hsien 221 , Taiwan, R.O.C.
47 2 Friday, January 22, 2010
47 2 Friday, January 22, 2010
47 2 Friday, January 22, 2010
of
of
of
SC
SC
SC
5
4
3
2
1
1D05V_VTT
1 2
R241 49D9R2F-GP R241 49D9R2F-GP
1 2
R189 68R2-GP R189 68R2-GP
H_CATERR#
PROCHOT#
D D
H_PECI 16
H_PROCHOT# 47
PM_THRMTRIP-A# 16,45
H_PM_SYNC 13
R227
R227
C C
H_PWRGD 16,59
1 2
0R0402-PAD
0R0402-PAD
1130 -SC
PM_DRAM_PWRGD 13
H_VTTPWRGD 51
PLT_RST# 15,30,36,37,40,41,45,59,62
R295
PM_DRAM_PWRGD
B B
1D5V_S0_DDR 1D5V_S0_DDR
1 2
R271
R271
1K1R2F-GP
1 2
1K1R2F-GP
R251
R251
3KR2F-GP
3KR2F-GP
NON-S3
NON-S3
DRAMPWROK
NON-S3
NON-S3
A A
1D5V_S0_PWRGD 45,52
R295
1 2
1K5R2F-2-GP
1K5R2F-2-GP
S3
S3
PM_DRAM_PWRGD
U11
U11
1
B
2
A
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
2ND = 73.7SZ08.DAH
2ND = 73.7SZ08.DAH
PM_DRAM_PWRGD_1
VCC
S3
S3
1 2
R468 20R2F-GP R468 20R2F-GP
1 2
R466 20R2F-GP R466 20R2F-GP
1 2
R228 49D9R2F-GP R228 49D9R2F-GP
1 2
R457 49D9R 2F-GP R457 49D9R 2F-GP
R194 0R2J-2-GP
R194 0R2J-2-GP
1 2
DY
DY
TP39 TPAD14-GP TP39 TPAD14-GP
R226
R226
1 2
0R0402-PAD
0R0402-PAD
R242
R242
1 2
0R0402-PAD
0R0402-PAD
TP41 TPAD14-GP TP41 TPAD14-GP
R232
R232
1 2
1K5R2F-2-GP
1K5R2F-2-GP
1 2
R274
R274
1K1R2F-GP
1K1R2F-GP
DY
DY
R294
R294
750R2F-GP
750R2F-GP
S3
S3
1 2
3D3V_S5
5
PM_DRAM_PWRGD_1
4
Y
TP42 TPAD14-GP TP42 TPAD14-GP
1
1
H_COMP3
H_COMP2
H_COMP1
H_COMP0
SKTOCC#_R
1
H_CATERR#
PROCHOT#
H_CPURST#
VCCPWRGOOD_1
VCCPWRGOOD_0
DRAMPWROK
H_PWRGD_XDP
PLT_RST#_R
1 2
R233
R233
750R2F-GP
750R2F-GP
CPU1B
CPU1B
AT23
AT24
G16
AT26
AH24
AK14
AT15
AN26
AK15
AP26
AL15
AN14
AN27
AK13
AM15
AM26
AL14
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
XDP_TMS
XDP_TDI
XDP_PREQ#
XDP_TDO
XDP_TCLK
XDP_TRST#
COMP3
COMP2
COMP1
COMP0
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
RESET_OBS#
PM_SYNC
VCCPWRGOOD_1
VCCPWRGOOD_0
SM_DRAMPWROK
VTTPWRGOOD
TAPPWRGOOD
RSTIN#
1 2
DY
DY
R183 51R2J-2-GP
R183 51R2J-2-GP
1 2
DY
DY
R451 51R2J-2-GP
R451 51R2J-2-GP
1 2
DY
DY
R188 51R2J-2-GP
R188 51R2J-2-GP
1 2
R453 51R2J-2-GP R453 51R2J-2-GP
1 2
DY
DY
R195 51R2J-2-GP
R195 51R2J-2-GP
1 2
R456 51R2J-2-GP R456 51R2J-2-GP
MISC
MISC
CLOCKS
CLOCKS
AUBURNDALE
AUBURNDALE
THERMAL PWR MANAGEMENT
THERMAL PWR MANAGEMENT
DDR3
MISC
DDR3
MISC
JTAG & BPM
JTAG & BPM
1D05V_VTT
2 OF 9
2 OF 9
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PM_EXT_TS0#
PM_EXT_TS1#
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM0#
BPM1#
BPM2#
BPM3#
BPM4#
BPM5#
BPM6#
BPM7#
CPU JTAG
A16
B16
AR30
AT30
E16
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
TDI
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
XDP_TDO_M
XDP_TDI_M
BCLK_CPU_P
BCLK_CPU_N
PEG_CLK_R
PEG_CLK#_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST# 16
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_TDI_M
XDP_TDO_M
XDP_DBRESET#
R169
R169
0R0402-PAD
0R0402-PAD
1 2
0113 -1
TP37 TPAD14-GP TP37 TPAD14-GP
1
BCLK_CPU_P 16
BCLK_CPU_N 16
PEG_CLK_R 12
PEG_CLK#_R 12
DPLL_REF_SSCLK 12
DPLL_REF_SSCLK# 12
RN25
RN25
SRN10KJ-5-GP
SRN10KJ-5-GP
1
4
2 3
1D05V_VTT
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
PM_EXTTS#0_R 20
PM_EXTTS#1_R 21
1 2
R282 100R2F-L1-GP-U R282 100R2F-L1-GP-U
1 2
R280 24D9R2F-L-GP R280 24D9R2F-L-GP
1 2
R281 130R2F-1-GP R281 130R2F-1-GP
1130 -SC
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
XDP_DBRESET#
R197 1KR2J-1-GP R197 1KR2J-1-GP
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
R305 0R0402-PAD R305 0R0402-PAD
1 2
R312 0R0402-PAD R312 0R0402-PAD
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
21F, 88, S ec.1, Hsin Tai Wu Rd., H sichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (2/7)
CPU (2/7)
CPU (2/7)
HM42-CP
HM42-CP
HM42-CP
3D3V_S0
57 2 Friday, January 22, 2010
57 2 Friday, January 22, 2010
57 2 Friday, January 22, 2010
SC
SC
of
of
of
SC
5
CPU1C
CPU1C
4
3 OF 9
3 OF 9
3
CPU1D
CPU1D
2
4 OF 9
4 OF 9
1
AA6
SA_CK0
M_A_DQ[6 3..0] 20
D D
C C
B B
M_A_BS0 20
M_A_BS1 20
M_A_BS2 20
M_A_CAS# 20
M_A_RAS# 20
M_A_WE# 20
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C10
D10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AK11
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
A10
SA_DQ0
SA_DQ1
C7
SA_DQ2
A7
SA_DQ3
B10
SA_DQ4
SA_DQ5
E10
SA_DQ6
A8
SA_DQ7
D8
SA_DQ8
F10
SA_DQ9
E6
SA_DQ10
F7
SA_DQ11
E9
SA_DQ12
B7
SA_DQ13
E7
SA_DQ14
C6
SA_DQ15
SA_DQ16
G8
SA_DQ17
K7
SA_DQ18
J8
SA_DQ19
G7
SA_DQ20
SA_DQ21
J7
SA_DQ22
J10
SA_DQ23
L7
SA_DQ24
M6
SA_DQ25
M8
SA_DQ26
L9
SA_DQ27
L6
SA_DQ28
K8
SA_DQ29
N8
SA_DQ30
P9
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
AJ7
SA_DQ38
AJ6
SA_DQ39
SA_DQ40
AJ9
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
AL7
SA_DQ45
SA_DQ46
AL8
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
U7
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK0#
SA_CKE0
SA_CK1
SA_CK1#
SA_CKE1
SA_CS0#
SA_CS1#
SA_ODT0
SA_ODT1
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS0#
SA_DQS1#
SA_DQS2#
SA_DQS3#
SA_DQS4#
SA_DQS5#
SA_DQS6#
SA_DQS7#
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0 M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_CLK_DDR0 20
M_CLK_DDR#0 20
M_CKE0 20
M_CLK_DDR1 20
M_CLK_DDR#1 20
M_CKE1 20
M_CS#0 20
M_CS#1 20
M_ODT0 20
M_ODT1 20
M_A_DM[7 ..0] 2 0
M_A_DQS #[7..0] 20
M_A_DQS[7..0] 20
M_A_A[15..0] 20
M_B_DQ[6 3..0] 21
M_B_BS0 21
M_B_BS1 21
M_B_BS2 21
M_B_CAS# 21
M_B_RAS# 21
M_B_WE# 21
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
AB1
AC5
AC6
B5
SB_DQ0
A5
SB_DQ1
C3
SB_DQ2
B3
SB_DQ3
E4
SB_DQ4
A6
SB_DQ5
A4
SB_DQ6
C4
SB_DQ7
D1
SB_DQ8
D2
SB_DQ9
F2
SB_DQ10
F1
SB_DQ11
C2
SB_DQ12
F5
SB_DQ13
F3
SB_DQ14
G4
SB_DQ15
H6
SB_DQ16
G2
SB_DQ17
J6
SB_DQ18
J3
SB_DQ19
G1
SB_DQ20
G5
SB_DQ21
J2
SB_DQ22
J1
SB_DQ23
J5
SB_DQ24
K2
SB_DQ25
L3
SB_DQ26
M1
SB_DQ27
K5
SB_DQ28
K4
SB_DQ29
M4
SB_DQ30
N5
SB_DQ31
SB_DQ32
SB_DQ33
AJ3
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
AJ4
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
W5
SB_BS1
R7
SB_BS2
SB_CAS#
Y7
SB_RAS#
SB_WE#
AUBURNDALE
AUBURNDALE
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK0
SB_CK0#
SB_CKE0
SB_CK1
SB_CK1#
SB_CKE1
SB_CS0#
SB_CS1#
SB_ODT0
SB_ODT1
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS0#
SB_DQS1#
SB_DQS2#
SB_DQS3#
SB_DQS4#
SB_DQS5#
SB_DQS6#
SB_DQS7#
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
W8
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
D4
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_CLK_DDR2 21
M_CLK_DDR#2 21
M_CKE2 21
M_CLK_DDR3 21
M_CLK_DDR#3 21
M_CKE3 21
M_CS#2 21
M_CS#3 21
M_ODT2 21
M_ODT3 21
M_B_DM[7 ..0] 2 1
M_B_DQS #[7..0] 21
M_B_DQS[7..0] 21
M_B_A[15..0] 21
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
A A
5
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
4
3
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (3/7)
CPU (3/7)
CPU (3/7)
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
67 2 Friday, January 22, 2010
67 2 Friday, January 22, 2010
67 2 Friday, January 22, 2010
1
SC
SC
SC
5
4
CPU1F
CPU1F
3
6 OF 9
6 OF 9
2
1
VCC_CORE
PROCESSOR CORE POWER
VCC_CORE
D D
1130 -SC
C522
C522
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C268
C268
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C520
C520
1 2
SC10U6D3V3MX-GP
C C
B B
A A
SC10U6D3V3MX-GP
C200
C200
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C222
C222
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C218
C218
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C260
C260
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C521
C521
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0111 -1
C212
C212
C231
C231
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
DY
DY
5
SC10U6D3V3MX-GP
DY
DY
C189
C189
C523
C523
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C239
C239
C230
C230
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C194
C194
C211
C211
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C217
C217
C524
C524
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C207
C207
C519
C519
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C199
C199
C214
C214
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C252
C252
C276
C276
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
48A
4
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
AH14
VTT0
AH12
VTT0
AH11
VTT0
AH10
VTT0
J14
AUBURNDALE
AUBURNDALE
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
CPU VIDS
CPU VIDS
POWER
POWER
SENSE LINES
SENSE LINES
3rd = 62.10055.341 4th = 62.10055.321
3rd = 62.10055.341 4th = 62.10055.321
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
PSI#
VID0
VID1
VID2
VID3
VID4
VID5
VID6
PROC_DPRSLPVR
VTT_SELECT
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
AM34
G15
Clarksfield H_VTTVID1 = Low, VTT = 1.1V
Arrandale H_VTTVID1 = High, VTT = 1.05V
AN35
AJ34
AJ35
B15
A15
3
C275
C275
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
H_VTTVID1
TP_VSS_SENSE_VTT
1130 -SC
C565
C565
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1130 -SC
C303
C303
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
+VTT_43
+VTT_44
PSI# 47
H_VID[6..0] 47
PM_DPRSLPVR 47
1
TP53 TPAD14-GP TP 53 TPAD14-GP
IMVP_IMO N 47
VTT_SENSE 51
1
TP51 TPAD14-GP TP51 TPAD14-GP
C541
C541
C543
C543
C291
C291
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
C288
C288
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C292
C292
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_VTT
1130 -SC
R677 0R0402-PAD R677 0R0402-PAD
1 2
R678 0R0402-PAD R678 0R0402-PAD
1 2
VCC_CORE
1 2
R129
R129
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
R128
R128
100R2F-L1-GP-U
100R2F-L1-GP-U
2
C267
C267
1D05V_VTT
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
1D05V_VTT
Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
VCC_SENSE 47
VSS_SENSE 47
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
Taipei Hsien 221 , Taiwan, R.O.C.
CPU (4/7)
CPU (4/7)
CPU (4/7)
HM42-CP
HM42-CP
HM42-CP
1
SC
SC
SC
of
of
of
77 2 Friday, January 22, 2010
77 2 Friday, January 22, 2010
77 2 Friday, January 22, 2010
5
4
3
2
1
VCC_GFXCORE
15A
D D
C526
C528
C528
C536
C536
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
VCC_GFXCORE
R483
R215
R215
0R3J-0-U -GP
0R3J-0-U -GP
DIS
C C
DIS
1 2
R483
0R3J-0-U -GP
0R3J-0-U -GP
DIS
DIS
1 2
Please note that the VTT Rail
R216
R216
0R3J-0-U -GP
0R3J-0-U -GP
DIS
DIS
1 2
1D05V_VTT
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
UMA_Muxless
UMA_Muxless
1 2
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
SA 0626
TC18
B B
TC18
1D05V_VTT
1 2
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
DY
DY
18A
C549
C549
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C529
C529
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C526
C540
C540
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
UMA_Mu x less
UMA_Mu x less
R472
R472
0R3J-0-U -GP
0R3J-0-U -GP
DIS
DIS
C548
C548
DY
DY
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1130 -SC
C537
C537
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C294
C294
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C289
C289
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CPU1G
CPU1G
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
J24
VTT1
J23
VTT1
H25
VTT1
K26
VTT1
J27
VTT1
J26
VTT1
J25
VTT1
H27
VTT1
G28
VTT1
G27
VTT1
G26
VTT1
F26
VTT1
E26
VTT1
E25
VTT1
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
AUBURNDALE
AUBURNDALE
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
SENSE
SENSE
GRAPHICS VIDs
GRAPHICS VIDs
7 OF 9
7 OF 9
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
GFX_IMON
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
GFX_VR_EN
GFX_DPRSLPVR
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V 1.8V
1.1V 1.8V
VCC_AXG_SENSE 54
VSS_AXG_SENSE 54
GFX_VID0
GFX_VID1
GFX_VID2
GFX_VID3
GFX_VID4
GFX_VID5
GFX_VID6
1 2
1 2
DY
DY
R205
R205
1KR2J-1-GP
1KR2J-1-GP
DIS
DIS
1 2
C300
C300
C297
C297
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
GFX_VR_EN 54
GFX_DPRSLPVR 54
GFX_IMON 54
1 2
1 2
C302
C302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C299
C299
1 2
C306
C306
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC 1U6D3V2KX-GP
SC 1U6D3V2KX-GP
DY
DY
GFX_VID[6..0] 54
VDDQ 3A for Auburndale
VDDQ 6A for Clarksfield
PM_SLP_S3_CTL 13,20
1D05V_VTT
C569
C569
1 2
C296
C296
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C295
C295
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C250
C250
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
DY
DY
C293
C293
1 2
1 2
DY
DY
+V1.8S_VCCSFR
1 2
1 2
C236
C236
C227
C227
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_VTT
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
0.6A
C228
C228
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C251
C251
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C301
C301
C307
C307
1 2
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1130 -SC
R147 0R0603-PAD R147 0R0603-PAD
1 2
1 2
DY
DY
R542
R542
0R3J-0-U-GP
0R3J-0-U-GP
1 2
NON-S3
NON-S3
C305
C305
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D8V_S0
1D5V_S3
R541
R541
0R3J-0-U-GP
0R3J-0-U-GP
1 2
NON-S3
NON-S3
Q44
Q44
G
.
.
...
.....
S
S3
S3
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
2ND = 84.2N702.E31
2ND = 84.2N702.E31
1016 -SB
R540
R540
0R3J-0-U-GP
0R3J-0-U-GP
1 2
NON-S3
NON-S3
1 2
S3
S3
PM_SLP_S3_CTL_D
D
1 2
NON-S3
NON-S3
1D5V_S0_DDR
R543
R543
220R2F-GP
220R2F-GP
R292
R292
0R3J-0-U-GP
0R3J-0-U-GP
A A
5
4
3
2
UMA
UMA
UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU (5/7)
CPU (5/7)
CPU (5/7)
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
87 2 Friday, January 22, 2010
87 2 Friday, January 22, 2010
87 2 Friday, January 22, 2010
1
SC
SC
SC
5
CPU1H
CPU1H
AT20
VSS
AT17
VSS
AR31
VSS
AR28
VSS
AR26
VSS
AR24
VSS
AR23
VSS
D D
C C
B B
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ8
VSS
AJ5
VSS
AJ2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
4
AUBURNDALE
AUBURNDALE
VSS
VSS
8 OF 9
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
3
CPU1I
CPU1I
K27
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS
H35
VSS
H32
VSS
H28
VSS
H26
VSS
H24
VSS
H22
VSS
H18
VSS
H15
VSS
H13
VSS
H11
VSS
H8
VSS
H5
VSS
H2
VSS
G34
VSS
G31
VSS
G20
VSS
G9
VSS
G6
VSS
G3
VSS
F30
VSS
F27
VSS
F25
VSS
F22
VSS
F19
VSS
F16
VSS
E35
VSS
E32
VSS
E29
VSS
E24
VSS
E21
VSS
E18
VSS
E13
VSS
E11
VSS
E8
VSS
E5
VSS
E2
VSS
D33
VSS
D30
VSS
D26
VSS
D9
VSS
D6
VSS
D3
VSS
C34
VSS
C32
VSS
C29
VSS
C28
VSS
C24
VSS
C22
VSS
C20
VSS
C19
VSS
C16
VSS
B31
VSS
B25
VSS
B21
VSS
B18
VSS
B17
VSS
B13
VSS
B11
VSS
B8
VSS
B6
VSS
B4
VSS
A29
VSS
A27
VSS
A23
VSS
A9
VSS
2
9 OF 9
9 OF 9
AUBURNDALE
AUBURNDALE
VSS
VSS
VSS_NCTF#AR34
VSS_NCTF#B34
VSS_NCTF#B2
VSS_NCTF#B1
VSS_NCTF#A35
VSS_NCTF#AT1
VSS_NCTF#AT35
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#AP35
RSVD_NCTF#AR35
RSVD_NCTF#AT3
RSVD_NCTF#AR1
RSVD_NCTF#AP1
RSVD_NCTF#AT2
RSVD_NCTF#C1
RSVD_NCTF#A3
RSVD_NCTF#C35
RSVD_NCTF#B35
RSVD_NCTF#A34
RSVD_NCTF#A33
NCTF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
NCTF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,
AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35
AR34
B34
B2
B1
A35
AT1
AT35
AT33
AT34
AP35
AR35
AT3
AR1
AP1
AT2
C1
A3
C35
B35
A34
A33
TP_MCP_VSS_NCTF6
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF7
1
TP93 AFTE14P-GP TP93 AFTE14P-GP
1
TP84 AFTE14P-GP TP84 AFTE14P-GP
1
TP92 AFTE14P-GP TP92 AFTE14P-GP
1
TP83 AFTE14P-GP TP83 AFTE14P-GP
1
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
A A
5
4
3
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
CPU (6/7)
CPU (6/7)
CPU (6/7)
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
97 2 Friday, January 22, 2010
97 2 Friday, January 22, 2010
97 2 Friday, January 22, 2010
1
SC
SC
SC
5
4
3
2
1
5 OF 9
CPU1E
D D
SO-DIMM VREFDQ (M3) Circuit
for Clarksfield Processor
DY
DY
RN18
RN18
M_VREF_DQ_DIMM0 20
M_VREF_DQ_DIMM1 21
C C
B B
A A
1
2 3
SRN0J-10-GP-U
SRN0J-10-GP-U
R679 0R0402-PAD R679 0R0402-PAD
1 2
R680 0R0402-PAD R680 0R0402-PAD
1 2
1130 -SC
5
TP33 TPAD14-GP TP33 TPAD14-GP
TP22 TPAD14-GP TP22 TPAD14-GP
TP24 TPAD14-GP TP24 TPAD14-GP
TP29 TPAD14-GP TP29 TPAD14-GP
TP20 TPAD14-GP TP20 TPAD14-GP
TP25 TPAD14-GP TP25 TPAD14-GP
TP32 TPAD14-GP TP32 TPAD14-GP
TP34 TPAD14-GP TP34 TPAD14-GP
TP30 TPAD14-GP TP30 TPAD14-GP
TP23 TPAD14-GP TP23 TPAD14-GP
TP21 TPAD14-GP TP21 TPAD14-GP
TP31 TPAD14-GP TP31 TPAD14-GP
TP27 TPAD14-GP TP27 TPAD14-GP
TP28 TPAD14-GP TP28 TPAD14-GP
4
H_RSVD9_R
H_RSVD10_R
CFG0
CFG1
1
CFG2
1
CFG3
CFG4
CFG5
1
CFG6
1
CFG7
CFG8
1
CFG9
1
CFG10
1
CFG11
1
CFG12
1
CFG13
1
CFG14
1
CFG15
1
CFG16
1
CFG17
1
H_RSVD17_R
H_RSVD18_R
CPU1E
AP25
RSVD#AP25
AL25
RSVD#AL25
AL24
RSVD#AL24
AL22
RSVD#AL22
AJ33
RSVD#AJ33
AG9
RSVD#AG9
M27
RSVD#M27
L28
RSVD#L28
J17
SA_DIMM_VREF#
H17
SB_DIMM_VREF#
G25
RSVD#G25
G17
RSVD#G17
E31
RSVD#E31
E30
RSVD#E30
AM30
CFG0
AM28
CFG1
AP31
CFG2
AL32
CFG3
AL30
CFG4
AM31
CFG5
AN29
CFG6
AM32
CFG7
AK32
CFG8
AK31
CFG9
AK28
CFG10
AJ28
CFG11
AN30
CFG12
AN32
CFG13
AJ32
CFG14
AJ29
CFG15
AJ30
CFG16
AK30
CFG17
H16
RSVD_TP#H16
B19
RSVD#B19
A19
RSVD#A19
A20
RSVD#A20
B20
RSVD#B20
U9
RSVD#U9
T9
RSVD#T9
AC9
RSVD#AC9
AB9
RSVD#AB9
J29
RSVD#J29
J28
RSVD#J28
AUBURNF,CLARKUNF
AUBURNF,CLARKUNF
62.10040.611
62.10040.611
2ND = 62.10053.561
2ND = 62.10053.561
3rd = 62.10055.341
3rd = 62.10055.341
4th = 62.10055.321
4th = 62.10055.321
AUBURNDALE
AUBURNDALE
RESERVED
RESERVED
4
5 OF 9
RSVD#AJ13
RSVD#AJ12
RSVD#AH25
RSVD#AK26
RSVD#AL26
RSVD_NCTF#AR2
RSVD#AJ26
RSVD#AJ27
RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33
RSVD#AR32
RSVD_TP#E15
RSVD_TP#F15
KEY
RSVD#D15
RSVD#C15
RSVD#AJ15
RSVD#AH15
RSVD_TP#AA5
RSVD_TP#AA4
RSVD_TP#R8
RSVD_TP#AD3
RSVD_TP#AD2
RSVD_TP#AA2
RSVD_TP#AA1
RSVD_TP#R9
RSVD_TP#AG7
RSVD_TP#AE3
RSVD_TP#V4
RSVD_TP#V5
RSVD_TP#N2
RSVD_TP#AD5
RSVD_TP#AD7
RSVD_TP#W3
RSVD_TP#W2
RSVD_TP#N3
RSVD_TP#AE5
RSVD_TP#AD9
VSS
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AR32
E15
F15
A2
D15
C15
AJ15
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
RSVD64_R
R681 0R0402-PAD R681 0R0402-PAD
RSVD65_R
1 2
R682 0R0402-PAD R682 0R0402-PAD
1 2
1130 -SC
VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.
R125
RSVD_VSS
R125
1 2
0R0402-PAD
0R0402-PAD
0113 -1
CFG0
1 2
R160
R160
3KR2F-GP
3KR2F-GP
DY
DY
SA 0623
CFG3
CFG4
CFG7
3
1 2
R135
R135
3KR2F-GP
3KR2F-GP
1 2
R148
R148
3KR2F-GP
3KR2F-GP
DY
DY
1 2
R141
R141
3KR2F-GP
3KR2F-GP
DY
DY
Processor Strapping
PCI-Express Configuration Select
CFG0
CFG3
CFG4
CFG7 Clarksfield (only for early samples pre-ES1) -
2
1:Single PEG(Default)
0:Bifurcation enabled
CFG3 - PCI-Express Static Lane Reversal
1 :Normal Operation(Default)
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
1:Disabled; No Physical Display Port
attached to Embedded Display Port
(Default)
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (7/7)
CPU (7/7)
CPU (7/7)
HM42-CP
HM42-CP
HM42-CP
SC
SC
of
of
of
10 72 Friday, January 22, 2010
10 72 Friday, January 22, 2010
10 72 Friday, January 22, 2010
1
SC
5
ICH_RTCX1
1 2
R482
R482
10MR2J-L-GP
10MR2J-L-GP
X6
X6
1
D D
SC6P50V2CN-1GP
SC6P50V2CN-1GP
CL = 7pF
4
1 2
C547
C547
X-32D768KHZ-34GPU
X-32D768KHZ-34GPU
2 3
82.30001.661
82.30001.661
2nd = 82.30001.B21
2nd = 82.30001.B21
ICH_RTCX2
1 2
C544
C544
SC6P50V2CN-1GP
SC6P50V2CN-1GP
ACZ_RST#
ACZ_SYNC
ACZ_BIT_CLK
ACZ_SDATAOUT
Freq tolertance :+/- 20 ppm
RTC_AUX_S5
SA 0629 RF
1 2
ECT5 SC33P50V2JN-3GP
ECT5 SC33P50V2JN-3GP
DY
DY
1 2
ECT7 SC 33P50V2JN-3GP
ECT7 SC 33P50V2JN-3GP
DY
DY
1 2
ECT6 SC33P50V2JN-3GP
ECT6 SC33P50V2JN-3GP
DY
DY
1 2
ECT8 SC33P50V2JN-3GP
ECT8 SC33P50V2JN-3GP
DY
DY
1202 -SC
ACZ_RST#_AUDIO 32
ACZ_SYNC_AUDIO 32
ACZ_BITCLK_AUDIO 32
ACZ_SDATAOUT_AUDIO 32
R455 10R2J-2-GP R455 10R2J-2-GP
R461 10R2J-2-GP R461 10R2J-2-GP
R458 10R2J-2-GP R458 10R2J-2-GP
R463 33R2J-2-GP R463 33R2J-2-GP
SIV fail when stuff 10-ohm,
C C
fine tune 33-ohm for solving
1 2
12
12
1 2
1117 -SC
ACZ_RST#
ACZ_SYNC
ACZ_BIT_CLK
ACZ_SDATAOUT
33-ohm is required for intel recommend,
real value base on fine tune result
NO REBOOT STRAP
3D3V_S0
1 2
DY
DY
R516 1KR2J-1-GP
R516 1KR2J-1-GP
No Reboot Strap R23
HDA_SPKR
SA 0709
B B
For after PCH stepping B3,have to DY,
PCH_JTAG_TMS
PCH_JTAG_TDO
PCH_JTAG_TDI
PCH_JTAG_RST#
PCH_JTAG_TMS
PCH_JTAG_TDO
A A
PCH_JTAG_TDI
PCH_JTAG_RST#
PCH_JTAG_TCK
When unused all JTAG pins may be NC
R235 10KR2J-3-GP
R235 10KR2J-3-GP
R240 51R2F-2-GP
R240 51R2F-2-GP
R515 51R2F-2-GP R515 51R2F-2-GP
ACZ_SPKR
Low = Default
High = No Reboot
1113 -SC
DY
DY
R512
R512
1 2
200R2J-L1-GP
200R2J-L1-GP
DY
DY
R509
R509
1 2
200R2J-L1-GP
200R2J-L1-GP
DY
DY
R513
R513
1 2
200R2J-L1-GP
200R2J-L1-GP
1 2
DY
DY
DY
DY
R511
R511
1 2
100R2J-2-GP
100R2J-2-GP
DY
DY
R510
R510
1 2
100R2J-2-GP
100R2J-2-GP
DY
DY
R514
R514
1 2
100R2J-2-GP
100R2J-2-GP
1 2
DY
DY
1 2
5
3D3V_S5
SPI_CS0#, SPI_MISO, SPI_MOSI, SPI_CLK:
No series resistor required if routing length is 1.5"-6.5"
PCH Strapping
SPI_MOSI
Enable iTPM: Connect to Vcc3_3 with
8.2-kȍ weak pull-up resistor.
Disable iTPM: Left floating, no
pull-down required
3D3V_S0
1 2
DY
DY
R250 8K2R2J-3-GP
R250 8K2R2J-3-GP
4
RN55
RN55
2 3
1
SRN20KJ-GP-U
SRN20KJ-GP-U
PCH_SPI_CS#0 41
PCH_SPI_MOSI 41
PCH_SPI_CLK 41
SPI_MOSO_R 41
4
4
C530
C530
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
ME_UNLOCK# 40
SPI_MOSI_R
1 2
ACZ_SPKR 32
ACZ_SDATAIN0 32
TPAD14-GP
TPAD14-GP
PCH_SPI_CS#0
PCH_SPI_MOSI
PCH_SPI_CLK
3
RTC_AUX_S5
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDATAIN1
HDA_SDIN2
ACZ_SDATAOUT
8
7
6
HDA_DOCK_EN#
SM_INTRUDER#
ICH_INTVRMEN
ICH_RTCX1
ICH_RTCX2
ICH_RTCRST#
SRTCRST#
SM_INTRUDER#
ICH_INTVRMEN
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
SPI_CLK_R
SPI_CS#0_R
SPI_MOSI_R
SPI_MOSO_R
D10
D10
3
BAS40CW-GP
BAS40CW-GP
83.00040.E81
83.00040.E81
2nd = 83.00040.M81
2nd = 83.00040.M81
3rd = 83.00040.R81
3rd = 83.00040.R81
3
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable internal VRs
PCH1A
PCH1A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN#/GPIO33
J30
HDA_DOCK_RST#/GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3D3V_AUX_S5
2
1
PCH 1 stuff 71.0IBEX.G0U
RTC_PWR
1 2
R297
R297
1KR2J-1-GP
1KR2J-1-GP
1 2
R470
R470
1MR2J-1-GP
1 2
2 1
C527
C527
G59
G59
GAP-OPEN
GAP-OPEN
1MR2J-1-GP
1 2
R475
R475
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
330KR2F-L-GP
330KR2F-L-GP
SRTCRST# new signal Pin
TP40 TPAD14-GP TP40 TPAD14-GP
TP38
TP38
1
1
HM4-CP SA
1130 -SC
R182
R182
1 2
0R0402-PAD
0R0402-PAD
1 2
R187 8K2R2J-3-GP
R187 8K2R2J-3-GP
DY
DY
0113 -1
RN81
RN81
1
2
3
4 5
SRN15J -1-GP
SRN15J -1-GP
RTC_AUX_S5 RTC_BAT
1 2
R298 0R3J-0-U-GP R298 0R3J-0-U-GP
1 2
C330
C330
SC1U10V2ZY-GP
SC1U10V2ZY-GP
RTC_PWR_L
83.00040.Q81 is ROHS parts
83.00040.R81 is Halogens free Part
arrange qual in Eng SKU
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
RTC IHDA
RTC IHDA
SATA
SATA
SATAICOMPO
SATA0GP/GPIO21
SATA1GP/GPIO19
SPI JTAG
SPI JTAG
1130 -SC
0113 -1
1 OF 10
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LDRQ0#
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPI
SATALED#
2nd = 20.F0772.002
2nd = 20.F0772.002
3rd = 21.D0300.102
3rd = 21.D0300.102
4th = 20.F1729.002
4th = 20.F1729.002
2
D33
B33
C32
A32
C34
A34
F34
AB9
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
MLX-CON2-13-GP
MLX-CON2-13-GP
4
2
1
3
20.F1035.002
20.F1035.002
2
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
High=Enable Low=Disable
integrated VccLan1_05VccCL1_05
LAN100_SLP
PCH_GPIO23
INT_ SERIRQ
SATAICOMP
SATA_LED#
SATA_DET#0_R
SATA_DET#1_R
RTC1
RTC1
High=Enable Low=Disable
LPC_LAD0 40,41
LPC_LAD1 40,41
LPC_LAD2 40,41
LPC_LAD3 40,41
LPC_LFRAME# 40,41
1
TP35 TPAD14-GP TP35 TPAD14-GP
INT_SERIRQ 16,40
SATA_RXN0 26
SATA_RXP0 26
SATA_TXN0 26
SATA_TXP0 26
SATA_RXN4 27
SATA_RXP4 27
SATA_TXN4 27
SATA_TXP4 27
1D05V_S0
1 2
R219
R219
37D4R2F-GP
37D4R2F-GP
SATA_LED# 16,44
SATA_DET#0_R
SATA_DET#1_R
PCH_GPIO48 16
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCH_GPIO48
PCH (1/9)
PCH (1/9)
PCH (1/9)
HM42-CP
HM42-CP
HM42-CP
1
HDD
ODD
RN28
RN28
6
7
8
SRN10KJ-7GP
SRN10KJ-7GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
11 72 Friday, January 22, 2010
11 72 Friday, January 22, 2010
11 72 Friday, January 22, 2010
1
3D3V_S0
4 5
3
2
1
of
of
of
SC
SC
SC
5
LAN
D D
MINICARD1
MINICARD2
C C
CLK _PCIE_ MINI1# 37
CLK _PCIE_ MINI1 37
MINI1_CLKREQ# 37
CLK _PCIE_ MINI2# 37
CLK _PCIE_ MINI2 37
MIN2_CLKREQ# 37
CLK_PCIE_LAN# 30
CLK_PCIE_LAN 30
B B
LAN_CLKREQ# 30
PCIE_RXN1 30
PCIE_RXP1 30
PCIE_TXN1 30
PCIE_TXP1 30
PCIE_RXN2 37
PCIE_RXP2 37
PCIE_TXN2 37
PCIE_TXP2 37
PCIE_RXN3 37
PCIE_RXP3 37
PCIE_TXN3 37
PCIE_TXP3 37
R267 0R2J-2-GP
R267 0R2J-2-GP
R518 0R2J-2-GP
R518 0R2J-2-GP
R529 0R2J-2-GP
R529 0R2J-2-GP
PCIE_RXN1
PCIE_RXP1
PCIE_RXN2
PCIE_RXP2
PCIE_CLK_RQ0# 13
R683 0R0402-PAD R683 0R0402-PAD
1 2
R684 0R0402-PAD R684 0R0402-PAD
1 2
1 2
DY
DY
R685 0R0402-PAD R685 0R0402-PAD
1 2
R686 0R0402-PAD R686 0R0402-PAD
1 2
1 2
DY
DY
R687 0R0402-PAD R687 0R0402-PAD
1 2
R688 0R0402-PAD R688 0R0402-PAD
1 2
1 2
DY
DY
TXN1
C198 SCD1U10V2KX-5GP C198 SCD1U10V2KX-5GP
12
TXP1
C197 SCD1U10V2KX-5GP C197 SCD1U10V2KX-5GP
1 2
TXN2
C219 SCD1U10V2KX-5GP C219 SCD1U10V2KX-5GP
1 2
TXP2
C223 SCD1U10V2KX-5GP C223 SCD1U10V2KX-5GP
1 2
TXN3
C216 SCD1U10V2KX-5GP C216 SCD1U10V2KX-5GP
1 2
TXP3
C221 SCD1U10V2KX-5GP C221 SCD1U10V2KX-5GP
1 2
PCIE_CLK_RQ0# PEG_CLKREQ#
CLK_PCH_SRC1_N
CLK_PCH_SRC1_P
PCIE_CLK_RQ1#
CLK_PCH_SRC2_N
CLK_PCH_SRC2_P
PCIE_CLK_RQ2#
CLK_PCH_SRC0_N
CLK_PCH_SRC0_P
PCIE_CLK_RQ3#
1130 -SC
R517
R517
10KR2J-3-GP
10KR2J-3-GP
R519
R519
10KR2J-3-GP
10KR2J-3-GP
PCIE_CLK_RQ4#
PCIE_CLK_RQ5#
PEG_B_CLKRQ#
PCIECLKRQ{0,3,4,5,6,7}# should
have a 10K pull-up to +3VALW.
PCIECLKRQ{1,2} should have a
10K pull-up to +1.05VS (But CRB is
pull-up to +3VS).
3D3V_S0 3D3V_S5
R527
R527
10KR2J-3-GP
10KR2J-3-GP
DY
DY
A A
1 2
PCIE_CLK_RQ3# PEG_B_CLKRQ#
R530
R530
10KR2J-3-GP
10KR2J-3-GP
1 2
R269
R269
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
PCIE_CLK_RQ1#
1 2
R268
R268
10KR2J-3-GP
10KR2J-3-GP
5
3D3V_S0
DY
DY
1 2
1 2
PCIE_CLK_RQ2#
4
PCH1B
PCH1B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
4
3D3V_S5
SMBus
SMBus
PCI-E*
PCI-E*
Link
Link
Controller
Controller
PEG_A_CLKRQ#/GPIO47
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_ N
CLKOUT_DP_P/CLKOUT_BCLK1_ P
From CLK BUFFER
From CLK BUFFER
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
Clock Flex
Clock Flex
RN27
RN27
1
8
2
7
3
6
4 5
SRN10KJ-7GP
SRN10KJ-7GP
2 OF 10
2 OF 10
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1ALERT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
CLKIN_PCILOOPBACK
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
PCIE_CLK_RQ4#
PCIE_CLK_RQ5#
B9
H14
C8
J14
C6
G8
M14
E10
G12
T13
T11
T9
H1
AD43
AD45
AN4
AN2
AT1
AT3
AW24
BA24
AP3
AP1
F18
E18
AH13
AH12
P41
J42
AH51
AH53
AF38
T45
P43
T42
N50
SB 0812
3
PCH_GPIO11
PCH_GPIO60
SML0_CLK
SML0_DATA
PCH_GPIO74
KBC_SCL1
KBC_SDA1
CL_CLK
CL_DATA
CL_RST#
PEG_CLKREQ# PEG_CLKREQ#
CLK_PCH_PEGA_N
CLK_PCH_PEGA_P
CLK_EXP_N
CLK_EXP_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI#
CLKIN_DMI
CLK_CPU_BCLK#
CLK_CPU_BCLK
DREFCLK#
DREFCLK
CLK_PCIE_SATA#
CLK_PCIE_SATA
CLK_ICH14
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
CLK48
3
PCH_GPIO11 16
SMB_CLK 37
SMB_DATA 37
PCH_GPIO60 16
if use ENE KBC stuff 2.2K-ohm
thermal IC will be abnormal
PCH_GPIO74 13
KBC_SCL1 40
KBC_SDA1 40
1
TP44 TPAD14-GP TP44 TPAD14-GP
1
TP47 TPAD14-GP TP47 TPAD14-GP
1
TP49 TPAD14-GP TP49 TPAD14-GP
1 2
DY
DY
R261 0R2J-2-GP
R261 0R2J-2-GP
R689 0R0402-PAD R689 0R0402-PAD
1 2
R690 0R0402-PAD R690 0R0402-PAD
1 2
R691 0R0402-PAD R691 0R0402-PAD
1 2
R692 0R0402-PAD R692 0R0402-PAD
1 2
4
DY
DY
CLKIN_DMI# 3
CLKIN_DMI 3
CLK_CPU_BCLK# 3
CLK_CPU_BCLK 3
DREFCLK# 3
DREFCLK 3
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
CLK_ICH14 3
CLK_PCI_FB 15
1 2
R172 90D9R2F-1-GP R172 90D9R2F-1-GP
1 2
R437 33R2J-2-GP R437 33R2J-2-GP
PEX_CLKREQ 62
1130 -SC
1
RN57
RN57
2 3
SRN0J-10-GP-U
SRN0J-10-GP-U
1 2
C484
C484
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
CLK48_Cardreader 36
2
SMB_CLK
SMB_DATA
PCH_SMBDATA 3,20,21
CLK_PCIE_PEG# 62
CLK_PCIE_PEG 62
PEG_CLK#_R 5
PEG_CLK_R 5
DPLL_REF_SSCLK# 5
DPLL_REF_SSCLK 5
1D05V_S0
2
1
678
SRN10KJ-7GP
RN60
RN60
SRN2K2J-2-GP
SRN2K2J-2-GP
4 5
2N7002KDW-GP
2N7002KDW-GP
2nd = 84.DM601.03F
2nd = 84.DM601.03F
SRN10KJ-7GP
RN56
RN56
123
SML0_CLK
SML0_DATA KBC_SCL1
1
2
3 4
Q39
Q39
84.2N702.A3F
84.2N702.A3F
R262
R262
1 2
10KR2J-3-GP
10KR2J-3-GP
82.30020.971
SMB_DATA
6
5
4 5
3D3V_S0
1105 -SC
3D3V_S5 3D3V_S0
678
123
SMB_CLK
CL = 12pF
Freq tolertance :+/- 30 ppm
XTAL25_IN
1 2
DIS
DIS
R441 0R2J-2-GP
R441 0R2J-2-GP
1117 -SC
UMA_Muxless
UMA_Muxless
XTAL25_IN
X5
X5
R432
R432
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
1MR2J-1-GP
UMA_Muxless
UMA_Muxless
XTAL25_OUT
UMA_Muxless
UMA_Muxless
1MR2J-1-GP
82.30020.851
82.30020.851
2nd = 82.30020.791
2nd = 82.30020.791
1 2
1 2
0R2J-2-GP
0R2J-2-GP
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
XTAL25_OUT_R
UMA_Muxless
UMA_Muxless
3rd = 82.30020.A31
3rd = 82.30020.A31
R440
R440
PCH (2/9)
PCH (2/9)
PCH (2/9)
HM42-CP
HM42-CP
HM42-CP
1 2
UMA_Muxless
UMA_Muxless
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
3D3V_S5
KBC_SDA1
PCH_SMBCLK 3,20,21
C486
C486
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
C485
C485
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
of
of
of
12 72 Friday, January 22, 2010
12 72 Friday, January 22, 2010
12 72 Friday, January 22, 2010
SB 0812
SC
SC
SC
5
D D
1D05V_S0
1 2
1214 -SC
R464 49D9R2F-GP R464 49D9R2F-GP
Current 0.1uF 0402 10V X7R
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
1 2
1 2
CORE_PWRGD_1
RUNPWROK_1
R256
PM_PWROK 45
CORE_PWRGD 45,47
RUNPWROK 39
R256
R255 0R0402-PAD R255 0R0402-PAD
R534 0R0402-PAD R534 0R0402-PAD
0113 -1
C C
R254 10KR2J-3-GP R254 10KR2J-3-GP
ALL_PWRGD 45,47,50,51,52
PM_DRAM_PWRGD 5
SUS_PWR_DN_ACK 40
PM_PWRBTN# 40,59
Q32
Q32
2N7002KDW-GP
2N7002KDW-GP
1 2
1
DY
DY
2
AC_PRESENT 40
3 4
2
1
3D3V_S5
DY
DY
1 2
R459
R459
10KR2J-3-GP
10KR2J-3-GP
1 2
R460
R460
1008 -SA
B B
A A
RSMRST#_KBC 40
3D3V_AUX_S5
1 2
R450
R450
10KR2J-3-GP
10KR2J-3-GP
51123_PGOOD_2
84.2N702.A3F
84.2N702.A3F
2ND = 84.DM601.03F
2ND = 84.DM601.03F
R465
R465
1KR2F-3-GP
1KR2F-3-GP
D19
D19
3
BAT54PT-GP
BAT54PT-GP
83.00054.T81
83.00054.T81
2ND = 83.BAT54.D81
2ND = 83.BAT54.D81
3rd = 83.00054.S81
3rd = 83.00054.S81
5
5
6
previous 0.1uF 0402 16V X7R
VCC
Y
3D3V_S5
5
4
ALL_PWRGD
PM_DRAM_PWRGD
1 2
1 2
1 2
1 2
R449
R449
100KR2J-1-GP
100KR2J-1-GP
U45
U45
1
B
2
A
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
2ND = 73.7SZ08.DAH
2ND = 73.7SZ08.DAH
1 2
PM_RSMRST#
PM_RSMRST#
100KR2J-1-GP
100KR2J-1-GP
R531 0R0402-PAD R531 0R0402-PAD
R253 0R0402-PAD R253 0R0402-PAD
R252 0R0402-PAD R252 0R0402-PAD
4
DMI_RXN0 4
DMI_RXN1 4
DMI_RXN2 4
DMI_RXN3 4
DMI_RXP0 4
DMI_RXP1 4
DMI_RXP2 4
DMI_RXP3 4
DMI_TXN0 4
DMI_TXN1 4
DMI_TXN2 4
DMI_TXN3 4
DMI_TXP0 4
DMI_TXP1 4
DMI_TXP2 4
DMI_TXP3 4
DMI_IRCOMP_R
C578
C578
DY
DY
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PM_PWROK_1
R244 0R0402-PAD R244 0R0402-PAD
1 2
1 2
R257 0R2J-2-GP
R257 0R2J-2-GP
1 2
R221 10KR2J-3-GP R221 10KR2J-3-GP
1130 -SC
51123_PGOOD 49
4
DY
DY
PCIE_CLK_RQ0# 12
3D3V_S0
1 2
R270
R270
10KR2J-3-GP
10KR2J-3-GP
PM_SYSRST#_R
ME_PWROK
LAN_RST#1
PM_RSMRST#
SUS_PWR_DN_ACK_R
PM_PWRBTN#_R
AC_PRESENT_R
PCH_GPIO72
PM_RI#
PM_CLKRUN#
BC24
BJ22
AW20
BJ20
BD24
BG22
BA20
BG20
BE22
BF21
BD20
BE18
BD22
BH21
BC20
BD18
BH25
BF25
T6
M6
B17
K5
A10
D9
C16
M1
P5
P7
A6
F14
AC_PRESENT_R
PCIE_CLK_RQ0#
PM_RI#
1 2
R520
R520
8K2R2J-3-GP
8K2R2J-3-GP
PCH1C
PCH1C
DMI0RXN
DMI1RXN
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
SYS_RESET#
SYS_PWROK
PWROK
MEPWROK
LAN_RST#
DRAMPWROK
RSMRST#
SUS_PWR_DN_ACK/GPI O30
PWRBTN#
ACPRESENT/GPIO31
BATLOW#/GPI O72
RI#
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
RN31
RN31
1
2
3
4 5
SRN10KJ-7GP
SRN10KJ-7GP
8
7
6
3D3V_S0
3
3 OF 10
3 OF 10
BA18
FDI_RXN0
BH17
FDI_RXN1
BD16
FDI_RXN2
BJ16
FDI_RXN3
BA16
FDI_RXN4
BE14
FDI_RXN5
BA14
FDI_RXN6
BC12
FDI_RXN7
BB18
FDI_RXP0
BF17
FDI_RXP1
BC16
FDI_RXP2
BG16
FDI_RXP3
AW16
FDI_RXP4
BD14
FDI_RXP5
BB14
FDI_RXP6
BD12
FDI_RXP7
BJ14
FDI_INT
FDI_FSYNC0
DMI
FDI
DMI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
System Power Management
System Power Management
SLP_LAN#/GPIO29
PCH_GPIO74 12
PCH_GPIO12 16
3D3V_S5
BF13
BH13
BJ12
BG14
J12
WAKE#
Y1
P8
F3
E4
H7
SLP_S4#
P12
SLP_S3#
K8
SLP_M#
N2
TP23
BJ10
PMSYNCH
F6
PCH_GPIO74
PM_PWRBTN#_R
PCH_GPIO12
SUS_PWR_DN_ACK_R
PCH_GPIO72
PCIE_WAKE#
PCIE_WAKE#
PM_CLKRUN#
PM_SUS_STAT#
PM_SUS_CLK
PM_SLP_S5#
PM_SLP_S4#_R
PM_SLP_S3#_R
PM_SLP_M#_R
PM_SLP_DSW#
H_PM_SYNC
PM_SLP_LAN#
RN62
RN62
1
2
3
4 5
SRN10KJ-7GP
SRN10KJ-7GP
1 2
R526 8K2R2J-3-GP R526 8K2R2J-3-GP
1 2
R259 10KR2J-3-GP R259 10KR2J-3-GP
HM42-CP NV Muxless 0917
change pull up 1K to 10K for Intel suggestion
3
1
1
1
1
8
7
6
2
FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4
FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4
FDI_ INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
PCIE_WAKE# 30,37
PM_CLKRUN# 40
TP48 TPAD14-GP TP48 TPAD14-GP
PM_SUS_CLK 39,40
TP55 TPAD14-GP TP55 TPAD14-GP
R243 0R0402-PAD R243 0R0402-PAD
1 2
R275 0R0402-PAD R275 0R0402-PAD
1 2
R245 0R0402-PAD R245 0R0402-PAD
1 2
TP89 TPAD14-GP TP89 TPAD14-GP
TP54 TPAD14-GP TP54 TPAD14-GP
3D3V_S5
3D3V_S5
2
1
HM42-CP NV Muxless 0918
1130 -SC
PM_SLP_S4# 40,50,52
PM_SLP_S3# 40,45,51,52
PM_SLP_M# 40
H_PM_SYNC 5
3D3V_S5
1 2
R273
R273
S3
S3
10KR2J -3-GP
1016 -SB
Q15
PM_SLP_S3#
SB 0814
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Q15
G
.....
.....
S3
S3
S
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
2ND = 84.2N702.E31
2ND = 84.2N702.E31
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PCH (3/9)
PCH (3/9)
PCH (3/9)
HM42-CP
HM42-CP
HM42-CP
10KR2J -3-GP
D
13 72 Friday, January 22, 2010
13 72 Friday, January 22, 2010
13 72 Friday, January 22, 2010
1
PM_SLP_S3_CTL 8,20
SC
SC
of
of
of
SC
5
D D
3D3V_S0
RN12
RN12
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
UMA_Muxless
UMA_Muxless
LCTL_CLK CLK_DDC_EDID
4
LCTL_DATA
HM42-CP NV_Muxless SA
R181
R181
1 2
2K4R2F-GP
2K4R2F-GP
UMA_Muxless
UMA_Muxless
LIBG
Muxless->64.23715.6DL,UMA-2.4K
R175
R175
LVDS_VREF
1 2
0R2J-2-GP
C C
SB 0811
B B
UMA_Muxless
UMA_Muxless
RN8
RN8
8
7
6
SRN150F-1-GP
SRN150F-1-GP
UMA_Muxless
UMA_Muxless
0R2J-2-GP
1
2
3
4 5
PCH_BLUE
PCH_GREEN
PCH_RED
4
PCH_BL_ON 22
PCH_LCDVDD_ON 23
CLK_DDC_EDID 22
DAT_DDC_EDID 22
PCH_TXACLK- 22
PCH_TXACLK+ 22
PCH_TXAOUT0- 22
PCH_TXAOUT1- 22
PCH_TXAOUT2- 22
PCH_TXAOUT0+ 22
PCH_TXAOUT1+ 22
PCH_TXAOUT2+ 22
PCH_BLUE 22
PCH_GREEN 22
PCH_RED 22
PCH_DDCCLK 24
PCH_DDCDATA 24
PCH_HSYNC 24
PCH_VSYNC 24
L_BKLTCTL 23
TP26 TPAD14-GP TP26 TPAD14-GP
1 2
R130
R130
1KR2D-1-GP
1KR2D-1-GP
1K 0.5% ohm
DAT_DDC_EDID
LCTL_CLK
LCTL_DATA
LIBG
L_LVBG
1
LVDS_VREF
CRT_IREF
PCH1D
PCH1D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3
4 OF 10
4 OF 10
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
LVDS
LVDS
Digital Display Interface
Digital Display Interface
CRT
CRT
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
PCH_HDMI_DATA2-_L
BD42
PCH_HDMI_DATA2+_L
BC42
PCH_HDMI_DATA1-_L
BJ42
PCH_HDMI_DATA1+_L
BG42
PCH_HDMI_DATA0-_L
BB40
PCH_HDMI_DATA0+_L
BA40
PCH_HDMI_CLK-_L
AW38
PCH_HDMI_CLK+_L
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
2
1014 -SA
PCH_HDMI_CLK 25
PCH_HDMI_DATA 25
PCH_HDMI_DETECT 25
1 2
C700 SC D1U10V2KX-5GP
C700 SC D1U10V2KX-5GP
1 2
C703 SC D1U10V2KX-5GP C703 SC D1U10V2KX-5GP
1 2
C696 SC D1U10V2KX-5GP C696 SC D1U10V2KX-5GP
1 2
C697 SCD1U10V2KX-5GP C697 SCD1U10V2KX-5GP
1 2
C701 SCD1U10V2KX-5GP C701 SCD1U10V2KX-5GP
1 2
C702 SC D1U10V2KX-5GP C702 SC D1U10V2KX-5GP
1 2
C698 SC D1U10V2KX-5GP C698 SC D1U10V2KX-5GP
1 2
C699 SCD1U10V2KX-5GP C699 SCD1U10V2KX-5GP
UMA_Muxle ss_HDMI
UMA_Muxle ss_HDMI
HDMI_DATA2- 25,65
HDMI_DATA2+ 25,65
HDMI_DATA1- 25,65
HDMI_DATA1+ 25,65
HDMI_DATA0- 25,65
HDMI_DATA0+ 25,65
HDMI_CLK- 25,65
HDMI_CLK+ 25,65
1
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCH (4/9)
PCH (4/9)
PCH (4/9)
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
14 72 Friday, January 22, 2010
14 72 Friday, January 22, 2010
14 72 Friday, January 22, 2010
1
SC
SC
SC
5
RN54
PCI_STOP#
PCI_ IRDY#
INT_PIRQD#
INT_PIRQG#
3D3V_S0
D D
RN54
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
10
9
8
7
PCI_PLOCK#
3D3V_S0
PCI_DEVSEL#
PCI_FRAME#
PCI_TRDY#
These pins are left as NC,
because the function is disable.
HM42 NV Muxless SA 0925
1209 -SC
3D3V_S0
1 2
R443 8K2R 2J-3-GP R443 8K2R 2J-3-GP
1 2
R434 8K2R2J-3-GP R434 8K2R2J-3-GP
1 2
R438 8K2R2J-3-GP R438 8K2R2J-3-GP
3D3V_S0
1 2
R442 8K2R2J-3-GP R442 8K2R2J-3-GP
1 2
R126 8K2R 2J-3-GP R126 8K2R 2J-3-GP
1 2
R433 8K2R2J-3-GP R433 8K2R2J-3-GP
1 2
R436 8K2R2J-3-GP R436 8K2R2J-3-GP
C C
3D3V_S0
PCI_GNT0#
PCI_GNT1#
RN13
RN13
1
2
3
4 5
SRN8K2J-4-GP
SRN8K2J-4-GP
1 2
DY
DY
R136 1KR2J-1-GP
R136 1KR2J-1-GP
1 2
DY
DY
R152 1KR2J-1-GP
R152 1KR2J-1-GP
8
7
6
PCH strapping
BOOT BIOS Strap
floating 0
B B
PCI_GNT#1
1
0
A A
GNT#1 BOOT BIOS Location GNT#0
00L P C
0 1 Reserved
floating floating
Default
(internal pull up)
Configures DMI for
ESI compatible
operation
(Not for Mobile
platform)
PCI_PLTRST#
5
PCI_REQ1#
INT_PIRQB#
PCI_REQ3#
INT_PIRQH#
PCI_PERR#
PCI_REQ0#
INT_ PIRQF#
INT_PIRQC#
INT_PIRQE#
INT_PIRQA#
PCI_SERR#
PCI
SPI(Default)
PCLK_FWH 41
CLK_PCI_FB 12
CLK_PCI_KBC 40
USE SPI
1
2
3
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
2ND = 73.7SZ08.DAH
2ND = 73.7SZ08.DAH
1 2
R260 0R2J-2-GP R260 0R2J-2-GP
HM42 NV Muxless SA 0924
TP103 TPAD14-GP TP103 TPAD14-GP
TP67 TPAD14-GP TP67 TPAD14-GP
1016 -SB
SB 0810
R439 22R2J-2-GP R439 22R2J-2-GP
1 2
R121 22R2J-2-GP R121 22R2J-2-GP
1 2
R143 47R2J-2-GP R143 47R2J-2-GP
1 2
TP18 TPAD14-GP TP18 TPAD14-GP
TP19 TPAD14-GP TP19 TPAD14-GP
3D3V_S5
U8
U8
B
A
GND
5
VCC
DY
DY
4
Y
4
3D3V_S0
1 2
R153
R153
10KR2J-3-GP
10KR2J-3-GP
dGPU_SELECT#
1
dGPU_PWM_SELECT#
1
TP50 TPAD14-GP TP50 TPAD14-GP
1
1
C304
C304
DY
DY
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PLT_RST#
4
1
CLK_PCI_SIO_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
CLK_PCI_3
CLK_PCI_4
PCLK_FWH
1 2
R276
R276
100KR2J-1-GP
100KR2J-1-GP
DY
DY
H40
N34
C44
A38
C36
J34
A40
D45
E36
H48
E40
C40
M48
M45
F53
M40
M43
J36
K48
F40
C42
K46
M51
J52
K51
L34
F42
J40
G46
F44
M47
H36
J50
G42
H47
INT_ PIRQA#
INT_ PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI_REQ0#
PCI_REQ1#
PCI_REQ3#
PCI_GNT0#
PCI_GNT1#
PCI_GNT3#
INT_ PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
PCI_SERR#
PCI_PERR#
PCI_ IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
ICH_PME#
PCI_PLTRST#
G34
G38
H51
B37
A44
F51
A46
B45
M53
F48
K45
F36
H53
B41
K53
A36
A48
E44
E50
A42
H44
F46
C46
D49
D41
C48
N52
P53
P46
P51
P48
M7
DY
DY
1204 -SC
Near R439
PLT_RST# 5,30,36,37,40,41,45,59,62
PCH1E
PCH1E
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
C/BE0#
C/BE1#
C/BE2#
C/BE3#
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ0#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT0#
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO 5
K6
PCIRST#
SERR#
PERR#
IRDY#
PAR
DEVSEL#
FRAME#
PLOCK#
STOP#
TRDY#
PME#
D5
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
1 2
EC90 SC22P50V2JN-4GP
EC90 SC22P50V2JN-4GP
3
5 OF 10
5 OF 10
AY9
NV_CE#0
BD1
NV_CE#1
AP15
NV_CE#2
BD8
NV_CE#3
AV9
NV_DQS0
BG8
NV_DQS1
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
NV_ALE
AY6
NV_CLE
AU2
AV7
NV_RB#
AY8
AY5
AV11
BF5
H18
USBP0N
J18
USBP0P
A18
USBP1N
C18
USBP1P
N20
USBP2N
P20
USBP2P
J20
USBP3N
L20
USBP3P
F20
USBP4N
G20
USBP4P
A20
USBP5N
C20
USBP5P
M22
USBP6N
N22
USBP6P
B21
USBP7N
D21
USBP7P
H22
USBP8N
J22
USBP8P
E22
USBP9N
F22
USBP9P
A22
USBP10N
C22
USBP10P
G24
USBP11N
H24
USBP11P
L24
USBP12N
M24
USBP12P
A24
USBP13N
C24
USBP13P
B25
D25
USBRBIAS
N16
J16
F16
L16
E14
G16
F12
T15
1 2
DY
DY
R435 4K7R2J-2-GP
R435 4K7R2J-2-GP
PCI
PCI
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NVRAM
NVRAM
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
NV_RCOMP
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USB
USB
USBRBIAS#
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
PCI_GNT3#
PCH strapping
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
3
override/Top-Block
Swap Override enabled
High = Default
2
These pins are left as NC,
because the function is disable.
NV_ALE
NV_CLE
NV_RCOMP
USB_RBIAS_PN
1 2
R237
R237
32D4R2F-GP
32D4R2F-GP
DY
DY
R467
R467
22D6R2F-L1-GP
22D6R2F-L1-GP
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#5
USB_OC#6
USB_OC#7
1 2
USB_OC#0 29
USB_OC#4 29
USBPN0 29
USBPP0 29
USBPN1 29
USBPP1 29
USBPN3 37
USBPP3 37
USBPN4 23
USBPP4 23
USBPN8 37
USBPP8 37
USBPN9 29
USBPP9 29
USBPN11 28
USBPP11 28
USBPN12 37
USBPP12 37
USBPN13 36
USBPP13 36
-SA 1001
2
PCH strapping
NV_CLE
floating internal pull-up
NV_ALE
1
floating
DMI termination voltage
Enable Anti-Theft Tech
Disable
(internal pull-down)
DMI Termination Voltage
NV_CLE Set to Vss when low.
Set to Vcc when high.
USB
HM42-CP SA
Pair
USB_OC#5
USB_OC#1
USB_OC#0
USB_OC#7
USB_OC#6
USB_OC#3
USB_OC#2
USB_OC#4
Device
USB3
0
USB2
1
NC
2
3
MINICARD1(WLAN)
4 WECAM
NC
5
NC
6
NC
7
3G SIM Card
8
9
USB1(HS)
10
NC
11
Blue Tooth
1213MINIC2(3G)
Cardreader
8
7
6
8
7
6
1006 -SA swap net
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
3D3V_S5
RN16
RN16
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
3D3V_S5
RN24
RN24
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
PCH (5/9)
PCH (5/9)
PCH (5/9)
HM42-CP
HM42-CP
HM42-CP
1
+V_NVRAM_VCCQ
1 2
R229
R229
1KR2J-1-GP
1KR2J-1-GP
DY
DY
NV_CLE
+V_NVRAM_VCCQ
1 2
R231
R231
1KR2J-1-GP
1KR2J-1-GP
DY
DY
NV_ALE
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
15 72 Friday, January 22, 2010
15 72 Friday, January 22, 2010
15 72 Friday, January 22, 2010
1
SC
SC
SC
GPIO8 has a weak[20K] internal pull up.
No need to have external pull down/up.
GPIO8 pin set to high at reset.
GPIO15 has a weak[20K] internal pull down.
No need to have external pull up/down.
GPIO 15 pin is set to low at reset.
Low : ME Crypto TLS with no confidentiality
High : ME Crypto TLS with confidentiality
D D
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
PCH_GPIO11 12
PCH_GPIO60 12
5
PCH_GPIO11
EC_SWI#
PCH_GPIO60
PCH_GPIO28
EC_SCI# 40
EC_SWI# 40
HM42-CP_NV _Muxless SA
3D3V_S5
RN30
RN30
4 5
3
6
2
7
1
8
SRN10KJ-7GP
SRN10KJ-7GP
DGPU_PWR_EN# 61
PCH_GPIO12 13
DGPU_HOLD_RST# 62
DGPU_PWROK 55,61,62
HM42-CP NV_Muxless SA
PCH_GPIO45
C C
B B
SATA_LED# 11,44
INT_ SERIRQ 11,40
SB 0819
GAP-OPEN
GAP-OPEN
2 1
STP_PCI#
PCH_GPIO22
PCH_GPIO0
dGPU_EDID
3D3V_S0
PCH_GPIO35
PCH_GPIO15
PSW_CLR#
G111
G111
SATA_LED#
PCH_GPIO39
INT_ SERIRQ
PSW_CLR#
1
2
3
4
5 6
HM42-CP_NV _Muxless SA
3D3V_S0 3D3V_S0
R263
DY
DY
1 2
1 2
R263
10KR2J-3-GP
10KR2J-3-GP
DGPU_PWR_EN#
R264
R264
10KR2J-3-GP
10KR2J-3-GP
5
A A
1 2
R508 8K2R2J-3-GP R508 8K2R2J-3-GP
1 2
R266 1KR2J-1-GP R266 1KR2J-1-GP
RN29
RN29
6
7
8
SRN10KJ-7GP
SRN10KJ-7GP
RP1
RP1
SRN10KJ-L3-GP
SRN10KJ-L3-GP
1 2
DY
DY
10
9
8
7
R265 10KR2J-3-GP R265 10KR2J-3-GP
R532
R532
10KR2J-3-GP
10KR2J-3-GP
1 2
DGPU_HOLD_RST#
R533
R533
10KR2J-3-GP
10KR2J-3-GP
1 2
1016 -SB
SB 0814
SB 0722
3D3V_S0
4 5
3
2
1
3D3V_S0
EC_SMI#
EC_SCI#
PX_HDMI#
H: No SG function
L: SG Support
DIS_UMA
DIS_UMA
PCH_GPIO48 11
3D3V_S0
TP36 TPAD14-GP TP36 TPAD14-GP
TP46 TPAD14-GP TP46 TPAD14-GP
TP45 TPAD14-GP TP45 TPAD14-GP
TP56 TPAD14-GP TP56 TPAD14-GP
TP105 TPAD14-GP TP105 TPAD14-GP
TP80 AFTE14P-GP TP80 AFTE14P-GP
TP88 AFTE14P-GP TP88 AFTE14P-GP
TP87 AFTE14P-GP TP87 AFTE14P-GP
TP82 AFTE14P-GP TP82 AFTE14P-GP
R224
R224
10KR2J-3-GP
10KR2J-3-GP
1 2
dGPU_PRSNT#
R225
R225
10KR2J-3-GP
10KR2J-3-GP
Muxless
Muxless
1 2
4
4
PCH_GPIO0
EC_SMI#
PX_HDMI#
1
EC_SCI#
EC_SWI#
PCH_GPIO12
PCH_GPIO15
DGPU_HOLD_RST#
DGPU_PWROK
PCH_GPIO22
PCH_GPIO24
1
PCH_GPIO27
1
PCH_GPIO28
1
STP_PCI#
PCH_GPIO35
DGPU_PWR_EN#
dGPU_PRSNT#
dGPU_EDID
1
PCH_GPIO39
PCH_GPIO45
RST_GATE
PCH_GPIO48
PSW_CLR#
PCH_GPIO57
PCH_TP95
1
PCH_TP96
1
PCH_TP97
1
PCH_TP98
1
SB 0812
PCH1F
PCH1F
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/G PIO12
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
B4
VSS_NCTF_8
B52
VSS_NCTF_9
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
D2
VSS_NCTF_28
A4
VSS_NCTF#A4
A49
VSS_NCTF#A49
A5
VSS_NCTF#A5
A50
VSS_NCTF#A50
A52
VSS_NCTF#A52
A53
VSS_NCTF#A53
B2
VSS_NCTF#B2
B53
VSS_NCTF#B53
BE1
VSS_NCTF#BE1
BE53
VSS_NCTF#BE53
BF1
VSS_NCTF#BF1
BF53
VSS_NCTF#BF53
BH1
VSS_NCTF#BH1
BH53
VSS_NCTF#BH53
BJ1
VSS_NCTF#BJ1
BJ2
VSS_NCTF#BJ2
BJ4
VSS_NCTF#BJ4
BJ49
VSS_NCTF#BJ49
BJ5
VSS_NCTF#BJ5
BJ50
VSS_NCTF#BJ50
BJ52
VSS_NCTF#BJ52
BJ53
VSS_NCTF#BJ53
D1
VSS_NCTF#D1
D53
VSS_NCTF#D53
E1
VSS_NCTF#E1
E53
VSS_NCTF#E53
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3D3V_S5
UMA_Muxless
UMA_Muxless
R239
R239
10KR2J-3-GP
10KR2J-3-GP
1 2
PCH_GPIO57
R238
R238
10KR2J-3-GP
10KR2J-3-GP
DIS
DIS
1 2
MISC
MISC
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
NCTF TEST PIN:
A4,A49,A5,A50,A52,A53,B2,B53,BE1,
BE53,BF1,BF53,BH1,BH53,BJ1,BJ2,BJ4,
BJ49,BJ5,BJ50,BJ52,BJ53,D1,D53,E1,E53
UMA_DISCRETE#
Optimus: HIGH
UMA: HIGH
DIS ONLY: LOW
3
6 OF 10
6 OF 10
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
3
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
BCLK_CPU_N_R
BCLK_CPU_P_R
PCH_THERMTRIP_R
INIT3_3V#
2 3
1
10KR2F-2-GP
10KR2F-2-GP
RST_GATE
1
2
KA20GATE 40
4
H_PECI 5
KBRCIN# 40
H_PWRGD 5,59
3D3V_S5
1 2
R272
R272
S3
S3
1 2
TP52 TPAD14-GP TP52 TPAD14-GP
2
1 2
R236
R236
56R2J-4-GP
56R2J-4-GP
BCLK_CPU_N 5
BCLK_CPU_P 5
SRN0J-10-GP-U
SRN0J-10-GP-U
RN58
RN58
1 2
DY
DY
R230
R230
54D9R2F-L1-GP
54D9R2F-L1-GP
Placed Within 2" from PCH
1D5V_S3
1 2
S3
S3
0121 -1
D
.
.
S3
S3
.
.
.
.
.
.
.
.
G
S3
S3
C298
C298
SCD047U25V2KX-GP
SCD047U25V2KX-GP
S3
S3
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1D05V_VTT
R279
R279
1KR2F-3-GP
1KR2F-3-GP
2ND = 84.2N702.E31
2ND = 84.2N702.E31
84.2N702.D31
84.2N702.D31
2N7002E-1-GP
2N7002E-1-GP
Q14
Q14
S
1 2
R277
R277
100KR2F-L1-GP
100KR2F-L1-GP
PCH (6/9)
PCH (6/9)
PCH (6/9)
HM42-CP
HM42-CP
HM42-CP
1
PM_THRMTRIP-A# 5,45
DDR3_DRAMRST# 20,21
NON-S3
NON-S3
1 2
R278
R278
0R2J-2-GP
0R2J-2-GP
SM_DRAMRST# 5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
16 72 Friday, January 22, 2010
16 72 Friday, January 22, 2010
16 72 Friday, January 22, 2010
1
SC
SC
SC
5
4
3
2
1
1014 -SA
R671
R671
3D3V_S0_DAC
1
2
C467
C467
1 2
1 2
0R2J-2-GP
0R2J-2-GP
DIS
DIS
Imax = 300 mA
U33
U33
UMA_Muxless
UMA_Muxless
VIN
GND
EN3NC#4
G9091-330T11U-GP
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
2ND = 74.09198.G7F
2ND = 74.09198.G7F
R246
R246
0R0603-PAD
0R0603-PAD
VOUT
DIS
DIS
R185
R185
1 2
0R3J-0-U -GP
0R3J-0-U -GP
R192
R192
1 2
0R3J-0-U -GP
0R3J-0-U -GP
DIS
DIS
3D3V_S0 1D8V_S0
1 2
5
4
DY
DY
0R3J-0-U -GP
0R3J-0-U -GP
R247
R247
3D3V_S0_DAC
UMA_Muxless
UMA_Muxless
C469
C469
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
DY
DY
1130 -SC
1 2
C468
C468
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1D05V_S0
1.432A
1 2
1 2
C270
C270
C261
C261
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U6D3V2KX-GP
D D
1D05V_S0
1D05V_S0
42mA
1D05V_S0
C C
1D05V_S0
B B
3.062A
1 2
TC17
TC17
ST220U2D5VBM-2GP
ST220U2D5VBM-2GP
DY
DY
L16
L16
IND-1UH-2-GP
IND-1UH-2-GP
1D05V_S0
1 2
C256
C256
1 2
1 2
L15
L15
IND-1UH-2-GP
IND-1UH-2-GP
1 2
C226
C226
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
DY
DY
1 2
DY
DY
DY
DY
1130 -SC
1 2
C243
C243
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
3D3V_S0
C538
C538
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C185
C185
C253
C253
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
1 2
C241
C241
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
1 2
C237
C237
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.05VS_VCCAPLL_EXP
1 2
C518
C518
DY
DY
1 2
C224
C224
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C225
C225
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.05VS_VCCAPLL_FDI
1 2
1 2
C238
C238
C240
C240
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C273
C273
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
357mA
VCCAFDI_VRM
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PCH1G
PCH1G
AB24
AB26
AB28
AD26
AD28
AF26
AF28
AF30
AF31
AH26
AH28
AH30
AH31
AJ30
AJ31
AK24
BJ24
AN20
AN22
AN23
AN24
AN26
AN28
BJ26
BJ28
AT26
AT28
AU26
AU28
AV26
AV28
AW26
AW28
BA26
BA28
BB26
BB28
BC26
BC28
BD26
BD28
BE26
BE28
BG26
BG28
BH27
AN30
AN31
AN35
AT22
BJ18
AM23
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCIO
VCCAPLLEXP
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCC3_3
VCCVRM[1]
VCCFDIPLL
VCCIO
POWER
POWER
VCC CORE
VCC CORE
DMI
DMI
PCI E*
PCI E*
NAND / SPI
NAND / SPI
FDI
FDI
CRT LVDS
CRT LVDS
HVCMOS
HVCMOS
7 OF 10
7 OF 10
VCCADAC
VCCADAC
VSSA_DAC
VSSA_DAC
VCCALVDS
VSSA_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCC3_3
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCDMI
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCME3_3
VCCME3_3
VCCME3_3
VCCME3_3
AE50
AE52
AF53
AF51
AH38
AH39
AP43
AP45
AT46
AT45
AB34
UMA_Muxless
UMA_Muxless
AB35
AD35
AT24
AT16
AU16
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
AM8
AM9
AP11
AP9
+VCCA_DAC_1_2
1 2
R112
R112
0R2J-2-GP
0R2J-2-GP
DY
DY
+3VS_VCCA_LVD
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C192
C192
357mA
1 2
C220
C220
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SB 0811
196mA
1 2
C282
C282
1 2
C286
C286
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
85mA
1 2
C287
C287
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
R186
R186
0R3J-0-U -GP
0R3J-0-U -GP
+1.8VS_VCCTX_LVDS
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
C196
C196
UMA_Muxless
UMA_Muxless
3D3V_S0
+1.1VS_VCC_DMI
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
156mA
VCCME3_3
1 2
C175
C175
C174
C174
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
300mA
UMA_Muxless
UMA_Muxless
C215
C215
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1D5V_S0_1D8V_S0
0R0603-PAD
0R0603-PAD
1 2
R220
R220
1 2
R222 0R3J-0-U-GP
R222 0R3J-0-U-GP
+V_NVRAM_VCCQ
0R0603-PAD
0R0603-PAD
1 2
R248
R248
1130 -SC
1130 -SC
0R0603-PAD
0R0603-PAD
1 2
1 2
C181
C181
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
3D3V_S0
1 2
R198
R198
0R3J-0-U -GP
0R3J-0-U -GP
UMA_Muxless
UMA_Muxless
61mA
DY
DY
VCCPNAND which power the DC NAND interface must be powered even if dual channel
NAND interface is not connected since it also supplies power to other functions inside
PCH.
3D3V_S0
3D3V_S0_DAC 3D3V_S0
1D8V_S0
69mA
5V_S0
UMA_Muxless
UMA_Muxless
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1 2
R115
R115
59mA
SB 0811
+3VS_VCCA_LVD
+1.8VS_VCCTX_LVDS
1D05V_VTT
1D05V_S0
1130 -SC
1130 -SC
0113 -1
VCCAFDI_VRM
A A
5
1D8V_S0
1D5V_S0
4
R214
R214
1 2
0R0603-PAD
0R0603-PAD
R202
R202
1 2
0R0603-PAD
0R0603-PAD
1 2
DY
DY
R212
R212
0R3J-0-U -GP
0R3J-0-U -GP
1D5V_S0_1D8V_S0
1D5V_S0_1D8V_S0
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PCH (7/9)
PCH (7/9)
PCH (7/9)
HM42-CP
HM42-CP
HM42-CP
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
17 72 Friday, January 22, 2010
17 72 Friday, January 22, 2010
17 72 Friday, January 22, 2010
1
SC
SC
SC
5
1D05V_S0 +1.05VS_VCCA_CLK
52mA
1D05V_S0
R213 0R2J-2-GP
D D
VccLAN may be
grounded if Intel LAN is
disabled
HM42-CP SA
1D05V_S0
C C
B B
A A
L8
L8
1 2
IND-10UH-215-GP
IND-10UH-215-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
68.1001D.10E
68.1001D.10E
2ND = 68.10010.10T
2ND = 68.10010.10T
L9
L9
1 2
IND-10UH-215-GP
IND-10UH-215-GP
68.1001D.10E
68.1001D.10E
2ND = 68.10010.10T
2ND = 68.10010.10T
3D3V_S5
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
5
R213 0R2J-2-GP
1D05V_S0
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Inductance:10uH
current :125mA
+1.05VS_VCCA_A_DPL
C187
C187
1 2
DY
DY
+1.05VS_VCCA_B_DPL
C188
C188
1 2
DY
DY
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1D05V_S0
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C242
C242
1D05V_VTT
L7
L7
1 2
DY
DY
IND-10UH-30-GP
IND-10UH-30-GP
1 2
DY
DY
0R0402-PAD
0R0402-PAD
1130 -SC
1 2
C182
C182
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C183
C183
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C257
C257
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
3D3V_S0
0R0603-PAD
0R0603-PAD
1 2
R218
R218
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1130 -SC
RTC_AUX_S5
0R0603-PAD
0R0603-PAD
1 2
R223
R223
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R217
R217
1 2
C248
C248
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C281
C281
163mA
C265
C265
C262
C262
1.849A
C235
C235
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
68mA
69mA
C244
C244
1mA
1 2
C280
C280
2mA
1 2
C284
C284
4
1 2
C176
C176
DY
DY
+1.05VS_VCCLAN
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
C272
C272
C258
C258
1 2
C285
C285
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+VCCSST
+1.1VALW_INT_VCCSUS
1 2
1 2
C278
C278
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
0111 -1
+1.1VS_PCH_CPU_IO
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
+1.1VS_PCH_VCCRTC
1 2
C283
C283
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C177
C177
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
DCPSUSBYP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C266
C266
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
DY
DY
+VCCRTCEXT
1D5V_S0_1D8V_S0
1 2
C271
C271
C269
C269
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C277
C277
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH1J
PCH1J
AP51
VCCACLK
AP53
VCCACLK
AF23
VCCLAN
AF24
VCCLAN
Y20
DCPSUSBYP
AD38
VCCME
AD39
VCCME
AD41
VCCME
AF43
VCCME
AF41
VCCME
AF42
VCCME
V39
VCCME
V41
VCCME
V42
VCCME
Y39
VCCME
Y41
VCCME
Y42
VCCME
V9
DCPRTC
AU24
VCCVRM
BB51
VCCADPLLA
BB53
VCCADPLLA
BD51
VCCADPLLB
BD53
VCCADPLLB
AH23
VCCIO
AJ35
VCCIO
AH35
VCCIO
AF34
VCCIO
AH34
VCCIO
AF32
VCCIO
V12
DCPSST
Y22
DCPSUS
P18
VCCSUS3_3
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCSUS3_3
V15
VCC3_3
V16
VCC3_3
Y16
VCC3_3
AT18
V_CPU_IO
AU18
V_CPU_IO
A12
VCCRTC
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3
10 OF 10
HDA
HDA
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
V5REF
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCSATAPLL
VCCSATAPLL
VCCIO
VCCVRM
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCME
VCCME
VCCME
VCCME
VCCSUSHDA
3
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
POWER
POWER
USB
USB
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
SATA
SATA
CPU
CPU
RTC PCI/GPIO/LPC
RTC PCI/GPIO/LPC
2
1D05V_S0
1 2
C247
C247
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C233
C233
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+5VALW_PCH_VCC5REFSUS
+5VS_PCH_VCC5REF
1 2
C232
C232
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
C245
C245
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1124 -SC
3D3V_S5
C259
C259
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D05V_S0
1mA
3D3V_S5
3D3V_S5
2 1
1 2
C255
C255
SC1U10V2KX-1GP
SC1U10V2KX-1GP
D7
D7
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
2ND = 83.R2004.B8F
2ND = 83.R2004.B8F
3rd = 83.R3004.A8F
3rd = 83.R3004.A8F
1 2
R204 10R2J-2-GP R204 10R2J-2-GP
Intel check list update from 0.1uF to 1uF
3D3V_S0
1 2
C274
C274
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.05VS_VCCAPLL
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PCH_VCC_1_1_20
PCH_VCC_1_1_21
PCH_VCC_1_1_22
PCH_VCC_1_1_23
1 2
C234
C234
1 2
C566
C566
DY
DY
1D5V_S0_1D8V_S0
R177 0R0603-PAD R177 0R0603-PAD
1 2
R179 0R0603-PAD R179 0R0603-PAD
1 2
R178 0R0603-PAD R178 0R0603-PAD
1 2
R191 0R0603-PAD R191 0R0603-PAD
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C279
C279
1 2
C568
C568
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
6mA
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
L19
L19
1 2
DY
DY
IND-10UH-30-GP
IND-10UH-30-GP
1 2
C249
C249
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D05V_S0
+3VS_+1.5VS_HDA_IO
2
+3VS_+1.5VS_HDA_IO
UMA
UMA
UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1mA
3D3V_S0
32mA
5V_S5
1130 -SC 1130 -SC
1D05V_S0
1D05V_S0
0R0603-PAD
0R0603-PAD
1 2
R203
R203
3D3V_S0
2 1
D6
D6
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
2ND = 83.R2004.B8F
2ND = 83.R2004.B8F
3rd = 83.R3004.A8F
3rd = 83.R3004.A8F
1 2
C180
C180
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PCH ( 8/9 )
PCH ( 8/9 )
PCH ( 8/9 )
HM42-CP
HM42-CP
HM42-CP
1
5V_S0
1 2
R116 10R2J-2-GP R116 10R2J-2-GP
3D3V_S5
of
of
of
18 72 Friday, January 22, 2010
18 72 Friday, January 22, 2010
18 72 Friday, January 22, 2010
1
SC
SC
SC
5
D D
C C
B B
A A
5
PCH1H
PCH1H
AB16
VSS
AA19
VSS
AA20
VSS
AA22
VSS
AM19
VSS
AA24
VSS
AA26
VSS
AA28
VSS
AA30
VSS
AA31
VSS
AA32
VSS
AB11
VSS
AB15
VSS
AB23
VSS
AB30
VSS
AB31
VSS
AB32
VSS
AB39
VSS
AB43
VSS
AB47
VSS
AB5
VSS
AB8
VSS
AC2
VSS
AC52
VSS
AD11
VSS
AD12
VSS
AD16
VSS
AD23
VSS
AD30
VSS
AD31
VSS
AD32
VSS
AD34
VSS
AU22
VSS
AD42
VSS
AD46
VSS
AD49
VSS
AD7
VSS
AE2
VSS
AE4
VSS
AF12
VSS
Y13
VSS
AH49
VSS
AU4
VSS
AF35
VSS
AP13
VSS
AN34
VSS
AF45
VSS
AF46
VSS
AF49
VSS
AF5
VSS
AF8
VSS
AG2
VSS
AG52
VSS
AH11
VSS
AH15
VSS
AH16
VSS
AH24
VSS
AH32
VSS
AV18
VSS
AH43
VSS
AH47
VSS
AH7
VSS
AJ19
VSS
AJ2
VSS
AJ20
VSS
AJ22
VSS
AJ23
VSS
AJ26
VSS
AJ28
VSS
AJ32
VSS
AJ34
VSS
AT5
VSS
AJ4
VSS
AK12
VSS
AM41
VSS
AN19
VSS
AK26
VSS
AK22
VSS
AK23
VSS
AK28
VSS
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
4
8 OF 10
8 OF 10
4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
PCH1I
PCH1I
AY7
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B31
VSS
B35
VSS
B39
VSS
B43
VSS
B47
VSS
B7
VSS
BG12
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB24
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB42
VSS
BB49
VSS
BB5
VSS
BC10
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC32
VSS
BC36
VSS
BC40
VSS
BC44
VSS
BC52
VSS
BH9
VSS
BD48
VSS
BD49
VSS
BD5
VSS
BE12
VSS
BE16
VSS
BE20
VSS
BE24
VSS
BE30
VSS
BE34
VSS
BE38
VSS
BE42
VSS
BE46
VSS
BE48
VSS
BE50
VSS
BE6
VSS
BE8
VSS
BF3
VSS
BF49
VSS
BF51
VSS
BG18
VSS
BG24
VSS
BG4
VSS
BG50
VSS
BH11
VSS
BH15
VSS
BH19
VSS
BH23
VSS
BH31
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH47
VSS
BH7
VSS
C12
VSS
C50
VSS
D51
VSS
E12
VSS
E16
VSS
E20
VSS
E24
VSS
E30
VSS
E34
VSS
E38
VSS
E42
VSS
E46
VSS
E48
VSS
E6
VSS
E8
VSS
F49
VSS
F5
VSS
G10
VSS
G14
VSS
G18
VSS
G2
VSS
G22
VSS
G32
VSS
G36
VSS
G40
VSS
G44
VSS
G52
VSS
AF39
VSS
H16
VSS
H20
VSS
H30
VSS
H34
VSS
H38
VSS
H42
VSS
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3
9 OF 10
9 OF 10
H49
VSS
H5
VSS
J24
VSS
K11
VSS
K43
VSS
K47
VSS
K7
VSS
L14
VSS
L18
VSS
L2
VSS
L22
VSS
L32
VSS
L36
VSS
L40
VSS
L52
VSS
M12
VSS
M16
VSS
M20
VSS
N38
VSS
M34
VSS
M38
VSS
M42
VSS
M46
VSS
M49
VSS
M5
VSS
M8
VSS
N24
VSS
P11
VSS
AD15
VSS
P22
VSS
P30
VSS
P32
VSS
P34
VSS
P42
VSS
P45
VSS
P47
VSS
R2
VSS
R52
VSS
T12
VSS
T41
VSS
T46
VSS
T49
VSS
T5
VSS
T8
VSS
U30
VSS
U31
VSS
U32
VSS
U34
VSS
P38
VSS
V11
VSS
P16
VSS
V19
VSS
V20
VSS
V22
VSS
V30
VSS
V31
VSS
V32
VSS
V34
VSS
V35
VSS
V38
VSS
V43
VSS
V45
VSS
V46
VSS
V47
VSS
V49
VSS
V5
VSS
V7
VSS
V8
VSS
W2
VSS
W52
VSS
Y11
VSS
Y12
VSS
Y15
VSS
Y19
VSS
Y23
VSS
Y28
VSS
Y30
VSS
Y31
VSS
Y32
VSS
Y38
VSS
Y43
VSS
Y46
VSS
P49
VSS
Y5
VSS
Y6
VSS
Y8
VSS
P24
VSS
T43
VSS
AD51
VSS
AT8
VSS
AD47
VSS
Y47
VSS
AT12
VSS
AM6
VSS
AT13
VSS
AM5
VSS
AK45
VSS
AK39
VSS
AV14
VSS
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH ( 9/9 )
PCH ( 9/9 )
PCH ( 9/9 )
HM42-CP
HM42-CP
HM42-CP
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
19 72 Friday, January 22, 2010
19 72 Friday, January 22, 2010
19 72 Friday, January 22, 2010
1
SC
SC
SC
5
M_A_A[15..0] 6
0D75_S0
1 2
R545
R545
22R2F-1-GP
22R2F-1-GP
S3
D D
C C
B B
1016 -SA
PM_SLP_S3_CTL 8,13
DDR_VREF_S3
DDR_VREF_S3
Place these caps
close to VTT1 and
VTT2.
0R0603-PAD
0R0603-PAD
1 2
R296
R296
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
0R0603-PAD
0R0603-PAD
1 2
R299
R299
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
0D75_S0
HM42-CP NV Muxless SA 0918
1 2
C322
C322
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Q45
Q45
. .
. .
G
.
.
.
...
S
S3
S3
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
2ND = 84.2N702.E31
2ND = 84.2N702.E31
1 2
C324
C324
DY
DY
1130 -SC
1 2
C327
C327
DY
DY
1 2
C329
C329
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
S3
PM_SLP_S3_CTL_D1
D
M_VREF_CA_DIMM0
C325
C325
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
M_VREF_DQ_DIMM0
C328
C328
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
M_A_BS2 6
M_A_BS0 6
M_A_BS1 6
M_A_DQ[63..0] 6
M_A_DQS#[7..0] 6
M_A_DQS[7..0] 6
M_ODT0 6
M_ODT1 6
M_VREF_DQ_DIMM0 10
DDR3_DRAMRST# 16,21
M_VREF_CA_DIMM0
M_VREF_DQ_DIMM0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
4
H =8mm
DM1
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-240P-28-GP
DDR3-240P-28-GP
62.10017.R91
62.10017.R91
2ND = 62.10017.S01
2ND = 62.10017.S01
3rd = 62.10017.V61
3rd = 62.10017.V61
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_A_DM0
11
DM0
M_A_DM1
28
DM1
M_A_DM2
46
DM2
M_A_DM3
63
DM3
M_A_DM4
136
DM4
M_A_DM5
153
DM5
M_A_DM6
170
DM6
M_A_DM7
187
DM7
SODIMM0_1_SMB_DATA_R
200
SDA
SODIMM0_1_SMB_CLK_R
202
SCL
TS#_DIMM0
198
EVENT#
199
VDDSPD
NC#122
NC#125/TEST
REVERSE TYPE
NC#77
SA0_DIM0
197
SA0
SA1_DIM0
201
SA1
77
122
125
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
1D5V_S3
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_CS#0 6
M_CS#1 6
M_CKE0 6
M_CKE1 6
M_CLK_DDR0 6
M_CLK_DDR#0 6
M_CLK_DDR1 6
M_CLK_DDR#1 6
M_A_DM[7..0] 6
1209 -SC
R559
R559
1 2
0R0402-PAD
0R0402-PAD
1 2
C604
C604
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Layout Note:
Place these Caps near
SO-DIMMA.
1126 -SC
3
PM_EXTTS#0_R 5
C601
C601
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
SA0_DIM0
SA1_DIM0
R558 0R0402-PAD R558 0R0402-PAD
1 2
R557 0R0402-PAD R557 0R0402-PAD
1 2
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
1D5V_S3
3D3V_S0
1 2
R564
R564
10KR2J-3-GP
10KR2J-3-GP
DY
DY
12
1 2
R565
R565
R560
R560
10KR2J-3-GP
10KR2J-3-GP
1209 -SC
SODIMM A DECO UPLING
C314
C314
C315
C315
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
DY
DY
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
PCH_SMBDATA 3,12,21
PCH_SMBCLK 3,12,21
1 2
1 2
C317
C317
1 2
C352
C352
C319
C319
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1130 -SC
C346
C346
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C316
C316
C343
C343
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
DY
DY
2
1 2
1 2
C320
C320
C318
C318
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C347
C347
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
1
A A
Diserete N11M
Diserete N11M
Diserete N11M
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDRIII Socket DM1
DDRIII Socket DM1
DDRIII Socket DM1
HM42-CP
HM42-CP
HM42-CP
1
20 72 Friday, January 22, 2010
20 72 Friday, January 22, 2010
20 72 Friday, January 22, 2010
SC
SC
SC
of
of
of
5
M_B_A[15..0] 6
D D
C C
DDR_VREF_S3
0R0603-PAD
0R0603-PAD
1 2
R300
R300
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M_VREF_CA_DIMM1
1 2
DY
DY
C332
C333
C333
C332
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
M_B_BS2 6
M_B_BS0 6
M_B_BS1 6
M_B_DQ[63..0] 6
1130 -SC
DDR_VREF_S3
B B
HM42-CP NV Muxless SA 0918
0R0603-PAD
0R0603-PAD
1 2
R301
R301
C337
C337
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Place these caps
close to VTT1 and
VTT2.
DY
DY
M_VREF_DQ_DIMM1
1 2
C338
C338
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
0D75_S0
1 2
1 2
C336
C336
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_DQS#[7..0] 6
M_B_DQS[7..0] 6
M_ODT2 6
M_ODT3 6
M_VREF_DQ_DIMM1 10
DDR3_DRAMRST# 16,20
C331
C331
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed f arther from
the Processor than SO-DIMM A
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_VREF_CA_DIMM1
M_VREF_DQ_DIMM1
H = 4mm
4
DM2
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-97-GP
DDR3-204P-97-GP
62.10017.W11
62.10017.W11
2nd = 62.10017.V51
2nd = 62.10017.V51
3rd = 62.10017.M51
3rd = 62.10017.M51
1st and 2nd change
1st: 20.F1115.204 and 2nd:20.F1207.204
(use in lab stage)
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
SODIMM1_1_SMB_DATA_R
200
SDA
SODIMM1_1_SMB_CLK_R
202
SCL
TS#_DIMM1
198
EVENT#
199
VDDSPD
NC#/TEST
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
REVERSE TYPE
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
NC#1
NC#2
SA0_DIM1
197
SA0
SA1_DIM1
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
1126 -SC
1D5V_S3
M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6
M_CS#2 6
M_CS#3 6
M_CKE2 6
M_CKE3 6
M_CLK_DDR2 6
M_CLK_DDR#2 6
M_CLK_DDR3 6
M_CLK_DDR#3 6
M_B_DM[7..0] 6
1208 -SC
R572
R572
1 2
0R0402-PAD
0R0402-PAD
C340
C340
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
0113 -1
3
PM_EXTTS#1_R 5
DY
DY
C339
C339
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
R570 0R0402-PAD R570 0R0402-PAD
1 2
R568 0R0402-PAD R568 0R0402-PAD
1 2
1D5V_S3
3D3V_S0
SA1_DIM1
SA0_DIM1
PCH_SMBDATA 3,12,20
PCH_SMBCLK 3,12,20
1 2
R302
R302
10KR2J-3-GP
10KR2J-3-GP
2
3D3V_S0
1 2
1 2
DY
DY
R304
R304
10KR2J-3-GP
10KR2J-3-GP
R303
R303
10KR2J-3-GP
10KR2J-3-GP
1
SODIMM B DECO UPLING
1 2
C351
C351
1 2
1 2
C350
C350
C321
C321
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
1 2
C348
C348
C349
C349
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1130 -SC
C341
C341
C344
C312
C312
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C344
C345
C345
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C342
C342
C313
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
C313
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
1 2
DY
DY
A A
Diserete N11M
Diserete N11M
Diserete N11M
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDRIII Socket DM2
DDRIII Socket DM2
DDRIII Socket DM2
HM42-CP
HM42-CP
HM42-CP
1
21 72 Friday, January 22, 2010
21 72 Friday, January 22, 2010
21 72 Friday, January 22, 2010
SC
SC
SC
of
of
of