Acer Aspire 4738G Schematics lqv77

VER : 1A

5

4

3

2

1

BOM P/N

D D

Description

DDRIII-SODIMM1 DDRIII-SODIMM2

X'TAL

14.318MHz

SLG8LV595

CLOCK GENERATOR

C C

P14,15

P3

SATA - HDD

SATA - ODD

USB Port

USB/B Con. (USB Port x2)

Bluetooth Con.

B B

Cardreader

P31

AU6437-GBL

Cardreader control

P33

P31

ZQ9 SYSTEM BLOCK DIAGRAM

Dual Channel DDR III 800/1066 MHZ

SATA 0

P28

P9

SATA 1

BATTERY

P28

USB-1

USB-3/9/11

USB-4

USB-12

Azalia

FDI

CLK

SATA

Ibex Peak-M

USB

PCH

P8, 9, 10, 11, 12, 13

RTC

IHDA

Arrandale

rPGA 989

P4, 5, 6, 7

LPC

DMI

PCI-E x16

GFXIMC

DMI(x4)

INT_CRT INT_LVDS

Display

INT_HDMI

PCI-E x1

SPI

X'TAL

32.768KHz

X'TAL 25MHz

SPI ROM

ATI-Park

VRAM DDRIII 512MB

P16, 17, 18, 21, 22, 23

P9

PCIE-6 USB-13

PCIE-1

Channel B

EXT_HDMI

EXT_CRT EXT_LVDS

MINI CARD WLAN

BRM 57780

GIGA LAN

PS8101

LS

P27

P26

X'TAL 25MHz

ISL88731A

Batery Charger

64Mb * 16 *4 pc

P22

P24

EXT_HDMI

RJ45

UP6111AQDD

+1.05V

P36

USB-8

Int. MIC

CRT Con.

LVDS/CCD/MIC Con.

HDMI Con.

P26

P39

P23

P24

ISL62881HRZ-T

+VGFX_AXG

P41

Int. MIC

BOM Option Table

A A

Reference

IV@

EV@

VRAM@

* do not stuff

Description

for UMA only SKU for Discrete Graphic only SKU

for different VRAM parts

5

ALC272X

AUDIO CODEC

MIC JACK

P30

HP

P30

GMT 1453L amp

P29

Speaker

P30

4

K/B Con.

P34

NPCE781

EC

W25X40BVSSIG

SPI FLASH

P35

P37

Touch Pad Board Con.

3

P34

Fan Driver

(PWM Type)

P34

X'TAL

32.768KHz

RT8206B

3V/5V

ADP3212

CPU core

RT9018A

+1V

2

RT8207A

+1.5V_SUS

P37

MAX8792ETD+T

+VGPU_CORE

P38

P44

Size Document Number Rev

Date: Sheet of

HPA00835RTER

+1.8V

P40

Discharger

P42

Thermal Protection

Quanta Computer Inc.

PROJECT :

Block Diagram

1

ZQ9

P43

P44

1A

1 45Tuesday, June 22, 2010

1A

1

GPU PWR CTRL Option 1 (Default/ VDDR3 before VDDC)

+3.3V

2

VIN

3

+1.5V

4

+1.5V_SUS

5

+1.8V

6

7

8

+5V

dGPU_VRON

A A

VDDR3

MOS (AO3413)

+3_D (0.5A)

+3V_D

P22

VDDC

ISL6264

+VGPU_CORE (20A)

P44

PG_GPUIO_EN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

P47

PG_1.5V_EN

VDDR1

MOS (AO4710)

P43

+1.5V_GPU (10A)

PG_1.5V_EN

VDDR4

MOS (AO6402)

P43

+1.8V_GPU (3A)

PG_1.5V_EN

BJT

P22

dGPU_PWROK

dGPU_PWR_EN#

MOS

AO3413

+5_GPU

P22

GPU PWR CTRL Option 2 (VDDR3 after VDDR1)

VIN

VDDCI

ISL62872

P45

+VGPU_IO (4.5A)

PG_1V_EN

dGPU_VRON

VIN

VDDC

ISL6264

P44

+VGPU_CORE (20A)

Power States

POWER PLANE

B B

C C

VIN +VCCRTC +3VPCU +5VPCU +15V +3V_S5 +5V_S5 +5V

+1.5VSUS +0.75V_DDR_VTT +VGFX_AXG S0GFX_ONInternal GPU POWER +1.8V +1.5V +1.1V_VTT S0 +1.05V +VCC_CORE LCDVCC +5V_GPU +GPU_CORE +GPU_IO PG_GPUIO_EN+0.9V~+1.1V

VOLTAGE

+10V~+19V +3V~+3.3V +3.3V +5V +15V +3.3V +5V +5V +3.3V +1.5V +0.75V variation +1.8V +1.5V

+1.05V or +1.1V

+1.05V variation +3.3V +5V Discrete enableSWITCHABLE PWM IC POWER

DESCRIPTION

RTC POWER EC POWER CHARGE POWER CHARGE PUMP POWER LAN/BT/CIR POWER USB POWER HDD/ODD/Codec/TP/CRT/HDMI POWER PCH/GPU/Peripheral component POWER+3V CPU/SODIMM CORE POWER SODIMM Termination POWER

CPU/PCH/Braidwood POWER MINI CARD/NEW CARD POWER

PCH CORE POWER MAINON CPU CORE POWER LCD POWER

+1.5V

(DP PLL PWR)

+1V

G9334ADJ & MOS

+1V (3A)

CONTROL SIGNAL

ALWAYSMAIN POWER ALWAYS ALWAYS ALWAYS

S5_ON S5_ON MAINON MAINON SUSON MAINON

MAINON MAINON MAINONCPU VTT POWER

VRON LVDS_VDDEN

dGPU_PWR_EN#

PG_1.5V_EN+1.5V+1.5V_GPU

PG_1V_EN+1V+1V Discrete enableDP/PEG POWER

P47

PG_1.5V_EN

+1.5V_SUS

VDDR1

MOS (AO4710)

+1.5V_GPU (10A)

ACTIVE IN

ALWAYS ALWAYS ALWAYS ALWAYS ALWAYSALWAYS S0-S5 S0-S5 S0 S0 S0-S3 S0

S0 S0

S0 S0 S0

Discrete enable+3V_DGPU CORE POWER+0.9V~+1.1V Discrete enableGPU I/O POWER Discrete enableVRAM CORE POWER Discrete enableGPU_CRE/LVDS/PLL POWER +1.5V_GPU+1.8V+1.8V_GPU

+1.5V_GPU

P43

Thermal Follow Chart

CPU CORE PWR

+3.3V

VDDR3

MOS (AO3413)

P22

+3_D (0.5A)

+3V_DPG_GPUIO_EN

H_ORICHOT#

H/W Throttling

+1.8V

VDDR4

MOS (AO6402)

P43

+1.8V_GPU (3A)

NTC Thermal Protection

CPU

PCH

SM-Bus

EC

PG_1.5V_EN

BJT

P22

PM_THRMTRIP#

SML1ALERT#

CPUFAN#

dGPU_PWROK

SYS_SHDN#

WIRE-AND

dGPU_PWR_EN#

3V/5 V SYS PWR

FANFAN Driver

+5V

MOS

AO3413

+5_GPU

P22

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

PWR Status & GPU PWR CRL & THRM

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

ZQ9

1A

2 45Tuesday, June 22, 2010

8

1A

5

4

3

2

1

D D

L23 BLM18AG601SN1D/200mA/600ohm_6L23 BLM18AG601SN1D/200mA/600ohm_6

+3V

C C

B B

6/21 unstuff

L50 *PBY160808T-181Y-N/2A/180ohm_6L50 *PBY160808T-181Y-N/2A/180ohm_6

+1.5V

C267

+1.05V

C267

.1u/16V_4

R451

R451 *10K_4

*10K_4

R446

R446 10K_4

10K_4

C238

4.7u/10V_8

20mil

150mA(30mil)

C243

.1u/16V_4

C251

.1u/16V_4

CLK_ICH_14M<10>

C627

.1u/16V_4

+3V_CLK

+1.5V_CLK

C246

6/21 add for 3V CLK gen

.1u/16V_4

C614 33p/50V_4C614 33p/50V_4

C612 33p/50V_4C612 33p/50V_4

IDT: AL003197001 (ICS9LVS3197AKLFT) Realtek: AL000890000 (RTM890N-632-GRT) Silego: AL000595000 (SLG8LV595VTR)

SMBusCPU_CLK select

CPU_SEL

C617

C617 *10p/50V/COG_4

*10p/50V/COG_4

ICH_SMBDATA<10>

R565

0_6

R455 33_4R455 33_4

Y6

14.318MHz

CLK_SDATA CLK_SCLK

CPU_SEL

XTAL_IN XTAL_OUT

3

+3V

2

+3V

U20

1

VDD_DOT

17

VDD_SRC

24

VDD_CPU

5

VDD_27

29

VDD_REF

31

SDA

32

SCL

30

REF_0/CPU_SEL

28

XTAL_IN

27

XTAL_OUT

2

VSS_DOT

8

VSS_27

9

VSS_SATA

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

33

GND

ICS9LRS3197AKLFT

1

Q18

Q18 2N7002K

2N7002K

R543

2.2K_4

CLK_SDATA

VDD_SRC_I/O VDD_CPU_I/O

DOT_96

DOT_96#

27M

27M_SS

SRC_1/SATA

SRC_1#/SATA#

SRC_2

SRC_2#

*CPU_STOP#

CPU_1

CPU_1#

CPU_0

CPU_0#

CKPWRGD/PD#

CLK_SDATA <14,15,27>

15 18

3 4

R448 *EV@33_4R448 *EV@33_4

6

R447 *EV@33_4R447 *EV@33_4

7 10

11 13 14

R130 10K_4R130 10K_4

16 20

19 23 22

CK_PWRGD_R

25

+VDDIO_CLK

CLK_BUF_DREFCLK <10> CLK_BUF_DREFCLK# <10>

CLK_BUF_DREFSSCLK <10> CLK_BUF_DREFSSCLK# <10> CLK_BUF_PCIE_3GPLL <10> CLK_BUF_PCIE_3GPLL# <10>

CLK_BUF_BCLK <10> CLK_BUF_BCLK# <10>

80mA(20mil)

C613

C613 .1u/16V_4

.1u/16V_4

Place each 0.1uF cap as close as possible to each VDD IO pin. Place the 10uF caps on the VDD_IO plane.

C270 *EV@10p/50V_4C270 *EV@10p/50V_4

+3V

TP23TP23 TP24TP24

CLK Enable

VR_PWRGD_CK505#<38>

L48 PBY160808T/2A/180ohm_6L48 PBY160808T/2A/180ohm_6

C244

C607

.1u/16V_4

27M_CLK <17> 27M_CLK_SS <17>

C607 10u/Y5V_8

10u/Y5V_8

C609

C609 10u/Y5V_8

10u/Y5V_8

5/13 add for cost down solution

6/21 change the order

+3V

R545

R545 1K/F_4

1K/F_4

CK_PWRGD_R

3

Q19

Q19 2N7002K

2N7002K

2

R544

R544 100K/F_4

100K/F_4

+1.05V

R542

0 1

A A

CPU_SEL

CPU0/1=133MHz (default)

5

CPU0/1=100MHz

ICH_SMBCLK<10>

4

2

3

Q17

Q17 2N7002K

2N7002K

R542

2.2K_4

CLK_SCLK

1

3

CLK_SCLK <14,15,27>

Size Document Number Rev

Clock Generator

Date: Sheet of

2

Date: Sheet of

1

Quanta Computer Inc.

PROJECT :

ZQ9

3 45Tuesday, June 22, 2010

1

1A

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DMI,PEG,FDI)

U22A

FDI_FSYNC0_R FDI_FSYNC1_R

FDI_INT_R

FDI_LSYNC0_ R FDI_LSYNC1_ R

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

Clarksfield/Auburn dale

DMI Intel(R) FDI

PCI EXPRESS -- GRAPHICS

DMI_TXN0<8 > DMI_TXN1<8 > DMI_TXN2<8 > DMI_TXN3<8 >

D D

DMI_TXP0<8> DMI_TXP1<8> DMI_TXP2<8> DMI_TXP3<8>

DMI_RXN0<8> DMI_RXN1<8> DMI_RXN2<8> DMI_RXN3<8>

DMI_RXP0<8> DMI_RXP1<8> DMI_RXP2<8> DMI_RXP3<8>

FDI_TXN0<8> FDI_TXN1<8> FDI_TXN2<8> FDI_TXN3<8> FDI_TXN4<8> FDI_TXN5<8> FDI_TXN6<8> FDI_TXN7<8>

FDI_TXP0<8> FDI_TXP1<8> FDI_TXP2<8> FDI_TXP3<8> FDI_TXP4<8>

C C

FDI_TXP5<8> FDI_TXP6<8> FDI_TXP7<8>

B B

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX#[0] PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]

PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]

PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]

PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]

PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8]

PEG_TX#[9] PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14] PEG_TX#[15]

PEG_TX[0] PEG_TX[1] PEG_TX[2] PEG_TX[3] PEG_TX[4] PEG_TX[5] PEG_TX[6] PEG_TX[7] PEG_TX[8]

PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN1 0 PEG_RXN1 1 PEG_RXN1 2 PEG_RXN1 3 PEG_RXN1 4 PEG_RXN1 5

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

CPEG_TXN0 CPEG_TXN1 CPEG_TXN2 CPEG_TXN3 CPEG_TXN4 CPEG_TXN5 CPEG_TXN6 CPEG_TXN7 CPEG_TXN8 CPEG_TXN9 CPEG_TXN10 CPEG_TXN11 CPEG_TXN12 CPEG_TXN13 CPEG_TXN14 CPEG_TXN15

CPEG_TXP0 CPEG_TXP1 CPEG_TXP2 CPEG_TXP3 CPEG_TXP4 CPEG_TXP5 CPEG_TXP6 CPEG_TXP7 CPEG_TXP8 CPEG_TXP9 CPEG_TXP1 0 CPEG_TXP1 1 CPEG_TXP1 2 CPEG_TXP1 3 CPEG_TXP1 4 CPEG_TXP1 5

4

R436 4 9.9/F_4R436 49.9/F_ 4

R437 7 50/F_4R437 750 /F_4

C587 EV@0.1u/10V_4_X7RC587 EV@0.1u/10V_4_X 7R C565 EV@0.1u/10V_4_X7RC565 EV@0.1u/10V_4_X 7R C585 EV@0.1u/10V_4_X7RC585 EV@0.1u/10V_4_X 7R C563 EV@0.1u/10V_4_X7RC563 EV@0.1u/10V_4_X 7R C583 EV@0.1u/10V_4_X7RC583 EV@0.1u/10V_4_X 7R C561 EV@0.1u/10V_4_X7RC561 EV@0.1u/10V_4_X 7R C581 EV@0.1u/10V_4_X7RC581 EV@0.1u/10V_4_X 7R C559 EV@0.1u/10V_4_X7RC559 EV@0.1u/10V_4_X 7R C579 EV@0.1u/10V_4_X7RC579 EV@0.1u/10V_4_X 7R C557 EV@0.1u/10V_4_X7RC557 EV@0.1u/10V_4_X 7R

C555 EV@0.1u/10V_4_X7RC555 EV@0.1u/10V_4_X 7R C575 EV@0.1u/10V_4_X7RC575 EV@0.1u/10V_4_X 7R C594 EV@0.1u/10V_4_X7RC594 EV@0.1u/10V_4_X 7R C602 EV@0.1u/10V_4_X7RC602 EV@0.1u/10V_4_X 7R C608 EV@0.1u/10V_4_X7RC608 EV@0.1u/10V_4_X 7R

C586 EV@0.1u/10V_4_X7RC586 EV@0.1u/10V_4_X 7R C564 EV@0.1u/10V_4_X7RC564 EV@0.1u/10V_4_X 7R C584 EV@0.1u/10V_4_X7RC584 EV@0.1u/10V_4_X 7R C562 EV@0.1u/10V_4_X7RC562 EV@0.1u/10V_4_X 7R C582 EV@0.1u/10V_4_X7RC582 EV@0.1u/10V_4_X 7R C560 EV@0.1u/10V_4_X7RC560 EV@0.1u/10V_4_X 7R C580 EV@0.1u/10V_4_X7RC580 EV@0.1u/10V_4_X 7R C558 EV@0.1u/10V_4_X7RC558 EV@0.1u/10V_4_X 7R C578 EV@0.1u/10V_4_X7RC578 EV@0.1u/10V_4_X 7R C556 EV@0.1u/10V_4_X7RC556 EV@0.1u/10V_4_X 7R C576 EV@0.1u/10V_4_X7RC576 EV@0.1u/10V_4_X 7R C554 EV@0.1u/10V_4_X7RC554 EV@0.1u/10V_4_X 7R C574 EV@0.1u/10V_4_X7RC574 EV@0.1u/10V_4_X 7R C596 EV@0.1u/10V_4_X7RC596 EV@0.1u/10V_4_X 7R C606 EV@0.1u/10V_4_X7RC606 EV@0.1u/10V_4_X 7R C610 EV@0.1u/10V_4_X7RC610 EV@0.1u/10V_4_X 7R

PEG_RXN[0..15] <16>

Use reverse type (at GPU side)

PEG_RXP[0..15] <16>

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXN[0..15] <16>

PEG_TXP[0 ..15] <16>

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (CLK,MISC,JTAG)

DPLL_REF_SSCLK and DPLL_REF_SSCLK# can be connected to GND on Arrandale directly if motherboard only supports discrete graphics. If motherboard supports

Processor Compensation Signals

R444 20/F_4R444 20/F_4 R442 2 0/F_4R442 20/F_4 R173 4 9.9/F_4R173 49.9/F_ 4 R440 49.9/F_4R440 49.9/F_4

H_PECI<11>

H_PROCHOT#<38>

PM_THRMTRIP#<11>

PM_SYNC<8>

H_PWRGOOD<11>

PM_DRAM_P WRGD<8>

PLTRST#<10,11,25,27,31,35>

FDI_FSYNC0<8 > FDI_FSYNC1<8 >

FDI_INT<8>

FDI_LSYNC0<8> FDI_LSYNC1<8>

R157 IV@0_4R157 IV@0_4 R161 IV@0_4R161 IV@0_4

R171 IV@0_4R171 IV@0_4 R152 IV@0_4R152 IV@0_4

R167 IV@0_4R167 IV@0_4 R156 EV@1K_4R156 EV@1K_4

R160 EV@1K_4R160 EV@1K_4 R170 EV@1K_4R170 EV@1K_4 R151 EV@1K_4R151 EV@1K_4 R166 EV@1K_4R166 EV@1K_4

R193 1 .5K/F_4R19 3 1.5 K/F_4

H_COMP3 H_COMP2 H_COMP1 H_COMP0

T10T10

H_CATERR#

H_PROCHOT#

H_CPURST# XDP_TMS

H_VTTPWRGD

T14T14

CPU_PLTRST#

FDI_FSYNC0_R FDI_FSYNC1_R

FDI_INT_R FDI_LSYNC0_ R

FDI_LSYNC1_ R

R196

R196 750/F_4

750/F_4

U22B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

Clarksfield/Auburn dale

MISC THERMAL

BCLK_ITP#

PEG_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

SM_DRAMRST#

SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]

PM_EXT_TS#[0] PM_EXT_TS#[1]

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

JTAG & BPM

integrated graphics but without eDP, these pins can also be connected to GND directly.

BCLK

BCLK#

BCLK_ITP

PEG_CLK

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]

TCK TMS

TDI

TDO

A16 B16

AR30 AT30

E16 D16

DPLL_REF_SSCLK_R

A18

DPLL_REF_SSCLK#_R

A17

F6

SM_RCOMP_ 0

AL1

SM_RCOMP_ 1

AM1

SM_RCOMP_ 2

AN1 AN15

AP15

AT28

XDP_PREQ #

AP27

XDP_TCLK

AN28 AP28

XDP_TRST#

AT27

XDP_TDI_R

AT29

XDP_TDO_R

AR27

XDP_TDI_M

AR29

XDP_TDO_M

AP29

H_DBR#_R

AN25

XDP_OBS0

AJ22

XDP_OBS1

AK22

XDP_OBS2

AK24

XDP_OBS3

AJ24

XDP_OBS4

AJ25

XDP_OBS5

AH22

XDP_OBS6

AK23

XDP_OBS7

AH23

T62T62 T67T67

T20T20

T21T21

DDR3_DRAMRS T# <14,15>

R254 100/F_4R254 100/F_4 R253 24.9/F_4R253 24.9/F_4 R252 130/F_4R252 130/F_4

R187 1 0K_4R187 10 K_4 R183 1 0K_4R183 10 K_4

T68T68 T69T69

T8T8 T9T9 T71T71

T70T70 T66T66 T65T65 T64T64

R149 *Short_4R149 *Short_4

T19T19 T18T18 T17T17 T13T13 T11T11 T15T15 T16T16 T12T12C577 EV@0.1u/10V_4_X7RC577 EV@0.1u/10V_4_X 7R

CLK_CPU_BCLK <11> CLK_CPU_BCLK# <11>

CLK_PCIE_3GPLL <10> CLK_PCIE_3GPLL# <10>

R465 *IV@0_4R46 5 *IV@0_4 R471 *IV@0_4R47 1 *IV@0_4 R472 0_4R472 0_4 R463 0_4R463 0_4

PM_EXTTS#0 <14>

+1.05V

PM_EXTTS#1 <15>

XDP_DBRST# <8>

DPLL_REF_SSCLK <10> DPLL_REF_SSCLK# <10>

Layout Note: Place these resistors near Processor

<The GFX_IMON, FDI_FSYNC[0], FDI_FSYNC[1], FDI_LSYNC[0], FDI_LSYNC[1], and FDI_INT>Note that if these signals are left as no connect, there are no functional impacts, but a small amount of power (~15 mW) maybe wasted.

Thermaltrip protect

+1.05V

6/14 change the P/N

3

Q16

PM_THRMTRIP#

2

1 3

FDV301N

1

R209

R209 1K_4

1K_4

2

Q15

Q15 MMBT3904

MMBT3904

SYS_SHDN# <37,44>

4

DELAY_VR_ PWRGOOD<8,38>

A A

PM_THRMTRIP#<11>

5

VTT PWR_Good

MPWROK<35>

+3V

C309

0.1u/10V _4

R176

3 5

4

U5 TC7SH08FUU5TC7SH08FU

R176

2K/F_4

3

H_VTTPWRGD

R179

R179 1K_4

1K_4

2 1

Processor pull-up

+1.5VSUS

R205

1.1K/F_4

R199

R199 3K/F_4

3K/F_4

5/13 follow ZR7B setting

XDP_TDO

R420 5 1/F_4R420 51/F_4

H_CATERR#

R192 4 9.9/F_4R192 49.9/F_ 4

H_PROCHOT#

R137 6 8_4R137 6 8_4

H_CPURST#

R438 *68_4R438 *68_4

XDP_TMS

R135 *5 1_4R135 *51_4

XDP_TDI_R

R435 *5 1_4R435 *51_4

XDP_PREQ #

R434 *5 1_4R434 *51_4

XDP_TCLK

R133 *5 1_4R133 *51_4

XDP_TRST#

R439 51/F_4R439 51/F_4

Use a voltage divider with VDDQ (1.5V) rail (ON in S3) and resistor combination of 4.75K (to

PM_DRAM_P WRGD

VDDQ)/12K(to GND) to generate the required voltage. Note: CRB uses a 3.3V (always ON) rail with 2K and 1K combination.

+1.05V

2

JTAG MAPPING

XDP_TDI_R XDP_TDI XDP_TDO_M

XDP_TDI_M XDP_TDO_R

Scan Chain (Default)

CPU Only

GMCH Only

Size Document Number Rev

Date: Sheet of

5/13 follow ZR7B setting

R433 0_4R433 0_4 R429 *0_4R429 *0_4

R431

R431 0_4

0_4

R432 *0_4R432 *0_4 R430 0_4R430 0_4

STUFF -> R469, R491, R507 NO STUFF -> R489, R490

STUFF -> R490, R491 NO STUFF -> R469, R489, R507

STUFF -> R489, R507 NO STUFF -> R491, R490, R469

Quanta Computer Inc.

PROJECT :

AUBURNDA 1/4

1

XDP_TDO

ZQ9

4 45Tuesday, June 22, 201 0

1A

5

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U22C

M_A_DQ[63:0]<14>

D D

C C

B B

M_A_BS#0<14> M_A_BS#1<14> M_A_BS#2<14>

M_A_CAS#<14> M_A_RAS#<14> M_A_WE#<14>

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10 AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11

AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14

AP14

AC3 AB2

AE1 AB3 AE9

A10

SA_DQ[0] SA_DQ[1]

C7

SA_DQ[2]

A7

SA_DQ[3]

B10

SA_DQ[4] SA_DQ[5]

E10

SA_DQ[6]

A8

SA_DQ[7]

D8

SA_DQ[8]

F10

SA_DQ[9]

E6

SA_DQ[10]

F7

SA_DQ[11]

E9

SA_DQ[12]

B7

SA_DQ[13]

E7

SA_DQ[14]

C6

SA_DQ[15] SA_DQ[16]

G8

SA_DQ[17]

K7

SA_DQ[18]

J8

SA_DQ[19]

G7

SA_DQ[20] SA_DQ[21]

J7

SA_DQ[22]

J10

SA_DQ[23]

L7

SA_DQ[24]

M6

SA_DQ[25]

M8

SA_DQ[26]

L9

SA_DQ[27]

L6

SA_DQ[28]

K8

SA_DQ[29]

N8

SA_DQ[30]

P9

SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37]

AJ7

SA_DQ[38]

AJ6

SA_DQ[39] SA_DQ[40]

AJ9

SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44]

AL7

SA_DQ[45] SA_DQ[46]

AL8

SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53]

U7

SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]

SA_BS[0] SA_BS[1] SA_BS[2]

SA_CAS# SA_RAS# SA_WE#

DDR SYSTEM MEMORY A

4

SA_CK[0] SA_CK#[0] SA_CKE[0]

SA_CK[1] SA_CK#[1] SA_CKE[1]

SA_CS#[0] SA_CS#[1]

SA_ODT[0] SA_ODT[1]

SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]

SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]

SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]

SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]

SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]

AA6 AA7 P7

Y6 Y5 P6

AE2 AE8

AD8 AF9

B9 D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_CLK0 <14> M_A_CLK0# <14> M_A_CKE0 <14>

M_A_CLK1 <14> M_A_CLK1# <14> M_A_CKE1 <14>

M_A_CS#0 <14> M_A_CS#1 <14>

M_A_ODT0 <14> M_A_ODT1 <14>

M_A_DM[7:0] <14>

M_A_DQS#[7:0] <14>

M_A_DQS[7:0] <14>

M_A_A[15:0] <14>

3

M_B_DQ[63:0]<15>

M_B_BS#0<15> M_B_BS#1<15> M_B_BS#2<15>

M_B_CAS#<15> M_B_RAS#<15> M_B_WE#<15>

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AG1

AG4 AG3

AH4

AM6 AN2

AM4 AM3

AN5 AN6

AN4 AN3

AN7

AR10 AT10

AC5 AC6

AF3

AJ3

AK1

AJ4

AK3 AK4

AK5 AK2

AP3 AT4

AT5 AT6

AP6 AP8 AT9 AT7 AP9

AB1

B5 A5

C3

B3 E4 A6

A4 C4 D1 D2

F2

F1 C2

F5

F3 G4 H6 G2

J6

J3 G1 G5

J2

J1

J5

K2

L3 M1

K5

K4 M4 N5

W5 R7

Y7

U22D

SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]

SB_BS[0] SB_BS[1] SB_BS[2]

SB_CAS# SB_RAS# SB_WE#

2

W8

SB_CK[0]

W9

SB_CK#[0]

M3

SB_CKE[0]

V7

SB_CK[1]

V6

SB_CK#[1]

M2

SB_CKE[1]

AB8

SB_CS#[0]

AD6

SB_CS#[1]

AC7

SB_ODT[0]

AD1

SB_ODT[1]

M_B_DM0

D4

SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]

SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]

SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]

DDR SYSTEM MEMORY - B

SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]

SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]

E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

1

M_B_CLK0 <15> M_B_CLK0# <15> M_B_CKE0 <15>

M_B_CLK1 <15> M_B_CLK1# <15> M_B_CKE1 <15>

M_B_CS#0 <15> M_B_CS#1 <15>

M_B_ODT0 <15> M_B_ODT1 <15>

M_B_DM[7:0] <15>

M_B_DQS#[7:0] <15>

M_B_DQS[7:0] <15>

M_B_A[15:0] <15>

Clarksfield/Auburndale

Channel A DQ[15,32,48,54], DM[5] Requires minimum 12mils spacing with all other signals, including data signals.

A A

5

4

3

Channel B DQ[16,18,36,42,56,57,60,61,62] Requires minimum 12mils spacing with all other signals, including data signals.

Clarksfield/Auburndale

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 2/4

Date: Sheet of

PROJECT :

ZQ9

5 45Tuesday, June 22, 2010

1

1A

5

U22F

CPU Core Power

ARD:48A

5/27 cost down

D D

C C

B B

A A

CFD:52A

C568 10U/6.3V_8C568 10U/6.3V_8 C626 22U/6.3V_8C626 22U/6.3V_8 C234 10U/6.3V_8C234 10U/6.3V_8 C589 22U/6.3V_8C589 22U/6.3V_8 C623 22U/6.3V_8C623 22U/6.3V_8 C643 10U/6.3V_8C643 10U/6.3V_8 C642 10U/6.3V_8C642 10U/6.3V_8 C590 22U/6.3V_8C590 22U/6.3V_8 C567 22U/6.3V_8C567 22U/6.3V_8 C640 10U/6.3V_8C640 10U/6.3V_8 C230 10U/6.3V_8C230 10U/6.3V_8 C588 22U/6.3V_8C588 22U/6.3V_8 C235 10U/6.3V_8C235 10U/6.3V_8 C569 10U/6.3V_8C569 10U/6.3V_8 C297 10U/6.3V_8C297 10U/6.3V_8 C624 10U/6.3V_8C624 10U/6.3V_8 C621 10U/6.3V_8C621 10U/6.3V_8 C638 10U/6.3V_8C638 10U/6.3V_8 C625 10U/6.3V_8C625 10U/6.3V_8 C566 10U/6.3V_8C566 10U/6.3V_8 C622 10U/6.3V_8C622 10U/6.3V_8 C266 10U/6.3V_8C266 10U/6.3V_8 C265 10U/6.3V_8C265 10U/6.3V_8 C236 10U/6.3V_8C236 10U/6.3V_8 C641 10U/6.3V_8C641 10U/6.3V_8 C287 10U/6.3V_8C287 10U/6.3V_8 C232 10U/6.3V_8C232 10U/6.3V_8 C633 10U/6.3V_8C633 10U/6.3V_8 C275 0.1u/10V_4_X7RC275 0.1u/10V_4_X7R C271 0.1u/10V_4_X7RC271 0.1u/10V_4_X7R

C284 330u/2V_7343

C284 330u/2V_7343 C285 330u/2V_7343

C285 330u/2V_7343

6/21 stuff

+VCC_CORE

+

U22F

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26

AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27 AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

Y35 Y34 Y33 Y32 Y31 Y30 Y29 Y28 Y27 Y26 V35 V34 V33 V32 V31 V30 V29 V28 V27 V26 U35 U34 U33 U32 U31 U30 U29 U28 U27 U26 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 P35 P34 P33 P32 P31 P30 P29 P28 P27 P26

Clarksfield/Auburndale

VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71 VCC72 VCC73 VCC74 VCC75 VCC76 VCC77 VCC78 VCC79 VCC80 VCC81 VCC82 VCC83 VCC84 VCC85 VCC86 VCC87 VCC88 VCC89 VCC90 VCC91 VCC92 VCC93 VCC94 VCC95 VCC96 VCC97 VCC98 VCC99 VCC100

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

4

VTT Rail Values are Auburndal VTT=1.05V Clarksfield VTT=1.1V

C316

+

330u/2V_7343

18A

5/27 cost down

+1.05V

H_PSI# <38>

H_VID0 <38> H_VID1 <38> H_VID2 <38> H_VID3 <38> H_VID4 <38> H_VID5 <38> H_VID6 <38> H_DPRSLPVR <38>

I_MON <38>

+VCC_CORE

T75T75 T74T74

VCCSENSE <38> VSSSENSE <38>

AH14

VTT0_1

AH12

VTT0_2

AH11

VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8

VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31

1.1V RAIL POWER

VTT0_32

VTT0_33

CPU VIDS

SENSE LINES

VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

PROC_DPRSLPVR

VTT_SELECT

ISENSE

VCC_SENSE VSS_SENSE

VTT_SENSE

VSS_SENSE_VTT

PSI#

CPU CORE SUPPLY

POWER

4

C658 10U/6.3V_8C658 10U/6.3V_8

AH10

C657 10U/6.3V_8C657 10U/6.3V_8

J14

C634 10U/6.3V_8C634 10U/6.3V_8

J13

C327 10U/6.3V_8C327 10U/6.3V_8

H14

C648 10U/6.3V_8C648 10U/6.3V_8

H12

C649 10U/6.3V_8C649 10U/6.3V_8

G14

C644 10U/6.3V_8C644 10U/6.3V_8

G13

C659 10U/6.3V_8C659 10U/6.3V_8

G12

C652 10U/6.3V_8C652 10U/6.3V_8

G11

C331 10U/6.3V_8C331 10U/6.3V_8

F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10

C313 22U/6.3V_8C313 22U/6.3V_8

AB10 Y10

C326 22U/6.3V_8C326 22U/6.3V_8

W10 U10 T10 J12 J11 J16 J15

H_PSI#

AN33

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35

H_DPRSLPVR

AM34

G15

H_VTTVID1=Low, 1.1V H_VTTVID1=High, 1.05V

AN35

R104 100/F_4R104 100/F_4

AJ34 AJ35

R103 100/F_4R103 100/F_4

VTT_SENSE

B15

VSS_SENSE_VTT

A15

+1.05V

3

2

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U22G

+VGFX_AXG

5/27 cost down

+

C635

*IV@330U/2V_7343

5/27 cost down

+

C651

*IV@330U/2V_7343

+1.05V

5/27 cost down

C332

C332 10U/6.3V_8

10U/6.3V_8

22A

C280

C281

IV@22u/6.3V_8

C299

C655

C655 22u/6.3V_8

22u/6.3V_8

C312

C312 22u/6.3V_8

22u/6.3V_8

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6 H_DPRSLPVR H_PSI#

C299

IV@10u/6.3V_8

R153

EV@1K_4

C330

C330 22u/6.3V_8

22u/6.3V_8

R388 1K_4R388 1K_4 R395 *1K/F_4R395 *1K/F_4 R387 1K_4R387 1K_4 R394 *1K/F_4R394 *1K/F_4 R389 1K_4R389 1K_4 R396 *1K/F_4R396 *1K/F_4 R400 *1K/F_4R400 *1K/F_4 R409 1K_4R409 1K_4 R401 *1K/F_4R401 *1K/F_4 R410 1K_4R410 1K_4 R404 1K_4R404 1K_4 R413 *1K/F_4R413 *1K/F_4 R402 *1K/F_4R402 *1K/F_4 R411 1K_4R411 1K_4 R403 1K_4R403 1K_4 R412 *1K/F_4R412 *1K/F_4 R419 *1K/F_4R419 *1K/F_4 R418 1K_4R418 1K_4

C298

IV@10u/6.3V_8

C311

C311 10U/6.3V_8

10U/6.3V_8

C656

C656 10U/6.3V_8

10U/6.3V_8

1

0

1

0

1

0

Note: For Validating IMVP VR R6451 should be STUFF and R2N1 NO_STUFF

U22G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield/Auburndale

HFM_VID : Max 1.4V LFM_VID : Min 0.65V

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3]

GFX_DPRSLPVR

GRAPHICS VIDs

DDR3 - 1.5V RAILS

1.1V1.8V

GFX_VID[4] GFX_VID[5] GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18

VTT0_59 VTT0_60 VTT0_61 VTT0_62

VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68

VCCPLL1 VCCPLL2 VCCPLL3

GRAPHICS

FDI PEG & DMI

POWER

+1.05V

2

1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

AR25 AT25 AM24

R147 EV@1K_4R147 EV@1K_4

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10

C660 10U/6.3V_8C660 10U/6.3V_8

L10

C654 10U/6.3V_8C654 10U/6.3V_8

K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

Size Document Number Rev

Date: Sheet of

T72T72

VCC_AXG_SENSE <41> VSS_AXG_SENSE <41>

T73T73

GFX_VID0 <41> GFX_VID1 <41> GFX_VID2 <41> GFX_VID3 <41> GFX_VID4 <41> GFX_VID5 <41> GFX_VID6 <41>

GFX_ON <41> GFX_DPRSLPVR <41> GFX_IMON <41>

C356

C355

1U/6.3V_4

C360

C360 22U/6.3V_8

22U/6.3V_8

+1.05V

C355 1U/6.3V_4

1U/6.3V_4

C358

C358 1U/6.3V_4

1U/6.3V_4

C417

C417 1U/6.3V_4

1U/6.3V_4

5/27 cost down

C61810U/6.3V_8 C61810U/6.3V_8 C63010U/6.3V_8 C63010U/6.3V_8

0.6A

+1.8V

C25822U/6.3V_8 C25822U/6.3V_8 C2744.7U/6.3V_6 C2744.7U/6.3V_6 C2312.2U/6.3V_6 C2312.2U/6.3V_6 C2331U/6.3V_4 C2331U/6.3V_4 C2391U/6.3V_4 C2391U/6.3V_4

Quanta Computer Inc.

PROJECT :

AUBURNDA 3/4 (PWR)

1

C357

C357 22U/6.3V_8

22U/6.3V_8

ARD:3A CFD:6A

C352

C352 1U/6.3V_4

1U/6.3V_4

ZQ9

+

C363

C363 330U/2V_7343

330U/2V_7343

6 45Tuesday, June 22, 2010

+1.5VSUS

1A

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U22H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

VSS9

AR15

VSS10

D D

C C

B B

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

Clarksfield/Auburndale

VSS

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

Processor Strapping

CFG0 (PCI-Epress Configuration Select)

CFG3 (PCI-Epress Static Lane Reversal)

A A

5

CFG4 (Embended Display Port Presence)

T s

h I

p

e a

n

e c

n

t

c

C o

d

e

i

l m

l

f

a p

B

i

r o

G

r

c

k n

A

e

U22I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

Clarksfield/Auburndale

VSS

Single PEG

Normal Operation Lane Numbers Reversed

Disabled; No Physical Display Port attached to Embedded Diplay Port

4

AT35

VSS_NCTF1

AT1

VSS_NCTF2

AR34

VSS_NCTF3

B34

VSS_NCTF4

B2

VSS_NCTF5

B1

VSS_NCTF6

A35

VSS_NCTF7

NCTF

TP20TP20 TP22TP22 TP34TP34

1 0

Bifurcation enabled

Enabled; An external Display port device is connected to the Embedded Display port

U22E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

CFG0

CFG3 CFG4

CFG7

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Clarksfield/Auburndale

VREF_DQ_DIMM0<14> VREF_DQ_DIMM1<15>

TP25TP25 TP26TP26

RESERVED

RSVD_NCTF_37

RSVD_NCTF_40 RSVD_NCTF_41

RSVD_NCTF_42 RSVD_NCTF_43

RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57

RSVD_TP_59 RSVD_TP_60

RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75

RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85

AJ13

RSVD32

AJ12

RSVD33

AH25

RSVD34

AK26

RSVD35

AL26

RSVD36

AR2 AJ26

RSVD38

AJ27

RSVD39

AP1 AT2

AT3 AR1

AL28

RSVD45

AL29

RSVD46

AP30

RSVD47

AP32

RSVD48

AL27

RSVD49

AT31

RSVD50

AT32

RSVD51

AP33

RSVD52

AR33

RSVD53

AT33 AT34 AP35 AR35 AR32

RSVD58

E15 F15 A2

KEY

D15

RSVD62

C15

RSVD63

AJ15

RSVD64 RSVD65

VSS

TP8TP8

AH15

TP9TP9

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

TP19TP19

AP34 can be NC on CRB; EDS/DG suggestion to GND

DEFAULT

CFG0

1

3

R128 *3.01K_NCR128 *3.01K_NC

CFG3

R125 3.01K/F_4R125 3.01K/F_4

CFG4

R127 *3.01KR127 *3.01K

CFG7

R126 *3.01K/F_4R126 *3.01K/F_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

AUBURNDA 4/4

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZR7B

1A

7 45Tuesday, June 22, 2010

1

7 45Tuesday, June 22, 2010

1A

5

IBEX PEAK-M (DMI,FDI,GPIO)

4

3

2

1

AC-coupling CAP place close to PCH

U21C

ACIN_R

PM_BATLOW#

PM_RI#

BC24

BJ22

AW20

BJ20

BD24 BG22 BA20 BG20

BE22 BF21 BD20 BE18

BD22 BH21 BC20 BD18

BH25 BF25

T6

M6

B17

K5

A10

D9

C16

M1

P5

P7

A6

F14

IbexPeak-M_R1P0

DMI_RXN0<4>

SYS_PWROK

ICH_RSMRST#<35>

DNBSWON#<35>

PCH_ACIN<35>

DMI_RXN1<4> DMI_RXN2<4> DMI_RXN3<4>

DMI_RXP0<4> DMI_RXP1<4> DMI_RXP2<4> DMI_RXP3<4>

DMI_TXN0<4> DMI_TXN1<4> DMI_TXN2<4> DMI_TXN3<4>

DMI_TXP0<4> DMI_TXP1<4> DMI_TXP2<4> DMI_TXP3<4>

+1.05V

R441 49.9/F_4R441 49.9/F_4

XDP_DBRST#

RSV_ICH_LAN_RST#

SUS_PWR_ACK_R

R246 *0_4R246 *0_4

D D

C C

XDP_DBRST#<4>

PM_DRAM_PWRGD<4>

B B

0-ohm resistor place close to PCH

DMI0RXN DMI1RXN DMI2RXN DMI3RXN

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DMI0TXN DMI1TXN DMI2TXN DMI3TXN

DMI0TXP DMI1TXP DMI2TXP DMI3TXP

DMI_ZCOMP DMI_IRCOMP

SYS_RESET#

SYS_PWROK

PWROK

MEPWROK

LAN_RST#

DRAMPWROK

RSMRST#

SUS_PWR_DN_ACK / GPIO30

PWRBTN#

ACPRESENT / GPIO31

BATLOW# / GPIO72

RI#

System Power Management

DMI

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI

FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

WAKE#

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN# / GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14 BF13 BH13 BJ12 BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_TXN0_R FDI_TXN1_R FDI_TXN2_R FDI_TXN3_R FDI_TXN4_R FDI_TXN5_R FDI_TXN6_R FDI_TXN7_R

FDI_TXP0_R FDI_TXP1_R FDI_TXP2_R FDI_TXP3_R FDI_TXP4_R FDI_TXP5_R FDI_TXP6_R FDI_TXP7_R

R234 *Short_4R234 *Short_4

SLP_M#

PM_SLP_LAN#

R454 IV@0_4R454 IV@0_4 R470 IV@0_4R470 IV@0_4 R481 IV@0_4R481 IV@0_4 R487 IV@0_4R487 IV@0_4 R464 IV@0_4R464 IV@0_4 R480 IV@0_4R480 IV@0_4 R500 IV@0_4R500 IV@0_4 R495 IV@0_4R495 IV@0_4

R459 IV@0_4R459 IV@0_4 R475 IV@0_4R475 IV@0_4 R478 IV@0_4R478 IV@0_4 R491 IV@0_4R491 IV@0_4 R461 IV@0_4R461 IV@0_4 R484 IV@0_4R484 IV@0_4 R498 IV@0_4R498 IV@0_4 R493 IV@0_4R493 IV@0_4

R225 *0_4R225 *0_4

ICH_SUSCLK <35>

TP32TP32

TP18TP18

FDI_TXN0 <4> FDI_TXN1 <4> FDI_TXN2 <4> FDI_TXN3 <4> FDI_TXN4 <4> FDI_TXN5 <4> FDI_TXN6 <4> FDI_TXN7 <4>

FDI_TXP0 <4> FDI_TXP1 <4> FDI_TXP2 <4> FDI_TXP3 <4> FDI_TXP4 <4> FDI_TXP5 <4> FDI_TXP6 <4> FDI_TXP7 <4>

FDI_INT <4> FDI_FSYNC0 <4> FDI_FSYNC1 <4> FDI_LSYNC0 <4> FDI_LSYNC1 <4>

PCIE_WAKE# <25,27>

CLKRUN# <35>

SUSC# <35>

SUSB# <35>

PM_SYNC <4>

INT_LVDS_BLON<23>

INT_LVDS_DIGON<23>

INT_LVDS_BRIGHT<23>

INT_LVDS_EDIDCLK<23> INT_LVDS_EDIDDATA<23>

INT_TXLCLKOUT-<23>

INT_TXLCLKOUT+<23>

INT_TXLOUT0-<23>

INT_TXLOUT1-<23>

INT_TXLOUT2-<23>

INT_CRT_BLU<23> INT_CRT_GRN<23> INT_CRT_RED<23>

INT_CRT_DDCCLK<23> INT_CRT_DDCDAT<23>

INT_HSYNC<23>

INT_VSYNC<23>

+3V

INT_TXLOUT0+<23>

INT_TXLOUT1+<23>

INT_TXLOUT2+<23>

R119 IV@10K_4R119 IV@10K_4 R120 IV@10K_4R120 IV@10K_4

R144 IV@2.37K/F_4R144 IV@2.37K/F_4

R111 IV@0_4R111 IV@0_4 R112 IV@0_4R112 IV@0_4

INT_TXLCLKOUTINT_TXLCLKOUT+

INT_TXLOUT0INT_TXLOUT1INT_TXLOUT2-

INT_TXLOUT0+ INT_TXLOUT1+ INT_TXLOUT2+

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

DAC_IREF

R134

R134 1K/F_4

1K/F_4

IBEX PEAK-M (LVDS,DDI)

U21D

AB48

AB46

AP39 AP41

AT43 AT42

AV53 AV51

BB47 BA52 AY48 AV47

BB48 BA50 AY49 AV48

AP48 AP47

AY53 AT49

AU52

AT53 AY51

AT48

AU50

AT51

AA52 AB53

AD53

AD48

AB51

T48 T47

Y48

Y45

V48

V51 V53

Y53 Y51

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

IbexPeak-M_R1P0

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_CTRLCLK

SDVO_CTRLDATA

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

CRT

SDVO_INTN SDVO_INTP

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

INT_HDMITX2N_R INT_HDMITX2P_R INT_HDMITX1N_R INT_HDMITX1P_R INT_HDMITX0N_R INT_HDMITX0P_R INT_HDMICLK-_R INT_HDMICLK+_R

SDVO_CTRLCLK <24> SDVO_CTRLDAT <24>

C249 IV@0.1u/10V_4_X7RC249 IV@0.1u/10V_4_X7R C247 IV@0.1u/10V_4_X7RC247 IV@0.1u/10V_4_X7R C242 IV@0.1u/10V_4_X7RC242 IV@0.1u/10V_4_X7R C245 IV@0.1u/10V_4_X7RC245 IV@0.1u/10V_4_X7R C253 IV@0.1u/10V_4_X7RC253 IV@0.1u/10V_4_X7R C250 IV@0.1u/10V_4_X7RC250 IV@0.1u/10V_4_X7R C237 IV@0.1u/10V_4_X7RC237 IV@0.1u/10V_4_X7R C241 IV@0.1u/10V_4_X7RC241 IV@0.1u/10V_4_X7R

R place close to PCH

R425 IV@150_4R425 IV@150_4 R426 IV@150_4R426 IV@150_4 R427 IV@150_4R427 IV@150_4

INT_HDMI_HPD <24>

INT_CRT_BLU INT_CRT_GRN INT_CRT_RED

INT_HDMITX2N <24> INT_HDMITX2P <24> INT_HDMITX1N <24> INT_HDMITX1P <24> INT_HDMITX0N <24> INT_HDMITX0P <24> INT_HDMICLK- <24> INT_HDMICLK+ <24>

PCH Pull-high/low System PWR_OK

+3V

CLKRUN#

A A

XDP_DBRST#

ICH_RSMRST# RSV_ICH_LAN_RST# SYS_PWROK ACIN_R

R523 8.2K_4R523 8.2K_4 R226 1K_4R226 1K_4

R482 10K_4R482 10K_4 R499 10K_4R499 10K_4 R477 10K_4R477 10K_4

5

PM_RI# PM_BATLOW# PCIE_WAKE# PM_SLP_LAN# SUS_PWR_ACK_R

R184 10K_4R184 10K_4 R514 10K_4R514 10K_4 R230 10K_4R230 10K_4 R248 *10K_4R248 *10K_4 R530 10K_4R530 10K_4 R227 10K_4R227 10K_4

+3V_S5

4

3

C636 *.1u_4C636 *.1u_4

SYS_PWROK

U24

TC7SH08FU

+3V_S5

DELAY_VR_PWRGOOD need PU 2K to +3V. PU at power side

53

1

4

2

R538 100K_4R538 100K_4

DELAY_VR_PWRGOOD <4,38>

PWROK_EC <35>

2

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 1/6

Date: Sheet of

PROJECT :

ZQ9

8 45Tuesday, June 22, 2010

1

8 45Tuesday, June 22, 2010

1A

5

RTC Circuitry

+VCCRTC

CR1

+3VPCU

VCCRTC_1

R473

R473 1K_4

1K_4

BT1

D D

BT1

1

2

RTC_CONN

CR1

BAT54C

R483 20K/F_4R483 20K/F_4

R474 20K/F_4R474 20K/F_4

C663

C663 1u/10V_4

1u/10V_4

C662

C662 1u/10V_4

1u/10V_4

C650

C650 1u/10V_4

1u/10V_4

RTC_RST#

12

J2

J2 *SHORT_ PAD1

*SHORT_ PAD1

SRTC_RST#

12

J1

J1 *SHORT_ PAD1

*SHORT_ PAD1

HDA Bus

C C

PCH_AZ_CODEC_SYNC<29>

PCH_AZ_CODEC_RST#<29>

PCH_AZ_CODEC_SDOUT<29>

PCH_AZ_CODEC_BITCLK<29>

R453 33_4R453 33_4

R449 33_4R449 33_4

R456 33_4R456 33_4

R450 33_4R450 33_4

C628

C628 *27p_4

*27p_4

ACZ_SYNCACZ_SYNC

ACZ_RST#

ACZ_SDOUTACZ_SDOUT

ACZ_BIT_CLKACZ_BIT_CLK

4

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

+VCCRTC

PCH_AZ_CODEC_SDIN0<29>

+3V_S5

HDMI_HPD_PCH#<24>

C335

15p/50V_4

23

Y1

32.768KHZY132.768KHZ

4 1

C328

15p/50V_4

R479 1M_4R479 1M_4

ACZ_BIT_CLK ACZ_SYNC

SPKR<29>

ACZ_RST#

R460 *10K_4R460 *10K_4

R525 *10K_4R525 *10K_4

+3VPCU

3

R195

R195 10M_4

10M_4

RTC_RST# SRTC_RST# SM_INTRUDER#

PCH_INVRMEN

SPKR

ACZ_SDOUT

PCH_GPIO33

RTC_X1 RTC_X2

PCH_GPIO13

SPI_CLK_R SPI_CS0#_R SPI_CS1#

SPI_SI_R

SPI_SO_R

U21A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_R1P0

RTCIHDA

SPI JTAG

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

SATA

SATA0GP / GPIO21 SATA1GP / GPIO19

FWH0 / LAD0 FWH1 / LAD1 FWH2 / LAD2 FWH3 / LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATALED#

2

D33 B33 C32 A32

C34 A34

F34 AB9

SATA_RXN0_C

AK7

SATA_RXP0_C

AK6 AK11 AK9

SATA_RXN1_C

AH6

SATA_RXP1_C

AH5 AH9 AH8

AF11 AF9 AF7

Note:

AF6

SATA port2/3 may not be available on all PCH sku

AH3

(HM55 support 3 port only)

AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

R182 37.4/F_4R182 37.4/F_4

AF15

T3

Y9 V1

R222 10K_4R222 10K_4

TP13TP13 R240 43K/F_4R240 43K/F_4 R521 43K/F_4R521 43K/F_4

+1.05V

SATA_ACT# <32>

+3V +3V

+3V

LPC_LAD0 <27,35> LPC_LAD1 <27,35> LPC_LAD2 <27,35> LPC_LAD3 <27,35>

LPC_LFRAME# <27,35>

IRQ_SERIRQ <35>

SATA_RXN0_C <28> SATA_RXP0_C <28> SATA_TXN0 <28> SATA_TXP0 <28>

SATA_RXN1_C <28> SATA_RXP1_C <28> SATA_TXN1 <28> SATA_TXP1 <28>

1

PCH Strap Pin Configuration Table-1

INTVRMEN

SPI_MOSI

PCH SPI

B B

SPI_CS0#_R SPI_CLK_R

SPI_SI_R

SPI_SO_R

R541 3.3K/F_4R541 3.3K/F_4

+3V

U25

1

CE#

6

SCK

5

SI

2

SO

3

WP#

W25Q32BVSSIG

HOLD#

VDD

VSS

8

R539 3.3K/F_4R539 3.3K/F_4

7 4

+3V

C671

C671 .1u/10V_4

.1u/10V_4

SPKR

HDA_DOCK_EN #/GPIO33

GNT0#, GNT1#

GNT2#/ GPIO53

GNT3#/ GPIO55

NV_ALE NV_CLE

Integrated 1.05V VRM Enable / Disable

TPM Functionality Disable

Reboot option at power-up 0 = Default Mode (Internal weak Pull-down)

Flash Descriptor Security Override

Boot BIOS Strap

ESI Strap (Server Only)

Top-Block Swap Override

IntelR Anti-Theft Technology HDD Data Protection (Intel AT-d) Enable

DMI Termination Voltage

1 = Integrated VRM is enabled

1 = Enabled 0 = Disable

1 = No Reboot Mode with TCO Disabled

0 = Flash Descriptor Security will be overridden 1 = Security measure defined in the Flash Descriptor will be enabled.

(0,0) = LPC (0,1) = Reserved NAND (1,0) = PCI (1,1) = SPI

ESI compatible mode is for server platforms only

0 = Top Block Swap Mode 1 = Default Mode (Internal pull-up)

1 = Enabled 0 = Disabled (Default)

DMI termination voltage. Weak internal pull-up. Do not pull low.

0 = Integrated VRM is disabled

PCI_GNT0#<10> PCI_GNT1#<10>

+VCCRTC

+3V

PCH_GPIO33

PWM_SELECT#<10>

PCI_GNT3#<10>

NV_ALE<10>

NV_CLE<10>

R489 330K_6R489 330K_6

R540 *1K_4R540 *1K_4

R532 *1K/F_4R532 *1K/F_4

R164 *1K/F_4R164 *1K/F_4 R145 *10K_4R145 *10K_4

R129 1K_4R129 1K_4 R122 1K_4R122 1K_4 R123 *1K_4R123 *1K_4 R131 *1K_4R131 *1K_4

R158 *1K/F_4R158 *1K/F_4

R421 *10K/F_4R421 *10K/F_4

R202 *1K/F_4R202 *1K/F_4

R206 *1K/F_4R206 *1K/F_4

PCH_INVRMEN

SPI_SI_R

SPKR

+3V

+1.8V

GPIO8

A A

GPIO15

GPIO27

5

4

Reserved This signal has a weak internal pull up.

Reserved

On-Die PLL Voltage Regulator <internal weak pull-up>

NOTE: This signal should not be pulled low

0 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with no confidentiality 1 = Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality

0 = Disables the VccVRM. 1 = Enables the internal VccVRM to have a clean supply for analog rails.

3

RSV_GPIO8<11>

CR_WAKE#<11>

PCH_GPIO27<11>

R204 10K_4R204 10K_4

R203 *1K_4R203 *1K_4

R244 1K_4R244 1K_4

R221 *10K_4R221 *10K_4

+3V_S5

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 2/6

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZQ9

9 45Tuesday, June 22, 2010

1

9 45Tuesday, June 22, 2010

1A

5

U21E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

D D

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

TP15TP15

R423 22_4R423 22_4

TP21TP21 R105 22_4R105 22_4 R117 22_4R117 22_4

PCI_REQ0# PCI_REQ1# dGPU_SELECT# PCI_REQ3#

PCI_GNT0# PCI_GNT1# PWM_SELECT# PCI_GNT3#

PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# PCI_PIRQH#

PCI_RST# PCI_SERR#

PCI_PERR#

PCI_IRDY# PCI_DEVSEL#

PCI_FRAME# PCI_PLOCK# PCI_STOP#

PCI_TRDY# ICH_PME# PCI_PLTRST#

CLK_LPC_DEBUG_C CLK_PCI_PCCARD CLK_PCI_775_CCLK_PCI_775_C

C C

CLK_LPC_DEBUG<27>

B B

CLK_PCI_775<35>

TP1TP1

TP3TP3

PCI_GNT0#<9> PCI_GNT1#<9> PWM_SELECT#<9> PCI_GNT3#<9>

PCI_RST#<27>

CLK_PCI_FB CLK_PCI_FB_C

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1# / GPIO50

B45

REQ2# / GPIO52

M53

REQ3# / GPIO54

F48

GNT0#

K45

GNT1# / GPIO51

F36

GNT2# / GPIO53

H53

GNT3# / GPIO55

B41

PIRQE# / GPIO2

K53

PIRQF# / GPIO3

A36

PIRQG# / GPIO4

A48

PIRQH# / GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IbexPeak-M_R1P0

PCI

NV_DQ0 / NV_IO0 NV_DQ1 / NV_IO1 NV_DQ2 / NV_IO2 NV_DQ3 / NV_IO3 NV_DQ4 / NV_IO4 NV_DQ5 / NV_IO5 NV_DQ6 / NV_IO6 NV_DQ7 / NV_IO7 NV_DQ8 / NV_IO8

NV_DQ9 / NV_IO9 NV_DQ10 / NV_IO10 NV_DQ11 / NV_IO11

NVRAM

NV_DQ12 / NV_IO12 NV_DQ13 / NV_IO13 NV_DQ14 / NV_IO14 NV_DQ15 / NV_IO15

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USB

OC0# / GPIO59 OC1# / GPIO40 OC2# / GPIO41 OC3# / GPIO42 OC4# / GPIO43

OC5# / GPIO9 OC6# / GPIO10 OC7# / GPIO14

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_ALE NV_CLE

NV_RCOMP

NV_RB#

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2 AV7 AY8

AY5 AV11

BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25 D25

N16 J16 F16 L16 E14 G16 F12 T15

4

NV_ALE NV_CLE

NV_RCOMP

R508 *32.4/F_4R508 *32.4/F_4

Port1 and port9 can be used on debug mode

TP29TP29 TP30TP30

USB port6/7 may not be available on all PCH sku (HM55 support 12port only)

TP28TP28 TP27TP27

USB_BIAS

R466 22.6/F_4R466 22.6/F_4

USB_OC0# USB_OC1# USB_OC2# USB_OC3# USB_OC4_5#

USB_OC6# USB_OC7#

TP4TP4

NV_ALE <9> NV_CLE <9>

USBP1- <33> USBP1+ <33>

USBP4- <33> USBP4+ <33>

USBP8- <23> USBP8+ <23> USBP9- <33> USBP9+ <33>

USBP11- <33> USBP11+ <33> USBP12- <31> USBP12+ <31> USBP13- <27,33> USBP13+ <27,33>

TP5TP5 TP11TP11 TP10TP10

TP6TP6 TP7TP7

MB USB

BLUETOOTH 3.0

Camera USB/B-USB1-2

USB/B-USB1-1 Card Reader Mini Card (WLAN & BT 2.0)

USB_OC0# <33>

USB_OC4_5# <33>

EHCI1

EHCI2

Wireless

LAN

3

PCIE_RX1-<25> PCIE_RX1+<25> PCIE_TX1-<25> PCIE_TX1+<25>

PCIE_RX6-<27> PCIE_RX6+<27> PCIE_TX6-<27> PCIE_TX6+<27>

CLK_PCH_SRC2#<27> CLK_PCH_SRC2<27>

PCIE_CLK_REQ2#<27>

CLK_PCIE_LOM#<25> CLK_PCIE_LOM<25>

CLK_PCIE_LAN_REQ#<25>

C615 0.1u/10V_4_X7RC615 0.1u/10V_4_X7R C616 0.1u/10V_4_X7RC616 0.1u/10V_4_X7R

C259 0.1u/10V_4_X7RC259 0.1u/10V_4_X7R C268 0.1u/10V_4_X7RC268 0.1u/10V_4_X7R

R531 *Short_4R531 *Short_4

R233 *Short_4R233 *Short_4

CLK_PCIE_REQ0#

CLK_PCIE_REQ1#_R

CLK_PCIE_REQ2#_R

CLK_PCIE_REQ3#

CLK_PCIE_REQ4#

CLK_PCIE_REQ5#

PCIE_CLK_REQB#

PCIE_TXN1_C PCIE_TXP1_C

PCIE_TXN6_C PCIE_TXP6_C

BG30 BF29

BH29

AW30

BA30 BC30 BD30

AU30 AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33 BG32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34 BG36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

AK53 AK51

BJ30

BJ32

BJ34 BJ36

U4

N4

A8

M9

AJ50 AJ52

H6

P13

U21B

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKRQ1# / GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2# / GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ3# / GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4# / GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5# / GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_R1P0

2

PCI-E*

SMBALERT# / GPIO11

SMBDATA

SML0ALERT# / GPIO60

SML0CLK

SML0DATA

SML1ALERT# / GPIO74

SMBus

SML1CLK / GPIO58

SML1DATA / GPIO75

Link

Controller

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N

CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

Clock Flex

CL_DATA1

CL_RST1#

PEG_A_CLKRQ# / GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N

CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N

CLKIN_DOT_96P

CLKIN_SATA_N / CKSSCD_N CLKIN_SATA_P / CKSSCD_P

REFCLK14IN

CLKIN_PCILOOPBACK

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

SMBCLK

CL_CLK1

B9 H14 C8

J14 C6 G8

M14 E10 G12

CL_CLK1

T13

CL_DATA1

T11

CL_RST1#

T9

H1

AD43 AD45

AN4 AN2

AT1 AT3

AW24 BA24

AP3 AP1

F18 E18

AH13 AH12

P41

J42

AH51 AH53

XCLK_RCOMP

AF38

T45

P43

T42

dGPU_EDIDSEL#

N50

RSV_SMBALERT# ICH_SMBCLK ICH_SMBDATA

RSV_SML0ALERT# SMB_CLK_ME0 SMB_DATA_ME0

RSV_SML1ALERT# SMB_CLK_ME1 SMB_DATA_ME1

PEG_CLKREQ#_R

CLK_PCI_FB

XTAL25_IN XTAL25_OUT

R141 90.9/F_4R141 90.9/F_4

BOARD_ID1

BOARD_ID2

BOARD_ID3

R242 *0_4R242 *0_4

CL_CLK1 <27> CL_DATA1 <27> CL_RST1# <27>

CLK_PCIE_VGA# <16> CLK_PCIE_VGA <16>

CLK_PCIE_3GPLL# <4> CLK_PCIE_3GPLL <4>

DPLL_REF_SSCLK# <4> DPLL_REF_SSCLK <4>

R121 *10K_4R121 *10K_4

1

ICH_SMBCLK <3> ICH_SMBDATA <3>

SML1ALERT# <11,34,35>

5/25 add net

CLK_BUF_PCIE_3GPLL# <3> CLK_BUF_PCIE_3GPLL <3>

CLK_BUF_BCLK# <3> CLK_BUF_BCLK <3>

CLK_BUF_DREFCLK# <3> CLK_BUF_DREFCLK <3>

CLK_BUF_DREFSSCLK# <3> CLK_BUF_DREFSSCLK <3>

CLK_ICH_14M <3>

+1.05V

+3V

R428

R428 1M_4

1M_4

C600 18p/50V_4C600 18p/50V_4

12

Y5 25MHzY525MHz

C599 18p/50V_4C599 18p/50V_4

6/9 set for board ID

+3V_S5

R245 10K_4R245 10K_4 R513 10K_4R513 10K_4 R229 10K_4R229 10K_4 R247 10K_4R247 10K_4 R232 10K_4R232 10K_4 R517 IV@10K_4R517 IV@10K_4

+3V

R534 10K_4R534 10K_4

+3V

R138 10K_4R138 10K_4 R139 8.2K_4R139 8.2K_4 R422 8.2K_4R422 8.2K_4 R143 8.2K_4R143 8.2K_4 R518 10K_4R518 10K_4

R529 EV@10K/F_4R529 EV@10K/F_4

CLK_PCIE_REQ0# CLK_PCIE_REQ3# CLK_PCIE_REQ4# CLK_PCIE_REQ5# PCIE_CLK_REQB#

PEG_CLKREQ#_R

CLK_PCIE_REQ1#_R

dGPU_SELECT# PCI_PIRQE# PCI_PIRQF# PCI_PIRQG# CLK_PCIE_REQ2#_R

PEG_CLKREQ#_R

3

RP2

USB_OC3# USB_OC2#

+3V_S5

C353

C353 .1u/10V_4

.1u/10V_4

PCI_PLTRST#

2

4

A A

1

U7

3 5

TC7SH08FUU7TC7SH08FU

R249 *0_4R249 *0_4

5

R251

R251 100K_4

100K_4

PLTRST# <4,11,25,27,31,35>

USB_OC4_5#

+3V_S5

PCI_PIRQD# PCI_REQ1# PCI_FRAME# PCI_TRDY#

+3V

PCI_PIRQC# PCI_PIRQA# PCI_STOP# PCI_PLOCK# PCI_IRDY#

+3V

6 7 8 9

10

6 7 8 9

10

6 7 8 9

10

RP2

8.2K_10P8R

RP4

8.2K_10P8R

RP1

8.2K_10P8R

4

5 4 3 2 1

USB_OC1# USB_OC0# USB_OC6# USB_OC7#

PCI_REQ3# PCI_PIRQB# PCI_REQ0# PCI_PIRQH#

PCI_DEVSEL# PCI_PERR#

PCI_SERR#

+3V_S5

+3V

R406 *10K_4R406 *10K_4 R407 10K_4R407 10K_4 R408 *10K_4R408 *10K_4

BOARD_ID1

BOARD_ID2

BOARD_ID3

+3V_S5

BOARD_ID1

R132 10K_4R132 10K_4

BOARD_ID2

R136 *10K_4R136 *10K_4

BOARD_ID3

R414 10K_4R414 10K_4

Not Defined

High = 80port output to LPC Low = 80port output to PCI High = Reserved Low = Reserved (Default)

R504 10K_4R504 10K_4 R211 10K_4R211 10K_4 R243 10K_4R243 10K_4 R512 2.2K_4R512 2.2K_4 R511 2.2K_4R511 2.2K_4 R214 2.2K_4R214 2.2K_4 R212 2.2K_4R212 2.2K_4

2

RSV_SMBALERT#

RSV_SML0ALERT# RSV_SML1ALERT# ICH_SMBCLK ICH_SMBDATA SMB_CLK_ME0 SMB_DATA_ME0

2ND_MBCLK<35>

2ND_MBDATA<35>

+3V_S5

R180

2

2.2K_4

SMB_CLK_ME1

3

1

Q4 2N7002KQ42N7002K

+3V_S5

R181

2

2.2K_4

SMB_DATA_ME1

3

1

Q5 2N7002KQ52N7002K

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 3/6

Date: Sheet of

PROJECT :

1

ZQ9

10 45Tuesday, June 22, 2010

1A

5

4

3

2

1

GPU RST#

5/18 change for discrete only

D D

TP31TP31

SIO_EXT_SMI#<35> SIO_EXT_SCI#<35>

TP2TP2

RSV_GPIO8<9>

TP14TP14

CR_WAKE#<9>

dGPU_PWROK<19>

PCH_GPIO27<9>

C C

TP16TP16

dGPU_VRON<19,42>

TP17TP17

dGPU_PWR_EN# should be stable before dGPU_VRON enable

SML1ALERT#<10,34,35>

EC suggestion use GPIO49 for FAN control

SATA5GP / GPIO49 / TEMP_ALERT# is used to alert for EC when CPU or Graph/Memory controllers' temperature go out of limit.

B B

So connecting GPIO49 to EC and avoid this pin to be used for other purpose

A A

TP12TP12

TP33TP33

R524 *Short_4R524 *Short_4

BMBUSY# SIO_EXT_SMI# SIO_EXT_SCI# BOARD_ID0

RSV_GPIO8

LAN_DISABLE#

CR_WAKE#

dGPU_HOLD_RST#

GPIO22

PCH_GPIO27

TP_PCH_GPIO28 STP_PCI#

dGPU_PWR_EN#dGPU_PWR_EN# dGPU_PRSNT# GPIO38

SAVE_LED# GPIO45 RST_GATE# SV_SET_UP SATA5GP GPIO57

C38

F10

AA2

AB12

M11

AB7

AB13

AB6

BE1

BE53 BF53

BH1

BH2 BH52 BH53

BJ49 BJ50

BJ52 BJ53

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U21F

A20GATE

PECI

RCIN#

THRMTRIP#

TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP17 TP18

TP19 NC_1 NC_2 NC_3 NC_4 NC_5

INIT3_3V#

TP24

AH45 AH46

AF48 AF47

U2

AM3 AM1 BG10 T1 BE10 BD10

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18 AJ24 AK41 AK42 M32 N32 M30 N30 H12 AA23 AB45 AB38 AB42 AB41 T39

P6 C10

Y3

BMBUSY# / GPIO0 TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7 GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15 SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24 GPIO27

V13

GPIO28 STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35 SATA2GP / GPIO36 SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46 SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12

BF1

VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16 VSS_NCTF_17 VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21 VSS_NCTF_22

BJ5

VSS_NCTF_23 VSS_NCTF_24 VSS_NCTF_25 VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_R1P0

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

CLKOUT_PCIE6N CLKOUT_PCIE6P

CLKOUT_PCIE7N CLKOUT_PCIE7P

PROCPWRGD

PCH_THRMTRIP#_R

R197 56/F_4R197 56/F_4

SIO_A20GATE <35>

CLK_CPU_BCLK# <4> CLK_CPU_BCLK <4> H_PECI <4> SIO_RCIN# <35> H_PWRGOOD <4>

R200 56/F_4R200 56/F_4

PM_THRMTRIP# <4>

+1.05V

GPU_RST# <16>

GPIO Pull-up/Pull-down

TP_PCH_GPIO28 GPIO45 RST_GATE# GPIO57 LAN_DISABLE#

SIO_EXT_SMI# SIO_EXT_SCI# dGPU_PWR_EN# dGPU_PWROK

SIO_RCIN# SIO_A20GATE dGPU_HOLD_RST# SATA5GP GPIO22

SAVE_LED# STP_PCI#

GPIO38 BMBUSY# SV_SET_UP

SV_SET_UP 1-X High = Strong (Default)

GPIO57 stuff PD and not stuff PU for Intel suggestion at 6/1

R148 *10K_4R148 *10K_4

+3V

R238 IV@10K_4R238 IV@10K_4

5/18 separate for 14" & 15"

BOARD_ID0

RSV_GPIO8

+3V

4

GPIO57

R73 EV@0_4R73 EV@0_4

*EV@.1u_4

C137

53

1

dGPU_HOLD_RST#

2

U3

U3 *EV@TC7SH08FU

*EV@TC7SH08FU

R239 10K_4R239 10K_4 R516 10K_4R516 10K_4 R515 10K_4R515 10K_4 R208 *10K_4R208 *10K_4 R231 10K_4R231 10K_4

R146 10K_4R146 10K_4 R445 10K_4R445 10K_4 R223 10K_4R223 10K_4 R154 *10K_4R154 *10K_4

R533 10K_4R533 10K_4 R520 10K_4R520 10K_4 R536 *10K_4R536 *10K_4 R537 10K_4R537 10K_4 R224 10K_4R224 10K_4

R519 10K_4R519 10K_4 R228 10K_4R228 10K_4

R535 10K_4R535 10K_4 R522 8.2K_4R522 8.2K_4 R241 10K_4R241 10K_4

BOARD_ID0 dGPU_PRSNT#

dGPU always exist

High = 15" Low = 14" High = Disable Low = Enable

R70

R70 *EV@100K_4

*EV@100K_4

+3V_S5

R207 10K_4R207 10K_4

R155 10K_4R155 10K_4

R220 EV@10K_4R220 EV@10K_4

PLTRST#<4,10,25,27,31,35>

+3V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 4/6

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZQ9

1A

11 45Tuesday, June 22, 2010

1

1A

IBEX PEAK-M (POWER)

D D

40mA(15mils)

C C

37mA(15mils)

B B

VRM enable by strap pin GPIO27 which supply clean 1.05V for [VCCACLK,VCCAPLLEXP,VCCFDIPLL,VCCSATAPLL]

A A

5

R116 *SHORT0805R116 *SHORT0805

+1.05V

R124 *SHORT0805R124 *SHORT0805

VCCCORE(+1.05V) = 1.432A(80mils)

R174 *SHORT0603R174 *SHORT0603

+1.05V

L49 *1uh_6L49 *1uh_6

+1.05V

VCCIO = 3.062A(150mils)

+1.05V

+3V

+V1.5S_1.8S

L51 *1uH_6L51 *1uH_6

+1.05V

+1.05V_VCCCORE_ICH

C291

C291 10u/6.3V_8

10u/6.3V_8

+1.05V_PCH_VCCDPLL_EXP

C629 *10u/6.3V_6C629 *10u/6.3V_6

R113 *SHORT0603R113 *SHORT0603

R185 *SHORT0603R185 *SHORT0603

C645

C645 *10u/6.3V_6

*10u/6.3V_6

R169 *SHORT0603R169 *SHORT0603

C283

C283 1u/6.3V_4

1u/6.3V_4

+V1.1LAN_VCCAPLL_EXP

C289 10U/6.3V_8C289 10U/6.3V_8 C292 1U/6.3V_4C292 1U/6.3V_4 C305 1U/6.3V_4C305 1U/6.3V_4 C294 1U/6.3V_4C294 1U/6.3V_4

+3V_VCCA3GBG

+VCCAFDI_VRM

+V1.1LAN_VCCAPLL_FDI

+1.05V_VCCDPLL_FDI

+1.8V

+1.05V

U21G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IbexPeak-M_R1P0

VCCVRM=196mA(15mils)

R213 *SHORT0603R213 *SHORT0603

5/27 cost down

L45 *10uh_8L45 *10uh_8

L46 10uh_8L46 10uh_8

POWER

VCC CORE

PCI E*

C344

C344 .1u/16V_4

.1u/16V_4

C592

C592 *220u_3528

*220u_3528

C601

C601 220u_3528

220u_3528

4

+VCCA_DAC_1_2

AE50

VCCADAC[1]

AE52

VCCADAC[2]

AF53

VSSA_DAC[1]

CRTLVDS

VCCTX_LVDS[1] VCCTX_LVDS[2] VCCTX_LVDS[3] VCCTX_LVDS[4]

HVCMOS

DMI

NAND / SPI

FDI

+V1.5S_1.8S

C345

C345 .1u/16V_4

.1u/16V_4

+

AF51

VSSA_DAC[2]

AH38

VCCALVDS

AH39

VSSA_LVDS

AP43 AP45 AT46 AT45

AB34

VCC3_3[2]

AB35

VCC3_3[3]

AD35

VCC3_3[4]

AT24

VCCVRM[2]

AT16

VCCDMI[1]

AU16

VCCDMI[2]

AM16

VCCPNAND[1]

AK16

VCCPNAND[2]

AK20

VCCPNAND[3]

AK19

VCCPNAND[4]

AK15

VCCPNAND[5]

AK13

VCCPNAND[6]

AM12

VCCPNAND[7]

AM13

VCCPNAND[8]

AM15

VCCPNAND[9]

AM8

VCCME3_3[1]

AM9

VCCME3_3[2]

AP11

VCCME3_3[3]

AP9

VCCME3_3[4]

HDA_SYNC (PCH strap pin)

Internal weak pull-down VCCVRM=>+1.8V (default) external pull-up VCCVRM=>+1.5V

+V1.1LAN_VCCA_A_DPL

R424

R424 0_8

0_8

+V1.1LAN_VCCA_B_DPL

SP@ UMA=CH31004KB17<0.01u> MXM=CS00002JB38<0_ohm>

C256

C256 SP@.01u/25V_4

SP@.01u/25V_4

+3V_VCC_GIO

C279

C279 .1u/16V_4

.1u/16V_4 R150 0_8R150 0_8

VCCVRM= 196mA(15mils)

+VCCVRM

+VCCDMI

C324

C324 1u/10V_4

1u/10V_4

VCCPNAND

C319

C319 .1u/16V_4

.1u/16V_4

+3V_VCCME_SPI

C329

C329 .1u/16V_4

.1u/16V_4

VCCADAC= 69mA(15mils)

L44

L44 PBY160808T/2A/180ohm_6

PBY160808T/2A/180ohm_6

6/14 change the P/N

C604

C604 IV@.01u/25V_4

IV@.01u/25V_4

VCCALVDS= 1mA

VCCALVDS

R118

R118 EV@0_4

EV@0_4

VCC3_3 = 357mA(30mils)

R417 *SHORT0603R417 *SHORT0603

R178 *SHORT0603R178 *SHORT0603

R194 *Short_4R194 *Short_4

VCCPNAND= 156mA(15mils)

R210 *SHORT0805R210 *SHORT0805

VCCME3_3= 85mA(15mils)

R201 *SHORT0603R201 *SHORT0603

C572

C572 IV@10u/10V_6

IV@10u/10V_6

R114 IV@0_4R114 IV@0_4

VCCTX_LVDS

C255

C255 IV@.01u/25V_4

IV@.01u/25V_4

C598

C598 IV@0.1u/10V_4_X7R

IV@0.1u/10V_4_X7R

3

+3V

VCCTX_LVDS= 59mA(15mils)

L24 IV@0.1UH_8/250mAL24 IV@0.1UH_8/250mA

C248

C248 IV@22u/6.3V_8

IV@22u/6.3V_8

+3V

+V1.5S_1.8S

VCCDMI= 61mA(15mils)

+1.05V

+1.8V

+3V

3.3 V. This rail should be powered up during S0 system state. Note that Thermal Sensor shares the same power supply rail with DAC. The external filters on this pin are not needed in case internal graphic is disabled so only 3.3-V connection is required.

+3V

VCCACLK= 52mA(15mils)

+1.05V

VCCLAN = 320mA(30mils)

+1.05V

R175 *0_6R175 *0_6

+1.05V

+1.8V

C482 change to 0 ohm resistor.

VCCME(+1.05V) = 1.849A(100mils)

R140 *SHORT0805R140 *SHORT0805 R468 100/F_4R468 100/F_4

68mA(15mils)

69mA(15mils)

VCCIO = 3.062A(150mils)

VCCSUS3_3 = 163mA(20mils)

VCC3_3 = 0.357A(30mils)

V_CPU_IO >1mA(15mils)

+3V_S5

+3V

+1.05V

VCCRTC= 2mA(15mils)

L47 *10uh_8L47 *10uh_8

+1.05V

R168 *SHORT0603R168 *SHORT0603

R186 *SHORT0603R186 *SHORT0603

R198 0_6R198 0_6

+VCCRTC

+V1.1LAN_VCCA_CLK

C597 *10u/6.3V_6C597 *10u/6.3V_6 C603 *1u/6.3V_4C603 *1u/6.3V_4

+1.05V_VCCAUX

C300

TP_PCH_VCCDSW

1U/6.3V_4

C307

C307 1u/6.3V_4

1u/6.3V_4

+1.05V_VCCEPW

C257 22U/6.3V_8C257 22U/6.3V_8 C269 22U/6.3V_8C269 22U/6.3V_8 C277 1U/6.3V_4C277 1U/6.3V_4 C278 1U/6.3V_4C278 1U/6.3V_4C282 1U/6.3V_4C282 1U/6.3V_4

+VCCRTCEXT

C334 0.1u/10V_4_X7RC334 0.1u/10V_4_X7R

+V1.5S_1.8S

+V1.1LAN_VCCA_A_DPL

+V1.1LAN_VCCA_B_DPL

C288 1U/6.3V_4C288 1U/6.3V_4 C286 1U/6.3V_4C286 1U/6.3V_4 C273 1U/6.3V_4C273 1U/6.3V_4

C325 0.1u/10V_4_X7RC325 0.1u/10V_4_X7R C668

C306 0.1u/10V_4_X7RC306 0.1u/10V_4_X7R

+VCCSST

+V1.1LAN_INT_VCCSUS

+3V_S5_VCCPSUS

C314 0.1u/10V_4_X7RC314 0.1u/10V_4_X7R

+3V_VCCPCORE

C318 0.1u/10V_4_X7RC318 0.1u/10V_4_X7R

+VTT_VCCPCPU

C342 4.7U/6.3V_6C342 4.7U/6.3V_6 C338 0.1u/10V_4_X7RC338 0.1u/10V_4_X7R C336 0.1u/10V_4_X7RC336 0.1u/10V_4_X7R

C664 0.1u/10V_4_X7RC664 0.1u/10V_4_X7R C665 0.1u/10V_4_X7RC665 0.1u/10V_4_X7R

AP51 AP53

AF23 AF24

AD38 AD39 AD41 AF43 AF41 AF42

AU24

BB51 BB53

BD51 BD53

AH23 AH35 AF34 AH34 AF32

AT18

AU18

2

Y20

V39 V41 V42 Y39 Y41 Y42

V9

AJ35

V12

Y22

P18 U19 U20 U22

V15 V16 Y16

A12

U21J

VCCACLK[1] VCCACLK[2]

VCCLAN[1] VCCLAN[2]

DCPSUSBYP

VCCME[1] VCCME[2] VCCME[3] VCCME[4] VCCME[5] VCCME[6] VCCME[7] VCCME[8] VCCME[9] VCCME[10] VCCME[11] VCCME[12]

DCPRTC

VCCVRM[3]

VCCADPLLA[1] VCCADPLLA[2]

VCCADPLLB[1] VCCADPLLB[2]

VCCIO[21] VCCIO[22] VCCIO[23]

VCCIO[2] VCCIO[3] VCCIO[4] DCPSST

DCPSUS

VCCSUS3_3[29] VCCSUS3_3[30] VCCSUS3_3[31] VCCSUS3_3[32]

VCC3_3[5] VCC3_3[6] VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

VCCRTC

IbexPeak-M_R1P0

POWER

Clock and Miscellaneous

CPU

RTC PCI/GPIO/LPC

USB

PCI/GPIO/LPC

SATA

HDA

VCCIO[5] VCCIO[6] VCCIO[7] VCCIO[8]

VCCSUS3_3[1] VCCSUS3_3[2] VCCSUS3_3[3] VCCSUS3_3[4] VCCSUS3_3[5] VCCSUS3_3[6] VCCSUS3_3[7] VCCSUS3_3[8]

VCCSUS3_3[9] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20] VCCSUS3_3[21] VCCSUS3_3[22] VCCSUS3_3[23] VCCSUS3_3[24] VCCSUS3_3[25] VCCSUS3_3[26] VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1] VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10] VCCIO[11] VCCIO[12] VCCIO[13]

VCCIO[14] VCCIO[15] VCCIO[16]

VCCIO[17] VCCIO[18] VCCIO[19] VCCIO[20]

VCCME[13] VCCME[14] VCCME[15] VCCME[16]

VCCSUSHDA

1

VCCIO = 3.208A(150mils)

V24 V26

C295 1U/6.3V_4C295 1U/6.3V_4

Y24 Y26

+3V_S5_VCCPUSB

V28 U28

C303 0.1u/10V_4_X7RC303 0.1u/10V_4_X7R

U26

C290 0.1u/10V_4_X7RC290 0.1u/10V_4_X7R

U24

C302 0.022U/16V_4C302 0.022U/16V_4

P28 P26 N28 N26 M28 M26 L28

VCCSUS3_3 = 0.163A(20mils)

L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23 V23 F24

K49

J38 L38 M36 N36 P36 U35

AD13

AK3 AK1

AH22

AT20

AH19 AD20 AF22 AD19

AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

V5REF_SUS

V5REF

+3V_VCCPPCI

C261 0.1u/10V_4_X7RC261 0.1u/10V_4_X7R

C260 0.1u/10V_4_X7RC260 0.1u/10V_4_X7R

+V1.1LAN_VCCAPLL

C668 *1u/6.3V_4

*1u/6.3V_4

+V1.1LAN_VCC_SATA

+V1.5S_1.8S

+1.05V_VCCEPW

+V3.3A_1.5A_HDA_IO

C276

C276 1u/10V_4

1u/10V_4

R172 *SHORT0603R172 *SHORT0603

+1.05V

R162 *SHORT0805R162 *SHORT0805

V5REF_SUS< 1mA

D17 RB500V-40D17 RB500V-40 C639 1U/6.3V_4C639 1U/6.3V_4

V5REF< 1mA

R115 100/F_4R115 100/F_4

D4 RB500V-40D4 RB500V-40 C240 1U/6.3V_4C240 1U/6.3V_4

R142 *SHORT0603R142 *SHORT0603

VCC3_3 = 0.357A(30mils)

31mA(15mils)

L28 *10uh_8L28 *10uh_8

C351

C351 *10u/6.3V_6

*10u/6.3V_6

VCCIO = 3.062A(150mils)

R526 *SHORT1206R526 *SHORT1206

C320

C320 1u/10V_4

1u/10V_4

VCCME = 1.849A(100mils)

R163 *Short_4R163 *Short_4

VCCSUSHDA= 6mA(15mils)

+3V_S5

+1.05V

+3V_S5

+5V_S5 +3V_S5

+5V +3V

+3V

+1.05V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

IBEX PEAK-M 5/6

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

1

ZQ9

1A

12 45Tuesday, June 22, 2010

1A

5

IBEX PEAK-M (GND)

D D

U21H

AB16

VSS[0]

AA19

VSS[1]

AA20

VSS[2]

AA22

VSS[3]

AM19

VSS[4]

AA24

VSS[5]

AA26

VSS[6]

AA28

VSS[7]

AA30

VSS[8]

AA31

VSS[9]

AA32

VSS[10]

AB11

VSS[11]

AB15

VSS[12]

AB23

VSS[13]

AB30

VSS[14]

AB31

VSS[15]

AB32

VSS[16]

AB39

VSS[17]

AB43

VSS[18]

AB47

AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49

AF12 AH49

AU4 AF35 AP13 AN34 AF45 AF46 AF49

AG2

AG52

AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47

AH7

AJ19 AJ20

AJ22 AJ23 AJ26 AJ28 AJ32 AJ34

AK12

AM41

AN19 AK26 AK22 AK23 AK28

AB5 AB8 AC2

AD7 AE2 AE4

Y13

AF5 AF8

AJ2

AT5 AJ4

VSS[19] VSS[20] VSS[21] VSS[22] VSS[23] VSS[24] VSS[25] VSS[26] VSS[27] VSS[28] VSS[29] VSS[30] VSS[31] VSS[32] VSS[33] VSS[34] VSS[35] VSS[36] VSS[37] VSS[38] VSS[39] VSS[40] VSS[41] VSS[42] VSS[43] VSS[44] VSS[45] VSS[46] VSS[47] VSS[48] VSS[49] VSS[50] VSS[51] VSS[52] VSS[53] VSS[54] VSS[55] VSS[56] VSS[57] VSS[58] VSS[59] VSS[60] VSS[61] VSS[62] VSS[63] VSS[64] VSS[65] VSS[66] VSS[67] VSS[68] VSS[69] VSS[70] VSS[71] VSS[72] VSS[73] VSS[74] VSS[75] VSS[76] VSS[77] VSS[78] VSS[79]

IbexPeak-M_R1P0

C C

B B

A A

VSS[80] VSS[81] VSS[82] VSS[83] VSS[84] VSS[85] VSS[86] VSS[87] VSS[88] VSS[89] VSS[90] VSS[91] VSS[92] VSS[93] VSS[94] VSS[95] VSS[96] VSS[97] VSS[98]

VSS[99] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158]

4

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

BG12 BB12 BB16 BB20 BB24 BB30 BB34 BB38 BB42 BB49

BC10 BC14 BC18

BC2 BC22 BC32 BC36 BC40 BC44 BC52

BH9 BD48 BD49

BD5 BE12 BE16 BE20 BE24 BE30 BE34 BE38 BE42 BE46 BE48 BE50

BF49

BF51 BG18 BG24

BG4 BG50 BH11 BH15 BH19 BH23 BH31 BH35 BH39 BH43 BH47

BH7

AF39

AY7 B11 B15 B19 B23 B31 B35 B39 B43 B47

BB5

BE6 BE8 BF3

C12 C50 D51 E12 E16 E20 E24 E30 E34 E38 E42 E46 E48

F49 G10

G14 G18

G22 G32 G36 G40 G44 G52

H16 H20 H30 H34 H38 H42

3

U21I

VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168]

B7

VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198] VSS[199] VSS[200] VSS[201] VSS[202] VSS[203] VSS[204] VSS[205] VSS[206] VSS[207] VSS[208] VSS[209] VSS[210] VSS[211] VSS[212] VSS[213] VSS[214] VSS[215] VSS[216] VSS[217] VSS[218] VSS[219] VSS[220] VSS[221] VSS[222] VSS[223] VSS[224] VSS[225] VSS[226] VSS[227] VSS[228] VSS[229] VSS[230] VSS[231] VSS[232] VSS[233] VSS[234] VSS[235] VSS[236] VSS[237]

E6

VSS[238]

E8

VSS[239] VSS[240]

F5

VSS[241] VSS[242] VSS[243] VSS[244]

G2

VSS[245] VSS[246] VSS[247] VSS[248] VSS[249] VSS[250] VSS[251] VSS[252] VSS[253] VSS[254] VSS[255] VSS[256] VSS[257] VSS[258]

VSS[259] VSS[260] VSS[261] VSS[262] VSS[263] VSS[264] VSS[265] VSS[266] VSS[267] VSS[268] VSS[269] VSS[270] VSS[271] VSS[272] VSS[273] VSS[274] VSS[275] VSS[276] VSS[277] VSS[278] VSS[279] VSS[280] VSS[281] VSS[282] VSS[283] VSS[284] VSS[285] VSS[286] VSS[287] VSS[288] VSS[289] VSS[290] VSS[291] VSS[292] VSS[293] VSS[294] VSS[295] VSS[296] VSS[297] VSS[298] VSS[299] VSS[300] VSS[301] VSS[302] VSS[303] VSS[304] VSS[305] VSS[306] VSS[307] VSS[308] VSS[309] VSS[310] VSS[311] VSS[312] VSS[313] VSS[314] VSS[315] VSS[316] VSS[317] VSS[318] VSS[319] VSS[320] VSS[321] VSS[322] VSS[323] VSS[324] VSS[325] VSS[326] VSS[327] VSS[328] VSS[329] VSS[330] VSS[331] VSS[332] VSS[333] VSS[334] VSS[335] VSS[336] VSS[337] VSS[338] VSS[339] VSS[340] VSS[341] VSS[342] VSS[343] VSS[344] VSS[345] VSS[346] VSS[347] VSS[348] VSS[349] VSS[350] VSS[351] VSS[352] VSS[353] VSS[354] VSS[355] VSS[356] VSS[366]

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

2

1

IbexPeak-M_R1P0

Size Document Number Rev

IBEX PEAK-M 6/6

Date: Sheet of

5

4

3

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

ZQ9

13 45Tuesday, June 22, 2010

1

1A

5

M_A_A[15:0]<5>

D D

M_A_BS#0<5> M_A_BS#1<5> M_A_BS#2<5> M_A_CS#0<5> M_A_CS#1<5> M_A_CLK0<5> M_A_CLK0#<5> M_A_CLK1<5> M_A_CLK1#<5> M_A_CKE0<5> M_A_CKE1<5> M_A_CAS#<5> M_A_RAS#<5>

R270 10K_4R270 10K_4 R269 10K_4R269 10K_4

C C

B B

M_A_WE#<5>

CLK_SCLK<3,15,27>

CLK_SDATA<3,15,27>

M_A_ODT0<5> M_A_ODT1<5>

M_A_DM[7:0]<5>

M_A_DQS[7:0]<5>

M_A_DQS#[7:0]<5>

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

DIMM0_SA0 DIMM0_SA1 CLK_SCLK CLK_SDATA

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

107

119

109 108

114 121 101 103 102 104

115 110 113 197 201 202 200

116 120

136 153 170 187

137 154 171 188

135 152 169 186

98 97 96 95 92 91 90 86 89 85

84 83

80 78

79

73 74

11 28 46 63

12 29 47 64

10 27 45 62

Place these Caps near So-Dimm0.

+1.5VSUS

C387

C371

C371 .1u/16V_4

.1u/16V_4

C387

5/27 cost down

.1u/16V_4

C376

C376 .1u/16V_4

.1u/16V_4

+

C367

C367 *330u/2V_7343

*330u/2V_7343

C365

10u/6.3V_6

C366

C366 10u/6.3V_6

10u/6.3V_6

C391

C391 10u/6.3V_6

10u/6.3V_6

C381

C381 10u/6.3V_6

10u/6.3V_6

C372

C372 10u/6.3V_6

10u/6.3V_6

C369

C369 10u/6.3V_6

10u/6.3V_6

C370

C370 .1u/16V_4

.1u/16V_4

C377

C377 .1u/16V_4

.1u/16V_4

4

JDIM1A

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14 A15

BA0 BA1 BA2 S0# S1# CK0 CK0# CK1 CK1# CKE0 CKE1 CAS# RAS# WE# SA0 SA1 SCL SDA

ODT0 ODT1

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

DDR3-DIMM1_H=8.0_Reverse

+SMDDR_VREF_DIMM

C379

.1u/16V_4

PC2100 DDR3 SDRAM SO-DIMM

DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46

(204P)

DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

C378

2.2u/6.3V_6

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9

5 7 15 17 4 6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

.1u/16V_4

M_A_DQ4 M_A_DQ0 M_A_DQ2 M_A_DQ3 M_A_DQ1 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ12 M_A_DQ13 M_A_DQ11 M_A_DQ10 M_A_DQ8 M_A_DQ9 M_A_DQ14 M_A_DQ15 M_A_DQ17 M_A_DQ20 M_A_DQ18 M_A_DQ19 M_A_DQ16 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ28 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ29 M_A_DQ31 M_A_DQ30 M_A_DQ36 M_A_DQ33 M_A_DQ35 M_A_DQ34 M_A_DQ32 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ45 M_A_DQ44 M_A_DQ47 M_A_DQ42 M_A_DQ41 M_A_DQ40 M_A_DQ46 M_A_DQ43 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ62 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ58

+SMDDR_VREF_DQ0

C385

2.2u/6.3V_6

C383

3

M_A_DQ[63:0] <5>

M3 solution

VREF_DQ_DIMM0<7>

+SMDDR_VREF

M1 solution

+SMDDR_VREF

R266 *M3@0_6R266 *M3@0_6

+SMDDR_VREF_DIMM

+1.5VSUS

R275 *SHORT0603R275 *SHORT0603

+1.5VSUS

R268 *SHORT0603R268 *SHORT0603

PM_EXTTS#0<4>

DDR3_DRAMRST#<4,15>

R276

R276 *10K_4

*10K_4

+SMDDR_VREF_DIMM

C403

R264

R264 *10K_4

*10K_4

R259

R259 *10K/F_4

*10K/F_4

+SMDDR_VREF_DQ0

R260

R260 *10K/F_4

*10K/F_4

C403 470p/X7R_4

470p/X7R_4

C380

C380 470p/X7R_4

470p/X7R_4

2

+1.5VSUS

2.48A

+3V

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM

JDIM1B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=8.0_Reverse

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

1

+0.75V_DDR_VTT

A A

+3V

C397

2.2u/6.3V_6

C394

C394 .1u/16V_4

.1u/16V_4

5

+0.75V_DDR_VTT

C393

C393 1U/6.3V_4

1U/6.3V_4

C375

C375 1U/6.3V_4

1U/6.3V_4

C374

C374 1U/6.3V_4

1U/6.3V_4

C389

C389 1U/6.3V_4

1U/6.3V_4

5/27 cost down

C373

4.7U/6.3V_6

4

C396

C412

4.7U/6.3V_6

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-0

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZQ9

1A

14 45Tuesday, June 22, 2010

1

5

4

3

2

1

JDIM2A

M_B_A[15:0]<5>

D D

M_B_BS#0<5> M_B_BS#1<5> M_B_BS#2<5> M_B_CS#0<5> M_B_CS#1<5> M_B_CLK0<5> M_B_CLK0#<5> M_B_CLK1<5> M_B_CLK1#<5> M_B_CKE0<5> M_B_CKE1<5> M_B_CAS#<5> M_B_RAS#<5>

R295 10K_4R295 10K_4 R298 10K_4R298 10K_4

+3V

C C

B B

M_B_WE#<5>

CLK_SCLK<3,14,27>

CLK_SDATA<3,14,27>

M_B_ODT0<5> M_B_ODT1<5>

M_B_DM[7:0]<5>

M_B_DQS[7:0]<5>

M_B_DQS#[7:0]<5>

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

DIMM1_SA0 DIMM1_SA1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

JDIM2A

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12/BC#

119

A13

80

A14

78

A15

109

BA0

108

BA1

79

BA2

114

S0#

121

S1#

101

CK0

103

CK0#

102

CK1

104

CK1#

73

CKE0

74

CKE1

115

CAS#

110

RAS#

113

WE#

197

SA0

201

SA1

202

SCL

200

SDA

116

ODT0

120

ODT1

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

PC2100 DDR3 SDRAM SO-DIMM

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7

PC2100 DDR3 SDRAM SO-DIMM

12 29 47

64 137 154 171 188

10

27

45

62 135 152 169 186

DDR3-DIMM1_H=4.0_Reverse

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

(204P)

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ5 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ0 M_B_DQ4 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ18 M_B_DQ17 M_B_DQ16 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ26 M_B_DQ25 M_B_DQ30 M_B_DQ27 M_B_DQ29 M_B_DQ24 M_B_DQ28 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ45 M_B_DQ47 M_B_DQ43 M_B_DQ44 M_B_DQ41 M_B_DQ46 M_B_DQ42 M_B_DQ48 M_B_DQ53 M_B_DQ50 M_B_DQ54 M_B_DQ52 M_B_DQ49 M_B_DQ51 M_B_DQ55 M_B_DQ60 M_B_DQ57 M_B_DQ63 M_B_DQ58 M_B_DQ59 M_B_DQ56 M_B_DQ62 M_B_DQ61

M_B_DQ[63:0] <5>

M3 solution

+SMDDR_VREF

5/26 change the footprint

VREF_DQ_DIMM1<7>

M1 solution

R299 *SHORT0603R299 *SHORT0603

R302 *M3@0_6R302 *M3@0_6

+1.5VSUS

R301

R301 *10K/F_4

*10K/F_4

+SMDDR_VREF_DQ1

R304

R304 *10K/F_4

*10K/F_4

PM_EXTTS#1<4>

DDR3_DRAMRST#<4,14>

C452

C452 470p/X7R_4

470p/X7R_4

+SMDDR_VREF_DQ1

+SMDDR_VREF_DIMM

2.48A

+1.5VSUS

+3V

JDIM2B

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

DDR3-DIMM1_H=4.0_Reverse

PC2100 DDR3 SDRAM SO-DIMM

(204P)

VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52

VTT1 VTT2

GND GND

44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196

203 204

205 206

+0.75V_DDR_VTT

+1.5VSUS

C439

C439 10u/6.3V_6

10u/6.3V_6

+3V

A A

Place these Caps near So-Dimm1.

C435

C438

C438 10u/6.3V_6

10u/6.3V_6

C443

2.2u/6.3V_6

C435 10u/6.3V_6

10u/6.3V_6

C436

C436 10u/6.3V_6

10u/6.3V_6

C427

C427 .1u/16V_4

.1u/16V_4

C408

C408 10u/6.3V_6

10u/6.3V_6

+0.75V_DDR_VTT

5

C437

C437 10u/6.3V_6

10u/6.3V_6

C407

C407 .1u/16V_4

.1u/16V_4

C425

C425 1U/6.3V_4

1U/6.3V_4

C434

C434 .1u/16V_4

.1u/16V_4

C414

C414 1U/6.3V_4

1U/6.3V_4

C406

C406 .1u/16V_4

.1u/16V_4

C405

C405 .1u/16V_4

.1u/16V_4

C433

C433 .1u/16V_4

.1u/16V_4

C424

C424 1U/6.3V_4

1U/6.3V_4

+SMDDR_VREF_DIMM

+

C450

C450 330u/2V_7343

330u/2V_7343

C415

C415 1U/6.3V_4

1U/6.3V_4

C413

.1u/16V_4

C416

2.2u/6.3V_6

5/27 for cost down

C411

4.7U/6.3V_6

4

+SMDDR_VREF_DQ1

C440

.1u/16V_4

C421

C402

4.7U/6.3V_6

C444

2.2u/6.3V_6

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

DDRIII SO-DIMM-1

Date: Sheet of

3

2

Date: Sheet of

PROJECT :

ZQ9

1A

15 45Tuesday, June 22, 2010

1

5

4

3

2

1

GPU_1(VGA)

PEG_TXP[0..15]<4>

PEG_TXN[0..15]<4>

PEG_RXP[0..15]<4>

D D

PEG_RXN[0..15]<4>

C C

B B

PEG_TXP[0..15] PEG_TXN[0..15]

PEG_RXP[0..15] PEG_RXN[0..15]

0518 SWAP PCIE for VGA side

PEG_TXP15<4>

PEG_TXN15<4>

PEG_TXP14<4>

PEG_TXN14<4>

PEG_TXP13<4>

PEG_TXN13<4>

PEG_TXP12<4>

PEG_TXN12<4>

PEG_TXP11<4>

PEG_TXN11<4>

PEG_TXP10<4>

PEG_TXN10<4>

PEG_TXP9<4> PEG_TXN9<4>

PEG_TXP8<4> PEG_TXN8<4>

PEG_TXP7<4> PEG_TXN7<4>

PEG_TXP6<4> PEG_TXN6<4>

PEG_TXP5<4>

PEG_TXN5<4>

PEG_TXP4<4>

PEG_TXN4<4>

PEG_TXP3<4>

PEG_TXN3<4>

PEG_TXP2<4>

PEG_TXN2<4>

PEG_TXP1<4>

PEG_TXN1<4>

PEG_TXP0<4>

PEG_TXN0<4>

PEG_TXP15

PEG_TXN15

PEG_TXP14

PEG_TXN14

PEG_TXP13

PEG_TXN13

PEG_TXP12

PEG_TXN12

PEG_TXP11

PEG_TXN11

PEG_TXP10

PEG_TXN10

PEG_TXP9

PEG_TXN9

PEG_TXP8

PEG_TXN8

PEG_TXP7

PEG_TXN7

PEG_TXP6

PEG_TXN6

PEG_TXP5

PEG_TXN5

PEG_TXP4

PEG_TXN4

PEG_TXP3

PEG_TXN3

PEG_TXP2

PEG_TXN2

PEG_TXP1

PEG_TXN1

PEG_TXP0

PEG_TXN0

AA38

Y37

Y35

W36

W38

V37

V35 U36

U38 T37

T35 R36

R38 P37

P35 N36

N38 M37

M35

K37

K35

H37

H35 G36

G38

E37

L36

L38

J36

J38

F37

F35

U15A

PCIE_RX0P PCIE_RX0N

PCIE_RX1P PCIE_RX1N

PCIE_RX2P PCIE_RX2N

PCIE_RX3P PCIE_RX3N

PCIE_RX4P PCIE_RX4N

PCIE_RX5P PCIE_RX5N

PCIE_RX6P PCIE_RX6N

PCIE_RX7P PCIE_RX7N

PCIE_RX8P PCIE_RX8N

PCIE_RX9P PCIE_RX9N

PCIE_RX10P PCIE_RX10N

PCIE_RX11P PCIE_RX11N

PCIE_RX12P PCIE_RX12N

PCIE_RX13P PCIE_RX13N

PCIE_RX14P PCIE_RX14N

PCIE_RX15P PCIE_RX15N

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P PCIE_TX10N

PCIE_TX11P PCIE_TX11N

PCIE_TX12P PCIE_TX12N

PCIE_TX13P PCIE_TX13N

PCIE_TX14P PCIE_TX14N

PCIE_TX15P PCIE_TX15N

0518 SWAP PCIE for VGA side

CPEG_RXP15

Y33

CPEG_RXN15

Y32

CPEG_RXP14

W33

CPEG_RXN14

W32

CPEG_RXP13

U33

CPEG_RXN13

U32

CPEG_RXP12

U30

CPEG_RXN12

U29

CPEG_RXP11

T33

CPEG_RXN11

T32

CPEG_RXP10

T30

CPEG_RXN10

T29

CPEG_RXP9

P33

CPEG_RXN9

P32

CPEG_RXP8

P30

CPEG_RXN8

P29

CPEG_RXP7

N33

CPEG_RXN7

N32

CPEG_RXP6

N30

CPEG_RXN6

N29

CPEG_RXP5

L33

CPEG_RXN5

L32

CPEG_RXP4

L30

CPEG_RXN4

L29

CPEG_RXP3

K33

CPEG_RXN3

K32

CPEG_RXP2

J33

CPEG_RXN2

J32

CPEG_RXP1

K30

CPEG_RXN1

K29

CPEG_RXP0

H33

CPEG_RXN0

H32

C116 EV@0.1u/10V_4C116 EV@0.1u/10V_4 C107 EV@0.1u/10V_4C107 EV@0.1u/10V_4

C122 EV@0.1u/10V_4C122 EV@0.1u/10V_4 C117 EV@0.1u/10V_4C117 EV@0.1u/10V_4

C126 EV@0.1u/10V_4C126 EV@0.1u/10V_4 C123 EV@0.1u/10V_4C123 EV@0.1u/10V_4

C127 EV@0.1u/10V_4C127 EV@0.1u/10V_4 C135 EV@0.1u/10V_4C135 EV@0.1u/10V_4

C136 EV@0.1u/10V_4C136 EV@0.1u/10V_4 C151 EV@0.1u/10V_4C151 EV@0.1u/10V_4

C150 EV@0.1u/10V_4C150 EV@0.1u/10V_4 C159 EV@0.1u/10V_4C159 EV@0.1u/10V_4

C160 EV@0.1u/10V_4C160 EV@0.1u/10V_4 C172 EV@0.1u/10V_4C172 EV@0.1u/10V_4

C181 EV@0.1u/10V_4C181 EV@0.1u/10V_4 C180 EV@0.1u/10V_4C180 EV@0.1u/10V_4

C190 EV@0.1u/10V_4C190 EV@0.1u/10V_4 C189 EV@0.1u/10V_4C189 EV@0.1u/10V_4

C198 EV@0.1u/10V_4C198 EV@0.1u/10V_4 C197 EV@0.1u/10V_4C197 EV@0.1u/10V_4

C207 EV@0.1u/10V_4C207 EV@0.1u/10V_4 C206 EV@0.1u/10V_4C206 EV@0.1u/10V_4

C205 EV@0.1u/10V_4C205 EV@0.1u/10V_4 C204 EV@0.1u/10V_4C204 EV@0.1u/10V_4

C202 EV@0.1u/10V_4C202 EV@0.1u/10V_4 C203 EV@0.1u/10V_4C203 EV@0.1u/10V_4

C212 EV@0.1u/10V_4C212 EV@0.1u/10V_4 C213 EV@0.1u/10V_4C213 EV@0.1u/10V_4

C209 EV@0.1u/10V_4C209 EV@0.1u/10V_4 C208 EV@0.1u/10V_4C208 EV@0.1u/10V_4

C211 EV@0.1u/10V_4C211 EV@0.1u/10V_4 C210 EV@0.1u/10V_4C210 EV@0.1u/10V_4

PEG_RXP15 <4>

PEG_RXN15 <4>

PEG_RXP14 <4>

PEG_RXN14 <4>

PEG_RXP13 <4>

PEG_RXN13 <4>

PEG_RXP12 <4>

PEG_RXN12 <4>

PEG_RXP11 <4>

PEG_RXN11 <4>

PEG_RXP10 <4>

PEG_RXN10 <4>

PEG_RXP9 <4>

PEG_RXN9 <4>

PEG_RXP8 <4>

PEG_RXN8 <4>

PEG_RXP7 <4>

PEG_RXN7 <4>

PEG_RXP6 <4>

PEG_RXN6 <4>

PEG_RXP5 <4>

PEG_RXN5 <4>

PEG_RXP4 <4>

PEG_RXN4 <4>

PEG_RXP3 <4>

PEG_RXN3 <4>

PEG_RXP2 <4>

PEG_RXN2 <4>

PEG_RXP1 <4>

PEG_RXN1 <4>

PEG_RXP0 <4>

PEG_RXN0 <4>

CLOCK

CLK_PCIE_VGA<10> CLK_PCIE_VGA#<10>

For Broadway, Madison and Park

A A

the PWRGOOD ball must be conneccted to ground

R52 EV@10K_4R52 EV@10K_4

GPU_RST#<11>

5

AB35 AA36

AJ21 AK21 AH16

AA30

PCIE_REFCLKP PCIE_REFCLKN

NC#1 NC#2 PWRGOOD

PERSTB

EV@Park_M2

4

CALIBRATION

PCIE_CALRP

PCIE_CALRN

R72 EV@1.27K/F_4R72 EV@1.27K/F_4

Y30

R74 EV@2K/F_4R74 EV@2K/F_4

Y29

+1V

+1.0V

For M97, Broadway, Madison and Park PCIE_VDDC is 1.0V

3

2

AJ007720T02Madison

Park

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Madison/Park M2-PCIE I/F

Date: Sheet of

PROJECT :

AJ077400T08

ZQ9

16 45Tuesday, June 22, 2010

1

1A

5

GPU_2(VGA)

D D

GPU Power-on sequence

1 => MAINON 2 => +VGPU_CORE 3 => +1V 4 => +1.5V_GPU 5 => +1.8V_GPU 6 => GPU_RST#

C C

3.3V GPIO

5/17 delete

B B

+1.8V_GPU

+1V

A A

+1.8V_GPU

EV@SBY100505T-121Y-N/300mA/120ohm_4L12 EV@SBY100505T-121Y-N/300mA/120ohm_4L12

EV@SBY100505T-121Y-N/300mA/120ohm_4L9 EV@SBY100505T-121Y-N/300mA/120ohm_4L9

EV@SBY100505T-121Y-N/300mA/120ohm_4L14 EV@SBY100505T-121Y-N/300mA/120ohm_4L14

5

C57

EV@10u/6.3V_6

C41

EV@10u/6.3V_6

C63

EV@10u/6.3V_6

+1.8V(75mA)

C58

EV@1u/6.3V_4

+1.0V(125mA)

C50

EV@1u/6.3V_4

+1.8V(5mA)

C71

EV@0.1u/10V_4

+3V_D

R358

*EV@10K/F_4

R359

*EV@10K/F_4

DPLL_PVDD

C65

EV@0.1u/10V_4

DPLL_VDDC

C62

EV@0.1u/10V_4

1.8V GPIO

GPIO3_SMBDAT<21> GPIO4_SMBCLK<21>

EV_LVDS_BLON<23>

+3V_D

5/17 change to test pad

R347

*EV@10K_4

R352

EV@10K_4

HDMI_HP_EV<24>

5/13 add for cost down solution

27M_CLK_SS<3>

TS_VDD

4

NC on Park

RAM_STRAP0<21> RAM_STRAP1<21> RAM_STRAP2<21>

NC on Park

+3V_D

R47

EV@10K_4

GPU_GPIO0<21> GPU_GPIO1<21> GPU_GPIO2<21>

1/21 ramp remove IO_VID0

GPU_GPIO11<21> GPU_GPIO12<21> GPU_GPIO13<21>

VID1<42>

ALT#_GPIO17<21>

VID2<42>

5/17 change to test pad

27M_CLK<3>

C502 EV@27p/50V_4C502 EV@27p/50V_4

C501 EV@27p/50V_4C501 EV@27p/50V_4

R41 *EV@10K_4R41 *EV@10K_4

+3V_D

D3D

R357 *EV@0_4R357 *EV@0_4

21

Y3

EV@27MHZY3EV@27MHZ

GPU_D+<21> GPU_D-<21>

4

5/17 delete workaround

+1.8V_GPU

R360

EV@1M/F_4

27M_CLK

R29

EV@499/F_4

R35

EV@249/F_4

T36T36

T32T32

R49

EV@10K_4

T33T33 T35T35

T34T34

C60

EV@0.1u/10V_4

DPLL_PVDD

DPLL_VDDC

XTALI_27M XTALO_27M

TS_VDD

VREFG

U15B

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16_SSIN

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF

AH24

GENERICG

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AJ32

TSVDD

AJ33

TSVSS

EV@Park_M2

MUTI GFX

I2C

PLL/CLOCK

THERMAL

3

TXCAP_DPA3P

TXCAM_DPA3N

TX0P_DPA2P TX0M_DPA2N

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P

TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC2

H2SYNC V2SYNC

A2VDDQ A2VSSQ

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

3

HSYNC VSYNC

RSET AVDD

AVSSQ VDD1DI

VSS1DI

COMP

VDD2DI VSS2DI

A2VDD

R2SET

AUX1P AUX1N

AUX2P AUX2N

R2B

G2B

AU24 AV23

AT25 AR24

AU26 AV25

AT27 AR26

AR30 AT29

AV31 AU30

AR32 AT31

AT33 AU32

AU14 AV13

AT15 AR14

AU16 AV15

AT17 AR16

AU20 AT19

AT21 AR20

AU22 AV21

AT23 AR22

AD39

R

AD37

RB

AE36

G

AD35

GB

AF37

B

AE38

BB

AC36 AC38

AB34 AD34

AE34 AC33

AC34

AC30

R2

AC31 AD30

G2

AD31 AF30

B2

AF31

B2B

AC32

C

AD32

Y

AF32

AD29 AC29

AG31 AG32

AG33 AD33 AF33

AA29

AM26 AN26

AM27 AL27

AM19 AL19

AN20 AM20

AL30 AM30

AL29 AM29

AN21 AM21

AJ30 AJ31

AK30 AK29

R71 EV@499/F_4R71 EV@499/F_4

AVDD

VDD1DI

R56 EV@0_4R56 EV@0_4

R57 EV@0_4R57 EV@0_4

T4T4

VDD1DI

R58 EV@0_4R58 EV@0_4

R59 EV@0_4R59 EV@0_4

A2VDDQ

R69 EV@715/F_4R69 EV@715/F_4

T2T2

HDMICLK+ <24> HDMICLK- <24>

HDMITX0P <24> HDMITX0N <24>

HDMITX1P <24> HDMITX1N <24>

HDMITX2P <24> HDMITX2N <24>

Channel D N.C for Park-M2

R60

EV_HSYNC <21,23> EV_VSYNC <21,23>

R60

EV@150/F_4

DAC2 will be NC on future ASIC

V2SYNC <21>

(3.3V@130mA A2VDD)

+3V_D

C80

EV@0.1u/10V_4

MXM_DDCCK <24> MXM_DDCDAT <24>

EV_LVDS_DDCCLK <23> EV_LVDS_DDCDAT <23>

EV_CRTDCLK <23>

EV_CRTDDAT <23>

HDMI

DDC AUX4 NC for Park_M2 LVDS CRT DDC AUX7 NC for Park_M2

2

EV@Park_M2

R62

EV@150/F_4

2

U15G

LVDS CONTROL

LVTMDP

R65

EV@150/F_4

VARY_BL

DIGON

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P TXOUT_U2N_DPF0N

TXOUT_U3P TXOUT_U3N

TXCLK_LP_DPE3P TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

TXOUT_L3P TXOUT_L3N

A2VDDQ

AK27 AJ27

AK35 AL36

AJ38 AK37

AH35 AJ36

AG38 AH37

AF35 AG36

AP34 AR34

AW37 AU35

AR37 AU39

AP35 AR35

AN36 AP37

EV_CRT_RED <23>

EV_CRT_GRN <23>

EV_CRT_BLU <23>

(1.8V@70mA AVDD)

AVDD

C99

EV@0.1u/10V_4

EV@0.1u/10V_4R67 EV@0_4R67 EV@0_4

(1.8V@100mA VDD1DI)

VDD1DI

C72

EV@0.1u/10V_4

(1.8V@2mA A2VDDQ)

C100

EV@0.1u/10V_4

1

EV_LVDS_BRIGHT <23> EV_LVDS_VDDEN <23>

EV_TXLCLKOUT+ <23> EV_TXLCLKOUT- <23>

EV_TXLOUT0+ <23> EV_TXLOUT0- <23>

EV_TXLOUT1+ <23> EV_TXLOUT1- <23>

EV_TXLOUT2+ <23> EV_TXLOUT2- <23>

+1.8V_GPU

EV@SBY100505T-121Y-N/300mA/120ohm_4L16 EV@SBY100505T-121Y-N/300mA/120ohm_4L16

C89

C90

EV@1u/6.3V_4

EV@10u/6.3V_6

EV@SBY100505T-121Y-N/300mA/120ohm_4L15 EV@SBY100505T-121Y-N/300mA/120ohm_4L15

C75

C70

EV@1u/6.3V_4

EV@10u/6.3V_6

+1.8V_GPU

EV@SBY100505T-121Y-N/300mA/120ohm_4L41 EV@SBY100505T-121Y-N/300mA/120ohm_4L41

C103

EV@1u/6.3V_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Madison/Park M2-HOST I/F

Date: Sheet of

PROJECT :

ZQ9

17 45Tuesday, June 22, 2010

1

17 45Tuesday, June 22, 2010

1A

GPU_3(VGA)

5

4

3

2

1

Park M2-channel B used(S3 package use Channel A)

VMB_DQ[63..0]<22>

U15C

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C37

DQA0_0/DQA_0

MVREFDA MVREFSA

AG12

AH12

AL31

C35 A35 E34

G32

D33 F32 E32 D31 F30 C30 A30 F28 C28 A28 E28 D27 F26 C26 A26 F24 C24 A24 E24 C22 A22 F22 D21 A20 F20 D19 E18 C18 A18 F18 D17 A16 F16 D15 E14 F14 D13 F12 A12 D11 F10 A10 C10

G13

H13 J13 H11

G10

G8 K9

K10

G9 A8 C8 E8 A6 C6 E6 A5

L18 L20

L27 N12

M12 M27

DQA0_1/DQA_1 DQA0_2/DQA_2 DQA0_3/DQA_3 DQA0_4/DQA_4 DQA0_5/DQA_5 DQA0_6/DQA_6 DQA0_7/DQA_7 DQA0_8/DQA_8 DQA0_9/DQA_9 DQA0_10/DQA_10 DQA0_11/DQA_11 DQA0_12/DQA_12 DQA0_13/DQA_13 DQA0_14/DQA_14 DQA0_15/DQA_15 DQA0_16/DQA_16 DQA0_17/DQA_17 DQA0_18/DQA_18 DQA0_19/DQA_19 DQA0_20/DQA_20 DQA0_21/DQA_21 DQA0_22/DQA_22 DQA0_23/DQA_23 DQA0_24/DQA_24 DQA0_25/DQA_25 DQA0_26/DQA_26 DQA0_27/DQA_27 DQA0_28/DQA_28 DQA0_29/DQA_29 DQA0_30/DQA_30 DQA0_31/DQA_31 DQA1_0/DQA_32 DQA1_1/DQA_33 DQA1_2/DQA_34 DQA1_3/DQA_35 DQA1_4/DQA_36 DQA1_5/DQA_37 DQA1_6/DQA_38 DQA1_7/DQA_39 DQA1_8/DQA_40 DQA1_9/DQA_41 DQA1_10/DQA_42 DQA1_11/DQA_43 DQA1_12/DQA_44 DQA1_13/DQA_45 DQA1_14/DQA_46 DQA1_15/DQA_47 DQA1_16/DQA_48 DQA1_17/DQA_49 DQA1_18/DQA_50 DQA1_19/DQA_51 DQA1_20/DQA_52 DQA1_21/DQA_53 DQA1_22/DQA_54 DQA1_23/DQA_55 DQA1_24/DQA_56 DQA1_25/DQA_57 DQA1_26/DQA_58 DQA1_27/DQA_59 DQA1_28/DQA_60 DQA1_29/DQA_61 DQA1_30/DQA_62 DQA1_31/DQA_63

MVREFDA MVREFSA

MEM_CALRN0 MEM_CALRN1 MEM_CALRN2

MEM_CALRP1 MEM_CALRP0 MEM_CALRP2

RSVD

EV@Park_M2

D D

+1.5V_GPU

R83

EV@40.2/F_4

C C

R84

EV@100/F_4

+1.5V_GPU

R81

EV@40.2/F_4

R82

EV@100/F_4

B B

MVREFDA

C200

EV@0.1u/10V_4

MVREFSA

C199

EV@0.1u/10V_4

R80 EV@243/F_4R80 EV@243/F_4 R79 EV@243/F_4R79 EV@243/F_4

+1.5V_GPU

R53 EV@243/F_4R53 EV@243/F_4 R77 EV@243/F_4R77 EV@243/F_4 R78 EV@243/F_4R78 EV@243/F_4

R51 EV@243/F_4R51 EV@243/F_4

Note by AN_M96_C1

6/9 stuff all for Park by AMD's suggestion

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAA0_0/MAA_0 MAA0_1/MAA_1 MAA0_2/MAA_2 MAA0_3/MAA_3 MAA0_4/MAA_4 MAA0_5/MAA_5 MAA0_6/MAA_6 MAA0_7/MAA_7 MAA1_0/MAA_8

MAA1_1/MAA_9 MAA1_2/MAA_10 MAA1_3/MAA_11 MAA1_4/MAA_12

MAA1_5/MAA_13_BA2 MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

MEMORY INTERFACE A

WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

EDCA0_0/QSA_0/RDQSA_0 EDCA0_1/QSA_1/RDQSA_1 EDCA0_2/QSA_2/RDQSA_2 EDCA0_3/QSA_3/RDQSA_3 EDCA1_0/QSA_4/RDQSA_4 EDCA1_1/QSA_5/RDQSA_5 EDCA1_2/QSA_6/RDQSA_6 EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/WDQSA_0 DDBIA0_1/QSA_1B/WDQSA_1 DDBIA0_2/QSA_2B/WDQSA_2 DDBIA0_3/QSA_3B/WDQSA_3 DDBIA1_0/QSA_4B/WDQSA_4 DDBIA1_1/QSA_5B/WDQSA_5 DDBIA1_2/QSA_6B/WDQSA_6 DDBIA1_3/QSA_7B/WDQSA_7

ADBIA0/ODTA0

ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B RASA0B

RASA1B CASA0B

CASA1B

CSA0B_0 CSA0B_1

CSA1B_0 CSA1B_1

CKEA0 CKEA1

WEA0B WEA1B

MAA0_8 MAA1_8

GDDR5

G24 J23 H24 J24 H26 J26 H21 G21 H19 H20 L13 G16 J16 H16 J17 H17

A32 C32 D23 E22 C14 A14 E10 D9

C34 D29 D25 E20 E16 E12 J10 D7

A34 E30 E26 C20 C16 C12 J11 F8

J21 G19

H27 G27

J14 H14

K23 K19

K20 K17

K24 K27

M13 K16

K21 J20

K26 L15

H23 J19

VMB_DM[7..0]<22>

VMB_RDQS[7..0]<22>

VMB_WDQS[7..0]<22>

VMB_MA[13..0]<22>

VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0]

VMB_MA[13..0]

+1.5V_GPU

R61

EV@40.2/F_4

R66

EV@100/F_4

+1.5V_GPU

R68

EV@40.2/F_4

R55

EV@100/F_4

VMB_BA0 VMB_BA1 VMB_BA2

C102

EV@0.1u/10V_4

C82

EV@0.1u/10V_4

VMB_BA0<22> VMB_BA1<22> VMB_BA2<22>

D3D

+3V_D

VMB_DQ0 VMB_DQ1 VMB_DQ2 VMB_DQ3 VMB_DQ4 VMB_DQ5 VMB_DQ6 VMB_DQ7 VMB_DQ8 VMB_DQ9 VMB_DQ10 VMB_DQ11 VMB_DQ12 VMB_DQ13 VMB_DQ14 VMB_DQ15 VMB_DQ16 VMB_DQ17 VMB_DQ18 VMB_DQ19 VMB_DQ20 VMB_DQ21 VMB_DQ22 VMB_DQ23 VMB_DQ24 VMB_DQ25 VMB_DQ26 VMB_DQ27 VMB_DQ28 VMB_DQ29 VMB_DQ30 VMB_DQ31 VMB_DQ32 VMB_DQ33 VMB_DQ34 VMB_DQ35 VMB_DQ36 VMB_DQ37 VMB_DQ38 VMB_DQ39 VMB_DQ40 VMB_DQ41 VMB_DQ42 VMB_DQ43 VMB_DQ44 VMB_DQ45 VMB_DQ46 VMB_DQ47 VMB_DQ48 VMB_DQ49 VMB_DQ50 VMB_DQ51 VMB_DQ52 VMB_DQ53 VMB_DQ54 VMB_DQ55 VMB_DQ56 VMB_DQ57 VMB_DQ58 VMB_DQ59 VMB_DQ60 VMB_DQ61 VMB_DQ62 VMB_DQ63

MVREFDB MVREFSB

R46 *EV@10K_4R46 *EV@10K_4 R63 EV@10K_4R63 EV@10K_4

R31

*EV@0_4

U15D

DDR2

DDR2 GDDR3/GDDR5

GDDR3/GDDR5 DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

R32

*EV@0_4

*EV@0_4 C45

EV@Park_M2

DDR2

DDR2 GDDR5/GDDR3

GDDR5/GDDR3 DDR3

DDR3

MAB0_0/MAB_0 MAB0_1/MAB_1 MAB0_2/MAB_2 MAB0_3/MAB_3 MAB0_4/MAB_4 MAB0_5/MAB_5 MAB0_6/MAB_6 MAB0_7/MAB_7 MAB1_0/MAB_8

MAB1_1/MAB_9 MAB1_2/MAB_10 MAB1_3/MAB_11 MAB1_4/MAB_12

MAB1_5/BA2 MAB1_6/BA0 MAB1_7/BA1

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

MEMORY INTERFACE B

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0 EDCB0_1/QSB_1/RDQSB_1 EDCB0_2/QSB_2/RDQSB_2 EDCB0_3/QSB_3/RDQSB_3 EDCB1_0/QSB_4/RDQSB_4 EDCB1_1/QSB_5/RDQSB_5 EDCB1_2/QSB_6/RDQSB_6 EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0 DDBIB0_1/QSB_1B/WDQSB_1 DDBIB0_2/QSB_2B/WDQSB_2 DDBIB0_3/QSB_3B/WDQSB_3 DDBIB1_0/QSB_4B/WDQSB_4 DDBIB1_1/QSB_5B/WDQSB_5 DDBIB1_2/QSB_6B/WDQSB_6 DDBIB1_3/QSB_7B/WDQSB_7

ADBIB0/ODTB0

ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B RASB0B

RASB1B CASB0B

CASB1B

CSB0B_0 CSB0B_1

CSB1B_0 CSB1B_1

CKEB0 CKEB1

WEB0B WEB1B

MAB0_8 MAB1_8

GDDR5

DRAM_RST

P8 T9 P9 N7 N8 N9 U9 U8 Y9 W9 AC8 AC9 AA7 AA8 Y8 AA9

H3 H1 T3 T5 AE4 AF5 AK6 AK5

F6 K3 P3 V5 AB5 AH1 AJ9 AM5

G7 K1 P1 W4 AC4 AH3 AJ8 AM3

T7 W7

L9 L8

AD8 AD7

T10 Y10

W10 AA10

P10 L10

AD10 AC10

U10 AA11

N10 AB11

T8 W8

AH11

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_BA2 VMB_BA0 VMB_BA1

VMB_DM0 VMB_DM1 VMB_DM2 VMB_DM3 VMB_DM4 VMB_DM5 VMB_DM6 VMB_DM7

VMB_RDQS0 VMB_RDQS1 VMB_RDQS2 VMB_RDQS3 VMB_RDQS4 VMB_RDQS5 VMB_RDQS6 VMB_RDQS7

VMB_WDQS0 VMB_WDQS1 VMB_WDQS2 VMB_WDQS3 VMB_WDQS4 VMB_WDQS5 VMB_WDQS6 VMB_WDQS7

VMB_CLKP0 VMB_CLKN0

VMB_CLKP1 VMB_CLKN1

VMB_RAS0# VMB_RAS1#

VMB_CAS0# VMB_CAS1#

VMB_CS0#

VMB_CS1#

VMB_CKE0 VMB_CKE1

VMB_WE0# VMB_WE1#

VMB_MA13

R37 EV@10/F_4R37 EV@10/F_4

R50

EV@5.1K_4

QSB[7..0]

QSB#[7..0]

EV@120P/50V_4

Place all these components very close to GPU

VMB_ODT0 <22> VMB_ODT1 <22>

VMB_CLKP0 <22> VMB_CLKN0 <22>

VMB_CLKP1 <22> VMB_CLKN1 <22>

VMB_RAS0# <22> VMB_RAS1# <22>

VMB_CAS0# <22> VMB_CAS1# <22>

VMB_CS0# <22>

VMB_CS1# <22>

VMB_CKE0 <22> VMB_CKE1 <22>

VMB_WE0# <22> VMB_WE1# <22>

R36 EV@51_4R36 EV@51_4

C45

5/17 Change the design

MEM_RST# <22>

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Madison/Park M2-MEM I/F

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZQ9

18 45Tuesday, June 22, 2010

1

18 45Tuesday, June 22, 2010

1A

5

4

3

2

1

GPU_4(VGA)

U15F

AB39

W31 W34

M17 M22 M24

E39 F34 F39 G33 G34 H31 H34 H39

J31

J34 K31 K34 K39 L31 L34 M34 M39 N31 N34 P31 P34 P39 R34 T31 T34 T39 U31 U34 V34 V39

Y34 Y39

F15 F17 F19 F21 F23 F25 F27 F29 F31 F33

F7

F9 G2 G6 H9

J2 J27

J6

J8

K14

K7

L11 L17

L2

L22 L24

L6

N16 N18

N2

N21 N23 N26

N6

R15 R17

R2

R20 R22 R24 R27

R6

T11 T13 T16 T18 T21 T23 T26 U15 U17

U2

U20 U22 U24 U27

U6

V11 V16 V18 V21 V23 V26

W2 W6

Y15 Y17 Y20 Y22 Y24 Y27 U13 V13

U15F

PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31 PCIE_VSS#32 PCIE_VSS#33 PCIE_VSS#34 PCIE_VSS#35

GND#100 GND#101 GND#102 GND#103 GND#104 GND#105 GND#106 GND#107 GND#108 GND#109 GND#110 GND#111 GND#112 GND#113 GND#114 GND#115 GND#116 GND#117 GND#118 GND#119 GND#120 GND#121 GND#122 GND#123 GND#124 GND#125 GND#126 GND#127 GND#128 GND#129 GND#130 GND#131 GND#132 GND#133 GND#134 GND#135 GND#136 GND#137 GND#138 GND#139 GND#140 GND#141 GND#142 GND#143 GND#144 GND#145 GND#146 GND#147 GND#148 GND#149 GND#150 GND#151 GND#153 GND#154 GND#155 GND#156 GND#157 GND#158 GND#159 GND#160 GND#161 GND#163 GND#164 GND#165 GND#166 GND#167 GND#168 GND#169 GND#170 GND#171 GND#172 GND#173 GND#174 GND#175 GND#152 GND#162

EV@Park_M2

GND

GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8

GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#56 GND#57 GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#84 GND#85 GND#86 GND#87 GND#88 GND#89 GND#90 GND#91 GND#92 GND#93 GND#94 GND#95 GND#96 GND#97 GND#98 GND#99

VSS_MECH#1 VSS_MECH#2 VSS_MECH#3

A3 A37 AA16 AA18 AA2 AA21 AA23 AA26 AA28 AA6 AB12 AB15 AB17 AB20 AB22 AB24 AB27 AC11 AC13 AC16 AC18 AC2 AC21 AC23 AC26 AC28 AC6 AD15 AD17 AD20 AD22 AD24 AD27 AD9 AE2 AE6 AF10 AF16 AF18 AF21 AG17 AG2 AG20 AG22 AG6 AG9 AH21 AJ10 AJ11 AJ2 AJ28 AJ6 AK11 AK31 AK7 AL11 AL14 AL17 AL2 AL20 AL21 AL23 AL26 AL32 AL6 AL8 AM11 AM31 AM9 AN11 AN2 AN30 AN6 AN8 AP11 AP7 AP9 AR5 AW34 B11 B13 B15 B17 B19 B21 B23 B25 B27 B29 B31 B33 B7 B9 C1 C39 E35 E5 F11 F13

A39 AW1 AW39

Size Document Number Rev

Date: Sheet of

PowerXpress control si gnal for Madsion and Park only If not used, can b e disconnected. PX_EN = LOW, turn on PX_EN = HIGH, turn off PX_EN is used to turn ON/OFF some regulators for Power Xpress mode. An output high ‘3. 3V’ will turn th e regulators OFF. An output lo w ‘0V’ will turn the regulators ON. PX_EN outputs low (0V) by default. If this signal is unused, it can be NC (not connected) or connected to ground.

R21 *EV@0_4R21 * EV@0_4

R15

R15 *EV@0_4

*EV@0_4

Pin AL21 to Ground for Broadway

Madison/Park M2 (PWR/GND)

+3V_D

Quanta Computer Inc.

PROJECT :

1

ZQ9

1A

19 45Tuesday, June 22, 2010

1A

U15E

AD11 AG10

AF26 AF27 AG26 AG27

AF23 AF24 AG23 AG24

AF13 AF15 AG13 AG15

AD12 AF11 AF12 AG11

AB37

AM10

AN10

AF28

AG28

AH29

AC7 AF7 AJ7

AK8 AL9 G11 G14 G17 G20 G23 G26 G29 H10

K11 K13

M11 N11

R11 U11

Y11

M20 M21

V12 U12

AN9

J7 J9

K8 L12 L16 L21 L23 L26

L7

P7

U7

Y7

H7

H8

U15E

MEM I/O

VDDR1#1 VDDR1#2 VDDR1#3 VDDR1#4 VDDR1#5 VDDR1#6 VDDR1#7 VDDR1#8 VDDR1#9 VDDR1#10 VDDR1#11 VDDR1#12 VDDR1#13 VDDR1#14 VDDR1#15 VDDR1#16 VDDR1#17 VDDR1#18 VDDR1#19 VDDR1#20 VDDR1#21 VDDR1#22 VDDR1#23 VDDR1#24 VDDR1#25 VDDR1#26 VDDR1#27 VDDR1#28 VDDR1#29 VDDR1#30 VDDR1#31 VDDR1#32 VDDR1#33 VDDR1#34

LEVEL

LEVEL TRANSLATION

TRANSLATION

VDD_CT#1 VDD_CT#2 VDD_CT#3 VDD_CT#4

I/O

VDDR3#1 VDDR3#2 VDDR3#3 VDDR3#4

VDDR4#4 VDDR4#5 VDDR4#7 VDDR4#8

VDDR4#1 VDDR4#2 VDDR4#3 VDDR4#6

NC_VDDRHA NC_VSSRHA

NC_VDDRHB NC_VSSRHB

PLL

PCIE_PVDD MPV18#1

MPV18#2

SPV18 SPV10 SPVSS

VOLTAGE

VOLTAGE SENESE

SENESE

FB_VDDC

FB_VDDCI

FB_GND

EV@Park_M2

+VGPU_CORE

C156

C156 EV@1u/6.3V_4

EV@1u/6.3V_4

C105

C105 EV@1u/6.3V_4

EV@1u/6.3V_4

C124

C124 EV@1u/6.3V_4

EV@1u/6.3V_4

+VGPU_CORE

C166

C166 EV@1u/6.3V_4

EV@1u/6.3V_4

Spec: 0.15A Rating: 3A

R343

R343 *EV@0_6

*EV@0_6

+3V_D

Spec: 0.15A Rating: 3A

+3V_D_S

+1.8V_GPU

C108

C108 EV@1u/6.3V_4

EV@1u/6.3V_4

C84

C84 EV@1u/6.3V_4

EV@1u/6.3V_4

C139

C139 EV@1u/6.3V_4

EV@1u/6.3V_4

C168

C168 EV@1u/6.3V_4

EV@1u/6.3V_4

B-test

2

PCIE

POWER

ISOLATED

ISOLATED CORE I/O

CORE I/O

CORE

PCIE

PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8

PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8

PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12

VDDC#1 VDDC#2 VDDC#3 VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8

VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#19 VDDC#20 VDDC#21 VDDC#22 VDDC#23 VDDC#24 VDDC#25 VDDC#26 VDDC#27 VDDC#28 VDDC#29 VDDC#30 VDDC#31 VDDC#32 VDDC#33 VDDC#34 VDDC#35 VDDC#36 VDDC#37 VDDC#38 VDDC#39 VDDC#40 VDDC#41 VDDC#42 VDDC#43 VDDC#44 VDDC#45 VDDC#46 VDDC#47 VDDC#48 VDDC#49 VDDC#50 VDDC#51 VDDC#52 VDDC#53 VDDC#54 VDDC#55 VDDC#56 VDDC#57 VDDC#58

VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8

VDDCI#9 VDDCI#10 VDDCI#11 VDDCI#12 VDDCI#13 VDDCI#14 VDDCI#15 VDDCI#16 VDDCI#17 VDDCI#18 VDDCI#19 VDDCI#20 VDDCI#21 VDDCI#22

PCIE_VDDR

AA31 AA32 AA33

C115

AA34

EV@0.1u/10V_4

V28 W29 W30 Y31

G30 G31 H29 H30 J29

C158

J30

EV@1u/6.3V_4

L28 M28 N28 R28 T28 U28

AA15 AA17 AA20 AA22 AA24 AA27 AB16 AB18 AB21 AB23 AB26 AB28 AC17 AC20 AC22 AC24 AC27 AD18 AD21 AD23 AD26 AF17 AF20 AF22 AG16 AG18 AG21 AH22 AH27 AH28 M26 N24 N27 R18 R21 R23 R26 T17 T20 T22 T24 T27 U16 U18 U21 U23 U26 V17 V20 V22 V24 V27 Y16 Y18 Y21 Y23 Y26 Y28

AA13 AB13 AC12 AC15 AD13 AD16 M15 M16 M18 M23 N13 N15 N17 N20 N22 R12 R13 R16 T12 T15 V15 Y13

C154

C154 EV@1u/6.3V_4

EV@1u/6.3V_4

C77

C77 EV@1u/6.3V_4

EV@1u/6.3V_4

C106

C106 EV@1u/6.3V_4

EV@1u/6.3V_4

C111

C111 EV@10u/6.3V_6

EV@10u/6.3V_6

BIF_VDDC should be connected to VDDC if BACO feature not used. For BACO, refer to the databook

PIN different between B roadway and Madison

N27

AL31

AL21

C162

C162 EV@1u/6.3V_4

EV@1u/6.3V_4

C93

C93 EV@10u/6.3V_6

EV@10u/6.3V_6

GPU +3V power

5/13 change the enable signal

Fine-tune Power-on sequence

MAINON<35,39,40,43>

dGPU_VRON<11,42>

4

C523

C523 EV@0.1u/10V_4

EV@0.1u/10V_4

C167

C167 EV@1u/6.3V_4

EV@1u/6.3V_4

C147

C147 EV@1u/6.3V_4

EV@1u/6.3V_4

C74

C74 EV@1u/6.3V_4

EV@1u/6.3V_4

C110

C110 EV@1u/6.3V_4

EV@1u/6.3V_4

C130

C130 EV@10u/6.3V_6

EV@10u/6.3V_6

Broadway Madison

VDDC BIF_VDDC

TS_A NC_TS_A

GND PX_EN

C119

C119 EV@1u/6.3V_4

EV@1u/6.3V_4

C174

C174 EV@10u/6.3V_6

EV@10u/6.3V_6

R26 *EV@0_4R26 *EV@0_4 R22 *EV@0_4R22 *EV@0_4

C3C

(1.8V@400mA PCIE_VDDR)

C121

C125

EV@1u/6.3V_4

(1.0V@1.1A PCIE_VDDC)

C187

C182

C182 EV@1u/6.3V_4

EV@1u/6.3V_4

C120

C118

EV@1u/6.3V_4

C96

C114

EV@1u/6.3V_4

C112

C88

EV@1u/6.3V_4

C113

C129

EV@10u/6.3V_6

(DDR3 1.12V@4A VDDCI) or more

C152

C169

EV@1u/6.3V_4

C132

C132 EV@10u/6.3V_6

EV@10u/6.3V_6

+3V +3V

R40

R40 *EV@4.7K_4

*EV@4.7K_4

Q1

2

*EV@DTC144EUA

C30

C30 *EV@1u/6.3V_4

*EV@1u/6.3V_4

*EV@DTC144EUA

1 3

3

C101

C101 EV@1u/6.3V_4

EV@1u/6.3V_4

C138

C138 EV@1u/6.3V_4

EV@1u/6.3V_4

C153

C153 EV@1u/6.3V_4

EV@1u/6.3V_4

C79

C79 EV@1u/6.3V_4

EV@1u/6.3V_4

C95

C95 EV@1u/6.3V_4

EV@1u/6.3V_4

C164

C164 EV@10u/6.3V_6

EV@10u/6.3V_6

C104

C104 EV@1u/6.3V_4

EV@1u/6.3V_4

2

C522

C522 EV@1u/6.3V_4

EV@1u/6.3V_4

C178

C178 EV@1u/6.3V_4

EV@1u/6.3V_4

C92

C92 EV@1u/6.3V_4

EV@1u/6.3V_4

C85

C85 EV@1u/6.3V_4

EV@1u/6.3V_4

C131

C131 EV@1u/6.3V_4

EV@1u/6.3V_4

C128

C128 EV@10u/6.3V_6

EV@10u/6.3V_6

C163

C163 EV@1u/6.3V_4

EV@1u/6.3V_4

+3V

1

*EV@AO3413

*EV@AO3413 Q3

Q3

3

C66

*EV@10u/6.3V_6

1

*EV@AO3413

*EV@AO3413 Q2

Q2

3

C24

*EV@10u/6.3V_6

L43 EV@HCB1608KF-181T15/1.5A/180ohm_6L43 EV@HCB1608KF-181T15/1.5A/180ohm_6

C526

C518

EV@1u/6.3V_4

EV@10u/6.3V_6

+1V

C188

C161

C161 EV@1u/6.3V_4

EV@1u/6.3V_4

EV@10u/6.3V_6

(30A or more)

C98

C157

EV@1u/6.3V_4

C94

C133

EV@1u/6.3V_4

C109

C134

C134 EV@1u/6.3V_4

EV@1u/6.3V_4

C165

C155

EV@1u/6.3V_4

5/24 stuff

R54

R54 EV@0_6

EV@0_6

0.5A

C78

C69

*EV@0.1u/10V_4

*EV@1u/6.3V_4

5/24 stuff

R23

R23 EV@0_6

EV@0_6

0.5A

C31

C26

*EV@0.1u/10V_4

*EV@1u/6.3V_4

For DDR3, MVDDQ = 1.5V (7.5A)

+1.5V_GPU

C195

EV@10u/6.3V_6

C176

EV@1u/6.3V_4

C191

EV@1u/6.3V_4

C145

EV@1u/6.3V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L5 EV@SBY100505T-121Y-N/300mA/120ohm_4L5

C515

C515 EV@10u/6.3V_6

EV@10u/6.3V_6

C201

C201 EV@10u/6.3V_6

EV@10u/6.3V_6

C44

C44 EV@10u/6.3V_6

EV@10u/6.3V_6

C46

C46 EV@10u/6.3V_6

EV@10u/6.3V_6

C141

EV@1u/6.3V_4

C183

EV@1u/6.3V_4

C186

EV@0.1u/10V_4

+3V_D

(3.3V@60mA))

C519

C519 EV@1u/6.3V_4

EV@1u/6.3V_4

C196

C196 EV@1u/6.3V_4

EV@1u/6.3V_4

C56

C56 EV@0.1u/10V_4

EV@0.1u/10V_4

C53

C53 EV@0.1u/10V_4

EV@0.1u/10V_4

D D

PCIE_PVDD

PCIE_VDDR

+1V

+1.8V_GPU

R371

*EV@0_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L42 EV@SBY100505T-121Y-N/300mA/120ohm_4L42

EV@SBY100505T-121Y-N/300mA/120ohm_4L17 EV@SBY100505T-121Y-N/300mA/120ohm_4L17

EV@SBY100505T-121Y-N/300mA/120ohm_4L7 EV@SBY100505T-121Y-N/300mA/120ohm_4L7

120 ohm/300mA

EV@SBY100505T-121Y-N/300mA/120ohm_4L10 EV@SBY100505T-121Y-N/300mA/120ohm_4L10

+1.8V_GPU

(1.8V@40mA PCIE_PVDD)

(1.8V@150mA MPV18)

(1.8V@75mA SPV18)

(1.0V@120mA SPV10)

C C

+1.8V_GPU

B B

+1.8V_GPU

GPU all PWROK

A A

R363

R363 EV@10K_4

EV@10K_4

2

Q8

2

+1.8V_GPU

EV@DTC144EUA

1 3

5

C194

C179

EV@10u/6.3V_6

C18

C64

EV@1u/6.3V_4

C144

C171

EV@1u/6.3V_4

C170

C175

EV@0.1u/10V_4

(1.8V@110mA VDD_CT)

C32

C32 EV@10u/6.3V_6

EV@10u/6.3V_6

C68

C76

EV@10u/6.3V_6

EV@1u/6.3V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L6 EV@SBY100505T-121Y-N/300mA/120ohm_4L6

C520

C520 EV@0.1u/10V_4

EV@0.1u/10V_4

C193

C193 EV@0.1u/10V_4

EV@0.1u/10V_4

VDDC_SENSE/VSS_SENSE and VDDCI_SENSE/VSS_SENSE route as differetial pair

+3V

R361

R361 EV@10K_4

EV@10K_4

Q7

Q7 EV@2N7002K

EV@2N7002K

dGPU_PWROK <11>

3

1

C59

EV@10u/6.3V_6

C86

EV@1u/6.3V_4

C192

EV@1u/6.3V_4

C185

EV@0.1u/10V_4

C81

C81 EV@1u/6.3V_4

EV@1u/6.3V_4

C83

C83 EV@1u/6.3V_4

EV@1u/6.3V_4

C87

C87 EV@1u/6.3V_4

EV@1u/6.3V_4

VDDC_CT

C91

C91 EV@0.1u/10V_4

EV@0.1u/10V_4

C73

C73 EV@1u/6.3V_4

EV@1u/6.3V_4

C97

C97 EV@0.1u/10V_4

EV@0.1u/10V_4

PCIE_PVDD

MPV18

SPV18

SPV10

C148

EV@10u/6.3V_6

C184

EV@1u/6.3V_4

C177

EV@1u/6.3V_4

VDDR4

T1T1

T3T3

5

4

3

2

1

GPU_5(VGA)

U15H

DP A/B POWERDP C/D POWER

DPA_VDD18

D D

+1.8V_GPU

C C

+1.8V_GPU

L40 EV@HCB1608KF-181T15/1.5A/180ohm_6L40 EV@HCB1608KF-181T15/1.5A/180ohm_6 C25

B B

+1V

180 ohm/1.5A

L13 EV@HCB1608KF-181T15/1.5A/180ohm_6L13 EV@HCB1608KF-181T15/1.5A/180ohm_6

A A

(1.8V@130mA DPA_VDD18)

EV@SBY100505T-121Y-N/300mA/120ohm_4L2 EV@SBY100505T-121Y-N/300mA/120ohm_4L2

C35

EV@10u/6.3V_6

(1.8V@400mA DPE/F_VDD18)

C511

C511 EV@0.1u/10V_4

EV@0.1u/10V_4

C509

C509 EV@1u/6.3V_4

EV@1u/6.3V_4

(1.0V@400mA DPE/F_VDD10)

C67

C54

C54 EV@0.1u/10V_4

EV@0.1u/10V_4

5

C67 EV@1u/6.3V_4

EV@1u/6.3V_4

C43

C43 EV@1u/10V_6

EV@1u/10V_6

DPE_VDD18

C510

C510 EV@10u/6.3V_6

EV@10u/6.3V_6

DPE_VDD10

C48

C48 EV@10u/6.3V_6

EV@10u/6.3V_6

DPA_VDD18

C51

C51 EV@0.1u/10V_4

EV@0.1u/10V_4

R27 EV@150/F_4R27 EV@150/F_4

DPE_VDD18

DPE_VDD10

DPE_VDD18

DPE_VDD10

R362 EV@150/F_4R362 EV@150/F_4

DPA_VDD10

DPA_VDD18

DPA_VDD10

DPCD_CALR

DPEF_CALR

4

AP20 AP21

AP13 AT13

AN17 AP16

AP17 AW14 AW16

AP22

AP23

AP14

AP15

AN19

AP18

AP19 AW20 AW22

AW18

AH34

AJ34

AL33

AM33

AN34

AP39

AR39

AU37 AW35

AF34

AG34

AK33

AK34

AF39

AH39

AK39

AL34

AM34

AM39

DPC_VDD18#1 DPC_VDD18#2

DPC_VDD10#1 DPC_VDD10#2

DPC_VSSR#1 DPC_VSSR#2 DPC_VSSR#3 DPC_VSSR#4 DPC_VSSR#5

DPD_VDD18#1 DPD_VDD18#2

DPD_VDD10#1 DPD_VDD10#2

DPD_VSSR#1 DPD_VSSR#2 DPD_VSSR#3 DPD_VSSR#4 DPD_VSSR#5

DPCD_CALR

DP E/F POWER

DPE_VDD18#1 DPE_VDD18#2

DPE_VDD10#1 DPE_VDD10#2

DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5

DPF_VDD18#1 DPF_VDD18#2

DPF_VDD10#1 DPF_VDD10#2

DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5

DPEF_CALR

EV@Park_M2

DPA_VDD18#1 DPA_VDD18#2

DPA_VDD10#1 DPA_VDD10#2

DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5

DPB_VDD18#1 DPB_VDD18#2

DPB_VDD10#1 DPB_VDD10#2

DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5

DPAB_CALR

DP PLL POWER

DPA_PVDD

DPA_PVSS

DPB_PVDD

DPB_PVSS

DPC_PVDD DPC_PVSS

DPD_PVDD DPD_PVSS

DPE_PVDD

DPE_PVSS

NC_DPF_PVDD

NC_DPF_PVSS

3

AN24 AP24

AP31 AP32

AN27 AP27 AP28 AW24 AW26

AP25 AP26

AN33 AP33

AN29 AP29 AP30 AW30 AW32

AW28

AU28 AV27

AV29 AR28

AU18 AV17

AV19 AR18

AM37 AN38

AL38 AM35

DPA_VDD18

DPA_VDD10

DPA_VDD18

DPA_VDD10

DPAB_CALR

R351 EV@150/F_4R351 EV@150/F_4

DPA_PVDD

C29

C29 EV@10u/6.3V_6

EV@10u/6.3V_6

DPB_PVDD

C25 EV@10u/6.3V_6

EV@10u/6.3V_6

DPC_PVDD

C36

C36 EV@10u/6.3V_6

EV@10u/6.3V_6

DPD_PVDD

C494

C494 EV@10u/6.3V_6

EV@10u/6.3V_6

DPE_PVDD

C507

C507 EV@10u/6.3V_6

EV@10u/6.3V_6

DPA_VDD10

C38

C38 EV@1u/6.3V_4

EV@1u/6.3V_4

C28

C28 EV@1u/6.3V_4

EV@1u/6.3V_4

C37

C37 EV@1u/6.3V_4

EV@1u/6.3V_4

C504

C504 EV@1u/6.3V_4

EV@1u/6.3V_4

C505

C505 EV@1u/6.3V_4

EV@1u/6.3V_4

(1.0V@110mA DPA_VDD10)

C55

R28

*EV@0_4

R25

C55 EV@1u/6.3V_4

EV@1u/6.3V_4

C47

C47 EV@10u/6.3V_6

EV@10u/6.3V_6

DPA_VDD18

DPA_PVDD

*EV@0_4

DPB_PVDD DPD_PVDD

(1.8V@20mA DPA_PVDD)

C40

C40 EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPB_PVDD)

C34

C34 EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPC_PVDD)

C503

C503 EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPD_PVDD)

C495

C495 EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@40mA DPE/F_PVDD)

C508

C508 EV@0.1u/10V_4

EV@0.1u/10V_4

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

DPC_PVDD

<Doc>

C49

EV@0.1u/10V_4

R34

*EV@0_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L11 EV@SBY100505T-121Y-N/300mA/120ohm_4L11

R33

EV@SBY100505T-121Y-N/300mA/120ohm_4L3 EV@SBY100505T-121Y-N/300mA/120ohm_4L3

EV@SBY100505T-121Y-N/300mA/120ohm_4L4 EV@SBY100505T-121Y-N/300mA/120ohm_4L4

EV@SBY100505T-121Y-N/300mA/120ohm_4L8 EV@SBY100505T-121Y-N/300mA/120ohm_4L8

EV@SBY100505T-121Y-N/300mA/120ohm_4L38 EV@SBY100505T-121Y-N/300mA/120ohm_4L38

EV@SBY100505T-121Y-N/300mA/120ohm_4L39 EV@SBY100505T-121Y-N/300mA/120ohm_4L39

Quanta Computer Inc.

PROJECT :

+1V

DPE_VDD18

DPE_PVDD

+1.8V_GPU

ZQ9

1

R366

*EV@0_4

1A

20 45Tuesday, June 22, 2010

5

4

3

2

1

PIN STRAPS(VGA)

CONFIGURATION STRAPS

+3V_D

GPU_GPIO0<17>

D D

GPU_GPIO1<17>

GPIO3_SMBDAT<17> GPIO4_SMBCLK<17>

5/17 Change for ROM table

GPU_GPIO13<17> GPU_GPIO12<17> GPU_GPIO11<17>

GPU_GPIO2<17>

EV_HSYNC<17,23>

EV_VSYNC<17,23>

V2SYNC<17>

C C

R42 *EV@10K_4R42 *EV@10K_4 R39 *EV@10K_4R39 *EV@10K_4

R45 *EV@10K_4R45 *EV@10K_4 R48 *EV@10K_4R48 *EV@10K_4

R24 *EV@10K_4R24 *EV@10K_4 R20 *EV@10K_4R20 *EV@10K_4 R30 EV@10K_4R30 EV@10K_4

R38 *EV@10K_4R38 *EV@10K_4

R368 EV@10K_4R368 EV@10K_4 R367 EV@10K_4R367 EV@10K_4

R356 *EV@10K_4R356 *EV@10K_4

Size of the primary memory apertures GPIO[13:11]

128 MB

256MB

64 MB

32 MB

More than 512 MB

000

001

010

011

Not Supported

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

STRAPS DESCRIPTION OF DEFAULT SETTINGSPIN

GPIO0TX_PWRS_ENB

GPIO1TX_DEEMPH_EN

BIOS_ROM_EN

BIF_GEN2_EN_A

GPIO_8_ROMSO

GPIO_9_ROMSI

VIP_DEVICE_STRAP_ENA V2SYNC

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG[2:0] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

GPIO2

GPIO8 H2SYNCH2SYNC GPIO21GPIO_21_BB_EN

HSYNCAUD[1] VSYNCAUD[0]

GPIO9

0 = 50% TX OUTPUT SWING

1 = FULL TX OUTPUT SWING PCIE TRANSMITTER DE-EMPHASIS ENABLED

0 = TX DE-EMPHASIS DISABLED

1 = TX DE-EMPHASIS ENABLED Enable external BIOS ROM device

0 - Disable external BIOS ROM device

1 - Enable external BIOS ROM device

0 = PCIE DEVICE AS 2.5GT/S CAPABLE

1 = PCIE DEVICE AS 5GT/S CAPABLE

Reserved Only

AUD[1:0] 00: NO AUDIO FUNCTION. 01: AUDIO FOR DISPLAYPORT AND HDMI IF ADAPTER IS DETECTED. 10: AUDIO FOR DISPLAYPORT ONLY.

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

0 = VGA controller capacity enable

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

DEFAULT

0

001

0

11

0

REMARK

See ROM table

See Audio table

EEPROM(VGA)

5/17 delete EEPROM

DDR3 Memory Aperture size(GPU)

DDR3 Memory size

Vendor

Vendor P/N

STN B/S P/N

DVPDATA_2

RAM_STRAP1RAM_STRAP2

DVPDATA_1

RAM_STRAP0

DVPDATA_0

1 01

Hynix

H5TQ1G63BFR-12C AKD5LZGTW04 (64M*16)

B B

H5TQ2G63BFR-12C AKD5MGGTW03 (128M*16)

Thermal Sensor(VGA)

WINDBOND

P/NVendor

AL83L771K01

GMT AL000780000

Samsung

USD0.16

K4W1G1646E-HC12

23EY2387MA12-SZ AKD5LGGT700

RAM_STRAP2<17>

RAM_STRAP1<17>

RAM_STRAP0<17>

AMD

R345 *EV@10K_4R345 *EV@10K_4

R354

R344 *EV@10K_4R344 *EV@10K_4 R353

R353

R346

R346 R355

R355

+3V_D_S

R365

R364

EV@10K_4

*EV@10K_4

MXM_SMCLK12<35>

A A

MXM_SMDATA12<35>

ALT#_GPIO17<17> VGA_THERM#<35>

5

ADDRESS: 98H

U13

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

EV@G780P81U

ADDRESS: 98H

VCC DXP DXN

GND

+3V_D_S

C512 EV@0.1u/10V_4C512 EV@0.1u/10V_4

1 2 3 5

4

C513

C513 EV@2200p/50V_4

EV@2200p/50V_4

GPU_D+ <17>

GPU_D- <17>

3

AKD5LGGT506 (64M*16)

AKD5MGGT500 (128m*16)K4W2G1646B-HC12

Samsung - 1Gb

EV@10K_4

*EV@10K_4

*EV@10K_4 EV@10K_4

EV@10K_4

+1.8V_GPU

2

1

0

1 10

0 0

0

0 0 1

00 1

RAM_STRAP2 SET DDR3 Vendor RAM_STRAP[1:0] SET SIZE.

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Strip/Thermal

Date: Sheet of

PROJECT :

ZQ9

21 45Tuesday, June 22, 2010

1

1A

5

VMB_DQ[63..0]<18>

VMB_DM[7..0]<18>

VMB_RDQS[7..0]<18>

VMB_WDQS[7..0]<18>

D D

C C

VMB_DQ[63..0] VMB_DM[7..0] VMB_RDQS[7..0] VMB_WDQS[7..0]

VMB_MA0<18> VMB_MA1<18> VMB_MA2<18> VMB_MA3<18> VMB_MA4<18> VMB_MA5<18> VMB_MA6<18> VMB_MA7<18> VMB_MA8<18>

VMB_MA9<18> VMB_MA10<18> VMB_MA11<18> VMB_MA12<18> VMB_MA13<18>

VMB_BA0<18>

VMB_BA1<18>

VMB_BA2<18>

VMB_CLKP0<18> VMB_CLKN0<18> VMB_CKE0<18>

VMB_ODT0<18>

VMB_CS0#<18>

VMB_RAS0#<18> VMB_CAS0#<18> VMB_WE0#<18>

MEM_RST#<18>

QSA[7..0] QSA#[7..0]

VREFC_VMB1 VREFD_VMB1

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12 VMB_MA13 VMB_MA13 VMB_MA13VMB_MA13

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP0 VMB_CLKN0 VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS3 VMB_RDQS0

VMB_DM3 VMB_DM0

VMB_WDQS3 VMB_WDQS0

MEM_RST#

VMB_ZQ1

R85

R85 EV@240/F_4

EV@240/F_4

U4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1 VSSQ#B9

VSSQ#D1 VSSQ#D8 VSSQ#E2 VSSQ#E8 VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ24

E3

VMB_DQ26

F7

VMB_DQ31

F2

VMB_DQ27

F8

VMB_DQ30

H3

VMB_DQ28

H8

VMB_DQ29

G2

VMB_DQ25

H7

VMB_DQ3

D7

VMB_DQ6

C3

VMB_DQ0 VMB_DQ14

C8

VMB_DQ4

C2

VMB_DQ2

A7

VMB_DQ5

A2

VMB_DQ1

B8

VMB_DQ7

A3

+1.5V_GPU

B2 D9 G7 K2 K8 N1 N9 R1 R9

+1.5V_GPU

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

BOT Down

4

3

2

1

CHANNEL B: 512MB DDR3 (16*64M*4pcs)

Park, M92M Use Channel B Memory Interface Only

U14

R348

R348 EV@240/F_4

EV@240/F_4

U14

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7 VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1

VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1 VSSQ#B9 VSSQ#D1

VSSQ#D8

VSSQ#E2 VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ32

E3

VMB_DQ37

F7

VMB_DQ35

F2

VMB_DQ36

F8

VMB_DQ33

H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMB_DQ38 VMB_DQ34 VMB_DQ39

VMB_DQ63 VMB_DQ59 VMB_DQ60 VMB_DQ56 VMB_DQ62 VMB_DQ57 VMB_DQ61 VMB_DQ58

4

7

+1.5V_GPU

VREFC_VMB4 VREFD_VMB4

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP1 VMB_CLKN1 VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS5 VMB_RDQS6

VMB_DM5 VMB_DM6

VMB_WDQS5 VMB_WDQS6

MEM_RST#

U16

R374

R374 EV@240/F_4

EV@240/F_4

U16

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9

VDD#G7

VDD#K2 VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9 VSS#B3 VSS#E1 VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ20

E3

VMB_DQ18

F7

VMB_DQ16

F2

VMB_DQ21

F8

VMB_DQ19

H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

2

VMB_DQ22 VMB_DQ17 VMB_DQ23

VMB_DQ15 VMB_DQ10

VMB_DQ9

1

VMB_DQ12 VMB_DQ8 VMB_DQ13 VMB_DQ11

+1.5V_GPU

VMB_CLKP1<18> VMB_CLKN1<18>

+1.5V_GPU +1.5V_GPU

VMB_CKE1<18>

VMB_ODT1<18>

VMB_CS1#<18> VMB_RAS1#<18> VMB_CAS1#<18> VMB_WE1#<18>

VREFC_VMB3 VREFD_VMB3

VMB_MA0 VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP1 VMB_CLKN1 VMB_CKE1

VMB_ODT1 VMB_CS1# VMB_RAS1# VMB_CAS1# VMB_WE1#

VMB_RDQS4 VMB_RDQS7

VMB_DM7

VMB_WDQS4 VMB_WDQS7

MEM_RST#

VREFC_VMB2 VREFD_VMB2

VMB_MA0

3

0

VMB_MA1 VMB_MA2 VMB_MA3 VMB_MA4 VMB_MA5 VMB_MA6 VMB_MA7 VMB_MA8 VMB_MA9 VMB_MA10 VMB_MA11 VMB_MA12

VMB_BA0 VMB_BA1 VMB_BA2

VMB_CLKP0 VMB_CLKN0 VMB_CKE0

VMB_ODT0 VMB_CS0# VMB_RAS0# VMB_CAS0# VMB_WE0#

VMB_RDQS2 VMB_RDQS1

VMB_DM2 VMB_DM4 VMB_DM1

VMB_WDQS2 VMB_WDQS1

MEM_RST#

VMB_ZQ2 VMB_ZQ3

TOP Down TOP Up

VMB_ZQ4

R64

R64 EV@240/F_4

EV@240/F_4

U2

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

EV@VRAM _DDR3

BOT Up

100-BALL

100-BALL SDRAM DDR3

SDRAM DDR3

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

VDD#B2 VDD#D9 VDD#G7

VDD#K2

VDD#K8 VDD#N1 VDD#N9 VDD#R1 VDD#R9

VDDQ#A1 VDDQ#A8 VDDQ#C1 VDDQ#C9 VDDQ#D2 VDDQ#E9 VDDQ#F1 VDDQ#H2 VDDQ#H9

VSS#A9

VSS#B3

VSS#E1

VSS#G8

VSS#J2

VSS#J8 VSS#M1 VSS#M9 VSS#P1 VSS#P9 VSS#T1 VSS#T9

VSSQ#B1

VSSQ#B9 VSSQ#D1 VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9 VSSQ#G1 VSSQ#G9

VMB_DQ46

E3

VMB_DQ42

F7

VMB_DQ47

F2

VMB_DQ41

F8

VMB_DQ45

H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

B2 D9 G7 K2 K8 N1 N9 R1 R9

A1 A8 C1 C9 D2 E9 F1 H2 H9

A9 B3 E1 G8 J2 J8 M1 M9 P1 P9 T1 T9

B1 B9 D1 D8 E2 E8 F9 G1 G9

VMB_DQ40 VMB_DQ44 VMB_DQ43

VMB_DQ50 VMB_DQ55 VMB_DQ48 VMB_DQ52 VMB_DQ51 VMB_DQ54 VMB_DQ49 VMB_DQ53

5

6

+1.5V_GPU+1.5V_GPU

Group-B0 VREF Group-B1 VREF

B B

R379

R379 EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB1 VREFD_VMB1

C542

R384

R384 EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

MEM_B0 CLK

VMB_CLKP0 VMB_CLKN0

R380

R381

R381 EV@56.2/F_4

EV@56.2/F_4

A A

C545

C545 EV@0.01u/16V_4

EV@0.01u/16V_4

5

R76

R76 EV@4.99K/F_4

EV@4.99K/F_4

R75

R75 EV@4.99K/F_4

EV@4.99K/F_4

C140

C140 EV@0.1u/10V_4

EV@0.1u/10V_4

+1.5V_GPU

C532

C532 EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C534

C534 EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C527

C527 EV@10u/6.3V_6

EV@10u/6.3V_6

C525

C525 EV@1u/6.3V_4

EV@1u/6.3V_4

C17

C17 EV@1u/6.3V_4

EV@1u/6.3V_4

C173

C173 EV@10u/6.3V_6

EV@10u/6.3V_6

4

C536

C536 EV@1u/6.3V_4

EV@1u/6.3V_4

C217

C217 EV@1u/6.3V_4

EV@1u/6.3V_4

C543

C543 EV@10u/6.3V_6

EV@10u/6.3V_6

R372

R372 EV@4.99K/F_4

EV@4.99K/F_4

R373

R373 EV@4.99K/F_4

EV@4.99K/F_4

C533

C533 EV@1u/6.3V_4

EV@1u/6.3V_4

C146

C146 EV@1u/6.3V_4

EV@1u/6.3V_4

C544

C544 EV@10u/6.3V_6

EV@10u/6.3V_6

C535

C535 EV@0.1u/10V_4

EV@0.1u/10V_4

C531

C531 EV@1u/6.3V_4

EV@1u/6.3V_4

C524

C524 EV@1u/6.3V_4

EV@1u/6.3V_4

C215

C215 EV@1u/6.3V_4

EV@1u/6.3V_4

C142

C142 EV@1u/6.3V_4

EV@1u/6.3V_4

C528

C528 EV@10u/6.3V_6

EV@10u/6.3V_6

R383

R383 EV@4.99K/F_4

EV@4.99K/F_4

R382

R382 EV@4.99K/F_4

EV@4.99K/F_4

C20

C20 EV@1u/6.3V_4

EV@1u/6.3V_4

C218

C218 EV@1u/6.3V_4

EV@1u/6.3V_4

C540

C540 EV@0.1u/10V_4

EV@0.1u/10V_4

C530

C530 EV@1u/6.3V_4

EV@1u/6.3V_4

C19

C19 EV@1u/6.3V_4

EV@1u/6.3V_4

R17

R17 EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB3 VREFD_VMB3

C21

R16

R16 EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

Group-B1 decoupling CAPGroup-B0 decoupling CAP

+1.5V_GPU

C16

C216

EV@1u/6.3V_4

+1.5V_GPU

C27

C541

C541 EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C149

C498

C498 EV@10u/6.3V_6

EV@10u/6.3V_6

3

C214

C214 EV@1u/6.3V_4

EV@1u/6.3V_4

C500

C500 EV@1u/6.3V_4

EV@1u/6.3V_4

C52

C52 EV@10u/6.3V_6

EV@10u/6.3V_6

C23

C23 EV@1u/6.3V_4

EV@1u/6.3V_4

C33

C33 EV@1u/6.3V_4

EV@1u/6.3V_4

C516

C516 EV@1u/6.3V_4

EV@1u/6.3V_4

C517

C517 EV@1u/6.3V_4

EV@1u/6.3V_4

C496

C496 EV@10u/6.3V_6

EV@10u/6.3V_6

R369

R369 EV@4.99K/F_4

EV@4.99K/F_4

R370

R370 EV@4.99K/F_4

EV@4.99K/F_4

C497

C497 EV@10u/6.3V_6

EV@10u/6.3V_6

2

C521

C521 EV@0.1u/10V_4

EV@0.1u/10V_4

C143

C143 EV@1u/6.3V_4

EV@1u/6.3V_4

C529

C529 EV@1u/6.3V_4

EV@1u/6.3V_4

C39

C39 EV@1u/6.3V_4

EV@1u/6.3V_4

C42

C42 EV@1u/6.3V_4

EV@1u/6.3V_4

C499

C499 EV@1u/6.3V_4

EV@1u/6.3V_4

C537

C537 EV@1u/6.3V_4

EV@1u/6.3V_4

R43

R43 EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB4 VREFD_VMB4VREFC_VMB2 VREFD_VMB2

C61

R44

R44 EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

MEM_B1 CLK

Size Document Number Rev

Date: Sheet of

+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU

R19

R19 EV@4.99K/F_4

EV@4.99K/F_4

R18

C22

EV@4.99K/F_4

EV@0.1u/10V_4

VMB_CLKP1 VMB_CLKN1

R350

R349

EV@56.2/F_4

C493

C493 EV@0.01u/16V_4

EV@0.01u/16V_4

Quanta Computer Inc.

PROJECT :

MEMORY 2 channel B

ZQ9

1

1A

22 45Tuesday, June 22, 2010

1A

1

CRT Switch

0_ohm Resistor place close to Joint-Point

IV@

EV@

INT_CRT_RED<8> INT_CRT_GRN<8> INT_CRT_BLU<8>

INT_VSYNC<8> INT_HSYNC<8>

A A

INT_CRT_DDCDAT<8> INT_CRT_DDCCLK<8>

INT_CRT_RED INT_CRT_GRN INT_CRT_BLU

R95 IV@0_4R95 IV@0_4 R94 IV@0_4R94 IV@0_4 R93 IV@0_4R93 IV@0_4

RN7 IV@0_4P2RRN7 IV@0_4P2R

1 2

RN8 IV@0_4P2RRN8 IV@0_4P2R

1 2

2

VGA_RED VGA_GRN VGA_BLU

VSYNCINT_VSYNC HSYNCINT_HSYNC

43

CRTDDATAINT_CRT_DDCDAT CRTDCLKINT_CRT_DDCCLK

43

3

4

CRT

VGA_RED CRT_11

VGA_BLU

R189

R189 150/F_4

150/F_4

R177

R177 150/F_4

150/F_4

5

R165

R165 150/F_4

150/F_4

+5V

C322

C322 10p/50V_4

10p/50V_4

6

F2

SMD1206P110TFT

L27 BLM18BA750SN1D/0.3A/75ohm_6L27 BLM18BA750SN1D/0.3A/75ohm_6 L26 BLM18BA750SN1D/0.3A/75ohm_6L26 BLM18BA750SN1D/0.3A/75ohm_6 L25 BLM18BA750SN1D/0.3A/75ohm_6L25 BLM18BA750SN1D/0.3A/75ohm_6

C308

C308 10p/50V_4

10p/50V_4

12

C293

C293 10p/50V_4

10p/50V_4

D16 SSM22LLPTD16 SSM22LLPT

C637

C637 10p/50V_4

10p/50V_4

C272 0.1u/10V_4_X7RC272 0.1u/10V_4_X7R

CRTVDD5

CRT_R1 CRT_G1 CRT_B1 CRTHSYNC

C647

C653

10p/50V_4

7

1617

CN8

CN8 CRT-CONN

CRT-CONN

6

111

7

12

2 8

13

3 9

14

4

10

15

5

DDCDAT_1VGA_GRN

CRTVSYNC DDCCLK_1

T22T22

8

EV_CRT_BLU<17>

EV_CRT_GRN<17>

EV_CRT_RED<17>

EV_HSYNC<17,21> EV_VSYNC<17,21>

EV_CRTDCLK<17> EV_CRTDDAT<17>

B B

EV_CRT_BLU EV_CRT_GRN EV_CRT_RED

EV_HSYNC EV_VSYNC

EV_CRTDCLK EV_CRTDDAT

R391 EV@0_4R391 EV@0_4 R397 EV@0_4R397 EV@0_4 R399 EV@0_4R399 EV@0_4

RN15 EV@0_4P2RRN15 EV@0_4P2R

1 2

RN16 EV@0_4P2RRN16 EV@0_4P2R

1 2

LVDS

0_ohm Resistor place close to Joint-Point

EV_LVDS_DDCCLK<17> EV_LVDS_DDCDAT<17>

EV_LVDS_VDDEN<17>

EV_LVDS_BLON<17>

C C

D D

INT_LVDS_EDIDCLK<8>

INT_LVDS_EDIDDATA<8>

INT_LVDS_DIGON<8> INT_LVDS_BLON<8>

EV_TXLCLKOUT-<17> EV_TXLCLKOUT+<17>

EV_TXLOUT0-<17> EV_TXLOUT0+<17> EV_TXLOUT1-<17> EV_TXLOUT1+<17> EV_TXLOUT2-<17> EV_TXLOUT2+<17>

INT_TXLCLKOUT+<8> INT_TXLCLKOUT-<8>

INT_TXLOUT0+<8> INT_TXLOUT0-<8> INT_TXLOUT1+<8> INT_TXLOUT1-<8> INT_TXLOUT2+<8> INT_TXLOUT2-<8>

CONTRAST<35>

EV_LVDS_BRIGHT<17> INT_LVDS_BRIGHT<8>

1

EV_TXLCLKOUTEV_TXLCLKOUT+ EV_TXLOUT0EV_TXLOUT0+ EV_TXLOUT1EV_TXLOUT1+ EV_TXLOUT2EV_TXLOUT2+

R7 EV@0_4R7 EV@0_4 R12 *0_4R12 *0_4

R13 IV@0_4R13 IV@0_4

43

EV_LVDS_VDDEN EV_LVDS_BLON

INT_LVDS_DIGON INT_LVDS_BLON

INT_TXLCLKOUT+ INT_TXLCLKOUTINT_TXLOUT0+ INT_TXLOUT0INT_TXLOUT1+ INT_TXLOUT1INT_TXLOUT2+ INT_TXLOUT2-

VGA_BLU VGA_GRN VGA_RED

HSYNC VSYNC

CRTDCLK CRTDDATA

RN1 EV@0_4P2RRN1 EV@0_4P2R

1 2

43

RN14 EV@0_4P2RRN14 EV@0_4P2R

1 2

43

RN9 IV@0_4P2RRN9 IV@0_4P2R

1 2

43

RN6 IV@0_4P2RRN6 IV@0_4P2R

1 2

43

RN5 EV@0_4P2RRN5 EV@0_4P2R

1 2

43

RN2 EV@0_4P2RRN2 EV@0_4P2R

1 2

43

RN3 EV@0_4P2RRN3 EV@0_4P2R

1 2

43

RN4 EV@0_4P2RRN4 EV@0_4P2R

1 2

43

RN10 IV@0_4P2RRN10 IV@0_4P2R

1 2

43

RN13 IV@0_4P2RRN13 IV@0_4P2R

1 2

43

RN12 IV@0_4P2RRN12 IV@0_4P2R

1 2

43

RN11 IV@0_4P2RRN11 IV@0_4P2R

1 2

43

2

LCD_EDIDCLKEV_LVDS_DDCCLK LCD_EDIDDATAEV_LVDS_DDCDAT

LVDS_VDDEN

LVDS_BLON

LCD_EDIDCLKINT_LVDS_EDIDCLK LCD_EDIDDATAINT_LVDS_EDIDDATA

LVDS_VDDEN

LVDS_BLON

TXLCLKOUTTXLCLKOUT+ TXLOUT0TXLOUT0+ TXLOUT1TXLOUT1+ TXLOUT2TXLOUT2+

TXLCLKOUT+ TXLCLKOUTTXLOUT0+ TXLOUT0TXLOUT1+ TXLOUT1TXLOUT2+ TXLOUT2-

LVDS_BRIGHT

5/7 add

LCDVCC

3

LVDS

C14

R11

0_6

C12

*1u/6.3V_4

R5 0_6R5 0_6

C14

*1u/6.3V_4

+3V

C13

*1u/6.3V_4

+3VPCU

PT3661-BB : AL003661003 EM-6781-T3 : AL006781000

Lid Switch (Hall sensor)

C11

*1u/6.3V_4

5/7 add

+3V

CCD +3V-current budget 0.2A

+3V

C301

0.1u/10V_4_X7R

C315

0.1u/10V_4_X7R

LCD_EDIDCLK LCD_EDIDDATA

C632 .22u/25V_6C632 .22u/25V_6

VIN+3V

INVCC0

C8

0.1u/10V_4_X7R

VIN

0.8A

R8 *SHORT0805R8 *SHORT0805 R14 *SHORT0805R14 *SHORT0805

R9 2.2K_4R9 2.2K_4 R10 2.2K_4R10 2.2K_4

CCD-USB

LVDS_BRIGHT BL_ON

+3V

C7

1000p/50V_4C71000p/50V_4

TXLOUT0TXLOUT0+

TXLOUT1TXLOUT1+

TXLOUT2TXLOUT2+

TXLCLKOUTTXLCLKOUT+

USBP8-_R USBP8+_R

CCD_PWR

R6

R6 BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4

5/21 Change the LVDS connector and swap

R2 *0_4R2 *0_4

L1

1

2

HE1

HE1 PT3661-BB

PT3661-BB

3

2

3

RFCMF1632100M3T/200mA/90ohm

R3 *0_4R3 *0_4

USBP8+<10>

USBP8-<10>

0.1u/10V_4_X7RC491 0.1u/10V_4_X7RC491

4

C2

4.7u/25V_8C24.7u/25V_8

1 443

21

D13

D13 *VPORT_6

*VPORT_6

5

CRTVDD5

CRT_BYP

CRT_R1 CRT_G1 CRT_B1

U23

1

VCC_SYNC

7

VCC_DDC

8

BYP

2

VCC_VIDEO

3

VIDEO_1

4

VIDEO_2

5

VIDEO_3

6

GND

CM2009-02QR

SYNC_OUT2 SYNC_OUT1

SYNC_IN2 SYNC_IN1

DDC_IN1 DDC_IN2

DDC_OUT1 DDC_OUT2

16 14

15 13

10 11

9 12

CRT_VSYNC2 CRT_HSYNC2

VSYNC HSYNC

CRTDCLK CRTDDATA

DDCCLK_1 DDCDAT_1

6/21 change to 0 ohm

R458 0_4R458 0_4 R457 0_4R457 0_4

R462 2.7K_4R462 2.7K_4 R469 2.7K_4R469 2.7K_4

CRTVSYNC CRTHSYNC

+3V

R452

2.7K_4

CRTVDD5

R476

2.7K_4

C661 *.1u/10V_4C661 *.1u/10V_4 C620 *10p/50V_4C620 *10p/50V_4 C619 *10p/50V_4C619 *10p/50V_4 C631 10p/50V_4C631 10p/50V_4 C646 10p/50V_4C646 10p/50V_4

CRTVDD5 CRTVSYNC CRTHSYNC DDCCLK_1 DDCDAT_1

LCD Power

+3V

C3 1000p/50V_4C31000p/50V_4

CN5

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

34

27

34

28

29

31

29

31

30

LVDS

USBP8+_R

1

USBP8-_R

LID591#

C1

1U/6.3V_4C11U/6.3V_4

LVDS_VDDEN

Backlight Control

LVDS_BLON

6

R4

100K_4R4100K_4

6 4 3

U1

IN IN ON/OFF

AAT4280-4U1AAT4280-4

R378

R378 100K_4

100K_4

2

Q11

Q11 2N7002K

2N7002K

C10

C10 .01u/25V_4

.01u/25V_4

EC_FPBACK# <35>

ZQ9

8

LCDVCC

C4

22u/6.3V_8C422u/6.3V_8

LID591# <35>

23 45Tuesday, June 22, 2010

1A

1

OUT

2

GND GND

+3V

R377

R377 10K_4

10K_4

BL#

3

Q10

Q10 2N7002K

2N7002K

1

C6

5

*.1u/10V_4C6*.1u/10V_4

C5 *2.2u/10V_8C5*2.2u/10V_8

+3VPCU

C9

0.1u/10V_4_X7R

R375

R375 *100K_4

*100K_4

LID591#,EC intrnal PU

D14

D14 BAS316

R376

R376 10K_4

10K_4

3

2

1 3

1

Size Document Number Rev

Date: Sheet of

7

BAS316

2 1

BL_ON

2

Q9 DTC144EUAQ9DTC144EUA

Quanta Computer Inc.

PROJECT :

CRT/LVDS/CAMERA/LID

5

4

3

2

1

SW@HDMI-detect

2

Q20

Q20 2N7002D

2N7002D

6/18 stuff & unstuff

+3V

R277

EV@10K_4

3

Q21

EV@2N7002D

1

R528

1.5K_4

HDMI_DDCCLK_MB

R527

1.5K_4

HDMI_DDCDATA_MB

To MXM

HDMI_HP_EV <17>

6/11 change the P/N

I@ HDMI LEVEL SHIFTER

+3V

C349

PC0

PC1 DDCBUF_EN

CFG

C349

IV@.1u/10V_4

C350

IV@.1u/10V_4

C666

IV@.1u/10V_4

from PCH

Control by pin4 HPDEN_R

INT_HDMITX0N<8> INT_HDMITX0P<8>

INT_HDMITX2N<8> INT_HDMITX2P<8>

INT_HDMITX1P<8> INT_HDMITX1N<8>

INT_HDMICLK+<8> INT_HDMICLK-<8>

INT_HDMI_HPD<8>

SDVO_CTRLDAT<8>

SDVO_CTRLCLK<8>

+3V

R486 IV@2.2K_4R486 IV@2.2K_4 R485 IV@2.2K_4R485 IV@2.2K_4

R219 *4.7K_4R219 *4.7K_4

Active Buffer

U6

37 38 39 40

+3V

41 42 43 44 45 46

+3V

47 48 49

R188 IV@499/F_4R188 IV@499/F_4

R191 IV@0_4R191 IV@0_4 R190 IV@0_4R190 IV@0_4

DDCBUF_EN CFG

35

36

GND

GND IN_D1IN_D1+ VCC IN_D2IN_D2+ GND IN_D3IN_D3+ VCC IN_D4IN_D4+ GND

GND1VCC2TRIM3HPDEN4GND5REXT6HPD_S7SDA_S8SCL_S9NC10VCC11GND

+3V

PC0 PC1

HDMI_DDCDATA_SW

HDMI_DDCCLK_SW

+3V

CCT134CCT2

+3V

25

26

27

28

29

30

31

32

33

OE#

VCC

GND

DDC_EN

LS_REXT

GND

SCL_SINK

SDA_SINK

HPD_SINK

OUT_D1-

OUT_D1+

VCC

OUT_D2-

OUT_D2+

GND

OUT_D3-

OUT_D3+

VCC

OUT_D4-

OUT_D4+

12

IV@PS8101

+3V

C346

IV@

EV@

D D

5/19 stuff

+3V

C C

C346

IV@2.2u/6.3V_6

+3V

C341

IV@.1u/10V_4

R547 4.7K_4R547 4.7K_4 R548 *4.7K_4R548 *4.7K_4

R549 *4.7K_4R549 *4.7K_4

R217 *4.7K_4R217 *4.7K_4 R509 *4.7K_4R509 *4.7K_4

R218 *4.7K_4R218 *4.7K_4

Equalization Control PC1

PC0

EQ Control

PIN4

PIN3

L L

H

L H L

H

C667

IV@.1u/10V_4

close to pin2/11/15/21/26/33/40/46

C321

*IV@.1u/10V_4

PC0 internal PD PC1 internal PD DDCBUF_EN internal PD

8dB

CFG internal PD

4dB

DDC_EN internal PU

12dB 0dB

24 23 22 21 20 19 18 17 16 15 14 13

HDMI_MB_HP HDMI_DDCDATA_MB HDMI_DDCCLK_MB HDMI_HPD_EC#

MB_HDMITX0N MB_HDMITX0P

+3V

MB_HDMITX2N MB_HDMITX2P

MB_HDMITX1P MB_HDMITX1N

+3V

MB_HDMICLK+ MB_HDMICLK-

HDMI_HPD_PCH#<9>

HDMI_HPD_EC#<35>

I2C

5/24 change to +3V

MXM_DDCCK<17>

5/24 change to +3V

MXM_DDCDAT<17>

R282 *0_4R282 *0_4

HDMI_HPD_EC#

HDMI_MB_HP

5/14 change design

+5V

+3V +3V

+5V

R236

EV@1.5K_4

+3V

R237

EV@1.5K_4

1

+3V

R283

R283 *10K_4

*10K_4

Q14 EV@BSN20Q14 EV@BSN20

R215 *EV@0_4R215 *EV@0_4R510 *4.7K_4R510 *4.7K_4

1

3

2

1

D19 RB501V-40D19 RB501V-40

2 1

2

3

D18 RB501V-40D18 RB501V-40

2 1

+3V

2

Q13 EV@BSN20Q13 EV@BSN20

3

R216 *EV@0_4R216 *EV@0_4

R278

R278 10K_4

10K_4

6/11 change the P/N

B B

Switchable Graphic HDMI source

From GPU

A A

HDMITX0N<17> HDMITX0P<17>

HDMITX2N<17> HDMITX2P<17>

HDMITX1P<17> HDMITX1N<17>

HDMICLK+<17> HDMICLK-<17>

5/7 change

*EV@1M_4

5

AC-coupling CAP place close to HDMI-connector

C347 EV@0.1u/10V_4_X7RC347 EV@0.1u/10V_4_X7R C348 EV@0.1u/10V_4_X7RC348 EV@0.1u/10V_4_X7R

C343 EV@0.1u/10V_4_X7RC343 EV@0.1u/10V_4_X7R C340 EV@0.1u/10V_4_X7RC340 EV@0.1u/10V_4_X7R

C339 EV@0.1u/10V_4_X7RC339 EV@0.1u/10V_4_X7R C337 EV@0.1u/10V_4_X7RC337 EV@0.1u/10V_4_X7R

C333 EV@0.1u/10V_4_X7RC333 EV@0.1u/10V_4_X7R C323 EV@0.1u/10V_4_X7RC323 EV@0.1u/10V_4_X7R

R492

R488

EV@499/F_4

3

Q12

2

+5V

R467

EV@2N7002D

1

6/11 change the P/N

EV@499/F_4

R494

EV@499/F_4

R497

EV@499/F_4

R501

EV@499/F_4

R503

EV@499/F_4

4

R505

EV@499/F_4

MB_HDMITX0N MB_HDMITX0P

MB_HDMITX2N MB_HDMITX2P

MB_HDMITX1P MB_HDMITX1N

MB_HDMICLK+ MB_HDMICLK-

R506

EV@499/F_4

EMI

R502 *100/F_4R502 *100/F_4

R496 *100/F_4R496 *100/F_4

R507 *100/F_4R507 *100/F_4

R490 *100/F_4R490 *100/F_4

3

MB_HDMITX2P

MB_HDMITX2N MB_HDMITX1P

MB_HDMITX1N MB_HDMITX0P

MB_HDMITX0N MB_HDMICLK+

MB_HDMICLK-

MB_HDMITX2P MB_HDMITX2N

MB_HDMITX1P MB_HDMITX1N

MB_HDMITX0P MB_HDMITX0N

MB_HDMICLK+

+5V

F1

F1 SMD1206P110TFT

SMD1206P110TFT

12

HDMI_MB_HP

2

MB_HDMICLK-

HDMI_DDCCLK_MB HDMI_DDCDATA_MB

D20 SSM22LLPTD20 SSM22LLPT

R271 *Short_4R271 *Short_4

R546

R546 100K_4

100K_4

Size Document Number Rev

Date: Sheet of

HDMI connector

CN11

1

D2+

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

HDMI

Quanta Computer Inc.

PROJECT :

HDMI (PS8101)

1

SHELL1

SHELL2

ZQ9

GND GND

20

23 22

21

24 45Tuesday, June 22, 2010

1A

5

Giga-LAN BCM57780

4

3

2

1

U8

+3V_S5

D D

VAUX_12

C C

CLK_PCIE_LAN_REQ#<10>

33p_4C420 33p_4C420

1.2H

33p_4C419 33p_4C419

L53

BLM18AG601SN1_6

L54

BLM18AG601SN1_6

L55

BLM18AG601SN1_6

PCIE_RX1+<10> PCIE_RX1-<10>

CLK_PCIE_LOM<10> CLK_PCIE_LOM#<10>

12

Y2 25MHzY225MHz

PCIE_TX1+<10> PCIE_TX1-<10>

PCIE_WAKE#<8,27>

PLTRST#<4,10,11,27,31,35>

+3V

R292 *Short_4R292 *Short_4

VAUX_12

15mil

4.7U/6.3V_6C673 4.7U/6.3V_6C673

0.1u/10V_4_X7RC677 0.1u/10V_4_X7RC677

15mil

4.7U/6.3V_6C390 4.7U/6.3V_6C390

0.1u/10V_4_X7RC388 0.1u/10V_4_X7RC388

15mil

4.7U/6.3V_6C679 4.7U/6.3V_6C679

0.1u/10V_4_X7RC681 0.1u/10V_4_X7RC681

C404 0.1u/10V_4_X7RC404 0.1u/10V_4_X7R C410 0.1u/10V_4_X7RC410 0.1u/10V_4_X7R

R272 1K/F_4R272 1K/F_4 R290 4.7K_4R290 4.7K_4

R286 200_4R286 200_4

R267 1.24K/F_4R267 1.24K/F_4

R291 *4.7K_4R291 *4.7K_4

+3V_S5

BCM_CLKREQ#

AVDDL

GPHY_PLLVDD

PCIE_PLLVDD

PCIE_RXP1_LAN_R PCIE_RXN1_LAN_R

VMA_PRES LOW_PWR

XTALO XTALI

RDAC

42

VDDO

6

VDDC

15

VDDC

41

VDDC

27

AVDDL

33

AVDDL

39

AVDDL

24

GPHY_PLLVDDL

18

PCIE_PLLVDDL

21

PCIE_PLLVDDL

17

PCIE_TXDP

16

PCIE_TXDN

22

PCIE_RXDP

23

PCIE_RXDN

4

WAKE#

2

PERST#

20

PCIE_REFCLK_P

19

PCIE_REFCLK_N

40

VMAIN_PRSNT

1

LOW_PWR

13

XTALO

12

XTALI

26

RDAC

3

CLK_REQ#

BCM57780

7mm X 7mm

7mm X 7mm 48-Pin QFN

48-Pin QFN

GND

49

SPD100LED#

SPD1000LED# TRAFFICLED#

BCM57780

BIASVDDH

XTALVDDH

AVDDH AVDDH

TRD3_N TRD3_P

TRD2_N TRD2_P

TRD1_N TRD1_P

TRD0_N TRD0_P

LINKLED#

MODE

EECLK

EEDATA

SR_LX

SR_VFB

SR_VDDP

SR_VDD

NC

15mil

BIASVDD

25

XTALVDD

14

AVDDH

30 36

37 38

35 34

31 32

29 28

48 47 46 45

5

44 43

11 8

10 9

4.7U/6.3V_6

7

L30 BLM18AG601SN1_6L30 BLM18AG601SN1_6

0.1u/10V_4_X7RC382 0.1u/10V_4_X7RC382 L56 BLM18AG601SN1_6L56 BLM18AG601SN1_6

0.1u/10V_4_X7RC685 0.1u/10V_4_X7RC685 L52 BLM18AG601SN1_6L52 BLM18AG601SN1_6

LAN_TRD3N <26> LAN_TRD3P <26>

LAN_TRD2N <26> LAN_TRD2P <26>

LAN_TRD1N <26> LAN_TRD1P <26>

LAN_TRD0N <26> LAN_TRD0P <26>

LAN_LINKLED#

LAN_ACTLED#

BCM_EEC BCM_EED

C687

C686

0.1u/10V_4_X7R

0.1u/10V_4_X7RC674 0.1u/10V_4_X7RC674

0.1u/10V_4_X7RC675 0.1u/10V_4_X7RC675

L32 4.7uhL32 4.7uh

+3V_S5

LAN_LINKLED# <26>

LAN_ACTLED# <26>

VAUX_12

C418

C422

10u/6.3V_6

0.1u/10V_4_X7R

Don't route under Choke.

B B

LAN POWER

+3V_S5

4.7U/6.3V_6C683 4.7U/6.3V_6C683

0.1u/10V_4_X7RC401 0.1u/10V_4_X7RC401

A A

VAUX_12

20mil

4.7U/6.3V_6C680 4.7U/6.3V_6C680

0.1u/10V_4_X7RC682 0.1u/10V_4_X7RC682

0.1u/10V_4_X7RC678 0.1u/10V_4_X7RC678

0.1u/10V_4_X7RC399 0.1u/10V_4_X7RC399

EEPROM

BCM_EED BCM_EEC

+3V_S5

EEPROM Strapping

EEPROM Type

24LC02

5

4

6/18 change to use internal ROM

R289

R287

1K_4

*1K_4

R284

R284 1K_4

1K_4

*1K_4

R294

R294 *1K_4

*1K_4

5 6

7 4

U27

SDA SCL

WP GND

*24LC02

VCC

A0 A1 A2

A version Still mount the EEPROM

EECLK EEDATA

1 1

1 0Internal

3

1 2 3

8

C423

C423 *0.1u/10V_4_X7R

*0.1u/10V_4_X7R

+3V_S5

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

GLAN BCM57780

ZQ9

1A

25 45Tuesday, June 22, 2010

1

25 45Tuesday, June 22, 2010

1A

1

2

3

4

5

6

7

8

TRANSFORMER

U26

A A

LAN_TRD0P<25>

C361

0.1u/10V_4_X7R

C364

0.1u/10V_4_X7R

C362

0.1u/10V_4_X7R

C368

0.1u/10V_4_X7R

LAN_TRD0N<25>

LAN_TRD1P<25>

LAN_TRD1N<25>

LAN_TRD2P<25>

LAN_TRD2N<25>

LAN_TRD3P<25>

LAN_TRD3N<25>

Delta LFE9276D-R (DB0ZY8LAN00)

B B

U26

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

TRANSFORMER

MCT1 MX1+

MX1-

MCT2 MX2+

MX2-

MCT3 MX3+

MX3-

MCT4 MX4+

MX4-

24 23 22

21 20 19

18 17 16

15 14 13

R255

R255 75/F_8

75/F_8

R256

R256 75/F_8

75/F_8

R257

R257 75/F_8

75/F_8

C672

C672 1500p/3KV_18

1500p/3KV_18

X-TX0P X-TX0N

X-TX1P X-TX1N

X-TX2P X-TX2N

X-TX3P X-TX3N

R258

R258 75/F_8

75/F_8

CN9

LAN_ACTLED#<25>

+3V_S5

LAN_LINKLED#<25>

+3V_S5

R250 220_8R250 220_8

R263 220_8R263 220_8

LAN_ACTLED# LAN_LINKLED#

LAN_ACTLED#

LAN_ACT_LED_PWR

X-TX0P

X-TX0N X-TX1P

X-TX2P

X-TX2N X-TX1N

X-TX3P

X-TX3N

LAN_LINKLED# LAN_LNK_LED_PWR

9

10

1 2 3 4 5 6 7 8

11 12

CN9

YELLOW_N YELLOW_P

0+ 01+ 2+ 213+ 3-

GREEN_N GREEN_P

RJ45

GND2 GND1

R265 *0_6R265 *0_6

14

R235 *0_6R235 *0_6

13

C354

C354 *0.1u//50V_8

*0.1u//50V_8

C C

D D

1

2

3

4

5

C384

*0.1u//50V_8

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

6

LAN Transformer and RJ45

PROJECT :

7

ZQ9

1A

26 45Tuesday, June 22, 2010

8

1

2

3

4

5

6

7

8

MINI-CARD WLAN(MPC)

+3.3V: 1000mA +3.3Vaux:330mA +1.5V:500mA

A A

B B

CLK_LPC_DEBUG<10>

PCIE_WAKE#<8,25>

Debug

PCI_RST#<10>

CL_RST1#<10> CL_DATA1<10>

CL_CLK1<10>

PCIE_TX6+<10> PCIE_TX6-<10>

PCIE_RX6+<10> PCIE_RX6-<10>

CLK_PCH_SRC2<10> CLK_PCH_SRC2#<10>

PCIE_CLK_REQ2#<10>

+WL_VDD

2

Q6

Q6 *DTC144EUA

*DTC144EUA

13

R556 *Short_4R556 *Short_4 R306 *Short_4R306 *Short_4

R561 *0_4R561 *0_4 R555 *0_4R555 *0_4 R307 *0_4R307 *0_4

+WL_VDD

PCIE_WAKE#_R

CL_DATA1_WLAN CL_CLK1_WLAN

CL_RST1#_WLAN CL_DATA1_WLAN CL_CLK1_WLAN

Check LED signal. (active high or low)

H=7.0mm

LTS_AAA-PCI-046-K01

CN13

USB_Wifi+ USB_Wifi-

51

Reserved

49

Reserved

47

Reserved

45

Reserved

43

Reserved

41

Reserved

39

Reserved

37

Reserved

35

GND

33

PETp0

31

PETn0

29

GND

27

GND

25

PERp0

23

PERn0

21

GND

19

UIM_C4

17

UIM_C8

15

GND

13

REFCLK+

11

REFCLK-

9

GND

7

CLKREQ#

5

Reserved

3

Reserved

1

WAKE#

R575 *0_4R575 *0_4 R576 *0_4R576 *0_4

LED_WWAN#

53

+3.3V

GND

+1.5V

LED_WPAN#

LED_WLAN#

GND

USB_D+

USB_D-

GND

SMB_DATA

SMB_CLK

+1.5V

GND

+3.3Vaux

PERST#

W_DISABLE#

GND

UIM_VPP UIM_RST UIM_CLK

UIM_DATA

UIM_PWR

+1.5V

GND

+3.3V

GND54GND

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18

16 14 12 10 8 6 4 2

modify 10/19

USBP13+ <10,33> USBP13- <10,33>

+WL_VDD +1.5V

RF_LED#

USB_Wifi+ USB_Wifi-

+1.5V +WL_VDD

A_LFRAME#_R A_LAD3_R A_LAD2_R A_LAD1_R A_LAD0_R

+1.5V +WL_VDD

PLTRST#

R293 0_4R293 0_4 R288 0_4R288 0_4 C695 R285 0_4R285 0_4 R281 0_4R281 0_4 R280 0_4R280 0_4

6/9 stuff all for debug

RF_LED# <32>

CLK_SDATA <3,14,15> CLK_SCLK <3,14,15>

PLTRST# <4,10,11,25,31,35> RF_EN <35>

LPC_LFRAME# <9,35> LPC_LAD3 <9,35> LPC_LAD2 <9,35> LPC_LAD1 <9,35> LPC_LAD0 <9,35>

Debug

+3V

R303 *SHORT0805R303 *SHORT0805

5/13 change to 6.3V

+WL_VDD

C457

C457 10u/6.3V_8

10u/6.3V_8

C695 1000p/50V_4

1000p/50V_4

C458

0.1u/10V_4

C684

0.1u/10V_4

C697

C697 *0.1u/10V_4

*0.1u/10V_4

+1.5V

C688

C688 10u/6.3V_8

10u/6.3V_8

+WL_VDD

C432

C432 *0.1u/10V_4

*0.1u/10V_4

C C

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

7

PROJECT :

MINI PCI-E card/TV

ZQ9

8

1A

27 45Tuesday, June 22, 2010

1A

1

2

3

4

EE RETURN-PATH CAPACITORS

MAIN SATA HDD

CN12

23

A A

B B

GND23

GND1

RXP RXN

GND2

TXN TXP

GND3

3.3V

3.3V GND GND GND

GND

RSVD

GND

GND24

MAIN_SATA

12V 12V 12V

1 2 3 4 5 6 7

8 9 10 11 12 13 14

5V

15

5V

16

5V

17 18 19 20 21 22

24

5/13 update the P/N and F/P

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0 SATA_RXP0

+5V_HDD

C461 .01u/25V_4C461 .01u/25V_4 C459 .01u/25V_4C459 .01u/25V_4

C456 .01u/25V_4C456 .01u/25V_4 C718 .1u/10V_4C718 .1u/10V_4 C453 .01u/25V_4C453 .01u/25V_4

R550 *SHORT0805R550 *SHORT0805

+5V

C676

+

*100u/6.3V_3528

5/27 cost down

+5V_HDD

SATA_TXP0 <9> SATA_TXN0 <9>

SATA_RXN0_C <9> SATA_RXP0_C <9>

C386

C386 10u/10V_6

10u/10V_6

C400

C400 *.1u/16V_4

*.1u/16V_4

C398

C398 *.1u/16V_4

*.1u/16V_4

C395

C395 .01u/25V_4

.01u/25V_4

C392

C392 .01u/25V_4

.01u/25V_4

VIN +VGPU_CORE

C426 0.1u/25V_4_X5RC426 0.1u/25V_4_X5R

6/18 stuff for EMI

C224 *0.1u/25V_4_X5RC224 *0.1u/25V_4_X5R

C669 *0.1u/25V_4_X5RC669 *0.1u/25V_4_X5R

C15 0.1u/25V_4_X5RC15 0.1u/25V_4_X5R

6/18 stuff for EMI

+3V

C506 .1u/10V_4C506 .1u/10V_4

6/18 stuff for EMI

C359 *.1u/10V_4C359 *.1u/10V_4

C462 *.1u/10V_4C462 *.1u/10V_4

C489 *.1u/10V_4C489 *.1u/10V_4

5/25 reserve for EMI

+1.05V

C514

C514 *.1u/10V_4

*.1u/10V_4

C553

C553 *.1u/10V_4

*.1u/10V_4

6/21 add

+5V

C711 *.1u/10V_4C711 *.1u/10V_4

C670 *.1u/10V_4C670 *.1u/10V_4

C719 .1u/10V_4C719 .1u/10V_4

C720 .1u/10V_4C720 .1u/10V_4

6/18 add for EMI

+5V_S5

C704 *.1u/10V_4C704 *.1u/10V_4

C479 .1u/10V_4C479 .1u/10V_4

6/18 stuff for EMI

ODD (SATA)

CN7

C C

SATA_ODD_H=7.7

D D

5/26 change the footprint

GND14

GND

MD GND GND

GND15

14 1

2

A+

3

A-

4 5

B-

6

B+

7

8

DP

9

5V

10

5V

11 12 13

15

SATA_TXP1_C SATA_TXN1_C

SATA_RXN1 SATA_RXP1

SATA_DP

1

C317 .01u/25V_4C317 .01u/25V_4 C310 .01u/25V_4C310 .01u/25V_4

C304 .01u/25V_4C304 .01u/25V_4 C296 .01u/25V_4C296 .01u/25V_4

R159 *1K_4R159 *1K_4

C263

C263 .01u/25V_4

.01u/25V_4

C262

C262 .01u/25V_4

.01u/25V_4

SATA_TXP1 <9> SATA_TXN1 <9>

SATA_RXN1_C <9> SATA_RXP1_C <9>

C254

C254 *.1u/16V_4

*.1u/16V_4

+5V_ODD

C264

C264 *.1u/16V_4

*.1u/16V_4

R443 *SHORT0805R443 *SHORT0805

+

C252

C252 10u/10V_6

10u/10V_6

+

C611

C611 *100u/6.3V_3528

*100u/6.3V_3528

5/27 cost down

2

+5V

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

3

Date: Sheet of

PROJECT :

SATA-HDD/ODD/USB-ESATA

ZQ9

1A

28 45Tuesday, June 22, 2010

4

28 45Tuesday, June 22, 2010

Codec(ADO)

5

HP

HP-R<30> HP-L<30>

HPOUT_JD<30>

R313 5.1K/F_4R313 5.1K/F_4

SENSEB

4

3

2

1

MUTE(AMP)

ADOGND

25

26

27

28

VREF

AVSS1

AVDD1

MIC1-VREFO

LINE2-VREFO

MIC2-VREFO

LINE1-VREFO

12

C430 *22p/50V_4C430 *22p/ 50V_4

MIC1-VREFO <30>

Place next to pin 27

C473

0.1u/10V _4

24

LINE1-R

23

LINE1-L

22

MIC1-R

21

MIC1-L

20 19 18 17

MIC2-R

MIC2_INT_L

16

MIC2-L

15

LINE2-R

14

LINE2-L

13

Sense A

ANALOG

DIGITAL

1.6Vrms

C451 1u/10V_6C451 1u/10V_6

R551 22_4R551 22_4

C476

C476 10u/6.3V _6

10u/6.3V _6

Place next to pin 25

C472

0.1u/10V _4

T29T29 T28T28

ADOGND

MIC1-R MIC1-L

MIC2-VREFO

C463 1u/10V_6C463 1u/10V_6 C460 1u/10V_6C460 1u/10V_6

R305 20K/F_4R305 20K/F_4

BEEP_1P CBEEP

C428

C428 100p/50V_4

100p/50V_4

PCH_AZ_CO DEC_SYNC <9>

PCH_AZ_CO DEC_SDIN0 <9>

PCH_AZ_CO DEC_SDOUT <9>

PCH_AZ_CO DEC_BITCLK <9>

+5VA

C475

10u/6.3V _6

MIC1-R <30> MIC1-L <30>

MIC1_JDSENSEA

R296

4.7K_4

MIC

R308 1K_4R308 1K_ 4

MIC1_JD <30>

R297 47K/F_4R297 47K/F_ 4

PCH_AZ_CO DEC_RST# <9>

C429

C429 *100p/50 V_4

*100p/50 V_4

5/11 update

MONO-OUT FRONT-L

ADOGND

Change to 0.47U to reduce popping noise

MIC2_INTL1

SPKR <9>

Place next to pin 9

C471 0.4 7u/10V_ 6C471 0.47u/10 V_6 C480 *0.47u/10V _6C480 *0.4 7u/10V_6 C483 0.4 7u/10V_ 6C483 0.47u/10 V_6

C431

0.1u/10V _4

C441

C441 10u/6.3V _6

10u/6.3V _6

FRONT-R-1 FRONT-R+1

AMP_MUTE#<35>

5/24 Delete

+3V

6/21 change the P/N

R315 22K/F_6R315 22K/F_ 6 R319 22K/F_6R319 22K/F_ 6C472

R320 *10 0K_4R320 *100K_4

+3V

R314 0_4R31 4 0_4

1

EAPD#MIC2_INTL1_ RMIC2_INT_R

2

R316 *0_4R316 *0_4

+3V_S5

53

U29

*TC7SH08FU

ADOGND

4

C474

FRONT-R-2 FRONT-R+2

4.7U/6.3V _6

U11

2

Bypass IN-4GND IN+3VDD

1

SHUTDOWN

G1442P8 1U

8

VO2

7 6 5

VO1

6/18 change AMP & modify the circuit

R323 *10K _4R323 *10K _4

C485

*4.7u/10V_6

HP_MUTE# <30>

INSPKR+ <30>

ADOGND

INSPKR- <30>

+5VA

C469

0.1u/10V _4

C470

0.1u/10V _4

ADOGND

C490

4.7U/6.3V _6

D D

+5VA

C468

C466

0.1u/10V _4

ADOGND

ANALOG

DIGITAL

10u/6.3V _6

ADOGND

Place next to pin 38

C C

Split by DGND

EAPD#

Split by DGND

5/10 Add

MONO-OUT

R309 20K/F_4R309 20K/F_4

ADOGND

T27T27

+3V

FRONT-L= (L+R)/2 5/11 Del FRONT-R

Speaker

FRONT-L

U10

37

MONO-OUT

38

AVDD2

39

SURR-L

40

JDREF

41

SURR-R

42

AVSS2

43

NC

44

DMIC-CLK3/4

45

SPDIFO2

46

DMIC-CLK1/2

47

EAPD

48

SPDIFO1

C447

C448

0.1u/10V _4

10u/6.3V _6

36

FRONT-R

ALC272X<LQFP-48>

DVDD11DMIC-1/2/GPIO02DMIC-3/4/GPIO13DVSS14SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

ADOGND

C478

C477

+

2.2u/6.3V_6

29

30

31

32

33

34

35

CBP

CBN

CPVEE

Sense B

FRONT-L

HPOUT-L

HPOUT-R

Place next to pin 1

B B

ACZ_SDIN0_R

C445 22p/50 V_4C4 45 22p/50V_4

+5VA

ADOGND

C710

C710 *0.1u/10V_4

*0.1u/10V_4

Power (ADO)

4

+5V

A A

C708

C707

*0.1u/10V_4

+

*10u/10V _3216

R331 *0_4R331 *0_4

5/27 cost down

C730, C787 close U37 pin3 and L65

5

ANALOG DIGITAL

L58 UPB20120 9T-310Y-N/6A /31ohm_8L58 UPB20120 9T-310Y-N/6A /31ohm_8

U30

IN GND SHDN

*G923-330T1UF

4

OUT

R569 *29.4K/F_4R5 69 *29.4K/F_4

5

SET

ADOGND

R566

R566 *10K/F_4

*10K/F_4

3 2 1

C709

+

*10u/10V _3216

5/27 cost down

Place in Bottom of codec

R553 0_4R553 0_4

R564 0_4R564 0_4 R563 0_4R563 0_4 R571 0_4R571 0_4 R311 *0_4R311 *0_4 C464 *1000p/50V_4C464 *1000p/50V_4 C689 *1000p/50V_4C689 *1000p/50V_4

ADOGND

Tied at one point only under the codec or near the codec

6/18 stuff for EMI

INT MIC array

CN4

INT_MIC

ADOGND

cap place close to MIC-connector

3

1 2

ADOGND

1 2

C467 .1U_4C467 .1U_4

MIC2_INTL1 MIC2-VREFO

C492

C492 *22P_4

*22P_4

5/12 update Mic Partnumber & Footprint

R337

2.2K_4

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

REALTEK ALC663&888/MDC

1

ZQ9

1A

29 45Tuesday, June 22 , 2010

1A

5

MIC

MIC1-VREFO<29>

D D

MIC1-L<29>

C482 4.7u/6.3V_6C482 4.7u/6.3V_6 C481 4.7u/6.3V_6C481 4.7u/6.3V_6

D10 BAS316D10 BAS316 D11 BAS316D11 BAS316

MIC1_L2

R318 1K/F_4R318 1K/F_4

MIC1_R2

R317 1K/F_4R317 1K/F_4 L34

Max. 100mVrms input for Mic-IN

MIC1_JD

12

D21

D21 *VPORT_6

*VPORT_6

R325

4.7K/F_4

MIC1_JD<29>

4

R324

4.7K/F_4

MIC1_L3

L35

L35 BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4 L34 BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4

C486

C486 470p/50V_4

470p/50V_4

ADOGND

MIC1_L MIC1_RMIC1_R3

MIC1_JD

C484

C484 470p/50V_4

470p/50V_4

3

Normal OPEN Jack

CN18

1 2 6 3 4

5

MIC

ADOGND

BLACK

7

8

2

Internal Speaker

INSPKR-<29> INSPKR+<29>MIC1-R<29>

R572 *SHORT0603R572 *SHORT0603 R570 *SHORT0603R570 *SHORT0603

C713

*0.22u/25V_6

R_SPK-_1 R_SPK+_1

C714

*0.22u/25V_6

CN16

2

1

INT_Speaker

1

C C

ADOGND

HP/SPDIF

HP_MUTE#<29>

BLACK

CN17

ADOGND

1 2 6 3 4

5

JA6331-0230T3B-8H

2

HP-L<29>

B B

HP-R<29>

3

Q23

Q23 *FDV301N

*FDV301N R322 0_6R322 0_6

HP_MUTE#

3

Q24

Q24 *FDV301N

*FDV301N

R321 0_6R321 0_6

2

HP-L-2

1

HP-R-2

1

HP-L-2

R328 56/F_4R328 56/F_4

HP-R-2

R327 56/F_4R327 56/F_4 L36 BLM15AG121SS1/0.5A/120ohm_4L36 BLM15AG121SS1/0.5A/120ohm_4

HPL-1

R326

R326 *1K_4

*1K_4

L37 BLM15AG121SS1/0.5A/120ohm_4L37 BLM15AG121SS1/0.5A/120ohm_4

R329

R329 *1K_4

*1K_4

C487

C487 2200p/50V_4

2200p/50V_4

C488

C488 2200p/50V_4

2200p/50V_4

ADOGND

HPL_SYS HPR_SYSHPR-1

HPOUT_JD<29>

HPOUT_JD

12

D12

A A

*VPORT_6

7

8

ADOGND

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Quanta Computer Inc.

PROJECT :

AMP /AUDIO JACK CONN

ZQ9

30 45Tuesday, June 22, 2010

1

1A

A

B

C

D

E

CARD READER Controller

4 4

2 IN 1 CARD READER (SD/MMC)

VCC_XD

SD_WP SD_CD#

SD_DAT1 SD_DAT0

SD_CLK

SD_CMD SD_DAT3 SD_DAT2

10

9 8 7 6 5 3 2 1

SD-CARD

CN3

DATA1 DATA0 VSS2 CLK VDD VSS1 CMD DATA3 DATA2

11

12

4

CD/SW

WP/SW

SW COM

GND13GND1

14

5/10 Del R40001

VCC_XD

C442

4.7u/10V_6

Clock input selection '1' for 48MHz input [Default,Internal PU] '0' for 12MHz input

+1.8V_VDD

R554 *Short_4R554 *Short_4

3 3

PLTRST#<4,10,11,25,27,35>

R557 *SHORT0603R557 *SHORT0603

+3V

USBP12+<10>

USBP12-<10>

2 2

XTALSEL

8/14 ZH7 remove R136, R591 and C775

+3V_VDD

R559 *100K_4R559 *100K_4

C699

C699 *5p/50V_4

*5p/50V_4

R562 *Short_4R562 *Short_4

C701

4.7u/10V_6

C698

C698 *5p/50V_4

*5p/50V_4

crystal trace width needs at least 10 mils.

R558

R558 270K_4

270K_4

XI

XO

C702 18p/50V_4C702 18p/50V_4

C703 18p/50V_4C703 18p/50V_4

Y7 12MHzY712MHz

+3V_VDD

*0.47u/10V_6C700 *0.47u/10V_6C700

+1.8V_VDD

8/14 C707 close PIN11, 12

8/14 pin13 output 20mils

R560 330_4R560 330_4

+3V_VDD

C743 close PIN46, 47

C708 close PIN48, 47

C694

U28

1 2 3 4 5 6 7 8

9 10 11 12

C696

4.7u/10V_6

C694

0.1u/16V_4

GPON7 EXT48IN RSTN REXT VD33P DP DM VS33P XI XO VDD VDD

C690

4.7u/10V_6

C692

0.1u/16V_4

XI XO

48

VDDHM

V1813CF_V33

46

47

GND

14

15

VCC_XD

T97T97

T95T95

XTALSEL

CRMD_N

NBMD

44

43

45

VDD

TRIST

NBMD

XTALSEL

AU6437-GBL

V3317VDD20SDWPEN

VCC33

VDDHM18AGND5V

16

DATA1

CTRL3

CTRL1

41

40

CTRL142CTRL3

DATA1

GND

CTRL4

19

21

C691

0.1u/16V_4

DATA0

39

DATA0

XDCDN22EEPCLK

38

37

DATA7

DATA6

XDWPN

EEPDATA

23

24

+1.8V_VDD +3V_VDD

XDCEN

5/10 Modify

CTRL0, CRTL 1 trace length shorter , and surround with GND.

CTRL0

36

CTRL0

35

DATA5 CTRL2

GPI4 DATA4 DATA3 DATA2

GPI2

GPI1

EEPCLK

CTRL2

34

GPI4

33 32

DATA3

31

DATA2

30 29

GPI2

28 27

EEPDATA

26

GPI1

25

T94T94

SD write protect 1:decided by SDWP[Default] 0:letting SD always write-able

T89T89

T90T90 T91T91

T92T92

R552*0_4 R552*0_4

Main DFHS11FR011

Second DFHS11FR033

Close to CN14 pin 14 & pin23

4.7u CAP close to pin23

5/10 change Card Redaer conn footpirnt sdcard-sdsn09-08-xa-11p-smt

DATA0 SD_DAT0

DATA1 SD_DAT1

DATA2 SD_DAT2

CTRL0 SD_CLK

CTRL2 SD_CMD

CTRL3 SD_CD#

4.7u/10V_6

Close to connector

R300

R300 BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4

C454

0.1u/16V_4

SD_DAT3DATA3

SD_WPCTRL1

C449

C449 *10p/50V_4

*10p/50V_4

1 1

PROJECT : ZQ5

Quanta Computer Inc.

Size Document Number Rev

AU6433 CardReader

Date: Sheet of

A

B

C

D

Date: Sheet of

E

1A

43

31Tuesday, June 22, 2010

43

31Tuesday, June 22, 2010

43

31Tuesday, June 22, 2010

LED

5

4

3

2

1

D D

5/13 Delete CAP & NUM LED

Power LED

LED1 BuleLED1 Bule

R1 182/F_4R1 182/F_4

+3V

POWER

SUSLED#<35>

PWRLED#<35>

R340 715/F_4R340 715/F_4 R342 20/F_4R342 20/F_4

Amber

LED3

4 3 1

LED_A/B

+3V_S5

2

Blue

R339 *1M_4R339 *1M_4 R336 *1M_4R336 *1M_4

Battery

BATLED1#<35>

C C

BATLED0#<35>

R338 715/F_4R338 715/F_4 R335 20/F_4R335 20/F_4

+3VPCU

Amber

LED4

4 3 1

LED_A/B

+3VPCU

2

Blue

+3V

WIFI LEDHDD

Amber

R333

R333 10K/F_4

10K/F_4

SATA_ACT#<9>

B B

53

1 2

R332 *Short_4R332 *Short_4

SATA_LED#_R

4

U12

U12 *TC7SH08FU

*TC7SH08FU

LED2 BuleLED2 Bule

R341 182/F_4R341 182/F_4

LED5

RF_LED#<27>

R334 715/F_4R334 715/F_4

LED5

LED_AMBER

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

Date: Sheet of

2

PROJECT :

POWER/MMB/LAUNCH/LED

ZQ9

1

1A

32 45Tuesday, June 22, 2010

5

4

3

2

1

BLUETOOTH CONNECTOR for 2.0

USB

D D

C C

USBON#<35>

USB_OC0#<10>

C455

C455 1U/6.3V_4

1U/6.3V_4

USBP1-<10>

USBP1+<10>

+5V_S5

U9

2

IN1 IN23OUT2

4

EN#

1

GND

G547F2P81U

R310 *0_4R310 *0_4

L33

2 3

DLW21HN900SQ2L/300mA/90ohm

DLW21HN900SQ2L/300mA/90ohm R312 *0_4R312 *0_4

8

OUT3

7 6

OUT1

5

OC#

1

2

4

3

USBPWR1

USBP1-_R USBP1+_R

C693

+

330u/6.3V_6X5.7

USBP1-_R USBP1+_R

12

RV2

RV2 *EGA-0402

*EGA-0402

C465

1000p/50V_4

12

RV1

RV1 *EGA-0402

*EGA-0402

CN14

1

2

3

3 445

USB_MB_Turbo

8

7

6

5

USB/B

B B

USBP9+<10>

USBP9-<10>

USBP11+<10>

USBP11-<10>

R261 *0_4R261 *0_4

L29

2 3

DLW21HN900SQ2L/300mA/90ohm

DLW21HN900SQ2L/300mA/90ohm R262 *0_4R262 *0_4

R274 *0_4R274 *0_4

L31

2 3

DLW21HN900SQ2L/300mA/90ohm

DLW21HN900SQ2L/300mA/90ohm R273 *0_4R273 *0_4

1

2

4

3

1

2

4

3

USBP9+_R USBP9-_R

USBP11+_R USBP11-_R

6/18 add

+3V_S5

BT_POWERON#<35>

1

BLUETOOTH CONNECTOR for 3.0

+3V_S5

BT_POWERON#<35>

1

5/13 reserve pi-filter

C446

*1u/6.3V_4

C409

*1u/6.3V_4

USB_OC4_5#<10>

USBP11-_R USBP11+_R

USBP9-_R USBP9+_R

USBON#<35>

CN19

3

Q25

2

AO3413

2

+5V_S5

USBP13+<10,27>

USBP13-<10,27>

3

Q22

Q22 AO3413

AO3413

USBP4+<10>

USBP4-<10>

R279

0_1206

+

C717

2.2u/6.3V_6

+

C705

2.2u/6.3V_6

USB_DB FFC CONN

16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 11718

CN10

BT_POWER_2

C715

C715 1000p/50V_4

1000p/50V_4

R574 0_4R574 0_4

L59

3 2

*RFCMF1632100M3T/200mA/90ohm

R573 0_4R573 0_4

BT_POWER

C706

C706 1000p/50V_4

1000p/50V_4

R567 0_4R567 0_4

L57

3 2

*RFCMF1632100M3T/200mA/90ohm

R568 0_4R568 0_4

4

3

1

2

4

3

1

2

USB_BT+_R USB_BT-_R

USBP4+_R USBP4-_R

T102T102

USBP4+_R USBP4-_R

T101T101

BT_LED_2

BT_LED

CN19

5 4 3 2 1

BT_CONN

C716

C716 *.01u/16V_4

*.01u/16V_4

CN15

5 4 3 2 1

BT_CONN

C712

C712 *.01u/16V_4

*.01u/16V_4

7 6

5/11 update the footprint

A A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

USB/ BT

ZQ9

1A

33 45Tuesday, June 22, 2010

1

5

K/B

7 8 5 3 1

CP6 *100p/50Vx4CP6 *100p/50Vx4

7 8

D D

C C

5 3 1

CP5 *100p/50Vx4CP5 *100p/50Vx4

7 8 5 3 1

CP4 *100p/50Vx4CP4 *100p/50Vx4

7 8 5 3 1

CP3 *100p/50Vx4CP3 *100p/50Vx4

7 8 5 3 1

CP2 *100p/50Vx4CP2 *100p/50Vx4

7 8 5 3 1

CP1 *100p/50Vx4CP1 *100p/50Vx4

C222 *100p/50V_4C222 *100p/50V_4

C221 *100p/50V_4C221 *100p/50V_4

MX3 MX2

6

MX4

4

MX5

2

MX6 MX7

6

MY17

4

MY16

2

MY3 MY2

6

MY1

4

MY0

2

MY7 MY6

6

MY5

4

MY4

2

MY11 MY10

6

MY9

4

MY8

2

MY15 MY14

6

MY13

4

MY12

2

MX1 MX0

HOLE

HOLE3

1

67 5 4

HOLE3 *H-C94D94N

*H-C94D94N

HOLE8

HOLE8 *H-TC256BC165D165P2

*H-TC256BC165D165P2

HOLE20

HOLE20 *H-C256D161P2

*H-C256D161P2

HOLE2

*hg-c315d110p2

8 9

123

B B

HOLE13

*hg-c315d118p2

8 9

123

HOLE6

*hg-c315d118p2

8 9

123

HOLE18

*HG-C315D154P2

67 5

8

4

9

123

HOLE14

*hg-c315d118p2

67 5

8

4

9

123

HOLE17

*hg-c315d118p2

67 5

8

4

9

123

HOLE19

HOLE19 *H-C256D161P2

*H-C256D161P2

67 5 4

HOLE15

*hg-c315d118p2

67

8

5

9

4

123

6/18 change

HOLE10

*hg-c315d118p2

67

8

5

9

4

123

1

HOLE4

*hg-c315d118p2

67 5

8

4

9

123

HOLE16

*hg-c315d118p2

67 5

8

4

9

123

HOLE21

HOLE21 *H-C197D87P2

*H-C197D87P2

HOLE9

*hg-c315d118p2

67 5

8

4

9

123

HOLE7

*hg-c315d118p2

67

8

5

9

4

123

4

MY0<35> MY1<35> MY2<35> MY3<35> MY4<35> MY5<35> MY6<35> MY7<35> MY8<35> MY9<35> MY10<35> MY11<35> MY12<35> MY13<35> MY14<35> MY15<35> MY16<35> MY17<35> MX7<35> MX6<35> MX5<35> MX4<35> MX3<35> MX2<35> MX1<35> MX0<35>

+3VPCU

RP3 10K_10P8RRP3 10K_10P8R

10

MX4 MX2

9

MX5

8

MX6

7 4

MX7

HOLE5

HOLE5 *h-c1417d1417na1457

*h-c1417d1417na1457

1

5/12 add

1

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9

10

MY10

11

MY11

12

MY12

13

MY13

14

MY14

15

MY15

16

MY16

17

MY17

18

MX7

19

MX6

20

MX5

21

MX4

22

MX3

23

MX2

24

MX1

25

MX0

26

MX3

1 2

MX1

3

MX0

56

HOLE11

HOLE11 *H-TC256BC165D165P2

*H-TC256BC165D165P2

1

CN2KBCN2

1 2 3 4 5 6 7 8 9

27 28

KB

HOLE12

HOLE12 *H-TC256BC165D165P2

*H-TC256BC165D165P2

1

3

CPU FAN

+5V

C549

2.2U_6

1 2

SML1ALERT#<10,11,35>

CPUFAN#<35>

FANPWR = 1.6*VSET

TOUCHPAD & Switch CONN.

+5V +5V

R86

R87

10K_4

TPDATA<35>

TPCLK<35>

RIGHT# LEFT#

L18 0_6L18 0_6 L19 0_6L19 0_6

SW3

3 1 4

SWITCH_1.5

6/20 change th P/N

U17

VIN2VO

1

/FON

4

VSET

G995P1U

L20 0_6L20 0_6

C219

*.01u/25V_4

2

GND GND GND GND

C223

0.1u/10V_4_X7R

C220

C220 *.01u/25V_4

*.01u/25V_4

1

+3V

R385

R385 10K_4

10K_4

FANSIG<35>

3 5 6 7 8

TH_FAN_POWERTH_FAN_POWER

C547

2.2U_6

1 2

C548

C548 .01U_4

.01U_4

RIGHT#

LEFT#

C546

C546 *.01U_4

*.01U_4

+TPVDD

TPDATA_R TPCLK_R

SW2

3 1 4

SWITCH_1.5

CN6

1 2 3

FAN_CONN

CN1

1 2 3 4 5 6 7 8 9

10

13

11

14

12

Aces 88501-120N

2

HOLE1

*HG-C315D118P2

A A

8 9

123

67 5 4

5/27 Delete HOLE4, HOLE22

5

1

4

5/21 add

PAD1

*SPAD-C200NP

1

3

PAD2

*SPAD-C200NP

1

PAD3

*SPAD-C200NP

1

6/21 add

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

KB/FAN/TP+FP

ZQ9

1A

34 45Tuesday, June 22, 2010

1

HOLE1

5/24 add

5

EC(KBC)

L22 PBY160808T-250Y-N/3A/25ohm_6L22 PBY160808T-250Y-N/3A/25ohm_6

30mil

+3VPCU

R108 2.2_6R108 2.2_6

1 2

D D

CLK_PCI_775 CLK_PCI_775

R106

R106 *22_4

*22_4

C228

C228 *10p/50V_4

*10p/50V_4

C C

B B

+3VPCU_EC

C573

4.7U/6.3V_6

ICH_SUSCLK<8>

0.03A(30mils)

C538

C593

0.1u/10V_4_X7R

*.1u/16V_4

LPC_LFRAME#<9,27>

LPC_LAD0<9,27> LPC_LAD1<9,27> LPC_LAD2<9,27> LPC_LAD3<9,27>

CLK_PCI_775<10>

CLKRUN#<8>

SIO_A20GATE<11>

SIO_RCIN#<11>

SIO_EXT_SCI#<11>

EC_FPBACK#<23>

PLTRST#<4,10,11,25,27,31>

IRQ_SERIRQ<9>

SIO_EXT_SMI#<11>

2ND_MBDATA<10>

BT_POWERON#<33>

R390 *Short_4R390 *Short_4

C550

C550 *15p/50V_4

*15p/50V_4

E775AGND

C551

0.1u/10V_4_X7R

MX0<34> MX1<34> MX2<34> MX3<34> MX4<34> MX5<34> MX6<34> MX7<34>

MY0<34> MY1<34> MY2<34> MY3<34> MY4<34> MY5<34> MY6<34> MY7<34> MY8<34>

MY9<34> MY10<34> MY11<34> MY12<34> MY13<34> MY14<34> MY15<34> MY16<34> MY17<34>

MBCLK<36>

MBDATA<36>

2ND_MBCLK<10>

TPCLK<34>

TPDATA<34>

PCH_ACIN<8>

MAINON<19,39,40,43>

T55T55

R392 *20M_6R392 *20M_6

Y4

1 4

*32.768KHzY4*32.768KHz

C229

*.1u/16V_4

D3 BAS316D3 BAS316

EC_FPBACK#

T60T60

PLTRST# USBON# IRQ_SERIRQ

MX0 MX1 MX2 MX3 MX4 MX5 MX6 MX7

MY0 MY1 MY2 MY3 MY4 MY5 MY6 MY7 MY8 MY9 MY10 MY11 MY12 MY13 MY14 MY15 MY16 MY17

MBCLK MBDATA 2ND_MBCLK 2ND_MBDATA

TPCLK TPDATA PCH_ACIN

MAINOND

E775_32KX1

E775_32KX2

R398

R398 *33K/F_4

*33K/F_4

C552

C552 *15p/50V_4

*15p/50V_4

E775AGND

C225

0.1u/10V_4_X7R

NOCIR#

4

+A3VPCU

C227

C226

10u/10V_6

0.1u/10V_4_X7R

19

46

76

88

102

115

U18

VCC1

VCC2

VCC3

VCC4

VCC5

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

GPIO11/CLKRUN

121

GPIO85/GA20

122

KBRST/GPIO86

29

ECSCI/GPIO54

6

GPIO24/LDRQ

124

GPIO10/LPCPD

7

LREST

123

GPIO67/PWUREQ

125

SERIRQ

9

GPIO65/SMI

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4/JEN0

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9/SDP_VIS

40

KBSOUT10/P80_CLK

39

KBSOUT11/P80_DAT

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

GPIO60/KBSOUT16

33

GPIO57/KBSOUT17

70

GPIO17/SCL1

69

GPIO22/SDA1

67

GPIO73/SCL2

68

GPIO74/SDA2

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27PSDAT2

12

GPIO25/PSCLK3

13

GPIO12/PSDAT3

77

GPIO00/32KCLKIN

79

GPIO02

NPCE781

L21 PBY160808T-250Y-N/3A/25ohm_6L21 PBY160808T-250Y-N/3A/25ohm_6

AVCC

GND1

5

18

E775AGND

3

+3V

C571

D15

BAS316

4

VDD

GPIO90/AD0 GPIO91/AD1

A/D

D/A

LPC

GPIO

KB

TIMER

SPI

SMB

IR

SMB

IR

PS/2

FIU

GND2

GND3

GND4

GND5

GND6

45

78

89

116

GPIO92/AD2 GPIO93/AD3

GPIO05 GPIO04

GPIO94/DA0

GPI95/DA1 GPI96/DA2

GPIO01/TB2

GPIO03

GPIO06/IOX_DOUT

GPIO07

GPIO23/SCL3

GPIO30/CIRTX2

GPIO31/SDA3 GPIO32/D_PWM GPIO33/H_PWM

GPIO36

GPIO40/F_PWM

GPIO42/TCK

GPIO43/TMS

GPIO44/TDI

GPIO45/E_PWM

GPIO46/CIRRXM/TRST

GPO47/SCL4 GPIO50/TDO

GPIO51

GPIO52/CIRTX2/RDY

GPIO53/SDA4

GPIO81

GPO82/TEST

GPO84/TRIST

GPIO41

GPIO56/TA1

GPIO20/TA2/IOX_DIN

GPIO14/TB1

GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM GPIO66/G_PWM

GPIO77/SPI_DI

GPO76/SPI_DO/SHBM

GPIO75/SPI_SCK

GPIO72/IRRX1/SIN2

GPIO70/IRRX2_IRSL0

GPIO71/IRTX/SOUT2

GPIO87/CIRRXM/SIN_CR

GPIO34/CIRRXL

GPIO16/CIRTX

GPO83/SOUT_CR/XORTR

F_SDO

F_CS0

VCORF

44

VCORF_uR

C539

C539 1u/6.3V_4

1u/6.3V_4

F_SCK

VCC_POR

GPIO55/CLKOUT/IOX_DIN

AGND

103

GPI97

F_SDI

VREF

C571

C570

0.1u/10V_4_X7R

4.7U/6.3V_6

C595 10u/6.3V_8C595 10u/6.3V_8

T54T54 T51T51

T53T53

HWPG

C605 0.01u/16V_4C605 0.01u/16V_4

T58T58

T6T6 T7T7

NBSWON#

T61T61

T52T52 T49T49

T48T48 T47T47 T46T46

T44T44

T50T50

T45T45

T63T63 T5T5

R90 *Short_4R90 *Short_4 R386 *Short_4R386 *Short_4

T59T59

R97 22_4R97 22_4 R102 22_4R102 22_4

T43T43

R415 47K/F_4R415 47K/F_4

R107 *Short_4R107 *Short_4

5/17 Change to test pad

97

WL_SW

98 99 100 108 96

101 105 106 107

64 95 93 94 119 109 120 65 66 15 16

AC_OFF

17 20

3G_SW

21 22 23 24 25 26 27 28 91 110 112 80

ODDLED

31 117 63

32 118 62 81

84

SHBM_R

83 82

RSMRST#_uR

75 73

PWROK_EC_uR

74 113 14 114

P_SAVE_LED#

111

SPI_SDI_uR

86 87

SPI_CS0#_uR

90

SPI_SCK_uR_R

92

ECDB_CLOCK

30

VCC_POR#

85

VREF_uR +A3VPCU

104

ICMNTE775AGND

TEMP_MBAT <36> SML1ALERT# <10,11,34>

ICMNT <36> VGA_THERM# <21>

CPUFAN# <34>

ACIN <36> LID591# <23>

SUSB# <8> MXM_SMCLK12 <21>

MXM_SMDATA12 <21> BATLED0# <32>USBON#<33> BATLED1# <32>

VRON <38>

SUSLED# <32> AMP_MUTE# <29>

D/C# <36>

S5_ON <37,44>

HDMI_HPD_EC# <24> DNBSWON# <8>

SUSON <40> FANSIG <34>

CONTRAST <23> PWRLED# <32>

ICH_RSMRST# <8> SUSC# <8> PWROK_EC <8> RF_EN <27>

SPI_SDO_uRSPI_SDO_uR_R SPI_SCK_uR

+3VPCU

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

PCH

SM Bus 3

GPU-I2C

SM Bus 4

N/A

2

1

I/O ADDRESS SETTING(KBC)

SHBM=0: Enable shared memory with host BIOS

SHBM

1/13 Comfirm by vendor mail : Disabled ('1') if using FWH device on LPC. Enabled ('0') if using SPI flash for both system BIOS and EC firmware

SHBM_R

SM BUS PU(KBC)

MBCLK MBDATA

MXM_SMCLK12 MXM_SMDATA12

2ND_MBCLK 2ND_MBDATA

VGA_THERM#

SPI FLASH(KBC)

R96 *100K_4R96 *100K_4

1/13 Comfirm by vendor mail : If the Southbridge enables 'Long Wait Abort' by default, the flash device should be 50MHz (or faster)

+3VPCU

7/24 modify

R101 10K_4R101 10K_4

R99 22_4R99 22_4

SPI_SDI_uR

HWPG(KBC)

HWPG_1.8V<43> HWPG_1.05V<39> HWPG_1.5V<40> SYS_HWPG<37> HWPG_GFX<41>

D9 BAS316D9 BAS316 D7 BAS316D7 BAS316 D8 BAS316D8 BAS316 D6 BAS316D6 BAS316 D5 IV@BAS316D5 IV@BAS316

R405 10K_4R405 10K_4

R92 10K_4R92 10K_4 R91 10K_4R91 10K_4

R100 EV@2.2K_4R100 EV@2.2K_4 R98 EV@2.2K_4R98 EV@2.2K_4

R88 10K_4R88 10K_4 R89 10K_4R89 10K_4

R416 EV@10K_4R416 EV@10K_4

SPI_SDI_uR_R SPI_SDO_uR SPI_SCK_uR SPI_CS0#_uR

+3VPCU

+3V_D_S

U19

2

SO

5

SI

6

SCK

1

CE

W25X40BVSSIG

+3V

R110

R110 10K_4

10K_4

+3V

+3VPCU

8

VDD

HOLD

VSS

R109

R109 *Short_4

*Short_4

WP

7 3 4

HWPG

C591

0.1u/10V_4

MPWROK <4>

POWER-ON Switch(KBC)

A A

D2 BAS316D2 BAS316

NBSWON#

21

*MSK:NTC031-AC1G-A120T

D1 *VPORT_6D1*VPORT_6

6/21 unstuff

SW1

1 3

2 4 5 6

5/13 change the location

5

4

3

2

INTERNAL KEYBOARD STRIP SET(KBC)

R393 10K_4R393 10K_4

MY0

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

Date: Sheet of

PROJECT :

WPCE781 & FLASH

1

ZQ9

35 45Tuesday, June 22, 2010

+3VPCU

1A

5

POWER_JACK

dcjk-2dc2003-000111-3p-v

PJ1

1 2

3

456

7

D D

PC78

0.1u/50V_6

PC79

2200p/50V_6

PC80

*47u/25V_6.3*6

PL2

HI0805R800R-00_8

PL1

HI0805R800R-00_8

5/12 EMI RESERVE

C C

+3VPCU

PR7

PR7 100K_4

100K_4

ACIN<35>

PC3

0.1u/50V_6

12

PC2

PC5

47p/50V_6

+3VPCU

PC2

100p/50V_6

PR151

PR151 100_4

100_4

PR153

PR153 100_4

100_4

PC4

PC4 47p/50V_6

47p/50V_6

MBCLK <35>

MBDATA <35>

PL4

HI0805R800R-00_8

PL3

HI0805R800R-00_8

TEMP_MBAT

PR152

PR152 100K_4

100K_4

B B

PR154

*SHORT_PAD_4

PU6

PU6 CM1293A-04SO

CM1293A-04SO

CH1 VN CH23CH3

CH4

MBAT+

VP

PR150

PR150 100_4

100_4

MBDATA

6 5

MBCLKTEMP_MBAT

4

5

C114F3-108A1-L_Batt_Conn

1

10

2 3 4 5 6 7 89

PJ2

A A

1 2

Add ESD diode base on EC FAE suggestion

VA1

PC81

0.1u/50V_6

PD1

PD1 SW1010CPT

SW1010CPT

BAT-V

+3VPCU

4

MBDATA<35>

MBCLK<35>

PR5

49.9/F_6

PR11

82.5K/F_4

PR12

PR12 22K/F_4

22K/F_4

TEMP_MBAT <35>

4

PD6

SBR1045SP5-13

1 2

88731ACSET88731ACSET88731ACSET88731ACSET

PC15

*1u/16V_6

DCINDCIN

3

2 1

+3VPCU

PC12

0.1u/50V_6

PC16

0.01u/50V_6

PD5

PD5 SMAJ20A

SMAJ20A

5/14 add short PAD

PC9

0.1u/50V_6

PC17

PC17 *0.01u/50V_6

*0.01u/50V_6

VA2VA2VA2VA2

VA2VA2VA

PC82

0.1u/50V_6

CSIN_1

CSIP_1

1

NC

11

VDDSMB

9

SDA

10

SCL

13

ACOK

22

DCIN

2

ACIN

3

VREF

4

ICOMP

5

NC

6

VCOMP

PR10

2.21K/F_4

PC13

0.01u/50V_6

PR9

PR9 10/F_4

10/F_4

GND33GND32GND31GND

PR147

PR147 220K_4

220K_4

PR148

PR148 220K_4

220K_4

0.1u/50V_6

CSIP

28

30

CSSP

NC

7

PC14

ISL88731A

3

CSIN

27

CSSN

PU1

ICM

8

ICMNT

3

1 6 2 3

PQ28

IMD2AT108

PR8

PR8 10/F_4

10/F_4

26

VCC

UGATE

PHASE

LGATE

NC

14

ICMNT <35>

PQ27

PQ27 FDD6685

FDD6685

43

1 2

5 4

PR159

4.7_6

ISL88731_VDDP

21

VDDP

25

BOOT

24

23

20

19

PGND

18

CSOP

17

CSON

16

NC

15

VBF

29

GND GND

12

1

PC11

1u/16V_6

PR6

2.7_6

88731B_2

ISL88731_UGATE

ISL88731_PHASE

ISL88731_LGATEISL88731_LGATEISL88731_LGATEISL88731_LGATE

CSOP

CSON

PR4

PR4 *SHORT0402

*SHORT0402

PR146

PR146 SHORT_PAD_4

SHORT_PAD_4

88731B_1

PR3

PR3 10/F_4

10/F_4

PC8

0.1u/50V_6

PR1

PR1 10/F_4

10/F_4

PR145

0.01_3720

PC7

PC7 1u/16V_6

1u/16V_6

PD7

PD7 *RB500V-40

*RB500V-40

PC10

0.1u/50V_8

ISL88731 thermal pad tie to Pin12

CSOP_1

BAT-V

PR2

PR2 100_4

100_4

2

6/9 change the P/N to 3720

5/14 add short PAD

PR144

PR144 SHORT_PAD_4

SHORT_PAD_4

CSIN_1 CSIP_1

PR149

*SHORT_PAD_4

578

3 6

241

578

3 6

241

PC83

2200p/50V_6

PQ31

PQ31 AO4468

AO4468

PQ30

PQ30 AO4468

AO4468

PR155

PR155 *4.7_6

*4.7_6

PC88

PC88 *680p/50V_6

*680p/50V_6

0.1u/50V_6

D/C# <35>

PL5

6.8uH

PC6

VIN

PC84

10u/25V_1206

CSOP_1 BAT-V

0618 change to AO4468

BAT-V

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

VIN

PC1

2200p/50V_6

0.01_3720

0.01_3720 PR158

PR158

1 2

PC85

2200p/50V_6

Quanta Computer Inc.

PROJECT :

Charger(ISL88731A)

1

PR156

PR156 33K/F_4

33K/F_4

2

PQ32

PQ32 DMN601K-7

DMN601K-7

PC87

10u/25V_1206

1

PQ29

PQ29 FDD6685

FDD6685

1

PR157

PR157 10K_4

10K_4

3

1

PC86

10u/25V_1206

ZQ9

36 9Tuesday, June 22, 2010

43

BAT-VBAT-V

1A

5

4

3

2

1

MAIND

6/14 remove JP2 , T25 and T26

D D

VIN

+

PC173

100u/25V_6X5.7

OCP:6.5A

5A

+5VPCU

6/14 remove JP15 , T98 and T99

C C

+

PC174

PC174 330u/6.3V_6X5.7

PC176

PC176 *10u/25V_1206

*10u/25V_1206

B B

330u/6.3V_6X5.7

*SHORT_PAD_4

OCP:6.5A

L(ripple current) =(9-5)*5/(2.2u*0.4M*9)=2.525A Iocp=6.5-(2.525/2)=5.24A Vth=5.24A*14.2mOhm=0.074V R(Ilim)=(0.07437V*10)/5uA=148.74K Ipeak(choke)=10.687A

PC63

2.2n/50V_6

PR125

PR125 *0_4

*0_4

PC177

0.1u/50V_6

PR117

MAIND <40,43>

12

PC170

4.7u/25V_0805

PL13

2.2uH

PR97

PR97 *4.7_6

*4.7_6

PC58

PC58 *680p/50V_6

*680p/50V_6

SYS_SHDN#<4,44>

12

PC169

4.7u/25V_0805

PD9

PD9 *SX34

*SX34

6/9 unstuff

+5VPCU_FB

*SHORT_PAD_4

241

+15V

VL

PR112

12

PR111

PR111 39K/F_4

39K/F_4

3V5V_EN

PR110

5V_EN

578

5V_DH

PQ13

PQ13 AO4468

AO4468

3 6

5V_LX SKIP

578

5V_DL

PQ11

PQ11 AO4710

AO4710

3 6

PC67

0.1u/50V_6

PR132

PR132 22_8

22_8

+15V_ALWP

PR108

*SHORT_PAD_4

PR135

PR135 390K_4

3V_EN

PD3

PD3 CHN217

CHN217

PD4

PD4 CHN217

CHN217

390K_4

PR134

PR134 150K_4

150K_4

1 2

PR116

PR116 147K/F_4

147K/F_4

PC66

0.1u/50V_6

0.1u/50V_6 PR124 *SHORT_PAD_4PR124 *SHORT_PAD_4

2

3

1

2

3

1

1 2

PC69

0.1u/50V_6

PC72

0.1u/50V_6

0.1u/50V_6 PC71

PC71

0.01u/16V_4

8206_ONLDO

+5VPCU

DDPWRGD_R

PC77

0.1u/50V_6

PR137

PR137 *200K/F_4

*200K/F_4

9

BYP

10

OUT1

11

FB1

12

ILIM1

13

5V_EN

1 2

PC76

0.1u/50V_6

PGOOD1

14

EN1

15

DH1

16

LX1

37

PAD

36

PAD

35

PR107

PR107 1/F_6

1/F_6

PR103

VL

*0_6

*0_6 PR231

PAD33PAD34PAD

PC64

PC64 1u/16V_6

1u/16V_6

VL

PC70

4.7u/10V_8

4.7u/10V_8 PR133

PR133

1 2

*SHORT_PAD_4

1 2

3

4NC5

6

7

8

VIN

LDO

ONLDO

LDOREFIN

PU5

PU5 RT8206B

RT8206B

BST117DL118PVCC19NC20GND21PGND22DL223BST2

*SHORT_PAD_6

*SHORT_PAD_4

PR235

12

PR105

PR105 *39K/F_4

*39K/F_4

PC73

0.1u/50V_6

REF

1

REF

TON2VCC

REFIN2

ILIM2 OUT2 SKIP#

PGOOD2

EN2 DH2

LX2

24

1 2

PR231

PR104

*SHORT_PAD_6

PR232

*SHORT_PAD_4

1 2

3V_EN

PC65

0.1u/50V_6

12

PR130

PR130 220K/F_4

220K/F_4

PR234

PR234 *0_4

*0_4

3V_DH

3V_DL

SKIP

3V_LX

578

3 6

578

3 6

+3VPCU_OUT

1 2

PR113

PR113 *0_4

*0_4

PR115

*SHORT_PAD_4

PR233

PR233 *0_6

*0_6

32 31 30 29 28 27 26 25

PR106

PR106 1/F_6

1/F_6

PC74

PC74 1u/16V_6

1u/16V_6

REFIN2

DDPWRGD_R

OCP:9A

L(ripple current) =(9-3.3)*3.3/(2.2u*0.5M*9) =1.9A

Iocp=9-(1.9/2)=8.05A Vth=8.05A*14.2mOhm=114.31mV R(Ilim)=(114.31mV*10)/5uA=228.62K Ipeak(choke)=11.479A

241

PQ14

PQ14 AO4468

AO4468

PD10

PD10 *SX34

*SX34

6/9 unstuff

PQ12

PQ12 AO4710

AO4710

REF

PC165

2.2n/50V_4

PL14

2.2uH

PR98

PR98 *4.7_6

*4.7_6

PC59

PC59 *680p/50V_6

*680p/50V_6

1 2

PR129 *0_4PR129 *0_4

DDPWRGD_R

6/14 remove JP14 , T88 and T93

12

PC171

4.7u/25V_0805

6/14 remove JP16 , T100 and T96

1 2

+3VPCU

PR109

PR109 *100K/F_4

*100K/F_4

PR114

*SHORT_PAD_4

PR126

PR126 *0_4

*0_4

PR131

PR131 *0_4

*0_4

VIN

OCP:9A

6.8A

+3VPCU

PC178

0.1u/50V_6

SYS_HWPG <35>

+

PC175

330u/6.3V_6X5.7

+15VVIN

PR143

PR143 1M_6

1M_6

3

PQ19

1

DMN601K-7

VIN

PR142

PR142 *1M_6

*1M_6

PC75

PC75 *2.2n/50V_4

*2.2n/50V_4

578

S5D MAIND MAIND

PQ15

PQ15 AO4468

AO4468

3 6

241

+5V_S5

+5V_S5+3V_S5

PR139

PR140

PR140 1M_6

1M_6

A A

S5_ON<35,44>

2

PQ16

DTC144EU

PR141

1 3

PR141 1M_6

1M_6PQ16

PR138

PR138 22_8

22_8

3

2

PQ17

PQ17 DMN601K-7

DMN601K-7

1

PR139 22_8

22_8

3

2

1

PQ18

PQ18 DMN601K-7

DMN601K-7

2

2.85A

5

4

+5VPCU

578

3 6

241

3

PQ56

PQ56 AO4468

AO4468

+3VPCU

578

PQ58

PQ58 AO4468

AO4468

3 6

241

+5V

+3V

2.66A2.171A

S5D

+3VPCU+5VPCU

3

2

PQ57

PQ57 AO3404

AO3404

1

+3V_S5

0.23A

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

SYSTEM 5V/3V (RT8206)

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZQ9

1A

37 9Tuesday, June 22, 2010

1

1A

5

4

3

2

1

VID 1.2875V

H_VID0

H_VID1

H_VID2

H_VID3

H_VID4

H_VID5

H_VID6

PR236 *SHORT_PAD_4PR236 *SHORT_PAD_4

PR203

*SHORT_PAD_8

PR50

PR50 *499/F_4

*499/F_4

H_PSI#<6>

PQ9

PQ9 *DMN601K-7

*DMN601K-7

2

This NTC Close to Phase 1 Inductor

PR191

*220K_6 NTC

PC129

1 2

*0.01U/16V_4

H_VID0<6> H_VID1<6> H_VID2<6> H_VID3<6> H_VID4<6> H_VID5<6>

H_DPRSLPVR<6>

H_VID6<6>

+3VPCU

PC27

150p/50V_4

PR46

1.65K/F_4

*SHORT_PAD_4

3212_FBRTN

PR206

PR206 *27.4_4

*27.4_4

PR42

*SHORT_PAD_4

PR41

PR40

PR40 *27.4_4

*27.4_4

PR37 *SHORT_PAD_4PR37 *SHORT_PAD_4

PR32 499/F_4PR32 499/F_4

PR43 1.91K/F_4PR43 1.91K/F_4

PC28

PC28 150p/50V_4

150p/50V_4

I_MON<6>

+5VPCU

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

PC23

2.2U/6.3V_6

7.32K/F_4

PR45

39.2K/F_4

*SHORT_PAD_4

PR207

+VCC_CORE

+5VPCU

PR34

PR34 10_6

10_6

PR31

PR47 5.1K/F_4PR47 5.1K/F_4

12

PC127 1000p/50V_4PC127 1000p/50V_4

PR204

4.75K/F_4

1 2

PC126

0.082u/16V_4

VSSSENSE <6>

VCCSENSE <6>

Connect to input caps

3212_VCC

12 49

PSI#_1

41

10

+5VPCU

11

8

9 48 47 46 45 44 43 42

VR_ON

1

DPRSLPVR_R

40

4

22 23 24

3212_FB

6

PC26

PC26 12p/50V_4

12p/50V_4

3212_COMP

7

5

3

PR202

PR202 *0_4

*0_4

PR210

+1.05V

80.6K/F_4

PR52

PR52 649K/F_4

649K/F_4

37

VCC

AGND AGND

PSI#

VR_TT

TTSNS TRDET#

VARFR VID0 VID1 VID2 VID3 VID4 VID5 VID6 EN DPRSLPVR CLK_EN#

OD3# PWM3 SWFB3

FB

COMP

FBRTN

IMON

IREF

13

3212_RAMP

16

14

PR209

69.8K/F_4

4

PR55

PR55 1K/F_4

1K/F_4

PC130

PC130 1000p/50V_4

1000p/50V_4

RAMP

ADP3212

RPM

PR208

PR208 162K/F_4

162K/F_4

DELAY_VR_PWRGOOD <4,8>

12

+

PQ41

5

AOL1448

PC121

PC118

PC179

4

+3VPCU

+5VPCU

PQ43

PQ43 AOL1718

PR39

1.91K/F_4

2

39

38

PH0

PH1

PWRGD

3212_DH1

35

DRVH1

3212_BOOT1

36

BST1

PR38 2.2_6PR38 2.2_6

PC25

0.22u/25V_6

3212_SW1

34

SW1

3212_DL1

31

DRVL1

PU2

RT

15

32

PVCC

26

DRVH2

3212_BOOT2

25

BOOT2

27

SW2

29

DRVL2

30

PGND

PR48 100/F_4PR48 100/F_4

28

SWFB2

PR44 100/F_4PR44 100/F_4

33

SWFB1

19

CSSUM

20

CSCOMP

CSREF

18

PC131

PC131 1u/6.3V_4

1u/6.3V_4

3212_CSCOMP

17

LLINE

3212_ILIM

21

ILIM

3212_CSREF CSREF

*SHORT_PAD_4

PC29

1 2

4.7U/6.3V_6

PC33

PC33 560P/50V_4

560P/50V_4

PR53

PR49

2.2_6

PC34

PC34 1000p/50V_4

1000p/50V_4

12

PR51

1.69K/F_4

+5VPCU

PR57

73.2K/F_4

AOL1718

4

3212_DH2

PC31

0.22u/25V_6

3212_SW2

3212_DL2

3212_CS_PH2

3212_CS_PH1

3212_CSSUM

PR58

PR58 165K/F_4

165K/F_4

Short the net trace

PR190

PR190 220K_6 NTC

220K_6 NTC

Close to Phase 1 Inductor

Peak :40A ; OCP:53A (1.69K/F_4)

*100u/25V_6X5.7

213

6/9 preserved

PQ42

5

AOL1718

213

0.1u/50V_6

4

PQ48

PQ48 AOL1448

AOL1448

PQ46

PQ46 AOL1718

AOL1718

PR61

PR61 127K/F_6

127K/F_6 PR56

PR56 127K/F_6

127K/F_6

5

213

4

4.7u/25V_8

5

213

5

213

PC120

4.7u/25V_8

PR35

PR35 *2.2/F_6

*2.2/F_6

PC24

PC24 *1000P/50V_6

*1000P/50V_6

PQ47

PQ47 AOL1718

AOL1718

12

PC135

0.1u/50V_6

4

PC122

4.7u/25V_8

5

213

12

PC133

4.7u/25V_8

+

6/14 remove JP7,T56 and T57

PC124

100u/25V_6X5.7

12

PC134

4.7u/25V_8

PR54

PR54 *2.2/F_6

*2.2/F_6

PC32

PC32 *1000P/50V_6

*1000P/50V_6

PR30

*SHORT_PAD_4

PC132

4.7u/25V_8

PR59

*SHORT_PAD_4

1 2

12

1 2

VIN

PL8

0.36uH

3

4

PR33

PR33 10/F_6

10/F_6

5/19 change to 0603

6/14 remove JP8,T76 and T77

+

PC137

100u/25V_6X5.7

PL9

0.36uH

3

4

PR60

PR60 10/F_6

10/F_6

5/19 change to 0603

Peak :48A ; OCP:55A (1.74K/F_4)

Size Document Number Rev

Date: Sheet of

3

2

Date: Sheet of

+VCC_CORE Countinue current:36A Peak current:48A OCP minimum 55A Loadline=1.9mV/A (IMVP 6.5) Rilm=1.69K

+VCC_CORE

6/21 unstuff

12

+

PC136

0.1u/50V_6

6/21 stuff

PC117

0.1u/50V_6

+VCC_CORE ADP3212

6/21 stuff

PC123

PC123 *330u/2V_7343

*330u/2V_7343

VIN

+VCC_CORE

6/21 unstuff

+

PC30

PC30 330u/2V_7343

330u/2V_7343

Quanta Computer Inc.

PROJECT :

+

PC22

330u/2V_7343

+

PC128

*330u/2V_7343

1

ZQ9

1A

38 9Tuesday, June 22, 2010

1A

H_PROCHOT#<4>

Panasonic ERT-J0EV474J

PR36

PR36 100K/F_4

100K/F_4

PR199 *0_4PR199 *0_4

PR200 *0_4PR200 *0_4

PR198 *0_4PR198 *0_4

PR197 *0_4PR197 *0_4

PR196 *0_4PR196 *0_4

PR195 *0_4PR195 *0_4

PR193 *0_4PR193 *0_4

+1.05V

3

1

VR_PWRGD_CK505#<3>

1 2

5

+3VPCU

D D

C C

VRON<35>

B B

A A

5

4

3

2

6/14 Remove JP13 ,T84,T85

1

[PWM]

VIN

PC144

+

560u/2.5V

PC145

0.1u/50V_6

OCP: 23A

19A

+1.05V

PR95

PR95 0_6

0_6

PC55

PC55 1u/16V_6

1u/16V_6

R1

+5V_S5

PD2

PD2 RB500V-40

RB500V-40

0.1u/50V_6

PR75

4.02K/F_4

PC54

UGATE-1.05V

PHASE-1.05V

LGATE-1.05V

PC56

4.7u/6.3V_6

PR94

2.15K/F_4

PQ54

PQ54 AOL1718

AOL1718

PC41

PC41 *33p/50V_6

*33p/50V_6

4

6/9 preserved

+

5

PC180

213

100u/25V_6X5.7

PQ55

PQ55 AOL1448

AOL1448

5

213

PQ52

PQ52 AOL1718

AOL1718

5/19 add

+

PC168

100u/25V_6X5.7

5

4

213

PC164

2.2n/50V_4

PR86

PR86 *4.7_6

*4.7_6

PC47

PC47 *680p/50V_6

*680p/50V_6

PL12

0.56uH

12

PC57

4.7u/25V_0805

12

PC163

5/19 change location

4.7u/25V_0805

6/14 Remove JP11 ,T83,T82

+

PC146

*10u/10V_8

PC153

560u/2.5V

D D

PR71

PR71 10_6

10_6

PR79

PR79 1M/F_4

1M/F_4

PU4

PR91

*SHORT_PAD_4

PR74

PR74 *10K/F_4

*10K/F_4

*SHORT_PAD_4

+3V

PC48

PC48 *0.1u/50V_6

*0.1u/50V_6

PC42

PC42 1u/16V_6

1u/16V_6

PC46

*1000p/50V_6

MAINON<19,35,40,43>

C C

HWPG_1.05V<35>

B B

PU4 UP6111AQDD-B3

UP6111AQDD-B3

15

EN/DEM

16

TON

1

VOUT

2

VDD

3

FB

4

PGOOD

6

GND

5

NC

14

NC

1.05V_FB

BOOT UGATE PHASE

OC

VDDP

LGATE

PGND

TPAD

PR96

2.2/F_6

13 12 11 10 9 8 7 17

PR73

PR73 10K/F_4

10K/F_4

R2

PR237 *SHORT_PAD_4PR237 *SHORT_PAD_4

TON=3.85p*RTON*Vout/(Vin-0.5)

Frequency=Vout/(Vin*TON)

A A

TON=3.85p*1M*1/(Vin-0.5)

Frequency=1/(0.0036767)=272K

5

AO1718 Rdson=3~4.3mOhm

L(ripple current) =(19-1.05)*1.05/(0.56u*272k*19) ~6.512A

RILIM=2.15mohm*23-3.256/20uA=2.122Kohm I(choke)peak=29.512A

4

3

PR222

*SHORT_PAD_6

Quanta Computer Inc.

ZQ9

1

ZQ9

1A

39 9Tuesday, June 22, 2010

PROJECT :

Size Document Number Rev

+VTT (UP6111A)

Date: Sheet of

2

Date: Sheet of

PROJECT :

[PWM]

5

4

3

2

1

D D

+0.75V_DDR_VTT

PC166

PC62

0.033u/50V_6

PC166 10u/10V_8

10u/10V_8

+1.5VSUS

+5V_S5

*33p/50V_6

PC167

+SMDDR_VREF

PC167 10u/10V_8

10u/10V_8

2.25A

C C

0.15A

PR238 *SHORT_PAD_4PR238 *SHORT_PAD_4

PR101

*SHORT_PAD_6

B B

FOR DDR III

PC172

PC162

PC162 10u/10V_8

10u/10V_8

24

25

VTT

GND

1

VTTGND

2

VTTSNS

3

GND

4

MODE

5

VTTREF

6

COMP

NC7VDDQSNS8VDDQSET9S310S511NC

PR226

10K/F_4

8207A_SET

PR227

10K/F_4

PC161

18

17

16

15

14

13

PR225

PR225 620K/F_4

620K/F_4 PR230

PR230

PR229

PC161

0.1u/50V_6

PR99

7.15K/F_4

PR102

PR102 100K/F_4

100K/F_4

(For RT8207A 400KHZ ) close to pc2008

VIN

SUSON <35>

MAINON <19,35,39,43>

23

VLDOIN

RT8207A

PU11

22

VBST

8207A_VBST

21

DRVH

PR228

PR228 *0_4

*0_4

*SHORT_PAD_6

19LL20

DRVL

CS_GND

PGOOD

12

S5_1.8V

*SHORT_PAD_4

S3_1.8V

*SHORT_PAD_4

PR223

PGND

V5IN

V5FILT

CS

+5V_S5

Vout = (PR150/PR149) X 0.75 + 0.75

S3_1.8VS5_1.8V

PR224

PR224 *0_4

*0_4

12

PC61

PC61 1u/6.3V_4

1u/6.3V_4

PR100

5.1/F_6

+3V

HWPG_1.5V <35>

8207A_DH 8207A_LX 8207A_DL

12

+1.5VSUS

+5V_S5

PC60

PC60 1u/6.3V_4

1u/6.3V_4

6/14 Remove JP12 , T86 and T87

12

PC49

PL11

0.56uH

PC49

4.7u/25V_0805

5

4

213

5

4

213

PQ53

PQ53 AOL1448

AOL1448

PQ51

PQ51 AOL1718

AOL1718

PC159

2200p/50V_6

PR84

PR84 *4.7_6

*4.7_6

PC45

PC45 *680p/50V_6

*680p/50V_6

5/19 add

PC160

100u/25V_6X5.7

560u/2.5V

+

PC150

12

PC158

4.7u/25V_0805

+

PC39

PC39 10u/10V_8

10u/10V_8

VIN

OCP:20A

16.84A

+1.5VSUS

6/14 Remove JP1 , T23 and T24

AO1718 Rdson=3.8~4.3mOhm

L(ripple current) =(19-1.5)*1.5/(0.56u*400k*19) ~6.168A

Vtrip= (20-6.168/2)*4.3mohm=0.072739V RILIM=Vtrip/10u=7.273K

578

MAIND<37,43>

A A

5

4

MAIND

PQ59

PQ59 AO4468

AO4468

3 6

241

+1.5V

2.03A

S0

S3

S4/S5

3

2

S3 S5

1 1

10

0 0

Size Document Number Rev

Date: Sheet of

ON ON ON

ON ON

OFF

Quanta Computer Inc.

PROJECT :

DDR 1.5V(RT8207A)

1

ZQ9

VTTREF+1.5VSUS

OFF

OFFOFF

1A

40 9Tuesday, June 22, 2010

1A

Int_VGA

1 1

2 2

5/26 modify power budget

3 3

A

[PWM]

62881_G ND

HWPG_G FX<35>

62881_G ND

5/26 modify power budget

PR92

IV@820K/F_4

PR93

IV@17.8K/F_4

5/26 modify power budget

PR221

PR221 *IV@SHORT_PAD_6

*IV@SHORT_PAD_6

PR218

*IV@150K/F_4

PC51

IV@100P/50V_4

PR90 *IV@SHORT_PAD_4PR90 *IV@S HORT_PAD_4

62881_G ND

PC50

IV@22p/50V_4

PC52

IV@150P/50V_4

IV@330p/50V_4

62881_G ND

GFX_VID0<6> GFX_VID1<6> GFX_VID2<6> GFX_VID3<6> GFX_VID4<6> GFX_VID5<6> GFX_VID6<6>

PR219 IV@47K/F_ 4PR219 I V@47K/F_ 4

PR87 IV@8. 06K/F_4P R87 IV@8.0 6K/F_4

B

GFX_ON<6>

GFX_DPRSLPVR<6>

+3V

PC53

IV@1000P /50V_4

PR88

PR88 IV@8.87K/F_4

IV@8.87K/F_4

Rdroop

5/26 modify power budget

PC157

PC157 IV@330p/50V_4

IV@330p/50V_4

PC156

PC155

PC155 IV@1000P /50V_4

IV@1000P /50V_4

62881_G ND

PR89

PR89 *IV@100K_4

*IV@100K_4

62881PG OOD

62881RBIAS

62881VW

62881COMP

62881FB

62881VS EN

PC149

*IV@0.01u /25V_4

PR215 IV@100K _4PR215 IV@100K_4 PR217

PR217

*IV@SHORT_PAD_4

PR81

*IV@SHORT_PAD_4

31

GND30GND

1

CLK_EN#

2

PGOOD

3

RBIAS

4

VW

5

COMP

6

FB

7

VSEN

RTN

8

62881RTN

12

62881_GND

62881DPRSLPVR

29

28

GND

DPRSLPVR

IV@ISL62881HRTZ-T

ISUM-

9

62881ISUM-

C

GFX_VID5

62881VR_ON

GFX_VID6

25

27

26

VID5

VID6

VR_ON

PU3

VDD

ISUM+

11

10

62881VDD

62881ISUM+

PC152

PC152 IV@1u/6.3 V_4

IV@1u/6.3 V_4

62881_G ND

GFX_VID4

24

VID4

VIN

12

62881VIN

PR214

PC148

PC148 IV@0.22u/25V_6

IV@0.22u/25V_6

62881_G ND

PR212

PR212 IV@10_6

IV@10_6

GFX_VID2

GFX_VID3

23

22

VID3

VID2

IMON

13

14

GFX_IMON

PR77

PR77 *IV@10K/F_4

*IV@10K/F_4

*IV@SHORT_PAD_4

+5V_S5

VID1

VID0

VCCP

LGATE

VSSP

PHASE

UGATE

BOOT

62881BO OT

21

20

19

62881LG ATE

18

17

62881PHASE

16

62881UGATE

15

1 2

GFX_VID0

GFX_VID1

PR63

IV@1_6

1 2

PC44

PC44 *IV@0.22u /10V_4

*IV@0.22u /10V_4

VIN

D

PR78

PR78 *IV@0_4

*IV@0_4

GFX_VID6 GFX_VID0GFX_VID3 GFX_VID2GFX_VID5 GFX_VID4 GFX_VID1

+5V_S5

PC37

1 2

IV@4.7u/6 .3V_6

PQ49

PQ49 IV@AOL17 18

IV@AOL17 18

PC38

IV@0.22u/25V_6

GFX_IMON <6>

5/26 modify power budget

VSS_AXG _SENSE <6>

E

+1.05V +1.05V

PR69

12

PC139

IV@0.1u/5 0V_6

PR62

*IV@2.2/F_ 4

PC35

*IV@2.2n/50V_4

PR69 *IV@0_4

*IV@0_4

12

PC138

PC138 IV@4.7u/2 5V_080 5

IV@4.7u/2 5V_080 5

PR70

PR76

PR76 *IV@0_4

*IV@0_4

5

4

213

5

4

213

PR70 *IV@0_4

*IV@0_4

PQ50

PQ50 IV@AOL14 48

IV@AOL14 48

5/26 modify power budget

PQ10

IV@AOL17 18

4

5

213

F

PR67

PR67 *IV@0_4

*IV@0_4

5/26 modify power budget

PL10

PL10 IV@0.56uH

IV@0.56uH

1 2

3

PR213

PR213 IV@3.65K/F_4

IV@3.65K/F_4

PR66

IV@2.61K/F_4

PR68

IV@11K/F_ 4

PC40

IV@0.15U/10V_4

PC147

*IV@0.1u/10V_4

5/26 modify power budget

IV@2.49K/F_4

PR72

IV@82.5/F_4

PR65

PR65 *IV@0_4

*IV@0_4

6/14 Remove JP10,T80,T81

12

PC140

PC140 IV@4.7u/2 5V_080 5

IV@4.7u/2 5V_080 5

4

PR211

IV@10K_6 _NTC

Close to Phase Inductor

62881_G ND

Ri

PR216

12

PC43

PC43 IV@0.01u/25V_4

IV@0.01u/25V_4

Close to Pin9 and Pin10

PR64

PR64 *IV@0_4

*IV@0_4

PC141

PC141 IV@2.2n/5 0V_4

IV@2.2n/5 0V_4

PC151

PC151 IV@0.1u/1 0V_4

IV@0.1u/1 0V_4

PC154

PC154 *IV@180P/50V_4

*IV@180P/50V_4

PR220

PR220 *IV@100/F_4

*IV@100/F_4

G

+

PC142

PC142 IV@560u/2.5V

IV@560u/2.5VPR211

H

OCP:25A Ri=2.49K Change Ri can adjust OCP point LL=7.03mv/A Rdroop=8.87K Change Rdroop can adjust loadline

VIN

5/26 modify power budget

6/14 Remove JP9,T79,T78

+

PC143

PC143 IV@560u/2.5V

IV@560u/2.5V

PC36

IV@10u/6.3V_8

OCP:25A 22A

+VGFX_AXG

Parallel

PR80

*IV@SHORT_PAD_4

4 4

A

B

*IV@SHORT_PAD_4

PR83

*IV@SHORT_PAD_4

C

PR82 IV@10 /F_4PR82 IV@10/F_4

PR85 IV@10 /F_4PR85 IV@10/F_4

D

VSS_AXG _SENSE <6>

VCC_AXG_ SENSE <6>

1.Level 1 Environment-related Substances Should NEVER be Used.

2.Purchase ink, paint, wire rods, and Molding resins only from the business Partners that Sony approves as Green Partners.

E

F

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

+VGFX_AXG (ISL62881)

Date: Sheet of

G

PROJECT :

H

ZQ9

1A

41 9Tuesday, Jun e 22, 201 0

1A

1

PR18

PR18 *EV@0_4

*EV@0_4

PR16 *EV@0_4PR16 *EV@0_4

R1

PR169

EV@10K_4

+3V_D_S

EV@0.1u/10V_4

PR172

PR172 EV@100K_4

EV@100K_4

PC100

PC99 EV@1u/10V_6PC99 EV@1u/10V_6

PC98 EV@1u/10V_6PC98 EV@1u/10V_6

A A

5/12 change

PG_1V_EN<44>

dGPU_VRON<11,19>

+3V_D_S<19,21,35>

B B

PR171

*EV@0_4

PR170

*EV@0_4SHORT_PAD_4

R3

PR162

3

EV@332K/F_4

PC91

EV@0.01u/16V_4

2

PQ34

PQ34 EV@DMN601K-7

EV@DMN601K-7

1

R4

PR163

3

EV@130K/F_4

PQ33

PQ33 EV@DMN601K-7

EV@DMN601K-7

1

R2

VID1<17>

PR161

EV@3K_4

C C

VID2<17>

PR160

PR160 EV@3K_4

EV@3K_4

REF-2V

PR168

PR168 EV@39.2K/F_4

EV@39.2K/F_4

EV@1000P/50V_4

PR167

PR167 EV@49.9K/F_4

EV@49.9K/F_4

PC97

2

+5V_S5

8792VCC

8792EN

8792SKIP#

8792REFIN

8792REF

5/24 change to 73.2K

2

VDD

13

VCC

14

PGOOD

1

EN

EV@MAX8792ETD+T

12

SKIP#

10

REFIN

11

REF

PR174

PR174 EV@73.2K/F_4

EV@73.2K/F_4

PR173

PR173 EV@100K_4

EV@100K_4

3

PR164

EV@200K/F_4

TON

DH

BST

PU7

LX

DL

FB

ILIM

EP

PR240 *SHORT_PAD_4PR240 *SHORT_PAD_4

15

PR165

PR165 *EV@SHORT_PAD_6

*EV@SHORT_PAD_6

7 5

6

4

3

8

9

8792TON 8792DH

8792BST

8792LX

8792DL

8792ILIM

EV@200K/F_4

PR166

PR166 EV@1_6

EV@1_6

PC96

EV@0.22u/25V_6

Place near GND pin15

Frequency(PR220=200K) 300K

AMD Park VID Table

GPU_VID1 (GPIO15) GPU_VID2 (GPIO20)

0 1 0 1 1

0 0 1

PC20

*EV@4700P/25V_4

+VGPU_CORE

4

6/14 Remove JP3,T38,T37

6/9 preserved

+

5

PQ35

PQ35 EV@AOL1448

213

5

213

EV@AOL1718

EV@AOL1448

PQ36

4

+

EV@2200p/50V_4

PC181

100u/25V_6X5.7

PC93

12

PC94

PC94 EV@4.7u/25V_0805

EV@4.7u/25V_0805

PL6

EV@1uH

PR17

PR17 *EV@2.2_6

*EV@2.2_6

PC19

PC19 *EV@1000p/50V_4

*EV@1000p/50V_4

EV@0.1u/50V_6

PC90

12

PC95

PC95 EV@4.7u/25V_0805

EV@4.7u/25V_0805

+

PC92

EV@330u/2V_7343

VIN

PR13

PR13 EV@1M_6

EV@1M_6

+

EV@330u/2V_7343

1.12V

5

6/14 Remove JP4,T40,T39

PC18

+VGPU_CORE

PR15

PR15 EV@22_8

EV@22_8

3

VIN

+VGPU_CORE

OCP=15A

12A

1.05V

0.95V

0.9V

8792EN

2

PQ1

EV@DTC144EU

PR14

PR14 EV@1M_6

1 3

EV@1M_6

2

PQ2

PQ2 EV@DMN601K-7

EV@DMN601K-7

1

PC89

EV@0.01u/16V_4

D D

Quanta Computer Inc.

PROJECT :

Size Document Number Rev

GPU CORE(MAX8792)

Date: Sheet of

1

2

3

4

Date: Sheet of

PROJECT :

ZQ9

1A

42 9Tuesday, June 22, 2010

5

4

3

2

1

2.17A

PC109

+1.8V

6/14 Remove JP6,T41,T42

PC108

10u/10V_8

+3VPCU

6/14 Remove JP5

D D

MAINON<19,35,39,40>

PR176

*SHORT_PAD_4

PR177

PR177 100K/F_4

100K/F_4

PC104

PC104 10u/10V_8

10u/10V_8

6/9 change the P/N

PC102

PC102 1000p/50V_4

1000p/50V_4

PR181

15K/F_4

PC110

PC110 *100P/50V_4

*100P/50V_4

PC105

0.1u/25V_4

54418-1_VFB

PC111

PC111 1200p/50V_4

1200p/50V_4

PR182

PR182 182K/F_4

182K/F_4

PU8 HPA00835RTERPU8 HPA00835RTER

16

VIN

1

VIN

2

VIN

15

EN

6

VSNS

7

COMP

8

RT/CLK

9

SS

PC106

0.01u/25V_4

10

PH

11

PH

12

PH

PR175

13

BOOT

*SHORT_PAD_6

14

PWRGD

3

GND

4

GND

5

AGND

PAD17PAD18PAD19PAD20PAD21PAD

22

PC101

0.1u/50V_6

PR178

100K/F_4

V0=0.8*(R1+R2)/R2

1uH_7X7X3

5/12 change

HWPG_1.8V <35>

+3V_S5

PL7

PR180

R1

100K/F_4

10u/10V_8

PC107

10u/10V_8

PR179

78.7K/F_4

10u/10V_8PC106

6/9 change the P/N

54418-1_VFB

R2

VIN

C C

PG_1.5V_EN<44>

PR29

PR29 *EV@100K_4

*EV@100K_4

+1.5V_GPU

B B

PR27

PR27 EV@100K_4

EV@100K_4

MAINON<19,35,39,40>

A A

12

EV@DTC144EUA

PR22

PR22 EV@1K_4

EV@1K_4

12

EV@PDTC143TT

2

PQ6

2

PQ3

2

PR127

PR127 *100K/F_6

*100K/F_6

1 3

PQ26

PQ26 DTC144EU

DTC144EU

1 3

PR23

PR23 EV@1M_4

EV@1M_4

PR26

PR26 EV@1M_4

EV@1M_4

VIN

PR20

PR20 EV@1M_4

EV@1M_4

PR28

PR28 EV@1M_4

EV@1M_4

VIN

PR128

PR128 1M_4

1M_4

PR136

2

1M_4

2

PR118

PR118 22_8

22_8

3

1

PR24

PR24 *EV@22_8

*EV@22_8

3

PQ7

PQ7 *EV@DMN601K-7

*EV@DMN601K-7

1

PR19

PR19 EV@22_8

EV@22_8

3

PQ5

PQ5 EV@DMN601K-7

EV@DMN601K-7

1

PQ20

PQ20 DMN601K-7

DMN601K-7

+15V+1.5V_GPU

PR25

PR25 EV@1M_4

EV@1M_4

dGPU_D

3

2

PQ8

PQ8 EV@DMN601K-7

EV@DMN601K-7

1

+15V+1.8V_GPU

PR21

PR21 EV@1M_4

EV@1M_4

3

2

PQ4

PQ4 EV@DMN601K-7

EV@DMN601K-7

1

PR119

PR119 22_8

22_8

3

2

PQ21

PQ21 DMN601K-7

DMN601K-7

1

dGPU_D1

+0.75V_DDR_VTT

3

2

1

PC21

PC21 *EV@2.2n/50V_4

*EV@2.2n/50V_4

PC103

PC103 *EV@2.2n/50V_4

*EV@2.2n/50V_4

PR121

PR121 22_8

22_8

PQ23

PQ23 DMN601K-7

DMN601K-7

+1.5VSUS

578

PQ38

EV@AO4468

3.94A

PQ37

PQ37 EV@AO3404

EV@AO3404

2

+1.5V_GPU

1.41A

+1.8V_GPU

+1.8V+1.5V

3

*DMN601K-7

1

PR122

PR122 *22_8

*22_8

PQ24

+15V+5V+3V

PR123

PR123 1M_4

1M_4

MAINDMAINON_ON_G

3

2

PQ25

PQ25 DMN601K-7

DMN601K-7

1

PC68

PC68 *2200p/50V_4

*2200p/50V_4

MAIND <37,40>

3 6

241

+1.8V

3

2

1

PR120

PR120 22_8

22_8

3

2

PQ22

DMN601K-7

1

7/7 modify

Quanta Computer Inc.

ZQ9

PROJECT :

Size Document Number Rev

Discharge/1.8V)

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZQ9

1A

43 9Tuesday, June 22, 2010

1

43 9Tuesday, June 22, 2010

1A

5

+5VPCU

PU9

PC116

4 2 3

8 9

PU9 RT9018A

RT9018A

VPP VEN VIN

GND GND

PC113

0.1u/50V_6

PR185

PR185 100K_4

100K_4

PC115

10u/10V_8

0.1u/50V_6

PC114

0.1u/50V_6

D D

PG_1V_EN<42>

+1.5VSUS

12

PGOOD

ADJ

7

4

+3V_S5

12

PR186

PR186 10K_4

10K_4

1 6

VO

5

NC

PR183

9.1K/F_4

0.8V

6/9 change the P/N

PR184

PR184 34K/F_4

34K/F_4

12

PC112

22u/10V_1206

PG_1.5V_EN <43>

+1V

1.5A

3

2

1

Vout =0.8(1+R1/R2) =1V

C C

VIN

PD8

PD8 SW1010CPT

SW1010CPT

PU10B

PU10B LM393

LM393

5

+

6

7

-

PR205

PR205 1M_6

1M_6

Thermal protection

B B

S5_ON<35,37>

S5_ON

2

PQ44

DTC144EU

VLVL

1 3

1

PQ45

PQ45 AO3409

3

PR201

PR201 0_6

0_6

AO3409

2

Need fine tune for thermal protect point

PC125

PU10A

PU10A LM393

LM393

1

PC125

0.1u/50V_6

4

PR189

PR189 200K/F_4

PR188

1.74K/F_4

PR187

10K_6_NTC

3

A A

S5_ON

2

1

Note placement position

PQ40

PQ40 DMN601K-7

DMN601K-7

5

1.74K/F_4

200K/F_4

2.469V

PR192

PR192 200K/F_4

200K/F_4

84

3

+

2

-

For EC control thermal protection (output 3.3V)

SYS_SHDN# <4,37>

PR194

PR194 200K_6

200K_6

3

2

PQ39

PQ39 DMN601K-7

PC119

0.1u/50V_6

DMN601K-7

1

3

Quanta Computer Inc.

ZQ9

PROJECT :

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

PROJECT :

ZQ9

1A

44 9Tuesday, June 22, 2010

1

5

4

3

2

1

MODEL

REV

Model

5/20 delet TP for modify Q23

1A

T7000 TP7010 TP7011 TP7012 TP44

ZQ9

TP7013 TP7025 TP7022 TP7017 TP7028 TP39 TP7020 TP7023 T3502 T3503 T3500 T3501 T3506 T3510 T3518 T3511 T3517 T3519 T3513 T3515 T3516 T3505

5/21 swap RP7000 by following layout house's ask add HOLE18 HOLE19 HOLE20 HOLE21 HOLE22 change the LVDS connector and swap pin define delete PC4026

5/24 delete R30019 change PR3011 to 73.2K stuff R3624 & R3527 and unstuff other components for changing +3V_D and +3V_D_S to +3V swap RN5 & RN10 pin defines change footprints of HOLE2, HOLE3, HOLE5, HOLE21 and add HOLE23 change Q45 & Q46 left side pull-high voltage to +3V 5/25 reserve C1, C2, C3, C4, C507, C508, C509, C503, C511, C515, C516, C519, C520 for EMI

5/26 update JDIM7001 & CN14 footprint add PQ4000 change P/N of PL4000, PR4005, PC4022, PR4026, PR4006, PC4020, PR4024, PR4007, PC4018

5/27 Delete HOLE4, HOLE22

2A

6/9 stuff PC128, unstuff PC22 change the footprints C187, C178, C74, R144 to Std. stuff R80, R79, R53 & R77, R78, R51 for Park stuff R132, R407, R414 for board ID stuff R293, R288, R285, R281, R280 for debug change PR145 P/N to 3720

D D

preserved PC179, PC180, PC181 unstuff PD9, PD10 for cost down change PC104, PC107, PC109 P/N change PR184 P/N

6/11 change the P/N of Q12, Q20, Q21

6/14 change Q16, PC124, PC137, PC160, PC168, PC173 C572 P/N for EOD parts 6/18 unstuff U27, C423, R287 and stuff R284 for using internal ROM for LAN change the AMP P/N and footprint add CN19, C715, C717, Q25, R574, R573 reserve L57, C716 for adding another BT stuff Q13, Q14, R236, R237 & unstuff R215, R216 change U11 P/N delete C489, R565, R330 reserve R575 & R576 stuff R563, R564, R571, C15, C426, C506, C479 & add C718, C719, C720 for EMI's request

6/14 Remove Page37 JP2,JP15,JP16,JP14 Page38 JP7,JP8 Page39 JP13,JP11 Page40 JP12,JP1 Page41 JP10,JP9 Page42 JP3,JP4 Page43 JP5,JP6

Power parts

6/18 Change to Shortpad 0603 PR231,PR104,PR222,PR223,PR101,PR221,PR165,PR175 Change to Shortpad 0402 PR149,PR4,PR154,PR124,PR115,PR114,PR232,PR133,PR108,PR110,PR112 PR117,PR30,PR59,PR31,PR37,PR53,PR42,PR41,PR91,PR230,PR229,PR217,PR81,PR90,PR214,PR80,PR83,PR170,PR176 Change to Shortpad 0805 PR203

6/18 Change PQ30 to AO4468 PN:BAM44680003

6/19 modify R90, R386, R107, R390, R109, R149, R163, R194, R233, R531, R234, R271, R556, R306, R292, R332, R554, R562, R524 to 0402 shortpad

6/19 modify R142, R172, R186, R168, R417, R178, R201, R113, R185, R169, R213, R174, R275, R268, R299, R557, R572, R570 to 0603 shortpad

6/19 modify R162, R140, R210, R116, R124, R303, R8, R14 to 0805 shortpad

6/19 modify R526 to 1206 shortpad

6/20 change C474 P/N, delete R565, R330, C489 for AMP change , change U11 P/N change U17 P/N 6/21 stuff R565, unstuff L50 for 3V CLK gen and change CLK gen 100MHz signals order add PR235, PR236, PR237, PR238, PR240 shortpads change R458, R457 back to 0 ohm unstuff SW1 modify R443, R550 to Shortpad 0805 add PAD1, PAD2, PAD3 change U11, U20 P/N change R315, R319 P/N reserve C489 for EMI's request stuff PC180, PC181 stuff C285, C284 stuff PC22, PC30 unstuff PC123, PC128

C C

4A

CHANGE LIST

FROM To

XX1A

X 1A

1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A

1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A 1A

1A 1A 1A 1A 1A 1A 1A 1A 1A 1A

1A 1A 1A 1A 1A 1A

1A 1A 1A

B2A B2A B2A B2A C3A B2A B2A B2A B2A C3A B2A B2A B2A B2A C3A

B2A B2A B2A B2A C3A

B2A B2A B2A

B2A C3A

ZQ9

1A

B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A

B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A

B2A B2A B2A B2A B2A B2A B2A B2A B2A B2A

B2A B2A B2A B2A B2A B2A

B2A B2A B2A

C3A C3A C3A

C3AB2A C3A C3A C3A

C3AB2A C3AB2A C3A C3A C3A C3AB2A C3AB2A

B B

Quanta Computer Inc .

PROJECT :

Size Document Number Rev

Change list2

Date: Sheet

A A

5

ZQ9

45 4 5Tuesday, June 22, 20 10

of

PROJECT MODEL : ZR7B APPROVED BY:

DOC NO.

1A

4

PART NUMBER:

DRAWING BY: REVISON:

3

2009/12/24

DATE:

C3A

2

1

Acer Aspire 4738G Schematics lqv77

Specifications and Main Features

Frequently Asked Questions

User Manual