Acer Aspire 4733z Schematics

5

4

3

2

1

BOM MARK

IV@: INT VGA
EV@: STUFF FOR EXT VGA
SP@: STUFF FOR UMA or VGA

D D

5(9%

CLOCK GENERATOR

ICS:
SELGO: SLG8SP513VTR

=46<67(0%/2&.',$*5$0

X'TAL

14.318MHz

Penryn 478

uFCPGA

P2

P3, P4

Thermal Sensor

(G780P81U) (G991)

P3

Fan Driver

P25

DDR3 PWR

TPS51116

THERMAL
PROTECTION

DISCHARGER

VGA CORE
MAX8792

CHARGER

P40

3/5V SYS PWR

P44

CPU CORE PWR

P42

+1.05V

P41

UP6111A

ISL88731A

RT8206

ISL6266A

P36

P37

P39

P38

FSB

667/800/1067 Mhz

ATI-Park

PCIE 16X

VRAM DDRIII

DDRIII

SO-DIMM 0
SO-DIMM 1

P16,P17

C C

HDD (SATA) *1

Dual Channel DDR3

667/800 MHz

(GM45/ PM45/ GL40)

P26

NB

Cantiga

P5, P6, P7, P8, P9, P10, P11

X4 DMI interface

LVDS

RGB

512MB

Ext USB Port x 2

USB 0,2

Int USB Port x 1

USB 6

Bluetooth

USB3

B B

CCD

USB11

P27

P27

P27

P24

ODD (SATA)

P26

SATA0

SATA1

USB 2.0

Azalia

SB

ICH9M

P12,P13,P14,P15

PCI-Express

USB1

X'TAL

32.768KHz

P18-P23

EXT_LVDS
EXT_CRT
EXT_HDMI

INT_LVDS

INT_CRT

INT_HDMI

PCIE-6

SWITCH

CIRCUIT

HDMI switch
(PS8101T)

PCIE-4

X'TAL
25MHz

P25

P25

Mini Card

WLAN

CRT

LVDS

HDMI

P27

P24

P24

P25

Media

LPC

Audio CODEC

P29

P28

Int. MIC

P29

(272)

A A

Audio Amplifier
G1453L

P28

MIC Jack

EC (WPC781)

SPI ROM

Touch Pad

P33

P26 P33

P33

X'TAL

32.768KHz

K/B COON.

Int.
Speaker

P29

5

4

3

Cardreader

(AU6437)

USB2

Card Reader
Connector

P30

P32

2

Giga-LAN

BCM57780

Transformer

RJ45

P31

P30

P31

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Block Diagram

Block Diagram

Block Diagram

1

1A

1A

1A

1Monday, July 12, 2010

1Monday, July 12, 2010

1Monday, July 12, 2010

of

43

of

43

of

43

5

&ORFN*HQHUDWRU&/.

PBY160808T-301Y-N/2A/300ohm_6

PBY160808T-301Y-N/2A/300ohm_6

+3V

D D

C C

B B

L42

L42

SATACLKREQ#14
LAN_CLKREQ#31
PCLK_DEBUG28

PCLK_59135

PCLK_ICH13

CLK_Card4833
CLKUSB_4814

14M_ICH14

5/5 modify

Pin 11

Pin 12

Pin 13

Pin 14

&ORFN*HQ,&

A A

PDAT_SMB14,16,28 PCLK_SMB14,16,28

C544

C544
*0.1u/10V_4

*0.1u/10V_4
C434

C434
*0.1u/10V_4

*0.1u/10V_4
C542

C542
*10u/10V_8

*10u/10V_8
C569

C569

0.1u/10V_4

0.1u/10V_4
C557

C557

0.1u/10V_4

0.1u/10V_4
C550

C550

0.1u/10V_4

0.1u/10V_4
C450

C450

0.1u/10V_4

0.1u/10V_4

C541

C541
10u/10V_8

10u/10V_8

R321 475/F_4R321 475/F_4
R325 475/F_4R325 475/F_4
R330 33_4R330 33_4

R334 33_4R334 33_4

PCLK_ICH

R346 33_4R346 33_4

CG_XIN
CG_XOUT

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

C549

C549
33p/50V_4

33p/50V_4

CL=20p

C548

C548
33p/50V_4

33p/50V_4

ICS9LRS3165BKLFT
(ALPRS365000)

PCI2/TME

PCI-3

PCI-4/27M_SEL

PCIF-5/ITP_EN

5

VDD_CK_VDD_REF

+1.05V_VDD

T95T95

R345 22_4R345 22_4
R337 22_4R337 22_4
R338 2.2K_4R338 2.2K_4

R314 10K_4R314 10K_4
R318 33_4R318 33_4

CG_XIN

21

Y2

Y2

14.318MHZ

14.318MHZ

CG_XOUT

RTM875T-606
(AL000875000)

PCI2/TME
internal PD

PCI-3/SRC5_EN
internal PD

PCI-4/27M_SEL
internal PD

PCIF-5/ITP_EN
internal PD

2

Q13

Q13

3 1

2N7002E

2N7002E

C573

C573
*10u/10V_8

*10u/10V_8

SATA_CLKREQ#_RSATA_CLKREQ#_R
LAN_CLKREQ#_R
PCLK_DEBUG_R
PCI_CLK_SIO
PCLK_591_R
PCLK_ICH_R

FSA

FSC

C574

C574
10u/10V_8

10u/10V_8

U15

U15

9

VDD_PCI

16

VDD_48

23

VDD_PLL3

4

VDD_REF

46

VDD_SRC

62

VDD_CPU

19

VDD_96_IO

27

VDD_PLL3_IO

33

VDD_SRC_IO_1

52

VDD_SRC_IO_3

43

VDD_SRC_IO_2

56

VDD_CPU_IO

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/SRC5_EN

14

PCIF5/ITP_EN

3

XTAL_IN

2

XTAL_OUT

17

USB_48/FSA

64

FSB/TEST/MODE

5

REF0/FSC/TESTSEL

65

VSS_BODY

15

VSS_PCI

18

VSS_48

22

VSS_IO

26

VSS_PLL3

59

VSS_CPU

30

VSS_SRC1

36

VSS_SRC2

49

VSS_SRC3

1

VSS_REF

SLG8SP513VTR ,ICS9LPRS365BKLFT

PULL HIGH PULL DOWN

NO OVERCLOCKING NORMAL RUN

PIN37/38 IS SRC5

PIN 17/18 IS 27MHz

PIN 46/47 IS CPUITP PIN 46/47 IS SRC8

+3V +3V

R258

R258

4.7K_4

4.7K_4

SMBDT1 SMBCK1

(default)

<MAIN>:ICS9LRS3165BKLFT QCI:ALPRS365000
<SECOND>:SLG8SP513VTR QCI:AL8SP513000
<SECOND>:RTM875N-606-VD-GRT QCI:AL000875000

4

Modfiy it 5/4

C568

C545

C545

0.1u/10V_4

0.1u/10V_4

CK505

CK505

PIN37/38 IS
PCI_STOP/CPU_STOP

PIN 17/18
IS SRC/DOT

C568

0.1u/10V_4

0.1u/10V_4

SRC5/PCI_STOP#

SRC5#/CPU_STOP#

SRC8#/ITP#

SRC11/CR#_H

SRC11#/CR#_G

SRC7/CR#_F

SRC7#/CR#_E

SRC3/CR#_C

SRC3#/CR#_D

SRC2/SATA

SRC2#/SATA#

SRC1#/SE2

SRC0/DOT96

SRC0#/DOT96#

CKPWRGD/PWRDWN#

SLG8SP513

SLG8SP513

4

IO_VOUT

SCLK

SDA

CPU0

CPU0#

CPU1

CPU1#

SRC8/ITP

SRC10#

SRC10

SRC9

SRC9#

SRC6

SRC6#

SRC4

SRC4#

SRC1/SE1

(default)

(default)

(default)

3

+1.05V_VDD

L43

L43

PBY160808T-301Y-N/2A/300ohm_6

C551

C551

0.1u/10V_4

0.1u/10V_4

55
7

SMBCK1

6

SMBDT1

45

PM_STPPCI#

44

PM_STPCPU#

61
60

58
57

54
53

42
41

40

CLK_MCH_OE#_C

39

CLK_PCIE_SRC11#

37
38

51

CLK_PCIE_SRC7

50

CLK_PCIE_SRC7#

48
47

34
35

31

CLK_PCIE_SRC3

32

CLK_PCIE_SRC3#

28
29

24

CLK_DREFSSCLK_R

25

CLK_DREFSSCLK#_R

20

CLK_DREFCLK_R

21

CLK_DREFCLK#_R

63

C546

C546

0.1u/10V_4

0.1u/10V_4

R319 475/F_4R319 475/F_4
R323 475/F_4R323 475/F_4

R348 *EV@475/F_4R348 *EV@475/F_4

+3V

+3V

+3V

C435

C435

0.1u/10V_4

0.1u/10V_4

T91T91
T92T92

T94T94
T93T93

T97T97

R329 10K_4R329 10K_4
R331 *10K_4R331 *10K_4
R336 EV@10K_4R336 EV@10K_4
R332 IV@10K_4R332 IV@10K_4
R342 *10K_4R342 *10K_4
R343 10K_4R343 10K_4

PBY160808T-301Y-N/2A/300ohm_6

C437

C437
*0.1u/10V_4

*0.1u/10V_4

PM_STPPCI# 14
PM_STPCPU# 14

CLK_CPU_BCLK 3
CLK_CPU_BCLK# 3

CLK_MCH_BCLK 5
CLK_MCH_BCLK# 5

CLK_PCIE_3GPLL# 6
CLK_PCIE_3GPLL 6

CLK_MCH_OE# 6
MINI_CLKREQ# 28

CLK_PCIE_MINI1 28
CLK_PCIE_MINI1# 28

CLK_PCIE_ICH 13
CLK_PCIE_ICH# 13

CLK_PCIE_LAN 31
CLK_PCIE_LAN# 31

PEG_CLKREQ# 19

CLK_PCIE_SATA 12
CLK_PCIE_SATA# 12

CK_PWRGD 14

To NB

R259

R259

4.7K_4

4.7K_4

3

R347 0_4R347 0_4
R267 0_4R267 0_4
R315 0_4R315 0_4

5/18 Modify

CPU_BSEL03
CPU_BSEL13
CPU_BSEL23 MCH_BSEL2 6

2

Q12

Q12

3 1

2N7002E

2N7002E

REV:B 6/11REV:B 6/12

PCLK_DEBUG_R

PCLK_591_R

HIGH 27MHz
LOW SRC

PCLK_ICH_R

MCH_BSEL0 6
MCH_BSEL1 6

+1.05V

5/7 Modfiy

To SB

To CPU

To NB

To NB

To Mini Card 1 (WLAN)

To ICH

To LAN

Modfiy it 5/4

To ICH

To NB or VGA

To NB or VGA

From GMCH

From Deisceret

2

2

PM_STPPCI#

PM_STPCPU#

CLK_PCIE_SRC11#

SATA_CLKREQ#_R

LAN_CLKREQ#_R

CLK_PCIE_SRC3

CLK_MCH_OE#_C

For EMI

PCLK_591_R

CLKUSB_48

14M_ICH

PCLK_ICH_R

FSC FSB FSA CPU SRC PCI

RN15

CLK_DREFCLK_R
CLK_DREFCLK#_R

CLK_DREFSSCLK_R
CLK_DREFSSCLK#_R

CLK_DREFCLK_R
CLK_DREFCLK#_R

CLK_DREFSSCLK_R
CLK_DREFSSCLK#_R

RN15

RN14

RN14

RN10

RN10

1

+3V

R313 *2.2K_4R313 *2.2K_4

R316 *2.2K_4R316 *2.2K_4

R322 10K_4R322 10K_4

R324 10K_4R324 10K_4

R320 10K_4R320 10K_4

R349 10K_4R349 10K_4

R317 10K_4R317 10K_4

C571 *33p/50V_4C571 *33p/50V_4

C581 *15p/50V_4C581 *15p/50V_4

C554 *33p/50V_4C554 *33p/50V_4

C578 *33p/50V_4C578 *33p/50V_4

SEL0SEL1SEL2

Frequence select

02

5/5 Add

1 0 1 100 100 33
0 0 1 133 100 33

Default

0 1 1 166 100 33
0 1 0 200 100 33
0 0 0 266 100 33
1 0 0 333 100 33
1 1 0 400 100 33
1 1 1 Reserved

1 2

1 2

1 2

RN9

RN9

1
3

43

43

43

IV@0_4P2R

IV@0_4P2R

IV@0_4P2R

IV@0_4P2R

EV@0_4P2R

EV@0_4P2R

2
4

*EV@33_4P2R

*EV@33_4P2R

CLK_DREFCLK 6
CLK_DREFCLK# 6

CLK_DREFSSCLK 6
CLK_DREFSSCLK# 6

CLK_PCIE_VGA 18
CLK_PCIE_VGA# 18

27M_NONSS 19

5/22 modify

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CLOCK GENERATOR

CLOCK GENERATOR

CLOCK GENERATOR

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

2Monday, July 12, 2010

2Monday, July 12, 2010

2Monday, July 12, 2010

1A

1A

1A

43

43

43

5

4

3

2

1

H_A#[3..16]5

D D

H_ADSTB#05

H_REQ#[0..4]5

H_A#[17..35]5

C C

H_ADSTB#15
H_A20M#12

H_FERR#12
H_IGNNE#12

H_STPCLK#12
H_INTR12
H_NMI12
H_SMI#12

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

U17A

U17A

J4

ADDR GROUP_0

ADDR GROUP_0

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

ADDR GROUP_1

ADDR GROUP_1

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4
AB2
AA3

V1
A6

A5
C4

D5
C6
B4
A3

M4
N5

T2
V3
B2
D2

D22

D3

F6

A[33]#
A[34]#
A[35]#
ADSTB[1]#

A20M#
FERR#
IGNNE#

STPCLK#
LINT0
LINT1
SMI#

RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]

THERMAL

THERMAL

ICH

ICH

THERMTRIP#

RESERVED

RESERVED

ADS#
BNR#

BPRI#

DEFER#

DRDY#

DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#

PREQ#

TCK
TDO

TMS

TRST#

DBR#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

PROCHOT#

THERMDA
THERMDC

H CLK

H CLK

BCLK[0]
BCLK[1]

H1
E2
G5

H5
F21
E1

F1
D20

H_IERR#

B3
H4
C1

F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

R245 56_4R245 56_4

XDP_BPM#0
XDP_BPM#1
XDP_BPM#2
XDP_BPM#3
XDP_BPM#4
XDP_BPM#5
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
SYS_RST#

H_PROCHOT#_D
H_THERMDA
H_THERMDC

PM_THRMTRIP#

T56T56
T86T86
T88T88
T55T55
T89T89

H_ADS# 5
H_BNR# 5
H_BPRI# 5

H_DEFER# 5
H_DRDY# 5
H_DBSY# 5

H_BREQ# 5

+1.05V

H_INIT# 12
H_LOCK# 5
H_CPURST# 5

H_RS#0 5
H_RS#1 5
H_RS#2 5
H_TRDY# 5

H_HIT# 5
H_HITM# 5

Connect it to CPU DBR# is for ITP debug port
or CPU interposer (like ICE) to reset the system

SYS_RST# 14

CLK_CPU_BCLK 2
CLK_CPU_BCLK# 2

+1.05V

R311

R311
1K/F_4

1K/F_4

R312

R312
2K/F_4

2K/F_4

Layout note:
H_GTLREF: Zo=55 ohm
L<0.5", 2/3*VCCP+-2%

H_D#[0..15]5

H_DSTBN#05
H_DSTBP#05
H_DINV#05

H_D#[16..31]5

H_DSTBN#15
H_DSTBP#15
H_DINV#15

CPU_BSEL02
CPU_BSEL12
CPU_BSEL22

H_D#[0..15]

H_D#[16..31]

T108T108
T112T112
T125T125
T90T90
T87T87
T126T126
T127T127

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

H_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
CPU_TEST7

E22
F24
E26
G22
F23
G25
E25
E23
K24
G24

H22
F26
K22
H23

H26
H25

N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24

AD26

C23
D25
C24

AF26

AF1
A26

B22
B23
C21

J24
J23

J26

C3

U17B

U17B

D[0]#
D[1]#
D[2]#
D[3]#
D[4]#
D[5]#
D[6]#
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
BSEL[0]
BSEL[1]
BSEL[2]

Penryn

Penryn

DATA GRP 0

DATA GRP 0

MISC

MISC

DATA GRP 1

DATA GRP 1

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#
COMP[0]

COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_D#[32..47]

H_D#[48..63]

R344 27.4/F_6R344 27.4/F_6
R328 54.9/F_4R328 54.9/F_4
R257 27.4/F_6R257 27.4/F_6
R254 54.9/F_4R254 54.9/F_4

H_D#[32..47] 5

H_DSTBN#2 5
H_DSTBP#2 5
H_DINV#2 5

H_D#[48..63] 5

Layout note:
comp0,2: Zo=27.4ohm, L< 0. 5"
comp1,3: Zo=55ohm, L<0. 5"

Layout note:
DPRSTP# , Daisy Chain
(SB>Power>NB>CPU)

H_DSTBN#3 5
H_DSTBP#3 5
H_DINV#3 5

ICH_DPRSTP# 6,12,39
H_DPSLP# 12
H_DPWR# 5
H_PWRGD 12
H_CPUSLP# 5
PSI# 39

03

Penryn

Penryn

B B

Thermal Trip

DELAY_VR_PWRGOOD6,14,39

PM_THRMTRIP#

Processor hot

A A

H_PROCHOT#_D

+1.05V

R273

R273
56_4

56_4

R274 *0_4R274 *0_4

&38

5

+1.05V

3

2

Q18

Q18
DMN601K-7

+1.05V

R398

R398
56_4

56_4

No use Thermal trip CPU side still PU 56ohm.
Use Thermal trip can share PU at SB side

No use PROCHOT CPU side still PU 56ohm.
Use PROCHOT to optional receiver CPU side PU
68ohm and through isolat 2.2K ohm to receiver
side

1

2

1 3

DMN601K-7

Q17

Q17
MMBT3904

MMBT3904

SYS_SHDN# 37,44PM_THRMTRIP#6,12

H_PROCHOT# 39

4

CPU Thermal monitor

2ND_MBCLK35
2ND_MBDATA35

THERM_ALERT#14

THER_OVERT#27

+3V

+3V

R401 *10K_4R401 *10K_4

R395 *0_4R395 *0_4

R394 10K_4R394 10K_4

4/20 Modify

3

+3V

R400

R400
200_6

200_6

U21

U21

8

SCLK

7

SDA

6

ALERT#

4

OVERT#

G780P81U(MSOP-8)

G780P81U(MSOP-8)

$''5(66+

VCC
DXP
DXN
GND

VCC_TH

1
2
3
5

C624

C624

0.1U/10V_4

0.1U/10V_4

H_THERMDA

C621

C621
2200p_4

2200p_4

H_THERMDC

GMT AL000780000 Use 2200p

WINDBOND AL83L771K01

2

Use 2200pAL095245000NS

Use 2200p

XDP PU/PD

+3V

SYS_RST#

ZR6 hang up issue

XDP_TDO
XDP_TDI
XDP_TMS
XDP_BPM#5
XDP_TCK
XDP_TRST#

XDP_DBRESET# and X DP_TDO
reserve for XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

R391 *1K_4R391 *1K_4

R261 *54.9/F_4R261 *54.9/F_4
R260 54.9/F_4R260 54.9/F_4
R264 54.9/F_4R264 54.9/F_4
R310 54.9/F_4R310 54.9/F_4
R265 54.9/F_4R265 54.9/F_4
R266 54.9/F_4R266 54.9/F_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

CPU Host Bus

CPU Host Bus

CPU Host Bus

1

3Monday, July 12, 2010

3Monday, July 12, 2010

3Monday, July 12, 2010

+1.05V

1A

1A

1A

of

43

43

43

5

4

3

2

1

U17D

U17D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

D D

C C

B B

A A

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn

Penryn

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

C470

C470
*10U/6.3V_8

*10U/6.3V_8

C562

C562
10U/6.3V_8

10U/6.3V_8

C445

C445
10U/6.3V_8

10U/6.3V_8

C590

C590
*10U/6.3V_8

*10U/6.3V_8

C447

C447
10U/6.3V_8

10U/6.3V_8

C589

C589
10U/6.3V_8

10U/6.3V_8

C442

C442
*10U/6.3V_8

*10U/6.3V_8

Layout Note:
Place these parts
reference to Intel demo
board.

C425

C425
*10U/6.3V_8

*10U/6.3V_8

C565

C565
10U/6.3V_8

10U/6.3V_8

C564

C444

C444
*10U/6.3V_8

*10U/6.3V_8

C588

C588
*10U/6.3V_8

*10U/6.3V_8

C421

C421
*10U/6.3V_8

*10U/6.3V_8

C591

C591
10U/6.3V_8

10U/6.3V_8

C491

C491

+

+

*330U/2V_7343

*330U/2V_7343

C471

C471
10U/6.3V_8

10U/6.3V_8

C468

C468
*10U/6.3V_8

*10U/6.3V_8

C441

C441
*10U/6.3V_8

*10U/6.3V_8

C422

C422
10U/6.3V_8

10U/6.3V_8

C587

C587
10U/6.3V_8

10U/6.3V_8

C564
*10U/6.3V_8

*10U/6.3V_8

C466

C466
10U/6.3V_8

10U/6.3V_8

C472

C472
*10U/6.3V_8

*10U/6.3V_8

C446

C446
*10U/6.3V_8

*10U/6.3V_8

C423

C423
*10U/6.3V_8

*10U/6.3V_8

C586

C586
*10U/6.3V_8

*10U/6.3V_8

C580

C580

+

+

330U/2V_7343

330U/2V_7343

C563

C563
*10U/6.3V_8

*10U/6.3V_8

C429

C429
*10U/6.3V_8

*10U/6.3V_8

C433

C433
10U/6.3V_8

10U/6.3V_8

C443

C443
*10U/6.3V_8

*10U/6.3V_8

C567

C567
10U/6.3V_8

10U/6.3V_8

C469

C469
10U/6.3V_8

10U/6.3V_8

C430

C430

+

+

330U/2V_7343

330U/2V_7343

+

+

Montevina platform : Early Reference Board Schematics Feb 2007. Rev 1.0
stuff 22U*34, NC 22U*2
stuff 330U*2, NC330U*2

&38

5

4

3

VCC_CORE VCC_CORE

U17C

U17C

A7

C424

C424
*10U/6.3V_8

*10U/6.3V_8

C465

C465
*10U/6.3V_8

*10U/6.3V_8

C419

C419
10U/6.3V_8

10U/6.3V_8

C420

C420
10U/6.3V_8

10U/6.3V_8

C566

C566
*10U/6.3V_8

*10U/6.3V_8

C467

C467
*10U/6.3V_8

*10U/6.3V_8

C623

C623

*330U/2V_7343

*330U/2V_7343

A10
A12
A13
A15
A17
A18
A20

B10
B12
B14
B15
B17
B18
B20

C10
C12
C13
C15
C17
C18

D10
D12
D14
D15
D17
D18

E10
E12
E13
E15
E17
E18
E20

F10
F12
F14
F15
F17
F18
F20
AA7

AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20

AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

A9

B7
B9

C9

D9

E7
E9

F7
F9

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

Penryn

Penryn

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

2

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

VCC:38A (Low power type)
VCC:47A (Standard type)

04

Layout Note:
Inside CPU center cavity in 2 rows

VCCP : 2.5A(Supply after VCC Stable)

4.5A(Supply before VCC Stable)

+1.05V

C431

C428

C428

0.1U/10V_4

0.1U/10V_4

C426

C426
*0.1U/10V_4

*0.1U/10V_4

H_VID0 39
H_VID1 39
H_VID2 39
H_VID3 39
H_VID4 39
H_VID5 39
H_VID6 39

C431

0.1U/10V_4

0.1U/10V_4

R308 100/F_6R308 100/F_6

R309

R309
100/F_6

100/F_6

C432

C432

0.1U/10V_4

0.1U/10V_4

C599

C599

0.01U/25V_4

0.01U/25V_4

C438

C438

0.1U/10V_4

0.1U/10V_4

C440

C440

0.1U/10V_4

0.1U/10V_4

+

+

VCCA:130mA

C598

C598
10U/6.3V_8

10U/6.3V_8

VCC_CORE

VCCSENSE 39

VSSSENSE 39

C622

C622
330U/2V_7343

330U/2V_7343

+1.5V

Layout Note:
Z0=27.4,PU/PD L<1"

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

CPU Power

CPU Power

CPU Power

Date: Sheet

Date: Sheet of

Date: Sheet of

1

1A

1A

1A

of

4Monday, July 12, 2010

4Monday, July 12, 2010

4Monday, July 12, 2010

43

43

43

5

4

3

2

1

*0&+&$17,*$

QCI P/N

D D

Intel Cantiga (G)M

Intel Cantiga (P)M

Intel Cantiga (G)L A1

C C

+1.05V

0.3125*VCCP

R411

R411
221/F_4

221/F_4

R410

R410
100/F_4

100/F_4

B B

R407

R407

24.9/F_4

24.9/F_4

A A

WIDE(10):SPACING(20) ,
L<0.5"

H_SWING

H_RCOMP

5

AJSLB940T04

AJSLB970T06

AJSLGGM0T04

C642

C642

0.1U/10V_4

0.1U/10V_4

Layout Note:
WIDE(10):SPACING(20) ,
L<0.5"

2/3*VCCP
WIDE(10):SPACING(20),
L<0.5"

H_D#[0..63]3

+1.05V

R414

R414
1K/F_4

1K/F_4

R415

R415
2K/F_4

2K/F_4

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

H_CPURST#3

H_AVREF

C649

C649
*0.1U/10V_4

*0.1U/10V_4

4

M11

N12

P13

N10

AD14

Y10
Y12
Y14

W2

AA8

AA13

AA9
AA11
AD11
AD10
AD13
AE12

AE9

AA2

AD8

AA3

AD3

AD7
AE14

AF3

AC1

AE3

AC3
AE11

AE8

AG2

AD6

C12

E11

A11

B11

F2

G8

F8
E6
G2
H6
H2

F6
D4
H3
M9

J1

J2

J6
P2

L2
R2
N9

L6
M5

J3
N2
R1
N5
N6

N8

L7
M3

Y3
Y6

Y7

Y9

C5
E3

U20A

U20A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA_PM

CANTIGA_PM

3

H_ADSTB#_0
H_ADSTB#_1

HOST

HOST

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

H_A#[3..35] 3

H_ADS# 3

H_ADSTB#0 3

H_ADSTB#1 3
H_BNR# 3
H_BPRI# 3
H_BREQ# 3
H_DEFER# 3
H_DBSY# 3
CLK_MCH_BCLK 2
CLK_MCH_BCLK# 2
H_DPWR# 3
H_DRDY# 3
H_HIT# 3
H_HITM# 3
H_LOCK# 3
H_TRDY# 3

H_DINV#[3..0] 3

H_DSTBN#[3..0] 3

H_DSTBP#[3..0] 3

H_REQ#[0..4] 3

H_RS#[0..2] 3H_CPUSLP#3

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH HOST

GMCH HOST

GMCH HOST

Date: Sheet

Date: Sheet

Date: Sheet

1

05

5Monday, July 12, 2010

5Monday, July 12, 2010

5Monday, July 12, 2010

of

of

of

1A

1A

1A

43

43

43

5

4

3

2

1

IV@

EV@

+3V_S5

06

DDR3

U20B

Strap table

Pin Name Strap description

CFG[2:0]

D D

CFG[4:3]

CFG5

CFG6

CFG7

CFG8

CFG9

CFG10

FSB Frequency Select

Reserved

DMI X2 Select

iTPM Host Interface

ME TLS Confidentiality

Reserved

PCIE Graphics Lane Reversal

PCIE Loopback enable

ReservedCFG11

CFG12

CFG13

CFG[15:14]

C C

CFG16

CFG[18:17]

CFG19

CFG20

ALLZ

XOR

Reserved

FSB Dynamic ODT

Reserved

DMI Lane Reversal

Digital Display Port
(SDVO/DP/iHDMI)
Concurrent with PCIE

SDVO_CTRLDATA SDVO Present

DDPC_CTRLDATA Digital Display Present

Strap pin

+3V

R203 *4.02K/F_4R203 *4.02K/F_4

B B

A A

R207 *4.02K/F_4R207 *4.02K/F_4

R417 *2.21K/F_4R417 *2.21K/F_4
R214 *2.21K/F_4R214 *2.21K/F_4
R197 *2.21K/F_4R197 *2.21K/F_4

R183 *2.21K/F_4R183 *2.21K/F_4
R416 *2.21K/F_4R416 *2.21K/F_4

R208 *2.21K/F_4R208 *2.21K/F_4
R213 *2.21K/F_4R213 *2.21K/F_4
R196 *2.21K/F_4R196 *2.21K/F_4

5/4 modify it for park reversal PCIE x16

+3V

R185 IV@2.21K/F_4R185 IV@2.21K/F_4
R192 IV@2.21K/F_4R192 IV@2.21K/F_4
R205 *2.21K/F_4R205 *2.21K/F_4
R206 *2.21K/F_4R206 *2.21K/F_4
R198 10K_4R198 10K_4
R204 10K_4R204 10K_4
R200 10K_4R200 10K_4

Configuration

000= FSB 1066MHz
010 = FSB 800MHz
011 = FSB 667MHz

0 = DMI X2
1 = DMI X4(Default)

0 = iTPM Host Interface is enabled
1 = iTPM Host Interface is disabled(Default)

0 = AMT Firmware will use TLS cipher suite
with no confidentiality
1 = AMT Firmware will use TLS cipher suite
with confidentiality(Default)

0 = Reverse Lanes
1 = Normal operation(Default)

0 = Enabled
1 = Disabled (Default)

0 = ALLZ mode enable
1 = disable(Default)

0 = XOR mode enable
1 = disable(Default)

0 = Dynamic ODT disable
1 = Dynamic ODT Enable(Default)

0 = Normal (Default)
1 = Lanes Reversed

0 = Only Digital Display port (SDVO/DP/iHDMI)
or PCIE is operational (Default)
1 = Digital Display port (SDVO/DP/iHDMI) and
PCIE are operating simultaneously via PEG
port

0 = No SDVO/HDMI Device Present(Default)
1 = SDVO/HDMI Device present

0 = Digital display(HDMI/DP) device
absent(Default)
1 = Digital display(HDMI/DP) device present

MCH_CFG_19
MCH_CFG_20

MCH_CFG_5
MCH_CFG_6

TPM Disable

MCH_CFG_7
MCH_CFG_9
MCH_CFG_10

MCH_CFG_12
MCH_CFG_13
MCH_CFG_16

SDVO_CTRLDATA
SDVO_CTRLCLK
DDPC_DDCDATA
DDPC_CTRLCLK
CLK_MCH_OE#
PM_EXTTS#0
PM_EXTTS#1

PM_SYNC#14

ICH_DPRSTP#3,12,39
PM_EXTTS#016

PM_EXTTS#117

DELAY_VR_PWRGOOD3,14,39

PLT_RST#13

PM_THRMTRIP#3,12

PM_DPRSLPVR14,39

NB Thermal trip pin
No use Thermal trip NB side can
NC.(NB has ODT)

PM_DPRSTP#
The Daisy chain topology should
be routed from ICH9M to IMVP ,
then to (G)MCH and CPU, in that
order.

R239 100/F_4R239 100/F_4
R210 *0_4R210 *0_4

T43T43
T39T39
T47T47
T44T44

MCH_BSEL02
MCH_BSEL12
MCH_BSEL22

MCH_CFG_3

T31T31

MCH_CFG_4

T35T35

MCH_CFG_5
MCH_CFG_6
MCH_CFG_7
MCH_CFG_8

T28T28

MCH_CFG_9
MCH_CFG_10
MCH_CFG_11

T29T29

MCH_CFG_12
MCH_CFG_13
MCH_CFG_14

T32T32

MCH_CFG_15

T30T30

MCH_CFG_16
MCH_CFG_17

T27T27

MCH_CFG_18

T33T33

MCH_CFG_19
MCH_CFG_20

RST_IN#_MCH
THRMTRIP#_R

*0&+&$17,*$

5

4

M36

AH10
AH12
AH13

AY21

BG23
BF23
BH18
BF18

AL34
AK34
AN35
AM35

M24

M20

AT40
AT11

BG48
BF48
BD48
BC48
BH47
BG47
BE47
BH46
BF46
BG45
BH44
BH43

BH6
BH5
BG4
BH3

BH2
BG2

BG1
BD1

BC1

N36
R33
T33
AH9

K12

T24
B31

M1

B2

T25
R25
P25
P20
P24
C25
N24

E21
C23
C24
N21
P21
T21
R20

L21
H21
P29
R28
T28

R29

B7
N33
P32

T20
R32

BF3

BE2
BF1

F1

U20B

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9

RSVD14
RSVD15
RSVD17

RSVD20

RSVD21
RSVD22
RSVD23
RSVD24
RSVD25

ME_JTAG_TCK
ME_JTAG_TDI
ME_JTAG_TDO
ME_JTAG_TMS

CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20

PM_SYNC#
PM_DPRSTP#
PM_EXT_TS#_0
PM_EXT_TS#_1
PWROK
RSTIN#
THERMTRIP#
DPRSLPVR

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
NC_9
NC_10
NC_11
NC_12
NC_13
NC_14
NC_15
NC_16
NC_17
NC_18
NC_19
NC_20
NC_21
NC_22
NC_23
NC_24
NC_25

CANTIGA_PM

CANTIGA_PM

3

CFG

CFG

PM

PM

NC

NC

AP24

SA_CK_0

AT21

SA_CK_1

AV24

SB_CK_0

AU20

SB_CK_1

AR24

SA_CK#_0

AR21

SA_CK#_1

AU24

SB_CK#_0

AV20

SB_CK#_1

BC28

SA_CKE_0

AY28

SA_CKE_1

AY36

SB_CKE_0

RSVD

RSVD

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_DRAMRST#
DPLL_REF_CLK

DDR CLK/ CONTROL/COMPENSATION

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

ME JTAG

ME JTAG

CLK

CLK

DMI

DMI

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

MISC

MISC

SB_CKE_1
SA_CS#_0

SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0

SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_VREF

SM_PWROK

SM_REXT

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_E N

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

BB36
BA17

AY16
AV16
AR13

BD17
AY17
BF15
AY13

BG22
BH21

BF28
BH28

AV42
AR36
BF17
BC36

B38
A38
E41
F41

F43
E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36
H36

B12

B28
B30
B29
C29
A28

M_RCOMP
M_RCOMP#

SM_RCOMP_VOH
SM_RCOMP_VOL

SM_VREF
SM_PWROK
SM_REXT

R247 499/F_4R247 499/F_4

CLK_DREFCLK
CLK_DREFCLK#
CLK_DREFSSCLK
CLK_DREFSSCLK#

CLK_PCIE_3GPLL
CLK_PCIE_3GPLL#

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

MCH_CLVREF_R

DDPC_CTRLCLK
DDPC_DDCDATA

CLK_MCH_OE#

TSATN#

R169 56_4R169 56_4

HDA_BIT_CLK_HDMI
HDA_RST#_HDMI
HDA_SDIN_HDMI
HDA_SDOUT_HDMI
HDA_SYNC_HDMI

Modify 4/19

Impact ICH9M VCCHDA and VCCSUSHDA supply 1.5V/3.3V

NOTE:
If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can
be used on the platform.

M_CLK0 16
M_CLK1 16
M_CLK2 17
M_CLK3 17

M_CLK#0 16
M_CLK#1 16
M_CLK#2 17
M_CLK#3 17

M_CKE0 16
M_CKE1 16
M_CKE2 17
M_CKE3 17

M_CS#0 16
M_CS#1 16
M_CS#2 17
M_CS#3 17

M_ODT0 16
M_ODT1 16
M_ODT2 17
M_ODT3 17

CLK_DREFCLK 2
CLK_DREFCLK# 2
CLK_DREFSSCLK 2
CLK_DREFSSCLK# 2

CLK_PCIE_3GPLL 2
CLK_PCIE_3GPLL# 2

DMI_TXN[3:0] 13

DMI_TXP[3:0] 13

DMI_RXN[3:0] 13

DMI_RXP[3:0] 13

CL_CLK0 14

CL_DATA0 14
MPWROK 14,35
CL_RST#0 14

SDVO_CTRLCLK 26

SDVO_CTRLDATA 26
CLK_MCH_OE# 2
MCH_ICH_SYNC# 14

+1.05V

HDA_BIT_CLK_HDMI 12
HDA_RST#_HDMI 12
HDA_SDIN_HDMI 12
HDA_SDOUT_HDMI 12
HDA_SYNC_HDMI 12

2

SM_VREF=0.5*VCC_SM
SM_PWROK only for

DDR3.(DDR2 PD only)
SM_DRAMRST# only
for DDR3.(DDR2:NC)

DDR3_DRAMRST# 16,17

+1.05V

R227

R227
1K/F_4

1K/F_4

R228

R228

C394

C394

511/F_4

511/F_4

0.1U/10V_4

0.1U/10V_4

If HDMI not support
HDA --> NC
VCC_HDA-->GND
Differential signal-->NC

R250

R250

12.1K_4

12.1K_4

SM_PWROK

R251

R251

10K_4

10K_4

M_RCOMP
M_RCOMP#

SM_VREF

SM_VREF.Default use voltage divider for
poor layout cause +SMDDR_VREF not
meet spec.And Intel circuit PU/PD is
1K,But Check list PU/PD is 10K.

INTEL FAE Suggest PD for Ext graphics

CLK_DREFCLK#
CLK_DREFCLK
CLK_DREFSSCLK#
CLK_DREFSSCLK

NB Thermaltrip

Check list note : CL_VREF=0.35V

DDPC_CTRL for HDMI port C
SDVO_CTRL for HDMI port B

<Checklist ver0.8>
If TSATN# is not used, then it must be terminated
with a 56-ȍ pull-up resistor to VCCP.

<Pin out check issue>
Cantiga EDS 0.7 change Ball B12 to TSATN# from TSATN

REV:B

R571

R571

Add 6/11

*0_4

*0_4

TC7SH08FU

TC7SH08FU

53

1

U10

U10

4

2

R253 *short0402R253 *short0402
R252 *0_4R252 *0_4

R340 80.6/F_4R340 80.6/F_4
R339 80.6/F_4R339 80.6/F_4

SM_RCOMP_VOH

C560

C560

2.2U/6.3V_6

2.2U/6.3V_6

SM_RCOMP_VOL

C559

C559

2.2U/6.3V_6

2.2U/6.3V_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

+1.5V_SUS

R241 10K/F_4R241 10K/F_4
R242 10K/F_4R242 10K/F_4

+1.5V_SUS

R184 EV@0_4R184 EV@0_4
R182 EV@0_4R182 EV@0_4
R190 EV@0_4R190 EV@0_4
R187 EV@0_4R187 EV@0_4

C577

C577

R335

R335

0.01U/25V_4

0.01U/25V_4

3.01K/F_4

3.01K/F_4

R326

R326

C576

C576

1K/F_4

1K/F_4

0.01U/25V_4

0.01U/25V_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

GMCH DMI

GMCH DMI

GMCH DMI

1

HWPG_1.5V 35,40
SUSC# 14,35
SUSB# 14,35

+1.5V_SUS

R3271K/F_4 R3271K/F_4

6Monday, July 12, 2010

6Monday, July 12, 2010

6Monday, July 12, 2010

1A

1A

1A

of

43

of

43

of

43

5

4

3

2

1

IV@

U20C

EV@

SP@

D D

07

C C

,9(9'LV(QDEOHVHWWLQJ

If LVDS no use,all signal can NC

L_BKLT_CTRL25

INT_LVDS_BLON25

+3V

INT_LVDS_EDIDCLK25
INT_LVDS_EDIDDATA25

INT_LVDS_DIGON25

INT_TXLCLKOUT-25

INT_TXLCLKOUT+25

INT_TXLOUT0-25

INT_TXLOUT1-25

INT_TXLOUT2-25

INT_TXLOUT0+25

INT_TXLOUT1+25

INT_TXLOUT2+25

R201 IV@10K_4R201 IV@10K_4
R199 IV@10K_4R199 IV@10K_4

L_CTRL_CLK
L_CTRL_DATA

R188 IV@2.37K/F_4R188 IV@2.37K/F_4

INT_TXLCLKOUT­INT_TXLCLKOUT+

INT_TXLOUT0­INT_TXLOUT1­INT_TXLOUT2-

INT_TXLOUT0+
INT_TXLOUT1+
INT_TXLOUT2+

TV_A/B/C

SP@

B B

6/14 Modify
REV:B

INT_CRT_DDCCLK25
INT_CRT_DDCDAT25

INT_HSYNC25
INT_VSYNC25

For IV: 75ohm
For EV:0ohm

R189 SP@75_4R189 SP@75_4
R195 SP@75_4R195 SP@75_4
R194 SP@75_4R194 SP@75_4

INT_CRT_BLU25
INT_CRT_GRN25
INT_CRT_RED25

R425 IV@24.9_4R425 IV@24.9_4

INT_TV_COMP
INT_TV_Y/G
INT_TV_C/R

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

HSYNC_G
CRTIREF
VSYNC_G

HSYNC/VSYNC serial R place close to NB

Discrete STUFFED.

A A

HSYNC_G
VSYNC_G

CRTIREF pull down
for IV cantiga 1k ohm/F

U20C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA_PM

CANTIGA_PM

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6

LVDS

LVDS

TV

TV

VGA

VGA

PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

L<0.5" , If PCIE not support
still connect to +VCC_PEG

T37

EXP_A_COMPX

T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8

PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15

PEG_RXP0

PEG_RXP1

PEG_RXP2

PEG_RXP3

PEG_RXP4

PEG_RXP5

PEG_RXP6

PEG_RXP7

PEG_RXP8

PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15

C_PEG_TXN0

C_PEG_TXN1

C_PEG_TXN2

C_PEG_TXN3

C_PEG_TXN4

C_PEG_TXN5

C_PEG_TXN6

C_PEG_TXN7

C_PEG_TXN8

C_PEG_TXN9

C_PEG_TXN10

C_PEG_TXN11

C_PEG_TXN12

C_PEG_TXN13

C_PEG_TXN14

C_PEG_TXN15

C_PEG_TXP0

C_PEG_TXP1

C_PEG_TXP2

C_PEG_TXP3

C_PEG_TXP4

C_PEG_TXP5

C_PEG_TXP6

C_PEG_TXP7

C_PEG_TXP8

C_PEG_TXP9

C_PEG_TXP10

C_PEG_TXP11

C_PEG_TXP12

C_PEG_TXP13

C_PEG_TXP14

C_PEG_TXP15

R209 49.9/F_4R209 49.9/F_4

Can support reversal routing.If CFG9=1, PCI Express
is normal operation. If CFG9=0, then PEG_TXP0
becomes PEG_TXP15, PEG_TXP1 becomes
PEG_TXP14, PEG_TXP2 becomes PEG_TXP13, etc.
similarly for PEG_RXP[15:0] and PEG_RXN[15:0]

C309 0.1U/10V_4C309 0.1U/10V_4
C323 0.1U/10V_4C323 0.1U/10V_4
C629 0.1U/10V_4C629 0.1U/10V_4
C332 0.1U/10V_4C332 0.1U/10V_4
C330 EV@.1U/10V_4C330 EV@.1U/10V_4
C626 EV@.1U/10V_4C626 EV@.1U/10V_4
C336 EV@.1U/10V_4C336 EV@.1U/10V_4
C339 EV@.1U/10V_4C339 EV@.1U/10V_4
C351 EV@.1U/10V_4C351 EV@.1U/10V_4
C353 EV@.1U/10V_4C353 EV@.1U/10V_4
C356 EV@.1U/10V_4C356 EV@.1U/10V_4
C369 EV@.1U/10V_4C369 EV@.1U/10V_4
C376 EV@.1U/10V_4C376 EV@.1U/10V_4
C377 EV@.1U/10V_4C377 EV@.1U/10V_4
C391 EV@.1U/10V_4C391 EV@.1U/10V_4
C384 EV@.1U/10V_4C384 EV@.1U/10V_4

C311 0.1U/10V_4C311 0.1U/10V_4
C318 0.1U/10V_4C318 0.1U/10V_4
C632 0.1U/10V_4C632 0.1U/10V_4
C334 0.1U/10V_4C334 0.1U/10V_4
C324 EV@.1U/10V_4C324 EV@.1U/10V_4
C627 EV@.1U/10V_4C627 EV@.1U/10V_4
C338 EV@.1U/10V_4C338 EV@.1U/10V_4
C344 EV@.1U/10V_4C344 EV@.1U/10V_4
C346 EV@.1U/10V_4C346 EV@.1U/10V_4
C355 EV@.1U/10V_4C355 EV@.1U/10V_4
C363 EV@.1U/10V_4C363 EV@.1U/10V_4R426 IV@24.9_4R426 IV@24.9_4
C365 EV@.1U/10V_4C365 EV@.1U/10V_4
C371 EV@.1U/10V_4C371 EV@.1U/10V_4
C382 EV@.1U/10V_4C382 EV@.1U/10V_4
C396 EV@.1U/10V_4C396 EV@.1U/10V_4
C387 EV@.1U/10V_4C387 EV@.1U/10V_4

+1.05V

PEG_RXN[15:0] 18

PEG_RXP[15:0] 18,26

PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15

PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15

PEG_TXN[15:0] 18,26

PEG_TXP[15:0] 18,26

,9(9'LV(QDEOHVHWWLQJ

<5/31>Montevina_Schematics_Checklist_Rev0_8
a)For TVOUT Disabled, TV_DCONSEL[1:0] Connect to GND. But
design guide Rev0.7 show NC.What is correct.
b)For CRT DAC Disable, CRT_DDC_CLK, CRT_DDC_DATA .
CRT_HSYNC, CRT_VSYNCThese signals should be connected to
GND. But design guide Rev0.7 show NC, Intel suggest follow
Design guide.

<check list>
For EV@
CRT R/G/B 0ohm to GND
CRTIREF 0ohm to GND

<check list>
For IV@
CRT R/G/B 150ohm to GND
CRTIREF 1Kohm to GND

CRTIREF
For IV: 1Kohm
For EV:0ohm

R186 SP@1K/F_4R186 SP@1K/F_4

CRTIREF

SP@

CRT_R/G/B
For IV: 150ohm
For EV:0ohm

R179 SP@150_4R179 SP@150_4
R178 SP@150_4R178 SP@150_4
R180 SP@150_4R180 SP@150_4

INT_CRT_BLU
INT_CRT_GRN
INT_CRT_RED

R413

R413

EV@0_4

EV@0_4

R412

R412

EV@0_4

EV@0_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH VGA

GMCH VGA

GMCH VGA

Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

1

1A

1A

1A

of

7Monday, July 12, 2010

7Monday, July 12, 2010

7Monday, July 12, 2010

43

43

43

5

4

3

2

1

08

M_A_DQ[63:0]16

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

AJ38
AJ41
AN38

AM38

AJ36

AJ40
AM44
AM42

AN43

AN44

AU40

AT38

AN41

AN39

AU44

AU42

AV39

AY44

BA40

BD43

AV41

AY43

BB41

BC40

AY37

BD38

AV37

AT36

AY38

BB38

AV36

AW36

BD13

AU11

BC11

BA12

AU13

AV13

BD12

BC12

BB9
BA9

AU10

AV9

BA11

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5

AN10
AM11

AM5

AJ9
AJ8

AN12
AM13

AJ11

AJ12

U20D

U20D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CANTIGA_PM

CANTIGA_PM

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_WE#

AM37

SA_DM_0

AT41

SA_DM_1

AY41

SA_DM_2

AU39

SA_DM_3

BB12

SA_DM_4

AY6

SA_DM_5

AT7

SA_DM_6

AJ5

SA_DM_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6

M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_BS0 16
M_A_BS1 16
M_A_BS2 16

M_A_RAS# 16
M_A_CAS# 16
M_A_WE# 16

M_A_DM[7:0] 16

M_A_DQS[7:0] 16

M_A_DQS#[7:0] 16

M_A_A[14:0] 16

M_B_DQ[63:0]17

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

AK47
AH46
AP47
AP46

AJ46
AJ48

AM48

AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44

BG43

BF43
BE45
BC41
BF40
BF41

BG38

BF38
BH35

BG35

BH40
BG39
BG34

BH34

BH14
BG12

BH11

BG8
BH12
BF11

BF8
BG7
BC5
BC6

AY3

AY1

BF6

BF5
BA1
BD3
AV2
AU3
AR3
AN2

AY2
AV1
AP3
AR1

AL1

AL2

AJ1
AH1
AM2
AM3
AH3

AJ3

U20E

U20E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA_PM

CANTIGA_PM

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

AM47

SB_DM_0

AY47

SB_DM_1

BD40

SB_DM_2

BF35

SB_DM_3

BG11

SB_DM_4

BA3

SB_DM_5

AP1

SB_DM_6

AK2

SB_DM_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6

M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_BS0 17
M_B_BS1 17
M_B_BS2 17

M_B_RAS# 17
M_B_CAS# 17
M_B_WE# 17

M_B_DM[7:0] 17

M_B_DQS[7:0] 17

M_B_DQS#[7:0] 17

M_B_A[14:0] 17

A A

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

*0&+&$17,*$

5

Size Document Number Rev

GMCH DDRII

GMCH DDRII

GMCH DDRII

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

1

1A

1A

1A

of

43

of

43

of

43

8Monday, July 12, 2010

8Monday, July 12, 2010

8Monday, July 12, 2010

5

4

3

2

1

IV@

09

SP@

Power consumption reference to Intel
644135 Cantiga chipset EDS Volume1.
Section 10

*07'3a:
*67'3a:

D D

C C

B B

307'3:

+1.5V_SUS

+

C561

C561

C558

C558

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

22U/6.3V_8

9&&B609
''50
P$B6P$B6
''50P$B6
''50P$B6

9
*UDSKLFVFRUH
9&&B$;*
9&&B$;*B1&7)
P$

Voltage regulator is shared between
the Gr aphics Core Rail,
VCCA_HPLL,VCCA_MPLL,VCCA_PEG_PLLVCCD_PEG_PLL,
VCCA_SM_CK, VCCA_DPLLA, VCCA_DPLLB, VCCD_HPLL,
VCCA_SM, VCC_AXF

C414

C414

0.1U/10V_4

0.1U/10V_4

IV@

+

C572

C572
330U/2V_7343

330U/2V_7343

+1.05V_AXG

R235 IV@10/F_4R235 IV@10/F_4
R230 IV@10/F_4R230 IV@10/F_4

+1.05V_AXG

AP33
AN33
BH32
BG32
BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21

AG21

AE21

AC21

AA21

AH20

AF20

AE20

AC20

AB20

AA20

AM15

AL15

AE15

AJ15

AH15

AG15

AF15

AB15

AA15

AN14

AM14

AJ14

AH14

Y26

Y24

Y21

T17
T16

Y15
V15
U15

U14
T14

U20G

U20G

VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

+1.05V_AXG

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

IV@

+1.05V_AXG

+

+

C602

C602
IV@330U/2V_7343

IV@330U/2V_7343

Place close to the GMCH Cavity Capaci tors

Intel check list(Rev 0.8)
220U*2 near to NB(ESR=15m ohm)
Intel CRB(Rev 0.7)
270U*4 near to power(+V1.05S).
330U*2 near to NB

1.8V
Internal connect to power

C403

C403

C418

C418

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

+1.05V +1.05V_AXG

,9(9'LV(QDEOHVHWWLQJ

Design guide(Table 72)
For INT VGA diasble.VCC_AXG power can connect to GND

Intel check list(Rev 0.8)
No description for VCC_SM bulk CAP
Intel CRB(Rev 0.7)
330U*1 Reserve near to power
330U*1 near to NB

R384 IV@0_8R384 IV@0_8
R381 IV@0_8R381 IV@0_8
R383 IV@0_8R383 IV@0_8

+

+

C601

C601
IV@330U/2V_7343

IV@330U/2V_7343

C417

C417

0.22U/6.3V_4

0.22U/6.3V_4

C416

C416

0.22U/6.3V_4

0.22U/6.3V_4

C399

C399
IV@0.47U/6.3V_4

IV@0.47U/6.3V_4

63#,96XWIIXI
(9VWXIIRKP

C404

C404

0.47U/6.3V_4

0.47U/6.3V_4

C392

C392
SP@1U/10V_6

SP@1U/10V_6

C415

C415
1U/6.3V_4

1U/6.3V_4

Intel check list(Rev 0.8)
270U*1 near to power(+V1.05M).
270U*2 near to NB
Intel CRB(Rev 0.7)
270U*3 near to power(+V1.05M).
270U*1 near to NB
ESR=12m ohm

+1.05V

C375

C375

0.1U/10V_4

0.1U/10V_4

SP@

C367

C367
IV@10U/6.3V_8

IV@10U/6.3V_8

C413

C413
1U/6.3V_4

1U/6.3V_4

C379

C379

0.22U/6.3V_4

0.22U/6.3V_4

C380

C380
IV@22U/6.3V_8

IV@22U/6.3V_8

C359

C359

0.22U/6.3V_4

0.22U/6.3V_4

C393

C393
IV@0.1U/10V_4

IV@0.1U/10V_4

C381

C381
22U/6.3V_8

22U/6.3V_8

Place close to
the GMCH

+

+

C631

C631
330U/2V_7343

330U/2V_7343

C410

C410
IV@0.1U/10V_4

IV@0.1U/10V_4

C370

C370
IV@0.1U/10V_4

IV@0.1U/10V_4

AG34
AC34
AB34
AA34

AM33
AK33

AJ33
AG33
AF33

AE33
AC33
AA33

AH28
AF28
AC28
AA28

AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24

AJ23
AH23
AF23

Y34
V34
U34

Y33

W33

V33
U33

T32

U20F

U20F

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

VCC_35

CANTIGA_PM

CANTIGA_PM

VCC CORE

VCC CORE

POWER

POWER

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

+1.05V

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

9&&
9&&B1&7)
P$B(9
P$B,9
0((QJLQH
P$
7RWDO0D[ P$

CANTIGA_PM

A A

1. Route VCC_AXG_SENSE and VSS_AXG_SENSE differentially

2. VCC_AXG_SENSE PU to +VG FX_CORE_INT with 10ohm
and VSS_AXG_SENSE PD with 10ohm for Intel suggest

*0&+&$17,*$

5

CANTIGA_PM

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH VCC,NCTF

GMCH VCC,NCTF

GMCH VCC,NCTF

Date: Sheet

Date: Sheet

4

3

2

Date: Sheet

1

1A

1A

1A

9Monday, July 12, 2010

9Monday, July 12, 2010

9Monday, July 12, 2010

of

43

of

43

of

43

5

Power consumption reference to Intel
Cantiga chipset EDS Volume1. Section 10

IV@

EV@

SP@

D D

C C

3.3V

24.15mA for VCCA_TVA_DAC

39.48mA for VCCA_TVB_DAC

24.15mA for VCCA_TVC_DAC
Total 87.78mA

B B

A A

1210 10UH, 10%

0.45A DCR_max = 0.39

5/12 UMA no stuff

+1.05V

+1.05V

+1.05V

1210 0.1uH, 20%, 1A,
DCR_max=0.078ȍ

FB 180@100 MHz, 25% 1.5A
DCR_max=90 m

CRB no 10U
Check list need min 10U~100U for VCCA_TV_DAC

+1.5V

L51 IV@10uh_8L51 IV@10uh_8

9
P$IRU'3//B$%

1210 10UH, 10%

0.45A DCR_max = 0.39

L49 IV@10uh_8L49 IV@10uh_8

R397 *0/short_6R397 *0/short_6

L48 BLM18PG181SN1D_6L48 BLM18PG181SN1D_6

+1.05VM_MPLL_RC

C615

C615

22U/6.3V_8

22U/6.3V_8

L53 IV@BKP1608HS181-T_6L53 IV@BKP1608HS181-T_6

+3V

C666

C666
IV@10U/6.3V_8

IV@10U/6.3V_8

R173 IV@0_6R173 IV@0_6

VCCD_TVDAC always keep 0.1U/0.022U/10U to +1.5V

+1.5V

1.5V

48.363mA for CRT
5mA for TV

R175 *0/short_6R175 *0/short_6

FB 180@100 MHz, 25% 1.5A
DCR_max=90 m

L32 BKP1608HS181-T_6L32 BKP1608HS181-T_6

C308

C308
10U/6.3V_8

10U/6.3V_8

CRB no 10U
Check list need min 10U~100U
for VCCA_QDAC

FB 220 @100 MHz, 25%, 2A

+1.05V

L47 BKP1608HS181-T_6L47 BKP1608HS181-T_6

+1.05VM_PEGPLL_RC

C618

C618
10U/6.3V_8

10U/6.3V_8

ESR=15 m

R393 0.5/F_6R393 0.5/F_6

+

+

C616

C616

4.7U/6.3V_6

4.7U/6.3V_6

3.3V
79mA

1.5V
50mA

R392 1/F_4R392 1/F_4

+3V_CRT_TV_DAC

Modify 6/18
REV:B

,9(9'LV(QDEOHVHWWLQJ

63#,17XVH8
(;7XVHRKP

C333

C638

C638
IV@220U/6.3V_7343

IV@220U/6.3V_7343

C611

C611

0.1U/10V_4

0.1U/10V_4

C650

C650
IV@0.1U/10V_4

IV@0.1U/10V_4

1.5V
35mA

C327

C327

0.1U/10V_4

0.1U/10V_4

C345

C345

0.1U/10V_4

0.1U/10V_4

C333

SP@0.1U/10V_4

SP@0.1U/10V_4

1.05V

139.2mA

C609

C609

0.1U/10V_4

0.1U/10V_4

+1.05V

63#,17XVH8
(;7XVHRKP

1.5V

0.5mA

1.05V
50mA

C644

C644

EV@220U/6.3V_7343

EV@220U/6.3V_7343

ESR=15 m

+

+

If CRT have Flicker issue
STUFF 5.6 ohm

R171 IV@BLM18PG181SN1D_6R171 IV@BLM18PG181SN1D_6

R429 IV@BLM18PG181SN1D_6R429 IV@BLM18PG181SN1D_6

VCCA_DPLLA/B always keep to +1.05V
(If no use IV dynamic core power)

C635

C635

SP@0.1U/10V_4

SP@0.1U/10V_4

1.05V
24mA

R231 *0/short_6R231 *0/short_6

,9(9'LV(QDEOHVHWWLQJ

C648

C648

SP@0.01U/25V_4

SP@0.01U/25V_4

C319

C319

SP@0.1U/10V_4

SP@0.1U/10V_4

C335

C335

0.01U/25V_4

0.01U/25V_4

C347

C347

0.01U/25V_4

0.01U/25V_4

ESR=60m ohm

*0&+&$17,*$

5

4

3.9 nH, 0.2 nH, 1A
, DCR_max=32 m

+1.05V

63#,17XVH8
(;7XVHRKP

C614

C614

0.1U/10V_4

0.1U/10V_4

4

,9(9'LV(QDEOHVHWWLQJ

+3V_VCCA_CRT_DAC

C322

C322

C328

C328

IV@0.1U/10V_4

IV@0.1U/10V_4

SP@0.01U/25V_4

SP@0.01U/25V_4

63#,17XVH8
(;7XVHRKP

+3V_A_DAC_BG

C651

C651

C647

IV@0.1U/10V_4

IV@0.1U/10V_4

C647

SP@0.01U/25V_4

SP@0.01U/25V_4

C653

C653
IV@10U/6.3V_8

IV@10U/6.3V_8

USE same GND plane

9
P$

R388 *0/short_8R388 *0/short_8

+1.5V

R233 *0/short_6R233 *0/short_6

1.05V
DDR2-800
26mA

CRB : 0 ohm
Check list : 2.2nH

1.05V
DDR2-800
720mA

C663

C663
*IV@10U/6.3V_8

*IV@10U/6.3V_8

4/21 add

C610

C610

0.1U/10V_4

0.1U/10V_4

+1.05VM_A_SM

C409

C409

22U/6.3V_8

22U/6.3V_8

+1.05VM_A_SM_CK

C408

C408
*2.2U/6.3V_6

*2.2U/6.3V_6

C654

C654
*IV@10U/6.3V_8

*IV@10U/6.3V_8

C637

C637

SP@1000P/50V_4

SP@1000P/50V_4

VCCA_PEG_PLL
+1.25V for Teenah use(100mA)

VCCD_QDAC share to TV and CRT

R396 *0/short_6R396 *0/short_6

+1.05V

C613

C613

0.1U/10V_4

0.1U/10V_4

+1.8V

1.05V

157.2mA

R202 IV@0_6R202 IV@0_6

1.8V

60.31mA

C606

C606

0.1U/10V_4

0.1U/10V_4

,9(9'LV(QDEOHVHWWLQJ

63#,17XVH8
(;7XVHRKP

+VCCA_PEG_BG

+1.05VM_PEGPLL

C412

C412

4.7U/6.3V_6

4.7U/6.3V_6

C406

C406

22U/6.3V_8

22U/6.3V_8

+1.8VSUS_DLVDS

C312

C312
IV@10U/6.3V_8

IV@10U/6.3V_8

9
P$

9
P$

+1.05VM_DPLLA
+1.05VM_DPLLB
+1.05VM_HPLL
+1.05VM_MPLL
+1.8VSUS_TXLVDS

1.5V
414uA

1.05V
50mA

C402

C402
1U/6.3V_4

1U/6.3V_4

C405

C405

0.1U/10V_4

0.1U/10V_4

+3V_CRT_TV_DAC

+VCC_HDA
+1.5V_TVDAC

+1.5V_QDAC

+1.05VM_MCH_PLL2

+1.05VM_PEGPLL

B27
A26

A25
B25

F47

L48
AD1
AE1

J48

J47

AD48

AA48

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

AP28
AN28
AP25
AN25

AN24
AM28
AM26
AM25

AL25
AM24

AL24
AM23

AL23

B24
A24

A32

M25

L28

AF1

AA47

M38

L37

C348

C348
SP@1U/6.3V_4

SP@1U/6.3V_4

3

U20H

U20H

VCCA_CRT_DAC_1
VCCA_CRT_DAC_2

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

VCCA_TV_DAC_1
VCCA_TV_DAC_2

VCC_HDA

VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

VCCD_LVDS_1
VCCD_LVDS_2

CANTIGA_PM

CANTIGA_PM

Power Net Name

VCC_AXG_#
VCC_AXG_NCTF_#

VCCA_PEG_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_SM_#

VCCA_HPLL

VCCA_MPLL

VCCA_SM_CK_#

VCCA_PEG_PLL

VCC_AXF_#

VCCD_HPLL

VCCD_PEG_PLL

3

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

PEG

PEG

DMI

DMI

Cantiga(V)

1.05V

1.5V

1.05V

1.05V

1.05V

1.05V

1.05V

1.05V

1.05V

1.05V

1.05V

1.05V

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15

VTT

VTT

VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

VCC_HV_1
VCC_HV_2
VCC_HV_3

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

VTTLF1
VTTLF2
VTTLF3

VTTLF

VTTLF

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

2

C374

C374

C362

C362

0.47U/6.3V_4

0.47U/6.3V_4

2.2U/6.3V_6

2.2U/6.3V_6

1.05V

321.35mA

+1.05VM_AXF

+1.5VSUS_VCC_SM_CK

4/15 Modify

C575

C575

0.1U/10V_4

0.1U/10V_4

C646

C646
1U/6.3V_4

1U/6.3V_4

,9(9'LV(QDEOHVHWWLQJ

+1.8VSUS_TXLVDS

63#,17XVHSI
(;7XVHRKP

3.3V

105.3mA

1.05V
1782mA

1.05V
456mA

C617

C617

C634

C634

0.47U/6.3V_4

0.47U/6.3V_4

0.47U/6.3V_4

0.47U/6.3V_4

2

C603

C603

0.1U/10V_4

0.1U/10V_4

C321

C321

0.47U/6.3V_4

0.47U/6.3V_4

1.05V
FSB-1067
852mA

+

+

C619

C360

C360

4.7U/6.3V_6

4.7U/6.3V_6

C619
330U/2V_7343

330U/2V_7343

C361

C361

4.7U/6.3V_6

4.7U/6.3V_6

ESR= 12m ohm

Check list : 0.1UH
CRB : 0 ohm
1210 0.1 ?H, 20% 1A
DCR max = 78 m

C652

C652
*10U/10V_8

*10U/10V_8

ESR = 60 m

C639

C639
SP@1000P/50V_4

SP@1000P/50V_4

+3V

C320

C320

0.1U/10V_4

0.1U/10V_4

L52 *0/short_8L52 *0/short_8

1.8V
DDR2-800
124mA

L44 1uh_8L44 1uh_8

+1.5VSUS_SMCK_RC

R3411/F_4 R3411/F_4

1.05V
Internal connect to power

4/15 Modify

1.8V

118.8mA

L50 IV@0.1uh_6L50 IV@0.1uh_6

C643

C643

IV@22U/6.3V_8

IV@22U/6.3V_8

R176 10_4R176 10_4

C604

C604

4.7U/6.3V_6

4.7U/6.3V_6

1

([WHUQDO*UDSKLFV
*0&+,QWHJUDWHG*UDSKLFV'LVDEOH

VCCSYNC_CRT

VCCA_CRT_DAC

VCCD_LVDS

VCC_TX_LVDS

+1.05V

+1.05V

0805 1UH , Rdc = 0.14 - 0.26.
Max rated current = 220 mA

+1.5V_SUS

C570 10U/6.3V_8C570 10U/6.3V_8

VCCA_LVDS

VCCA_TVDAC

VCCD_QDAC

VCCA_DAC_BG

VCC_AXG

VCC_AXG_NCTF

DDR3 +1.5V_SUS
DDR2 +1.8V_SUS

0805 100 nH, DCR=160 m

+1.8V

+1.05V_SD

C605

C605

22U/6.3V_8

22U/6.3V_8

D9 CH751D9 CH751

+1.05V

+

+

C625

C625
EV@220U/6.3V_7343

EV@220U/6.3V_7343

21

5/12 UMA no stuff

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH POWER

GMCH POWER

GMCH POWER

Date: Sheet

Date: Sheet

Date: Sheet of

1

+1.05V

10

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

10Monday, July 12, 2010

10Monday, July 12, 2010

10Monday, July 12, 2010

of

of

1A

1A

1A

43

43

43

5

U20I

U20I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

VSS_8

D D

C C

B B

A A

AD47
AB47

N47

G47
BD46
BA46
AY46
AV46
AR46

AM46

V46
R46
P46
H46

F46
BF44
AH44
AD44
AA44

Y44

U44

T44

M44

F44
BC43
AV43
AU43

AM43

C43

BG42

AY42
AT42
AN42
AJ42
AE42

N42
BD41

AU41

AM41

AH41
AD41
AA41

Y41

U41

T41

M41
G41

B41

BG40

BB40
AV40
AN40

H40

E40
AT39

AM39

AJ39
AE39

N39

B39
BH38
BC38
BA38
AU38
AH38
AD38
AA38

Y38

U38

T38

F38

C38
BF37
BB37

AW37

AT37
AN37
AJ37

H37

C37

BG36

BD36
AK15
AU36

Y47
T47

L47

J43

L42

L39

J38

VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CANTIGA_PM

CANTIGA_PM

VSS

VSS

*0&+&$17,*$

5

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198

4

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23

4

3

U20J

U20J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

M17

H17

C17
BA16
AU16

AN16

N16

K16

G16

E16
BG15
AC15

W15

A15
BG14
AA14

C14
BG13
BC13
BA13

AN13

AJ13

AE13

N13

L13
G13
E13

BF12

AV12

AT12
AM12
AA12

J12

A12
BD11
BB11

AY11
AN11
AH11

Y11
N11
G11
C11

BG10
AV10

AT10

AJ10
AE10
AA10

M10

BF9
BC9
AN9
AM9
AD9

G9

B9

BH8

BB8

AV8

AT8

3

VSS_230
VSS_231
VSS_232
VSS_233

VSS_235
VSS_237

VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_PM

CANTIGA_PM

VSS

VSS

VSS NCTF

VSS NCTF

VSS SCB

VSS SCB

NC

NC

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354
VSS_355

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4

VSS_SCB_6

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42
NC_43

2

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29
AJ6

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1

A3
E1

D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48
A47

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GMCH VSS

GMCH VSS

GMCH VSS

Date: Sheet

Date: Sheet of

2

Date: Sheet of

1

11

1A

1A

1A

of

43

11Monday, July 12, 2010

43

11Monday, July 12, 2010

43

1

11Monday, July 12, 2010

5

+VCCRTC

Internal pull-down
resistors that are
always enabled

SATA_LED#27

SATA_TXN127
SATA_TXP127

C594 15P/50V_4C594 15P/50V_4

C593 15P/50V_4C593 15P/50V_4

+1.5V

ACZ_SDIN029

23

Y3

Y3

32.768KHZ

32.768KHZ

4 1

R379 1M/F_6R379 1M/F_6
R364 330K/F_4R364 330K/F_4

R355 330K/F_4R355 330K/F_4

,QWHUQDO950HQDEOHGIRU
9FF6XVB9FF6XVB
9FF&/B9FF/$1BDQG
9FF&/B

+3V_S5

R378 10K_4R378 10K_4
R382 24.9/F_4R382 24.9/F_4

T23T23
T24T24

0.01u/16V_4C659 0.01u/16V_4C659

0.01u/16V_4C658 0.01u/16V_4C658

R363

R363
10M_6

10M_6

SM_INTRUDER#

ICH_GPIO56

HDA_BIT_CLK_R
HDA_SYNC_R

HDA_RST#_R

HDA_SDIN2

HDA_SDOUT_R

SATA_TXN1_C
SATA_TXP1_C

CLK_32KX1
CLK_32KX2

RTC_RST#
SRTC_RST#

ICH_INTVRMEN
LAN100_SLP

ICH9M

IV@

EV@

D D

24.9 Ohm pull up to 1.5V
for GLAN_COMPI/O is
required, no matter intel
LAN is used or not.

C C

SATA_RXN127

ODD (S ATA)

SATA_RXP127

4

U23A

U23A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9MREV1.0

ICH9MREV1.0

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

RCIN#

STPCLK#

THRMTRIP#

SATA4RXN

IHDA

IHDA

SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN
SATA_CLKP

SATA

SATA

SATARBIAS#

SATARBIAS

INIT#
INTR

NMI

SMI#

TP8

K5
K4
L6
K2

K3
J3

J1
N7

AJ27
AJ25

AE23
AJ26

H_FERR#_R

AD22
AF25
AE22

AG25
L3

AF23
AF24

AH27
AG26

H_THERMTRIP_R

AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

SATABIAS L<0.5"

T38T38
T122T122

SATA_TXN0_C
SATA_TXP0_C

SATA_RBIAS_PN

3

LDRQ0/1# : Internal PU

R211 8.2K_4R211 8.2K_4

R463 56_4R463 56_4

R219 10K_4R219 10K_4

R421 54.9/F_4R421 54.9/F_4

T22T22

CLK_PCIE_SATA 2

R170

R170

24.9/F_4

24.9/F_4

+3V

+3V

0.01u/16V_4C661 0.01u/16V_4C661

0.01u/16V_4C660 0.01u/16V_4C660

SATA HDD

CLK_PCIE_SATA# 2

LAD0 28,35
LAD1 28,35
LAD2 28,35
LAD3 28,35

LFRAME# 28,35

GATEA20 35
H_A20M# 3

H_PWRGD 3
H_IGNNE# 3
H_INIT# 3

H_INTR 3

RCIN# 35
H_NMI 3
H_SMI# 3

H_STPCLK# 3

H_THERMTRIP_RR

4/21 Modify andy

SATA_RXN0 27
SATA_RXP0 27
SATA_TXN0 27
SATA_TXP0 27

2

+1.05V

R443

R443
*56_4

*56_4

R430 56_4R430 56_4
R420 *0_4R420 *0_4

No use Thermal trip SB sid e still PU 56ohm.(Serial R use 0ohm)
Use Thermal trip can share PU for CPU and SB side(And Serial R use 54.9 ohm)
PU L<2"

Intel ICH9M

Layout note:

R406

R406

DPRSTP# , Daisy Chain

*56_4

*56_4

(SB>Power>NB>CPU)

ICH_DPRSTP# 3,6,39
H_DPSLP# 3

+1.05V

AJSLB8Q0T03

PM_THRMTRIP# 3,6

+1.05V

R442

R442
56_4

56_4

1

12

H_FERR# 3

HD Audio

B B

HDA_SDOUT_R

Weak integrated PD on the HDA_SDOUT pin.

HDA_SYNC_R

R471 IV@33_4R471 IV@33_4
R478 33_4R478 33_4

R472 IV@33_4R472 IV@33_4
R479 33_4R479 33_4

Weak integrated PD on the HDA_SYNC pins

HDA_SDOUT_HDMI 6
ACZ_SDOUT_AUDIO 29

C671

C671
*10P/50V_4

*10P/50V_4

HDA_SYNC_HDMI 6

ACZ_SYNC_AUDIO 29 ACZ_RST#_AUDIO 29

C672

C672
*10P/50V_4

*10P/50V_4

HDA_BIT_CLK_R

24.000 MHz is output from the ICH9M.

R470 IV@33_4R470 IV@33_4
R477 33_4R477 33_4

HDA_RST#_R

HDA_SDIN2

C668

C668
*10P/50V_4

*10P/50V_4

R473 IV@33_4R473 IV@33_4
R483 33_4R483 33_4

R166 IV@0_4R166 IV@0_4

HDA_BIT_CLK_HDMI 6
ACZ_BITCLK_AUDIO 29

C664

C664
*10P/50V_4

*10P/50V_4

HDA_RST#_HDMI 6

HDA_SDIN_HDMI 6

South Bridge Strap Pin (1/ 3)

Pin Name

HDA_DOCK_EN/
GPIO33

A A

SATALED#

TP3

HDA_SDOUT

Strap description

Flash Descriptor Security
Override Strap

PCI Express Lane Reversal
(Lanes 1-4)

XOR Chain Entrance

XOR Chain Entrance /PCI Express*
Port Config 1 bit 1(Port 1- 4)

5

Sampled

PWROK

PWROK

PWROK

PWROK

Configuration PU/PD

0 = The Flash Descriptor Security will be overridd en.
1 = The security measures defined
in the Flash Descriptor will be in effect

Internal PU

ICH_TP3

HDA_SDOUT

0

0
0

11

4

RSVD
Enter XOR Chain

1

Normal opration(Default)

01

Set PCIE port config bit 1

Description

This strap should only be enabled in manufacturing
environments using an external pull-up resistor.

ICH_TP314

HDA_SDOUT_R

ICH_TP3

3

R370 *1K_4R370 *1K_4

R440 *1K_4R440 *1K_4

+3V

RTC

Pjt: BCBAT54CZ04
Ons: BCBAT54CZ70

+3VPCU

VCCRTC_1

20MIL

R495

R495
1K_4

1K_4

1 3

VCCRTC_2

20MIL

CN13

CN13

1

1

2

2

RTC_CONN

RTC_CONN

Pitch: 1,25mm; Height: 1. 95mm

Change type 4/21 (ZQ7)

2

D28

D28

BAT54C

BAT54C

2

RTC_N01

Q21

Q21

*MMBT3904

*MMBT3904

RTC_N03

+VCCRTC

20MIL

R480 *16K_6R480 *16K_6

RTC_RST#

1

C667

C667
1U/10V_4

1U/10V_4

C699

C699
1U/10V_4

1U/10V_4

SRTC_RST#

12

RTC_RST#

12

2

G2

G2

*SHORT_PAD

*SHORT_PAD

G3

G3

*SHORT_PAD

*SHORT_PAD

3

Q22

Q22

1

DMN601K-7

DMN601K-7

of

12Monday, July 12, 2010

12Monday, July 12, 2010

12Monday, July 12, 2010

R489 20K_6R489 20K_6

C675

C675
1U/10V_4

1U/10V_4

R497 20K_6R497 20K_6

+5VPCU

R481

R481
*68.1K/F_4

*68.1K/F_4

R482

R482
*150K/F_6

*150K/F_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet of

Date: Sheet of

RTC_EC35

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

ICH9M HOST

ICH9M HOST

ICH9M HOST

1A

1A

1A

43

43

43

5

4

3

2

1

ICH9M

U23D

U23D

N29

PERN1

PCIE_TXN4_C
PCIE_TXP4_C

GLAN_TXN_SB
GLAN_TXP_SB

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9MREV1.0

ICH9MREV1.0

PCI-Express

PCI-Express

DMI_IRCOMP

SPI

SPI

USB

USB

U23B

U23B

D11

AD0

C8
D9

E12

E9
C9

E10

B7

INTA#
INTB#
INTC#
INTD#

C7
C5

G11

F8

F11

E7
A3
D2

F10

D5

D10

B3
F7
C3
F3
F4
C1

G7

H7
D1

G5

H6

G1

H3

E1
C4

D D

T116T116
T115T115
T124T124
T106T106

C C

PCI

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#
PIRQB#

J6

PIRQC#
PIRQD#

ICH9MREV1.0

ICH9MREV1.0

REQ1#/GPIO50

GNT1#/GPIO51

REQ2#/GPIO52

GNT2#/GPIO53

REQ3#/GPIO54

GNT3#/GPIO55

PIRQE#/GPIO2

PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

REQ0#
GNT0#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#
STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

F1
G4
B6
A7
F13
F12
E6
F6

D8
B4
D6
A5

D3
E3

PAR

R1
C6
E4
C2
J4
A4
F5
D7

C14
D4
R2

PME# inter nal PU 18K~42K

H4

INTE#

K6

INTF#

F2

INTG#

G2

INTH#

REQ0#
GNT0#
REQ1#
GNT1#
REQ2#
GNT2#
REQ3#
GNT3#

IRDY#
PCIRST#

DEVSEL#
PERR#
LOCK#
SERR#
STOP#
TRDY#
FRAME#

PLT_RST#

For EMI

5/12 Add

PCLK_ICH

T111T111
T40T40
T100T100
T107T107
T102T102
T103T103
T104T104
T41T41

T113T113

T109T109
T114T114
T110T110
T120T120
T105T105
T117T117
T101T101

T121T121
T123T123
T118T118
T119T119

C579 *33p/50V_4C579 *33p/50V_4

PCIRST# 28

PLT_RST# 6
PCLK_ICH 2

WLAN

GLAN

PCIE_RXN428
PCIE_RXP428

PCIE_TXN428

PCIE_TXP428

GLAN_RXN31
GLAN_RXP31
GLAN_TXN31
GLAN_TXP31

4/22 add it

USBOC#628

USBOC#1028

C385 0.1U/10V_4C385 0.1U/10V_4
C386 0.1U/10V_4C386 0.1U/10V_4

C401 0.1U/10V_4C401 0.1U/10V_4
C398 0.1U/10V_4C398 0.1U/10V_4

T48T48
T50T50

T51T51

SPI_CLK_R
SPI_CS0#_R
SPI_CS1#

SPI_MOSI
SPI_MISO

USBOC#0
USBOC#1
USBOC#2
USBOC#3
USBOC#4
USBOC#5
USBOC#6
USBOC#7
USBOC#8
USBOC#9
USBOC#10
USBOC#11

SB_USBBIAS

4/26 add it

R172

R172

22.6/F_4

22.6/F_4

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

T25

DMI_CLKP

Direct Media Interface

Direct Media Interface

AF29

DMI_ZCOMP

AF28

DMI_IRCOMP_R

AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

DMI_RXN0 6
DMI_RXP0 6
DMI_TXN0 6
DMI_TXP0 6

DMI_RXN1 6
DMI_RXP1 6
DMI_TXN1 6
DMI_TXP1 6

DMI_RXN2 6
DMI_RXP2 6
DMI_TXN2 6
DMI_TXP2 6

DMI_RXN3 6
DMI_RXP3 6
DMI_TXN3 6
DMI_TXP3 6

CLK_PCIE_ICH# 2
CLK_PCIE_ICH 2

R409 24.9/F_4R409 24.9/F_4

USBP0- 28
USBP0+ 28

USBP1- 33
USBP1+ 33
USBP2- 28
USBP2+ 28

USBP3- 28

USBP3+ 28

USBP4- 28

USBP4+ 28

USBP6- 28

USBP6+ 28

USBP7- 28

USBP7+ 28

USBP11- 25
USBP11+ 25

+1.5V

EXT-USB
CardReader
EXT-USB
Bluetooth 3.0
Wireless

INT-USB
Bluetooth 2.1

CAMERA

L<0.5",Avoid routing next to clock/high speed signals.

13

6/14 Modify

+3V

South Bridge Strap Pin (2/3)

C400

C400

0.1U/10V_4

0.1U/10V_4

B B

A A

LOCK#

7

INTD#

8

REQ3#

9

DEVSEL# REQ1#

10

+3V

INTF#
INTC#
INTE#
SERR#

+3V

PERR#

+3V

6
7
8
9

10

6
7
8
9

10

8.2K_10P8R

8.2K_10P8R

RN18

RN18

8.2K_10P8R

8.2K_10P8R

RN17

RN17

8.2K_10P8R

8.2K_10P8R

5/11 Swap

RN16

RN16

6

+3V

5
4

REQ2#

3

FRAME#

2
1

STOP#

+3V

5
4
3
2

INTH#

1

INTG#

+3V

5
4

IRDY#

3

INTB#REQ0#

2

INTA#

1

TRDY#

5

PLT_RST#

USBOC#0
USBOC#6
USBOC#4
USBOC#7

+3V_S5

USBOC#10
USBOC#11
USBOC#8
USBOC#9

2
1

3 5

RN19

RN19

6
7
8
9

10

10K_10P8R

10K_10P8R

RN20

RN20

6
4
2

10K_8P4R

10K_8P4R

5/11 Swap

4

U19

U19
TC7SH08FU

TC7SH08FU

5
4
3
2
1

78
5
3
1

4

R354

R354
100K_4

100K_4

USBOC#1
USBOC#5
USBOC#2
USBOC#3

PLTRST# 28,31,33,35

+3V_S5

+3V_S5

Pin Name Strap description

HDA_SYNC

GNT2# / GPIO53 PWROK

GNT1# / GPIO51

GNT3# / GPIO55

SPI_MOSI

GNT0#

SPI_CS1# /
GPIO58 / CLGPIO6

3

PCI Express Port
Config 1 bit 0 (Port 1-4)

PCI Express Port
Config 2 bit 2 (Port 5-6)

ESI Strap(Server Only)

Top-Block Swap Override

Integrated TPM Enable

Boot BIOS Selection 0

Sampled

PWROK

PWROK

PWROK

CLPWROK

PWROK

CLPWROKBoot BIOS Selection 1

Configuration PU/PD

0 = Default
1 = Setting bit 0

0 = Setting bit 2
1 = Default

0 = DMI for ESI-compatible
1 = Default

0 = "top-block swap" mode
1 = Default

0 = INT TPM disable(Default)
1 = INT TPM enable

10

01

11

Boot Location

SPI

PCI

LPC(Default)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

SPI_CS#1PCI_GNT#0

2

GNT3#

R237 *1K_4R237 *1K_4

SPI_MOSI

R380 *10K_4R380 *10K_4

GNT0#

R236 *1K_4R236 *1K_4

SPI_CS1#

R234 *1K_4R234 *1K_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

ICH9M PCIE / PCI / USB

ICH9M PCIE / PCI / USB

ICH9M PCIE / PCI / USB

1

+3V_S5

1A

1A

1A

of

43

of

43

of

43

13Monday, July 12, 2010

13Monday, July 12, 2010

13Monday, July 12, 2010

+3V_S5

R357 10K_4R357 10K_4
R356 10K_4R356 10K_4
R366 2.2K_4R366 2.2K_4
R367 2.2K_4R367 2.2K_4
R225 10K_4R225 10K_4
R375 10K_4R375 10K_4

D D

C C

R224 10K_4R224 10K_4
R376 10K_4R376 10K_4
R223 10K_4R223 10K_4
R368 8.2K_4R368 8.2K_4
R403 *10K_4R403 *10K_4
R358 10K_4R358 10K_4
R360 10K_4R360 10K_4

+3V

R218 8.2K_4R218 8.2K_4
R217 10K_4R217 10K_4
R445 8.2K_4R445 8.2K_4
R359 10K_4R359 10K_4

R390 *10K_4R390 *10K_4
R444 *10K_4R444 *10K_4
R439 10K_4R439 10K_4
R448 10K_4R448 10K_4
R240 10K_4R240 10K_4
R221 10K_4R221 10K_4

+3V_S5

R351 10K_4R351 10K_4
R352 *100/F_4R352 *100/F_4

R449 10K_4R449 10K_4
R222 10K_4R222 10K_4

5

4/20 Modify

SMB_CLK_ME
SMB_DATA_ME
PCLK_SMB
PDAT_SMB
RI#
ICH_GPIO60 RI#
SYS_RST#

SMB_ALERT#

PCIE_WAKE#
PM_BATLOW#
DNBSWON#
ICH_GPIO12
ICH_GPIO13

CLKRUN#
SERIRQ
THERM_ALERT# KBSMI#_ICH
EC_SCI#

SATACLKREQ#
MCH_ICH_SYNC#
KBSMI#_ICH
LID591#_ICH
PM_STPPCI#
PM_STPCPU#

GPIO57

CR_WAKE#
ICH_PWROK

PWRBTN : 16 ms of internal debounce
logic on this pin and internal PU 24K

Stuff at GEN

TPM Physical
Presence for
iTPM.

'$$6)LVVXHZKHQL$07LVQRWLPSOHPHQWHG
,&+060%XVDQG60/LQNVKRXOGEHFRQQHFWHGWRJHWKHUWRVXSSRUWVODYHPRGH
&RQQHFW60/,1.WR60%&/.DQG60/,1.WR60%'$7$$GG55IRUGHEXJXVH

PCLK_SMB2,16,28
PDAT_SMB2,16,28

SYS_RST#3
PM_SYNC#6

PM_STPPCI#2
PM_STPCPU#2

PCIE_WAKE#28,31

THERM_ALERT#3

SATACLKREQ#2

MCH_ICH_SYNC#6

ICH_TP312

4

U23C

U23C

PCLK_SMB
PDAT_SMB
ICH_GPIO60

T54T54

T132T132

T98T98
T45T45

T129T129
T128T128

T130T130
T133T133
T131T131

T34T34

SMB_CLK_ME
SMB_DATA_ME

SYS_RST#

SMB_ALERT#
PM_STPPCI#

PM_STPCPU#
CLKRUN#
PCIE_WAKE#
THERM_ALERT#

VR_PWRGD_CLKEN

LID591#_ICH

ICH_GPIO12
ICH_GPIO13
BOARD_ID0
BOARD_ID1
PANEL_ID1
BOARD_ID3

SATACLKREQ#
CR_WAKE#
ICH_GPIO39
ICH_GPIO48
DMI_TERM_SEL
GPIO57

MCH_ICH_SYNC#

ICH_TP3

4/20 Modify

CLKRUN#35

SERIRQ35

KBSMI#35
LID591#25,35

EC_SCI#35

D26 BAS316D26 BAS316
D27 BAS316D27 BAS316

5/7 Modify

PCSPK29

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP12

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP9

AJ20

TP10

AJ21

TP11

ICH9MREV1.0

ICH9MREV1.0

3

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

GPIO

GPIO

SATA

SATA

SMB

SMB

Clocks

Clocks

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

MISC

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#
LAN_RST#
RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

MEM_LED/GPIO24

WOL_EN/GPIO9

6$7$>[@*3SLQVLIXQXVHGUHTXLUH
NWRNSXOOXSWR9FFBRU
NWRNSXOOGRZQWRJURXQG

AH23

BOARD_ID2

AF19

PANEL_ID0

AE21

ICH_GPIO36

AD20

ICH_GPIO37

H1

14M_ICH

AF3

CLKUSB_48

P1
C16

E16
G17

C10
G20

ICH_PWROK

M2
B13

PM_BATLOW#

R3
D20

PM_LAN_ENABLE_R

D22

PM_RSMRST#_R

R5
R6
B16
F24

B19
F22

C19
C25

CL_VREF0_SB

A19

CL_VREF1_SB

F21
D18

A16
C18

ICH_GPIO10

C11

ICH_GPIO14

C20

ICH_GPIO9

=6'HIDXOWQRW
VXSSRUW,$076RWKLV
LQWHUIDFHIROORZ
&5%&KHFNOLVW38
RQO\

R181 10K_4R181 10K_4
R446 10K_4R446 10K_4
R408 10K_4R408 10K_4

T36T36
T99T99

R372 *0/short_4R372 *0/short_4
R361 *0_4R361 *0_4

T53T53

T46T46

T49T49

T42T42
T52T52

R374 10K_4R374 10K_4
R377 10K_4R377 10K_4
R371 10K_4R371 10K_4

2

14M_ICH 2
CLKUSB_48 2

ICH_SUSCLK 35
SUSB# 6,35

SUSC# 6,35

PM_DPRSLPVR 6,39

DNBSWON# 35

PM_RSMRST#_R

CK_PWRGD 2
MPWROK 6,35

CL_CLK0 6

CL_DATA0 6

CL_RST#0 6

+3V_S5

+3V

4/14 Modify

1

14

C407

C407
*10p/50V_4

*10p/50V_4

<Checklist ver0.8>
The ICH9M Controller
Link 1 VREF circuit is
required only if Intel
AMT is to be supported.

+3V+3V

For EMI

C325

C325
*10p/50V_4

*10p/50V_4

R256

R256

3.24K/F_6

3.24K/F_6

R255

R255
453/F_4

453/F_4

CLKUSB_48
14M_ICH

<Checklist ver0.8>
If integrated LAN is not used LAN_RST# tie it to GND.NC serial R from RSMRST#.
If Intel LAN i s used with Wake On LAN, t ie LAN_RST# to RSMRST# and NC 0ohm.

CL_PWROK must not assert after PWROK asserts for IAMT.
CL_PWROK to the NB and SB should be connected to existing PWROK inputs
on the NB and SB on a platform with no IAMT

CL VREF

VREF1 CRB connect to
+3V_S5
Checklist connect to
+3V(iAMT reserve)

R353

R353
*3.24K/F_6

*3.24K/F_6

CL_VREF0_SBCL_VREF1_SB

C584

C584

R373

R373

*0.1U/10V_4

*0.1U/10V_4

*453/F_4

*453/F_4

C436

C436

0.1U/10V_4

0.1U/10V_4

Add 4/19

+3V_S5

R369 *10K_4R369 *10K_4

B B

+3V

R451 10K_4R451 10K_4
R462 10K_4R462 10K_4
R447 10K_4R447 10K_4

EC_SCI#

PANEL_ID1
ICH_GPIO39
ICH_GPIO48

Follow CHECK LIST V1.5

ICH PWROK

+3V_S5

C582 *0.1U/10V_4C582 *0.1U/10V_4

4

ICH_PWROK

U16

U16

TC7SH08FU

TC7SH08FU

'(/$<B95B3:5*22'QHHG38.WR9
=638DWSRZHUVLGH

53

1
2

PWROK_EC

R333 100K_4R333 100K_4

DELAY_VR_PWRGOOD 3,6,39
PWROK_EC 35

South Bridge Strap Pin (3/3)

Pin Name Strap description

A A

GPIO20

SPKR

GPIO49

Reserved PWROK

No Reboot PWROK

DMI Termination
Voltage

5

Sampled

PWROK

Configuration PU/PD

0 = Default
1 = No Reboot mode

0 = for desktop applications
1 = for mobile applications
Internal PU

PCSPK

DMI_TERM_SEL

4

R216 *1K_4R216 *1K_4

R464 *1K_4R464 *1K_4

+3V

Resume RST

CLK Enable

3

PM_RSMRST#_R

VR_PWRGD_CK410#39

R362

R362
10K_4

10K_4

R238

R238

2.2K_4

2.2K_4

3 1

2

2

3

1
2

3

1

1
2

Q11

Q11

MMBT3906

MMBT3906

R248 4.7K_4R248 4.7K_4

D14

D14

BAV99

BAV99

ZD1 INTEL FAE (08/17)

D12

D12

"A dd RSMRST# isolation (important!!! See
ww22 Santa Rosa MoW)"

BAV99

BAV99

Default stuff for Teenah(Interposer) chipset
ZS2 Intel FAE suggestion to add for to protect
RTC/CMOS data from corruption when system
encounters an abnormal power down
sequence

+3V

C439

C439
*0.1U/10V_4

5
43

VR_PWRGD_CLKEN

*0.1U/10V_4

R350

R350
100K_4

100K_4

U18

U18

NC7SZ04

NC7SZ04

RSMRST# 35

+3V_S5

4/20 Modify

2

M/B ID

+3V+3V +3V+3V

R467

R467
*10K_4

*10K_4

R468

R468
10K_4

10K_4

R466

R466
*10K_4

*10K_4

BOARD_ID2BOARD_ID3 BOARD_ID0BOARD_ID1

R465

R465
10K_4

10K_4

R389

R389
*10K_4

*10K_4

R385

R385
10K_4

10K_4

ID2ID3

default

0000

000

00

00

1

000

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH9M GPIO

ICH9M GPIO

ICH9M GPIO

Date: Sheet

Date: Sheet

Date: Sheet

1

R469

R469
*10K_4

*10K_4

R450

R450
10K_4

10K_4

14Monday, July 12, 2010

14Monday, July 12, 2010

14Monday, July 12, 2010

ID0ID1Board ID

1

1

0

1

1

1A

1A

1A

of

43

of

43

of

43

5

ICH9M

IV@

EV@

D D

PER INTEL SUGGESTION:

CHANGE TO 100OHM & 1UF

C C

B B

A A

D24 CH751D24 CH751

+3V

R365 100_6R365 100_6

+5V

D25 CH751D25 CH751

+3V_S5

R404 100_6R404 100_6

+5V_S5

330 Ohms@ 100 MHz , 0805

L33 BLM21PG331SN1DL33 BLM21PG331SN1D

+1.5V

+1.5V

+VCCRTC

2 1

2 1

1 2

+

+

C366

C366
220U/6.3V_7343

220U/6.3V_7343

VCC1_5_A

1.5V
1342mA

1.05V , Powered by VCC1_05 in S0

3.3V
S0:19mA
S3/4/5:78mA

+3V

+1.5V

1.5V
23mA

MODIFY
follow ZR6

2~3.456v

3.6uA_G3

5V
2mA

5V
S0:2mA
S3/4/5:1mA

C378

C378
22U/6.3V_8

22U/6.3V_8

L54 10uh_8L54 10uh_8

C583 0.1U/10V_4C583 0.1U/10V_4

If use SB MAC for LAN function.
And support wake up need
connect to relation power.

L45 1uh_6L45 1uh_6

1.5V
80mA

+1.5V_B

3.3V
1mA

+3V

Power consumption reference to
Intel ICH9 Family EDS Rev 1.6

C595

C595

C592

C592

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

SB_V5REF

C596

C596

1U/10V_4

1U/10V_4

+5VPCU_ICH_V5REF_SUS

C640

C640

1U/10V_4

1U/10V_4

1.5V

+1.5V_B

646mA

C395

C395
22U/6.3V_8

22U/6.3V_8

1.5V
47mA

+1.5V_APLL_ICH +3V_VCCSUSHDA

C662

C662
10U/6.3V_8

10U/6.3V_8

C313

C313
1U/10V_4

1U/10V_4

C331

C331
1U/10V_4

1U/10V_4

1.5V
11mA

C315

C315

0.1U/10V_4

0.1U/10V_4

C329

C329

0.1U/10V_4

0.1U/10V_4

VCCLAN1_05_INT_ICH

C585

C585

0.1U/10V_4

0.1U/10V_4

+1.5V_ICH_GLANPLL_R

C597

C597
10U/6.3V_8

10U/6.3V_8

C372

C372

4.7U/6.3V_6

4.7U/6.3V_6

C364

C364

2.2U/6.3V_6

2.2U/6.3V_6

C655

C655
1U/10V_4

1U/10V_4

C600

C600

2.2U/6.3V_6

2.2U/6.3V_6

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

AC16
AD15
AD16
AE15
AF15

AG15

AH15

AC11
AD11
AE11

AF11
AG10
AG11

AH10

AC18

AC19

AC21

AC12

AC13

AC14

A23

AE1

F25
G25
H24
H25

J24

J25
K24
K25

L23

L24

L25
M24
M25
N23
N24
N25
P24
P25
R24
R25
R26
R27
T24
T27
T28
T29
U24
U25
V24
V25
U23

W24
W25

K23
Y24
Y25

AJ19

AJ15

AJ10

AC9

G10

AJ5
AA7

AB6
AB7
AC6
AC7

A10
A11

A12
B12

A27
D28

D29
E26
E27

A26

4

A6

G9

U23F

U23F

VCCRTC
V5REF
V5REF_SUS
VCC1_5_B[01]

VCC1_5_B[02]
VCC1_5_B[03]
VCC1_5_B[04]
VCC1_5_B[05]
VCC1_5_B[06]
VCC1_5_B[07]
VCC1_5_B[08]
VCC1_5_B[09]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL
VCC1_5_A[01]

VCC1_5_A[02]
VCC1_5_A[03]
VCC1_5_A[04]
VCC1_5_A[05]
VCC1_5_A[06]
VCC1_5_A[07]
VCC1_5_A[08]

VCC1_5_A[09]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]
VCC1_5_A[18]

VCC1_5_A[19]
VCC1_5_A[20]
VCC1_5_A[21]

VCC1_5_A[22]
VCC1_5_A[23]

VCC1_5_A[24]
VCC1_5_A[25]

VCCUSBPLL
VCC1_5_A[26]

VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL
VCCGLAN1_5[1]

VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

VCCGLAN3_3

ICH9MREV1.0

ICH9MREV1.0

CORE

CORE

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

VCCP_CORE

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VCCSUS3_3[05]
VCCSUS3_3[06]

VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

GLAN POWER

GLAN POWER

VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL
VCC_DMI[1]

VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[01]
VCC3_3[02]
VCC3_3[07]
VCC3_3[03]

VCC3_3[04]
VCC3_3[05]
VCC3_3[06]

VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4

+3V_HDA_IO_ICH

AJ3
AC8

TP_VCCSUS1_05_ICH_1

F17

TP_VCCSUS1_05_ICH_2

AD8

TP_VCCSUS1_5_ICH_1

F18

VCCSUS1_5_INT_ICH

A18
D16
D17
E22

AF1
T1

T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22

VCCCL1_05_INT_ICH

G23

VCCCL1_5_INT_ICH

A24
B24

If use SB MAC for LAN function. And
support wake up need connect to
relation power.

C358

C358

0.1U/10V_4

0.1U/10V_4

+1.5V_ICH_VCCDMIPLL

C620

C620

0.01U/25V_4

0.01U/25V_4

+1.05V_ICH_DMI

C340

C340

4.7U/6.3V_6

4.7U/6.3V_6

C326

C326

C310

C310

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C411

C411

C317

C317

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

0.1U/10V_4

C343

C343

0.022U/16V_4

0.022U/16V_4

C388

C388
*1U/10V_4

*1U/10V_4

3

C350

C350

0.1U/10V_4

0.1U/10V_4

C373

C373

0.1U/10V_4

0.1U/10V_4

C397

C397

0.1U/10V_4

0.1U/10V_4

1.05V

C612

C612
10U/6.3V_8

10U/6.3V_8

C341

C341

22U/6.3V_8

22U/6.3V_8

C316

C316

0.1U/10V_4

0.1U/10V_4

C383

C383

0.1U/10V_4

0.1U/10V_4

T26T26
T37T37

T25T25

C349

C349

0.022U/16V_4

0.022U/16V_4

C389

C389
*0.1U/10V_4

*0.1U/10V_4

3.3V
S0:19mA
S3/4/5:73mA

1634mA

L46 1uh_6L46 1uh_6

C357

C357

0.1U/10V_4

0.1U/10V_4

+1.05V

1.5V
23mA

500 mA, 20%

L34 NBQ160808T-100Y-NL34 NBQ160808T-100Y-N

5 Ohms @ 100 MHz , 0.7A

+1.05V

3.3V
308mA

VCCSUS1_05 power by VCC1_05 in S0 / VCCSUS3_3 in S3/S4/S5
VCCSUS1_5 power by VCC1_5_A in S0 / VCCSUS3_3 in S3/S4/S5

C352

C352

0.1U/10V_4

0.1U/10V_4

C390

C390

0.1U/10V_4

0.1U/10V_4

+1.5V

1.05V
50mA

+1.05V

1.05V
2mA

C337

C337

4.7U/6.3V_6

4.7U/6.3V_6

+3V

R458 EV@0_6R458 EV@0_6

C656

C656

R457 IV@0_6R457 IV@0_6

0.1U/10V_4

0.1U/10V_4

R459 EV@0_6R459 EV@0_6
R460 IV@12.1K_4R460 IV@12.1K_4

C657

C657

0.1U/10V_4

0.1U/10V_4

R461

R461

IV@10K_6

IV@10K_6

1.5V / 3.3V
S0:11mA
S3/4/5:1mA

5/10 change R8382 value to 12.1K

+3V_S5

3.3V
S0:212mA
S3/4/5:53mA

VCCCL1_05 power by VCC1_05_A in S 0
VCCCL1_5 power by VCC1_5_A in S 0

+3V

2

,PSDFW,&+09&&+'$DQG
9&&686+'$VXSSO\99

6XSSRUW,17+'0,+'$

1.5V / 3.3V

+3V

11mA

+1.5V

NOTE:

+3V_S5

If (G)MCH's HD Audio signals are connected to ICH9M for
iHDMI, VCCHDA and VCCSUSHDA on ICH9M should be
only on 1.5V. These power pins on ICH9M can be supplied
with 3.3V if and only if (G)MCH's HDA is not connected to
ICH9M. Consequently, only 1.5V audio/modem codecs can
be used on the platform.

LQWHUIDFH7KHVHSRZHU
RQO\VXSSRUW9'HYLFH
PXVWWRPHHW

AA26
AA27

AA23
AB28
AB29

AC17
AC26
AC27

AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AE12
AE13
AE14
AE16
AE17

AE20
AE24

AH26

AG13
AG16
AG18
AG20
AG23

AH12
AH14
AH17
AH19

AH22
AH25
AH28

AF13
AF16
AF18
AF22

AF26
AF27

AJ12
AJ14
AJ17

AA3
AA6
AB1

AB4
AB5

AC3
AD1

AD4
AD5
AD6
AD7
AD9

AE2

AE3
AE4
AE6
AE9

AF5
AF7
AF9

AG3
AG6
AG9

AH2

AH5
AH8

B11
B14
B17

B20
B23

C26
C27
E11
E14
E18

E21
E24

G12
G14
G18
G21
G24
G26
G27

H23
H28
H29

AJ8

B2

B5
B8

E2

E5

E8
F16
F28
F29

G8

H2

U23E

U23E

VSS[001]
VSS[002]
VSS[003]
VSS[004]
VSS[005]
VSS[006]
VSS[007]
VSS[008]
VSS[009]
VSS[010]
VSS[011]
VSS[012]
VSS[013]
VSS[014]
VSS[015]
VSS[016]
VSS[017]
VSS[018]
VSS[019]
VSS[020]
VSS[021]
VSS[022]
VSS[023]
VSS[024]
VSS[025]
VSS[026]
VSS[027]
VSS[028]
VSS[029]
VSS[030]
VSS[031]
VSS[032]
VSS[033]
VSS[034]
VSS[035]
VSS[036]
VSS[037]
VSS[038]
VSS[039]
VSS[040]
VSS[041]
VSS[042]
VSS[043]
VSS[044]
VSS[045]
VSS[046]
VSS[047]
VSS[048]
VSS[049]
VSS[050]
VSS[051]
VSS[052]
VSS[053]
VSS[054]
VSS[055]
VSS[056]
VSS[057]
VSS[058]
VSS[059]
VSS[060]
VSS[061]
VSS[062]
VSS[063]
VSS[064]
VSS[065]
VSS[066]
VSS[067]
VSS[068]
VSS[069]
VSS[070]
VSS[071]
VSS[072]
VSS[073]
VSS[074]
VSS[075]
VSS[076]
VSS[077]
VSS[078]
VSS[079]
VSS[080]
VSS[081]
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]

ICH9MREV1.0

ICH9MREV1.0

1

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

15

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

ICH9 POWER

ICH9 POWER

ICH9 POWER

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet of

1

1A

1A

1A

15Monday, July 12, 2010

15Monday, July 12, 2010

15Monday, July 12, 2010

43

of

43

of

43

5

DDR3 (DDR)

STD H=4.0 MM

LTK

FOX

D D

C C

R269 10K/F_4R269 10K/F_4
R268 10K/F_4R268 10K/F_4

B B

M_A_A[14:0]8

TP4TP4

M_A_BS08
M_A_BS18
M_A_BS28
M_CS#06
M_CS#16
M_CLK06
M_CLK#06
M_CLK16
M_CLK#16
M_CKE06
M_CKE16
M_A_CAS#8
M_A_RAS#8
M_A_WE#8

SCL_DDR17
SDA_DDR17

M_ODT06
M_ODT16

M_A_DM[7:0]8

M_A_DQS[7:0]8

M_A_DQS#[7:0]8

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0
DIMM0_SA1
SCL_DDR
SDA_DDR

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

4

CN9A

CN9A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM0

DDR3-DIMM0

QCI P/N

DGMK4000004

DGMK4000117

PC2100 DDR3 SDRAM SO-DIMM

(204P)

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

3

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQ[63:0] 8

PM_EXTTS#06

DDR3_DRAMRST#6,17

+SMDDR_VREF

+1.5V_SUS

+3V

2

+3V

R307

Q15

Q15
RHU002N06

RHU002N06

Q16

Q16
RHU002N06

RHU002N06

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

G1
G2

R307
10K_4

10K_4

1

1

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1
G2

2

CN9B

CN9B

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

VDDSPD
NC1

NC2
NCTEST

EVENT#
RESET#

1

VREF_DQ
VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

DDR3-DIMM0

DDR3-DIMM0

3

3

+3V

2

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

PDAT_SMB2,14,28

PCLK_SMB2,14,28

75
76
81
82
87
88
93
94

99
100
105
106
111
112
117
118
123
124

199

77
122
125

198

30

126

13

14

19

20

25

26

31

32

37

38

43

R306

R306
10K_4

10K_4

SDA_DDR

SCL_DDR

+SMDDR_VTERM

1

16

+1.5V_SUS

C458

C458
10U/6.3V_6

10U/6.3V_6

+SMDDR_VREF

A A

C462

C462

0.1u/10V_4

0.1u/10V_4

Place these Caps near So-Dimm0.

C475

C475
10U/6.3V_6

10U/6.3V_6

C463

C463

2.2U/6.3V_6

2.2U/6.3V_6

5

C459

C459
10U/6.3V_6

10U/6.3V_6

+3V

C455

C455

2.2U/6.3V_6

2.2U/6.3V_6

C460

C460
10U/6.3V_6

10U/6.3V_6

C449

C449
10U/6.3V_6

10U/6.3V_6

+SMDDR_VTERM

C456

C456

0.1u/10V_4

0.1u/10V_4

C536

C536
1U/6.3V_4

1U/6.3V_4

C457

C457
10U/6.3V_6

10U/6.3V_6

4

C552

C552
1U/6.3V_4

1U/6.3V_4

C454

C454
*0.1U/10V_4

*0.1U/10V_4

C533

C533
1U/6.3V_4

1U/6.3V_4

C461

C461

0.1u/10V_4

0.1u/10V_4

C553

C553
1U/6.3V_4

1U/6.3V_4

C477

C477
*0.1U/10V_4

*0.1U/10V_4

C556

C556
*10U/6.3V_6

*10U/6.3V_6

4/29 Modfiy type

C451

C451

C448

C448

+

+

C489

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C489
330U/2V_7343

330U/2V_7343

7/05 Modfiy_del C539.

C555

C555
10U/6.3V_6

10U/6.3V_6

3

5/13 Add

C67

C67
*22U/6.3V_8

*22U/6.3V_8

C464 *470P/50V_4C464 *470P/50V_4

R270 *10K/F_4R270 *10K/F_4

+SMDDR_VREF

R272 *0_6R272 *0_6

R271 *10K/F_4R271 *10K/F_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR3 DIMM-0(H=5.2)

DDR3 DIMM-0(H=5.2)

DDR3 DIMM-0(H=5.2)

Date: Sheet

Date: Sheet of

2

Date: Sheet of

+1.5V_SUS

+SMDDR_VTERM 17,40,42

of

16Monday, July 12, 2010

16Monday, July 12, 2010

16Monday, July 12, 2010

1

1A

1A

1A

43

43

43

5

4

3

2

1

DDR3 (DDR)

STD H=8.0 MM

LTK

FOX

D D

C C

R263 10K/F_4R263 10K/F_4
R262 10K/F_4R262 10K/F_4

+3V

B B

M_B_A[14:0]8

TP3TP3

M_B_BS08
M_B_BS18
M_B_BS28
M_CS#26
M_CS#36
M_CLK26
M_CLK#26
M_CLK36
M_CLK#36
M_CKE26
M_CKE36
M_B_CAS#8
M_B_RAS#8
M_B_WE#8

SCL_DDR16
SDA_DDR16

M_ODT26
M_ODT36

M_B_DM[7:0]8

M_B_DQS[7:0]8

M_B_DQS#[7:0]8

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM1_SA0
DIMM1_SA1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

CN10A

CN10A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

DDR3-DIMM1

DDR3-DIMM1

QCI P/N

DGMK4000097

DGMK4000130

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45

PC2100 DDR3 SDRAM SO-DIMM

(204P)

PC2100 DDR3 SDRAM SO-DIMM

(204P)

DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

17

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQ[63:0] 8

PM_EXTTS#16

DDR3_DRAMRST#6,16

+SMDDR_VREF

+1.5V_SUS

+3V

75
76
81
82
87
88
93
94

99
100
105
106
111
112
117
118
123
124

199

77
122
125

198

30

126

13

14

19

20

25

26

31

32

37

38

43

CN10B

CN10B

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

VDDSPD
NC1

NC2
NCTEST

EVENT#
RESET#

1

VREF_DQ
VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

DDR3-DIMM1

DDR3-DIMM1

(204P)

(204P)

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1

G1

G2

G2

+SMDDR_VTERM

+1.5V_SUS

C483

C483
10U/6.3V_6

10U/6.3V_6

A A

+SMDDR_VREF

C485

C485

0.1u/10V_4

0.1u/10V_4

5

Place these Caps near So-Dimm1.

C488

C488

C476

C476

C478

C478

C482

10U/6.3V_6

10U/6.3V_6

C484

C484

2.2U/6.3V_6

2.2U/6.3V_6

10U/6.3V_6

10U/6.3V_6

+3V

C453

C453

2.2U/6.3V_6

2.2U/6.3V_6

10U/6.3V_6

10U/6.3V_6

C482
10U/6.3V_6

10U/6.3V_6

C452

C452

0.1u/10V_4

0.1u/10V_4

C481

C481
10U/6.3V_6

10U/6.3V_6

+SMDDR_VTERM

C543

C543
1U/6.3V_4

1U/6.3V_4

4

C486

C486
*0.1U/10V_4

*0.1U/10V_4

C547

C547
1U/6.3V_4

1U/6.3V_4

C473

C473

0.1u/10V_4

0.1u/10V_4

C540

C540
1U/6.3V_4

1U/6.3V_4

C487

C487
*0.1U/10V_4

*0.1U/10V_4

C537

C537
1U/6.3V_4

1U/6.3V_4

5/6 Modfiy

C479

C479

C474

C474

+

+

C490

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

0.1u/10V_4

C490
330U/2V_7343

330U/2V_7343

7/05 Modfiy_del C538.

C535

C535
*10U/6.3V_6

*10U/6.3V_6

3

C534

C534
10U/6.3V_6

10U/6.3V_6

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR3 DIMM-1(H=9.2)

DDR3 DIMM-1(H=9.2)

DDR3 DIMM-1(H=9.2)

Date: Sheet

Date: Sheet of

2

Date: Sheet of

1

1A

1A

1A

of

43

17Monday, July 12, 2010

43

17Monday, July 12, 2010

43

17Monday, July 12, 2010

5

GPU_1(VGA)

0518 SWAP PCIE for VGA side 0518 SWAP PCIE for VGA side

5/18 add

1 2

PEG_TXP07,26

D D

C C

B B

PEG_TXN07,26

PEG_TXP17,26

PEG_TXN17,26

PEG_TXP27,26

PEG_TXN27,26

PEG_TXP37,26

PEG_TXN37,26

RN29 EV@0_4P2RRN29 EV@0_4P2R

RN30 EV@0_4P2RRN30 EV@0_4P2R

RN31 EV@0_4P2RRN31 EV@0_4P2R

RN32 EV@0_4P2RRN32 EV@0_4P2R

PEG_TXP47

PEG_TXN47

PEG_TXP57

PEG_TXN57

PEG_TXP107
PEG_TXN107

PEG_TXP117
PEG_TXN117

PEG_TXP127
PEG_TXN127

PEG_TXP137
PEG_TXN137

PEG_TXP147
PEG_TXN147

PEG_TXP157
PEG_TXN157

PEG_TXP67
PEG_TXN67

PEG_TXP77
PEG_TXN77

PEG_TXP87
PEG_TXN87

PEG_TXP97
PEG_TXN97

1 2

1 2

1 2

43

43

43

43

PEG_TXP4
PEG_TXN4

PEG_TXP5
PEG_TXN5

PEG_TXP6
PEG_TXN6

PEG_TXP7
PEG_TXN7

PEG_TXP8
PEG_TXN8

PEG_TXP9
PEG_TXN9

PEG_TXP10
PEG_TXN10

PEG_TXP11
PEG_TXN11

PEG_TXP12
PEG_TXN12

PEG_TXP13
PEG_TXN13

PEG_TXP14
PEG_TXN14

PEG_TXP15
PEG_TXN15

PEG_TXP0_R
PEG_TXN0_R

PEG_TXP1_R
PEG_TXN1_R

PEG_TXP2_R
PEG_TXN2_R

PEG_TXP3_R
PEG_TXN3_R

AA38

Y35

W36

W38

V37

V35

U36

U38

T37

T35

R36

R38

P37

P35

N36

N38
M37

M35

L36

L38
K37

K35

H37

H35
G36

G38

F37

F35
E37

4

Y37

J36

J38

U28A

U28A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

3

Modfiy it 5/4 Reversal PICE

Y33

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCIE_TX4P

PCI EXPRESS INTERFACE

PCI EXPRESS INTERFACE

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Y32

W33
W32

U33
U32

U30
U29

T33
T32

T30
T29

P33
P32

P30
P29

N33
N32

N30
N29

L33
L32

L30
L29

K33
K32

J33
J32

K30
K29

H33
H32

CPEG_RXP0
CPEG_RXN0

CPEG_RXP1
CPEG_RXN1

CPEG_RXP2
CPEG_RXN2

CPEG_RXP3
CPEG_RXN3

CPEG_RXP4
CPEG_RXN4

CPEG_RXP5
CPEG_RXN5

CPEG_RXP6
CPEG_RXN6

CPEG_RXP7
CPEG_RXN7

CPEG_RXP8
CPEG_RXN8

CPEG_RXP9
CPEG_RXN9

CPEG_RXP10
CPEG_RXN10

CPEG_RXP11
CPEG_RXN11

CPEG_RXP12
CPEG_RXN12

CPEG_RXP13
CPEG_RXN13

CPEG_RXP14
CPEG_RXN14

CPEG_RXP15
CPEG_RXN15

C217 EV@0.1u/10V_4C217 EV@0.1u/10V_4
C226 EV@0.1u/10V_4C226 EV@0.1u/10V_4

C199 EV@0.1u/10V_4C199 EV@0.1u/10V_4
C209 EV@0.1u/10V_4C209 EV@0.1u/10V_4

C187 EV@0.1u/10V_4C187 EV@0.1u/10V_4
C197 EV@0.1u/10V_4C197 EV@0.1u/10V_4

C184 EV@0.1u/10V_4C184 EV@0.1u/10V_4
C179 EV@0.1u/10V_4C179 EV@0.1u/10V_4

C168 EV@0.1u/10V_4C168 EV@0.1u/10V_4
C163 EV@0.1u/10V_4C163 EV@0.1u/10V_4

C159 EV@0.1u/10V_4C159 EV@0.1u/10V_4
C150 EV@0.1u/10V_4C150 EV@0.1u/10V_4

C148 EV@0.1u/10V_4C148 EV@0.1u/10V_4
C141 EV@0.1u/10V_4C141 EV@0.1u/10V_4

C135 EV@0.1u/10V_4C135 EV@0.1u/10V_4
C126 EV@0.1u/10V_4C126 EV@0.1u/10V_4

C123 EV@0.1u/10V_4C123 EV@0.1u/10V_4
C114 EV@0.1u/10V_4C114 EV@0.1u/10V_4

C112 EV@0.1u/10V_4C112 EV@0.1u/10V_4
C109 EV@0.1u/10V_4C109 EV@0.1u/10V_4

C103 EV@0.1u/10V_4C103 EV@0.1u/10V_4
C99 EV@0.1u/10V_4C99 EV@0.1u/10V_4

C97 EV@0.1u/10V_4C97 EV@0.1u/10V_4
C89 EV@0.1u/10V_4C89 EV@0.1u/10V_4

C80 EV@0.1u/10V_4C80 EV@0.1u/10V_4
C83 EV@0.1u/10V_4C83 EV@0.1u/10V_4

C72 EV@0.1u/10V_4C72 EV@0.1u/10V_4
C79 EV@0.1u/10V_4C79 EV@0.1u/10V_4

C62 EV@0.1u/10V_4C62 EV@0.1u/10V_4
C61 EV@0.1u/10V_4C61 EV@0.1u/10V_4

C71 EV@0.1u/10V_4C71 EV@0.1u/10V_4
C66 EV@0.1u/10V_4C66 EV@0.1u/10V_4

PEG_RXP0 7

PEG_RXN0 7

PEG_RXP1 7

PEG_RXN1 7

PEG_RXP2 7

PEG_RXN2 7

PEG_RXP3 7,26

PEG_RXN3 7

PEG_RXP4 7

PEG_RXN4 7

PEG_RXP5 7

PEG_RXN5 7

PEG_RXP6 7

PEG_RXN6 7

PEG_RXP7 7

PEG_RXN7 7

PEG_RXP8 7

PEG_RXN8 7

PEG_RXP9 7

PEG_RXN9 7

PEG_RXP10 7

PEG_RXN10 7

PEG_RXP11 7

PEG_RXN11 7

PEG_RXP12 7

PEG_RXN12 7

PEG_RXP13 7

PEG_RXN13 7

PEG_RXP14 7

PEG_RXN14 7

PEG_RXP15 7

PEG_RXN15 7

2

PEG_TXP[0..15]7,26
PEG_TXN[0..15]7,26

PEG_RXP[0..15]7,26
PEG_RXN[0..15]7

PEG_TXP[0..15]
PEG_TXN[0..15]

PEG_RXP[0..15]
PEG_RXN[0..15]

1

18

Quanta P/NItem

Park

AJ077400T08

Robson AJ007740T02

CLOCK

CLOCK

CLK_PCIE_VGA2

CLK_PCIE_VGA#2

For Broadway, Madison and Park

A A

the PWRGOOD ball must be conneccted to ground

R112 EV@10K_4R112 EV@10K_4

T19T19

5

GPU_RST#

AB35

PCIE_REFCLKP

AA36

PCIE_REFCLKN

AJ21

NC#1

AK21

NC#2

AH16

PWRGOOD

AA30

PERSTB

EV@Madison/Park_M2

EV@Madison/Park_M2

4

CALIBRATION

CALIBRATION

PCIE_CALRP
PCIE_CALRN

Y30

R91 EV@1.27K/F_4R91 EV@1.27K/F_4

Y29

R90 EV@2K/F_4R90 EV@2K/F_4

+1V

+1.0V

For M97, Broadway, Madison and Park PCIE_VDDC is 1.0V

3

2

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Madison/Park M2-PCIE I/F

Madison/Park M2-PCIE I/F

Madison/Park M2-PCIE I/F

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

1

ZQ5

ZQ5

ZQ5

18 45Monday, July 12, 2010

18 45Monday, July 12, 2010

18 45Monday, July 12, 2010

of

of

of

1A

1A

1A

5

GPU_2(VGA)

D D

GPU Power-on sequence

1 => +3V_D
2 => +VGPU_CORE
3 => +1V
4 => +1.5V_GPU
5 => +1.8V_GPU
6 => dGPU_PWROK

C C

3.3V GPIO

PEG_CLKREQ#2

B B

27M_NONSS2

+1.8V_GPU

+1V

A A

+1.8V_GPU

EV@SBY100505T-121Y-N/300mA/120ohm_4L26 EV@SBY100505T-121Y-N/300mA/120ohm_4L26

EV@SBY100505T-121Y-N/300mA/120ohm_4L21 EV@SBY100505T-121Y-N/300mA/120ohm_4L21

EV@SBY100505T-121Y-N/300mA/120ohm_4L16 EV@SBY100505T-121Y-N/300mA/120ohm_4L16

5

C294

C294
EV@10u/6.3V_6

EV@10u/6.3V_6

C267

C267
EV@10u/6.3V_6

EV@10u/6.3V_6

C261

C261
EV@10u/6.3V_6

EV@10u/6.3V_6

R488 *EV@0_4R488 *EV@0_4 R144
R487 *EV@0_4R487 *EV@0_4

5/6 Modify

+1.8V(75mA)

C286

C286
EV@1u/6.3V_4

EV@1u/6.3V_4

+1.0V(125mA)

C258

C258
EV@1u/6.3V_4

EV@1u/6.3V_4

+1.8V(5mA)

C243

C243
EV@0.1u/10V_4

EV@0.1u/10V_4

+3V_D

R154

R154
*EV@10K/F_4

*EV@10K/F_4

R153

R153
*EV@10K/F_4

*EV@10K/F_4

DPLL_PVDD

C295

C295
EV@0.1u/10V_4

EV@0.1u/10V_4

DPLL_VDDC

C253

C253
EV@0.1u/10V_4

EV@0.1u/10V_4

1.8V GPIO

+3V_D

XTALI_27M
27M_CLK

TS_VDD

R155

R155
*EV@10K_4

*EV@10K_4

R151

R151
EV@10K_4

EV@10K_4

GPIO3_SMBDAT23
GPIO4_SMBCLK23

EV_LVDS_BLON25

SOUT_GPIO823
SIN_GPIO923
SCLK_GPIO1023

SCS#_GPIO2223

HDMI_HP_EV26

4

GPU_GPIO023
GPU_GPIO123
GPU_GPIO223

1/21 ramp remove IO_VID0

GPU_GPIO1123
GPU_GPIO1223
GPU_GPIO1323

GPU_VID141

ALT#_GPIO1723

GPU_VID241

+3V_D
+3V_D

C688 EV@27p/50V_4C688 EV@27p/50V_4

21

C689 EV@27p/50V_4C689 EV@27p/50V_4

4

NC on Park

RAM_STRAP023
RAM_STRAP123
RAM_STRAP223

NC on Park

+3V_D

R115

R115
EV@10K_4

EV@10K_4

R132 *EV@10K_4R132 *EV@10K_4
R133 *EV@10K_4R133 *EV@10K_4

27M_CLK

R126 *EV@10K_4R126 *EV@10K_4

D3D

+1.8V_GPU

R144
EV@499/F_4

EV@499/F_4

R135

R135
EV@249/F_4

EV@249/F_4

R499

R499

Y4

EV@1M/F_4

EV@1M/F_4

EV@27MHZY4EV@27MHZ

GPU_D+23
GPU_D-23

T11T11

T144T144

R118

R118
EV@10K_4

EV@10K_4

T13T13

T20T20
T15T15
T146T146

T10T10

GPIO24_TRSTB

T18T18

T17T17

VREFG

C256

C256
EV@0.1u/10V_4

EV@0.1u/10V_4

DPLL_PVDD

DPLL_VDDC

XTALI_27M
XTALO_27M

TS_VDD

U28B

U28B

AR8

DVPCNTL_MVP_0

AU8

DVPCNTL_MVP_1

AP8

DVPCNTL_0

AW8

DVPCNTL_1

AR3

DVPCNTL_2

AR1

DVPCLK

AU1

DVPDATA_0

AU3

DVPDATA_1

AW3

DVPDATA_2

AP6

DVPDATA_3

AW5

DVPDATA_4

AU5

DVPDATA_5

AR6

DVPDATA_6

AW6

DVPDATA_7

AU6

DVPDATA_8

AT7

DVPDATA_9

AV7

DVPDATA_10

AN7

DVPDATA_11

AV9

DVPDATA_12

AT9

DVPDATA_13

AR10

DVPDATA_14

AW10

DVPDATA_15

AU10

DVPDATA_16

AP10

DVPDATA_17

AV11

DVPDATA_18

AT11

DVPDATA_19

AR12

DVPDATA_20

AW12

DVPDATA_21

AU12

DVPDATA_22

AP12

DVPDATA_23

AK26

SCL

AJ26

SDA

GENERAL PURPOSE I/O

GENERAL PURPOSE I/O

AH20

GPIO_0

AH18

GPIO_1

AN16

GPIO_2

AH23

GPIO_3_SMBDATA

AJ23

GPIO_4_SMBCLK

AH17

GPIO_5_AC_BATT

AJ17

GPIO_6

AK17

GPIO_7_BLON

AJ13

GPIO_8_ROMSO

AH15

GPIO_9_ROMSI

AJ16

GPIO_10_ROMSCK

AK16

GPIO_11

AL16

GPIO_12

AM16

GPIO_13

AM14

GPIO_14_HPD2

AM13

GPIO_15_PWRCNTL_0

AK14

GPIO_16_SSIN

AG30

GPIO_17_THERMAL_INT

AN14

GPIO_18_HPD3

AM17

GPIO_19_CTF

AL13

GPIO_20_PWRCNTL_1

AJ14

GPIO_21_BB_EN

AK13

GPIO_22_ROMCSB

AN13

GPIO_23_CLKREQB

AM23

JTAG_TRSTB

AN23

JTAG_TDI

AK23

JTAG_TCK

AL24

JTAG_TMS

AM24

JTAG_TDO

AJ19

GENERICA

AK19

GENERICB

AJ20

GENERICC

AK20

GENERICD

AJ24

GENERICE_HPD4

AH26

GENERICF

AH24

GENERICG

AK24

HPD1

AH13

VREFG

AM32

DPLL_PVDD

AN32

DPLL_PVSS

AN31

DPLL_VDDC

AV33

XTALIN

AU34

XTALOUT

AF29

DPLUS

AG29

DMINUS

AK32

TS_FDO

AJ32

TSVDD

AJ33

TSVSS

EV@Madison/Park_M2

EV@Madison/Park_M2

MUTI GFX

MUTI GFX

I2C

I2C

PLL/CLOCK

PLL/CLOCK

THERMAL

THERMAL

3

TXCAP_DPA3P
TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

DPA

DPA

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P
TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

DPB

DPB

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

TXCCP_DPC3P

TXCCM_DPC3N

TX0P_DPC2P

TX0M_DPC2N

DPC

DPC

TX1P_DPC1P

TX1M_DPC1N

TX2P_DPC0P

TX2M_DPC0N

TXCDP_DPD3P

TXCDM_DPD3N

TX3P_DPD2P

TX3M_DPD2N

DPD

DPD

TX4P_DPD1P

TX4M_DPD1N

TX5P_DPD0P

TX5M_DPD0N

DAC1

DAC1

DAC2

DAC2

DDC/AUX

DDC/AUX

DDC1CLK

DDC1DATA

DDC2CLK

DDC2DATA

DDCCLK_AUX3P

DDCDATA_AUX3N

DDCCLK_AUX4P

DDCDATA_AUX4N

DDCCLK_AUX5P

DDCDATA_AUX5N

DDC6CLK

DDC6DATA

NC_DDCCLK_AUX7P

NC_DDCDATA_AUX7N

3

HSYNC
VSYNC

RSET
AVDD

AVSSQ
VDD1DI

VSS1DI

COMP

H2SYNC
V2SYNC

VDD2DI
VSS2DI

A2VDD
A2VDDQ
A2VSSQ

R2SET

AUX1P

AUX1N

AUX2P

AUX2N

R

RB

G

GB

B

BB

R2

R2B

G2

G2B

B2

B2B

C

Y

AU24

HDMICLK+_C

AV23

HDMICLK-_C

AT25

HDMITX0P_C

AR24

HDMITX0N_C

AU26

HDMITX1P_C

AV25

HDMITX1N_C

AT27

HDMITX2P_C

AR26

HDMITX2N_C

AR30
AT29

AV31
AU30

AR32
AT31

AT33
AU32

AU14
AV13

AT15
AR14

AU16
AV15

AT17
AR16

AU20
AT19

AT21
AR20

AU22
AV21

AT23
AR22

AD39
AD37

AE36
AD35

AF37
AE38

AC36
AC38

AB34

R95 EV@499/F_4R95 EV@499/F_4

AD34

AVDD

AE34
AC33

VDD1DI

AC34

AC30
AC31

R101 EV@0_4R101 EV@0_4

AD30
AD31

R97 EV@0_4R97 EV@0_4

AF30
AF31

R107 EV@0_4R107 EV@0_4

AC32
AD32
AF32

AD29
AC29

AG31

VDD1DI

AG32

R119 EV@0_4R119 EV@0_4

AG33

A2VDD

AD33

A2VDDQ

AF33

AA29

R103 EV@715/F_4R103 EV@715/F_4

AM26
AN26

AM27
AL27

AM19
AL19

AN20
AM20

AL30
AM30

AL29
AM29

AN21
AM21

AJ30
AJ31

AK30
AK29

C692 EV@.1u/10V_4C692 EV@.1u/10V_4
C691 EV@.1u/10V_4C691 EV@.1u/10V_4

C677 EV@.1u/10V_4C677 EV@.1u/10V_4
C676 EV@.1u/10V_4C676 EV@.1u/10V_4

C694 EV@.1u/10V_4C694 EV@.1u/10V_4
C693 EV@.1u/10V_4C693 EV@.1u/10V_4

C679 EV@.1u/10V_4C679 EV@.1u/10V_4
C678 EV@.1u/10V_4C678 EV@.1u/10V_4

5/5 Add

T139T139
T135T135

T136T136
T140T140

T138T138
T134T134

T141T141
T145T145

EXT_CRT_RED

EXT_CRT_GRN

EXT_CRT_BLU

5/5 Modify

SP@

SP@

T14T14
T16T16

HDMICLK+ 26
HDMICLK- 26

HDMITX0P 26
HDMITX0N 26

HDMITX1P 26
HDMITX1N 26

HDMITX2P 26
HDMITX2N 26

Channel D N.C for Park-M2

R505

EV_HSYNC 23,25
EV_VSYNC 23,25

R505
EV@150/F_4

EV@150/F_4

5/17 modify

DAC2 will be NC on future ASIC

H2SYNC 23
V2SYNC 23

SP@

(3. 3V@ 1 30mA A2VDD)

R517 EV@0_4R517 EV@0_4

C225

C225
EV@0.1u/10V_4

EV@0.1u/10V_4

Seymour no stuff
5/7

MXM_DDCCK_C 26
MXM_DDCDAT_C 26

EV_LVDS_DDCCLK 25
EV_LVDS_DDCDAT 25

EV_CRTDCLK 25
EV_CRTDDAT 25

HDMI

DDC AUX4 NC for Park_M2

LVDS

CRT

DDC AUX7 NC for Park_M2

2

U28G

U28G

EV@Madison/Park_M2

EV@Madison/Park_M2

R507

R507
EV@150/F_4

EV@150/F_4

+3V_D

2

LVDS CONTROL

LVDS CONTROL

LVTMDP

LVTMDP

ramp remove short pad

R509

R509
EV@150/F_4

EV@150/F_4

VARY_BL

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

TXOUT_U3P
TXOUT_U3N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P

TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P

TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P

TXOUT_L2N_DPE0N

TXOUT_L3P
TXOUT_L3N

SP@

A2VDDQ

AK27
AJ27

DIGON

AK35
AL36

AJ38
AK37

AH35
AJ36

AG38
AH37

AF35
AG36

AP34
AR34

AW37
AU35

AR37
AU39

AP35
AR35

AN36
AP37

EV_CRT_RED 25

EV_CRT_GRN 25

EV_CRT_BLU 25

(1. 8V@70mA AVDD)

AVDD

C249

C249
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@100mA VDD1DI)

VDD1DI

C235

C235
EV@0.1u/10V_4

EV@0.1u/10V_4

5/5 add for CRT issue

C251

C251

*EV@10U/6.3V_8

*EV@10U/6.3V_8

Seymour no stuff

(1. 8V@2mA A2VDDQ )

5/7

C710

C710
EV@0.1u/10V_4

EV@0.1u/10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

EV_LVDS_BRIGHT 25
EV_LVDS_VDDEN 25

C-test

EV_TXLCLKOUT+ 25
EV_TXLCLKOUT- 25

EV_TXLOUT0+ 25
EV_TXLOUT0- 25

EV_TXLOUT1+ 25
EV_TXLOUT1- 25

EV_TXLOUT2+ 25
EV_TXLOUT2- 25

5/6 modify

EV_LVDS_VDDEN
EV_LVDS_BRIGHT
EV_LVDS_BLON

EV@SBY100505T-121Y-N/300mA/120ohm_4L20 EV@SBY100505T-121Y-N/300mA/120ohm_4L20

C260

C260

C259

C259

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L15 EV@SBY100505T-121Y-N/300mA/120ohm_4L15

C241

C241

C247

C247

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

C242

C242

*EV@10U/6.3V_8

*EV@10U/6.3V_8

+1.8V_GPU

EV@SBY100505T-121Y-N/300mA/120ohm_4L59 EV@SBY100505T-121Y-N/300mA/120ohm_4L59

C711

C711
EV@1u/6.3V_4

EV@1u/6.3V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

Madison/Park M2-HOST I/ F

Madison/Park M2-HOST I/ F

Madison/Park M2-HOST I/ F

1

R150 EV@10K_4R150 EV@10K_4
R158 *EV@10K_4R158 *EV@10K_4
R160 EV@10K_4R160 EV@10K_4

+1.8V_GPU

SP@

Seymour no stuff
5/7

ZQ5

ZQ5

ZQ5

1

19

19 45Monday, July 12, 2010

19 45Monday, July 12, 2010

19 45Monday, July 12, 2010

1A

1A

1A

GPU_3(VGA)

5

4

3

2

Park M2-channel B used(S3 package use Channel A)

1

20

+1.5V_GPU

R102

R102
EV@40.2/F_4

EV@40.2/F_4

R96

R96
EV@100/F_4

EV@100/F_4

+1.5V_GPU

R106

R106
EV@40.2/F_4

EV@40.2/F_4

R104

R104
EV@100/F_4

EV@100/F_4

VMB_DQ[63..0]
VMB_DM[7..0]
VMB_RDQS[7..0]
VMB_WDQS[7..0]

VMB_MA[13..0]

VMB_BA0
VMB_BA1
VMB_BA2

C198

C198
EV@0.1u/10V_4

EV@0.1u/10V_4

C223

C223
EV@0.1u/10V_4

EV@0.1u/10V_4

D3D

+3V_D

VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63

MVREFDB
MVREFSB

R120 *EV@10K_4R120 *EV@10K_4
R100 EV@10K_4R100 EV@10K_4

R114

R114
*EV@0_4

*EV@0_4

R124

R124
*EV@0_4

*EV@0_4

U28D

U28D

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

DDR3

C5

DQB0_0/DQB_0

C3

DQB0_1/DQB_1

E3

DQB0_2/DQB_2

E1

DQB0_3/DQB_3

F1

DQB0_4/DQB_4

F3

DQB0_5/DQB_5

F5

DQB0_6/DQB_6

G4

DQB0_7/DQB_7

H5

DQB0_8/DQB_8

H6

DQB0_9/DQB_9

J4

DQB0_10/DQB_10

K6

DQB0_11/DQB_11

K5

DQB0_12/DQB_12

L4

DQB0_13/DQB_13

M6

DQB0_14/DQB_14

M1

DQB0_15/DQB_15

M3

DQB0_16/DQB_16

M5

DQB0_17/DQB_17

N4

DQB0_18/DQB_18

P6

DQB0_19/DQB_19

P5

DQB0_20/DQB_20

R4

DQB0_21/DQB_21

T6

DQB0_22/DQB_22

T1

DQB0_23/DQB_23

U4

DQB0_24/DQB_24

V6

DQB0_25/DQB_25

V1

DQB0_26/DQB_26

V3

DQB0_27/DQB_27

Y6

DQB0_28/DQB_28

Y1

DQB0_29/DQB_29

Y3

DQB0_30/DQB_30

Y5

DQB0_31/DQB_31

AA4

DQB1_0/DQB_32

AB6

DQB1_1/DQB_33

AB1

DQB1_2/DQB_34

AB3

DQB1_3/DQB_35

AD6

DQB1_4/DQB_36

AD1

DQB1_5/DQB_37

AD3

DQB1_6/DQB_38

AD5

DQB1_7/DQB_39

AF1

DQB1_8/DQB_40

AF3

DQB1_9/DQB_41

AF6

DQB1_10/DQB_42

AG4

DQB1_11/DQB_43

AH5

DQB1_12/DQB_44

AH6

DQB1_13/DQB_45

AJ4

DQB1_14/DQB_46

AK3

DQB1_15/DQB_47

AF8

DQB1_16/DQB_48

AF9

DQB1_17/DQB_49

AG8

DQB1_18/DQB_50

AG7

DQB1_19/DQB_51

AK9

DQB1_20/DQB_52

AL7

DQB1_21/DQB_53

AM8

DQB1_22/DQB_54

AM7

DQB1_23/DQB_55

AK1

DQB1_24/DQB_56

AL4

DQB1_25/DQB_57

AM6

DQB1_26/DQB_58

AM1

DQB1_27/DQB_59

AN4

DQB1_28/DQB_60

AP3

DQB1_29/DQB_61

AP1

DQB1_30/DQB_62

AP5

DQB1_31/DQB_63

Y12

MVREFDB

AA12

MVREFSB

AD28

TESTEN

AK10

CLKTESTA

AL10

CLKTESTB

EV@Madison/Park_M2

EV@Madison/Park_M2

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8

MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12

WCKB0_0/DQMB_0

WCKB0B_0/DQMB_1

WCKB0_1/DQMB_2

WCKB0B_1/DQMB_3

WCKB1_0/DQMB_4

WCKB1B_0/DQMB_5

WCKB1_1/DQMB_6

WCKB1B_1/DQMB_7

MEMORY INTERFACE B

MEMORY INTERFACE B

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/W DQSB_0
DDBIB0_1/QSB_1B/W DQSB_1
DDBIB0_2/QSB_2B/W DQSB_2
DDBIB0_3/QSB_3B/W DQSB_3
DDBIB1_0/QSB_4B/W DQSB_4
DDBIB1_1/QSB_5B/W DQSB_5
DDBIB1_2/QSB_6B/W DQSB_6
DDBIB1_3/QSB_7B/W DQSB_7

MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

ADBIB0/ODTB0
ADBIB1/ODTB1

CLKB0

CLKB0B

CLKB1

CLKB1B
RASB0B

RASB1B
CASB0B

CASB1B

CSB0B_0
CSB0B_1

CSB1B_0
CSB1B_1

CKEB0
CKEB1

WEB0B
WEB1B

MAB0_8
MAB1_8

GDDR5

GDDR5

DRAM_RST

P8

VMB_MA0

T9

VMB_MA1

P9

VMB_MA2

N7

VMB_MA3

N8

VMB_MA4

N9

VMB_MA5

U9

VMB_MA6

U8

VMB_MA7

Y9

VMB_MA8

W9

VMB_MA9

AC8

VMB_MA10

AC9

VMB_MA11

AA7

VMB_MA12

AA8

VMB_BA2

Y8

VMB_BA0

AA9

VMB_BA1

H3

VMB_DM0

H1

VMB_DM1

T3

VMB_DM2

T5

VMB_DM3

AE4

VMB_DM4

AF5

VMB_DM5

AK6

VMB_DM6

AK5

VMB_DM7

F6

VMB_RDQS0

K3

VMB_RDQS1

P3

VMB_RDQS2

V5

VMB_RDQS3

AB5

VMB_RDQS4

AH1

VMB_RDQS5

AJ9

VMB_RDQS6

AM5

VMB_RDQS7

G7

VMB_WDQS0

K1

VMB_WDQS1

P1

VMB_WDQS2

W4

VMB_WDQS3

AC4

VMB_WDQS4

AH3

VMB_WDQS5

AJ8

VMB_WDQS6

AM3

VMB_WDQS7

T7
W7

L9

VMB_CLKP0

L8

VMB_CLKN0

AD8

VMB_CLKP1

AD7

VMB_CLKN1

T10

VMB_RAS0#

Y10

VMB_RAS1#

W10

VMB_CAS0#

AA10

VMB_CAS1#

P10

VMB_CS0#

L10
AD10

VMB_CS1#

AC10
U10

VMB_CKE0

AA11

VMB_CKE1

N10

VMB_WE0#

AB11

VMB_WE1#

T8

VMB_MA13

W8
AH11

Place all these components very close to GPU (Within
25mm) and keep all component close to each Other (within
5mm)

QSB[7..0]

QSB#[7..0]

VMB_ODT0 24
VMB_ODT1 24

VMB_CLKP0 24
VMB_CLKN0 24

VMB_CLKP1 24
VMB_CLKN1 24

VMB_RAS0# 24
VMB_RAS1# 24

VMB_CAS0# 24
VMB_CAS1# 24

VMB_CS0# 24

VMB_CS1# 24

VMB_CKE0 24
VMB_CKE1 24

VMB_WE0# 24
VMB_WE1# 24

R148 EV@10/F_4R148 EV@10/F_4

R140

R140
EV@4.99K/F_4

EV@4.99K/F_4

R149 EV@51_4R149 EV@51_4

C282

C282
EV@120p/50V_4

EV@120p/50V_4

MEM_RST# 24

VMB_DQ[63..0]24

U28C

U28C

DDR2

DDR2
GDDR3/GDDR5

GDDR3/GDDR5
DDR3

DDR3

C37

DQA0_0/DQA_0

MVREFDA
MVREFSA

C35

DQA0_1/DQA_1

A35

DQA0_2/DQA_2

E34

DQA0_3/DQA_3

G32

DQA0_4/DQA_4

D33

DQA0_5/DQA_5

F32

DQA0_6/DQA_6

E32

DQA0_7/DQA_7

D31

DQA0_8/DQA_8

F30

DQA0_9/DQA_9

C30

DQA0_10/DQA_10

A30

DQA0_11/DQA_11

F28

DQA0_12/DQA_12

C28

DQA0_13/DQA_13

A28

DQA0_14/DQA_14

E28

DQA0_15/DQA_15

D27

DQA0_16/DQA_16

F26

DQA0_17/DQA_17

C26

DQA0_18/DQA_18

A26

DQA0_19/DQA_19

F24

DQA0_20/DQA_20

C24

DQA0_21/DQA_21

A24

DQA0_22/DQA_22

E24

DQA0_23/DQA_23

C22

DQA0_24/DQA_24

A22

DQA0_25/DQA_25

F22

DQA0_26/DQA_26

D21

DQA0_27/DQA_27

A20

DQA0_28/DQA_28

F20

DQA0_29/DQA_29

D19

DQA0_30/DQA_30

E18

DQA0_31/DQA_31

C18

DQA1_0/DQA_32

A18

DQA1_1/DQA_33

F18

DQA1_2/DQA_34

D17

DQA1_3/DQA_35

A16

DQA1_4/DQA_36

F16

DQA1_5/DQA_37

D15

DQA1_6/DQA_38

E14

DQA1_7/DQA_39

F14

DQA1_8/DQA_40

D13

DQA1_9/DQA_41

F12

DQA1_10/DQA_42

A12

DQA1_11/DQA_43

D11

DQA1_12/DQA_44

F10

DQA1_13/DQA_45

A10

DQA1_14/DQA_46

C10

DQA1_15/DQA_47

G13

DQA1_16/DQA_48

H13

DQA1_17/DQA_49

J13

DQA1_18/DQA_50

H11

DQA1_19/DQA_51

G10

DQA1_20/DQA_52

G8

DQA1_21/DQA_53

K9

DQA1_22/DQA_54

K10

DQA1_23/DQA_55

G9

DQA1_24/DQA_56

A8

DQA1_25/DQA_57

C8

DQA1_26/DQA_58

E8

DQA1_27/DQA_59

A6

DQA1_28/DQA_60

C6

DQA1_29/DQA_61

E6

DQA1_30/DQA_62

A5

DQA1_31/DQA_63

L18

MVREFDA

L20

MVREFSA

L27

MEM_CALRN0

N12

MEM_CALRN1

AG12

MEM_CALRN2

M12

MEM_CALR P1

M27

MEM_CALR P0

AH12

MEM_CALR P2

AL31

RSVD

EV@Madison/Park_M2

EV@Madison/Park_M2

D D

+1.5V_GPU

R58

R58
EV@40.2/F_4

EV@40.2/F_4

C C

R59

R59
EV@100/F_4

EV@100/F_4

+1.5V_GPU

R62

R62
EV@40.2/F_4

EV@40.2/F_4

R60

R60
EV@100/F_4

EV@100/F_4

Used for Park-M2

B B

Used for Madison-M2

MVREFDA

C84

C84
EV@0.1u/10V_4

EV@0.1u/10V_4

MVREFSA

C88

C88
EV@0.1u/10V_4

EV@0.1u/10V_4

+1.5V_GPU

R68 *EV@MD@243/F_4R68 *EV@MD@243/F_4
R70 EV@PK@243/F_4R70 EV@PK@243/F_4
R110 *EV@MD@243/F_4R110 *EV@MD@243/F_4
R64 EV@PK@243/F_4R64 EV@PK@243/F_4
R69 *EV@MD@243/F_4R69 *EV@MD@243/F_4

R111 *EV@MD@243/F_4R111 *EV@MD@243/F_4

Note by AN_M96_C1

DDR2

DDR2
GDDR5/GDDR3

GDDR5/GDDR3
DDR3

DDR3

G24

MAA0_0/MAA_0

J23

MAA0_1/MAA_1

H24

MAA0_2/MAA_2

J24

MAA0_3/MAA_3

H26

MAA0_4/MAA_4

J26

MAA0_5/MAA_5

H21

MAA0_6/MAA_6

G21

MAA0_7/MAA_7

H19

MAA1_0/MAA_8

H20

MAA1_1/MAA_9

ADBIA0/ODTA0
ADBIA1/ODTA1

CLKA0

CLKA0B

CLKA1

CLKA1B
RASA0B

RASA1B
CASA0B

CASA1B

CSA0B_0
CSA0B_1

CSA1B_0
CSA1B_1

CKEA0
CKEA1

WEA0B
WEA1B

MAA0_8
MAA1_8

GDDR5

GDDR5

L13
G16
J16
H16
J17
H17

A32
C32
D23
E22
C14
A14
E10
D9

C34
D29
D25
E20
E16
E12
J10
D7

A34
E30
E26
C20
C16
C12
J11
F8

J21
G19

H27
G27

J14
H14

K23
K19

K20
K17

K24
K27

M13
K16

K21
J20

K26
L15

H23
J19

MAA1_2/MAA_10
MAA1_3/MAA_11

MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0

MAA1_7/MAA_A15_BA1

WCKA0_0/DQMA_0

WCKA0B_0/DQMA_1

WCKA0_1/DQMA_2

WCKA0B_1/DQMA_3

WCKA1_0/DQMA_4

WCKA1B_0/DQMA_5

WCKA1_1/DQMA_6

MEMORY INTERFACE A

MEMORY INTERFACE A

WCKA1B_1/DQMA_7

GDDR5/DDR2/GDDR3

GDDR5/DDR2/GDDR3

EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

DDBIA0_0/QSA_0B/W DQSA_0
DDBIA0_1/QSA_1B/W DQSA_1
DDBIA0_2/QSA_2B/W DQSA_2
DDBIA0_3/QSA_3B/W DQSA_3
DDBIA1_0/QSA_4B/W DQSA_4
DDBIA1_1/QSA_5B/W DQSA_5
DDBIA1_2/QSA_6B/W DQSA_6
DDBIA1_3/QSA_7B/W DQSA_7

VMB_DM[7..0]24

VMB_RDQS[7..0]24

VMB_WDQS[7..0]24

VMB_MA[13..0]24

VMB_BA024
VMB_BA124
VMB_BA224

5/17 Modify

A A

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Madison/Park M2-MEM I/F

Madison/Park M2-MEM I/F

Madison/Park M2-MEM I/F

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

PROJECT :

ZQ5

ZQ5

ZQ5

20 45Monday, July 12, 2010

20 45Monday, July 12, 2010

1

20 45Monday, July 12, 2010

1A

1A

1A

5

4

3

2

1

ZQ5

ZQ5

ZQ5

21

21 45Monday, July 12, 2010

21 45Monday, July 12, 2010

21 45Monday, July 12, 2010

of

of

of

1A

1A

1A

GPU_4(VGA)

U28F

U28E

For DDR3, MVDDQ = 1.5V ( 3A)

+1.5V_GPU

C96

C96

C188

C100

C100

C118

C118

C93

EV@10u/6.3V_6

C124

C124
EV@1u/6.3V_4

EV@1u/6.3V_4

C101

C101
EV@1u/6.3V_4

EV@1u/6.3V_4

C91

C91
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L56 EV@SBY100505T-121Y-N/300mA/120ohm_4L56

C719

C719
EV@10u/6.3V_6

EV@10u/6.3V_6

C87

C87
EV@10u/6.3V_6

EV@10u/6.3V_6

C278

C278
EV@10u/6.3V_6

EV@10u/6.3V_6

C695

C695
EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

C208

C208
EV@1u/6.3V_4

EV@1u/6.3V_4

C113

C113
EV@1u/6.3V_4

EV@1u/6.3V_4

C139

C139
EV@0.1u/10V_4

EV@0.1u/10V_4

+3V_D

(3.3V@60mA))

C723

C723
EV@1u/6.3V_4

EV@1u/6.3V_4

C105

C105
EV@1u/6.3V_4

EV@1u/6.3V_4

C264

C264
EV@0.1u/10V_4

EV@0.1u/10V_4

C690

C690

EV@0.1u/10V_4

EV@0.1u/10V_4

D D

C C

+1.8V_GPU

B B

+1.8V_GPU

+1.8V_GPU

+1.8V_GPU

+1.8V_GPU

(1.8V@40mA PCIE_PVDD)

EV@SBY100505T-121Y-N/300mA/120ohm_4L60 EV@SBY100505T-121Y-N/300mA/120ohm_4L60

(1.8V@150mA MPV18)

EV@SBY100505T-121Y-N/300mA/120ohm_4L13 EV@SBY100505T-121Y-N/300mA/120ohm_4L13

(1.8V@75mA SPV18)

EV@SBY100505T-121Y-N/300mA/120ohm_4L24 EV@SBY100505T-121Y-N/300mA/120ohm_4L24

120 ohm/300mA

(1.0V@120mA SPV10)

+1V

EV@SBY100505T-121Y-N/300mA/120ohm_4L57 EV@SBY100505T-121Y-N/300mA/120ohm_4L57

GPU all PWROK

A A

R474

R474
EV@10K_4

EV@10K_4

2

2

Q19

+1.8V_GPU

Q19
EV@DTC144EUA

EV@DTC144EUA

1 3

5

C93
EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

C195

C195

C108

C108

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C169

C169

C90

C90
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C125

C125

C164

C164

EV@0.1u/10V_4

EV@0.1u/10V_4

EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@110mA VDD_CT)

C670

C670
EV@10u/6.3V_6

EV@10u/6.3V_6

C245

C245

C237

C237

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L19 EV@SBY100505T-121Y-N/300mA/120ohm_4L19

C722

C722
EV@0.1u/10V_4

EV@0.1u/10V_4

C94

C94
EV@0.1u/10V_4

EV@0.1u/10V_4

VDDC_SENSE/VSS_SENSE and
VDDCI_SENSE/VSS_SENSE route as differetial pair

+3V

R490

R490
EV@10K_4

EV@10K_4

Q20

Q20
EV@2N7002K

EV@2N7002K

dGPU_PWROK 35

3

1

EV@10u/6.3V_6

EV@10u/6.3V_6

C185

C185
EV@1u/6.3V_4

EV@1u/6.3V_4

C98

C98
EV@1u/6.3V_4

EV@1u/6.3V_4

C106

C106
EV@0.1u/10V_4

EV@0.1u/10V_4

C233

C233
EV@1u/6.3V_4

EV@1u/6.3V_4

C234

C234
EV@1u/6.3V_4

EV@1u/6.3V_4

C255

C255
EV@1u/6.3V_4

EV@1u/6.3V_4

C188
EV@10u/6.3V_6

EV@10u/6.3V_6

C85

C85
EV@1u/6.3V_4

EV@1u/6.3V_4

C122

C122
EV@1u/6.3V_4

EV@1u/6.3V_4

VDDC_CT

C220

C220
EV@0.1u/10V_4

EV@0.1u/10V_4

C240

C240
EV@1u/6.3V_4

EV@1u/6.3V_4

C262

C262
EV@0.1u/10V_4

EV@0.1u/10V_4

PCIE_PVD D

MPV18

SPV18

SPV10

VDDR4

T6T6
T5T5

T8T8
T7T7

T21T21

T9T9

T12T12

U28E

AC7

VDDR1#1

AD11

VDDR1#2

AF7

VDDR1#3

AG10

VDDR1#4

AJ7

VDDR1#5

AK8

VDDR1#6

AL9

VDDR1#7

G11

VDDR1#8

G14

VDDR1#9

G17

VDDR1#10

G20

VDDR1#11

G23

VDDR1#12

G26

VDDR1#13

G29

VDDR1#14

H10

VDDR1#15

J7

VDDR1#16

J9

VDDR1#17

K11

VDDR1#18

K13

VDDR1#19

K8

VDDR1#20

L12

VDDR1#21

L16

VDDR1#22

L21

VDDR1#23

L23

VDDR1#24

L26

VDDR1#25

L7

VDDR1#26

M11

VDDR1#27

N11

VDDR1#28

P7

VDDR1#29

R11

VDDR1#30

U11

VDDR1#31

U7

VDDR1#32

Y11

VDDR1#33

Y7

VDDR1#34

LEVEL

LEVEL
TRANSLATION

TRANSLATION

AF26

VDD_CT#1

AF27

VDD_CT#2

AG26

VDD_CT#3

AG27

VDD_CT#4

AF23

VDDR3#1

AF24

VDDR3#2

AG23

VDDR3#3

AG24

VDDR3#4

AF13

VDDR4#4

AF15

VDDR4#5

AG13

VDDR4#7

AG15

VDDR4#8

AD12

VDDR4#1

AF11

VDDR4#2

AF12

VDDR4#3

AG11

VDDR4#6

M20

NC_VDDRHA

M21

NC_VSSRHA

V12

NC_VDDRHB

U12

NC_VSSRHB

AB37

PCIE_PVD D

H7

MPV18#1

H8

MPV18#2

AM10

SPV18

AN9

SPV10

AN10

SPVSS

VOLTAGE

VOLTAGE
SENESE

SENESE

AF28

FB_VDDC

AG28

FB_VDDCI

AH29

FB_GND

EV@Madison/Park_M2

EV@Madison/Park_M2

MEM I/O

MEM I/O

I/O

I/O

PLL

PLL

+VGPU_CORE

C156

C156
EV@1u/6.3V_4

EV@1u/6.3V_4

C215

C215
EV@1u/6.3V_4

EV@1u/6.3V_4

C178

C178
EV@1u/6.3V_4

EV@1u/6.3V_4

+VGPU_IO

C133

C133
EV@1u/6.3V_4

EV@1u/6.3V_4

Spec: 0.15A
Rating: 3A

R161

R161
*EV@0_6

*EV@0_6

+3V_D

Spec: 0.15A
Rating: 3A

+1.8V_GPU

C140

C140
EV@1u/6.3V_4

EV@1u/6.3V_4

+3V_D_EXT

C204

C204
EV@1u/6.3V_4

EV@1u/6.3V_4

C230

C230
EV@1u/6.3V_4

EV@1u/6.3V_4

C161

C161
EV@1u/6.3V_4

EV@1u/6.3V_4

+3V_D_EXT 23,41

B-test

2

PCIE

PCIE

AA31

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8

PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

VDDC#1

CORE

CORE

VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8

VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15

POWER

POWER

VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8

VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
VDDCI#15

ISOLATED

ISOLATED

VDDCI#16

CORE I/O

CORE I/O

VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

PCIE_VDDR

AA32
AA33
AA34

C206

C206

V28

EV@0.1u/10V_4

EV@0.1u/10V_4

W29
W30
Y31

G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

C152

C152
EV@1u/6.3V_4

EV@1u/6.3V_4

C157

C157
EV@1u/6.3V_4

EV@1u/6.3V_4

C238

C238
EV@1u/6.3V_4

EV@1u/6.3V_4

C200

C200
EV@1u/6.3V_4

EV@1u/6.3V_4

C191

C191
EV@10u/6.3V_6

EV@10u/6.3V_6

BIF_VDDC should be connected to VDDC if BACO feature not used.
For BACO, refer to the databook

PIN different between Bro ad way an d Madison

Pin

N27

AL31

AL21

C144

C144
EV@1u/6.3V_4

EV@1u/6.3V_4

C218

C218
EV@10u/6.3V_6

EV@10u/6.3V_6

GPU +3V power

Fine-tune Power-on sequence

MAINON35,38,40,42
VGPU_ON35,41,43

Modfiy it 5/4

4

C207

C207
EV@0.1u/10V_4

EV@0.1u/10V_4

C142

C142
EV@1u/6.3V_4

EV@1u/6.3V_4

C160

C160
EV@1u/6.3V_4

EV@1u/6.3V_4

C239

C239
EV@1u/6.3V_4

EV@1u/6.3V_4

C224

C224
EV@1u/6.3V_4

EV@1u/6.3V_4

C171

C171
EV@10u/6.3V_6

EV@10u/6.3V_6

Broadway Madison

VDDC BIF_VDDC

TS_A NC_TS_A

GND PX_EN

C183

C183
EV@1u/6.3V_4

EV@1u/6.3V_4

C130

C130
EV@10u/6.3V_6

EV@10u/6.3V_6

R164 *EV@0_4R164 *EV@0_4
R165 EV@0_4R165 EV@0_4

C3C

(1.8V@400mA PCIE_VDDR)

C173

C173

C180

C180
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

(1.0V@1.1A PCIE_VDDC)

C107

C107

C92

C92
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C182

C182

C181

C181
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C212

C212

C189

C189

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C193

C193

C236

C236

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C170

C170

C190

C190
EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

(DDR3 1.12V@4A VDDCI) or more

C138

C138

C127

C127
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C117

C117
EV@10u/6.3V_6

EV@10u/6.3V_6

+3V +3V

R163

R163
EV@4.7K_4

EV@4.7K_4

2

Q7

Q7
EV@DTC144EUA

C307

C307
*EV@1u/6.3V_4

*EV@1u/6.3V_4

EV@DTC144EUA

1 3

3

C186

C186

C721

C721
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C162

C162

C120

C120

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C158

C158

C221

C221

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C246

C246

C229

C229

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C192

C192

C214

C214
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C172

C172

C143

C143
EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

+VGPU_IO +VGPU_CORE

C205

C205

C119

C119

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

+3V

1

2

EV@AO3413Q5EV@AO3413
Q5

3

C306

C306

EV@10u/6.3V_6

EV@10u/6.3V_6

1

2

EV@AO3413Q6EV@AO3413
Q6

3

C669

C669

EV@10u/6.3V_6

EV@10u/6.3V_6

L61 EV@HCB1608KF-181T15/1.5A/180ohm_6L61 EV@HCB1608KF-181T15/1.5A/180ohm_6

C213

C213

C720

C720
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

+1V

C146

C146

C102

C102

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@10u/6.3V_6

EV@10u/6.3V_6

(30A or more)

C155

C155

C210

C210
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C216

C216

C166

C166

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

C165

C165

C196

C196

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

5/14 modify

L12

L12
EV@TI201209G121_8_3A

EV@TI201209G121_8_3A
L10

L10
EV@TI201209G121_8_3A

EV@TI201209G121_8_3A

C153

C153

C110

C110
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

R162

R162
*EV@0_6

*EV@0_6

0.5A

C304

C304

C305

C305
EV@0.1u/10V_4

EV@0.1u/10V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

R157

R157
*EV@0_6

*EV@0_6

0.5A

C674

C674

C673

C673

EV@0.1u/10V_4

EV@0.1u/10V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

U28F

AB39

PCIE_VSS#1

E39

PCIE_VSS#2

F34

PCIE_VSS#3

F39

PCIE_VSS#4

G33

PCIE_VSS#5

G34

PCIE_VSS#6

H31

PCIE_VSS#7

H34

PCIE_VSS#8

H39

PCIE_VSS#9

J31

PCIE_VSS#10

J34

PCIE_VSS#11

K31

PCIE_VSS#12

K34

PCIE_VSS#13

K39

PCIE_VSS#14

L31

PCIE_VSS#15

L34

PCIE_VSS#16

M34

PCIE_VSS#17

M39

PCIE_VSS#18

N31

PCIE_VSS#19

N34

PCIE_VSS#20

P31

PCIE_VSS#21

P34

PCIE_VSS#22

P39

PCIE_VSS#23

R34

PCIE_VSS#24

T31

PCIE_VSS#25

T34

PCIE_VSS#26

T39

PCIE_VSS#27

U31

PCIE_VSS#28

U34

PCIE_VSS#29

V34

PCIE_VSS#30

V39

PCIE_VSS#31

W31

PCIE_VSS#32

W34

PCIE_VSS#33

Y34

PCIE_VSS#34

Y39

PCIE_VSS#35

F15

GND#100

F17

GND#101

F19

GND#102

F21

GND#103

F23

GND#104

F25

GND#105

F27

GND#106

F29

GND#107

F31

GND#108

F33

GND#109

F7

GND#110

F9

GND#111

G2

GND#112

G6

GND#113

H9

GND#114

J2

GND#115

J27

GND#116

J6

GND#117

J8

GND#118

K14

GND#119

K7

GND#120

L11

GND#121

L17

GND#122

L2

GND#123

L22

GND#124

L24

GND#125

L6

GND#126

M17

GND#127

M22

GND#128

M24

GND#129

N16

GND#130

N18

GND#131

N2

GND#132

N21

GND#133

N23

GND#134

N26

GND#135

N6

GND#136

R15

GND#137

R17

GND#138

R2

GND#139

R20

GND#140

R22

GND#141

R24

GND#142

R27

GND#143

R6

GND#144

T11

GND#145

T13

GND#146

T16

GND#147

T18

GND#148

T21

GND#149

T23

GND#150

T26

GND#151

U15

GND#153

U17

GND#154

U2

GND#155

U20

GND#156

U22

GND#157

U24

GND#158

U27

GND#159

U6

GND#160

V11

GND#161

V16

GND#163

V18

GND#164

V21

GND#165

V23

GND#166

V26

GND#167

W2

GND#168

W6

GND#169

Y15

GND#170

Y17

GND#171

Y20

GND#172

Y22

GND#173

Y24

GND#174

Y27

GND#175

U13

GND#152

V13

GND#162

EV@Madison/Park_M2

EV@Madison/Park_M2

GND

GND

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8

GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

PowerXpress control signal for Madsion and Park only
If not used, can be disconnected.
PX_EN = LOW, turn on
PX_EN = HIGH, turn off
PX_EN is used to turn ON/OFF some
regulators for PowerXpress mode. An
output high ‘3.3V’ will turn the regulators
OFF. An output low ‘0V’ will turn the
regulators ON. PX_EN outputs low (0V)
by default.
If this signal is unused, it can be NC (not
connected) or connected to ground.

R145 *EV@0_4R145 *EV@0_4

R139

R139
*EV@0_4

*EV@0_4

Pin AL21 to Ground for Broadway

+3V_D

GPU Power-on sequence

1 => +3V_D

A39
AW1
AW39

2 => +VGPU_CORE
3 => +1V
4 => +1.5V_GPU
5 => +1.8V_GPU
6 => dGPU_PWROK

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

Size Document Number Rev

Size Do c ument Number Rev

Size Do c ument Number Rev

Madison/Park M2 (PWR/GND)

Madison/Park M2 (PWR/GND)

Madison/Park M2 (PWR/GND)

Date: Sheet

Date: Sheet

Date: Sheet

PROJECT :

1

5

4

3

2

1

GPU_5(VGA)

U28H

U28H

DP A/B POWERDP C/D POWER

DP A/B POWERDP C/D POWER

DPC_VDD18

D D

+1.8V_GPU

(1.8V@130mA DPA_VDD18)

EV@SBY100505T-121Y-N/300mA/120ohm_4L28 EV@SBY100505T-121Y-N/300mA/120ohm_4L28

C292

C292

EV@10u/6.3V_6

EV@10u/6.3V_6

C285

C285
EV@1u/10V_6

EV@1u/10V_6

DPA_VDD18

C279

C279
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@130mA DPC_VDD18)

EV@SBY100505T-121Y-N/300mA/120ohm_4L29 EV@SBY100505T-121Y-N/300mA/120ohm_4L29

C288

C288

C287

C C

C287

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@1u/10V_6

EV@1u/10V_6

DPC_VDD18

C272

C272
EV@0.1u/10V_4

EV@0.1u/10V_4

DPC_VDD10

DPC_VDD18

DPC_VDD10

AP20
AP21

AP13

AT13

AN17
AP16

AP17
AW14
AW16

AP22

AP23

AP14

AP15

AN19

AP18

AP19
AW20
AW22

DPC_VDD18#1
DPC_VDD18#2

DPC_VDD10#1
DPC_VDD10#2

DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5

DPD_VDD18#1
DPD_VDD18#2

DPD_VDD10#1
DPD_VDD10#2

DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5

DPA_VDD18#1
DPA_VDD18#2

DPA_VDD10#1
DPA_VDD10#2

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

DPB_VDD18#1
DPB_VDD18#2

DPB_VDD10#1
DPB_VDD10#2

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

AN24
AP24

AP31
AP32

AN27
AP27
AP28
AW24
AW26

AP25
AP26

AN33
AP33

AN29
AP29
AP30
AW30
AW32

DPA_VDD18

DPA_VDD10

DPA_VDD18

DPA_VDD10

DPA_VDD10

DPC_VDD10

(1.0V@110mA DPA_VDD10)

C271

C271
EV@10u/6.3V_6

EV@10u/6.3V_6

C252

C252
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@0.1u/10V_4

EV@0.1u/10V_4

(1.0V@110mA DPC_VDD10)

C276

C276
EV@10u/6.3V_6

EV@10u/6.3V_6

C269

C269
EV@1u/6.3V_4

EV@1u/6.3V_4

C257

C257

C263

C263
EV@0.1u/10V_4

EV@0.1u/10V_4

EV@SBY100505T-121Y-N/300mA/120ohm_4L22 EV@SBY100505T-121Y-N/300mA/120ohm_4L22

EV@SBY100505T-121Y-N/300mA/120ohm_4L23 EV@SBY100505T-121Y-N/300mA/120ohm_4L23

22

+1V

R494 EV@150/F_4R494 EV@150/F_4

DPE_VDD18

+1.8V_GPU

L14 EV@HCB1608KF-181T15/1.5A/180ohm_6L14 EV@HCB1608KF-181T15/1.5A/180ohm_6

B B

+1V

180 ohm/1.5A

L18 EV@HCB1608KF-181T15/1.5A/180ohm_6L18 EV@HCB1608KF-181T15/1.5A/180ohm_6

A A

(1.8V@400mA DPE/F_VDD18)

C228

C228
EV@0.1u/10V_4

EV@0.1u/10V_4

C227

C227
EV@1u/6.3V_4

EV@1u/6.3V_4

C232

C232
EV@10u/6.3V_6

EV@10u/6.3V_6

(1.0V@400mA DPE/F_VDD10)

C248

C248
EV@0.1u/10V_4

EV@0.1u/10V_4

5

C244

C244
EV@1u/6.3V_4

EV@1u/6.3V_4

C273

C273
EV@10u/6.3V_6

EV@10u/6.3V_6

DPE_VDD18

DPE_VDD10

DPE_VDD10

DPE_VDD18

DPE_VDD10

R503 EV@150/F_4R503 EV@150/F_4

4

DPCD_CALR

DPEF_CALR

AW18

DPCD_CALR

AH34

DPE_VDD18#1

AJ34

DPE_VDD18#2

AL33

DPE_VDD10#1

AM33

DPE_VDD10#2

AN34

DPE_VSSR#1

AP39

DPE_VSSR#2

AR39

DPE_VSSR#3

AU37

DPE_VSSR#4

AW35

DPE_VSSR#5

AF34

DPF_VDD18#1

AG34

DPF_VDD18#2

AK33

DPF_VDD10#1

AK34

DPF_VDD10#2

AF39

DPF_VSSR#1

AH39

DPF_VSSR#2

AK39

DPF_VSSR#3

AL34

DPF_VSSR#4

AM34

DPF_VSSR#5

AM39

DPEF_CALR

EV@Madison/Park_M2

EV@Madison/Park_M2

DP E/F POWER

DP E/F POWER

DPAB_CALR

DP PLL POWER

DP PLL POWER

DPA_PVDD

DPA_PVSS

DPB_PVDD

DPB_PVSS

DPC_PVDD

DPC_PVSS

DPD_PVDD

DPD_PVSS

DPE_PVDD

DPE_PVSS

NC_DPF_PVDD

NC_DPF_PVSS

3

AW28

AU28
AV27

AV29
AR28

AU18
AV17

AV19
AR18

AM37
AN38

AL38
AM35

DPAB_CALR

R498 EV@150/F_4R498 EV@150/F_4

DPA_PVDD

C280

C280
EV@10u/6.3V_6

EV@10u/6.3V_6

DPB_PVDD

C297

C297
EV@10u/6.3V_6

EV@10u/6.3V_6

DPC_PVDD

C680

C680
EV@10u/6.3V_6

EV@10u/6.3V_6

DPD_PVDD

C303

C303
EV@10u/6.3V_6

EV@10u/6.3V_6

DPE_PVDD

C298

C298
EV@10u/6.3V_6

EV@10u/6.3V_6

C265

C265
EV@1u/6.3V_4

EV@1u/6.3V_4

C283

C283
EV@1u/6.3V_4

EV@1u/6.3V_4

C687

C687
EV@1u/6.3V_4

EV@1u/6.3V_4

C293

C293
EV@1u/6.3V_4

EV@1u/6.3V_4

C291

C291
EV@1u/6.3V_4

EV@1u/6.3V_4

2

(1.8V@20mA DPA_PVDD)

C266

C266
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPB_PVDD)

C290

C290
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPC_PVDD)

C697

C697
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@20mA DPD_PVDD)

C299

C299
EV@0.1u/10V_4

EV@0.1u/10V_4

(1.8V@40mA DPE/F_PVDD)

C275

C275
EV@0.1u/10V_4

EV@0.1u/10V_4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Madison/Park M2 (DP_PWR/GND)

Madison/Park M2 (DP_PWR/GND)

Madison/Park M2 (DP_PWR/GND)

Date: Sheet

Date: Sheet

Date: Sheet

EV@SBY100505T-121Y-N/300mA/120ohm_4L27 EV@SBY100505T-121Y-N/300mA/120ohm_4L27

EV@SBY100505T-121Y-N/300mA/120ohm_4L30 EV@SBY100505T-121Y-N/300mA/120ohm_4L30

EV@SBY100505T-121Y-N/300mA/120ohm_4L58 EV@SBY100505T-121Y-N/300mA/120ohm_4L58

EV@SBY100505T-121Y-N/300mA/120ohm_4L31 EV@SBY100505T-121Y-N/300mA/120ohm_4L31

EV@SBY100505T-121Y-N/300mA/120ohm_4L25 EV@SBY100505T-121Y-N/300mA/120ohm_4L25

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

+1.8V_GPU

+1.8V_GPU

+1.8V_GPU

+1.8V_GPU

+1.8V_GPU

ZQ5

ZQ5

ZQ5

1

1A

1A

1A

22 45Monday, July 12, 2010

22 45Monday, July 12, 2010

22 45Monday, July 12, 2010

of

of

of

5

PIN STRAPS(VGA)

GPU_GPIO019

GPU_GPIO119
GPIO3_SMBDAT19
GPIO4_SMBCLK19

D D

C C

SCS#_GPIO22

GPU_GPIO1319

GPU_GPIO1219

GPU_GPIO1119

GPU_GPIO219

EV_HSYNC19,25

EV_VSYNC19,25

SIN_GPIO9

V2SYNC19
H2SYNC19

SCS#_GPIO22
GPU_GPIO13
GPU_GPIO12
GPU_GPIO11

R128 *EV@10K_4R128 *EV@10K_4
R127 *EV@10K_4R127 *EV@10K_4
R122 *EV@10K_4R122 *EV@10K_4
R123 *EV@10K_4R123 *EV@10K_4

R475 *EV@10K_4R475 *EV@10K_4

R129 *EV@10K_4R129 *EV@10K_4
R138 *EV@10K_4R138 *EV@10K_4
R136 EV@10K_4R136 EV@10K_4

R134 *EV@10K_4R134 *EV@10K_4

R512 EV@10K_4R512 EV@10K_4
R518 EV@10K_4R518 EV@10K_4

R476 *EV@10K_4R476 *EV@10K_4
R156 *EV@10K_4R156 *EV@10K_4
R159 *EV@10K_4R159 *EV@10K_4

R121 *EV@10K_4R121 *EV@10K_4
R125 *EV@10K_4R125 *EV@10K_4
R137 *EV@10K_4R137 *EV@10K_4
R131 *EV@10K_4R131 *EV@10K_4

+3V_D

5/17 Modify

5/5 Modify

5/17 Add

4

3

2

1

CONFIGURATION STRAPS

ROM Table

Size of the primary
memory apertures

128 MB

256 MB

64 MB

32 MB

ROM Table

EXT_HSYNC EXT_VSYNC

0
0
1

0
1
0

11

CONFIG[2:0]

000

001

010

011

Discription

No Audio

Any one by dectec

DP only

Both DP & HDMI

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURI NG RESET

STRAPS DESCRIPTION OF DEFAULT SETTINGSPIN

GPIO0TX_PWRS_ENB

GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED

BIOS_ROM_EN

BIF_GEN2_EN_A

GPIO_8_ROMSO

GPIO_9_ROMSI

VIP_DEVICE_STRAP_ENA V2SYNC

GPIO_22_ROMCSB

GPIO[13:11]ROMIDCFG(2:0) Primary Memory Aperture size requested at PCI Configuration

GPIO2

GPIO8
H2SYNCH2SYNC
GPIO21GPIO_21_BB_EN

HSYNCAUD[1]
VSYNCAUD[0]

GPIO9

0 = 50% TX OUTPUT SWING

1 = FULL TX OUTPUT SWING

0 = TX DE-EMPHASIS DISABLED

1 = TX DE-EMPHASIS ENABLED
ENABLE EXTERNAL BIOS ROM
0 = DISABLE

1 = ENABLE

0 = PCIE DEVICE AS 2.5GT/S CAPABLE

1 = PCIE DEVICE AS 5GT/S CAPABLE

Reserved Only

AUD[1:0]
00: NO AUDIO FUNCTION.
01: AUDIO FOR DISPLAYPORT AND HDMI IF
ADAPTER IS DETECTED.
10: AUDIO FOR DISPLAYPORT ONLY.

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

0 = VGA controller capacity enable

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

DEFAULT

0

0

1

001

0

0

11

0

0

23

REMARK

table 3-35

See Audio table

EEPROM(VGA)

U25

U25

C665

C665
*EV@0.1u/10V_4

*EV@0.1u/10V_4

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

*EV@M25P10-AVMN6P

*EV@M25P10-AVMN6P

SIN_GPIO919
SCLK_GPIO1019
SCS#_GPIO2219

+3V_D_EXT

B-test

B B

SIN_GPIO9

SCS#_GPIO22

R441 *EV@10K_4R441 *EV@10K_4

R438

R438
*EV@10K_4

*EV@10K_4

VSS

2

SOUT_GPIO8

Q

4

SOUT_GPIO8 19

Thermal Sensor(VGA)

WINDBOND

5/6 modify

+3V_D_EXT

R418

R418

R419

R419

EV@10K_4

EV@10K_4

EV@10K_4

EV@10K_4

VGA_CLK35

A A

VGA_DATA35

ALT#_GPIO1719
VGA_THERM#35

B-test

5

B-test

U24

U24

8
7
6
4

VCC

SCLK

DXP

SDA

DXN

ALERT#

GND

OVERT#

EV@G780P81U(MSOP-8)

EV@G780P81U(MSOP-8)

$''5(66+

+3V_D_EXT

1
2
3
5

GMT AL000780000

C641 EV@0.1u/10V_4C641 EV@0.1u/10V_4

C645

C645
EV@2200p/50V_4

EV@2200p/50V_4

4

P/NVendor

AL83L771K01

GPU_D+ 19

GPU_D- 19

USD0.16

3

DDR3 Memory Aperture size(GPU)

Vendor

Hynix

Samsung

RAM_STRAP219

RAM_STRAP119

RAM_STRAP019

Vendor P/N

H5TQ1G63BFR-12C

K4W1G1646E-HC12

K4W2G1646B-HC12

R485 *EV@10K_4R485 *EV@10K_4
R492

R492

R486 *EV@10K_4R486 *EV@10K_4
R493

R493

R484

R484
R491

R491

EV@10K_4

EV@10K_4

EV@10K_4

EV@10K_4

*EV@10K_4

*EV@10K_4
EV@10K_4

EV@10K_4

DDR3 Memory Aperture size

STN B/S P/N

DVPDATA_2

101

AKD5LZGTW04
(64M*16)

1
110

AKD5LGGT506
(64M*16)

AKD5MGGT500
(128M*16)

+1.8V_GPU

2

00

001

RAM_STRAP2 SET DDR3 Vendor
RAM_STRAP[1:0] SET SIZE.

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Strip/Thermal

Strip/Thermal

Strip/Thermal

Date: Sheet

Date: Sheet

Date: Sheet

RAM_STRAP1RAM_STRAP2

DVPDATA_1

0

RAM_STRAP0

DVPDATA_0

0

0

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

ZQ5

ZQ5

ZQ5

of

23 45Monday, July 12, 2010

of

23 45Monday, July 12, 2010

of

23 45Monday, July 12, 2010

1

1A

1A

1A

5

VMB_DQ[63..0]20

VMB_DM[7..0]20

VMB_RDQS[7..0]20

VMB_WDQS[7..0]20

D D

C C

VMB_DQ[63..0]
VMB_DM[7..0]
VMB_RDQS[7..0]
VMB_WDQS[7..0]

VMB_MA020
VMB_MA120
VMB_MA220
VMB_MA320
VMB_MA420
VMB_MA520
VMB_MA620
VMB_MA720
VMB_MA820

VMB_MA920
VMB_MA1020
VMB_MA1120
VMB_MA1220
VMB_MA1320

VMB_BA020
VMB_BA120
VMB_BA220

VMB_CLKP020
VMB_CLKN020
VMB_CKE020

VMB_ODT020

VMB_CS0#20

VMB_RAS0#20
VMB_CAS0#20
VMB_WE0#20

MEM_RST#20

QSA[7..0]
QSA#[7..0]

VREFC_VMB1
VREFD_VMB1

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13 VMB_MA13 VMB_MA13VMB_MA13

VMB_BA0
VMB_BA1
VMB_BA2

VMB_CLK0
VMB_CLK0#
VMB_CKE0

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

VMB_RDQS0
VMB_RDQS3

VMB_DM0
VMB_DM3

VMB_WDQS0
VMB_WDQS3

MEM_RST#

VMB_ZQ1

R73

R73
EV@240/F_4

EV@240/F_4

U4

U4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SP@VRAM_DDR3

SP@VRAM_DDR3

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9

VDD#G7

VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMB_DQ4

F7

VMB_DQ3

F2

VMB_DQ5

F8

VMB_DQ0

H3

VMB_DQ6

H8

VMB_DQ1

G2

VMB_DQ7

H7

VMB_DQ2

D7

VMB_DQ26

C3

VMB_DQ27

C8

VMB_DQ28 VMB_DQ14

C2

VMB_DQ31

A7

VMB_DQ24

A2

VMB_DQ29

B8

VMB_DQ25

A3

VMB_DQ30

+1.5V_GPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

BOT Down

4

CHANNEL B: 512MB DDR3 (16*64M*4pcs)

U30

U30

VREFC_VMB2
VREFD_VMB2

VMB_MA0

0

3

VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12

VMB_BA0
VMB_BA1
VMB_BA2

VMB_CLK0
VMB_CLK0#
VMB_CKE0

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

VMB_RDQS2
VMB_RDQS1

VMB_DM2 VMB_DM4
VMB_DM1

VMB_WDQS2
VMB_WDQS1

MEM_RST#

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

VMB_ZQ2 VMB_ZQ3

R524

R524
EV@240/F_4

EV@240/F_4

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SP@VRAM_DDR3

SP@VRAM_DDR3

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

TOP Down TOP Up

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1

VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2

VDDQ#E9

VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1
VSSQ#B9

VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMB_DQ19

F7

VMB_DQ21

F2

VMB_DQ17

F8

VMB_DQ18

H3

VMB_DQ20

H8

VMB_DQ22

G2

VMB_DQ16

H7

VMB_DQ23

D7

VMB_DQ15

C3

VMB_DQ11

C8
C2

VMB_DQ10

A7

VMB_DQ12

A2

VMB_DQ9

B8

VMB_DQ13

A3

VMB_DQ8

+1.5V_GPU

B2
D9
G7
K2
K8
N1
N9
R1
R9

+1.5V_GPU +1.5V_GPU

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

3

2

1

24

U27

U27

R506

R506
EV@240/F_4

EV@240/F_4

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SP@VRAM_DDR3

SP@VRAM_DDR3

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

VREFC_VMB3
VREFD_VMB3

VMB_MA0

2

1

VMB_CLKP120
VMB_CLKN120
VMB_CKE120

VMB_ODT120

VMB_CS1#20
VMB_RAS1#20
VMB_CAS1#20
VMB_WE1#20

VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12

VMB_BA0
VMB_BA1
VMB_BA2

VMB_CLK1
VMB_CLK1#
VMB_CKE1

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

VMB_RDQS4
VMB_RDQS7

VMB_DM7

VMB_WDQS4
VMB_WDQS7

MEM_RST#

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9

VDD#G7

VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1
VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

VSSQ#B1

VSSQ#B9
VSSQ#D1
VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMB_DQ36

F7

VMB_DQ39

F2

VMB_DQ33

F8

VMB_DQ35

H3

VMB_DQ37
VMB_DQ32
VMB_DQ38
VMB_DQ34

VMB_DQ62
VMB_DQ58
VMB_DQ63
VMB_DQ56
VMB_DQ61
VMB_DQ57
VMB_DQ60
VMB_DQ59

4

7

+1.5V_GPU

H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

VREFC_VMB4
VREFD_VMB4

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12

VMB_BA0
VMB_BA1
VMB_BA2

VMB_CLK1
VMB_CLK1#
VMB_CKE1

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

VMB_RDQS6
VMB_RDQS5

VMB_DM6
VMB_DM5

VMB_WDQS6
VMB_WDQS5

MEM_RST#

VMB_ZQ4

R93

R93
EV@240/F_4

EV@240/F_4

U7

U7

M8

VREFCA

H1

VREFDQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC

T3

A13

T7

A14

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK

K9

CKE

K1

ODT

L2

CS

J3

RAS

K3

CAS

L3

WE

F3

DQSL

C7

DQSU

E7

DML

D3

DMU

G3

DQSL

B7

DQSU

T2

RESET

L8

ZQ

J1

NC#J1

L1

NC#L1

J9

NC#J9

L9

NC#L9

SP@VRAM_DDR3

SP@VRAM_DDR3

BOT Up

100-BALL

100-BALL
SDRAM DDR3

SDRAM DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

VSS#A9
VSS#B3
VSS#E1

VSS#G8

VSS#J2

VSS#J8
VSS#M1
VSS#M9

VSS#P1

VSS#P9

VSS#T1

VSS#T9

VSSQ#B1

VSSQ#B9
VSSQ#D1
VSSQ#D8

VSSQ#E2

VSSQ#E8

VSSQ#F9
VSSQ#G1
VSSQ#G9

E3

VMB_DQ52

F7

VMB_DQ50

F2

VMB_DQ55

F8

VMB_DQ49

H3

VMB_DQ53
VMB_DQ48
VMB_DQ54
VMB_DQ51

VMB_DQ40
VMB_DQ47
VMB_DQ42
VMB_DQ46
VMB_DQ43
VMB_DQ45
VMB_DQ41
VMB_DQ44

6

5

+1.5V_GPU+1.5V_GPU

H8
G2
H7

D7
C3
C8
C2
A7
A2
B8
A3

B2
D9
G7
K2
K8
N1
N9
R1
R9

A1
A8
C1
C9
D2
E9
F1
H2
H9

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

Group-B0 VREF Group-B1 VREF

B B

R67

R76

R76
EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB1 VREFD_VMB1

C136

C136

R75

R75
EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

EV@0.1u/10V_4

MEM_B0 CLK

VMB_CLK0
VMB_CLK0#

R65

R65

R66

R66
EV@56.2/F_4

EV@56.2/F_4

EV@56.2/F_4

EV@56.2/F_4

A A

C116

C116
EV@0.01u/16V_4

EV@0.01u/16V_4

5

R67
EV@4.99K/F_4

EV@4.99K/F_4

R63

R63
EV@4.99K/F_4

EV@4.99K/F_4

C104

C104
EV@0.1u/10V_4

EV@0.1u/10V_4

+1.5V_GPU

C733

C733
EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C728

C728
EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C729

C729
EV@10u/6.3V_6

EV@10u/6.3V_6

C95

C95
EV@1u/6.3V_4

EV@1u/6.3V_4

C194

C194
EV@1u/6.3V_4

EV@1u/6.3V_4

C60

C60
EV@10u/6.3V_6

EV@10u/6.3V_6

4

C751

C751
EV@1u/6.3V_4

EV@1u/6.3V_4

C58

C58
EV@1u/6.3V_4

EV@1u/6.3V_4

C82

C82
EV@10u/6.3V_6

EV@10u/6.3V_6

R523

R523
EV@4.99K/F_4

EV@4.99K/F_4

R525

R525
EV@4.99K/F_4

EV@4.99K/F_4

C748

C748
EV@1u/6.3V_4

EV@1u/6.3V_4

C750

C750
EV@1u/6.3V_4

EV@1u/6.3V_4

C743

C743
EV@10u/6.3V_6

EV@10u/6.3V_6

C731

C731
EV@0.1u/10V_4

EV@0.1u/10V_4

C57

C57
EV@1u/6.3V_4

EV@1u/6.3V_4

C718

C718
EV@1u/6.3V_4

EV@1u/6.3V_4

C151

C151
EV@1u/6.3V_4

EV@1u/6.3V_4

C63

C63
EV@1u/6.3V_4

EV@1u/6.3V_4

C749

C749
EV@10u/6.3V_6

EV@10u/6.3V_6

R528

R528
EV@4.99K/F_4

EV@4.99K/F_4

R529

R529
EV@4.99K/F_4

EV@4.99K/F_4

C301

C301
EV@1u/6.3V_4

EV@1u/6.3V_4

C56

C56
EV@1u/6.3V_4

EV@1u/6.3V_4

C742

C742
EV@0.1u/10V_4

EV@0.1u/10V_4

C752

C752
EV@1u/6.3V_4

EV@1u/6.3V_4

C300

C300
EV@1u/6.3V_4

EV@1u/6.3V_4

R521

C78

C78
EV@1u/6.3V_4

EV@1u/6.3V_4

C716

C716
EV@1u/6.3V_4

EV@1u/6.3V_4

C685

C685
EV@10u/6.3V_6

EV@10u/6.3V_6

R521
EV@4.99K/F_4

EV@4.99K/F_4

R522

R522
EV@4.99K/F_4

EV@4.99K/F_4

C683

C683
EV@10u/6.3V_6

EV@10u/6.3V_6

2

C726

C726
EV@0.1u/10V_4

EV@0.1u/10V_4

C137

C137
EV@1u/6.3V_4

EV@1u/6.3V_4

C717

C717
EV@1u/6.3V_4

EV@1u/6.3V_4

C708

C708
EV@1u/6.3V_4

EV@1u/6.3V_4

C268

C268
EV@1u/6.3V_4

EV@1u/6.3V_4

C707

C707
EV@1u/6.3V_4

EV@1u/6.3V_4

C744

C744
EV@1u/6.3V_4

EV@1u/6.3V_4

R105

R105
EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB4 VREFD_VMB4VREFC_VMB2 VREFD_VMB2

R109

R109

C219

C219

EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

EV@0.1u/10V_4

MEM_B1 CLK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

R516

R516
EV@4.99K/F_4

EV@4.99K/F_4

VREFC_VMB3 VREFD_VMB3

R511

R511

C709

C709

EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

EV@0.1u/10V_4

Group-B1 decoupling CAPGroup-B0 decoupling CAP

+1.5V_GPU

C698

C698

C203

C203
EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C746

C746

C696

C696

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU

C289

C289

C134

C134

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

EV@10u/6.3V_6

3

C70

C70
EV@1u/6.3V_4

EV@1u/6.3V_4

C684

C684
EV@1u/6.3V_4

EV@1u/6.3V_4

C745

C745
EV@10u/6.3V_6

EV@10u/6.3V_6

C211

C211
EV@1u/6.3V_4

EV@1u/6.3V_4

C296

C296
EV@1u/6.3V_4

EV@1u/6.3V_4

+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU+1.5V_GPU

R142

R142
EV@4.99K/F_4

EV@4.99K/F_4

C281

C281

R141

R141
EV@4.99K/F_4

EV@4.99K/F_4

EV@0.1u/10V_4

EV@0.1u/10V_4

VMB_CLK1
VMB_CLK1#

R113

R113

R108

R108
EV@56.2/F_4

EV@56.2/F_4

EV@56.2/F_4

EV@56.2/F_4

C222

C222
EV@0.01u/16V_4

EV@0.01u/16V_4

Quanta Computer Inc.

Quanta Computer Inc.

Quanta Computer Inc.

PROJECT :

PROJECT :

PROJECT :

MEMORY 2 channel B

MEMORY 2 channel B

MEMORY 2 channel B

ZQ5

ZQ5

ZQ5

1

1A

1A

24 45Monday, July 12, 2010

24 45Monday, July 12, 2010

24 45Monday, July 12, 2010

1A

1

IV@ --> iGPU only

EV@ --> dGPU only

INT_CRT_RED7
INT_CRT_GRN7

A A

iGPU
only

INT_CRT_BLU7
INT_VSYNC7
INT_H SYNC7
INT_CRT_DDCDAT7
INT_CRT_DDCCLK7

2

INT_CRT_RED
INT_CRT_GRN
INT_CRT_BLU

R424 IV@0_4R424 IV@0_4
R422 IV@0_4R422 IV@0_4
R423 IV@0_4R423 IV@0_4
R434 IV@0_4R434 IV@0_4
R435 IV@0_4R435 IV@0_4
R427 IV@0_4R427 IV@0_4
R428 IV@0_4R428 IV@0_4

3

VGA_RED
VGA_GRN
VGA_BLU
VSYNCINT_VSYNC
HSYNCIN T_HS YNC
CRTDDATAINT_CRT_DDCDAT
CRTDCLKINT_CRT_DDCCLK

4

CRTCRT Switch

VGA_RED
VGA_GRN
VGA_BLU

R4
150/F_4R4150/F_4

5

12/29 Modify

+5V

SMD1206P110TFT

SMD1206P110TFT

C7

R2

R3
150/F_4R3150/F_4

150/F_4R2150/F_4

5p/50V_4C75p/50V_4

F2

F2

1 2

C6
5p/50V_4C65p/50V_4

6

D33 SSM22LLPTD33 SSM22LLPT

L3 B K1608LL680_6L3 BK1608LL680_6
L2 B K1608LL680_6L2 BK1608LL680_6
L1 B K1608LL680_6L1 BK1608LL680_6

REV:B

C5

6/14

5p/50V_4C55p/50V_4

C1
5p/50V_4C15p/50V_4

7

updatefootprint 4/19 ZQ2

C791 .1u/10V_4C791 .1u/10V_4

CRTVDD5+5V_CRT

6

CRT_R1

7
2

CRT_G1

8
3

CRT_B1 CRTHSYNC

9
4

10

C3

C2
5p/50V_4C25p/50V_4

5p/50V_4C35p/50V_4

5

8

25

1617

CN20

CN20
CRT

CRT

111

CRT_11
DDCDAT_1

CRTVSYNC
DDCCLK_1

T1T1

12
13
14
15

R553 10K_4R553 10K_4

CRT_VSYNC2
CRT_HSYNC2

VSYNC
HSYNC

CRTDCLK
CRTDDATA

DDCCLK_1
DDCDAT_1

R152

R152

*0_1206

*0_1206

R130

R130

100K_4

100K_4

100K_4

100K_4

D32 BAS316D32 BAS316

R1 *0_4R1 *0_4

R11 15_4R11 15_4
R14 15_4R14 15_4

REV:B
6/14

R21 2.7K_4R21 2.7K_4
R22 2.7K_4R22 2.7K_4

Stuff R713 on 2 CH.

Stuff R712 on 1 CH.

4/20 Modify

U8

6

IN

4

IN

3

ON/OFF

AAT4280-4U8AAT4280-4

R117 EV@0_4R117 EV@0_4
R116 IV@0_ 4R116 IV @0_4

2

LVDS_BLON

Q8

R168

R168

2N7002DQ82N7002D

R174 EV@0_4R174 EV@0_4
R177 IV@0_ 4R177 IV @0_4

4/16

dGPU
only

LVDS

B B

INT_TXLCLKOUT-7
INT_TXLCLKOUT+7
INT_TXLOUT0-7
INT_TXLOUT0+7
INT_TXLOUT1-7
INT_TXLOUT1+7
INT_TXLOUT2-7
INT_TXLOUT2+7
INT_LVDS_EDIDDATA7
INT_LVDS_EDIDCLK7

EV_CRT_RED19
EV_CRT_GRN19
EV_CRT_BLU19
EV_VSYNC19,23
EV_HSYNC19,23
EV_CRTDDAT19
EV_CRTDCLK19

INT_TXLCLKOUT­INT_TXLCLKOUT+
INT_TXLOUT0­INT_TXLOUT0+
INT_TXLOUT1­INT_TXLOUT1+
INT_TXLOUT2­INT_TXLOUT2+

EV_CRT_RED
EV_CRT_GRN
EV_CRT_BLU

iGPU only

RN24 IV@ 0_4P2RRN24 IV@0_4P2R
RN21 IV@ 0_4P2RRN21 IV@0_4P2R
RN22 IV@ 0_4P2RRN22 IV@0_4P2R
RN23 IV@ 0_4P2RRN23 IV@0_4P2R
RN7 IV@0 _4P2RRN7 IV@0_ 4P2R

R433 EV@0_4R433 EV@0_4
R431 EV@0_4R431 EV@0_4
R432 EV@0_4R432 EV@0_4
R455 EV@0_4R455 EV@0_4
R456 EV@0_4R456 EV@0_4
R436 EV@0_4R436 EV@0_4
R437 EV@0_4R437 EV@0_4

5/11 Swap net

43
1 2
1 2

43
1 2

43
1 2

43
1 2

43

4/29 Modify it

VGA_RED
VGA_GRN
VGA_BLU
VSYNCEV_VSYNC
HSYNCEV_HSYNC
CRTDDATAEV_CRTDDAT
CRTDCLKEV_CRTDCLK

TXLCLKOUT­TXLCLKOUT+
TXLOUT0­TXLOUT0+
TXLOUT1­TXLOUT1+
TXLOUT2­TXLOUT2+
LCD_EDIDDATAINT_LVDS_EDIDDATA
LCD_EDIDCLKINT_LVDS_EDIDCLK

+3V

5/6 Modify

C725

C725
.1u/10V_4

.1u/10V_4

C724

C724
1000p/50V_4

1000p/50V_4

+3V

+3V

INVCC0

C121

C121

4.7u/25V_8

4.7u/25V_8

R98 *0_8R98 *0_8

C231

C231
*1000p/50V_4

*1000p/50V_4

C8
.1u/10V_4C8.1u/10V_4

C786 0.22u/25V_6C786 0.22u/25V_6

C9
.1u/10V_4C9.1u/10V_4

C167

C167
1000p/50V_4

1000p/50V_4

LCDVCC

C250

C250
*1000p/50V_4

*1000p/50V_4

CRTVDD5

CRT_BYP

CRT_R1
CRT_G1
CRT_B1

1
7

8
2

3
4
5

6

CRT_SENSE#35

U33

U33

VCC_SYNC
VCC_DDC

BYP
VCC_VIDEO

VIDEO_1
VIDEO_2
VIDEO_3

GND

CM2009-02QR

CM2009-02QR

SYNC_OUT2
SYNC_OUT1

SYNC_IN2
SYNC_IN1

DDC_IN1
DDC_IN2

DDC_OUT1
DDC_OUT2

16
14

15
13

10
11

9
12

LCD_ON (LCD Power)

+3V

+5V

R147

R147

0_6

0_6

LCDVCC_R
LVDS_VDDEN

C302

C302

1U/6.3V_4

1U/6.3V_4

5/5 Add

dGPU only

EV_TXLCLKOUT-19
EV_TXLCLKOUT+19
EV_TXLOUT0-19
EV_TXLOUT0+19
EV_TXLOUT1-19
EV_TXLOUT1+19
EV_TXLOUT2-19
EV_TXLOUT2+19
EV_LVDS_DDCDAT19
EV_LVDS_DDCCLK19

C C

Brightness

EV_LVDS_BRIGHT19

L_BKLT_CTRL7

CONTRAST35

Lid Switch (HSR)

D D

1

EV_TXLCLKOUT­EV_TXLCLKOUT+
EV_TXLOUT0­EV_TXLOUT0+
EV_TXLOUT1­EV_TXLOUT1+
EV_TXLOUT2­EV_TXLOUT2+

R454 *EV@0_4R454 *EV@0_4
R453 IV@0 _4R453 IV@0_4
R452 EV@0_4R452 EV@0_4

LID591# USBP11+_R

PT3661-BB (PLC) : AL003661003
ME268-002 (FCE) : AL000268000

RN28 EV@0_4P2RRN28 EV@0_4P2R
RN25 EV@0_4P2RRN25 EV@0_4P2R
RN26 EV@0_4P2RRN26 EV@0_4P2R
RN27 EV@0_4P2RRN27 EV@0_4P2R
RN6 EV@0_4P2RRN6 EV@0_4P2R

4/29 Modify it

LVDS_BRIGHT

+3VPCU

R193

R193
*470K_4

*470K_4

4/22 add it

2

5/11 Swap net

1 2

43
43

1 2

43

1 2

43

1 2

43

1 2

1

2

3

TXLCLKOUT­TXLCLKOUT+
TXLOUT0­TXLOUT0+
TXLOUT1­TXLOUT1+
TXLOUT2­TXLOUT2+
LCD_EDIDDATAEV_LVDS_DDCDAT
LCD_EDIDCLKEV_LVDS_DDCCLK

VIN

1u/10V_4C342 1u/10V_4C342

HE1

HE1
PT3661-BB

PT3661-BB

SOT23_123-2_8-1_9

SOT23_123-2_8-1_9

3

2A

R72 *0_8R72 *0_8
R71 *0_8R71 *0_8

C115

C115
*1000p/50V_4

*1000p/50V_4

+3VPCU

INVCC0

INVCC0

C177

C177
*1000p/50V_4

*1000p/50V_4

+3V

CCD

5/6 Modfiy

4

INVCC0
LCDVCC_L

R515 2.2K_4R515 2.2K_4
R510 2.2K_4R510 2.2K_4

LCD_EDIDCLK
LCD_EDIDDATA

TXLOUT0­TXLOUT0+

TXLOUT1­TXLOUT1+

TXLOUT2­TXLOUT2+

TXLCLKOUT­TXLCLKOUT+

USBP11-_R
USBP11+_R

CCD_PWR

LVDS_BRIGHT_RLVD S _BRIGHT

L55

L55

BL_ON

SBY100505T-121Y-N

SBY100505T-121Y-N

5/21 change Connector

R146 *0_8R146 *0_8

+3V

C274

C274
*1000p/50V_4

*1000p/50V_4

USBP11-13
USBP11+13

5/24 Modify it

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

Close to USB

RN8 0_4P2RRN8 0_4P2R

43

1 2

L17

L17

443

1

1

2

*DLW21HN900S Q 2L

*DLW21HN900S Q 2L

5

CN14

CN14

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

LVDS

LVDS

CCD_PWRCCD_PWR

C700

C700
*1000p/50V_4

*1000p/50V_4

3
2

34

34

33

33

32

32

31

31

USBP11-_R
USBP11+_R

EV_LVDS_VDDEN19

INT_LVDS_DIGON7

Backlight Control

EV_LVDS_BLON19
INT_LVDS_BLON7

6

+3V

CRT_SEN#

2.2u/6.3V_6C4 2.2u/6.3V_6C4

CRTVSYNC
CRTHSYNC

+3V

1

OUT

2

GND

5

GND

LVDS_VDDEN

+3V

R167

R167
10K_4

10K_4

2

BL#

3

Q9
2N7002DQ92N7002D

1

LVDS_BLON

7

4/14 Modify

C779 *.1u/10V_4C779 *.1u/10V_4

CRTVDD5

R545

R545

2.7K_4

2.7K_4

C254

C254
*.1u/10V_4

*.1u/10V_4

R191

R191
10K_4

10K_4

BL_ON

3

1 3

1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

C11 *10p/50V_4C11 *10p/50V_4
C15 *10p/50V_4C15 *10p/50V _4
C774 10p/50V_4C774 10p/50V_4

R547

R547

C777 10p/50V_4C777 10p/50V_4

2.7K_4

2.7K_4

C174

C174
*2.2u/10V_8

*2.2u/10V_8

C201

C201
.1u/10V_4

.1u/10V_4

C202

C202

0.01U/25V_4

0.01U/25V_4

Item

AAT

GMT

D10 BAS316D10 BAS316

2

Q10

Q10
DTC144EU

DTC144EU

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

CRT/LVDS/CAMERA/LID

CRT/LVDS/CAMERA/LID

CRT/LVDS/CAMERA/LID

AL004280001

AL005243001

2 1

QCI P/N

8

CRTVDD5
CRTVSYNC
CRTHSYNC
DDCCLK_1
DDCDAT_1

LCDVCC

C175

C175

22u/6.3V_8

22u/6.3V_8

LID591# 14,35

EC_FPBACK# 35

25Monday, July 12, 2010

25Monday, July 12, 2010

25Monday, July 12, 2010

of

of

of

1A

1A

1A

43

43

43

5

iGPU HDMI LEVEL SHIFTER

IV@ --> iGPU only

EV@ --> dGPU only

D D

+3V

C16

C27

C26

C771

C771

IV@2.2u/6.3V_6

IV@2.2u/6.3V_6

+3V

C780

C780

IV@.1u/10V_4

IV@.1u/10V_4

+3V

C C

C26

IV@.1u/10V_4

IV@.1u/10V_4

close to pin2/11/15/21/26/33/40/46

C42

C42

IV@.1u/10V_4

IV@.1u/10V_4

R27 IV@4.7K_4R27 IV@4.7K_4
R28 *IV@4.7K_4R28 *IV@4.7K_4

R24 SP@4.7K_4R24 SP@4.7K_4
R32 SP@4.7K_4R32 SP@4.7K_4

R30 *IV@4.7K_4R30 *IV@4.7K_4
R34 *IV@4.7K_4R34 *IV@4.7K_4 R19 IV@0_4R19 IV@0_4

R42 *IV@4.7K_4R42 *IV@4.7K_4

Equalization Control
PC1

PC0

EQ Control

PIN4

PIN3

LL
L
HL
H

SP@SN75DP139

1.Pin34 HPDINV for 8101T Stuff R32

2.Stuff R24

3.R25 change 3.9K (CS23902FB14)

B B

8dB

H

4dB
12dB

H

0dB

C27

IV@.1u/10V_4

IV@.1u/10V_4

C43

C43

IV@.1u/10V_4

IV@.1u/10V_4

PC0

PC1

DDCBUF_EN

CFG

PC0 internal PD
PC1 internal PD
DDCBUF_EN internal PD
CFG internal PD
DDC_EN internal PU

C16

IV@.1u/10V_4

IV@.1u/10V_4

SDVO_CTRLDATA6
SDVO_CTRLCLK6

GPU Switchable Graphic HDMI source

To Discrete

R563 EV@499/F_4R563 EV@499/F_4
R564 EV@499/F_4R564 EV@499/F_4
R560 EV@499/F_4R560 EV@499/F_4
R559 EV@499/F_4R559 EV@499/F_4
R562 EV@499/F_4R562 EV@499/F_4
R561 EV@499/F_4R561 EV@499/F_4
R557 EV@499/F_4R557 EV@499/F_4

Q1

Q1

EV@2N7002D

EV@2N7002D

R558 EV@499/F_4R558 EV@499/F_4

A A

+5V

R10

R10

EV@100K_4

EV@100K_4

3

2

1

5

REV:B
6/15

from MCH

C19

C19

IV@.1u/10V_4

IV@.1u/10V_4

from MCH

Control by pin4 HPDEN_R

5/7 Add

HP-detect for
PS8101 only

INT_HDMI_HPD

4/29 Modify

2

Q26

Q26

*IV@DMN601K-7

*IV@DMN601K-7

MB_HDMITX0N
MB_HDMITX0P
MB_HDMITX1P
MB_HDMITX1N
MB_HDMITX2N
MB_HDMITX2P
MB_HDMICLK­MB_HDMICLK+

For PS8101T

HDMI_HP_IV#

SDVO_CTRLDATA HDMI_DDCDATA_SW
SDVO_CTRLCLK

+3V

HDMITX0_P
HDMITX0_N

HDMITX2_P
HDMITX2_N

HDMITX1_P
HDMITX1_N

HDMICLK_P

HDMICLK_N

R532

R532

*IV@20K/F_6

*IV@20K/F_6

3

1

+3V

4/20

HDMI_HP_IV#

R533

R533

*IV@7.5K/F_4

*IV@7.5K/F_4

4

R26 *IV@4.7K_4R26 *IV@4.7K_4

+3V

+3V

R23 IV@0_4R23 IV@0_4

R20 IV@0_4R20 IV@0_4

4

DDCBUF_EN
CFG

Active Buffer

U1

U1

37

GND

38

IN_D1-

39

IN_D1+

40

VCC

41

IN_D2-

42

IN_D2+

43

GND

44

IN_D3-

45

IN_D3+

46

VCC

47

IN_D4-

48

IN_D4+

49

GND

PC0
PC1

R25 SP@499/F_4R25 SP@499/F_4

INT_HDMI_HPD

HDMI_DDCCLK_SW

R92 *short0402R92 *short0402

From Discrete

From GMCH (iHDMI)

3

HDMI_MB_HP
MB_HDMI_DDCDATA
MB_HDMI_DDCCLK
HDMI_HPD_EC#

+3V

+3V

27

31

36

35

32

33

VCC

GND

CCT134CCT2

GND1VCC2TRIM3HPDEN4GND5REXT6HPD_S7SDA_S8SCL_S9NC10VCC11GND

+3V

PEG_RXP3

PS8101TQFN48GTR

PS8101QFN48GTR

DDC_EN

LS_REXT

Item

30

GND

HPD_SINK

25

29

26

28

OE#

VCC

GND

GND

SCL_SINK

SDA_SINK

OUT_D1-

OUT_D1+

VCC

OUT_D2-

OUT_D2+

GND

OUT_D3-

OUT_D3+

VCC

OUT_D4-

OUT_D4+

12

5/7 Modify part number

+3V

R7 *IV@100/F_4R7 *IV@100/F_4

R6 *IV@100/F_4R6 *IV@100/F_4

R8 *IV@100/F_4R8 *IV@100/F_4

R5 *IV@100/F_4R5 *IV@100/F_4

PEG_RXP3 7,18

24
23
22
21

+3V

20
19
18
17
16
15

+3V

14
13

IV@PS8101T

IV@PS8101T

QCI P/N

AL008101001

AL008101000

REV:B
6/15

MB_HDMITX0P
MB_HDMITX0N

MB_HDMITX2P
MB_HDMITX2N

MB_HDMITX1P
MB_HDMITX1N

MB_HDMICLK+
MB_HDMICLK-

MB_HDMITX2P

MB_HDMITX2N
MB_HDMITX1P

MB_HDMITX1N
MB_HDMITX0P

MB_HDMITX0N
MB_HDMICLK+

MB_HDMICLK-

SN75DP139RGZR AL000139000

Close to HDMI connector

PEG_TXP2

PEG_TXN2

PEG_TXP1

PEG_TXN1

PEG_TXP0

PEG_TXN0

PEG_TXP3

PEG_TXN3

RN36 EV@0_4P2RRN36 EV@0_4P2R

RN34 EV@0_4P2RRN34 EV@0_4P2R

RN35 EV@0_4P2RRN35 EV@0_4P2R

RN33 EV@0_4P2RRN33 EV@0_4P2R

RN5 IV@0_4P2RRN5 IV@0_4P2R

RN3 IV@0_4P2RRN3 IV@0_4P2R

RN4 IV@0_4P2RRN4 IV@0_4P2R

RN2 IV@0_4P2RRN2 IV@0_4P2R

HDMITX0N19
HDMITX0P19

HDMITX1N19
HDMITX1P19

HDMITX2N19
HDMITX2P19

HDMICLK-19
HDMICLK+19

PEG_TXP27,18
PEG_TXN27,18

PEG_TXP17,18
PEG_TXN17,18

PEG_TXP07,18
PEG_TXN07,18

PEG_TXP37,18
PEG_TXN37,18

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

6/15 Swap

43

43

43

43

43

43

43

43

5/11 Swap

Close to NB couple cap & PCIE RESARRAY

3

4/20 Modify

HDMI_HPD_EC#35

SDVO I2C Control

MXM_DDCCK_C19

MXM_DDCDAT_C19

HDMI connector

MB_HDMITX0N
MB_HDMITX0P

MB_HDMITX1N
MB_HDMITX1P

MB_HDMITX2N
MB_HDMITX2P

MB_HDMICLK­MB_HDMICLK+

HDMITX0_P
HDMITX0_N

HDMITX1_P
HDMITX1_N

HDMITX2_P
HDMITX2_N

HDMICLK_P
HDMICLK_N

12/29 Modify

+5V

5/24 Add it

F1

F1

1 2

SMD1206P110TFT

SMD1206P110TFT

1

R568

R568

EV@10K_4

EV@10K_4

R569

R569

EV@10K_4

EV@10K_4

1

+5V_HDMI_D

HDMI_MB_HP

2

+5V

R550 *10K_4R550 *10K_4

Q23

Q23

EV@BSN20

EV@BSN20

3

2

+3V

2

3

Q24

Q24

EV@BSN20

EV@BSN20

D1 SSM22LLPTD1 SSM22LLPT

R565 *SHORT_4R565 *SHORT_4

R556

R556
100K_4

100K_4

2

OE# control for
power saving

HDMI_HPD_EC#

HDMI_MB_HP

MXM_DDCCK

MXM_DDCDAT

MB_HDMITX2P
MB_HDMITX2N

MB_HDMITX1P
MB_HDMITX1N

MB_HDMITX0P
MB_HDMITX0N

MB_HDMICLK+
MB_HDMICLK-

HDMI_DDCCLK_MB
HDMI_DDCDATA_MB

+5V_HDMI
HP_DET

+3V

+3V

R15

R15

10K_4

10K_4

3

2

Q29

Q29

2N7002D

2N7002D

1

+5V

CSP@

R535 EV@0_4R535 EV@0_4

+5V

CSP@

R538 EV@0_4R538 EV@0_4

3

2

1

2 1

D29 RB501V-40D29 RB501V-40

HDMI SDVO I2C
For IV: 2.2K ohm
For ES:4.7K ohm

MB_HDMI_DDCCLK

2 1

D30 RB501V-40D30 RB501V-40

HDMI SDVO I2C
For IV: 2.2K ohm
For ES:4.7K ohm

MB_HDMI_DDCDATA

updatefootprint 4/19 ZQ2

CN21

CN21

SHELL1

1

D2+

SHELL3

2

D2 Shield

3

D2-

4

D1+

5

D1 Shield

6

D1-

7

D0+

8

D0 Shield

9

D0-

10

CK+

11

CK Shield

12

CK-

13

CE Remote

14

NC

15

DDC CLK

16

DDC DATA

17

GND

18

+5V

19

HP DET

SHELL4
SHELL2

QJ1119C-NK01-8F

QJ1119C-NK01-8F

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

26

To dGPU HPD

R542

R542

EV@10K_4

EV@10K_4

HDMI_HP_EV 19

Q28

Q28

EV@2N7002D

EV@2N7002D

R536

R536

2.2K_4

2.2K_4

R548 *SHORT_6R548 *SHORT_6

R537

R537

2.2K_4

2.2K_4

R549 *SHORT_6R549 *SHORT_6

20
22

23
21

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

HDMI (PS8101)

HDMI (PS8101)

HDMI (PS8101)

1

HDMI_DDCCLK_MB

C787

C787
*.1u/10V_4

*.1u/10V_4

HDMI_DDCDATA_MB

C788

C788
*.1u/10V_4

*.1u/10V_4

1/11 Add C928 by EMI.

+3V

C781

C781
2200p/50V_4

2200p/50V_4

26Monday, July 12, 2010

26Monday, July 12, 2010

26Monday, July 12, 2010

1A

1A

1A

43

43

43

5

4

3

2

1

SATA HDD(HDD) SATA ODD(ODD)

D D

C C

CN6

CN6

23

GND23

1

GND1

2

RXP

3

RXN

4

GND2

5

SATA_RXN0_C

6

SATA_RXP0_C

7

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

24

5/11 Modify

120mil

+5V +5V

+3V

SATA_TXN0 SATA_RXN0_C

SATA_TXP0

GND3

RSVD

GND24

SATA_HDD

SATA_HDD

TXN
TXP

3.3V

3.3V

3.3V
GND
GND
GND

GND
GND

12V
12V
12V

5V
5V
5V

5/4 change footprint (ZQ2)

+5V

+

+

C506

C506

EV@100u/6.3V_3528

EV@100u/6.3V_3528

+3V

SATA_LED#12

C514

C514

4.7u/6.3V_6

4.7u/6.3V_6

R243

R243
10K_4

10K_4

1
2

C512

C512

0.1u/16V_4

0.1u/16V_4

U9

U9
TC7SH08FU

TC7SH08FU

53

4

0.01u/16V_4C508 0.01u/16V_4C508

0.01u/16V_4C513 0.01u/16V_4C513

U13

U13
*CM1293A-04SO

*CM1293A-04SO

1

CH1

2

VN
CH23CH3

C499

C499
*4.7u/6.3V_6

*4.7u/6.3V_6

C511

C511

0.1u/16V_4

0.1u/16V_4

SATA_LED#_R

For ESD

CH4

VP

SATA_TXP0 12
SATA_TXN0 12

SATA_RXN0 12
SATA_RXP0 12

6
5
4

SATA_RXP0_C

C354

C354
*4.7u/6.3V_6

*4.7u/6.3V_6

C510

C510

0.01u/16V_4

0.01u/16V_4

CN5

CN5

C314

C314

C18534-11305-L

*0.1u/16V_4

*0.1u/16V_4

C509

C509 R249 182/F_4R249 182/F_4

0.01u/16V_4

0.01u/16V_4

C18534-11305-L

+5V

5/12 UMA no stuff5/12 UMA no stuff

14

GND14

1

GND1

2

RXP

3

RXN

4

GND2

5

TXN

6

TXP

7

GND3

8

DP

9

+5V

10

+5V

11

RSVD

12

GND

13

GND

15

GND15

+

+

C526

C526

EV@100u/6.3V_3528

EV@100u/6.3V_3528

SATA_RXN1_C
SATA_RXP1_C

SATA_DP

+5V

SATA_RXP1_C

SATA_RXN1_C

C527

C527
10u/6.3V_8

10u/6.3V_8

R305 *1K_4R305 *1K_4

1
2

C528

C528

0.1u/16V_4

0.1u/16V_4

0.01u/16V_4C529 0.01u/16V_4C529

0.01u/16V_4C525 0.01u/16V_4C525

For ESD

U14
*CM1293A-04SO

*CM1293A-04SO

CH1

CH4

VP

VN
CH23CH3

120mil

C524

C524

0.1u/16V_4

0.1u/16V_4

SATA_TXP1 12
SATA_TXN1 12

SATA_RXN1 12
SATA_RXP1 12

6

SATA_TXP1

5
4

SATA_TXN1

C523

C523

0.1u/16V_4

0.1u/16V_4

+5V

C522

C522

0.1u/16V_4

0.1u/16V_4

LED(UIF)

SUSLED#35

PWRLED#35

BATLED1#35
BATLED0#35

WLAN_LED#28

5/5 Modify

Power/Suspend: Green/Amber

LED1

R212 330_4R212 330_4
R215 330_4R215 330_4U14

R220 330_4R220 330_4
R232 330_4R232 330_4

D15 AMBERD15 AMBER

SATA_LED#_R

D13 BuleD13 Bule

D8 BuleD8 Bule

LED1

4
3

LED_A/B

LED_A/B
LED2

LED2

4
3

LED_A/B

LED_A/B

4/28 DEL CAPS and NUM LED

DEL D2 4/29

D1 Power LED near PW SW

Power LED

1
2

Battery LED

1
2

R226 *1M_6R226 *1M_6
R229 *1M_6R229 *1M_6

R246 182/F_4R246 182/F_4

R61 182/F_4R61 182/F_4

4/22 modify

27

+3V_S5

+3VPCU

4/28 Add WiFi LED
4/29 change to amber

+3V

Modify it 4/26

R244 *0_4R244 *0_4

B B

FAN(THM)

+3V

R399

R399
10K_4

+5V

R405 *0805R405 *0805

U22

2.2u/6.3V_6C630 2.2u/6.3V_6C630

THER_OVERT#3
PWM_FAN135

A A

PWM_FAN1

R402 0_4R402 0_4

U22

1
4

G991

G991

VIN2VO
FON#
VSET

GND
GND
GND
GND

3
5
6
7
8

FANPWR = 1.6*VSET

5

30 MIL

C633

C633
22u/6.3V_8

22u/6.3V_8

FANSIG35

TH_FAN_POWER

C636

C636

0.01u/16V_4

0.01u/16V_4

1000p/50V_4

1000p/50V_4

4

C628

C628

change footpirnt as SA6
4/23

10K_4

CN12

CN12

1
234

FAN

FAN

5

TP CONN

TP_LEFT#

TP_RIGHT#

SW3

SW3

3

TP_RIGHT#

1 4

3

TPDATA35

TPCLK35

D11 *Uclamp0511P_4_ESDD11 *Uclamp0511P_4_ESD

D16 *Uclamp0511P_4_ESDD16 *Uclamp0511P_4_ESD

2
5

6

MISAKI_SW_H1.5

MISAKI_SW_H1.5

21

21

TP_LEFT#

SW2

SW2

3
1 4

MISAKI_SW_H1.5

MISAKI_SW_H1.5

R302 4.7K_4R302 4.7K_4
R304 4.7K_4R304 4.7K_4

L40 BK1608LL121_6_150mAL40 BK1608LL121_6_150mA
L41 BK1608LL121_6_150mAL41 BK1608LL121_6_150mA

2
5

6

2

R301 0_6R301 0_6

+5V+5V

TPDATA_R
TPCLK_R

C520

C518

C518
10p/50V_4

10p/50V_4

C520
10p/50V_4

10p/50V_4

4/30 update footprint ZQ9

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

HDD/ODD/LED/SW/TP/FAN/MMB

HDD/ODD/LED/SW/TP/FAN/MMB

HDD/ODD/LED/SW/TP/FAN/MMB

Date: Sheet

Date: Sheet

Date: Sheet

0.1u/16V_4C515 0.1u/16V_4C515

TP_VCC

TP_RIGHT#

TP_LEFT#

25mil

1

CN4

CN4

1
2
3
4
5
6
7
8
9

10

13

11

14

12

Aces88501-120N

Aces88501-120N

27Monday, July 12, 2010

27Monday, July 12, 2010

27Monday, July 12, 2010

of

of

of

1A

1A

1A

43

43

43

1

MINI-CARD(MPC)

PCIRST#13

PCLK_DEBUG2

A A

B B

C C

TV use +3V

PCIE_TXP413

PCIE_TXN413

PCIE_RXP413

PCIE_RXN413

CLK_PCIE_MINI12
CLK_PCIE_MINI1#2

MINI_CLKREQ#2

+5V_TV-CARD

TV use +5V

+5V

R508 *0_6R508 *0_6

+3V

PCIE_WAKE#14,31

R94 *0_6R94 *0_6

+3V

R520 *0_6R520 *0_6
R519 *0_6R519 *0_6

PCIE_WAKE_WL_R_#

+3VSUS

2

P$PLO PLO

+5V_TV-CARD

C712

C712
*4.7u/6.3V_6

*4.7u/6.3V_6

C738

C738

C131

C131

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

4.7u/6.3V_6

2

+3V_MINI_R_A

*0.1u/16V_4C176 *0.1u/16V_4C176

+5V_TV-CARD_R_A
+5V_TV-CARD_R_B

Q4

Q4
*DTC144EUA

*DTC144EUA

13

C715

C715
*0.1u/16V_4

*0.1u/16V_4

C740

C740
*4.7u/6.3V_6

*4.7u/6.3V_6

3

4/21 change footprint andy(ZYD) H=7.0

CN15

CN15

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

15
13
11

9
7
5
3
1

53

MINICARD_A

MINICARD_A

R99

R99

4.7K_4

4.7K_4

PCIE_WAKE_WL_R_#

+1.5V

C149

C149

0.1u/16V_4

0.1u/16V_4

C739

C739
*4.7u/6.3V_6

*4.7u/6.3V_6

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

GND
REFCLK+
REFCLK­GND
CLKREQ#
Reserved
Reserved
WAKE#
PAD53

C735

C735

0.1u/16V_4

0.1u/16V_4

LED_WWAN#

C736

C736

0.1u/16V_4

0.1u/16V_4

C741

C741

0.1u/16V_4

0.1u/16V_4

LED_WPAN#

+3.3V

GND

+1.5V

LED_WLAN#

GND

USB_D+

USB_D-

GND

SMB_DATA

SMB_CLK

+1.5V

GND

+3.3Vaux

PERST#

Reserved

GND

Reserved
Reserved
Reserved
Reserved
Reserved

+1.5V

GND

+3.3V

PAD54

PDAT_SMB2,14,16

C737

C737

4.7u/6.3V_6

4.7u/6.3V_6

PCLK_SMB2,14,16

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

16
14
12
10
8
6
4
2
54

C145

C145

0.1u/16V_4

0.1u/16V_4

+1.5V

WLAN_LED#

WLAN_LED#

MINI_SMDATA
MINI_SMCLK

RF_EN

+3V

3

R80 *0_4R80 *0_4

+3V

3

R78 *0_4R78 *0_4

C147

C147

*10p/50V_4

*10p/50V_4

2

2

4

R89

R89

*22_4

*22_4

R81

R81

10K_4

10K_4

1

Q3

Q3
DMN601K-7

DMN601K-7

R79

R79

10K_4

10K_4

1

Q2

Q2
DMN601K-7

DMN601K-7

+3V

WLAN_LED# 27

USBP4+ 13
USBP4- 13

PLTRST# 13,31,33,35
RF_EN 35

LFRAME# 12,35
LAD3 12,35
LAD2 12,35
LAD1 12,35
LAD0 12,35

For EMI

PCLK_DEBUG

MINI_SMDATA

MINI_SMCLK

5

Bluetooth
(BTM-3.0)

BT_POWERON#35

Bluetooth
(BTM-2.1)

EXT. USB(USB)

USBP3+13

USBP3-13

BT_POWERON#

USBP7+13

USBP7-13

4/22 add it

6

+3V

+3VSUS

R276 *short0402R276 *short0402

+3V

+3VSUS

R573 *short0402R573 *short0402

R275 *0_6R275 *0_6

1

Q14 AO3413Q14 AO3413

3

2

Close to USB

RN11 0_4P2RRN11 0_4P2R

1 2

L35

L35

443

1

1

*DLW21HN900SQ2L

*DLW21HN900SQ2L

5/22 SWAP net

R572 *0_6R572 *0_6

1

Q30 AO3413Q30 AO3413

3

2

Close to USB

1 2

RN37 0_4P2RRN37 0_4P2R

L69

L69

1

1
443

*DLW21HN900SQ2L

*DLW21HN900SQ2L

Modify 6/15
REV:B

C531 10u/10V_8C531 10u/10V_8

1u/10V_4C530 1u/10V_4C530

USBOC#613

USBP2-_R
USBP2+_R

USBP0-_R
USBP0+_R

USBON#35

7

BT_POWER

43

3
2

2

USBP3+_R
USBP3-_R

T85T85

Modify follow ZQ1 5/5

BT_POWER_1

43

2

2

3

+5VPCU

T151T151

USBP7+_R
USBP7-_R

5/11 update footprint

PLO

C480

C480

4.7u/6.3V_6

4.7u/6.3V_6

BT_LED

C532

C532
*0.01u/16V_4

*0.01u/16V_4

PLO

C792

C792

4.7u/6.3V_6

4.7u/6.3V_6

BT_LED_1

C793

C793
*0.01u/16V_4

*0.01u/16V_4

CN7

CN7

161718
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

USB_DBFFCCONN

USB_DBFFCCONN

8

28

CON5_BT_L

CON5_BT_L

5

5

4

4

3

3

2

2

1

1

CN8

CN8

CON5_BT_L

CON5_BT_L

5

5

4

4

3

3

2

2

1

1

CN22

CN22

7

7

6

6

7

7

6

6

Close to USB

USBP2-13

USBP2+13

+

C775

+

C775

PLO

L5

L5
TI201209G121_8_3A

TI201209G121_8_3A

+

+

C18

C18
*100u/6.3V_3528

*100u/6.3V_3528

QCI P/N

AL000547000

AL008015K00

USBP6+

D4 *PESD5V0U1BLD4 *PESD5V0U1BL

USBP6-

D3 *PESD5V0U1BLD3 *PESD5V0U1BL

4

USBPWR1

C21

C21
*470p/50V_4

*470p/50V_4

12
12

USBP0-13

USBP0+13

5

INT. USB(USB)

Close to USB

USBP6-13

USBP6+13

RN1 0_4P2RRN1 0_4P2R

1

*DLW21HN900SQ2L

*DLW21HN900SQ2L

5/22 SWAP net

D D

C17 10u/10V_8C17 10u/10V_8

1u/10V_4C25 1u/10V_4C25

USBON#

1

updatefootprint 4/19 ZQ2

1 2

L4

L4

443
1

+5VPCU

43

3
2

2

U2

U2
G547F2P81U

G547F2P81U

2

IN1
IN23OUT2

4

EN#

1

GND

9

GND-C

USBP6-_R
USBP6+_R

8

OUT3

7
6

OUT1

5

OC#

USBOC#1013

2

USBPWRP1

PLO

USBPWR1

USBOC#10

CN18

CN18

1

1

2

2

3

3
445

USB_MB

USB_MB

R17 *6.34K/F_4R17 *6.34K/F_4

Add it 4/26

8

8

7

7

6

6

5

C10

C10
470p/50V_4

470p/50V_4

100U/25V_6.3X5.8

100U/25V_6.3X5.8

Item

GMT

ROH

3

USBP2­USBP2+

USBP0+

6

RN13 0_4P2RRN13 0_4P2R

1 2

L39

L39

1

*DLW21HN900SQ2L

*DLW21HN900SQ2L

Close to USB

RN12 0_4P2RRN12 0_4P2R

1 2

L38

L38

1

*DLW21HN900SQ2L

*DLW21HN900SQ2L

5/22 SWAP net

443
1

1
443

43

2

43

2

USBP2-_R
USBP2+_R

3
2

USBP0-_RUSBP0­USBP0+_R

2
3

4/29 Modify it

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Numbe r Rev

Size Document Numbe r Rev

Size Document Numbe r Rev

MINI/USB/BT/HOLE

MINI/USB/BT/HOLE

MINI/USB/BT/HOLE

Date: Sheet

Date: Sheet

Date: Sheet

7

1A

1A

1A

28Monday, July 12, 2010

28Monday, July 12, 2010

28Monday, July 12, 2010

of

43

of

43

of

43

8

5

Codec(ADO)

D D

+5VA

ADOGND

Place next to pin 38

C C

C74

C74
10u/6.3V_6

10u/6.3V_6

HP

C76

C76

0.1u/10V_4

0.1u/10V_4

HPOUT_JD30

5/10 Add

ADOGND

ANALOG

DIGITAL

Split by DGND

EAPD#

Split by DGND

HP-R30
HP-L30

MONO-OUT

R53 20K/F_4R53 20K/F_4

ADOGND

T4T4

+3V

R50 5.1K/F_4R50 5 .1 K /F_ 4

FRONT-L= (L+R)/2

5/11 Del FRONT-R

Speaker

FRONT-L

U3

U3

37

MONO-OUT

38

AVDD2

39

SURR-L

40

JDREF

41

SURR-R

42

AVSS2

43

NC

44

DMIC-CLK3/4

45

SPDIFO2

46

DMIC-CLK1/2

47

EAPD

48

SPDIFO1

C64

C64

C75

C75

0.1u/10V_4

0.1u/10V_4

10u/6.3V_6

10u/6.3V_6

SENSEB

ADOGND

C55

C55

+

+

2.2u/6.3V_6

2.2u/6.3V_6

30

34

32

31

33

35

36

CBN

CPVEE

Sense B

FRONT-L

HPOUT-L

FRONT-R

HPOUT-R

ALC272X<LQFP-48>

ALC272X<LQFP-48>

DVDD11DMIC-1/2/GPIO02DMIC-3/4/GPIO13DVSS14SDATA-OUT5BIT-CLK6DVSS27SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

Place next to pin 1

B B

C52

C52

ADOGND

+

+

2.2u/6.3V_6

2.2u/6.3V_6

28

29

26

27

CBP

VREF

AVSS1

MIC1-VREFO

LINE2-VREFO

LINE1-VREFO

C51 *22p/50V_4C51 *22p/50V_4

4/29 Add it

ACZ_SDIN0_R

C59 22p/50V_4C59 22p/50V_4

4

MIC1-VREFO 30

Place next to pin 27

25

AVDD1

24

LINE1-R

23

LINE1-L

22

MIC1-R

21

MIC1-L

20
19

MIC2-VREFO

18
17

MIC2-R

16

MIC2-L

15

LINE2-R

14

LINE2-L

13

Sense A

12

R49 22_4R49 22_4

C48

C48

C50

C50

10u/6.3V_6

10u/6.3V_6

0.1u/10V_4

0.1u/10V_4

MIC2_INT_L

ANALOG

DIGITAL

1.6Vrms

C38 1u /1 0V_6C38 1u/10V_ 6

+5VA

Place next to pin 25

C44

C44

C41

C41

0.1u/10V_4

0.1u/10V_4

10u/6.3V_6

10u/6.3V_6

T3T3

ADOGND

T2T2

MIC1-R

MIC1-R 30

MIC1-L

MIC1-L 30

MIC2-VREFO

C40 1U-16V_6C40 1U-16V_6
C39 1U-16V_6C39 1U-16V_6

R40

R40

4.7K_4

4.7K_4

MIC1_JDSENSEA

R39 20K /F_ 4R39 20K/F_4

BEEP_1PCBEEP

C32

C32
100p/50V_4

100p/50V_4

ACZ_SYNC_AUDIO 12

ACZ_SDIN0 12

ACZ_SDOUT_AUDIO 12

ACZ_BITCLK_AUDIO 12

MIC

MIC2_INTL1_RMIC2_INT_R

MIC1_JD 30

R43 47K/F_4R43 47K/F_4

ACZ_RST#_AUDIO 12

C49

C49
*100p/50V_4

*100p/50V_4

R41 1K_ 4R41 1K_4

3

MIC2_INTL1

PCSPK 14

C53

C53

C54

C54

10u/6.3V_6

10u/6.3V_6

0.1u/10V_4

0.1u/10V_4

Place next to pin 9

REV:B
6/11

R570 IV@0_6R570 IV@0_6
R47 EV@0_6R47 EV@0_6

+1.5V
+3V

MUTE(AMP)

5/11 Modfiy it

MONO-OUT

C747 0.47u/10V_6C747 0.47u/10V_6
C68 *0.47u/10V_6C68 *0.47u/10V_6

C69 0.47u/10V_6C69 0.47u/10V_6

ADOGND

Vender

GMT

GMT

2

INSPKR+

R530 36K/F_6R530 36K/F_6

REV:B
6/11 Modify

FRONT-R-1

R55 33K/F_6R55 33K/F_6

FRONT-R+1 FRONT-R+2

R56 33K/F_6R56 33K/F_6

INSPKR-

R57 36K/F_6R57 36K/F_6

REV:B
6/11 Modify

QCI P/N

+5V_S5

EAPD#

1
2

R87 *0_4R8 7 *0_4

AMP_MUTE#35

AL001453000

AL001465000

FRONT-R-2FRONT-L

R85 *100K_4R85 *100K_4
R86 *0_4R86 *0_4

+5V_S5

53

U6

4

TC7SH08FUU6TC7SH08FU

+5VA

U5

15

LIN-

7

RIN-

16

LIN+

8

RIN+

14

SHDN#

G1453LU5G1453L

R84 0_4R84 0_ 4

C111

C111

0.1u/10V_4

0.1u/10V_4

2

VCC

ADOGND

11

VCC

THERMALPAD

3

17

C154

C154

*4.7u/10V_6

*4.7u/10V_6

VSS

1

C128

C128

0.1u/10V_4

0.1u/10V_4

13

BYPASS

RVO1
RVO2
LVO1
LVO2

VSS

10

NC6NC

C129

C129

0.1u/10V_4

0.1u/10V_4

ADOGND

5
12
9
1
4

HP_MUTE# 30

C86

C86

4.7U/6.3V_6

4.7U/6.3V_6

4.7U/6.3V_6C81 4.7U/6.3V_6C81

INSPKR+ 30
INSPKR- 30

29

ADOGND

5/6 modify

Power (ADO)

+5VA

C732

C732

0.1u/10V_4

0.1u/10V_4

ADOGND

R31 *0_6R31 *0_6
R54 *0_6R54 *0_6
R74 *0_6R74 *0_6
R88 *0_6R88 *0_6
R534 *0_6R534 *0_6
R16 *0_6R16 *0_6
R82 0_6R82 0_6
R531 0_6R531 0_6
C13 *1000p/50V_4C13 *1000p/50V_4
C34 *1000p/50V_4C34 *1000p/50V_4

ADOGND

Tied at one point only under
the codec or near the codec

4

+5V

A A

C727

C727

C730

C730

+

+

10u/10V_3216

10u/10V_3216

0.1u/10V_4

0.1u/10V_4

L62 UPB201209T-310Y-N/6A/31ohm_8L62 UPB201209T-310Y-N/6A/31ohm_8

3
2
1

R83 **0_4R83 **0_4

C730, C787 close U37 pin3 and L65

5

U29

U29

IN
GND
SHDN

*G923-330T1UF

*G923-330T1UF

ANALOG DIGITAL

4

OUT

5

ADOGND

R527 *29.4K/F_4R527 *29.4K/F_4

R526

R526
*10K/F_4

*10K/F_4

+

+

C734

C734
10u/10V_3216

10u/10V_3216

SET

INT MIC

CN1

CN1

1
2

INT_MIC

INT_MIC

ADOGND

ADOGND

cap place close to MIC-connector

3

5/7 update the footprint name

1

MIC2_INTL1 MIC2-VREFO

2

C132

C132
*22P_4

*22P_4

5/26 update Mic Partnumber

C73 0.1u/10V_4C73 0.1u/10V_4

R77

R77

2.2K_4

2.2K_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

REALTEK ALC663&888/MDC

REALTEK ALC663&888/MDC

REALTEK ALC663&888/MDC

Date: Sheet of

Date: Sheet of

2

Date: Sheet

1

1A

1A

1A

of

43

29Monday, July 12, 2010

43

29Monday, July 12, 2010

43

29Monday, July 12, 2010

5

MIC

MIC1-VREFO29

D D

MIC1-L29

C30 4.7u/6.3V_6C30 4.7u/6.3V_6
C768 4.7u/6.3V_6C768 4.7u/6.3V_6

D2 BAS316D2 BAS316
D5 BAS316D5 BAS316

MIC1_L2

R33 1K/F_4R33 1K/F_4

MIC1_R2

R541 1K/F_4R541 1K/F_4

Max. 100mVrms input for Mic-IN

MIC1_JD

12

D31

D31
*VPORT_6

*VPORT_6

R29

R29

4.7K/F_4

4.7K/F_4

MIC1_JD29

4

R543

R543

4.7K/F_4

4.7K/F_4

MIC1_L3

L7

L7
BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4
L67

L67
BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4

C776

C776
470p/50V_4

470p/50V_4

ADOGND

3

4/21
change footprint (ZQ2)

Normal OPEN Jack

PINK

MIC1_L
MIC1_RMIC1_R3

MIC1_JD

C33

C33
470p/50V_4

470p/50V_4

ADOGND

1

CN17

CN17

2
6
3
4

5

JAS7331-P30H9-7F

JAS7331-P30H9-7F

7

8

2

Internal Speaker

INSPKR-29
INSPKR+29MIC1-R29

5/5 Modify

R387 0_6R387 0_6
R386 0_6R386 0_6

C607

C607

*0.22u/25V_6

*0.22u/25V_6

C608

C608

*0.22u/25V_6

*0.22u/25V_6

1

R_SPK-_1
R_SPK+_1

Modify it 5/4

30

SPEAKER-CONN

SPEAKER-CONN

2

2

1

1

CN11

CN11

C C

ADOGND

HP_MUTE#29

HP/SPDIF

2

Q252N7002K Q252N7002K

1

CN16

CN16

HP-L-2

R51 56/F_4R51 56/F_4

HP-R-2

R45 56/F_4R45 56/F_4

B B

HPL-1
HPR-1

R44

R44
*1K_4

*1K_4

L11 BLM15AG121SS1/0.5A/120ohm_4L11 BLM15AG121SS1/0.5A/120ohm_4
L9 BLM15AG121SS1/0.5A/120ohm_4L9 BLM15AG121SS1/0.5A/120ohm_4

C65

R52

R52
*1K_4

*1K_4

C45

C45
2200p/50V_4

2200p/50V_4

C65
2200p/50V_4

2200p/50V_4

ADOGND

HPL_SYS
HPR_SYS

HPOUT_JD29

HPOUT_JD

ADOGND

2
6
3
4

5

JAS7331-P30H9-7F

JAS7331-P30H9-7F

Normal OPEN Jack

7

8

HP-L29

HP-R29

4/29 Modify

3

R48 *0_6R48 *0_6

HP_MUTE#

3

R46 *0_6R46 *0_6

6/18 change it andy
REV:B

HPOUT_JD

12

D6

D6

A A

*VPORT_6

*VPORT_6

1

HP-L-2

2

Q272N7002K Q272N7002K

1

HP-R-2

ADOGND

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

AMP /AUDIO JACK CONN

AMP /AUDIO JACK CONN

AMP /AUDIO JACK CONN

1

30Monday, July 12, 2010

30Monday, July 12, 2010

30Monday, July 12, 2010

1A

1A

1A

of

43

of

43

of

43

5

4

3

2

1

Giga-LAN BCM57780

31

U32

U32

+3V_S5

D D

VAUX_12

C C

5/19 Modify

C757 27p/50V_4C757 27p/50V_4

C758 27p/50V_4C758 27p/50V_4

LAN_CLKREQ#2

1.2H

L6

L6

BLM18AG601SN1D_6

BLM18AG601SN1D_6

L63

L63

BLM18AG601SN1D_6

BLM18AG601SN1D_6

L8

L8

BLM18AG601SN1D_6

BLM18AG601SN1D_6

GLAN_RXP13
GLAN_RXN13

GLAN_TXP13
GLAN_TXN13

PCIE_WAKE#14,28

PLTRST#13,28,33,35
CLK_PCIE_LAN2
CLK_PCIE_LAN#2

12

Y6
25MHzY625MHz

+3V

R546 0_4R546 0_4

C762 0.1u/10V_4_X7RC762 0.1u/10V_4_X7R
C759 0.1u/10V_4_X7RC759 0.1u/10V_4_X7R

VAUX_12

15mil

4.7U/6.3V_6C22 4.7U/6.3V_6C22

0.1u/10V_4_X7RC28 0.1u/10V_4_X7RC28

15mil

4.7U/6.3V_6C760 4.7U/6.3V_6C760

0.1u/10V_4_X7RC763 0.1u/10V_4_X7RC763

15mil

4.7U/6.3V_6C36 4.7U/6.3V_6C36

0.1u/10V_4_X7RC37 0.1u/10V_4_X7RC37

R13 1K/F_4R13 1K/F_4
R551 4.7K_4R551 4.7K_4

R539 200_4R539 200_4

R540 1.24K/F_4R540 1.24K/F_4

R544 *4.7K_4R544 *4.7K_4

+3V_S5

BCM_CLKREQ#

AVDDL

GPHY_PLLVDD

PCIE_PLLVDD

PCIE_RXP1_LAN_R
PCIE_RXN1_LAN_R

VMA_PRES
LOW_PWR

XTALO
XTALI

RDAC

42

VDDO

6

VDDC

15

VDDC

41

VDDC

27

AVDDL

33

AVDDL

39

AVDDL

24

GPHY_PLLVDDL

18

PCIE_PLLVDDL

21

PCIE_PLLVDDL

17

PCIE_TXDP

16

PCIE_TXDN

22

PCIE_RXDP

23

PCIE_RXDN

4

WAKE#

2

PERST#

20

PCIE_REFCLK_P

19

PCIE_REFCLK_N

40

VMAIN_PRSNT

1

LOW_PWR

13

XTALO

12

XTALI

26

RDAC

3

CLK_REQ#

BCM57780

BCM57780

7mm X 7mm

7mm X 7mm
48-Pin QFN

48-Pin QFN

GND

49

SPD100LED#
SPD1000LED#
TRAFFICLED#

BCM57780

BCM57780

BIASVDDH

XTALVDDH

AVDDH
AVDDH

TRD3_N
TRD3_P

TRD2_N
TRD2_P

TRD1_N
TRD1_P

TRD0_N
TRD0_P

LINKLED#

MODE

EECLK

EEDATA

SR_LX

SR_VFB

SR_VDDP

SR_VDD

NC

15mil

25

BIASVDD

L65 BLM18AG601SN1D_6L65 BLM18AG601SN1D_6

XTALVDD

AVDDH

BCM_EEC
BCM_EED

C12

C12

4.7U/6.3V_6

4.7U/6.3V_6

0.1u/10V_4_X7RC764 0.1u/10V_4_X7RC764
L64 BLM18AG601SN1D_6L64 BLM18AG601SN1D_6

0.1u/10V_4_X7RC761 0.1u/10V_4_X7RC761
L68 BLM18AG601SN1D_6L68 BLM18AG601SN1D_6

0.1u/10V_4_X7RC784 0.1u/10V_4_X7RC784

0.1u/10V_4_X7RC24 0.1u/10V_4_X7RC24

LAN_TRD3N 32
LAN_TRD3P 32

LAN_TRD2N 32
LAN_TRD2P 32

LAN_TRD1N 32
LAN_TRD1P 32

LAN_TRD0N 32
LAN_TRD0P 32

LAN_LINKLED#

LAN_ACTLED#

L66 4.7uhL66 4.7uh

+3V_S5

C20

C20

0.1u/10V_4_X7R

0.1u/10V_4_X7R

14

30
36

37
38

35
34

31
32

29
28

48
47
46
45

5

44
43

11
8

10
9

7

+3V_S5

LAN_LINKLED# 32

LAN_ACTLED# 32

VAUX_12

C47

C47

C46

C46

0.1u/10V_4_X7R

0.1u/10V_4_X7R

Don't route under Choke.

10u/6.3V_6

10u/6.3V_6

B B

LAN POWER

+3V_S5

4.7U/6.3V_6C785 4.7U/6.3V_6C785

0.1u/10V_4_X7RC766 0.1u/10V_4_X7RC766

A A

VAUX_12

20mil

4.7U/6.3V_6C31 4.7U/6.3V_6C31

0.1u/10V_4_X7RC35 0.1u/10V_4_X7RC35

0.1u/10V_4_X7RC23 0.1u/10V_4_X7RC23

0.1u/10V_4_X7RC769 0.1u/10V_4_X7RC769

EEPROM

BCM_EED
BCM_EEC

+3V_S5

R567

R567
*1K_4

*1K_4

R555

R555
1K_4

1K_4

REV:B
6/11

R566

R566
1K_4

1K_4

R554

R554
*1K_4

*1K_4

U34

U34

5
6

7
4

*AT24C02

*AT24C02

SDA
SCL

WP
GND

VCC

A0
A1
A2

1
2
3

8

+3V_S5

C790

C790

0.1u/10V_4_X7R

0.1u/10V_4_X7R

EEPROM Strapping

EEPROM Type

24LC02

5

4

EECLK EEDATA

11

10Internal

3

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GLAN BCM57780

GLAN BCM57780

GLAN BCM57780

Date: Sheet

Date: Sheet

2

Date: Sheet

1

1A

1A

1A

of

43

of

43

of

43

31Monday, July 12, 2010

31Monday, July 12, 2010

31Monday, July 12, 2010

1

2

3

4

5

6

7

8

4/27 modify it

TRANSFORMER

LAN_TRD0P31

C753

C753

0.1u/10V_4_X7R

0.1u/10V_4_X7R

A A

C755

C755

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C754

C754

0.1u/10V_4_X7R

0.1u/10V_4_X7R

C756

C756

0.1u/10V_4_X7R

0.1u/10V_4_X7R

LAN_TRD0N31

LAN_TRD1P31

LAN_TRD1N31

LAN_TRD2P31

LAN_TRD2N31

LAN_TRD3P31

LAN_TRD3N31

LAN_TRD0P
LAN_TRD0N

LAN_TRD1P
LAN_TRD1N

LAN_TRD2P
LAN_TRD2N

LAN_TRD3P
LAN_TRD3N

U31

U31

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+

6

TD2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

TRANSFORMER

TRANSFORMER

MCT1
MX1+

MX1-

MCT2
MX2+

MX2-

MCT3
MX3+

MX3-

MCT4
MX4+

MX4-

24

23

22

21

20

19

18

17

16

15

14

13

R37

R35

R35
75/F_8

75/F_8

R36

R36
75/F_8

75/F_8

R37
75/F_8

75/F_8

X-TX0P
X-TX0N

X-TX1P
X-TX1N

X-TX2P
X-TX2N

X-TX3P
X-TX3N

R38

R38
75/F_8

75/F_8

32

4/21 change Part number
DB0Z06LAN00 (follow Z08)

C29

C29
1500p/3KV_18

1500p/3KV_18

B B

RJ45 Conn

CN19

CN19

9

10

1
2
3
4
5
6
7
8

11
12

YELLOW_N
YELLOW_P

0+
0­1+
2+
2­1­3+
3-

GREEN_N
GREEN_P

RJ45

RJ45

3

GND2
GND1

14

R9 *0_6R9 *0_6

13

R12 *0_6R12 *0_6

4

C789

C789

2

LAN_ACTLED#
LAN_ACT_LED_PWR

X-TX0P
X-TX0N
X-TX1P
X-TX2P
X-TX2N
X-TX1N
X-TX3P
X-TX3N

LAN_LINKLED#
LAN_LNK_LED_PWR

LAN_ACTLED#
LAN_LINKLED#

*0.1u//50V_8

*0.1u//50V_8

C C

D D

LAN_ACTLED#31

LAN_LINKLED#31

+3V_S5

+3V_S5

1

R18 220_8R18 220_8

R552 220_8R552 220_8

C14

C14
*0.1u//50V_8

*0.1u//50V_8

For EMI

5

LAN_TRD0P
LAN_TRD0N
LAN_TRD1P
LAN_TRD1N
LAN_TRD2P
LAN_TRD2N
LAN_TRD3P
LAN_TRD3N

6

C765 *10p/50V_4C765 *10p/50V_4
C767 *10p/50V_4C767 *10p/50V_4
C772 *10p/50V_4C772 *10p/50V_4
C770 *10p/50V_4C770 *10p/50V_4
C773 *10p/50V_4C773 *10p/50V_4
C778 *10p/50V_4C778 *10p/50V_4
C782 *10p/50V_4C782 *10p/50V_4
C783 *10p/50V_4C783 *10p/50V_4

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Docu ment Number Re v

Size Docu ment Number Re v

Size Docu ment Number Re v

LAN Transformer and RJ45

LAN Transformer and RJ45

LAN Transformer and RJ45

Date: Sheet

Date: Sheet

Date: Sheet

7

1A

1A

1A

of

43

of

43

of

32Monday, July 12, 2010

32Monday, July 12, 2010

32Monday, July 12, 2010

8

43

A

B

C

D

E

CARD READER Controller

2 IN 1 CARD READER (SD/MMC)

33

4 4

5/10 modify

VCC_XD

SD_WP
SD_CD#

SD_DAT1
SD_DAT0

SD_CLK

SD_CMD
SD_DAT3
SD_DAT2

10

9
8
7
6
5
3
2
1

SD-CARD

SD-CARD

CN2

CN2

DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
DATA3
DATA2

4

CD/SW

11

12

WP/SW

SW COM

GND13GND1

14

5/10 Del R40001

VCC_XD

C284

C284

4.7u/10V_6

Clock input selection
'1' for 48MHz input [Default,Internal PU]
'0' for 12MHz input

+1.8V_VDD

R496 *0_4R496 *0_4

3 3

PLTRST#13,28,31,35

R514 0_6R514 0_6

+3V

2 2

XTALSEL

8/14 ZH7 remove R136, R591 and C775

+3V_VDD

R500 *100K_4R500 *100K_4

C704

C704
*5p/50V_4

*5p/50V_4

R501 0_4R501 0_4

C701

C701

4.7u/10V_6

4.7u/10V_6

USBP1+13
USBP1-13

C702

C702
*5p/50V_4

*5p/50V_4

crystal trace width needs at least 10 mils.

R504

R504
*270K_4

*270K_4

XI

XO

C703 *18p/50V_4C703 *18p/50V_4

C706 *18p/50V_4C706 *18p/50V_4

Y5
*12MHzY5*12MHz

+3V_VDD

+3V_VDD

*0.47u/10V_6C686 *0.47u/10V_6C686

CLK_Card482

+1.8V_VDD

8/14 C707 close PIN11, 12

8/14 pin13 output 20mils

4/20 Modify

R502 330_4R502 330_4

+3V_VDD

C743 close PIN46, 47

C708 close PIN48, 47

C681

C681

0.1u/16V_4

0.1u/16V_4

XI
XO

U26

U26

1
2
3
4
5
6
7
8

9
10
11
12

C705

C705

4.7u/10V_6

4.7u/10V_6

C682

C682

0.1u/16V_4

0.1u/16V_4

GPON7
EXT48IN
RSTN
REXT
VD33P
DP
DM
VS33P
XI
XO
VDD
VDD

C713

C713

4.7u/10V_6

4.7u/10V_6

48

VDDHM

V1813CF_V33

47

14

VCC_XD

VCC_XD

T137T137

XTALSEL

CRMD_N

44

46

45

VDD

GND

TRIST

XTALSEL

AU6437-GBL

AU6437-GBL

V3317VDD20SDWPEN

VCC33

AGND5V

15

16

T143T143

CTRL3

NBMD

CTRL1

43

41

NBMD

CTRL142CTRL3

GND

VDDHM

19

18

C714

C714

0.1u/16V_4

0.1u/16V_4

40

21

DATA1

DATA0

39

DATA1

CTRL4

38

DATA0

DATA7

XDCDN22EEPCLK

23

37

24

DATA6

CTRL0
DATA5
CTRL2

GPI4
DATA4
DATA3
DATA2

XDWPN

GPI2

XDCEN

EEPDATA

GPI1

EEPCLK

+1.8V_VDD
+3V_VDD

5/10 Modify

CTRL0, CRTL 1 trace length shorter ,
and surround with GND.

36

CTRL0

35
34

CTRL2

33

GPI4

32
31

DATA3

30

DATA2

29
28

GPI2

27
26

EEPDATA

25

GPI1

T150T150

SD write protect
1:decided by SDWP[Default]
0:letting SD always
write-able

T142T142

T147T147
T148T148

T149T149

R513*0_4 R513*0_4

Main DFHS11FR011

Second DFHS11FR033

Close to CN14 pin 14 & pin23

4.7u CAP close to pin23

5/10 change Card Redaer conn
footpirnt sdcard-sdsn09-08-xa-11p-smt

DATA0 SD_DAT0

DATA1 SD_DAT1

DATA2 SD_DAT2

CTRL0 SD_CLK

CTRL2 SD_CMD

CTRL3 SD_CD#

4.7u/10V_6

Close to connector

R143

R143
BLM15AG121SS1/0.5A/120ohm_4

BLM15AG121SS1/0.5A/120ohm_4

C277

C277

0.1u/16V_4

0.1u/16V_4

SD_DAT3DATA3

SD_WPCTRL1

C270

C270
*10p/50V_4

*10p/50V_4

1 1

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

AU6433 CardReader

AU6433 CardReader

AU6433 CardReader

Date: Sheet

Date: Sheet

A

B

C

D

Date: Sheet

E

1A

1A

1A

33Monday, July 12, 2010

33Monday, July 12, 2010

33Monday, July 12, 2010

of

43

of

43

of

43

5

4

3

2

1

(OTH)

67
5
4

34

HOLE13

HOLE10

HOLE10
*H-C315D118P2

*H-C315D118P2

1

D D

HOLE8

1

HOLE8
H-C256D161P2

H-C256D161P2

HOLE5

HOLE5

*HG-C315D110P2

*HG-C315D110P2

8
9

123

HOLE19

HOLE19

*HG-C315D118P2

*HG-C315D118P2

8
9

123

HOLE12

HOLE12
H-C256D161P2

H-C256D161P2

5/21 Modify

C C

5/21 Modify

HG-C315D154P2

HG-C315D154P2

8
9

HOLE16

HOLE16
H-C256D161P2

H-C256D161P2

1

HOLE15

HOLE15

67
5
4

123

HOLE20

HOLE20
*H-C315I178D118P2

*H-C315I178D118P2

1

HOLE14

HOLE14
*H-C1417D1417N

*H-C1417D1417N

1

HOLE17

HOLE17
H-C197D87P2

H-C197D87P2

1

67
5
4

67
5
4

HOLE9

HOLE9
*H-TC205BC276D146P2

*H-TC205BC276D146P2

1

5/25 Modify

HOLE1

HOLE1

*HG-C315D118P2

*HG-C315D118P2

8
9

123

1

67
5
4

HOLE6

HOLE6
*H-TC205BC276D146P2

*H-TC205BC276D146P2

HOLE21

HOLE21

*HG-C315D118P2

*HG-C315D118P2

8
9

123

1

67
5
4

HOLE7

HOLE7
*H-TC205BC276D146P2

*H-TC205BC276D146P2

HOLE3

HOLE3

*HG-C315D118P2

*HG-C315D118P2

8
9

123

7/08 Add for ME.

HOLE22

HOLE22
*h-o94x134d94x134n

*h-o94x134d94x134n

1

HOLE4

HOLE4
*H-C315D118P2

*H-C315D118P2

1

1

HOLE11

HOLE11

*HG-C315D118P2

*HG-C315D118P2

67
5
4

67
5

8

4

9

123

7/08 Modify for ESD issue.

HOLE13
*H-C315D118P2

*H-C315D118P2

1

HOLE18

HOLE18
*H-C315I178D118P2

*H-C315I178D118P2

1

HOLE2

HOLE2

*HG-C315D118P2

*HG-C315D118P2

8
9

123

B B

+1.05V +VGPU_CORE+3V_S5 +1.5V_SUS

C503

C427

C427
*0.1u/10V_4

*0.1u/10V_4

C503

*1000p/50V_4

*1000p/50V_4

C368

C368

*1000p/50V_4

*1000p/50V_4

C77

C77

*1000p/50V_4

*1000p/50V_4

For EMI(EMI)

A A

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

MINI/USB/BT/HOLE

MINI/USB/BT/HOLE

MINI/USB/BT/HOLE

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet of

1

1A

1A

1A

34Monday, July 12, 2010

34Monday, July 12, 2010

34Monday, July 12, 2010

43

of

43

of

43

5

EC(KBC)

+3VPCU

R293 2.2_6R293 2.2_6

PCLK_591

D D

R300

R300
*22_4

*22_4

C507

C507
*10p/50V_4

*10p/50V_4

+3VPCU

RP1 10K_10P8RRP1 10K_10P8R

10

9

MX4

8

MX5 MX1

7 4

MX6
MX7

CN3

CN3

1

28

1

28

2

27

2

27

3

3

4

4

5

5

C C

5/12 add GND pin

6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

FFC_26P_KB

FFC_26P_KB

6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

5/11 Swap

CP2

CP2

1
3
5
7 8

*220PX4

*220PX4

CP3

CP3

1
3
5
7 8

*220PX4

*220PX4

CP5

CP5

1
3
5
7 8

*220PX4

*220PX4

CP7

CP7

1
3
5
7 8

*220PX4

*220PX4

CP6

CP6

1
3
5
7 8

*220PX4

*220PX4

CP4

CP4

1
3
5
7 8

*220PX4

*220PX4

CP1

CP1

1
3
5
7 8

*220PX4

*220PX4

2
4
6

2
4
6

2
4
6

2
4
6

2
4
6

2
4
6

2
4
6

B B

A A

1
2
3

56

+3VPCU

MY10
MY11
MY12
MY13

ICH_SUSCLK14

MY8
MY9

MY4
MY5
MY6
MY7

MX0
MX1
MX2
MX3

MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3

MY14
MY15
MY16
MY17

+3VPCU_EC

C500

C500

4.7u_6

4.7u_6

MX3
MX2

MX0

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

5

L37 BK1608HS220_6_1AL37 BK1608HS220_6_1A

30mil

Modify on 9/15

0.03A(30mils)

C519

C519

C505

C505

*0.1u/16V_4

*0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

LFRAME#12,28

LAD012,28
LAD112,28
LAD212,28
LAD312,28

PCLK_5912

CLKRUN#14

GATEA2012

RCIN#12

EC_SCI#14

EC_FPBACK#25

CRT_SENSE#25

PLTRST#13,28,31,33

SERIRQ14

KBSMI#14

Modfiy 4/19

T78T78

R279 0_6R279 0_6

E775AGND

C498

C498

0.1u/16V_4

0.1u/16V_4

MBCLK36

MBDATA36

2ND_MBCLK3

2ND_MBDATA3

TPCLK27

TPDATA27

BT_POWERON#28

MAINON21,38,40,42

VGA_THERM#23

R277 *20M_6R277 *20M_6

Y1

1 4

*32.768KHzY1*32.768KHz

C493

C493
*15p_4

*15p_4

E775AGND

C504

C504

C497

C497

*0.1u/16V_4

*0.1u/16V_4

0.1u/16V_4

0.1u/16V_4

LFRAME#
LAD0
LAD1
LAD2
LAD3
PCLK_591

EC_FPBACK#
CRT_SENSE#
PLTRST#
USBON#
IRQ_SERIRQ

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

MBCLK
MBDATA
2ND_MBCLK
2ND_MBDATA

TPCLK
TPDATA
PCH_ACIN

VGA_THERM#
E775_32KX1

E775_32KX2

R278

R278
*33K/F_4

*33K/F_4

C494

C494
*15p_4

*15p_4

POWER-ON Switch

NBSWON#

4

C502

C502

0.1u/16V_4

0.1u/16V_4

U12

U12

3

LFRAME

126

LAD0

127

LAD1

128

LAD2

1

LAD3

2

LCLK

8

GPIO11/CLKRUN

121

GA20

122

KBRST

29

ECSCI/GPIO54

6

GPIO24/LDRQ

124

GPIO10/LPCPD

7

LREST

123

GPIO67/PWUREQ

125

SERIRQ

9

GPIO65/SMI

54

KBSIN0

55

KBSIN1

56

KBSIN2

57

KBSIN3

58

KBSIN4

59

KBSIN5

60

KBSIN6

61

KBSIN7

53

KBSOUT0/JENK

52

KBSOUT1/TCK

51

KBSOUT2/TMS

50

KBSOUT3/TDI

49

KBSOUT4/JEN0

48

KBSOUT5/TDO

47

KBSOUT6/RDY

43

KBSOUT7

42

KBSOUT8

41

KBSOUT9

40

KBSOUT10

39

KBSOUT11

38

KBSOUT12/GPIO64

37

KBSOUT13/GPIO63

36

KBSOUT14/GPIO62

35

KBSOUT15/GPIO61/XOR_OUT

34

GPIO60/KBSOUT16

33

GPIO57/KBSOUT17

70

GPIO17/SCL1

69

GPIO22/SDA1

67

GPIO73/SCL2

68

GPIO74/SDA2

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27PSDAT2

12

GPIO25/PSCLK3

13

GPIO12/PSDAT3

77

32KX1/32KCLKIN

79

32KX2

WPCE781

WPCE781

21

D7
*VPORT_6D7*VPORT_6

4

+A3VPCU

C501

C501

4.7u/10V_6

4.7u/10V_6

19

46

76

88

VCC1

VCC2

VCC3

SW1

SW1
MISAKI_SW_H1.5

MISAKI_SW_H1.5

1
3

115

102

VCC4

VCC5

AVCC

GND1

5

18

BK1608HS220_6_1A

BK1608HS220_6_1A

E775AGND

3

+3V

D23

D23

BAS316

BAS316

4

VDD

GPI90/AD0
GPI91/AD1

A/D

A/D

D/A

D/A

LPC

LPC

GPIO

GPIO

KB

KB

TIMER

TIMER

SPI

SPI

IR

IR

SMB

SMB

PS/2

PS/2

FIU

FIU

GND2

GND3

GND4

GND5

GND6

45

78

89

103

116

L36

L36

GPI92/AD2

GPI93/AD3
GPIO05/AD4
GPIO04/AD5

GPI94/DA0

GPI95/DA1

GPI96/DA2

GPI97/DA3

GPIO01/TB2
GPIO03/AD6

GPIO06

GPIO07/AD7

GPIO23/SCL3

GPIO30/CIRTX2

GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM

GPIO36/TB3

GPIO40/F_PWM

GPIO42/TCK

GPIO43/TMS

GPIO44/TDI

GPIO45/E_PWM

GPIO46/CIRRXM/TRST

GPO47/SCL4
GPIO50/TDO

GPIO51/TA3

GPIO52/CIRTX2/RDY

GPIO53/SDA4

GPIO81

GPO82/TRIS

GPO84/BADDR0

GPIO41

GPIO56/TA1
GPIO20/TA2
GPIO14/TB1

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM

GPIO66/G_PWM

GPIO77/SPI_DI

GPO76/SPI_DO/SHBM

GPIO75/SPI_SCK

GPIO72/IRRX1/SIN2

GPIO70/IRRX2_IRSL0

GPIO71/IRTX/SOUT2

GPIO87/CIRRXM/SIN_CR

GPIO34/CIRRXL

GPIO16/CIRTX

GPO83/SOUT_CR/BADDR1

F_SDI

F_SDO

F_CS0
F_SCK

GPIO55/CLKOUT

VCC_POR

VREF

VCORF

AGND

44

VCORF_uR

C517

C517
1u_4

1u_4

C521

C521

C516

C516

0.1u/16V_4

0.1u/16V_4

4.7u_6

4.7u_6

97
98

WL_SW

99

TPD_TRIP

100
108

DIGVOL_UP

96

DIGVOL_DN

101

POWER_SAVE

105
106

TP_LED#

107

TP_SW#

64
95

NBSWON#

93
94
119
109

ACPRN_ACLED

120
65
66
15
16
17

VGPU_ON

20
21

3G_SW

22
23

3G_WKAE_1

24

VIN_ON

25
26
27
28

EC_ODD_EN

91
110
112

RF_LED_EN#

80

3G_WKAE_2

31

RTC_EC

117
63

32
118

NUMLED#

62
81

CAPSLED#

84

ODD_EJ

83

SHBM_R

82

Back_SW

75

RSMRST#_uR

73
74

PWROK_EC_uR

113
14

CIRR_X2

114

HWPG

111

P_SAVE_LED#

86

SPI_SDI_uR

87
90

SPI_CS0#_uR

92

SPI_SCK_uR_R

30

ECDB_CLOCK

85

VCC_POR#

104

VREF_uR +A3VPCU

Modify to 1000P on 9/17
No stuff 1000P on 4/29

C495 *1000P_4C495 *1000P_4
C496 0.01u/16V_4C496 0.01u/16V_4

T62T62
T63T63

T65T65
T61T61

T81T81
T64T64

T67T67

Del ACPRN on 9/18

T70T70

T77T77

CPUFAN#

T75T75
T71T71

T74T74
T69T69

T66T66
T58T58

Del DP_HPD_EC#

R303 100K_4R303 100K_4

T80T80
T57T57

4/28 Modfiy it

T60T60
T59T59

R288 *Short_4R288 *Short_4
R287 *Short_4R287 *Short_4

T76T76
T68T68

R283 22_4R283 22_4
R284 22_4R284 22_4

T72T72

R282 47K/F_4R282 47K/F_4

R290 *Short_4R290 *Short_4

ICMNTE775AGND

TEMP_MBAT 36

ICMNT 36

PWM_FAN1 27

4/22 add

ACIN 36
LID591# 14,25

SUSB# 6,14

VGA_DATA 23
BATLED0# 27USBON#28
BATLED1# 27
VR_ON 39
SUSLED# 27

AMP_MUTE# 29

T73T73

Del VIN_ON on 4/19

D/C# 36

S5_ON 37,44

HDMI_HPD_EC# 26
DNBSWON# 14

RTC_EC 12
SUSON 40,42

FANSIG 27
CONTRAST 25
PWRLED# 27

RSMRST# 14

SUSC# 6,14
PWROK_EC 14

RF_EN 28

SPI_SDO_uRSPI_SDO_uR_R
SPI_SCK_uR

+3VPCU

Change Pin 98 to WL_SW
Pin99 for SML1ALERT#
on 9/10

VGA_CLK 23

4/22 DEL PWM

4/21 add

SM BUS ARRANGEMENT TABLE

Battery

SM Bus 1

PCH

SM Bus 2

VGA Thermal

SM Bus 3

SM Bus 4

POWER-ON PA D(UIF)

2
4
5
6

NBSWON#

G1

G1

1 2

*SHORT_PAD

*SHORT_PAD

3

POWER-Smart Key (UIF)

DEL it 5/5

2

VGPU_ON 21,41,43

2

1

I/O ADDRESS SETTING

SHBM=0: Enable shared memory with host BIOS

SHBM

1/13 Comfirm by vendor m ai l :
Disabled ('1') if using FWH device on LPC.
Enabled ('0') if using SPI flash for both syst em BI O S and EC fi r mware

SM BUS PU

Change pull-up resistor (R148
/R154) from 10K to 4.7Kohm

SHBM_R

MBCLK
MBDATA

2ND_MBCLK
2ND_MBDATA

VGA_CLK
VGA_DATA

R289 10K_4R289 10K_4

R281 4.7K_4R281 4.7K_4
R286 4.7K_4R286 4.7K_4

4/20 Modify

R285 4.7K_4R285 4.7K_4
R280 4.7K_4R280 4.7K_4

R297 2.2K_4R297 2.2K_4
R299 2.2K_4R299 2.2K_4

SPI FLASH

R291 22_4R291 22_4

SPI_SDI_uR

R294 100K_4R294 100K_4

SPI_SDI_uR pull-down 100Kohm at B-test

1/13 Comfirm by vendor m ail :
If the Southbridge enables 'Long Wait Abort' by
default, the flash device should be 50MHz (or faster)

+3VPCU

R292 10K_4R292 10K_4

SPI_SDI_uR_R
SPI_SDO_uR
SPI_SCK_uR
SPI_CS0#_uR

2
5
6
1

At 11/24 add
Winbond W25X16AVSSIG AKE38FP0N01
MXIC MX25L1605DM2I-12G AKE38FP0Z00
AMIC A25L016M-F AKE38ZN0800

HWPG

D22 BAS316D22 BAS316
D21 BAS316D21 BAS316
D20 BAS316D20 BAS316
D19 BAS316D19 BAS316
D17 EV@BAS316D17 EV@BAS316
D18 EV@BAS316D18 EV@BAS316

Add

HWPG_1.8V42
HWPG_1.05V38
HWPG_1.5V6,40
SYS_HWPG37
PG_1.5V_EN43
dGPU_PWROK21

INTERNAL KEYBOA RD STRIP SET

R296 10K_4R296 10K_4

MY0

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

WPCE81 & FLASH

WPCE81 & FLASH

WPCE81 & FLASH

Date: Sheet

Date: Sheet

Date: Sheet

1

U11

U11

SO
SI
SCK
CE

W25X16AVSSIG

W25X16AVSSIG

+3V

R298

R298

10K_4

10K_4

+3VPCU

+3V

+3V

Modify on 4/19

VDD

HOLD

WP

VSS

HWPG

R295

R295
*Short_4

*Short_4

35

+3VPCU

8
7
3
4

MPWROK 6,14

+3VPCU

35Monday, July 12, 2010

35Monday, July 12, 2010

35Monday, July 12, 2010

C492

C492

0.1u/16V_4

0.1u/16V_4

of

of

of

1A

1A

1A

43

43

43

5

SP@POWER_JACK

SP@POWER_JACK

dcjk-2dc2003-000111-3p-v

dcjk-2dc2003-000111-3p-v

PJ2

PJ2

1
2

3

456

7

D D

PC166

PC166

0.1u/50V_6

0.1u/50V_6

PC168

PC168

2200p/50V_6

2200p/50V_6

EMI Add 4/26

PC158

PC158

*47u/25V_6.3*6

*47u/25V_6.3*6

PL12

PL12

HI0805R800R-00_8

HI0805R800R-00_8

PL13

PL13

HI0805R800R-00_8

HI0805R800R-00_8

Modfiy 4/28 andy
ZH9

Item

Color

65W

Yellow

90W

Blue

C C

B B

4/21
change footprint (ZQ3)

C114F3-108A1-L_Batt_Conn

C114F3-108A1-L_Batt_Conn

1

10

2
3
4
5
6
7
89

PJ1

PJ1

PR26

PR26
*0/short_4

*0/short_4

A A

PU6

PU6
CM1293A-04SO

CM1293A-04SO

1

CH1

2

VN
CH23CH3

Add ESD diode base on EC FAE suggestion

MBAT+

CH4

VP

QCI P/N

DFPJ06MR012

DFPJ06MR013

PC20

PC20

47p/50V_6

47p/50V_6

PR30

PR30
100_4

100_4

6

MBDATA

5

+3VPCU

4

MBCLKTEMP_MBAT

5

ACIN35

PC18

PC18

0.1u/50V_6

0.1u/50V_6

12

PC17

PC17

100p/50V_6

100p/50V_6

PR27

PR27
100_4

100_4

PC19

PC19
47p/50V_6

47p/50V_6

PR29

PR29
100_4

100_4

MBCLK

MBDATA

Modfiy 4/19 andy

+3VPCU

PR131

PR131
100K_4

100K_4

PL1

PL1

HI0805R800R-00_8

HI0805R800R-00_8

PL2

PL2

HI0805R800R-00_8

HI0805R800R-00_8

TEMP_MBAT

PR28

PR28
100K_4

100K_4

VA1

PC165

PC165

0.1u/50V_6

0.1u/50V_6

PD1

PD1
SW1010CPT

SW1010CPT

BAT-V

+3VPCU

4

MBDATA35

MBCLK35

PR78

PR78

49.9/F_6

49.9/F_6

PR149

PR149

82.5K/F_4

82.5K/F_4

PR150

PR150
22K/F_4

22K/F_4

TEMP_MBAT 35

4

PD10

PD10

SBR1045SP5-13

SBR1045SP5-13

1
2

88731ACSET88731ACSET88731ACSET88731ACSET

PC106

PC106

*1u/16V_6

*1u/16V_6

DCINDCIN

3

2 1

+3VPCU

PC100

PC100

0.1u/50V_6

0.1u/50V_6

PC105

PC105

0.01u/50V_6

0.01u/50V_6

PD11

PD11
SMAJ20A

SMAJ20A

0.1u/50V_6

0.1u/50V_6

PC104

PC104
*0.01u/50V_6

*0.01u/50V_6

PC88

PC88

PC12

PC12

0.1u/50V_6

0.1u/50V_6

CSIN_1

CSIP_1

1

11

VDDSMB

9

SDA

10

SCL

13

ACOK

22

DCIN

2

ACIN

3

VREF

4

ICOMP

5

NC

6

VCOMP

PR142

PR142

2.21K/F_4

2.21K/F_4

PC110

PC110

0.01u/50V_6

0.01u/50V_6

VA2VA2VA2VA2

VA2VA2VA

NC

PR67

PR67
10/F_4

10/F_4

GND33GND32GND31GND

PR19

PR19
220K_4

220K_4

PR17

PR17
220K_4

220K_4

0.1u/50V_6

0.1u/50V_6

CSIP

28

30

CSSP

NC

7

PC101

PC101

ISL88731A

ISL88731A

3

CSIN

27

CSSN

PU3

PU3

ICM

8

ICMNT

3

1 6
2
3

PQ5

PQ5

IMD2AT108

IMD2AT108

PR72

PR72
10/F_4

10/F_4

26

VCC

UGATE

PHASE

NC

14

ICMNT 35

PR16

PR16

0.01_3720

PR20

PR20
SHORT_PAD_4

SHORT_PAD_4

88731B_1

PR87

PR87
10/F_4

10/F_4

PC86

PC86

0.1u/50V_6

0.1u/50V_6

PR86

PR86
10/F_4

10/F_4

0.01_3720

1 2

PR14

PR14
*0/short_4

*0/short_4

PC85

PC85
1u/16V_6

1u/16V_6

PD6

PD6
*RB500V-40

*RB500V-40

0.1u/50V_8

0.1u/50V_8

5
4

PR92

PR92

4.7_6

4.7_6

ISL88731_VDDP

21

VDDP

BOOT

LGATE

PGND

CSOP

CSON

NC

VBF
GND
GND

12

PQ56

PQ56
FDD6685

FDD6685

43

1

PC90

PC90

1u/16V_6

1u/16V_6

25

88731B_2

24

ISL88731_UGATE

23

ISL88731_PHASE

20

ISL88731_LGATEISL88731_LGATEISL88731_LGATEISL88731_LGATE

19

18

CSOP

17

CSON

16

15
29

PR124

PR124

2.7_6

2.7_6

PR125

PR125
*0/short_4

*0/short_4

ISL88731 thermal pad
tie to Pin12

PC58

PC58

CSOP_1

PR174

PR174
100_4

100_4

Close to PR9002

PR21

PR21
SHORT_PAD_4

SHORT_PAD_4

BAT-V

2

Add 5/14

CSIN_1
CSIP_1

D/C# 35

578

2200p/50V_6

2200p/50V_6

PQ25

PQ25
AO4468

AO4468

3 6

241

578

PQ26

PQ26
AO4468

AO4468

3 6

241

Modify 6/18

BAT-V

2

PC65

PC65

PC64

PC64

10u/25V_1206

10u/25V_1206

PR81

PR81
*4.7_6

*4.7_6

PC59

PC59
*680p/50V_6

*680p/50V_6

PC5

PC5

0.1u/50V_6

0.1u/50V_6

EMI Add 4/22

PC79

PC79

*10u/25V_1206

*10u/25V_1206

PL4

PL4

6.8uH

6.8uH

CSOP_1
BAT-V

1

VIN

PC6

PC6

2200p/50V_6

2200p/50V_6

VIN

PC74

PC74

*10u/25V_1206

*10u/25V_1206

0.01_3720

0.01_3720
PR160

PR160

1 2

PC27

PC27

2200p/50V_6

2200p/50V_6

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Charger(ISL88731A)

Charger(ISL88731A)

Charger(ISL88731A)

Date: Sheet

Date: Sheet

Date: Sheet

PQ39

PQ39
FDD6685

FDD6685

PR40

PR40
33K/F_4

33K/F_4

2

PQ15

PQ15
DMN601K-7

DMN601K-7

PC124

PC124

10u/25V_1206

10u/25V_1206

1

1

PR39

PR39
10K_4

10K_4

3

1

36

43

PC119

PC119

10u/25V_1206

10u/25V_1206

36Monday, July 12, 2010

36Monday, July 12, 2010

36Monday, July 12, 2010

of

of

of

BAT-VBAT-V

1A

1A

1A

43

43

43

5

SUSD
MAIND

D D

VIN

+

+

PC94

PC94
100u/25V_6X7.7

100u/25V_6X7.7

OCP:7A

5.4A

+5VPCU

Change footprint 5/14

C C

B B

+5VPCU

PC23

PC23
*10u/25V_1206

*10u/25V_1206

+

+

PC134

PC134
330u/6.3V_6X5.7

330u/6.3V_6X5.7

OCP:7A

L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
~2.525A

Iocp=7-(2.525/2)=5.74A
Vth=5.74A*14.2mOhm=0.08147V
R(Ilim)=(81.47mV*10)/5uA=163K

PC26

PC26

2.2n/50V_6

2.2n/50V_6

PR167

PR167
*0_4

*0_4

PC21

PC21

0.1u/50V_6

0.1u/50V_6

PR44

PR44
*0/short_4

*0/short_4

SUSD 42
MAIND 40,42

*10u/25V_1206

*10u/25V_1206

SYS_SHDN#3,44

PC25

PC127

PC127

PL8

PL8

2.2uH_7X7X3

2.2uH_7X7X3 PR91

PC128

PC128
*680p/50V_6

*680p/50V_6

PC25

10u/25V_1206

10u/25V_1206

Modify 6/18

PR175

PR175
*4.7_6

*4.7_6

PD2

PD2
*SX34

*SX34

+5VPCU_FB

4

VL

PR169

PR169

*0/short_4

*0/short_4

PR168

PR168

*0/short_4

*0/short_4

578

PQ14

PQ14
AO4468

AO4468

3 6

241

5V_LX SKIP

578

PQ13

PQ13
AO4710

AO4710

3 6

241

PC48

PC48

0.1u/50V_6

0.1u/50V_6

+15V

PR80

PR80
22_8

22_8 PR145

5V_EN

5V_DH

5V_DL

3V5V_EN

+15V_ALWP

12

3V_EN

PR156

PR156
39K/F_4

39K/F_4

PR143

PR143
*0/short_4

*0/short_4

PD3

PD3
CHN217

CHN217

PD4

PD4
CHN217

CHN217

1 2

PR43

PR43
169K/F_4

169K/F_4

PC121

PC121

0.1u/50V_6

0.1u/50V_6

2

1

2

1

PC51

PC51

0.1u/50V_6

0.1u/50V_6

PR158

PR158
390K_4

390K_4

PR159

PR159
150K_4

150K_4

+5VPCU

0.1u/50V_6

0.1u/50V_6

3

3

1 2

DDPWRGD_R

PC43

PC43

PR77

PR77
*200K/F_4

*200K/F_4

PC117

PC117

0.1u/50V_6

0.1u/50V_6

8206_ONLDO

5V_EN

PR164

PR164
1/F_6

1/F_6

1 2

PR46

PR46
*0_6

*0_6

PC42

PC42

0.1u/50V_6

0.1u/50V_6

3

9
10
11
12
13
14
15
16
37
36

PC116

PC116

0.01u/16V_4

0.01u/16V_4

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD

35

VL

PC112

PC112
1u/16V_6

1u/16V_6

VL

1 2

1 2

5

7

4

6

8

NC

VIN

LDO

LDOREFIN

PU4

PU4
RT8206B

RT8206B

BST117DL118PVCC19NC20GND21PGND22DL223BST2

PAD33PAD34PAD

12

PR47

PR47
*39K/F_4

*39K/F_4

PC122

PC122

4.7u/10V_8

4.7u/10V_8

PR153

PR153
*0/short_4

*0/short_4

1 2

3

TON2VCC

ONLDO

PR170

PR170

1

REF

REFIN2

PGOOD2

24

*0/short_6

*0/short_6

PR50

PR50
*0/short_6

*0/short_6

PC109

PC109

0.1u/50V_6

0.1u/50V_6

REF

ILIM2
OUT2
SKIP#

EN2

DH2

LX2

1 2

2

PR157

PR157
*0/short_4

*0/short_4

12

PR148

PC108

PC108

0.1u/50V_6

0.1u/50V_6

PR57

PR57
220K/F_4

220K/F_4

PR148
*0_4

*0_4

3V_DL

3V_DH

3V_LX

SKIP

578

3 6

578

3 6

+3VPCU_OUT

1 2

PR55

PR55
*0_4

*0_4

1 2

PR56

PR56
*0/short_4

*0/short_4

PR151

PR151
*0_6

*0_6

32
31
30
29
28
27
26
25

PR152

PR152
1/F_6

1/F_6

PC111

PC111
1u/16V_6

1u/16V_6

REFIN2

1 2

DDPWRGD_R

3V_EN

OCP:9A

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)=1.9A
Iocp=9-(1.9/2)=8.05A
Vth=8.05A*14.2mOhm=0.11431V
R(Ilim)=(114.31mV*10)/5uA=228.62K
I_peak(choke)=11.479A

PQ21

PQ21
AO4468

AO4468

241

PD5

PD5
*SX34

*SX34

Modify 6/18

241

PQ22

PQ22
AO4710

AO4710

REF

PR146 *0/short_4PR146 *0/short_4
PR147 *0_4PR147 *0_4

PC52

PC52

2.2n/50V_4

2.2n/50V_4

Change footprint 5/14

PL3

PL3

2.2uH_7X7X3

2.2uH_7X7X3

PR91
*4.7_6

*4.7_6

PC63

PC63
*680p/50V_6

*680p/50V_6

1 2
1 2

+3VPCU

PR144

PR144
*100K/F_4

*100K/F_4

DDPWRGD_R

PR145
*0/short_4

*0/short_4

PC53

PC53
10u/25V_1206

10u/25V_1206

+3VPCU

1 2

1 2

PR140

PR140
*0_4

*0_4

PR141

PR141
*0_4

*0_4

1

PC95

PC95

0.1u/50V_6

0.1u/50V_6

SYS_HWPG 35

VIN

OCP:9A

37

7A

+3VPCU

+

+

PC84

PC84

330u/6.3V_6X5.7

330u/6.3V_6X5.7

I_peak(choke)=11.187A

+15VVIN

PR32

PR32
1M_6

1M_6

3

PQ9

PQ9

1

DMN601K-7

DMN601K-7

VIN

PR31

PR31
*1M_6

*1M_6

S5D MAIND MAIND

PC22

PC22
*2.2n/50V_4

*2.2n/50V_4

+5V_S5+3V_S5

PR36

PR34

PR34
1M_6

1M_6

A A

S5_ON35,44

2

PQ7

PQ7

DTC144EU

DTC144EU

PR33

1 3

PR33
1M_6

1M_6

PR36
22_8

22_8

3

2

PQ10

PQ10
DMN601K-7

DMN601K-7

1

PR35

PR35
22_8

22_8

3

1

PQ11

PQ11
DMN601K-7

DMN601K-7

2

2

+5VPCU

3

2

PQ8

PQ8
AO3404

AO3404

1

+5V_S5

0.002A

5

4

+5VPCU

578

3 6

3

+3VPCU

578

PQ42

PQ42
AO4468

AO4468

241

+5V

PQ28

PQ28
AO4468

AO4468

3 6

241

S5D

+3V

4.01A2.4A

+3VPCU

578

3 6

2

Modfiy 4/19 andy

PQ24

PQ24
AO4468

AO4468

241

+3V_S5

SUSD

2.8A

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet

+3VPCU

3

2

PQ23

PQ23
AO3404

AO3404

1

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

SYSTEM 5V/3V (RT8206)

SYSTEM 5V/3V (RT8206)

SYSTEM 5V/3V (RT8206)

0.21A

+3VSUS

37Monday, July 12, 2010

37Monday, July 12, 2010

1

37Monday, July 12, 2010

1A

1A

1A

of

43

43

43

5

4

3

2

1

38

[PWM]

VIN

PC136

PC136

0.1u/50V_6

0.1u/50V_6

OCP:20A

16A

+1.05V

PR171

PR171

*0/short_6

*0/short_6

R1

+5V_S5

PC126

PC126
1u/16V_6

1u/16V_6

PD7

PD7
RB500V-40

RB500V-40

PC125

PC125

0.1u/50V_6

0.1u/50V_6

UGATE-1.05V

PHASE-1.05V

LGATE-1.05V

PR48

PR48

4.02K/F_4

4.02K/F_4

PC113

PC113

4.7u/6.3V_6

4.7u/6.3V_6

PR37

PR37

3.9K/F_4

3.9K/F_4

PQ41

PQ41
AOL1718

AOL1718

PC115

PC115
*33p/50V_6

*33p/50V_6

5

4

PC130

PC129

213

PQ40

PQ40
AOL1448

AOL1448

5

4

213

PC129

2.2n/50V_4

2.2n/50V_4

PR177

PR177
*4.7_6

*4.7_6

PC133

PC133
*680p/50V_6

*680p/50V_6

PC130

10u/25V_1206

10u/25V_1206

PL9

PL9
1uH

1uH

10u/25V_1206

10u/25V_1206

+

+

PC135

PC135

560u/2.5V

560u/2.5V

PC24

PC24

PC137

PC137

*10u/10V_8

*10u/10V_8

D D

PR161

PR161
10_6

10_6

PR42

PR42
1M/F_4

1M/F_4

PU5

PU5
UP6111AQDD

PR38

PR38
*0/short_4

MAINON21,35,40,42

PR162

C C

HWPG_1.05V35

B B

PR162
*10K/F_4

*10K/F_4

+3V

*0/short_4

PC120

PC120
*0.1u/50V_6

*0.1u/50V_6

PC114

PC114
1u/16V_6

1u/16V_6

PC118

PC118

*1000p/50V_6

*1000p/50V_6

UP6111AQDD

15

EN/DEM

16

TON

1

VOUT

2

VDD

3

FB

4

PGOOD

6

GND

5

NC

14

NC

1.05V_FB

BOOT

UGATE

PHASE

VDDP

LGATE

PGND

TPAD

PR172

PR172

2.2/F_6

2.2/F_6

13
12
11
10

OC

9
8
7
17

PR49

PR49
10K/F_4

10K/F_4

R2

07/06 modify to short-pad.

PR217

PR217
*0/short_6

*0/short_6

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)

A A

TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

5

L(ripple current)
=(19-1.05)*1.05/(1u*272k*19)
~3.647A

RILIM=4.3mohm*20-1.823/20uA=3.907Kohm
I(choke)peak=23.647A

4

PR154

PR154
*0/short_6

*0/short_6

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

3

2

Date: Sheet

+1.05V (UP6111A)

+1.05V (UP6111A)

+1.05V (UP6111A)

1

1A

1A

1A

of

43

of

43

of

38Monday, July 12, 2010

38Monday, July 12, 2010

38Monday, July 12, 2010

43

5

+3VPCU +3VPCU

PR123

PR98

PR98

*0_4

*0_4

H_VID6 H_VID0H_VID3 H_VID2H_VID5 H_VID4 H_VID1

D D

PR94

PR94

PR123

*0_4

*0_4

PR126

PR126

*0_4

*0_4

*0_4

*0_4

PR97

PR97

*0_4

*0_4

07/06 modify to short-pad.

PR218

PR218
*0/short_8

*0/short_8
PR112

PR112
*0/short_8

*0/short_8

+5V_S5

PR113

PR113

4.99K/F_6

PC69

PC69

0.1u/50V_6

0.1u/50V_6

4.99K/F_6

PGD_INPWR_MON

PR84

PR84
10/F_6

10/F_6

PC89

PC89
1u/25V_8

1u/25V_8

Close to Phase 1 Inductor

PR107

PR107
10K/F_6

10K/F_6

PR111

PR111
*10K/F_4

*10K/F_4

PSI#

VR_ON

VR_PWRGD_CK410#14

Throttling temp.
105 degree C

PR103 *0/short_4PR103 *0/short_4
PR108 *0_4PR108 *0_4
PR110 147K/F_6PR110 147K/F_6

PR109

PC66

PC66

0.01u/16V_4

0.01u/16V_4

PR117

PR117
1K/F_4

1K/F_4

PR116

PR116

97.6K/F_4

97.6K/F_4

PR109

4.02K/F_4

4.02K/F_4

H_VID0
H_VID1
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6

PR104 *0/short_4PR104 *0/short_4
PR120 *0/short_4PR120 *0/short_4

PC73

PC73

2200p/50V_6

2200p/50V_6

PC68

PC68

1000p/50V_6

1000p/50V_6

PR173

PR173
470K_4NTC

470K_4NTC

H_VID04
H_VID14

H_VID24
H_VID34
H_VID44
H_VID54
H_VID64

VR_ON35

PM_DPRSLPVR6,14

ICH_DPRSTP#3,6,12

PR118

PR118
100/F_4

100/F_4

PC71

PC71
100P/50V_4

100P/50V_4

5

PR121

PR121
*0/short_4

*0/short_4
PR99

PR99
499/F_4

499/F_4

220p/50V_4

220p/50V_4

PC67

PC67

0.022u/50V_6

0.022u/50V_6

ICH_DPRSTP#_R

PC72

PC72

PR115

PR115

11.3K/F_4

11.3K/F_4

PSI#_1
PGD_IN

VSOFT

VR_ON
DPRSLPVR

CLKEN#

PR106

PR106
1K/F_4

1K/F_4

PC80

PC80

330p/50V_4

330p/50V_4

PSI#3

C C

+3V_S5

H_PROCHOT#3

Panasonic
ERT-J0EV474J

B B

A A

21
49

2
3
4
5
6
7

37
38
39
40
41
42
43
44
45
46
47

13

12

11

10

9

PR93

PR93

*0_4

*0_4

VIN

PR127

PR127
10/F_6

10/F_6

PC87

PC87

0.1u/50V_6

0.1u/50V_6

22

VCC
GND
GND_T

PSI#
PGD_IN
RBIAS
VR_TT#
NTC
SOFT

VID0
VID1
VID2
VID3
VID4
VID5
VID6
VR_ON
DPRSLPVR
DPRSTP#
CLK_EN#

VDIFF

FB2

FB

COMP

VW

PC78

PC78
330p/50V_4

330p/50V_4

4

PR89

PR89

*0_4

*0_4

+3V

PR119

PR119

PR102

PR102

10_4

10_4

1.91K/F_4

1.91K/F_4

PC76

PC76

0.1u/50V_6

0.1u/50V_6

1

48

20

VIN

3V3

PGOOD

35

UGATE1

36

BOOT1

PR136

PR136

2.2_6

2.2_6

PC97

PC97

0.22u/25V_8

PC98

PC98

4.7u/10V_8

4.7u/10V_8

PR137

PR137

2.2_6

2.2_6

1000p/50V_4

1000p/50V_4

6/29 Modify

PC82

PC82

0.22u/25V_6

0.22u/25V_6

ISL6266_VO

PC70

PC70

VSUM

0.22u/25V_8

ISEN1

PC99

PC99

0.22u/25V_8

0.22u/25V_8

ISEN2

PC83

PC83
*0.068u/25V_6

*0.068u/25V_6

PC77

PC77

0.33u/10V_6

0.33u/10V_6

VCC_CORE

PR101

PR101
10/F_6

10/F_6

PR114

PR114

13.3K/F_4

13.3K/F_4

PR122

PR122
11K/F_4

11K/F_4

34

PHASE1

32

LGATE1

33

PGND1

24

ISEN1

+5V_S5

31

PVCC

DROOP

PR100

PR100

3.9K/F_4

3.9K/F_4

UGATE2

BOOT2

PHASE2

LGATE2

PGND2

ISEN2

OCSET

VSUM

PC81

PC81
180p/50V_4

180p/50V_4

27
26

28
30
29
23

25

NC

8

19

18

VO

DFB

17

PR96

PR96
1K/F_4

1K/F_4

PU2

PU2

ISL6266A

ISL6266A

VSEN

RTN

14

15

16

PC75

PC75

0.01u/16V_4

0.01u/16V_4

Parallel

PR105

PR105
10/F_6

10/F_6

4

3

DELAY_VR_PWRGOOD 3,6,14

PC54

PC54

0.22u/25V_6

0.22u/25V_6

PC93

PC93

0.22u/25V_6

0.22u/25V_6

PR95

PR95

2.7K/F_4

2.7K/F_4

PR176

PR176
10K_6NTC

10K_6NTC

Panasonic
ERT-J1VR103J

Close to Phase 1 Inductor

VCCSENSE 4

VSSSENSE 4

3

6266A_UG1

6266A_PH1

6266A_LG1

VSUM

ISEN2

6266A_UG2

6266A_PH2

6266A_LG2

VSUM

ISEN1

5

4

213

5

4

213

PQ37

PQ37
AOL1718

AOL1718

PR138 3.65K/F_6PR138 3.65K/F_6

PR65 10K/F_6PR65 10K/F_6

PR135 1/F_6PR135 1/F_6

PR134 *0_6PR134 *0_6

5

4

213

5

4

213

PQ38

PQ38
AOL1718

AOL1718

PR132 3.65K/F_6PR132 3.65K/F_6

PR133 10K/F_6PR133 10K/F_6

PR129 1/F_6PR129 1/F_6

PR128 *0_6PR128 *0_6

PQ34

PQ34
AOL1448

AOL1448

PQ35

PQ35
AOL1448

AOL1448

2

PR52

PR52
*2.2_6

*2.2_6

PC36

PC36
*2200p/50V_6

*2200p/50V_6

PR51

PR51
*2.2_6

*2.2_6

PC35

PC35
*2200p/50V_6

*2200p/50V_6

2

PC38

PC38

2200p/50V_6

2200p/50V_6

Modify 6/18
REV:B

PC45

PC45

2200p/50V_6

2200p/50V_6

VIN

PC47

PC47

10u/25V_1206

10u/25V_1206

PL6

PL6

0.36uH

0.36uH

PR75

PR75

PR70

PR70

*0/short_6

*0/short_6

*0/short_6

*0/short_6

VIN

PC107

PC107

10u/25V_1206

10u/25V_1206

10u/25V_1206

10u/25V_1206

Modify 6/18
REV:B

PL7

PL7

0.36uH

0.36uH

PR82

PR82

*0/short_6

*0/short_6

1

T82T82

+

PC41

PC41

10u/25V_1206

10u/25V_1206

+

+

PC131

PC131
330u/2V_7343

330u/2V_7343

PC39

PC39

PC103

PC103

0.1u/50V_6

0.1u/50V_6

+

+

PC31

PC31
*330u/2V_7343

*330u/2V_7343

PR85

PR85
*0/short_6

*0/short_6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sh eet

Date: Sh eet

Date: Sheet

+

PC102

PC102

PC37

PC37

100u/25V_6X7.7

100u/25V_6X7.7

0.1u/50V_6

0.1u/50V_6

+

+

PC132

PC132
330u/2V_7343

330u/2V_7343

T84T84

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

CPU CORE(ISL6266A)

CPU CORE(ISL6266A)

CPU CORE(ISL6266A)

T83T83

+

+

PC96

PC96

100u/25V_6X7.7

100u/25V_6X7.7

+

+

PC29

PC29
*330u/2V_7343

*330u/2V_7343

352-(&7=4

352-(&7=4

352-(&7=4

1

T79T79

VIN

+

+

PC30

PC30

*330u/2V_7343

*330u/2V_7343

39

VIN

36A

VCC_CORE

of

of

of

39Monday, July 12, 2010

39Monday, July 12, 2010

39Monday, July 12, 2010

1A

1A

1A

43

43

43

5

4

3

2

1

[PWM]

PC57

PC57
10u/10V_8

10u/10V_8

PC49

18

17

16

15

14

13

PR66

PR66
620K/F_4

620K/F_4
PR71

PR71
*0/short_4

*0/short_4
PR76

PR76
*0/short_4

*0/short_4

PC49

0.1u/50V_6

0.1u/50V_6

8207A_DH
8207A_LX
8207A_DL

PR64

PR64

4.7K/F_4

4.7K/F_4

PR63

PR63
100K/F_4

100K/F_4

6/29 Modify

12

(For RT8207A 400KHZ ) close to PC2008

VIN

SUSON 35,42

MAINON 21,35,38,42

PR61

PR61

5.1/F_6

5.1/F_6

PC44

PC44
1u/6.3V_4

1u/6.3V_4

REV:B andy 6/11

+3V_S5
HWPG_1.5V 6,35

12

PC46

PC46
1u/6.3V_4

1u/6.3V_4

+5V_S5

PQ33

PQ33
AOL1718

AOL1718

VIN

5

4

213

5

4

213

PQ29

PQ29
AOL1448

AOL1448

4

PC50

PC50

2200p/50V_6

2200p/50V_6

5

213

10u/25V_1206

10u/25V_1206

PQ31

PQ31
AOL1718

AOL1718

PC55

PC55

PL5

PL5

0.56uH

0.56uH

PR59

PR59
*4.7_6

*4.7_6

PC40

PC40
*680p/50V_6

*680p/50V_6

PC92

PC92

10u/25V_1206

10u/25V_1206

PC123

PC123

560u/2.5V

560u/2.5V

+

+

PC28

PC28
10u/10V_8

10u/10V_8

PR74

PR74

*0/short_6

S5_1.8V

S3_1.8V

*0_4

*0_4

19LL20

DRVL

PGND

CS_GND

V5IN

V5FILT

PGOOD

12

*0/short_6

CS

+5V_S5

23

VLDOIN

22

RT8207A

RT8207A

PU1

PU1

8207A_VBST

21

VBST

DRVH

PR79

PR79

+SMDDR_VTERM

D D

C C

0.3A

+SMDDR_VREF

0.0375A

PC61

PC61
10u/10V_8

10u/10V_8

PC62

PC62

0.033u/50V_6

0.033u/50V_6

PC60

PC60
10u/10V_8

10u/10V_8

+1.5V_SUS

+5V_S5

1

VTTGND

2

VTTSNS

3

GND

4

MODE

5

VTTREF

6

COMP

FOR DDR III

24

25

VTT

GND

NC7VDDQSNS8VDDQSET9S310S511NC

40

OCP 20A

17.2A

+1.5V_SUS

PC56

PC56

*33p/50V_6

*33p/50V_6

B B

07/06 modify to short-pad.

PR219

PR219
*0/short_6

*0/short_6

PR90

PR90
*0/short_6

*0/short_6

A A

5

PR83

PR83

10K/F_4

10K/F_4

8207A_SET

PR88

PR88

10K/F_4

10K/F_4

Vout = (PR150/PR149) X 0.75 + 0.75

S3_1.8VS5_1.8V

PR73

PR73
*0_4

*0_4

MAIND37,42

4

MAIND

+1.5V_SUS

578

3 6

241

3

PQ12

PQ12
AO4468

AO4468

+1.5V

3.6A

AO1718 Rdson=3.8~4.3mOhm

L(ripple current)
=(19-1.5)*1.5/(0.56u*400k*19)
~6.168A

Vtrip= (20-(6.168/2))*(4.3mohm/2)=0.03637V
RILIM=0.8133/10uA=3.636K

S3 S5

ON ON ON

ON ON

OFF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

DDR 1.5V(TPS51116)

DDR 1.5V(TPS51116)

DDR 1.5V(TPS51116)

Date: Sheet

Date: Sheet of

Date: Sheet of

2

S0

S3

S4/S5

11

10

00

352-(&7=4

352-(&7=4

352-(&7=4

1

VTTREF+1.5VSUS

OFF

OFFOFF

40Monday, July 12, 2010

40Monday, July 12, 2010

40Monday, July 12, 2010

1A

1A

1A

of

43

43

43

1

PR6

PR6
*EV@0_4

*EV@0_4

PR3 *EV@0_4PR3 *EV@0_4

R1

PR215

PR215

EV@100K_4

EV@100K_4

+3V

PR212

PR212
EV@100K_4

EV@100K_4

PC160 EV@1u/10V_6PC160 EV@1u/10V_6

PC167 EV@1u/10V_6PC167 EV@1u/10V_6

PC161

PC161

EV@0.1u/10V_4

EV@0.1u/10V_4

A A

PG_1V_EN43
+3V_D_EXT21,23
VGPU_ON21,35,43

PR209 *EV@0/short_4PR209 *EV@0/short_4
PR211 *EV@0_4PR211 *EV@0_4

5/4 Modify andy

B B

R3

PR8

PR8

3

EV@332K/F_4

EV@332K/F_4

PC2

PC2

EV@0.01u/16V_4

EV@0.01u/16V_4

2

2

PQ2

PQ2
EV@DMN601K-7

EV@DMN601K-7

1

R4

PR4

PR4

3

EV@130K/F_4

EV@130K/F_4

PQ1

PQ1
EV@DMN601K-7

EV@DMN601K-7

1

R2

GPU_VID119

PR10

PR10

EV@3K_4

EV@3K_4

C C

GPU_VID219

PR5

PR5
EV@3K_4

EV@3K_4

REF-2V

2

+5V_S5

8792VCC

8792EN

8792SKIP#

8792REFIN

8792REF

PR2

PR2
EV@39.2K/F_4

EV@39.2K/F_4

PC169

PC169

EV@1000P/50V_4

EV@1000P/50V_4

PR1

PR1
EV@49.9K/F_4

EV@49.9K/F_4

2

VDD

13

VCC

14

PGOOD

1

12

10

11

PR214

PR214
EV@41.2K/F_4

EV@41.2K/F_4

PU11

PU11

EN

EV@MAX8792ETD+T

EV@MAX8792ETD+T

SKIP#

REFIN

REF

EP

15

Place near GND pin15

5/26 change to 41.2K/F_4
Andy

PR213

PR213
EV@100K_4

EV@100K_4

GPU_VID1 (GPIO15) GPU_VID2 (GPIO20)

3

PR208

PR208

EV@200K/F_4

TON

BST

ILIM

7

8792TON

5

8792DH

DH

6

8792BST

4

8792LX

LX

3

8792DL

DL

8

FB

9

8792ILIM

PR220

PR220
*0/short_6

*0/short_6

PR210

PR210
*0/short_6

*0/short_6

EV@200K/F_4

PR207

PR207
EV@1_6

EV@1_6

PC4

PC4

EV@0.22u/25V_6

EV@0.22u/25V_6

07/06 modify to short-pad.

PC13

PC13

*EV@4700P/25V_4

*EV@4700P/25V_4

Frequency(PR220=200K) 300K

AMD Park VID Table

0
1
0
11

0
0
1

5

4

213

5

4

213

+VGPU_CORE

1.12V

1.05V

0.95V

0.9V

VIN

PQ57

PQ57
EV@AOL1448

EV@AOL1448

PQ55

PQ55
EV@AOL1718

EV@AOL1718

4

PC155

PC155

EV@2200p/50V_4

EV@2200p/50V_4

PR18

PR18
*EV@2.2_6

*EV@2.2_6

PC11

PC11
*EV@1000p/50V_4

*EV@1000p/50V_4

5/26 Modify Andy

8792EN

EV@DTC144EU

EV@DTC144EU

5/26 Modify Andy

PC8

PC8

EV@10u/25V_1206

EV@10u/25V_1206

PL11

PL11

EV@1uH

EV@1uH

PC157

PC157

EV@0.1u/50V_6

EV@0.1u/50V_6

2

PQ3

PQ3

1 3

TP6TP6

PC9

PC9

*EV@10u/25V_1206

+

+

PC7

PC7

PR15

PR15
EV@1M_6

EV@1M_6

PR12

PR12
EV@1M_6

EV@1M_6

*EV@10u/25V_1206

+

+

PC10

PC10

*EV@330u/2V_7343

*EV@330u/2V_7343

+VGPU_CORE

3

2

1

PC156

PC156

EV@10u/25V_1206

EV@10u/25V_1206

5/26 change to DC-10F0M102
Andy

EV@330u/2V_7343

EV@330u/2V_7343

VIN

5

TP5TP5

TP2TP2

TP1TP1

PR13

PR13
EV@22_8

EV@22_8

PQ4

PQ4
EV@DMN601K-7

EV@DMN601K-7

41

VIN

OCP=15A

+VGPU_CORE

11A

5/26 Modify Andy

PC1

PC1

EV@0.01u/16V_4

EV@0.01u/16V_4

D D

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

GPU CORE(MAX8792)

GPU CORE(MAX8792)

GPU CORE(MAX8792)

Date: Sheet of

Date: Sheet

1

2

3

4

Date: Sheet

5

1A

1A

1A

43

of

43

of

43

41Monday, July 12, 2010

41Monday, July 12, 2010

41Monday, July 12, 2010

5

+3V_S5

4

3

2

1

42

PC151

PC152

PC152
EV@10u/10V_8

PC14

PC14

EV@10u/10V_8

D D

PR24

PR24
*EV@0/short_4

MAINON

C C

*EV@0/short_4

PR22

PR22

EV@100K/F_4

EV@100K/F_4

EV@1000p/50V_4

EV@1000p/50V_4

PC151
EV@0.1u/25V_4

EV@0.1u/25V_4

PR200

PR200

EV@15K/F_4

EV@15K/F_4

PC149

PC149
*EV@100P/50V_4

*EV@100P/50V_4

54418-1.8_VFB

PR198

PR198
EV@182K/F_4

EV@182K/F_4

PC150

PC150
EV@1200p/50V_4

EV@1200p/50V_4

PU9 EV@HPA00835RTERPU9 EV@HPA00835RTER

16

VIN

1

VIN

2

VIN

15

EN

6

VSNS

7

COMP

8

RT/CLK

9

SS

22

PC148

PC148
EV@0.01u/25V_4

EV@0.01u/25V_4

BOOT

PWRGD

GND
GND

AGND

PAD17PAD18PAD19PAD20PAD21PAD

2.18A

10

PH

11

PH

12

PH

13

PR197 *EV@0/short_6PR197 *EV@0/short_6

14
3
4
5

PC146

PC146

EV@0.1u/50V_6

EV@0.1u/50V_6

PR199

PR199

EV@100K/F_4

EV@100K/F_4

PL10

PL10

EV@1uH_7X7X3

EV@1uH_7X7X3

HWPG_1.8V 35

+3V

R1

54418-1.8_VFB

R2

PR25

PR25
EV@100K/F_4

EV@100K/F_4

EV@0.1u/25V_4

EV@0.1u/25V_4

PR23

PR23
EV@78.7K/F_4

EV@78.7K/F_4

PC147

PC147

PC16

PC16

EV@10u/10V_8

EV@10u/10V_8

+1.8V

PC15

PC15
EV@10u/10V_8

EV@10u/10V_8

V0=0.8*(R1+R2)/R2

VIN

PR166

PR166
1M_6

1M_6

SUS_ON_G SUSD

B B

SUSON35,40

PR163

PR163
100K_4

100K_4

2

PR165

12

PQ36

PQ36

DTC144EU

DTC144EU

1 3

PR165
1M_6

1M_6

VIN

+3VSUS +15V

2

3

1

PR139

PR139
22_8

22_8

PQ30

PQ30
DMN601K-7

DMN601K-7

+SMDDR_VTERM

PR155

PR155
22_8

22_8

3

2

PQ32

PQ32
DMN601K-7

DMN601K-7

1

+5V+3V +15V+1.5V

PR130

PR130
1M_6

1M_6

3

2

PQ27

PQ27
DMN601K-7

DMN601K-7

1

PC91

PC91
*2200p/50V_4

*2200p/50V_4

SUSD 37

07/06 modify from 1206 to 0805.

2.18A

+1.8V

PC143

PC143

IV@22U/6.3V_8

IV@22U/6.3V_8

PR188

PR188
IV@261/F_4

IV@261/F_4

PR190

PR190
IV@100/F_4

IV@100/F_4

Rg

Rh

PQ47

PQ47
IV@AOL1448

IV@AOL1448

3
2
1

4

PR187

PR187
IV@47/F_6

IV@47/F_6

PC141

PC141
IV@33n/50V_6

IV@33n/50V_6

+3V_S5

+3V_S5

PC142

PC142
IV@10u/10V_8

IV@10u/10V_8

5

PU8

PU8
IV@G9334

IV@G9334

5

DRV

3

FB

2

PGD

VCC

GND

EN

PC140

PC140

1 2

IV@0.1u/25V_6

IV@0.1u/25V_6

4

1

+5VPCU

6

PR189

PR189

5/18 Modify

IV@100K_4

IV@100K_4

HWPG_1.8V

MAINON

Modfiy 4/19 andy

PC144

PC144
IV@0.1u/25V_6

IV@0.1u/25V_6

1 2

Vout1 = (1+Rg/Rh) *0.5

PR62

PR41

PR68

PR68
1M_6

1M_6

PR69

A A

MAINON21,35,38,40

5

MAINON

PR58

PR58
100K_4

100K_4

2

12

PQ20

PQ20

DTC144EU

DTC144EU

1 3

PR69
1M_6

1M_6

PR60

PR60
22_8

22_8

3

2

PQ17

PQ17
DMN601K-7

DMN601K-7

1

4

PR41
22_8

22_8

3

2

PQ18

PQ18
DMN601K-7

DMN601K-7

1

PR62
22_8

22_8

3

2

PQ19

PQ19
DMN601K-7

DMN601K-7

1

PR45

PR45
1M_6

1M_6

MAINDMAINDMAINON_ON_G

3

2

PQ16

PQ16
DMN601K-7

DMN601K-7

1

3

PC33

PC33
*2200p/50V_4

*2200p/50V_4

MAIND 37,40

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

VCCP 1.8V(UP6111A)

VCCP 1.8V(UP6111A)

VCCP 1.8V(UP6111A)

Date: Sheet

Date: Sheet

2

Date: Sheet

1

1A

1A

1A

42Monday, July 12, 2010

42Monday, July 12, 2010

42Monday, July 12, 2010

of

43

of

43

of

43

5

4

3

2

1

PQ6

PQ6
EV@AO4468

EV@AO4468

2

+1.5V_SUS

578

3 6

241

+1.8V

3

1

PQ48

PQ48
EV@AO3404

EV@AO3404

43

2.97A

+1.5V_GPU

0.25A

+1.8V_GPU

VIN

PR205

PR205
EV@1M_4

VIN

EV@1M_4

PR206

PR206
EV@1M_4

EV@1M_4

PR193

PR193
EV@1M_4

EV@1M_4

PR194

PR194
EV@1M_4

EV@1M_4

D D

VGPU_ON

1,35,41

PG_1.5V_EN

C C

PR204

PR204
*EV@0_4

*EV@0_4

PR203

PR203
*EV@0/short_4

*EV@0/short_4

PC154

PC154

EV@1u/10V_4

EV@1u/10V_4

+1.5V_GPU

PR195

PR195
EV@100K_4

EV@100K_4

12

PR196

PR196
EV@1K_4

EV@1K_4

2

PQ53

PQ53

EV@DTC144EUA

EV@DTC144EUA

2

PQ51

PQ51

EV@PDTC143TT

EV@PDTC143TT

1 3

1 3

+1.5V_GPU +15V

PR202

PR202
EV@22_8

EV@22_8

3

2

2

PQ54

PQ54
EV@DMN601K-7

EV@DMN601K-7

1

PR192

PR192
EV@22_8

EV@22_8

3

PQ50

PQ50
EV@DMN601K-7

EV@DMN601K-7

1

2

2

3

1

+15V+1.8V_GPU

3

1

PR201

PR201
EV@1M_4

EV@1M_4

dGPU_D1

PQ52

PQ52
EV@DMN601K-7

EV@DMN601K-7

PR191

PR191
EV@1M_4

EV@1M_4

dGPU_D

PQ49

PQ49
EV@DMN601K-7

EV@DMN601K-7

PC153

PC153
*EV@2.2n/50V_4

*EV@2.2n/50V_4

PC145

PC145
*EV@2.2n/50V_4

*EV@2.2n/50V_4

0.8V

+3V_S5

12

PR216

PR216
EV@10K_4

EV@10K_4

PR11

PR11
EV@9.1K/F_4

EV@9.1K/F_4

PR7

PR7
EV@34K/F_4

EV@34K/F_4

PG_1.5V_EN

PG_1.5V_EN 35

+1V

1.8A

PC164

PC164

EV@22U/6.3V_8

EV@22U/6.3V_8

07/06 modify from 1206 to 0805.

5/5 Modify

3

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

GPU_POWER

GPU_POWER

GPU_POWER

1

1A

1A

1A

43Monday, July 12, 2010

43Monday, July 12, 2010

43Monday, July 12, 2010

of

43

of

43

of

43

B B

+5VPCU

PC159

PC159

EV@0.1u/50V_6

EV@0.1u/50V_6

PG_1V_EN41

+1.5V_SUS

A A

12

PR9

PR9
EV@100K_4

EV@100K_4

PC162

PC162

EV@10u/10V_8

EV@10u/10V_8

PC163

PC163

EV@0.1u/50V_6

EV@0.1u/50V_6

EV@0.1u/50V_6

EV@0.1u/50V_6

PC3

PC3

PU10

PU10
EV@RT9018A

EV@RT9018A

4

VPP

2

VEN

3

VIN

8

GND

9

GND

PGOOD

ADJ

7

1
6

VO

5

NC

Vout =0.8(1+R1/R2)
=1V

5

4

1

2

3

4

5

VIN

PD8

PD8
SW1010CPT

TH_ON

1 3

PU7A

PU7A
LM393

LM393

PR178

PR178
1M_6

1M_6

1

7

SW1010CPT

1

2

3

PC138

PC138

0.1u/50V_6

0.1u/50V_6

PQ44

PQ44
AO3409

AO3409

PD9

PD9

RB500V-40

RB500V-40

Thermal protection

SYS_SHDN# 3,37

PR180

PR180
200K/_6

200K/_6

3

2

PQ45

PQ45
DMN601K-7

PC139

PC139

0.1u/50V_6

0.1u/50V_6

+3VPCU

PR179

PR179
100K/F_6

100K/F_6

NC_TEMP

1

DMN601K-7

T96T96

A A

VL

S5_ON

PR182

PR182
10K/F_6

10K/F_6

PR181

PR181
1M/F_6

1M/F_6

PR184

PR184

1.33K/F_4

1.33K/F_4

S5_ON

VLVL

4.95V

PR183

PR183
200K/F_4

200K/F_4

2.469V

PR186

PR186
200K/F_4

200K/F_4

2

PQ43

PQ43

DTC144EU

DTC144EU

3
2

5
6

84

+

+

-

-

PU7B

PU7B

+

+

-

-

LM393

LM393

S5_ON35,37

B B

PR185

PR185

10K_6NTC

10K_6NTC

C C

S5_ON

3

2

PQ46

PQ46
DMN601K-7

DMN601K-7

1

44

For EC control thermal protection (output 3.3V)

D D

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Thermal Protection

Thermal Protection

Thermal Protection

Date: Sheet

Date: Sheet

1

2

3

4

Date: Sheet

5

1A

1A

1A

44Monday, July 12, 2010

44Monday, July 12, 2010

44Monday, July 12, 2010

of

43

of

43

of

43

5

MODEL:

ZQ5 MB

D D

C C

B B

REV

A

First release

1.Page40:change HWPG_1.5V pull up to +3V_S5 for S3 issue

2.Page29:Add R570 pull up +1.5V for uma Audio I/O

3.Page26:Swap HDMI Lane2 for HDMI issue

4.Page31:U34 and R567 no stuff ,R555 stuff it for LAN ID issue

5.Page02:Q12 and Q13 change Part number from BAM700200F6 to BAM700200H2

6.Page29:R55 and R56 change Part number to CS33303F911(33K) for Audio

7.Page29:change R86 and U6 Pin5 pull up to +5V_S5

8.Page29:change R84 value to 0 ohm

9.Page30:change Q25 and Q27 Part number to BAM70020002 as ZYB

10.Page25:L1,L2,L3 change to CX8LL680001

11.Page25:C1,C2,C3,C5,C6,C7 change to CH-5006JBD4

12.Page25:R11,R14 change to CS01502JB12

13.Page28:Add another BT circuit (USB port5),Add Q30,RN37,C792,CN22

14.Page07:Change R425,R426 to CS02492FB29 for CRT issue

15.Page13:Change BT 2.1 to USB port 7

16.Page28:Change BT 2.1 to USB port 7

17.Page25:chage 0805 to SHORT Pad R71,R72,R98,R146

18.Page29:Stuff R84 U6 and no stuff R86 for Audio bobo noise

19.Page10:change R171 and R429 to bead CX8PG181001

20.Page30:stuff Q25 and Q27 and no stuff R46 R48 for Audio bobo noise

21.Page40:Add PR219

22.Page38:Add PR217

23.Page41:Add PR220

24.Page39:Add PR218

25.Page36: Change PR16 (0.01/F_7520) to CS+0108GL13 (0.01_3720)

C

26.Page41: DEL JP1 and JP4

27.Page39: DEL JP2 and JP3

28.Page38:change PR171,PR38 to short Pad

29.Page36:change PR125,PR14,PR26 to short Pad

30.Page37:change PR143,PR145,PR146,PR153,PR157,PR168,PR169,PR170,PR50,PR44,PR56 to short Pad

31.Page39:change PR120,PR121,PR104,PR103,PR70,PR75,PR82,PR85 to short Pad

32.Page40:change PR71,PR76,PR74 to short Pad

33.Page41:change PR209 to short Pad (EV@)

34.Page42:change PR24,PR197 to short Pad (EV@)

35.Page43:change PR203 to short Pad (EV@)

36.Page36:Change PQ26 to AO4468

37.Page37:PD2 and PD5 no stuff

38.Page39:PC29 and PC31 no stuff

39.Page36:PJ1 change Part number to DFHD08MR140

01.Page39:PC83 no stuff

02.Page39:Change PR64 to CS24702FB10

03.Page16: Del C539 (*10U/6.3V_6).

04.Page17: Del C538 (*10U/6.3V_6).

D

05.Page38: Change AGND (0 ohm) to Short Pad(0603): PR154

06.Page40: Change AGND (0 ohm) to Short Pad(0603): PR219

07.Page41: Change AGND (0 ohm) to Short Pad(0603): PR210

08.Page39:Change AGND (0 ohm) to Short Pad(0805): PR112,PR218.

09.Page43:Change PC164 (22uF/10V_1206) to CH6221M9A07 (22uF/6.3V_0805)

10.Page42:Change PC143 (22uF/10V_1206) to CH6221M9A07 (22uF/6.3V_0805)

11.Page34:Modify HOLE18 to dummy net.

12.Page34:Add HOLE22 for ME.

4

CHANGE LIST

炷炷炷炷

P/N

烉烉烉烉

BAM44680003

炸炸炸炸

ˣˣˣˣ

ˣˣˣˣ

ˣˣˣˣ

3

PR217.

PR90.

PR220.

2

1

MODEL

PAGE

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45 1A

FROM

ZR6 MB

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

TO

A A

352-(&7=4

352-(&7=4

352-(&7=4

4XDQWD&RPSXWHU,QF

4XDQWD&RPSXWHU,QF

MB Assy' P/N: 31ZQ5MB0000

Approved by :

Andy_Lin

5

Project :ZQ5 MB

Drawing by :Andy Chen

4

3

Document No.:

2009/03/04

DATE:

2

4XDQWD&RPSXWHU,QF

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Thermal Protection

Thermal Protection

Thermal Protection

Date: Sheet

Date: Sheet

Date: Sheet

1

of

of

of

45Monday, July 12, 2010

45Monday, July 12, 2010

45Monday, July 12, 2010

1A

1A

1A

43

43

43