ZiLOG Z8F16800144ZCOG User Manual

Z8F16800144ZCOG

Z8 Encore! XP® Dual F1680
Ser ies Devel opment Kit

User Manual

UM021204-0508

Copyright ©2008 by Zilog®, Inc. All right s reserved.

www.zilog.com

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

Revision History

Each instance in Revision Hist ory r eflects a cha nge to this document fr om
its previous revision. For more details, refer to the corr esp onding pages
and appropriate links in the table below.

Revision

Date

May 2008 04 Updated Introduction section. 1

Level Description Page No

User Manual

ii

February
2008

June 2007 02 Removed IrDA. 2, 6, 8, 10
November

2006

03 Updated Zilog logo and changed

ZiLOG to Zilog.

01 Original issue . All

All

UM021204-0508 Revision History

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

Table of Contents

Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

MCU Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Hardware-Supported Software Features . . . . . . . . . . . . . . . . . . . . . 3

®

Z8 Encore! XP

Theory of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Hardware Interface Specification . . . . . . . . . . . . . . . . . . . . . . . . 8

Dual F1680 Series Development Board. . . . . . . . . 4

User Manual

iii

Power and Communication Interfaces . . . . . . . . . . . . . . . . . . . . 8

External Interface Headers JP1 and JP2 . . . . . . . . . . . . . . . . . . 9

Kit Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Installation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0

Customer Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4

UM021204-0508 Table of Contents

Introduction

Zilog’s Z8 Encore! XP® F1680 Series microc ontrollers (MCU) are based
on the 8-bit e Z8 CPU core and optim ized for l ow-power a ppli cations. The
Z8 Encore! XP F1680 Series support 1.8 V to 3.6 V operation with
extremely low Active, Halt, and Stop mode currents and an assortment of
speed and low power options. Z8F1680AN020 is the silicon used in the
board. For more information, r efe r to Z8 Encore! XP
Product Specification (PS0250). The features to balance power and per­formance needs of applications include:

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

®

F1680 Series

1

•

Wide oper ating voltage range: 1.8 V–3.6 V.

•

Active, Halt, a nd Stop ope rational modes with the ability to enable or
disable peripherals for power savings.

•

Oscillator contr ol that determines clock source, operating speed, and
fail safe operation in addition to fast wakeup.

•

A user-contr olled Program RAM area to store interrupt service
routines (ISR) of high-fr equency interrupts. The Progra m RAM
mechanism ensures low average current and quick response for high­frequency interrupts.

MCU Features

Features of the Z8 Encore! XP F1680 MCU include:

•

Two Z8F1680AN020SG 44-pin Devices with 20 MHz eZ8 CPU core

•

16 KB Flash memory with in-circuit progr amming capability

•

2 KB register data RAM

•

1 KB Program RAM for program code shadowing and data storage

•

256 B non-volatile data stor age (NVDS)

UM021204-0508 Introduction

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

•

Fast 8-channel, 10-bit analog-to-digit al converter (ADC)

•

On-chip temperature sensor

•

Two on-chip analog comparators

•

On-chip low-power operational amplifier (LPO)

•

Two full-duplex, 9-bit, UART ports with support of Local Intercon­nect Network (LIN) protocol

•

Enhanced serial peripheral interface (SPI) controller

•

I2C Master/Slave

2

•

Three enhanced 16-bit timers with Capture, Compare, and PWM
capability

•

Multichannel timer that supports four capture/compare modules on
one timer

•

Watchdog Timer (WDT) with dedicated internal RC oscillator

•

39 Input/Output (I/O) pins

•

Up to 20 vectored interrupts

•

On-Chip Debugger (OCD)

•

Power-On Reset (POR)

•

Built-in Low-Voltage Detecti on (LVD) and Voltage Brownout (VBO)
protection

•

Internal Precision Oscillator (IPO) with output frequency range of
43 kHz to 11 MHz

•

External 20 MHz Crystal oscillator

•

Operational voltage: 3.3 V

•

Thirty-nine 5 V-tolerant inputs (DIGITAL mode only)

•

0 ºC to +70 ºC (standard) operating temperature ranges

UM021204-0508 Introduction

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

For more information on the Z8 Encore! XP F1680 Series, refer to Z8
Encor e! XP® F1680 Series Product Specification (PS0250), available fo r

download at www.zilog.com.

Hardware-S uppor ted So ftware Features

Zilog’s eZ8 MCU, latest 8-bit MCU meets the continuing demand for
faster and more code-efficient microcontrollers. It executes a superse t of
the original Z8® instruction set. The eZ8 MCU features include:

•

Direct register -to-regist er architectur e allows each register to funct ion
as an accum ul ato r, improving execution time and decreasing the
required Program Memory.

User Manual

3

•

Software stac k allows greater depth in sub-r outin e calls and int errupts
more than hardware stacks.

•

Compatible with existi ng Z8 code.

•

Expanded internal Regis ter File allows access up to 4 KB.

•

New instructions improv e execution efficiency for code developed
using higher-level programming languages including C.

•

Pipelined instruction fetch and execution.

•

New instructions for impro ved performance including BIT, BSWAP,
BTJ, CPC, LDC, LDCI, L EA, MULT, and SRL.

•

New instructions support 12- bit linear addressing of the register file.

•

Up to 10 MIPS operation.

•

C-Compiler friendl y.

•

2 to 9 clock cycles per instruction.

TM

For more details on eZ8 MCU, refer to eZ8

(UM0128), available for download at www.zilog.com.

CPU User Manual

UM021204-0508 Introduction

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

Z8 Encore ! XP® Dual F1680 Series
Develo p ment Boar d

The Z8 Encore! XP Dual F1680 Series de velopment board (see Figure 1)
provides a tool to evaluate features of the Z8 Encore! XP F1680 Series
MCU and to start developing an appl ication before building the hardwa re.

4

Figure 1. Z8 Encor e! XP F1680 Seri es Develop m ent Boar d

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

Theory of Operation

Figure 2 displays the Z8 Encore! XP F1680 development board.

HyperTerminal Console

Serial Port

XModem

UART0 UART1

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

SlaveMaster

MCU_S (U1)MCU_M (U3)

ZDS II

Debugger

DBG2

PC0
PC1
PC2

RED_LED
YELLOW_LED
GREEN_LED

5

DBG1

MCU_M

S2

MCU_S

S2 - Away from U11 = Slave (U1)
S2 - Toward U11 = Master (U3)

DBG

Figure 2. Z8 Encore! XP F1680 Development Board

The terms used in this section are explained below:

Terms Definitions

Z8F1680_S (MCU_S) I
Z8F1680_M (MCU_M) I

2

C Sl ave device

2

C Master device

The features of Z8F1680 MDS-compliant modu le include:

USB

Smart Cable

•

Two Z8F1680 devices: the Z8F1680_M I2C Master device and the
Z8F1680_S I2C Slave device.

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

•

RS-232 interface.

•

Two MDS connectors.

•

I2C-driven DAC that provides analog input for the Z8F1680_S
device.

•

The Slave device has a 20 MHz crystal; the Master device uses
internal IPO.

•

On-chip debugger interface.

The module has two main modes of operation:

•

Downloading and debugging code int o the Slave dev ice through the
Master device, using the connection of the OCD of the Slave device
to the UART1 of the Master device. In this case, PA7 of the Master
device is acting as a Reset sou rce for the Slave device a nd needs to be
configured as an output with Open Drain.

6

•

Downloading and debugging code in eithe r the Master or Slave

device using the standard OCD interface on either chip.
The operation mode is selected by switch S2.
All the GPIOs of both devices, except for thos e used on the module are

connected to JP1 and JP2. All the GPIOs of the Slave device, except
analog inputs are connected to the odd pins of JP1. The GPIOs of the
Master device are connected to the even pins of JP1 and to JP2. All the
analog inputs of the Slave device are connected to JP2. Input PB3/ANA3
of the Slave device can be co nnected thr ough J1 to ei ther the output of U2
(12-bit DAC) or to JP2 pin 6.

The 12-bit DAC7571 manufactured by TI (U2) is controlled either by
Master o r Slav e dev ic e.

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

Block Diagram

Figure 3 displays the block diagram of the Z8F1680 MDS module.

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

7

Figure 3. Block Diagram of the Z8F1680 MDS Module

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

Hardware Interface Specification

The hardware specifications include:

•

Headers

•

Drivers (I2C, UART, and so on)

•

Debug interface

•

Expansion Module interfa ce

Power and Communication Interfaces

User Manual

8

Table 1 lists jumper information concerning the shunt status, functions,

devices, and defaults affected of jumpers JP1, JP2, JP3, JP4, JP5, and JP 6.

Table 1. Shunt Settings for the Z8 Encore! XP F1680 Development Board

Factory

Number Shunts Function Pins Connected (IN/OUT)

1 J1 AN3_IN 1–2 AN3_IN connected to

AN3 on the JP3
2–3 AN3_IN connected to

Vout of DAC

2 J2 RS-232 IN—RS-232 disabled Default

OUT—RS-232 enabled OUT

4 J4 AVCC for MCU_S IN—AVCC is connected to

VCC_3.3 V

OUT—AVCC not connected
5 J5 GND Test Point N/A
6 J6 VCC_3.3 V Test Point N/A

Settings

2–3

Default

IN

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

External Interface Headers JP1 and JP2

External interface headers JP1 and JP2 are displayed in the schematic in

Figure 5 on page 11.

Kit Contents

For kit contents, refer to Z8 Encore! XP® Dual F1680 Series Develop-
ment Kit Quick Start Guide (QS0038).

Installation

Follow the directi ons in the Z8 Encore ! XP® Dual F1680 Series Devel op-
ment Kit Quick Start Guide (QS0038) for software installation and setup

of the Z8 Encore! XP Dual F1680 Series Development Kit.

User Manual

9

UM021204-0508 Z8 Encore! XP

®

Dual F1680 Series

UM021204-0508 Schematics

Z8 Encore! XP

®

Dual F1680 Series Development Kit

User Manual

10

Schematics

This section includes schematics for the Z8 Encore! XP Dual F1680 Series Development Board. The following components appear in the
schematic but are not installed on the board:

•

C20

•

J3

•

R13 through R15

•

U11

Figure 4. Z8 Encore! XP Dual F1680 Series MCU Development Board

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

-DIS_232

-DIS_IrDA

-DIS_232

RXD1

-RESET

TXD1

RXD0

nCTS0

TXD0

nCTS1

PBM_[5:0]

TXD1

PES_[6:5]

PCM_[7:0]

-DIS_IrDA

nCTS1

PDM_[3:1]

PA3

nCTS0

PCS_[4:3]

ANA[7:0]

PDS_7

PCS_7

PCS_5

PAM_0

PAS_[7:2]

PA4

RXD0

PBS_5

PAM_1

PEM_0

PA5

TXD0

PCS_6

PDS_[2:1]

PDM_7

PDM_6

RXD1

PEM_[6:3]

-RESET

PES_4

PES_[3:0]

PAM_6

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TOP

POWER&COMMUNICATIONS

POWER&COMMUNICATIONS

PA4_RXD0

PCS_6

PCS_5

-DIS_IRDA

-DIS_232

PCS_7

PA3_CTS0

PA5_TXD0

-RESET

TXD1

RXD1

A1

FABA1FAB

MCU

MCU

PD5_TXD1

PA4_RXD0

PD4_RXD1

PD6_DE1

PA3_CTS0

PA5_TXD0

PAM_6

PDS_[2:1]

PEM_0

PCM_[7:0]

PA2_DE0

PAM_0
PAM_1

ANA[7:0]

PDM_6

PDM_[3:1]

PAS_[7:2]

-RESET

PCS_5
PCS_6
PCS_7

PCS_[4:3]

PDS_7

PEM_[6:3]

PBM_[5:0]

PBS_5

PES_[6:5]

PDM_7

PD3_nCTS1

PES_4

PES_[3:0]

MDS INTERFACE

MDS_INTERFACE

-DIS_IrDA

-DIS_232

ANA[7:0]

RXD1

-RESET

PAS_[7:2]

PCS_[4:3]

PDS_[2:1]

PES_[6:5]

PAM_0
PAM_1

PAM_6

PDM_6

PEM_0

PBM_[5:0]

PCM_[7:0]

PDM_[3:1]

PEM_[6:3]

TXD1

RXD0

nCTS0

TXD0

PDS_7

PBS_5

PDM_7

nCTS1

PES_4

PES_[3:0]

UM021204-0508 Schematics

Z8 Encore! XP

®

Dual F1680 Series Development Kit

User Manual

11

Figure 5. Z8 Encore! XP Dual F1680 Series MCU Development Board (Continued)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

SCL
SDA

AVCC

GND

ANA7

ANA2

ANA1

ANA0

ANA6

ANA4

ANA5

ANA3_INANA3_IN

ANA3

PES_6

PDS_7

PES_3

PAS_2

PAS_4

PAS_6
PCS_4

PCS_5

PAS_7

PCS_3

PES_5

ANA3

SCL
SDA

PEM_6

PDM_7

PEM_5

PCM_2

PCM_3

PDM_2

PDM_1

PCM_0

PCM_1

PDM_3
PCM_7

PCM_6

PCM_4
PCM_5

PES_0
PES_1

SCL

PES_2

SDA

PES_3

PES_5
PES_6

PCS_3
PCS_4

PCM_6
PCM_7

PCM_0
PCM_1
PCM_2
PCM_3
PCM_4
PCM_5

PDM_1
PDM_2
PDM_3

PEM_6

PEM_4

PEM_3
PEM_5

AVCC

PDS_1
PDS_2

PEM_4

-RST_S

DBG_S

PAS_2

PAS_7

PAS_3

PAS_6

PAS_5

PAS_5

PAS_4

PAS_3

DBG_M

-RST_M

PES_0

ANA4

ANA5

PEM_3

PBM_3
PBM_4

PBM_5
PBM_2

PBM_1
PBM_0

PES_4

VCC_3.3V

PA5_TXD0

PA4_RXD0

PA3_CTS0

PD5_TXD1

PD6_DE1

PD4_RXD1

ANA[7:0]

PAS_[7:2]

PES_[3:0]

PCS_[4:3]

PDS_[2:1]

PA2_DE0

PBM_[5:0]

PAM_6

PAM_0

PAM_1

PCM_[7:0]

PDM_[3:1]

PDM_6

PEM_[6:3]

PEM_0

-RESET

PCS_5

PCS_6

PCS_7

PDS_7

PBS_5

PDM_7

PD3_nCTS1

PES_[6:5]

PES_4

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

AVCC

AVCC

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3VVCC_3.3V

VCC_3.3V VCC_3.3V

VCC_3.3V

VCC_3.3V

VCC_3.3V VCC_3.3V

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DBG
INTERFACE

DEBUG_SELECT

1-2 MDS HDR

2-3 DAC

MASTER ENABLED

SLAVE ENABLED

U6A

SN74LVC2G66

U6A

SN74LVC2G66

2A12B

2

2C

7

GND

4

VCC

8

U7B

SN74LVC2G66

U7B

SN74LVC2G66

2A52B

6

2C

3

GND

4

VCC

8

R6
10KR610K

12

U5A

SN74LVC2G66

U5A

SN74LVC2G66

2A12B

2

2C

7

GND

4

VCC

8

U6B

SN74LVC2G66

U6B

SN74LVC2G66

2A52B

6

2C

3

GND

4

VCC

8

C26

0.1uF

C26

0.1uF

U5B

SN74LVC2G66

U5B

SN74LVC2G66

2A52B

6

2C

3

GND

4

VCC

8

U7A

SN74LVC2G66

U7A

SN74LVC2G66

2A12B

2

2C

7

GND

4

VCC

8

C29

0.1uF

C29

0.1uF

C2
22pFC222pF

C21

0.1uF

C21

0.1uF

C31

0.1uF

C31

0.1uF

R3
10KR310K

12

+

C32

10uF

+

C32

10uF

1 2

U2

DAC7571U2DAC7571

Vout

1

GND

2

VCC3SDA

4

SCL

5

A0

6

C30

0.1uF

C30

0.1uF

R2

3.3KR23.3K

12

C22

0.1uF

C22

0.1uF
R4

10KR410K

12

U12

SN74LVC1G125

U12

SN74LVC1G125

OE

1

A

2

GND3Y

4

VCC

5

J8

SHUNTJ8SHUNT

U1
Z8F1680U1Z8F1680

PE3/T4CHA3PA2/DE0/X2IN1PA3/CTS0/X2OUT2PD6/DE14PA4/RXD0/IRRX0

5

PA5/TXD0/IRTX06PD5/TXD1/IRTX17PA6/T1IN/T1OUT8PC4/MOSI/LED9PC5/SCK/LED10PA7/T1OUT

11

PC6/T2IN/T2OUT/LED

13

PC7/T2OUT/LED

14

PD0/RESET

16

DBG

17

VCC

15

PD4/RXD1/IRRX1

12

PD3/CTS1/COUT1

18

GND

19

PC0/ANA4/COINP/LED

21

PC1/ANA5/COINN/LED

22

PE4/T4CHB

20

PE5/T4CHC

33

PC2/SS/ANA6/LED

23

PC3/MISO/LED

24

PD2/C1INP

25

PD1/C1INN

26

PB0/AMPOUT/ANA0

27

PB1/AMPINN/ANA1

28

PB2/AMPINP/ANA2

29

PB4/ANA7

30

PB5/VREF

31

PB3/CLKIN/ANA3

32

AVCC

36

PE6/T4CHD

34

PE0/T4IN

35

VCC

37

PA0/T0IN/T0OUT/XIN

38

PA1/T0OUT/XOUT

39

GND

40

PE1/SCL

42

PE2/SDA

43

PD7/COUT0

44

AGND

41

P3

HDR/PIN 3x2P3HDR/PIN 3x2

112

2

334

4

556

6

S2

SW SPDTS2SW SPDT

1
3

2

R9
10KR910K

12

R10

3.3K

R10

3.3K

12

C28

0.1uF

C28

0.1uF

C24

0.1uF

C24

0.1uF

J7

SHUNTJ7SHUNT

R8
10KR810K

1 2

C1
22pFC122pF

U3

Z8F1680U3Z8F1680

PE3/T4CHA

3

PA2/DE0/X2IN

1

PA3/CTS0/X2OUT

2

PD6/DE1

4

PA4/RXD0/IRRX0

5

PA5/TXD0/IRTX0

6

PD5/TXD1/IRTX1

7

PA6/T1IN/T1OUT

8

PC4/MOSI/LED

9

PC5/SCK/LED

10

PA7/T1OUT

11

PC6/T2IN/T2OUT/LED13PC7/T2OUT/LED14PD0/RESET16DBG17VCC15PD4/RXD1/IRRX112PD3/CTS1/COUT118GND19PC0/ANA4/COINP/LED

21

PC1/ANA5/COINN/LED

22

PE4/T4CHB

20

PE5/T4CHC

33

PC2/SS/ANA6/LED

23

PC3/MISO/LED

24

PD2/C1INP

25

PD1/C1INN

26

PB0/AMPOUT/ANA0

27

PB1/AMPINN/ANA1

28

PB2/AMPINP/ANA2

29

PB4/ANA7

30

PB5/VREF

31

PB3/CLKIN/ANA3

32

AVCC

36

PE6/T4CHD

34

PE0/T4IN

35

VCC

37

PA0/T0IN/T0OUT/XIN

38

PA1/T0OUT/XOUT

39

GND

40

PE1/SCL

42

PE2/SDA

43

PD7/COUT0

44

AGND

41

C25

0.1uF

C25

0.1uF

J1

HDR/PIN 3x1J1HDR/PIN 3x1

11223

3

R7
10KR710K

12

C27

0.1uF

C27

0.1uF

Y1

20 MHzY120 MHz

1 3

2

R1

3.3KR13.3K

12

C23

0.1uF

C23

0.1uF

J4

HDR/PIN 2x1J4HDR/PIN 2x1

112

2

R17
10K

R17
10K

12

UM021204-0508 Schematics

Z8 Encore! XP

®

Dual F1680 Series Development Kit

User Manual

12

Figure 6. Z8 Encore! XP Dual F1680 Series MCU Development Board (Continued)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

ANA7

PCM_1

ANA3

PC3_SCK

PC4_MOSI

GND

ANA5

SDA

GND

VCC_3.3V

ANA4

GND

PC2_nSS

GND

ANA0

SCL

nCTS1

RXD0

PCM_0

ANA1

PC5_MISO

nCTS0

ANA2

RXD1

-RESET
VCC_3.3V

GND

ANA6

TXD0

GND

ANA1
ANA0

ANA2

ANA2

ANA3

ANA7

ANA6

ANA5

ANA4

ANA1

ANA0

PC6_T2IN
PC7_T2OUT

ANA4

ANA7

PCM_0
PCM_1
PCM_2

PC2_nSS

PCM_3

PC3_SCK

PCM_4

PC4_MOSI

PCM_5

PC5_MISO

PCM_6

PC6_T2IN

PCM_7

PC7_T2OUT

PES_0

SCL

PES_1

SDA

PES_2
PES_3

GND

GND

GND

PBM_5

GND

PES_5

GND

PEM_6

PDM_1
PDM_2
PDM_3

PAS_3

PAS_5
PAS_6
PAS_7

PBM_3
PBM_4

PEM_3
PEM_4
PEM_5

PAS_4

PDS_1

PES_6

PCS_4

PCS_3

PDS_2

PBM_2

PBM_1

PBM_0

PAS_2

-DIS_232

-DIS_IrDA

ANA[7:0]

RXD1

nCTS1

-RESET

PAS_[7:2]

PES_[3:0]

PAM_0 PAM_1

PAM_6

PDM_6

PEM_0

PBM_[5:0]

PCM_[7:0]

PDM_[3:1]

PEM_[6:3]

TXD1

TXD0

nCTS0
RXD0

PDS_[2:1]

PDS_7

PBS_5

PCS_[4:3]

PDM_7

PES_[6:5]

PES_4

VCC_3.3V

VCC_3.3V

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F248xB Evaluation Module. Schematic.

B

34

Wednesday, November 29, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F248xB Evaluation Module. Schematic.

B

34

Wednesday, November 29, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F248xB Evaluation Module. Schematic.

B

34

Wednesday, November 29, 2006

NC

NC

NC

NC

NC

NC

NC

NC

NC

NC

If Module is plugged onto the Dev Platform the local
RS232 interface is disabled by pin 50 of JP2

MDS INTERFACE

NC
NC

C8

0.1uFC80.1uF

12

C4

0.1uFC40.1uF

12

C7

0.1uFC70.1uF

12

JP2

HDR/PIN 30x2

JP2

HDR/PIN 30x2

112

2

334

4

556

6

778

8

9910

10

111112

12

131314

14

151516

16

171718

18

191920

20

212122

22

232324

24

252526

26

272728

28

292930

30

313132

32

333334

34

353536

36

373738

38

393940

40

414142

42

434344

44

454546

46

474748

48

494950

50

515152

52

535354

54

555556

56

575758

58

595960

60

C10

0.1uF

C10

0.1uF

12

C3

0.1uFC30.1uF

12

C6

0.1uFC60.1uF

12

C9

0.1uFC90.1uF

12

C5

0.1uFC50.1uF

12

JP1

HDR/PIN 30x2

JP1

HDR/PIN 30x2

112

2

334

4

556

6

778

8

9910

10

111112

12

131314

14

151516

16

171718

18

191920

20

212122

22

232324

24

252526

26

272728

28

292930

30

313132

32

333334

34

353536

36

373738

38

393940

40

414142

42

434344

44

454546

46

474748

48

494950

50

515152

52

535354

54

555556

56

575758

58

595960

60

UM021204-0508 Schematics

Z8 Encore! XP

®

Dual F1680 Series Development Kit

User Manual

13

Figure 7. Z8 Encore! XP Dual F1680 Series MCU Development Board (Continued)

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

5V

VCC_5V

GND

PA3_CTS0

PA4_RXD0

GND

PA5_TXD0

GND

RXD

CTS

TXD

VCC_3.3V

VCC_3.3V

IRDA_SD

-DIS_232

PA5_TXD0

PA3_CTS0
PA4_RXD0

-DIS_IRDA

PCS_7

-RESET

RXD1

TXD1

PCS_6

PCS_5

VCC_3.3V

VCC_3.3V

VCC_5V

VCC_3.3V

VCC_3.3V

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F24xB Evaluation Module. Schematic.

B

44

Wednesday, November 29, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F24xB Evaluation Module. Schematic.

B

44

Wednesday, November 29, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C1011-001

C

Z8F24xB Evaluation Module. Schematic.

B

44

Wednesday, November 29, 2006

DIS RS232

USER

DIS IRDA

-RESET

CONSOLE

3.3 OK

VCC 3.3V

POWER & LOCAL INTERFACES

GND

D5

GREEND5GREEN

21

R14
2R2

R14
2R2

12

C13

0.1uF

C13

0.1uF

12

C19

0.1uF

C19

0.1uF

12

U10B

SN74LVC2G04

U10B

SN74LVC2G04

I

3

4

O

2

GND

5

VCC

P1

CON DCP1CON DC

2
3
1

S1

SW PB NOS1SW PB NO

A B

B1A1

D2

GREEND2GREEN

21

P2

DB9 FemaleP2DB9 Female

5

9

4

8

3

7

2

6

1

C16

0.1uF

C16

0.1uF

12

D4

YELLD4YELL

21

R15
10K

R15
10K

12

C12

0.1uF

C12

0.1uF

12

R12
10K

R12
10K

12

C20

0.33uF

C20

0.33uF

J9

SHUNTJ9SHUNT

R13

68R

R13

68R

1 2

J10

SHUNT

J10

SHUNT

J3

HDR/PIN 2x1J3HDR/PIN 2x1

1

1

2

2

C17

0.1uF

C17

0.1uF

12

C15

0.1uF

C15

0.1uF

12

J5

HDR/PIN 3x1J5HDR/PIN 3x1

11223

3

+

C14
10uF

+

C14
10uF

12

R11
100 OHm

R11
100 OHm

12

J6

HDR/PIN 3x1J6HDR/PIN 3x1

11223

3

+

C18

10uF

+

C18

10uF

12

C11

0.1uF

C11

0.1uF

12

R16

10K

R16

10K

1 2

D3

REDD3RED

21

U10A

SN74LVC2G04

U10A

SN74LVC2G04

I

1

6

O

2

GND

5

VCC

U9
SPX2815AU-3.3

U9
SPX2815AU-3.3

VI

3

GND

1

VO

2

VO_2

4

U11

ZHX1810

U11

ZHX1810

TXD

2

SD

4

RXD

3

LEDA

1

VCC

5

GND

6

T

7

J2

HDR/PIN 2x1J2HDR/PIN 2x1

1

1

2

2

U8

SP3222EBCA

U8

SP3222EBCA

EN

1

C1+

2

C1-

4

C2+

5

C2-

6

T1IN

13

T2IN

12

R1OUT

15

R2OUT

10

V+

3

V-

7

T1OUT

17

T2OUT

8

R1IN

16

R2IN

9

SHDN

20

VCC

19

GND

18

NC2

11

NC1

14

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

Customer Support

For answers to technical questions about the product, documentation, or
any other issues with Zilog’s offerings, please visit Zilog’s Knowledge
Base at http://www.zilog.com/kb

For any comments, detail technical questions, or reporting problems,
please visit Zilog’s Technical Support at http://support.zilog.com

User Manual

14

.

.

UM021204-0508 Customer Support

Z8 Encore! XP® Dual F1680 Series Developmen t Kit

User Manual

15

Warning:

DO NOT USE IN LIFE SUPPORT

LIFE SUPPORT POLICY

ZILOG'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPO NENTS IN LIFE SUPPO RT DEVICES OR SY STEMS WITHOUT THE
EXPRESS PRIOR WRI TTEN APPROVAL OF THE PRESIDENT AND GENERAL
COUNSEL OF ZILOG CORPORATION.

As used herein

Life su ppo rt dev ices or syst ems a re de vices whic h (a) a re int ende d for surgica l im plant
into the body, or (b) support o r susta in life and w hose failur e to p erform when pr ope rly
used in accordance with instructions for use provided in the labeling can be reasonably
expected to result in a significant injury to the user. A critical component is any
component in a life support device or system whose failure to perform can be reasonably
expected to cause the failure of the life support device or system or to affect its safety or
effectiveness.

Document Disclaimer

©2 008 by Zilog, Inc. All r ights rese rved. Informa tion in this p ublication c oncerni ng the
devi ces, app licat io ns, o r tec hno logy d escrib ed is in ten ded to s ug gest po ssib le u ses a nd
may be superseded. ZILOG, INC. DOES NOT ASSUME LIABILITY FOR OR
PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION,
DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO
DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY
INFRINGEM ENT RELATED IN ANY MANNER TO USE OF INFOR MATION,
DEVICES, OR TECHNOLOGY DESCRIBED HEREIN OR OTHERWISE. The
information contained within this document has been verified according to the general
principles of electrical and mechanical engineering.

Z8 Encore! XP is a registered trademark of Zilog, Inc. All other product or service names
are the property of their respective owners.

UM021204-0508