PARTS LIST
BLOCK DIAGRAM(ブロックダイアグラム )
LEVEL DIAGRAM(レベルダイアグラム)
WIRING(結線図)
CIRCUIT DIAGRAM(回路図)
PA
012180
HAMAMATSU, JAPAN
Copyright (c) Yamaha Corporation. All rights reserved. PDF ’16.10
PX10/PX8/PX5/PX3
IMPORTANT NOTICE
This manual has been provided for the use of authorized Yamaha Retailers and their service personnel. It has been assumed that basic service procedures inherent to the industry, and more specifically Yamaha Products, are already known and understood by the users, and have
therefore not been restated.
WARNING : Failure to follow appropriate service and safety procedures when servicing this product may result in personal injury, de-
IMPORTANT : This presentation or sale of this manual to any individual or firm does not constitute authorization certification, recog-
The data provided is believed to be accurate and applicable to the unit(s) indicated on the cover. The research engineering, and service
departments of Yamaha are continually striving to improve Yamaha products. Modifications are, therefore, inevitable and changes in
specification are subject to change without notice or obligation to retrofit. Should any discrepancy appear to exist, please contact the
distributor’s Service Division.
WARNING : Static discharges can destroy expensive components. Discharge any static electricity your body may have accumulated by
struction of expensive components and failure of the product to perform as specified. For these reasons, we advise all
Yamaha product owners that all service required should be performed by an authorized Yamaha Retailer or the appointed
service representative.
nition of any applicable technical capabilities, or establish a principal-agent relationship of any form.
grounding yourself to the ground bus in the unit (heavy gauge black wires connect to this bus.)
IMPORTANT : Turn the unit OFF during disassembly and parts replacement. Recheck all work before you apply power to the unit.
WARNING: This product contains chemicals known to the State of California to cause cancer, or birth defects or other reproductive harm.
DO NOT PLACE SOLDER, ELECTRICAL/ELECTRONIC OR PLASTIC COMPONENTS IN YOUR MOUTH FOR ANY REASON WHAT SO EVER!
Avoid prolonged, unprotected contact between solder and your skin! When soldering, do not inhale solder fumes or expose eyes to solder/ flux
vapor!
If you come in contact with solder or components located inside the enclosure of this product, wash your hands before handling food.
IMPORTANT NOTICE FOR THE UNITED KINGDOM
Connecting the Plug and Cord
WARNING: THIS APPARATUS MUST BE EARTHED IMPORTANT. The wires in this mains lead are coloured in accordance with
the following code:
GREEN-AND-YELLOW : EARTH
BLUE : NEUTRAL
BROWN : LIVE
As the colours of the wires in the mains lead of this apparatus may not correspond with the coloured markings identifying the
terminals in your plug proceed as follows:
The wire which is coloured GREEN-and-YELLOW must be connected to the terminal in the plug which is marked by the letter E
or by the safety earth symbol
The wire which is coloured BLUE must be connected to the terminal which is marked with the letter N or coloured BLACK.
The wire which is coloured BROWN must be connected to the terminal which is marked with the letter L or coloured RED.
or colored GREEN or GREEN-and-YELLOW.
(3 wires)
WARNING
Components having special characteristics are marked and must be replaced with parts having specification equal to those
originally installed.
Insert the SpeakON cable plug (Neutrik NL4) into the
connector, and turn it to the right to lock it.
(スピコンケーブルプラグ(NeutrikNL4)を差し込み、
右に回してロックします。)
• Binding post connector
• Without plugs
Remove about 15 mm of insulation from the end of each
speaker cable, pass the bare wire through the holes in the
appropriate speaker terminals, and tighten the terminals to
securely clamp the wires. Make sure that the bare wire ends do
not jut out from the terminals and touch the chassis.
(スピーカーケーブルの先端の被覆を15mm外し、端子の穴に通
して締め付けます。このとき、芯線がシャーシに当たらないよう
にしてください。)
• Y-plugs
From above, insert the Y-plugs all the way into the opening, and
tighten the terminals.
(Y型プラグを上から奥まで差し込み、締め付けます。)
(プラグなしの場合)
15 mm
(Y型プラグの場合)
(バインディングポスト端子)
1+
1–
Channel A (Aチャンネル)
Neutrik NL4
1+A+
1–A–
2+B+
2–B–
PX amplifier
(PXアンプ)
2–
2+
Channel B (Bチャンネル)
Neutrik NL4
1+B+
1–B–
2+
2–
PX amplifier
(PXアンプ)
not connected
(接続なし)
not connected
(接続なし)
0.25"
(6.3 mm)
≤0.51"
(12.9 mm)
8
CIRCUIT BOARD LAYOUT(ユニットレイアウト)
PX10/PX8/PX5/PX3
• Top view
(上から見た図)
AC INLET
(ACインレット)
OUT
AUDIO
PS
ACIN
• Front view
PSW
DC FAN
(DCファン)
(前面から見た図)
PF
VOL
DC FAN
(DCファン)
FPN
USBENC
9
PX10/PX8/PX5/PX3
DISASSEMBLY PROCEDURE(分解手順)
Caution:
• Install the binding tie and the cord clamp in the same way
as they were before removal.
• Pay attention not to insert and install the FFC cable to the
connector inversely. (Photo A)
Front Side
(表面)
Photo A
1. Top Panel (Time required: About 2 minutes)
1-1 Remove the nine (9) screws marked [1120]. The top panel
can then be removed. (Fig. 1)
* When installing the top panel, first tighten the priority
screws as shown in Fig. 1.
Priority screw (2nd)
(優先ネジ2)
注意事項
•インシュロックタイ、束線止めは、取り外す前と同じように取り
付けてください。
•FFCケーブルの表・裏を逆に差し込まないように注意して取り
付けてください。(写真A)
Back Side
(裏面)
(写真 A)
1.トップパネル
1-1[1120]のネジ 9 本を外して、トップパネルを外します。
(図1)
※ トップパネルを取り付ける際は、優先ネジを図1に示す順
で締めてください。
Priority screw (1st)
(優先ネジ1)
(所要時間:約2 分)
[1120]
TOP PANEL
(トップパネル)
Priority screw (2nd)
(優先ネジ2)
[1120]
[1120]
10
Fig. 1
(図1)
<Top view (上面)>
AC INLET
(ACインレット)
[860] [440][440]
[350]
Priority screw (2nd)
(優先ネジ2)
[520]
PX10/PX8/PX5/PX3
Priority screw (1st)
(優先ネジ1)
[340]
<Rear view (背面)>
[670]
ACIN
HEXAGONAL NUT
(六角ナット)
Priority screw (3rd)
(優先ネジ3)
CB901
Priority screw (2nd)
[520]
AUDIO
[670]
OUT
CB902
PS
(優先ネジ2)
HEXAGONAL NUT
(六角ナット)
Priority screw (3rd)
(優先ネジ3)
PF
[470A]
Priority screw (1st)
(優先ネジ1)
Priority screw (2nd)
(優先ネジ2)
[430]
AUDIO
OUT
[630]
Tighten the screws marked [330] with
holding the inlet angle.
(インレット金 具を押さえながら[330]のネジを
締めてください 。)
[640]
Priority screw (2nd)
(優先ネジ2)
[620]
Priority screw (1st)
(優先ネジ1)
[420]
Priority screw (1st)
(優先ネジ1)
Fig. 2
2.
ACIN Circuit Board (Time required: About 4 minutes)
2-1 Remove the top panel. (See procedure 1.)
2-2 Remove the cable tie marked [860]. (Fig. 2)
2-3 Remove the two (2) screws marked [330], the nine (9)
screws marked [340] and the screw marked [350]. The
ACIN circuit board can then be removed.(Fig. 2)
* When installing the ACIN circuit board, first tighten the
screws marked [330] with holding the inlet angle.
(Fig. 2)
3.
PS Circuit Board (Time required: About 6 minutes)
3-1 Remove the top panel. (See procedure 1.)
3-2 Remove the ten (10) screws marked [520]. The PS circuit
board can then be removed.(Fig. 2)
* When installing the PS circuit board, first tighten the
5-1 Remove the top panel. (See procedure 1.)
5-2 Remove the shield out. (See procedure 4-2.)
5-3 Remove the connectors of the CB901 and CB902 from
OUT circuit board. (Fig. 2)
5-4 Remove the PS circuit board. (See procedure 3.)
5-5 PX10/PX8 onlyRemove the two (2) plastic rivets marked [850]. The duct
amp can then be removed. (Fig. 4)
* When installing the duct amp, fit the tabs of duct amp
into the slots of sub chassis. (Fig. 4)
5-6 Remove the nine (9) screws marked [630]. (Fig. 2)
5-7 Remove the four (4) screws marked [620], the two (2)
screws marked [640], the two (2) hexagonal nuts, the two
(2) washers and the two (2) plastic washers marked [670].
The AUDIO circuit board can then be removed. (Fig. 2)
* When installing the AUDIO circuit board, first tighten
the priority screws as shown in Fig. 2.
* PX5/PX3 only : When installing the AUDIO circuit board,
AUDIO circuit board with bending FFC guard as shown
Fit the tabs of duct amp into the slots of sub chassis.
(ダクトAMPのタブをサブシャーシの長孔に挿し入れます。)
[850]
Fig. 4
(図4)
DUCT AMP
(ダクトAMP)
(FFCガードを曲げながらAUDIOシートを 取り付 け てください 。)
PX10/PX8/PX5/PX3
FFC GUARD
(FFCガード)
AUDIO
6. PF
Circuit Board
(Time required: About 3 minutes)
6-1 Remove the top panel. (See procedure 1.)
6-2 Remove the four (4) screws marked [470A]. The PF circuit
board can then be removed. (Fig. 2)
* When installing the PF circuit board, first tighten the
priority screws as shown in Fig. 2.
7. Front Panel Assembly
(Time required: About 4 minutes)
7-1 Remove the top panel. (See procedure 1.)
7-2 Remove the eight (8) screws marked [960]. The front
frame can then be removed. (Fig. 5)
7-3 Remove the seven (7) screws marked [940] and the knob
ENCDR. The front panel assembly can then be removed.
(Fig. 5)
* When installing the front frame and front panel
assembly, first tighten the priority screws as shown in
Fig. 5.
8. PSW
Circuit Board
(Time required: About 4 minutes)
8-1 Remove the top panel. (See procedure 1.)
8-2 Remove the front panel assembly. (See procedure 7.)
8-3 Remove the two (2) screws marked [100] and power
switch knob. The PSW circuit board can then be removed.
(Fig. 5)
* When installing the PSW circuit board, first tighten the
9-1 Remove the top panel. (See procedure 1.)
9-2 Remove the front panel assembly. (See procedure 7.)
9-3 Remove the connector of the CB103 from ACIN circuit
board. (Fig. 6)
9-4 Remove the cable tie marked [750]. (Fig. 6)
9-5 Remove the five (5) screws marked [720]. The shield
ACIN can then be removed. (Fig. 6)
* When installing the shield ACIN, first tighten the priority
screws as shown in Fig. 6.
9-6 Remove the six (6) screws marked [1020]. The right and
left rack angles can then be removed. (Fig. 6)
* When installing the rack angles, first tighten the priority
screws as shown in Fig. 6.
9-7 Remove the screw marked [470B]. (Fig. 6)
9-8 Remove the seven (7) screws marked [270]. The front
panel section can then be removed. (Fig. 6)
* When installing the front panel section, first tighten the
priority screws as shown in Fig. 6.
* When installing the front panel section, fit the claws
of side panels (L/R) into the notches of front panel
sectoin, fit the claw of front panel section into the notch
PCM1804DBR (X6872A01) ADC (Analog to Digital Converter)
18
PIN
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
V
REFL
AGNDL
V
COML
INL+
V
V
INL–
FMT0
FMT1
S/M
OSR0
OSR1
OSR2
BYPAS
DGND
DD
V
DATA/DSDR
I/OFUNCTIONNAME
-
L-channel voltage reference output,
requires capacitors for decoupling to AGND
-
Analog ground for VREFL
-
L-channel analog common-mode voltage (2.5 V)
I
L-channel analog input, positive pin
I
L-channel analog input, negative pin
I
Audio data format 0
I
Audio data format 1
I
Slave/master mode selection
I
Oversampling ratio 0
I
Oversampling ratio 1
I
Oversampling ratio 2
I
HPF bypass control
-
Digital ground
-
Digital power supply +3.3 V
O
L-channel and R-channel audio data output in PCM
mode / R-channel audio data output in DSD mode
PIN
NO.
16
BCK/DSDL
17
LRCK/DSDBCK
18
SCKI
19
RST
20
OVFR
21
OVFL
22
23
AGND
24
VINR–
25
VINR+
26
VCOMR
27
AGNDR
28
V
V
CC
REFR
I/OFUNCTIONNAME
I/O
I/O
Bit clock input/output in PCM mode /
L-channel audio data output in DSD mode
Sampling clock input/output in PCM and
DSD modes
I
System clock input
I
Reset, power-down input, active-low
O
Overflow signal of R-channel in PCM mode
O
Overflow signal of L-channel in PCM mode
-
Analog power supply +5 V
-
Analog ground
I
R-channel analog input, negative pin
I
R-channel analog input, positive pin
-
R-channel analog common-mode voltage (2.5 V)
-
Analog ground for VREFR
-
R-channel voltage reference output,
requires capacitors for decoupling to AGND
AUDIO : IC417
PX10/PX8/PX5/PX3
LPC1820FBD144, 551 (YF570B00) MCU
PIN
NO.
1
GPIO2 [0
2
ADC0_1
3
GPIO2
4
VSSIO
5
VDDIO
6
DAC
7
GPIO2
8
GPIO2 [2
9
GPIO2 [4
10
GPIO2 [5
11
GPIO2 [6
12
XTAL1
13
XTAL2
14
I2S1_TX_SCK
15
GPIO5 [12
16
USB0_VDDA3V3_DRIVER
17
USB0_VDDA3V3
18
USB0_DP
19
USB0_VSSA_TERM
20
USB0_DM
21
USB0_VBUS
22
USB0_ID
23
USB0_VSSA_REF
24
USB0_RREF
25
VDDREG
26
TDI
27
TCK
28
DBGEN
29
TRST
30
TMS
31
TDO
32
GPIO0
33
GPIO5 [13
34
I2S1_TX_SDA
35
GPIO5 [14
36
VDDIO
37
GPIO2
38
GPIO0 [4
39
GPIO2 [10
40
VSSIO
41
VDDIO
42
BOOT
43
BOOT [1
44
SSP1_MISO
45
SSP1_SCK
46
GPIO2
47
SSP1_MOSI
48
SSP1_SSEL
49
GPIO1
50
GPIO1 [10
51
GPIO1 [1
52
GPIO1 [2
53
GPIO1 [3
54
GPIO2 [12
55
GPIO1 [4
56
GPIO1 [5
57
GPIO2 [13
58
GPIO2 [14
59
VDDREG
60
GPIO1
61
GPIO1 [7
62
GPIO0 [2
63
GPIO2 [15
64
GPIO0 [3
65
GPIO2 [7
66
GPIO0 [12
67
GPIO0 [13
68
CLKOUT
69
GPIO5
70
GPIO0 [15
71
VDDIO
72
GPIO4
[1]
[3]
[0]
[9]
[0]
[11]
[9]
[6]
[18]
[11]
I/OFUNCTIONNAME
]
I/O
General purpose digital input/output pin
I
ADC input channel 1
I/O
General purpose digital input/output pin
-
Ground
-
I/O power supply +3.3 V
I
ADC input channel 0
I/O
]
I/O
]
I/O
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
]
General purpose digital input/output pin
I/O
I/O
Input to the oscillator circuit and internal clock generator circuits
I
Output from the oscillator amplifier
O
Transmit Clock
I/O
General purpose digital input/output pin
I/O
Separate analog 3.3 V power supply for driver
USB 3.3 V separate power supply voltage
USB0 bidirectional D+ line
I/O
Dedicated analog ground for clean reference for termination resistors
USB0 bidirectional D- line
I/O
VBUS pin (power on USB cable)
I/O
Indicates to the transceiver whether connected as an
I
A-device (USB0_ID LOW) or B-device (USB0_ID HIGH)
Dedicated clean analog ground for generation of reference currents and voltages
-
12.0 kΩ (accuracy 1 %) on-board resistor to ground for current reference
Main regulator power supply +3.3 V
Test Data In for JTAG interface
I
Test Clock for JTAG interface
I
JTAG interface control signal
I
Test Reset for JTAG interface
I
Test Mode Select for JTAG interface
I
Test Data Out for JTAG interface
O
I/O
General purpose digital input/output pin
I/O
2
I
S1 transmit data
I/O
General purpose digital input/output pin
I/O
I/O power supply +3.3 V
-
I/O
General purpose digital input/output pin
I/O
I/O
Ground
I/O power supply +3.3 V
-
I/O
Boot pin
I/O
Master In Slave Out for SSP1
I/O
Serial clock for SSP1
I/O
General purpose digital input/output pin
I/O
Master Out Slave in for SSP1
I/O
Slave Select for SSP1
I/O
I/O
I/O
I/O
I/O
I/O
General purpose digital input/output pin
I/O
I/O
I/O
I/O
I/O
Main regulator power supply +3.3 V
-
I/O
I/O
I/O
I/O
General purpose digital input/output pin
I/O
I/O
I/O
I/O
Clock output pin
O
I/O
General purpose digital input/output pin
I/O
I/O power supply +3.3 V
General purpose digital input/output pin
I/O
(Microcontroller Unit)
PIN
NO.
73
I
2S0_RX_MCLK
74
I2S0_RX_WS
75
76
77
78
I2S0_RX_SDA
79
80
81
82
83
84
85
GPIO5 [15
86
GPIO5 [16
87
I2C1_SDA
88
89
90
91
92
93
I2C0_SDA
94
95
96
97
98
99
I2S0_TX_MCLK
100
101
102
103
104
GPIO0 [14
105
GPIO1 [11
106
GPIO1 [12
107
108
GPIO1
109
110
111
112
I2S0_TX_SCK
113
114
I2S0_TX_WS
115
GPIO3
116
I2S0_TX_SDA
117
GPIO3 [11
118
SPIFI_SCK
119
SPIFI_SIO3
120
TRACECLK
121
SPIFI_SIO2
122
SPIFI_MISO
123
SPIFI_MOSI
124
125
126
127
128
129
RTC_ALARM
130
WAKEUP0
131
132
TRACEDATA [0
133
TRACEDATA [1
134
TRACEDATA [2
135
136
137
138
139
140
TRACEDATA [3
141
142
143
144
U0_TXD
VSSIO
VDDIO
GPIO3 [2
GPIO3 [3
U0_RXD
GPIO3
GPIO0 [5
GPIO5 [2
I2C1_SCL
N.C.
N.C.
GPIO5
I2C0_SCL
VDDREG
GPIO5
GPIO0 [7
GPIO3 [5
BOOT [2
GPIO3 [6
GPIO3 [7
BOOT [3
GPIO2 [8
VDDIO
VSSIO
GPIO3
VDDIO
GPIO3 [9
SPIFI_CS
RTCX1
RTCX2
VBAT
RESET
VDDREG
VSSA
ADC0_7
VDDA
ADC0_4
ADC0_3
VDDIO
ADC0_6
ADC0_2
ADC0_5
[4]
[5]
[6]
[13]
[8]
[10]
I/OFUNCTIONNAME
O
I/O
O
-
-
I/O
]
I/O
]
I/O
I
I/O
]
I/O
]
I/O
]
I/O
]
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
]
I/O
]
I/O
]
-
O
]
I/O
]
I/O
]
I/O
]
I/O
]
I/O
]
I/O
]
I/O
I/O
I/O
I/O
]
I/O
I/O
I/O
I/O
]
I/O
O
I/O
O
I/O
I/O
I/O
I/O
I
O
I
O
I
-
]
O
]
O
]
O
I
I
I
]
O
I
I
I
FPN (PN) : IC103
2
S receive master clock
I
Receive Word Select
Transmitter output for USART0
Ground
I/O power supply +3.3 V
2
S Receive data
I
General purpose digital input/output pin
Receiver input for USART0
General purpose digital input/output pin
2
C1 data input/output
I
2
C1 clock input/output
I
Not connected
General purpose digital input/output pin
2
C clock input/output
I
2
C data input/output
I
Main regulator power supply +3.3 V
General purpose digital input/output pin
Boot pin
2
S transmit master clock
I
General purpose digital input/output pin
Boot pin
General purpose digital input/output pin
I/O power supply +3.3 V
General purpose digital input/output pin
Ground
General purpose digital input/output pin
I/O power supply +3.3 V
Transmit Clock
General purpose digital input/output pin
Transmit Word Select
General purpose digital input/output pin
2
S transmit data
I
General purpose digital input/output pin
Serial clock for SPIFI
I/O lane 3 for SPIFI
Trace clock
I/O lane 2 for SPIFI
Input 1 in SPIFI quad mode; SPIFI output IO1
Input 0 in SPIFI quad mode; SPIFI output IO0
SPIFI serial flash chip select
Input to the RTC 32 kHz ultra-low power oscillator circuit
Output from the RTC 32 kHz ultra-low power oscillator circuit
RTC power supply: 3.3 V on this pin supplies power to the RTC
External reset input
RTC controlled output
External wake-up input
Main regulator power supply +3.3 V
Trace data, bit 0
Trace data, bit 1
Trace data, bit 2
Analog ground
ADC input channel 7
Analog power supply +3.3 V and ADC reference voltage
ADC input channel 4
ADC input channel 3
Trace data, bit 3
I/O power supply +3.3 V
ADC input channel 6
ADC input channel 2
ADC input channel 5
19
PX10/PX8/PX5/PX3
YSS952-QZE2A (YE441A00) DSP (SPR-2) (Digital Signal Processor)
PIN
NO.
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
GPIO5
GPIO4
GPIO3
DVSS
GPIO2
GPIO1
GPIO0
PLLVDD
IC_N
PLLVSS
PLLVSS
XIN
XOUT
IOVDD
SCL
SDA
I/OFUNCTIONNAME
I/O
I/O
General-purpose I/O pins
I/O
-
GND
I
I
General-purpose I/O pins
I
-
PLL power supply
I
Hardware reset pin
-
PLL GND
I
Clock input pin
O
Clock output pin
-
Control interface power supply
2
C control bus clock input pin
I
I
2
C control bus data I/O pin
I
I/O
PIN
NO.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
OPEN
DVSS
IRQ_N
DVDD18
GPIO11
TESTb
DVSS
OPEN
DVSS
GPIO10
GPIO9
GPIO8
IOVDD
GPI07
DVDD18
GPI06
I/OFUNCTIONNAME
-
Leave this pin open
-
GND
O
Interrupt request output pin to the host controller