Wistron JM70-PU Schematic

5
4
3
2
1
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Project code: 91.4CE01.001 PCB P/N : 48.4CE01.0SC REVISION : 08255-SC
DDR2
D D
667/800 MHz
16,17
DDR2
667/800 MHz
CLK GEN.
ICS ICS9LPRS480
Line In
34
C C
MIC In
16,17
Codec
ALC888S
667/800MHz
667/800MHz
3
31
AZALIA
AMD Giffin CPU S1G2 (35W)
638-Pin uFCPGA638
OUT
4,5,6,7
16X16
IN
North Bridge
AMD RS780M
CPU I/F INTEGRATED GRAHPICS
LVDS, CRT I/F
8,9,10
G792
PCIex16
39
CRT
22
LCD
21
HDMI
23
MXM3.0
19
34
LAN
Giga LAN
BCM5784MKMLG
New card
SD/MMC/MS/ MS PRO/XD
KBC
Winbond
WPC773L
40
(10/100/1000Mb)ETHERNET
A-Link 4X4
USB
USB
PCIex1
CardReader AU6433
LPC BUS
Line Out(SPDIF)
34
Front.SPKR
34
SUBWOOFER
B B
33
RJ11
OP AMP
G1412R
OP AMP
G1454R
OP AMP
G1442R
32
32
32
MODEM
MDC Card
35
South Bridge
AMD SB700
USB 2.0 12 ports USB 1.1 2 ports
High Definition Audio
ATA 66/100
ACPI 1.1 LPC I/F
PCI/PCI BRIDGE
11,12,13,14,15
SATA
USB I
Mini USB Blue Tooth
27
Camera
21
26
Finger
A A
24
HDD SATA I
Printer
43
USB II 4 Port
Touch
28
Pad
INT. KB
43 40
TXFM RJ45
29
38 38
5 in 1
BIOS
Winbond W25X80
Launch Button
CIR
41
30 30
PWR SW W83L351
Mini Card
Kedron
Mini Card
TV tuner
41
a/b/g/n
3636
LPC
DEBUG CONN.
42
37
37
41
ODD SATA
25
HDD SATA II
24
5
4
3
2
PCB STACKUP
TOP
VCC
S
S
GND
BOTTOM
SYSTEM DC/DC
TPS51125
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51124
INPUTS OUTPUTS
DCBATOUT
SYSTEM DC/DC
TPS51117
INPUTS OUTPUTS
DCBATOUT 1D8V_S3(10A)
RT9026PFP
1D8V_S3
RT9166
3D3V_S0
G957
3D3V_S0
G9161(UMA)
3D3V_S5
G9131(DIS)
3D3V_S5
CHARGER
MAX8731A
DCBATOUT
CPU DC/DC
INPUTS
DCBATOUT
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
A3
A3
A3
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
1
OUTPUTS
5V_S5(7A)
3D3V_S5(7A)
1D1V_S0(8A)
1D2V_S0(5A)
DDR_VREF_S3
0D9V_S3(1A)
2D5V_S0 (300mA)
1D5V_S0(1A)
1D2V_S5 (400mA)
1D2V_S5 (300mA)
OUTPUTSINPUTS
CHG_PWR
18V 6.0A
UP+5V
5V 100mA
ISL6265HR
OUTPUTS
VCC_CORE_S0_0
0~1.55V 18A
VCC_CORE_S0_1
0~1.55V 18A
VDDNB
0~1.55V 18A
of
156Monday, March 02, 2009
of
156Monday, March 02, 2009
of
156Monday, March 02, 2009
49
50
52
51
51
51
51
51
53
48
-2
-2
-2
5
D D
C C
4
3
2
1
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
HISTORY
HISTORY
HISTORY
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
of
256Monday, March 02, 2009
of
256Monday, March 02, 2009
of
256Monday, March 02, 2009
1
-2
-2
-2
5
090119 -1
3D3V_S0 3D3V_CLK_VDD
R115
R115
1 2
0R0603-PAD
0R0603-PAD
12
12
C186
C186
C187
C187
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
12
12
C610
C610
C585
C585
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C597
C597
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
090206 -1
12
12
C606
C606
C580
C580
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
DY
DY
12
12
C571
C571
C223
C223
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3
3D3V_S0
3000mA.80ohm
R131
R131
1 2
2R3J-GP
2R3J-GP
12
C235
C235
DY
DY
3D3V_48MPWR_S0
12
C619
C619 SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
Due to PLL issue on current clock chip, the SBlink clock need to come from SRC clocks for RS740 and RS780. Future clock chip revision will fix this.
1
D D
R359
R359
R360
R360
DY
DY
090119 -1
R132
R132
1 2
0R0603-PAD
0R0603-PAD
1 2
0R3-0-U-GP
0R3-0-U-GP
CLK_PCIE_SB11
CLK_PCIE_SB#11
CLK_PCIE_LAN29
CLK_PCIE_LAN#29
CLK_PCIE_MINI237
CLK_PCIE_MINI2#37
CLK_PCIE_NEW38
CLK_PCIE_NEW#38
CLK_PCIE_MINI137
CLK_PCIE_MINI1#37
CLK_NB_GPPSB9
CLK_NB_GPPSB#9
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
R306
R306
DY
DY
CLK_NBHT_CLK9 CLK_NBHT_CLK#9
3D3V_S0
DY
DY
R357
R357
R358
R358
12
C216
C216
1 2
1 2
12
C578
C578
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
090119 -1
TP202TPAD14-GP TP202TPAD14-GP TP201TPAD14-GP TP201TPAD14-GP
090119 -1
DY
DY
R356
R356
10KR2J-3-GP
10KR2J-3-GP
DY
DY
R355
R355
10KR2J-3-GP
10KR2J-3-GP
5
12
C583
C583
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1 1
1 2
1 2
12
12
C202
C202
C572
C572
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CLK_SRC0T_LPRS CLK_SRC0C_LPRS
REF2 REF1 REF0
090206 -1
DY
DY
12
12
C607
C607
C575
C575
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_CLK_VDD
12
C620
C620
3D3V_S0
SEL_27 REF2
SEL_SATA REF1
SEL_HTT66 REF0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D1V_CLK_VDDIO
1 0 100MHz differ ential spreading SRC clock 1
1 0 * 100MHz differential HTT clock
* default
3D3V_CLK_VDD
3D3V_48MPWR_S0
PD#
PD#
R344
R344
12
10KR2J-3-GP
10KR2J-3-GP
27MHz non-spreading singl ed clock on pin 5 and 27MHz sprea d clock on pin 6
*
100MHz non-spreading differential SATA clock 100MHz differ ential spreading SRC clock
*0
66MHz 3.3V single ended HTT clock
CPU_CLK(200MHz)
4
U46
U46
26
VDDATIG
25
VDDATIG_IO
48
VDDCPU
47
VDDCPU_IO
16
VDDSRC
17
VDDSRC_IO
11
VDDSRC_IO
35
VDDSB_SRC
34
VDDSB_SRC_IO
40
VDDSATA
4
VDD
55
VDDHTT
56
VDDREF
63
VDD48
51
PD#
22
SRC0T_LPRS
21
SRC0C_LPRS
20
SRC1T_LPRS
19
SRC1C_LPRS
15
SRC2T_LPRS
14
SRC2C_LPRS
13
SRC3T_LPRS
12
SRC3C_LPRS
9
SRC4T_LPRS
8
SRC4C_LPRS SRC6T/SATAT_LPRS42GNDSATA
41
SRC6C/SATAC_LPRS
6
SRC7T_LPRS/27MHZ_SS
5
SRC7C_LPRS/27MHZ_NS
37
SB_SRC0T_LPRS
36
SB_SRC0C_LPRS
32
SB_SRC1T_LPRS
31
SB_SRC1C_LPRS
54
HTT0T_LPRS/66M
53
HTT0C_LPRS/66M
ICS9LPRS480BKLFT-GP
ICS9LPRS480BKLFT-GP
71.09480.A03
71.09480.A03 2nd = 71.08628.003
2nd = 71.08628.003 3rd = RealTek : 71.00880.A03
ATIG0T_LPRS ATIG0C_LPRS ATIG1T_LPRS ATIG1C_LPRS
CPUKG0T_LPRS CPUKG0C_LPRS
REF0/SEL_HTT66
REF1/SEL_SATA
(Silego)
SMBCLK SMBDAT
CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#
48MHZ_0
REF2/SEL_27
GNDATIG
GND
GNDHTT GNDREF GNDCPU
GND48
GNDSRC GNDSRC
GNDSB_SRC
GND
REF0
X1 X2
GEN_XTAL_IN
61
GEN_XTAL_OUT
62
CLK_SMBCLK
2
CLK_SMBDAT
3
30 29 28 27
23 45 44 39 38
50 49
CLK_48
64
REF0
59
REF1
58
REF2
57
43 24 7 52 60 46 1
10 18
33 65
R343
R343
1 2
DY
DY
10MR2J-L-GP
10MR2J-L-GP
CL=20pF±0.2pF
090119 -1
CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#
TP192 TPAD14-GPTP192 TPAD14-GP
1
TP203 TPAD14-GPTP203 TPAD14-GP
1
TP204 TPAD14-GPTP204 TPAD14-GP
1
TP196 TPAD14-GPTP196 TPAD14-GP
1
TP197 TPAD14-GPTP197 TPAD14-GP
1
090119 -1
RN76
RN76
1 2 3
SRN15J-2-GP
SRN15J-2-GP
4
090210 as Larry's suggestion
Fos SB710 11/14
DY
DY
R275
R275
REF1 CLK_SB_25M
1 2
110R2F-GP
110R2F-GP
R345150R2F-1-GP R345150R2F-1-GP
12
R34975R2F-2-GP R34975R2F-2-GP
12
CLK_NB_14M 9
OSC_14M_NB
1.1V 158R/90.9RRS780M
3
3D3V_S0
1D1V_S0 1D1V_CLK_VDDIO
C C
B B
10KR2J-3-GP
10KR2J-3-GP
A A
10KR2J-3-GP
10KR2J-3-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C622
C622
C623
C623
12
12
X5
X-14D31818M-44GP
X-14D31818M-44GP
2ND = 82.30005.A41
2ND = 82.30005.A41
X5
82.30005.951
82.30005.951
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1 2
SC33P50V2JN-3GP
SC33P50V2JN-3GP
CLK_NB_GFX 9
CLK_NB_GFX# 9
CLK_PCIE_PEG 19 CLK_PCIE_PEG# 19
CLKREQ# Internal pull high But Sellego internal pull low
CPU_CLK 6 CPU_CLK# 6
CLK48_USB 12 CLK48_5158E 36
DY
DY
DY
12
EC119
EC119 SC5P50V2CN-2GP
SC5P50V2CN-2GP
12
DY
DY
R274
R274 75R2F-2-GP
75R2F-2-GP
DY
12
EC120
EC120 SC5P50V2CN-2GP
SC5P50V2CN-2GP
CLK_SB_25M 11
2
090213 -1
1 2 1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
NB CLOCK INPUT TABLE
NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK 100M DIFF 100M DIFF
* RS780 can be used a s clock buffer to output two PCIE referecence clocks By deault, chip will configured as input mode, BIOS can program it to output mode.
Clock chip has internal serial terminations for differencial pairs, external resistors are reserved for debug purpose.
R450 150R2F-1-GPR450 150R2F-1-GP R451 150R2F-1-GPR451 150R2F-1-GP
12
DY
DY
C711
C711
RS740 RX780 RS780
66M SE(SINGLE END)
NC
14M SE (3.3V) 14M SE (1.8V) 14M SE (1.1V) NC NC vref
100M DIFF NC 100M DIFF
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
SMBC0_SB 12,16,17
SMBD0_SB 12,16,17
12
DY
DY
C712
C712 SC10P50V2JN-4GP
SC10P50V2JN-4GP
100M DIFF 100M DIFF
100M DIFF 100M DIFF
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CLKGEN_ICS9LPRS480
CLKGEN_ICS9LPRS480
CLKGEN_ICS9LPRS480
JM70-PU
JM70-PU
JM70-PU
1
100M DIFF 100M DIFF
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
356Friday, March 06, 2009
356Friday, March 06, 2009
356Friday, March 06, 2009
of
of
of
-2
-2
-2
5
D D
4
3
2
1
1D2V_S0
Place close to socket
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD22U6D3V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
12
C562
C562
C539
C539
C C
B B
SCD22U6D3V2KX-1GP
12
C558
C558
12
C570
C570
090206 -1
DY
DY
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
12
C544
C544
12
C564
C564
HT_NB_CPU_CAD_H08 HT_NB_CPU_CAD_L08 HT_NB_CPU_CAD_H18 HT_NB_CPU_CAD_L18 HT_NB_CPU_CAD_H28 HT_NB_CPU_CAD_L28 HT_NB_CPU_CAD_H38 HT_NB_CPU_CAD_L38 HT_NB_CPU_CAD_H48 HT_NB_CPU_CAD_L48 HT_NB_CPU_CAD_H58 HT_NB_CPU_CAD_L58 HT_NB_CPU_CAD_H68 HT_NB_CPU_CAD_L68 HT_NB_CPU_CAD_H78 HT_NB_CPU_CAD_L78 HT_NB_CPU_CAD_H88 HT_NB_CPU_CAD_L88 HT_NB_CPU_CAD_H98 HT_NB_CPU_CAD_L98 HT_NB_CPU_CAD_H108 HT_NB_CPU_CAD_L108 HT_NB_CPU_CAD_H118 HT_NB_CPU_CAD_L118 HT_NB_CPU_CAD_H128 HT_NB_CPU_CAD_L128 HT_NB_CPU_CAD_H138 HT_NB_CPU_CAD_L138 HT_NB_CPU_CAD_H148 HT_NB_CPU_CAD_L148 HT_NB_CPU_CAD_H158 HT_NB_CPU_CAD_L158
HT_NB_CPU_CLK_H08 HT_NB_CPU_CLK_L08 HT_NB_CPU_CLK_H18 HT_NB_CPU_CLK_L18
HT_NB_CPU_CTL_H08 HT_NB_CPU_CTL_L08 HT_NB_CPU_CTL_H18 HT_NB_CPU_CTL_L18
SC180P50V2JN-1GP
SC180P50V2JN-1GP
12
C545
C545
PU_CPU1A
PU_CPU1A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
1.5Amp
HT LINK
HT LINK
L0_CADOUT_H0 L0_CADOUT_L0 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H9 L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
AE2 AE3 AE4 AE5
AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3
Y1 W1 Y4 Y3
R2 R3 T5 R5
HT_CPU_NB_CAD_H0 8 HT_CPU_NB_CAD_L0 8 HT_CPU_NB_CAD_H1 8 HT_CPU_NB_CAD_L1 8 HT_CPU_NB_CAD_H2 8 HT_CPU_NB_CAD_L2 8 HT_CPU_NB_CAD_H3 8 HT_CPU_NB_CAD_L3 8 HT_CPU_NB_CAD_H4 8 HT_CPU_NB_CAD_L4 8 HT_CPU_NB_CAD_H5 8 HT_CPU_NB_CAD_L5 8 HT_CPU_NB_CAD_H6 8 HT_CPU_NB_CAD_L6 8 HT_CPU_NB_CAD_H7 8 HT_CPU_NB_CAD_L7 8 HT_CPU_NB_CAD_H8 8 HT_CPU_NB_CAD_L8 8 HT_CPU_NB_CAD_H9 8 HT_CPU_NB_CAD_L9 8 HT_CPU_NB_CAD_H10 8 HT_CPU_NB_CAD_L10 8 HT_CPU_NB_CAD_H11 8 HT_CPU_NB_CAD_L11 8 HT_CPU_NB_CAD_H12 8 HT_CPU_NB_CAD_L12 8 HT_CPU_NB_CAD_H13 8 HT_CPU_NB_CAD_L13 8 HT_CPU_NB_CAD_H14 8 HT_CPU_NB_CAD_L14 8 HT_CPU_NB_CAD_H15 8 HT_CPU_NB_CAD_L15 8
HT_CPU_NB_CLK_H0 8 HT_CPU_NB_CLK_L0 8 HT_CPU_NB_CLK_H1 8 HT_CPU_NB_CLK_L1 8
HT_CPU_NB_CTL_H0 8 HT_CPU_NB_CTL_L0 8 HT_CPU_NB_CTL_H1 8 HT_CPU_NB_CTL_L1 8
090109 SC
SKT-BGA638H176
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
of
456Friday, March 06, 2009
of
456Friday, March 06, 2009
of
456Friday, March 06, 2009
1
-2
-2
-2
5
090206 -1
Place near to CPU
4.7u x 4 0.22u X 2 180P x 6
D D
C C
B B
A A
DY
DY
12
C600
C600
C215
C215
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R376
R376
1D8V_S3
39D2R2F-L-GP
39D2R2F-L-GP
1 2 1 2
R379
R379 39D2R2F-L-GP
39D2R2F-L-GP
MEM_MA0_ODT016,18 MEM_MA0_ODT116,18
MEM_MA0_CS#016,18 MEM_MA0_CS#116,18
MEM_MA_CKE016,18 MEM_MA_CKE116,18
MEM_MA_CLK0_P16 MEM_MA_CLK0_N16 MEM_MA_CLK1_P16 MEM_MA_CLK1_N16
MEM_MA_ADD016,18 MEM_MA_ADD116,18 MEM_MA_ADD216,18 MEM_MA_ADD316,18 MEM_MA_ADD416,18 MEM_MA_ADD516,18 MEM_MA_ADD616,18 MEM_MA_ADD716,18 MEM_MA_ADD816,18 MEM_MA_ADD916,18 MEM_MA_ADD1016,18 MEM_MA_ADD1116,18 MEM_MA_ADD1216,18 MEM_MA_ADD1316,18 MEM_MA_ADD1416,18 MEM_MA_ADD1516,18
MEM_MA_BANK016,18 MEM_MA_BANK116,18 MEM_MA_BANK216,18
MEM_MA_RAS#16,18 MEM_MA_CAS#16,18 MEM_MA_WE#16,18
DY
DY
12
12
C203
C203
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
TP137TP137
12
C204
C204
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
MEMZP MEMZN
MEM_RSVD_M1
1
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
12
C212
C212
0D9V_S3
D10 C10 B10
AD10
AF10
AE10
H16 T19
V22 U21 V19
T20 U19 U20 V20
J22 J20
N19 N20 E16 F16 Y16
AA16
P19 P20
N21 M20 N22 M19 M22
L20
M24
L21
L19 K22 R21
L22 K20 V24 K24 K19
R20 R23
J21 R19
T22 T24
DY
C210
C210
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT2 VTT3 VTT4
MEMZP MEMZN
RSVD_M1 MA0_ODT0
MA0_ODT1 MA1_ODT0 MA1_ODT1
MA0_CS_L0 MA0_CS_L1 MA1_CS_L0 MA1_CS_L1
MA_CKE0 MA_CKE1
MA_CLK_H5 MA_CLK_L5 MA_CLK_H1 MA_CLK_L1 MA_CLK_H7 MA_CLK_L7 MA_CLK_H4 MA_CLK_L4
MA_ADD0 MA_ADD1 MA_ADD2 MA_ADD3 MA_ADD4 MA_ADD5 MA_ADD6 MA_ADD7 MA_ADD8 MA_ADD9 MA_ADD10 MA_ADD11 MA_ADD12 MA_ADD13 MA_ADD14 MA_ADD15
MA_BANK0 MA_BANK1 MA_BANK2
MA_RAS_L MA_CAS_L MA_WE_L
62.10055.111
62.10055.111
DY
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
12
C208
C208
PU_CPU1B
PU_CPU1B
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
2ND = 62.10055.251
2ND = 62.10055.251
12
12
C211
C211
C206
C206
SC180P50V2JN-1GP
SC180P50V2JN-1GP
VTT5 VTT6 VTT7 VTT8 VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5 MB_CLK_L5 MB_CLK_H1 MB_CLK_L1 MB_CLK_H7 MB_CLK_L7 MB_CLK_H4 MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
4
DY
DY
12
C213
C213
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
W10 AC10 AB10 AA10 A10
VTT_SENSE
Y10 W17
MEM_RSVD_M2
B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24
R24 U26 J26
U25 U24 U23
12
12
C209
C209
C207
C207
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1
TP132TPAD14-GPTP132TPAD14-GP
1
MEM_MB0_ODT0 17,18 MEM_MB0_ODT1 17,18
MEM_MB0_CS#0 17,18 MEM_MB0_CS#1 17,18
MEM_MB_CKE0 17,18 MEM_MB_CKE1 17,18
MEM_MB_CLK0_P 17 MEM_MB_CLK0_N 17 MEM_MB_CLK1_P 17 MEM_MB_CLK1_N 17
MEM_MB_ADD0 17,18 MEM_MB_ADD1 17,18 MEM_MB_ADD2 17,18 MEM_MB_ADD3 17,18 MEM_MB_ADD4 17,18 MEM_MB_ADD5 17,18 MEM_MB_ADD6 17,18 MEM_MB_ADD7 17,18 MEM_MB_ADD8 17,18 MEM_MB_ADD9 17,18 MEM_MB_ADD10 17,18 MEM_MB_ADD11 17,18 MEM_MB_ADD12 17,18 MEM_MB_ADD13 17,18 MEM_MB_ADD14 17,18 MEM_MB_ADD15 17,18
MEM_MB_BANK0 17,18 MEM_MB_BANK1 17,18 MEM_MB_BANK2 17,18
MEM_MB_RAS# 17,18 MEM_MB_CAS# 17,18 MEM_MB_WE# 17,18
12
SC180P50V2JN-1GP
SC180P50V2JN-1GP
TP138TP138
CLOSE TO CPU
C250
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VREF_DDR_CLAW
C250
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C246
C246
12
C240
C240
12
3
1D8V_S3
RN20
RN20
1 2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
2
PU_CPU1C
PU_CPU1C
MEM_MA_DATA016 MEM_MA_DATA116 MEM_MA_DATA216 MEM_MA_DATA316 MEM_MA_DATA416 MEM_MA_DATA516 MEM_MA_DATA616 MEM_MA_DATA716 MEM_MA_DATA816 MEM_MA_DATA916 MEM_MA_DATA1016 MEM_MA_DATA1116 MEM_MA_DATA1216 MEM_MA_DATA1316 MEM_MA_DATA1416 MEM_MA_DATA1516 MEM_MA_DATA1616 MEM_MA_DATA1716 MEM_MA_DATA1816 MEM_MA_DATA1916 MEM_MA_DATA2016 MEM_MA_DATA2116 MEM_MA_DATA2216 MEM_MA_DATA2316 MEM_MA_DATA2416 MEM_MA_DATA2516 MEM_MA_DATA2616 MEM_MA_DATA2716 MEM_MA_DATA2816 MEM_MA_DATA2916 MEM_MA_DATA3016 MEM_MA_DATA3116 MEM_MA_DATA3216 MEM_MA_DATA3316 MEM_MA_DATA3416 MEM_MA_DATA3516 MEM_MA_DATA3616 MEM_MA_DATA3716 MEM_MA_DATA3816 MEM_MA_DATA3916 MEM_MA_DATA4016
4
MEM_MA_DATA4116 MEM_MA_DATA4216 MEM_MA_DATA4316 MEM_MA_DATA4416 MEM_MA_DATA4516 MEM_MA_DATA4616 MEM_MA_DATA4716 MEM_MA_DATA4816 MEM_MA_DATA4916 MEM_MA_DATA5016 MEM_MA_DATA5116 MEM_MA_DATA5216 MEM_MA_DATA5316 MEM_MA_DATA5416 MEM_MA_DATA5516 MEM_MA_DATA5616 MEM_MA_DATA5716 MEM_MA_DATA5816 MEM_MA_DATA5916 MEM_MA_DATA6016 MEM_MA_DATA6116 MEM_MA_DATA6216 MEM_MA_DATA6316
MEM_MA_DM016 MEM_MA_DM116 MEM_MA_DM216 MEM_MA_DM316 MEM_MA_DM416 MEM_MA_DM516 MEM_MA_DM616 MEM_MA_DM716
MEM_MA_DQS0_P16 MEM_MA_DQS0_N16 MEM_MA_DQS1_P16 MEM_MA_DQS1_N16 MEM_MA_DQS2_P16 MEM_MA_DQS2_N16 MEM_MA_DQS3_P16 MEM_MA_DQS3_N16 MEM_MA_DQS4_P16 MEM_MA_DQS4_N16 MEM_MA_DQS5_P16 MEM_MA_DQS5_N16 MEM_MA_DQS6_P16 MEM_MA_DQS6_N16 MEM_MA_DQS7_P16 MEM_MA_DQS7_N16
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24
J19 E21 E22 H20 H22 Y24
AB24 AB22 AA21
W22 W21
Y22
AA22
Y20
AA20 AA18 AB18 AB21 AD21 AD19
Y18
AD17
W16 W14
Y14 Y17
AB17 AB15 AD15 AB13 AD13
Y12
W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24
AC24
Y19
AB16
Y13 G13
H13 G16 G15 C22 C21 G22
G21 AD23 AC23 AB19 AB20
Y15
W15 W12 W13
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
2ND = 62.10055.251
2ND = 62.10055.251
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8 MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
62.10055.111
62.10055.111
<Core Design>
<Core Design>
<Core Design>
MEM:DATA
MEM:DATA
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8
MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
090109 SC
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11
A12 B16 A22 E25 AB26 AE22 AC16 AD12
C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12
1
MEM_MB_DATA0 17 MEM_MB_DATA1 17 MEM_MB_DATA2 17 MEM_MB_DATA3 17 MEM_MB_DATA4 17 MEM_MB_DATA5 17 MEM_MB_DATA6 17 MEM_MB_DATA7 17 MEM_MB_DATA8 17 MEM_MB_DATA9 17 MEM_MB_DATA10 17 MEM_MB_DATA11 17 MEM_MB_DATA12 17 MEM_MB_DATA13 17 MEM_MB_DATA14 17 MEM_MB_DATA15 17 MEM_MB_DATA16 17 MEM_MB_DATA17 17 MEM_MB_DATA18 17 MEM_MB_DATA19 17 MEM_MB_DATA20 17 MEM_MB_DATA21 17 MEM_MB_DATA22 17 MEM_MB_DATA23 17 MEM_MB_DATA24 17 MEM_MB_DATA25 17 MEM_MB_DATA26 17 MEM_MB_DATA27 17 MEM_MB_DATA28 17 MEM_MB_DATA29 17 MEM_MB_DATA30 17 MEM_MB_DATA31 17 MEM_MB_DATA32 17 MEM_MB_DATA33 17 MEM_MB_DATA34 17 MEM_MB_DATA35 17 MEM_MB_DATA36 17 MEM_MB_DATA37 17 MEM_MB_DATA38 17 MEM_MB_DATA39 17 MEM_MB_DATA40 17 MEM_MB_DATA41 17 MEM_MB_DATA42 17 MEM_MB_DATA43 17 MEM_MB_DATA44 17 MEM_MB_DATA45 17 MEM_MB_DATA46 17 MEM_MB_DATA47 17 MEM_MB_DATA48 17 MEM_MB_DATA49 17 MEM_MB_DATA50 17 MEM_MB_DATA51 17 MEM_MB_DATA52 17 MEM_MB_DATA53 17 MEM_MB_DATA54 17 MEM_MB_DATA55 17 MEM_MB_DATA56 17 MEM_MB_DATA57 17 MEM_MB_DATA58 17 MEM_MB_DATA59 17 MEM_MB_DATA60 17 MEM_MB_DATA61 17 MEM_MB_DATA62 17 MEM_MB_DATA63 17
MEM_MB_DM0 17 MEM_MB_DM1 17 MEM_MB_DM2 17 MEM_MB_DM3 17 MEM_MB_DM4 17 MEM_MB_DM5 17 MEM_MB_DM6 17 MEM_MB_DM7 17
MEM_MB_DQS0_P 17 MEM_MB_DQS0_N 17 MEM_MB_DQS1_P 17 MEM_MB_DQS1_N 17 MEM_MB_DQS2_P 17 MEM_MB_DQS2_N 17 MEM_MB_DQS3_P 17 MEM_MB_DQS3_N 17 MEM_MB_DQS4_P 17 MEM_MB_DQS4_N 17 MEM_MB_DQS5_P 17 MEM_MB_DQS5_N 17 MEM_MB_DQS6_P 17 MEM_MB_DQS6_N 17 MEM_MB_DQS7_P 17 MEM_MB_DQS7_N 17
090109 SC
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
CPU_DDR_(2/4)
CPU_DDR_(2/4)
CPU_DDR_(2/4)
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
-2
-2
of
556Friday, March 06, 2009
of
556Friday, March 06, 2009
of
556Friday, March 06, 2009
1
-2
5
4
3
2
1
1D8V_S0
678
RN70
RN70 SRN300J-1-GP
SRN300J-1-GP
123
4 5
R105
R105
D D
CPU_LDT_RST#11,55
CPU_PWRGD11,55
CPU_LDT_STOP#11
ALLOW_LDTSTOP9,11
1 2
0R0402-PAD
0R0402-PAD
R103
R103
1 2
0R0402-PAD
0R0402-PAD
R124
R124
1 2
0R0402-PAD
0R0402-PAD
R106
R106
1 2
0R0402-PAD
0R0402-PAD
LDT_STP#_CPU 9
CPU_LDT_REQ#_CPU
SB with 0402 PAD
1D8V_S3
12
R373
R373
390R2J-1-GP
390R2J-1-GP
C C
IF 0 ohm IS NOT GOOD ENOUGH, TRY 68.00082.491
LDT_RST#_CPU
LDT_PWROK
CPU_CLK3 CPU_CLK#3
CPU_SIC
For HDT DBG
090119 -1090119 -1
R116
R116
1 2
0R0603-PAD
0R0603-PAD
Cloce To CPU
LDT_RST#_CPU
HDT_RST#
090119 -1
R311
R311
CPU_PWRGD_SVID_REG48
1 2
0R0402-PAD
0R0402-PAD
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LDT_PWROK
12
C584
C584
DY
DY
081223 SC
Near CPU PIN
LDT_PWROK
B B
THERMTRIP#
CPU exceeds to 125
12
R307
R307 2K2R2J-2-GP
2K2R2J-2-GP
C582
C582
1 2
1D8V_SUS_Q2
B
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Q23
Q23 MMBT3904-4-GP
MMBT3904-4-GP
C
E
84.T3904.C11
84.T3904.C11
2ND = 84.03904.L06
2ND = 84.03904.L06
KBC_THERMTRIP# 39,40
к
090113 -1
1D8V_S3 1D8V_S3
R109
R109
300R2J-4-GP
A A
5
300R2J-4-GP
DY
DY
1 2 12
R122
R122 499R2F-2-GP
499R2F-2-GP
4
12
R108
R108 499R2F-2-GP
499R2F-2-GP
CPU_TEST25_LCPU_TEST25_H
R107
R107
300R2J-4-GP
300R2J-4-GP
DY
DY
1 2
LYAOUT:ROUTE VDDA TRACE APPROX. 40 mils WIDE (USE 2X25 mil TRACES TO EXIT BALL FIELD) & 500 mils LONG.
SC4D7U6D3V3KX-GP
12
C184
C184
1 2
C596 SC3900P50V2KX-2GPC596 SC3900P50V2KX-2GP
1 2
C586 SC3900P50V2KX-2GPC586 SC3900P50V2KX-2GP
1 2
R104
R104 0R0402-PAD
0R0402-PAD
1D2V_S0
RN22
RN22
SRN300J-1-GP
SRN300J-1-GP
SC4D7U6D3V3KX-GP
12
C200
C200
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
R319 169R2F-GPR319 169R2F-GP
LDT_PWROK LDT_STP#_CPU CPU_LDT_REQ#_CPU
1 2
R113 44D2R2F-GPR113 44D2R2F-GP
1 2
R286 44D2R2F-GPR286 44D2R2F-GP
CPU_VDD0_RUN_FB_H48 CPU_VDD0_RUN_FB_L48
CPU_VDD1_RUN_FB_H48 CPU_VDD1_RUN_FB_L48
123
45
678
R119
R119
300R2J-4-GP
300R2J-4-GP
DY
DY
1 2
090206 -1
DY
DY
12
12
C185
C185
C201
C201
SC3300P50V2KX-1GP
SC3300P50V2KX-1GP
TP193TPAD14-GPTP193TPAD14-GP TP114TPAD14-GPTP114TPAD14-GP
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI
TP126TP126 TP123TP123
R287
R287
1 2
0R0402-PAD
0R0402-PAD
CPU_TEST22
R118
R118
300R2J-4-GP
300R2J-4-GP
DY
DY
1 2
CPU_TEST18CPU_TEST19
300R2J-4-GP
300R2J-4-GP
1 2
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R123
R123
DY
DY
DY
DY
12
C188
C188
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
CLKCPU_IN CLKCPU#_IN
CPU_SIC CPU_SID
1
CPU_ALERT#
1
CPU_HTREF0 CPU_HTREF1
CPU_TEST23 CPU_TEST18
CPU_TEST19 CPU_TEST25_H
CPU_TEST25_L CPU_TEST21
CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12
1
CPU_TEST27
1
CPU_TEST9
3
2D5V_VDDA_S02D5V_S0
PU_CPU1D
PU_CPU1D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
KEY1 KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TEST28_H
TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
090109 SC
SVC SVD
TDO
M11 W18
A6 A4
AF6 AC7 AA8
W7 W8
W9 Y9
H6 G6
E10 AE9
J7 H8
D7 E7 F7 C7
C3 K8
C4
C9 C8
H18 H19 AA7 D5 C5
1D8V_S3
4
RN65
RN65 SRN1KJ-7-GP
SRN1KJ-7-GP
1
2 3
CPU_SVC 48 CPU_SVD 48
THERMTRIP# PROCHOT# CPU_MEMHOT#
internal pull high 300 ohm
H_THERMDC 39
1 2
DY
DY
C189
C189 SC100P50V2JN-3GP
SC100P50V2JN-3GP
CPU_VDDIO_SUS_FB_H CPU_VDDIO_SUS_FB_L
CPU_DBREQ# CPU_TDO
CPU_TEST28_H CPU_TEST28_L
CPU_TEST17 CPU_TEST16 CPU_TEST15 CPU_TEST14
CPU_TEST10
CPU_TEST29H CPU_TEST29L
H_THERMDA 39
CPU_VDDNB_RUN_FB_H 48 CPU_VDDNB_RUN_FB_L 48
LAYOUT: Route FBCLKOUT_H/L differentially impedance 80
1 1
1 1
1 1
2
RN84
RN84
SRN300J-1-GP
SRN300J-1-GP
CPU_DBREQ#
1
TP130TP130
1
TP129TP129
TP116TP116 TP120TP120
TP117TP117 TP124TP124
1 1
TP131TP131 TP122TP122
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
A3
A3
A3
1D8V_S3
678
123
TP119TP119 TP115TP115
R374
R374
300R2J-4-GP
300R2J-4-GP
DY
DY
1 2
4 5
090119 -1
R309
R309
1 2
0R0402-PAD
0R0402-PAD
1D2V_S0
DY
DY
R101
R101
300R2J-4-GP
300R2J-4-GP
1 2
HDT Connectors
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
1D8V_S3
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
JM70-PU
JM70-PU
JM70-PU
The Processor has reached a preset maximum operating temperature. 100 I=Active HTC O=FAN
PROCHOT#_SB 11
081223 SC
HDT1
HDT1
1
2
DY
DY
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SMC-CONN26A-FP
HDT_RST#
SMC-CONN26A-FP
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
26
of
656Friday, March 06, 2009
of
656Friday, March 06, 2009
of
656Friday, March 06, 2009
к
-2
-2
-2
5
4
3
2
1
PU_CPU1F
PU_CPU1F
AA4
D D
C C
B B
A A
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
62.10055.111
62.10055.111
2ND = 62.10055.251
2ND = 62.10055.251
VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
5
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
090109 SC
VCC_CORE_S0_0
090206 -1
Bottom Side Decoupling Bottom Side Decoupling
DY
DY
DY
1D8V_S3
C168
C168
C198
C198
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VDDNB
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C232
C232
SC10U6D3V5KX-1GP
3A for VDDNB
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Bottom Side Decoupling
C252
C252
C262
C262
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
DY
C241
C241
C217
C217
12
12
C629
C629
C248
C248
12
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
C181
C181
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C233
C233
C261
C261
12
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
DY
DY
C178
C178
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
36A for VDD0&VDD1
PU_CPU1E
PU_CPU1E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
C229
C229
12
SC180P50V2JN-1GP
SC180P50V2JN-1GP
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SKT-CPU638P-GP-U2
SKT-CPU638P-GP-U2
2ND = 62.10055.251
2ND = 62.10055.251
3
62.10055.111
62.10055.111
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
090109 SC
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
C244
C244
12
SC180P50V2JN-1GP
SC180P50V2JN-1GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
Date: Sheet
2
090206 -1
C183
C183
C182
C222
C222
12
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C182
12
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
Place near to CPU
C239
C239
C254
C254
12
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD22U6D3V2KX-1GP
CPU_Power_(4/4)
CPU_Power_(4/4)
CPU_Power_(4/4)
VCC_CORE_S0_1
DY
DY
C199
C199
C166
C166
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
090206 -1
DY
DY
C251
C251
C253
C253
C242
C242
12
12
12
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
C218
C218
C167
C167
12
12
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
3A for VDDIO
DY
C245
C245
12
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
DY
C255
C255
C256
C256
12
12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
756Monday, March 02, 2009
756Monday, March 02, 2009
756Monday, March 02, 2009
1
1D8V_S3
C263
C263
C266
C266
12
12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
-2
-2
-2
of
of
of
5
HT_CPU_NB_CAD_H04 HT_CPU_NB_CAD_L04 HT_CPU_NB_CAD_H14 HT_CPU_NB_CAD_L14 HT_CPU_NB_CAD_H24 HT_CPU_NB_CAD_L24 HT_CPU_NB_CAD_H34 HT_CPU_NB_CAD_L34 HT_CPU_NB_CAD_H44 HT_CPU_NB_CAD_L44 HT_CPU_NB_CAD_H54
D D
C C
PEG_RXN[15..0]19 PEG_RXP[15..0]19
B B
MINICARD
MINICARD TV MINICARD TV
A A
A-LINK
5
HT_CPU_NB_CAD_L54 HT_CPU_NB_CAD_H64 HT_CPU_NB_CAD_L64 HT_CPU_NB_CAD_H74 HT_CPU_NB_CAD_L74
HT_CPU_NB_CAD_H84 HT_CPU_NB_CAD_L84 HT_CPU_NB_CAD_H94 HT_CPU_NB_CAD_L94 HT_CPU_NB_CAD_H104 HT_CPU_NB_CAD_L104 HT_CPU_NB_CAD_H114 HT_CPU_NB_CAD_L114 HT_CPU_NB_CAD_H124 HT_CPU_NB_CAD_L124 HT_CPU_NB_CAD_H134 HT_CPU_NB_CAD_L134 HT_CPU_NB_CAD_H144 HT_CPU_NB_CAD_L144 HT_CPU_NB_CAD_H154 HT_CPU_NB_CAD_L154
HT_CPU_NB_CLK_H04 HT_CPU_NB_CLK_L04 HT_CPU_NB_CLK_H14 HT_CPU_NB_CLK_L14
HT_CPU_NB_CTL_H04 HT_CPU_NB_CTL_L04 HT_CPU_NB_CTL_H14 HT_CPU_NB_CTL_L14
1 2
Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24
LAN
ALINK_NBRX_SBTX_P011 ALINK_NBRX_SBTX_N011 ALINK_NBRX_SBTX_P111 ALINK_NBRX_SBTX_N111 ALINK_NBRX_SBTX_P211 ALINK_NBRX_SBTX_N211 ALINK_NBRX_SBTX_P311 ALINK_NBRX_SBTX_N311
R91
R91 301R2F-GP
301R2F-GP
PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15
PCIE_RXP129 PCIE_RXN129 PCIE_RXP237 PCIE_RXN237 PCIE_RXP437 PCIE_RXN437 PCIE_RXP538 PCIE_RXN538
TP53TPAD14-GPTP53TPAD14-GP TP52TPAD14-GPTP52TPAD14-GP
4
PU_NB1A
PU_NB1A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCALP HT_TXCALP HT_RXCALN
GPP_RX5P GPP_RX5N
HT_RXCTL1N
C23
HT_RXCALP
A24
HT_RXCALN
RS780M-GP-U2
RS780M-GP-U2 PU_NB1B
PU_NB1B
D4
GFX_RX0P
C4
GFX_RX0N
A3
GFX_RX1P
B3
GFX_RX1N
C2
GFX_RX2P
C1
GFX_RX2N
E5
GFX_RX3P
F5
GFX_RX3N
G5
GFX_RX4P
G6
GFX_RX4N
H5
GFX_RX5P
H6
GFX_RX5N
J6
GFX_RX6P
J5
GFX_RX6N
J7
GFX_RX7P
J8
GFX_RX7N
L5
GFX_RX8P
L6
GFX_RX8N
M8
GFX_RX9P
L8
GFX_RX9N
P7
GFX_RX10P
M7
GFX_RX10N
P5
GFX_RX11P
M5
GFX_RX11N
R8
GFX_RX12P
P8
GFX_RX12N
R6
GFX_RX13P
R5
GFX_RX13N
P4
GFX_RX14P
P3
GFX_RX14N
T4
GFX_RX15P
T3
GFX_RX15N
AE3
GPP_RX0P
AD4
GPP_RX0N
AE2
GPP_RX1P
AD3
GPP_RX1N
AD1
GPP_RX2P
AD2
GPP_RX2N
V5
GPP_RX3P
W6
GPP_RX3N
U5
GPP_RX4P
U6
GPP_RX4N
U8
GPP_RX5P
U7
GPP_RX5N
AA8
SB_RX0P
Y8
SB_RX0N
AA7
SB_RX1P
Y7
SB_RX1N
AA5
SB_RX2P
AA6
SB_RX2N
W5
SB_RX3P
Y5
SB_RX3N
RS780M-GP-U2
RS780M-GP-U2
4
PART 1 OF 6
PART 1 OF 6
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N
HT_TXCALP
HT_TXCALN
GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
PCE_CALRP PCE_CALRN
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P GFX_TX9N
GPP_TX0P GPP_TX0N GPP_TX1P GPP_TX1N GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
H24 H25 L21 L20
M24 M25 P19 R18
B24 B25
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
3
HT_TXCALN
PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3 PEG_TXP4 PEG_TXN4 PEG_TXP5 PEG_TXN5 PEG_TXP6 PEG_TXN6 PEG_TXP7 PEG_TXN7 PEG_TXP8 PEG_TXN8 PEG_TXP9 PEG_TXN9 PEG_TXP10 PEG_TXN10 PEG_TXP11 PEG_TXN11 PEG_TXP12 PEG_TXN12 PEG_TXP13 PEG_TXN13 PEG_TXP14 PEG_TXN14 PEG_TXP15 PEG_TXN15
TXP1 TXN1 TXP2 TXN2 TXP4 TXN4 TXP5 TXN5
090119 -1
GPP_TX5P GPP_TX5N
ALINK_NBTX_SBRX_P0 ALINK_NBTX_SBRX_N0 ALINK_NBTX_SBRX_P1 ALINK_NBTX_SBRX_N1 ALINK_NBTX_SBRX_P2 ALINK_NBTX_SBRX_N2 ALINK_NBTX_SBRX_P3 ALINK_NBTX_SBRX_N3
PCE_PCAL PCE_NCAL
Place < 100mils from pin AC8 and AB8
3
HT_NB_CPU_CAD_H0 4 HT_NB_CPU_CAD_L0 4 HT_NB_CPU_CAD_H1 4 HT_NB_CPU_CAD_L1 4 HT_NB_CPU_CAD_H2 4 HT_NB_CPU_CAD_L2 4 HT_NB_CPU_CAD_H3 4 HT_NB_CPU_CAD_L3 4 HT_NB_CPU_CAD_H4 4 HT_NB_CPU_CAD_L4 4 HT_NB_CPU_CAD_H5 4 HT_NB_CPU_CAD_L5 4 HT_NB_CPU_CAD_H6 4 HT_NB_CPU_CAD_L6 4 HT_NB_CPU_CAD_H7 4 HT_NB_CPU_CAD_L7 4
HT_NB_CPU_CAD_H8 4 HT_NB_CPU_CAD_L8 4 HT_NB_CPU_CAD_H9 4 HT_NB_CPU_CAD_L9 4 HT_NB_CPU_CAD_H10 4 HT_NB_CPU_CAD_L10 4 HT_NB_CPU_CAD_H11 4 HT_NB_CPU_CAD_L11 4 HT_NB_CPU_CAD_H12 4 HT_NB_CPU_CAD_L12 4 HT_NB_CPU_CAD_H13 4 HT_NB_CPU_CAD_L13 4 HT_NB_CPU_CAD_H14 4 HT_NB_CPU_CAD_L14 4 HT_NB_CPU_CAD_H15 4 HT_NB_CPU_CAD_L15 4
HT_NB_CPU_CLK_H0 4 HT_NB_CPU_CLK_L0 4 HT_NB_CPU_CLK_H1 4 HT_NB_CPU_CLK_L1 4
HT_NB_CPU_CTL_H0 4 HT_NB_CPU_CTL_L0 4 HT_NB_CPU_CTL_H1 4 HT_NB_CPU_CTL_L1 4
1 2
C413 SCD1U10V2KX-4GPC413 SCD1U10V2KX-4GP
1 2
C412 SCD1U10V2KX-4GPC412 SCD1U10V2KX-4GP
1 2
C415 SCD1U10V2KX-4GPC415 SCD1U10V2KX-4GP
1 2
C414 SCD1U10V2KX-4GPC414 SCD1U10V2KX-4GP
1 2
C417 SCD1U10V2KX-4GP
C417 SCD1U10V2KX-4GP
1 2
TV
TV
C416 SCD1U10V2KX-4GP
C416 SCD1U10V2KX-4GP
1 2
TV
TV
C418 SCD1U10V2KX-4GP
C418 SCD1U10V2KX-4GP
1 2
NEW
NEW
C419 SCD1U10V2KX-4GP
C419 SCD1U10V2KX-4GP
1 2
NEW
NEW
C471 SCD1U10V2KX-4GPC471 SCD1U10V2KX-4GP C469 SCD1U10V2KX-4GPC469 SCD1U10V2KX-4GP C461 SCD1U10V2KX-4GPC461 SCD1U10V2KX-4GP C458 SCD1U10V2KX-4GPC458 SCD1U10V2KX-4GP C466 SCD1U10V2KX-4GPC466 SCD1U10V2KX-4GP C463 SCD1U10V2KX-4GPC463 SCD1U10V2KX-4GP C444 SCD1U10V2KX-4GPC444 SCD1U10V2KX-4GP C456 SCD1U10V2KX-4GPC456 SCD1U10V2KX-4GP
1 2
R217 1K27R2F-L-GPR217 1K27R2F-L-GP
1 2
R220 2KR2F-3-GPR220 2KR2F-3-GP
R251
R251 301R2F-GP
301R2F-GP
PCIE As SW request 11/17 Port 1 => Onboard LAN Port 2 => Mini Card WLAN Port 3 => Mini Card#2 Port 4 => New Card Port 5,6 => NC
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
TP159 TPAD14-GPTP159 TPAD14-GP TP160 TPAD14-GPTP160 TPAD14-GP
1D1V_S0
2
PEG_TXP0 PEG_TXN0 PEG_TXP1 PEG_TXN1 PEG_TXP2 PEG_TXN2 PEG_TXP3 PEG_TXN3
PCIE_TXP1 29
PCIE_TXN1 29
PCIE_TXP2 37
PCIE_TXN2 37
PCIE_TXP4 37
PCIE_TXN4 37
PCIE_TXP5 38
PCIE_TXN5 38
ALINK_NBTX_C_SBRX_P0 11 ALINK_NBTX_C_SBRX_N0 11 ALINK_NBTX_C_SBRX_P1 11 ALINK_NBTX_C_SBRX_N1 11 ALINK_NBTX_C_SBRX_P2 11 ALINK_NBTX_C_SBRX_N2 11 ALINK_NBTX_C_SBRX_P3 11 ALINK_NBTX_C_SBRX_N3 11
2
1
C97 SCD1U10V2KX-4GP
C97 SCD1U10V2KX-4GP
1 2
UMA
UMA
C98 SCD1U10V2KX-4GP
C98 SCD1U10V2KX-4GP
1 2
UMA
UMA
C99 SCD1U10V2KX-4GP
C99 SCD1U10V2KX-4GP
1 2
UMA
UMA
C100 SCD1U10V2KX-4GP
C100 SCD1U10V2KX-4GP
1 2
UMA
UMA
C101 SCD1U10V2KX-4GP
C101 SCD1U10V2KX-4GP
1 2
UMA
UMA
C102 SCD1U10V2KX-4GP
C102 SCD1U10V2KX-4GP
1 2
UMA
UMA
C103 SCD1U10V2KX-4GP
C103 SCD1U10V2KX-4GP
1 2
UMA
UMA
C104 SCD1U10V2KX-4GP
C104 SCD1U10V2KX-4GP
1 2
UMA
UMA
PEG_TXP[15..0] 19 PEG_TXN[15..0] 19
TMDS_UMA_TX2+ 23
TMDS_UMA_TX2- 23
TMDS_UMA_TX1+ 23
TMDS_UMA_TX1- 23
TMDS_UMA_TX0+ 23
TMDS_UMA_TX0- 23
TMDS_UMA_TXC+ 23
TMDS_UMA_TXC- 23
RS780M Display Port Support(muxed on GFX)
GFX_TX0,TX1,TX2,TX3,AUX0,HPD0
DP0
GFX_TX4,TX5,TX6,TX7,AUX1,HPD1DP1
LAN MINICARD
NEW CARDNEW CARD
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-RS780M_HT LINK&PCIe(1/3)
ATi-RS780M_HT LINK&PCIe(1/3)
ATi-RS780M_HT LINK&PCIe(1/3)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
of
856Friday, March 06, 2009
of
856Friday, March 06, 2009
of
856Friday, March 06, 2009
1
-2
-2
-2
5
C110
C110
12
TC18
TC18
SYSREST#
1D8V_S0
12
1D1V_S0
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
SC1U10V2KX-1GP
SC1U10V2KX-1GP
L5
L5
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
D D
C C
PLT_RST1#11,29,41
LDT_STP#_CPU6
ALLOW_LDTSTOP6,11
1 2
R68 0R0402-PADR68 0R0402-PAD
SC330P50V2KX-3GP
SC330P50V2KX-3GP
1 2
R70 0R0402-PADR70 0R0402-PAD
R218
R218
1 2
0R0402-PAD
0R0402-PAD
2ND = 77.21071.07L
2ND = 77.21071.07L
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
77.C1071.081
77.C1071.081
ENABLE External CLK GEN
1D8V_S0
L8
L8
B B
A A
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
1D8V_S0
L1
L1
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
VDDA18HTPLL
C152
C152
SC1U10V2KX-1GP
SC1U10V2KX-1GP
VDDA18PCIEPLL
C109
C109
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
12
C144
C144 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DP_AUX0N11
12
12
C111
C111 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
STRP_DATA 01
VCC_NB
5
GPIO MODE
*
1.0V 1.1V
4
3D3V_S0
L4
L4
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
R223
R223
1 2
65mA
12
C470
C470
12
C132
C132
090119 -1
1D1V_S0
1D8V_S0
1D8V_S0
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
220ohm 200mA
2ND = 68.00119.111
2ND = 68.00119.111
L2
L2
090119 -1
R430
R430
1 2
0R0402-PAD
0R0402-PAD
4
110mA
3D3V_S0_AVDD
12
C133
C133
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C126
C126 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
20mA
R86
R86
1 2
0R0402-PAD
0R0402-PAD
12
C478
C478
SC1U10V2KX-1GP
SC1U10V2KX-1GP
GMCH_RED20,22
GMCH_GREEN20,22
GMCH_BLUE20,22
Close to NB ball < 1 inch trace
GMCH_HSYNC22 GMCH_VSYNC22
GMCH_DDCCLK22
GMCH_DDCDATA22
1D1V_S0_PLLVDD
1D1V_S0_PLLVDD
12
C467
C467 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C136
C136 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
RN12
RN12
2 3 1
SRN1KJ-7-GP
SRN1KJ-7-GP
3D3V_S0
12
R71
R71 2K2R2J-2-GP
2K2R2J-2-GP
STRP_DATA
12
R69
R69 2K2R2J-2-GP
2K2R2J-2-GP
DY
DY
4
TPAD14-GP
TPAD14-GP
NB_PWRGD12,45
TP163
TP163
12
C146
C146 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S0_AVDDQ
12
C477
C477 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
20mA
120mA20mA
CLK_NBHT_CLK3 CLK_NBHT_CLK#3
CLK_NB_14M3
TP158TPAD14-GPTP158TPAD14-GP TP161TPAD14-GPTP161TPAD14-GP
CLK_DDC_EDID21
DAT_DDC_EDID21
1 2
R201
R201 150R2F-1-GP
150R2F-1-GP
1D8V_S0_AVDDDI
R92
R92 715R2F-GP
715R2F-GP
1D8V_S0_PLVDD18
VDDA18PCIEPLL
SYSREST#
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
CLK_NB_GFX3 CLK_NB_GFX#3
CLK_NB_GPPSB3 CLK_NB_GPPSB#3
NB_HDMI_CLK23
NB_HDMI_DATA23
R81 140R2F-GPR81 140R2F-GP
1 2
R83 150R2F-1-GPR83 150R2F-1-GP
1 2
R85 150R2F-1-GPR85 150R2F-1-GP
1 2
DAC_RSET
VDDA18HTPLL
NB_REFCLK_N
CLK_NBGPP_CLK CLK_NBGPP_CLK#
AUX0N AUX0P
STRP_DATA
RS780_AUX_CAL
3
PU_NB1C
PU_NB1C
F12
AVDD1
E12
AVDD2
F14
AVDDDI
G15
AVSSDI
H15
AVDDQ
H14
AVSSQ
E17
C_Pr
F17
Y
F15
COMP_Pb
G18
RED
G17
REDb
E18
GREEN
F18
GREENb
E19
BLUE
F19
BLUEb
A11
DAC_HSYNC
B11
DAC_VSYNC
F8
DAC_SCL
E8
DAC_SDA
G14
DAC_RSET
A12
PLLVDD
D14
PLLVDD18
B12
PLLVSS
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN
F11
REFCLK_N
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP
V3
GPPSB_REFCLKN
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_CLK0/AUX0P
A8
DDC_DATA0/AUX0N
B7
DDC_CLK1/AUX1P
A7
DDC_DATA1/AUX1N
B10
STRP_DATA
G11
RESERVED
C8
AUX_CAL
RS780M-GP-U2
RS780M-GP-U2
3
R204
R204
3KR2J-2-GP
3KR2J-2-GP
3D3V_S0
12
12
GMCH_HSYNC GMCH_VSYNC
DDC_DATA0/AUX0N DDC_CLK0/AUX0P
R209
R209 3KR2J-2-GP
3KR2J-2-GP
PART 3 OF 6
PART 3 OF 6
CRT/TVOUT
CRT/TVOUT
LVTM
LVTM
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
2
1
STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC#) 1 :Disable 0 : Enable
*
RS780: Enables Side port memory ( RS780 use HSYNC#)
1 :Disable 0 : Enable
*
SUS_STAT#
Selects Loading of STRAPS From EEPROM 1 : Bypass the loading of EEPROM straps and use Hardware Default Values
*
0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N TXOUT_U0P
TXOUT_U0N TXOUT_U1P TXOUT_U1N TXOUT_U2P TXOUT_U2N TXOUT_U3P TXOUT_U3N
TXCLK_LP TXCLK_LN TXCLK_UP
TXCLK_UN
VDDLTP18 VSSLTP18
VDDLT18_1 VDDLT18_2 VDDLT33_1 VDDLT33_2
VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
TMDS_HPD
HPD
SUS_STAT#
THERMALDIODE_P THERMALDIODE_N
TESTMODE
2
A22 B22 A21 B21 B20 A20 A19 B19
B18 A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
A13 B13
A15 B15 A14 B14
C14 D15 C16 C18 C20 E20 C22
E9 F7 G12
081225 SC
D9 D10
D12 AE8
AD8 D13
GMCH_TXAOUT0+ 20
GMCH_TXAOUT0- 20
GMCH_TXAOUT1+ 20
GMCH_TXAOUT1- 20
GMCH_TXAOUT2+ 20
GMCH_TXAOUT2- 20
GMCH_TXBOUT0+ 20
GMCH_TXBOUT0- 20
GMCH_TXBOUT1+ 20
GMCH_TXBOUT1- 20
GMCH_TXBOUT2+ 20
GMCH_TXBOUT2- 20
GMCH_TXACLK+ 20
GMCH_TXACLK- 20
GMCH_TXBCLK+ 20
GMCH_TXBCLK- 20
1D8V_S0_VDDLP18
C481
C481
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D8V_S0_VDDLT18
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
NB_LVDS_BLON
2 3 1
RN11 SRN4K7J-8-GP
RN11 SRN4K7J-8-GP
NB_DVI_HPD SUS_STAT# G792_DXP3_NB
G792_DXN3_NB
TESTMODE_NB
R221
R221
1K8R2F-GP
1K8R2F-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1D8V_S0
L17
L17
2ND = 68.00119.111
2ND = 68.00119.111
L19
L19
68.00216.1612ND = 68.00206.121
68.00216.1612ND = 68.00206.121
C494
C494
12
15mA
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
12
C479
C479 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
300mA
1 2
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
12
12
C491
C491 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
090122 -1
1 2
R465 0R2J-2-GPR465 0R2J-2-GP
1 2
DY
DY
R454 0R2J-2-GP
R454 0R2J-2-GP
4
DY
DY
1 2
DY
DY
R453 100KR2J-1-GP
R453 100KR2J-1-GP
NB_HDMI_HPD 23
TP55 TPAD14-GPTP55 TPAD14-GP
12
3D3V_S0
R74
R74
10KR2J-3-GP
10KR2J-3-GP
4
DY
DY
C473
12
SC470P50V3JN-2GP
SC470P50V3JN-2GP
A3
A3
A3
C473
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ATi-RS780M_LVDS&CRT_(2/4)
ATi-RS780M_LVDS&CRT_(2/4)
ATi-RS780M_LVDS&CRT_(2/4)
JM70-PU
JM70-PU
JM70-PU
GMCH_LCDVDD_ON 21
RN56
RN56
1 23
DY
DY
SRN0J-10-GP-U
SRN0J-10-GP-U
1
GMCH_BL_ON 19
VARY_BL 19,21
LVDS_ENA_BL 19
G792_DXP3 39 G792_DXN3 39
of
956Friday, March 06, 2009
of
956Friday, March 06, 2009
of
956Friday, March 06, 2009
-2
-2
-2
5
1D1V_S0
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
220 ohm @ 100MHz,2A
2ND = 68.00206.121
D D
2ND = 68.00206.121
1D1V_S0
220 ohm @ 100MHz,2A
1D2V_S0
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
220 ohm @ 100MHz,2A
C C
220 ohm @ 100MHz,2A
68.00216.161
68.00216.161
2ND = 68.00206.121
2ND = 68.00206.121
1D8V_S0
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
2ND = 68.00206.121
2ND = 68.00206.121
L7
L7
1 2
68.00216.161
68.00216.161
L6
L6
1 2
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
68.00216.161
68.00216.161
2ND = 68.00206.121
2ND = 68.00206.121
L9
L9
1 2
1 2
68.00216.161
68.00216.161
1D8V_S0
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C121
C121
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
L3
L3
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C155
C155
DY
DY
12
C122
C122
0.6A per ANT Rev1.1, Page3
+1.1V_RUN_VDDHT
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C148
C148
0.45A per ANT Rev1.1, Page3
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C162
C162
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
80mil Width
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C123
C123
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C138
C138
12
700mA
+1.1V_RUN_VDDHTRX
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C151
C151
12
400mA
+1.2V_RUN_VDDHTTX
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C154
C154
C156
C156
12
12
DY
DY
700mA
+1.8V_RUN_VDDA18PCIE
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C124
C124
12
C149
C149
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
25mA
+1.8V_RUN_VDD18_MEM
R72
R72
1 2
0R0402-PAD
0R0402-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C139
C139
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C157
C157
12
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C140
C140
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C117
C117
C120
C120
12
12
C137
C137
12
C147
C147
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C125
C125
12
DY
DY
090119 -1
M16 R16
H18 G19
D22
AE25 AD24 AC23 AB22 AA21
W19
U17 R17 M17
M10
R10 AA9
AB9 AD9 AE9 U10
AE11 AD11
J17 K16 L16
P16 T16
F20 E21
B23 A23
Y20 V18 T17 P17
J10 P10 K10
L10
W9
H9
T10
Y9
F9
G9
4
PU_NB1E
PU_NB1E
VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2
RS780M-GP-U2
RS780M-GP-U2
PART 5/6
PART 5/6
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
POWER
POWER
VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD33_1 VDD33_2
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
3
300mil Width
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
12
C119
C119
12
C128
C128
SC1U10V2KX-1GP
12
C135
C135
7A per ANT Rev1.1, Page3 Per check list (Rev 0.02) RS780M: 1V ~ 1.1V, check PWR team
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C127
C127
C131
C131
12
12
090206 -1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C129
C129
C130
C130
12
12
DY
DY
090119 -1
70mA
VDD_MEM
R76
R76
1 2
0R0402-PAD
0R0402-PAD
60mA
+3.3V_RUN_VDD33
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C116
C116
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
DY
DY
C113
C113
R73
R73
1 2
0R0402-PAD
0R0402-PAD
2.5A
1D1V_S0
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C134
C134
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C115
C115
C114
C114
12
12
3D3V_S0
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C112
C112
10A
+NB_VCORE
1D1V_S0
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C118
C118
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C142
C142
12
C143
C143
2
PU_NB1F
PU_NB1F
A25
VSSAHT1
G22 G24 G25
M20
W22 W24 W25
AD25
M14
W11
W15 AC12 AA14
AB11 AB15 AB17 AB19 AE20 AB21
D23 E22
H19
N22 P20 R19 R22 R24 R25 H20 U22 V19
Y21
N13 P12 P15 R11 R14 T12 U14 U11 U15 V12
Y18
K11
J22 L17 L22 L24 L25
L12
RS780M-GP-U2
RS780M-GP-U2
VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27
VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34
PART 6/6
PART 6/6
1
VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8
VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31
GROUND
GROUND
VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9
VSS10
A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2
AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15
090206 -1
B B
A A
5
AB12 AE16
AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14
AD16 AE17 AD17
W12
AD18 AB13 AB18
W14
AE12 AD12
V11
Y14
Y12
V14 V15
PU_NB1D
PU_NB1D
MEM_A0 MEM_A1 MEM_A2 MEM_A3 MEM_A4 MEM_A5 MEM_A6 MEM_A7 MEM_A8 MEM_A9 MEM_A10 MEM_A11 MEM_A12 MEM_A13
MEM_BA0 MEM_BA1 MEM_BA2
MEM_RAS# MEM_CAS# MEM_WE# MEM_CS# MEM_CKE MEM_ODT
MEM_CKP MEM_CKN
MEM_COMPP MEM_COMPN
RS780M-GP-U2
RS780M-GP-U2
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE MEM_DQ3/DVO_D0
MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11
MEM_DQS0P/DVO_IDCKP MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N
MEM_DM0
MEM_DM1/DVO_D8
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
4
IOPLLVDD18
IOPLLVDD
IOPLLVSS
MEM_VREF
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
MEM_COMP_P and MEM_COMP_N trace width >=10mils and 10mils spacing from other Signals in X,Y,Z directions
R75
R75
1D8V_S0
15mA
+1.8V_IOPLLVDD18
1 2
0R0402-PAD
0R0402-PAD
090119 -1
26mA
+1.1V_IOPLLVDD
1 2
0R0402-PAD
0R0402-PAD
R78
R78
1D1V_S0
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-RS780M_Side Port&PWR&GND(3/3)
ATi-RS780M_Side Port&PWR&GND(3/3)
ATi-RS780M_Side Port&PWR&GND(3/3)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
-2
-2
of
10 56Monday, March 02, 2009
of
10 56Monday, March 02, 2009
of
10 56Monday, March 02, 2009
1
-2
5
33R2J-2-GP
33R2J-2-GP R288
R288
PLT_RST1#9,29,41
ALINK_NBRX_SBTX_P08 ALINK_NBRX_SBTX_N08 ALINK_NBRX_SBTX_P18 ALINK_NBRX_SBTX_N18 ALINK_NBRX_SBTX_P28 ALINK_NBRX_SBTX_N28 ALINK_NBRX_SBTX_P38
D D
1D2V_S0 +1.2V_RUN_PCIE_PVDD PCIE_VDDR
220 ohm 2A
2ND = 68.00119.111
2ND = 68.00119.111
C C
L24
L24
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
68.00217.521
68.00217.521
PLT_RST1#9,29,41
ALINK_NBRX_SBTX_N38
20mil Width
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C551
C551
3D3V_S5
9
10
2ND = 73.07408.L15
2ND = 73.07408.L15
C550
C550
1 2
147
U34C
U34C
8
TSLVC08APW-1-GP
TSLVC08APW-1-GP
73.07408.L16
73.07408.L16
081225 SC
B B
3rd = ??.?????.???
A A
1 2
C165 SC22P50V2JN-4GPC165 SC22P50V2JN-4GP
X2
X2
X-32D768KHZ-40GPU
X-32D768KHZ-40GPU
82.30001.841
82.30001.841
2nd = 82.30001.A41
2nd = 82.30001.A41
1 2
C163 SC22P50V2JN-4GPC163 SC22P50V2JN-4GP
4
12
R94
R94 10MR2J-L-GP
10MR2J-L-GP
1
2 3
32K_X2
1 2
1 2
C177 SCD1U10V2KX-4GPC177 SCD1U10V2KX-4GP
1 2
C180 SCD1U10V2KX-4GPC180 SCD1U10V2KX-4GP
1 2
C175 SCD1U10V2KX-4GPC175 SCD1U10V2KX-4GP
1 2
C173
C173 C171
C171 C172 SCD1U10V2KX-4GPC172 SCD1U10V2KX-4GP C169 SCD1U10V2KX-4GPC169 SCD1U10V2KX-4GP C170 SCD1U10V2KX-4GPC170 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2 1 2 1 2
ALINK_NBTX_C_SBRX_P08 ALINK_NBTX_C_SBRX_N08 ALINK_NBTX_C_SBRX_P18 ALINK_NBTX_C_SBRX_N18 ALINK_NBTX_C_SBRX_P28 ALINK_NBTX_C_SBRX_N28 ALINK_NBTX_C_SBRX_P38 ALINK_NBTX_C_SBRX_N38
R292 562R2F-GPR292 562R2F-GP
1 2
R289 2K05R2F-GPR289 2K05R2F-GP
1 2
Place R <100mils form pins T25,T24
PLT_RST1#_B 37,38,40
090122 -1
CLK_SB_25M3
4
PU_SB1A
PU_SB1A
NB_RST#
ALINK_NBRX_C_SBTX_P0 ALINK_NBRX_C_SBTX_N0 ALINK_NBRX_C_SBTX_P1 ALINK_NBRX_C_SBTX_N1 ALINK_NBRX_C_SBTX_P2 ALINK_NBRX_C_SBTX_N2 ALINK_NBRX_C_SBTX_P3 ALINK_NBRX_C_SBTX_N3
PCIE_CALRP
PCIE_CALRN
CLK_PCIE_SB3 CLK_PCIE_SB#3
Fos SB710 11/14
DY
DY
R276
R276
1 2
CLK_SB_25M_1
0R2J-2-GP
0R2J-2-GP
090206 -1
ALLOW_LDTSTOP6,9 RTC_CLK 15,39 PROCHOT#_SB6
CPU_PWRGD6,55
CPU_LDT_STOP#6 CPU_LDT_RST#6,55
N2
A_RST#
V23
PCIE_TX0P
V22
PCIE_TX0N
V24
PCIE_TX1P
V25
PCIE_TX1N
U25
PCIE_TX2P
U24
PCIE_TX2N
T23
PCIE_TX3P
T22
PCIE_TX3N
U22
PCIE_RX0P
U21
PCIE_RX0N
U19
PCIE_RX1P
V19
PCIE_RX1N
R20
PCIE_RX2P
R21
PCIE_RX2N
R18
PCIE_RX3P
R17
PCIE_RX3N
T25
PCIE_CALRP
T24
PCIE_CALRN
P24
PCIE_PVDD
P25
PCIE_PVSS
N25
PCIE_RCLKP/NB_LNK_CLKP
N24
PCIE_RCLKN/NB_LNK_CLKN
K23
NB_DISP_CLKP
K22
NB_DISP_CLKN
M24
NB_HT_CLKP
M25
NB_HT_CLKN
P17
CPU_HT_CLKP
M18
CPU_HT_CLKN
M23
SLT_GFX_CLKP
M22
SLT_GFX_CLKN
J19
GPP_CLK0P
J18
GPP_CLK0N
L20
GPP_CLK1P
L19
GPP_CLK1N
M19
GPP_CLK2P
M20
GPP_CLK2N
N22
GPP_CLK3P
P22
GPP_CLK3N
L18
25M_48M_66M_OSC
J21
25M_X1
J20
25M_X2
A3
X1
B3
X2
F23
ALLOW_LDTSTP
F24
PROCHOT#
F22
LDT_PG
G25
LDT_STP#
G24
LDT_RST#
SB700-1-GP-U1
SB700-1-GP-U1
Part 1 of 5
Part 1 of 5
RTC XTAL
RTC XTAL
CPU
CPU
SB700
SB700
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
LPC
LPC
RTC
RTC
3
PCICLK0 PCICLK1 PCICLK2 PCICLK3 PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
PCIRST#
DEVSEL#
PCI INTERFACE
PCI INTERFACE
REQ3#/GPIO70 REQ4#/GPIO71
GNT3#/GPIO72 GNT4#/GPIO73
CLKRUN#
INTE#/GPIO33
CLOCK GENERATOR
CLOCK GENERATOR
INTF#/GPIO34
INTG#/GPIO35
INTH#/GPIO36
LPCCLK0 LPCCLK1
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
INTRUDER_ALERT#
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8
AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
CBE0# CBE1# CBE2# CBE3#
FRAME#
IRDY#
TRDY#
PAR
STOP# PERR# SERR# REQ0# REQ1# REQ2#
GNT0# GNT1# GNT2#
LOCK#
LAD0 LAD1 LAD2 LAD3
LDRQ0#
SERIRQ
RTCCLK
VBAT
P4 P3 P1 P2 T4 T3
N1
U2 P7 V4 T1 V3 U1 V1 V2 T2 W1 T9 R6 R7 R5 U8 U5 Y7 W8 V9 Y8 AA8 Y4 Y3 Y2 AA2 AB4 AA1 AB3 AB2 AC1 AC2 AD1 W2 U7 AA7 Y1 AA6 W5 AA5 Y5 U6 W6 W4 V7 AC3 AD4 AB7 AE6 AB6 AD2 AE4 AD5 AC6 AE5 AD6 V5
AD3 AC4 AE2 AE3
G22 E22 H24 H23 J25 J24 H25 H22 AB8 AD7 V15
C3 C2
RTC_AUX_S5_R
B2
2
PCI_CLK2 15 PCI_CLK3 15
CLK_PCI4 15 CLK_PCI_LOM 15
PCI_RST#
PCI_LOCK#32K_X1
3D3V_S0
12
R431
R431 8K2R2J-3-GP
8K2R2J-3-GP
DY
DY
1
TP86TP86
PLT_RST1#9,29,41
PE_GPIO0
2ND = 73.07408.L15
2ND = 73.07408.L15
MXM_PWR_GOOD19
INT_VGA_TV_EN# 20
1
TP183TP183
12 13
73.07408.L16
73.07408.L16
3D3V_S5
3D3V_S0_MXM
PE
PE
PE
PE
090119 -1
PX_EN INT_PIRQH# PE_GPIO0
LPCCLK0_R
R279 22R2J-2-GPR279 22R2J-2-GP
LPCCLK1_R
R278 22R2J-2-GPR278 22R2J-2-GP
LDRQ0# LDRQ1# PCI_REQ#5
INT_SERIRQ 40
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C500
C500
DY
DY
12
C503
C503
R432
R432
1 2
0R0402-PAD
0R0402-PAD
1 2 1 2
LPC_LAD0 40,41 LPC_LAD1 40,41 LPC_LAD2 40,41 LPC_LAD3 40,41
LPC_LFRAME# 40,41
TP171 TPAD14-GPTP171 TPAD14-GP TP190 TPAD14-GPTP190 TPAD14-GP
1 2
R253 1KR2J-1-GPR253 1KR2J-1-GP
090206 -1
PCI_REQ#5 12
RTC_AUX_S5
U34D
U34D
147
11
TSLVC08APW-1-GP
TSLVC08APW-1-GP
12
R448
R448 10KR2F-2-GP
10KR2F-2-GP
12
C710
C710 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
PE
PE
R121
R121
10KR2J-3-GP
10KR2J-3-GP
EC106
EC106 EC107
EC107
PE_RST
12
R433
R433
10KR2J-3-GP
10KR2J-3-GP
12
DY
DY
1 2
DY
DY
1 2
DY
DY
POWER EXPRESS SUPPORT
PE_GPIO0 MXM RESET H: Enable PE_GPIO1 MXM POWER ENABLE PE_GPIO2 MODE SWITCH TMDS_HPD0 MXM HOT PLUG
1 2 3
PE_GPIO1 19,46
PM_CLKRUN# 40
PCLK_FWH 15,41
PCLK_KBC 15,40
SC22P50V2JN-4GP
SC22P50V2JN-4GP SC22P50V2JN-4GP
SC22P50V2JN-4GP
C506
C506
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<Core Design>
<Core Design>
<Core Design>
U144
U144
B
VCC
PE
PE
A
Y
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
DP_AUX0N9
PX_EN20
LPC_LAD[0..3]
1 2
NP1
12
NP2
DY
DY
BAT-CON2-1-GP-U
BAT-CON2-1-GP-U
62.70001.011
62.70001.011
3D3V_S0
5 4
D33
D33
1
PE
PE
2
BAW56-5-GP
BAW56-5-GP
83.00056.Q11
83.00056.Q11
DY
DY
R434
R434 2K2R2F-GP
2K2R2F-GP
2ND = 83.00056.K11
2ND = 83.00056.K11
1 2
RTC1
RTC1
PWR GND NP1 NP2
1
081222 SC
MXM_RST# 19
3D3V_S0
12
PE
PE
3
090213 -1
LPC_LAD[0..3] 40,41
H: Enable
R435
R435 4K7R2F-GP
4K7R2F-GP
PE_GPIO2_NB 20
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-SB700_PCIE&PCI_(1/5)
ATi-SB700_PCIE&PCI_(1/5)
ATi-SB700_PCIE&PCI_(1/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
-2
-2
of
11 56Friday, March 06, 2009
of
11 56Friday, March 06, 2009
of
11 56Friday, March 06, 2009
1
-2
5
DY
NB_PWRGD_R
RN16
RN16
SRN10KJ-5-GP
SRN10KJ-5-GP
SB_TEST2 SB_TEST1 SB_TEST0
ECSCI#_1 PM_SLP_S5# PM_SLP_S3# ECSWI#
ECSMI#_KBC
ACZ_SYNC31,35 ACZ_RST#31,35
12
R3050R2J-2-GPDYR3050R2J-2-GP
NB_PWRGD
PSW_CLR# 13
ALERT# 13,39
R281
R281
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
MEDIA_LED# 13,44,56
PCI_REQ#5 11
KBC_CIR40,41
EC42
EC42
EC41
EC41
SC12P50V2JN-3GP
SC12P50V2JN-3GP
R283
R283
10KR2J-3-GP
10KR2J-3-GP
1 2
DY
DY
1 2
1 2
R93 0R2J-2-GP
R93 0R2J-2-GP RN14
RN14
SRN33J-5-GP-U
SRN33J-5-GP-U
RN15
RN15
SRN33J-5-GP-U
SRN33J-5-GP-U
EC109
EC109
EC43
EC43
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
1 2
1 2
DY
DY
DY
DY
1 2
NB_PWRGD9,45
1D8V_S0
1 2
3D3V_S0
D D
3D3V_S5
3D3V_S0
C C
B B
R304 300R2J-4-GPR304 300R2J-4-GP
1 2 3
1 2
R96 2K2R2F-GP
R96 2K2R2F-GP
1 2
R97 2K2R2F-GP
R97 2K2R2F-GP
1 2
R98 2K2R2F-GP
R98 2K2R2F-GP
8 7 6
6 7 8
SRN10KJ-6-GP
SRN10KJ-6-GP
DY
DY DY
DY DY
DY
RN62
RN62
SRN10KJ-6-GP
SRN10KJ-6-GP
RN61
RN61
ACZ_BTCLK_MDC35
ACZ_SDATAOUT_MDC35
4
1 2 3 45
RSMRST#_SB
45 3 2 1
ACZ_BITCLK31
ACZ_SDATAOUT31
ACZ_SDATAIN031 ACZ_SDATAIN135
Close to SB700
3D3V_S03D3V_S5
NEWCARD/GLAN
RN13
RN13
SRN2K2J-1-GP
SRN2K2J-1-GP
SMB_CLK29,37,38
A A
SMB_DATA29,37,38
5
23
DY
DY
1
23
1
RN17
RN17
SRN2K2J-1-GP
SRN2K2J-1-GP
4
4
SMBD0_SB 3,16,17 SMBC0_SB 3,16,17
EC_TMR40
081222 SC
DY
DY
2 3 1
2 3 1
RN63
RN63
2 3 1
SRN33J-5-GP-U
SRN33J-5-GP-U
EC110
EC110
SC12P50V2JN-3GP
SC12P50V2JN-3GP
1 2
DY
DY
4
KA20GATE40 KBRCIN#40 ECSCI#_140
PCIE_WAKE#29,38
USB_OC#3
3D3V_S0
4
RSMRST#_SB40
SB_MXM_EN19 ACZ_SPKR31
TPAD14-GP
TPAD14-GP TPAD14-GP
TPAD14-GP TPAD14-GP
TPAD14-GP TPAD14-GP
TPAD14-GP
4
4
4
R99
R99
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
PM_SLP_S3#19,21,32,38,39,40,45,46 PM_SLP_S5#38,40,51,52 PM_PWRBTN#40,55
R299
R299
DY
DY
SB_PWRGD45
ECSMI#_KBC
TP180TPAD14-GPTP180TPAD14-GP
TP125TPAD14-GP TP125TPAD14-GP
TPAD14-GP
TPAD14-GP
TP187
TP187
TP188
TP188 TP185
TP185 TP186
TP186 TP172
TP172
ECSWI#40
CPPE#38
USB_OC#428
ACZ_BIT_CLK
TP168TP168 TP170TP170 TP169TP169 TP167TP167
TP177TP177
SB_TEST2 SB_TEST1 SB_TEST0
SMB_ALERT# NB_PWRGD_R
RSMRST#_SB
SMB_CLK
SMB_DATA DDC1_SCL DDC1_SDA
GEVENT7#
USB_OC#028
ACZ_SDATAOUT_R
ACZ_SDIN2
TP182TPAD14-GP TP182TPAD14-GP
ACZ_SYNC_R
ACZ_RST#_R
ACZ_RST#_R 15
TO STRAPS
IDE_RST#
IMC_GPIO4
1
IMC_GPIO5
1
IMC_GPIO6
1
IMC_GPIO7
1
S2#
1
FP_ID
HDMI
SMBC0_SB SMBD0_SB
GPIO5
3
PU_SB1D
PU_SB1D
E1
PCI_PME#/GEVENT4#
E2
RI#/EXTEVNT0#
H7
SLP_S2/GPM9#
F5
SLP_S3#
G1
SLP_S5#
H2
PWR_BTN#
H1
PWR_GOOD
K3
SUS_STAT#
H5
TEST2
H4
TEST1
H3
TEST0
Y15
GA20IN/GEVENT0#
W15
KBRST#/GEVENT1#
K4
LPC_PME#/GEVENT3#
K24
LPC_SMI#/EXTEVNT1#
F1
S3_STATE/GEVENT5#
J2
SYS_RESET#/GPM7#
H6
WAKE#/GEVENT8#
F2
BLINK/GPM6#
J6
SMBALERT#/THRMTRIP#/GEVENT2#
W14
NB_PWRGD
D3
RSMRST#
AE18
SATA_IS0#/GPIO10
AD18
CLK_REQ3#/SATA_IS1#/GPIO6
AA19
SMARTVOLT/SATA_IS2#/GPIO4
W17
CLK_REQ0#/SATA_IS3#/GPIO0
V17
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
W20
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
W21
SPKR/GPIO2
AA18
SCL0/GPOC0#
W18
SDA0/GPOC1#
K1
SCL1/GPOC2#
K2
SDA1/GPOC3#
AA20
DDC1_SCL/GPIO9
Y18
DDC1_SDA/GPIO8
C1
LLB#/GPIO66
Y19
SHUTDOWN#/GPIO5
G5
DDR3_RST#/GEVENT7#
B9
USB_OC6#/IR_TX1/GEVENT6#
B8
USB_OC5#/IR_TX0/GPM5#
A8
USB_OC4#/IR_RX0/GPM4#
A9
USB_OC3#/IR_RX1/GPM3#
E5
USB_OC2#/GPM2#
F8
USB_OC1#/GPM1#
E4
USB_OC0#/GPM0#
M1
AZ_BITCLK
M2
AZ_SDOUT
J7
AZ_SDIN0/GPIO42
J8
AZ_SDIN1/GPIO43
L8
AZ_SDIN2/GPIO44
M3
AZ_SDIN3/GPIO46
L6
AZ_SYNC
M4
AZ_RST#
L5
AZ_DOCK_RST#/GPM8#
H19
IMC_GPIO0
H20
IMC_GPIO1
H21
SPI_CS2#/IMC_GPIO2
F25
IDE_RST#/F_RST#/IMC_GPO3
D22
IMC_GPIO4
E24
IMC_GPIO5
E25
IMC_GPIO6
D23
IMC_GPIO7
SB700-1-GP-U1
SB700-1-GP-U1
3
HD AUDIO
HD AUDIO
SB700
SB700
USBCLK/14M_25M_48M_OSC
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
USB OC
USB OC
INTEGRATED uC
INTEGRATED uC
INTEGRATED uC
INTEGRATED uC
Part 4 of 5
Part 4 of 5
USB_RCOMP
USB_FSD13P
USB MISC
USB MISC
USB_FSD13N USB_FSD12P
USB_FSD12N
USB_HSD11P
USB 1.1
USB 1.1
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P USB_HSD9N
USB_HSD8P USB_HSD8N
USB_HSD7P USB_HSD7N
USB_HSD6P USB_HSD6N
USB_HSD5P USB_HSD5N
USB_HSD4P
USB 2.0
USB 2.0
USB_HSD4N USB_HSD3P
GPIO
GPIO
USB_HSD3N USB_HSD2P
USB_HSD2N USB_HSD1P
USB_HSD1N USB_HSD0P
USB_HSD0N
IMC_GPIO8 IMC_GPIO9
IMC_PWM0/IMC_GPIO10
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12 SCL3_LV/IMC_GPIO13 SDA3_LV/IMC_GPIO14
IMC_PWM1/IMC_GPIO15
IMC_PWM2/IMC_GPO16 IMC_PWM3/IMC_GPO17
IMC_GPIO18 IMC_GPIO19 IMC_GPIO20 IMC_GPIO21 IMC_GPIO22 IMC_GPIO23 IMC_GPIO24 IMC_GPIO25
IMC_GPIO26 IMC_GPIO27 IMC_GPIO28 IMC_GPIO29 IMC_GPIO30 IMC_GPIO31 IMC_GPIO32 IMC_GPIO33 IMC_GPIO34 IMC_GPIO35 IMC_GPIO36 IMC_GPIO37 IMC_GPIO38 IMC_GPIO39 IMC_GPIO40 IMC_GPIO41
2
CLK48_USB
C8
USB_PCOMP
G8
E6 E7
F7 E8
H11 J10
E11 F11
A11 B11
C10 D10
G11 H12
E12 E14
C12 D12
B12 A12
G12 G14
H14 H15
A13 B13
B14 A14
A18 B18 F21 D21 F19 E20 E21 E19 D19 E18
G20 G21 D25 D24 C25 C24 B25 C23
B24 B23 A23 C22 A22 B22 B21 A21 D20 C20 A20 B20 B19 A19 D18 C18
1 2
R280
R280 11K8R2F-GP
11K8R2F-GP
1%
Place R near pin14. Route it with 10mils Trace width and 25mils spacing to any signals in X, Y, Z directions.
USBPP3 36 USBPN3 36
USBPP10 21 USBPN10 21
USBPP2 37 USBPN2 37
USBPP8 28 USBPN8 28
USBPP4 28 USBPN4 28
USBPP1 26 USBPN1 26
USBPP5 27 USBPN5 27
USBPP6 43,56 USBPN6 43,56
USBPP9 38 USBPN9 38
USBPP11 37 USBPN11 37
USBPP0 28 USBPN0 28
SB_GPO16 15 SB_GPO17 15
Strap Pin / define to us e LP C or SPI ROM
2
1
CLK48_USB 3
CLK48_USB_R2
1 2
DY
DY
R254
R254 10KR2J-3-GP
10KR2J-3-GP
Place these close SB700
1 2
C504
C504
SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
USB
Device
Pair
11 Card reader
WEBCAM
10
MINIC2 TV
9
USBCN1
8
7
6
5
4
3
USBCN1
ESATA
Bluetooth
NC
FingerPrint
OCP4#
2 NEW1
1
MINIC1
USB1 CN0
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
ATi-SB700_USB&GPIO_(2/5)
ATi-SB700_USB&GPIO_(2/5)
ATi-SB700_USB&GPIO_(2/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
OCP0#
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
1
of
12 56Friday, March 06, 2009
of
12 56Friday, March 06, 2009
of
12 56Friday, March 06, 2009
-2
-2
-2
5
PLACE SATA AC DECOUPLING CAPS CLOSE TO SB700
C190 SCD01U50V2KX-1GPC190 SCD01U50V2KX-1GP
D D
SATA HDD
SATA ODD
E-SATA
2nd HDD
SATA_TXP024 SATA_TXN024
SATA_RXN024 SATA_RXP024
SATA_TXP125 SATA_TXN125
SATA_RXN125 SATA_RXP125
SATA_TXP226 SATA_TXN226
SATA_RXN226 SATA_RXP226
SATA_TXP324 SATA_TXN324
SATA_RXN324 SATA_RXP324
1 2
C191 SCD01U50V2KX-1GPC191 SCD01U50V2KX-1GP
1 2
C594 SCD01U50V2KX-1GPC594 SCD01U50V2KX-1GP
1 2
C593 SCD01U50V2KX-1GPC593 SCD01U50V2KX-1GP
1 2
C193 SCD01U50V2KX-1GPC193 SCD01U50V2KX-1GP
1 2
C192 SCD01U50V2KX-1GPC192 SCD01U50V2KX-1GP
1 2
C591 SCD01U50V2KX-1GPC591 SCD01U50V2KX-1GP
1 2
C592 SCD01U50V2KX-1GPC592 SCD01U50V2KX-1GP
1 2
C590 SCD01U50V2KX-1GP
C590 SCD01U50V2KX-1GP
1 2
DY
DY
C589 SCD01U50V2KX-1GP
C589 SCD01U50V2KX-1GP
1 2
DY
DY
C194 SCD01U50V2KX-1GP
C194 SCD01U50V2KX-1GP
1 2
DY
DY
C195 SCD01U50V2KX-1GP
C195 SCD01U50V2KX-1GP
1 2
DY
DY
C197 SCD01U50V2KX-1GP
C197 SCD01U50V2KX-1GP
1 2
SATA2
SATA2
C196 SCD01U50V2KX-1GP
C196 SCD01U50V2KX-1GP
1 2
SATA2
SATA2
C587 SCD01U50V2KX-1GP
C587 SCD01U50V2KX-1GP
1 2
SATA2
SATA2
C588 SCD01U50V2KX-1GP
C588 SCD01U50V2KX-1GP
1 2
SATA2
SATA2
090119 -1
C C
C581
C581 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
XTAL-25MHZ-96GP
XTAL-25MHZ-96GP
2ND = 82.30020.971
2ND = 82.30020.971
12
C569
C569 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
B B
X3
X3
82.30020.791
82.30020.791
3D3V_S0
Very Close to SB700
12
R303
R303 10MR2J-L-GP
10MR2J-L-GP
1 2
SATA_X2_R
R293
R293
1 2
0R0402-PAD
0R0402-PAD
R294
R294
1 2
0R0402-PAD
0R0402-PAD
1 2
R302 300R2J-4-GPR302 300R2J-4-GP
PLLVDD_SATA1D2V_S0
XTLVDD_SATA
4
SATA_TXP0_C SATA_TXN0_C
SATA_RXN0_C SATA_RXP0_C
SATA_TXP1_C SATA_TXN1_C
SATA_RXN1_C SATA_RXP1_C
SATA_TXP2_C SATA_TXN2_C
SATA_RXN2_C SATA_RXP2_C
SATA_TXP3_C SATA_TXN3_C
SATA_RXN3_C SATA_RXP3_C
R298
R298
1KR2F-3-GP
1KR2F-3-GP
1 2
MEDIA_LED#12,44,56
20mil Width
12
C560
C560 SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C561
C561
Close to SB700
20mil Width
12
C557
C557 SC1U10V2KX-1GP
SC1U10V2KX-1GP
Close to SB700
AD9 AE9
AB10 AC10
AE10 AD10
AD11 AE11
AB12 AC12
AE12 AD12
AD13 AE13
AB14 AC14
AE14 AD14
AD15 AE15
AB16 AC16
AE16 AD16
SATA_CAL SATA_X1 SATA_X2
AA12
W11
AA11
W12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PU_SB1B
PU_SB1B
SATA_TX0P SATA_TX0N
SATA_RX0N SATA_RX0P
SATA_TX1P SATA_TX1N
SATA_RX1N SATA_RX1P
SATA_TX2P SATA_TX2N
SATA_RX2N SATA_RX2P
SATA_TX3P SATA_TX3N
SATA_RX3N SATA_RX3P
SATA_TX4P SATA_TX4N
SATA_RX4N SATA_RX4P
SATA_TX5P SATA_TX5N
SATA_RX5N SATA_RX5P
V12
SATA_CAL
Y12
SATA_X1 SATA_X2 SATA_ACT#/GPIO67
PLLVDD_SATA XTLVDD_SATA
SB700-1-GP-U1
SB700-1-GP-U1
SB700
SB700
Part 2 of 5
Part 2 of 5
SATA PWR SERIAL ATA
SATA PWR SERIAL ATA
3
IDE_D0/GPIO15 IDE_D1/GPIO16 IDE_D2/GPIO17 IDE_D3/GPIO18 IDE_D4/GPIO19 IDE_D5/GPIO20 IDE_D6/GPIO21 IDE_D7/GPIO22 IDE_D8/GPIO23 IDE_D9/GPIO24
ATA 66/100/133
ATA 66/100/133
IDE_D10/GPIO25 IDE_D11/GPIO26 IDE_D12/GPIO27 IDE_D13/GPIO28 IDE_D14/GPIO29 IDE_D15/GPIO30
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_HOLD#/GPIO31
SPI_CS#/GPIO32
LAN_RST#/GPIO13
ROM_RST#/GPIO14
SPI ROM
SPI ROM
FANOUT0/GPIO3 FANOUT1/GPIO48 FANOUT2/GPIO49
FANIN0/GPIO50 FANIN1/GPIO51 FANIN2/GPIO52
TEMP_COMM TEMPIN0/GPIO61 TEMPIN1/GPIO62 TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
VIN0/GPIO53 VIN1/GPIO54 VIN2/GPIO55
HW MONITOR
HW MONITOR
VIN3/GPIO56 VIN4/GPIO57 VIN5/GPIO58 VIN6/GPIO59 VIN7/GPIO60
IDE_IORDY
IDE_IRQ
IDE_A0 IDE_A1 IDE_A2
IDE_DACK#
IDE_DRQ
IDE_IOR#
IDE_IOW#
IDE_CS1# IDE_CS3#
AVDD AVSS
AA24 AA25 Y22 AB23 Y23 AB24 AD25 AC25 AC24 Y25 Y24
AD24 AD23 AE22 AC22 AD21 AE20 AB20 AD19 AE19 AC20 AD20 AE21 AB22 AD22 AE23 AC23
G6 D2 D1 F4 F3
U15 J1
M8 M5 M7
P5 P8 R8
C6 B6 A6 A5 B5
A4 B4 C4 D4 D5 D6 A7 B7
F6 G7
CLK_ID_0 CLK_ID_1
LAN_RST#
PSW_CLR#
GAP-OPEN
GAP-OPEN
SB_DIS/UMA#
SB_SPI_MISO
G62
G62
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TP191 TPAD14-GPTP191 TPAD14-GP
TP184 TPAD14-GPTP184 TPAD14-GP
ALERT# 12,39
21
AVDD_HWM
C524
C524
12
2
TP175 TPAD14-GPTP175 TPAD14-GP
PSW_CLR# 12
R273
R273
1 2
0R0402-PAD
0R0402-PAD
3D3V_S5
R317
R317
10KR2J-3-GP
10KR2J-3-GP
CLK_ID_1 CLK_ID_0
R324
R324
10KR2J-3-GP
10KR2J-3-GP
DY
DY
DY
DY
1
12
10KR2J-3-GP
10KR2J-3-GP
12
10KR2J-3-GP
10KR2J-3-GP
3D3V_S0
R316
R316
DY
DY
R323
R323
DY
DY
12
CLK_ID (1,0) ICS: 0,0 SEG: 0,1
12
RTM: 1,0
Layout connect to Cap then GND
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-SB700_SATA-IDE_(3/5)
ATi-SB700_SATA-IDE_(3/5)
ATi-SB700_SATA-IDE_(3/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
1
of
13 56Friday, March 06, 2009
of
13 56Friday, March 06, 2009
of
13 56Friday, March 06, 2009
-2
-2
-2
5
081107 SA
12
12
C176
C176
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
D D
1D2V_S0
1 2
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
68.00216.161
68.00216.161
2ND = 68.00206.121
2ND = 68.00206.121
090206 -1
C C
DY
DY
EC117
EC117
2ND = 68.00206.121
2ND = 68.00206.121
1 2
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
68.00216.161
68.00216.161
L27
L27
12
C556
C556
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
220 ohm 2A
L25
L25
C554
C554
>60mil Width
3D3V_S0
C546
C546
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
081107 SA
>100mil Width
12
C548
C548
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C595
C595
C579
C579
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C559
C559
12
PCIE_VDDR
12
C541
C541
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
3D3V_S0
C573
C573
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C542
C542
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDD_SATA1D2V_S0
567 mA
C574
C574
C565
C565
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
Use Plane Shape for +3. 3V _AV DD_US B
2ND = 68.00206.121
2ND = 68.00206.121
3D3V_S5
L21
L21
1 2
HCB2012KF-221T30-GP
HCB2012KF-221T30-GP
68.00216.161
68.00216.161
12
12
C164
B B
C164
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C523
C523
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AVDD_USB
658 mA
>60mil Width
12
C525
C525
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
131 mA
>50mil Width
71 mA
600 mA
12
C549
C549
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C577
C577
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
C528
C528
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
U16 U17
AA4 AB5
AB21
Y20 AA21 AA22 AE25
P18
P19
P20
P21
R22
R24
R25
AA14 AB18 AA15 AA17 AC18 AD17 AE17
A16
B16
C16
D16
D17
E17
G15
G17
G18
L9
M9
T15
U9
V8
W7
Y6
F15 F17 F18
PU_SB1C
PU_SB1C
VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4 VDDQ_5 VDDQ_6 VDDQ_7 VDDQ_8 VDDQ_9 VDDQ_10 VDDQ_11 VDDQ_12
VDD33_18_1 VDD33_18_2 VDD33_18_3 VDD33_18_4
PCIE_VDDR_1 PCIE_VDDR_2 PCIE_VDDR_3 PCIE_VDDR_4 PCIE_VDDR_5 PCIE_VDDR_6 PCIE_VDDR_7
AVDD_SATA_1 AVDD_SATA_4 AVDD_SATA_2 AVDD_SATA_3 AVDD_SATA_5 AVDD_SATA_6 AVDD_SATA_7
AVDDTX_0 AVDDTX_1 AVDDTX_2 AVDDTX_3 AVDDTX_4 AVDDTX_5 AVDDRX_0 AVDDRX_1 AVDDRX_2 AVDDRX_3 AVDDRX_4 AVDDRX_5
SB700-1-GP-U1
SB700-1-GP-U1
SB700
SB700
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
IDE/FLSH I/O
IDE/FLSH I/O
POWER
POWER
A-LINK I/O
A-LINK I/O
3.3V_S5 I/OCORE S5
3.3V_S5 I/OCORE S5
SATA I/O
SATA I/O
USB_PHY_1.2V_1 USB_PHY_1.2V_2
PLL CLKGEN I/O
PLL CLKGEN I/O
USB I/O
USB I/O
VDD_1 VDD_2 VDD_3 VDD_4 VDD_5 VDD_6 VDD_7 VDD_8
CORE S0
CORE S0
VDD_9
CKVDD_1.2V_1 CKVDD_1.2V_2 CKVDD_1.2V_3 CKVDD_1.2V_4
S5_3.3V_1 S5_3.3V_2 S5_3.3V_3 S5_3.3V_4 S5_3.3V_5 S5_3.3V_6 S5_3.3V_7
S5_1.2V_1 S5_1.2V_2
V5_VREF AVDDCK_3.3V AVDDCK_1.2V
AVDDC
L15 M12 M14 N13 P12 P14 R11 R15 T16
L21 L22 L24 L25
A17 A24 B17 J4 J5 L1 L2
G2 G4
A10 B10
AE7 J16 K17 E9
510 mA
12
32 mA
113 mA
V5_VREF AVDDCK_3D3V AVDDK_1D2V
3D3V_AVDDC
12
C521
C521
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3
>100mil Width
12
C537
C537
C552
C552
SC1U10V2KX-1GP
SC1U10V2KX-1GP
>20mil Width
12
C536
C536
090206 -1
>20mil Width
12
C530
C530
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
FCM1608CF-221T02-GP
FCM1608CF-221T02-GP
12
C518
C518
SC1U10V2KX-1GP
SC1U10V2KX-1GP
68.00217.521
68.00217.521
2ND = 68.00119.111
2ND = 68.00119.111
>15mil Width
090206 -1
DY
DY
12
C538
C538
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C543
C543
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
12
12
C509
C509
C517
C517
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3D3V_S5
L20
L20
1D2V_S0
12
C547
C547
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
CKVDD
12
DY
DY
3D3V_S5
12
C520
C520
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D2V_S5
12
C513
C513
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
>10mil Width
C576
C576
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C535
C535
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
R285
R285
1 2
0R0402-PAD
0R0402-PAD
C534
C534
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
DY
DY
12
C519
C519
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C526
C526 SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
2
1D2V_S0
R120
R120
1KR2J-1-GP
1KR2J-1-GP
D25
D25
K A
RB751V-40-2-GP
RB751V-40-2-GP
83.R2004.B8F
83.R2004.B8F
2ND = 83.R0304.A8F
2ND = 83.R0304.A8F
5V_S0
12
3D3V_S0
U10 U11 U12
AA9
AB9 AB11 AB13 AB15 AB17
AC8
AD8
AE8
C14
D11
D13
D14
D15
H17
H18
M16
M17
M21
T10
V11 V14 W9
Y9 Y11 Y14 Y17
A15 B15
D8 D9
E15 F12 F14
G9
H9
J9 J11 J12 J14 J15 K10 K12 K14 K15
J17 J22 K25
P16
F9
PU_SB1E
PU_SB1E
SB700
SB700
AVSS_SATA_1 AVSS_SATA_2 AVSS_SATA_3 AVSS_SATA_4 AVSS_SATA_5 AVSS_SATA_6 AVSS_SATA_7 AVSS_SATA_8 AVSS_SATA_9 AVSS_SATA_10 AVSS_SATA_11 AVSS_SATA_12 AVSS_SATA_13 AVSS_SATA_14 AVSS_SATA_15 AVSS_SATA_16 AVSS_SATA_17 AVSS_SATA_18 AVSS_SATA_19 AVSS_SATA_20
AVSS_USB_1 AVSS_USB_2 AVSS_USB_3 AVSS_USB_4 AVSS_USB_5 AVSS_USB_6 AVSS_USB_7 AVSS_USB_8 AVSS_USB_9 AVSS_USB_10 AVSS_USB_11 AVSS_USB_12 AVSS_USB_13 AVSS_USB_14 AVSS_USB_15 AVSS_USB_16 AVSS_USB_17 AVSS_USB_18 AVSS_USB_19 AVSS_USB_20 AVSS_USB_21 AVSS_USB_22 AVSS_USB_23 AVSS_USB_24
PCIE_CK_VSS_1 PCIE_CK_VSS_2 PCIE_CK_VSS_3 PCIE_CK_VSS_4 PCIE_CK_VSS_5 PCIE_CK_VSS_6 PCIE_CK_VSS_7 PCIE_CK_VSS_8
AVSSC
SB700-1-GP-U1
SB700-1-GP-U1
1
Part 5 of 5
Part 5 of 5
GROUND
GROUND
PCIE_CK_VSS_10 PCIE_CK_VSS_11 PCIE_CK_VSS_12 PCIE_CK_VSS_13 PCIE_CK_VSS_14 PCIE_CK_VSS_15 PCIE_CK_VSS_16 PCIE_CK_VSS_17 PCIE_CK_VSS_18 PCIE_CK_VSS_19 PCIE_CK_VSS_20 PCIE_CK_VSS_21
VSS_1 VSS_2 VSS_3 VSS_4 VSS_5 VSS_6 VSS_7 VSS_8
VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50
PCIE_CK_VSS_9
AVSSCK
A2 A25 B1 D7 F20 G19 H8 K9 K11 K16 L4 L7 L10 L11 L12 L14 L16 M6 M10 M11 M13 M15 N4 N12 N14 P6 P9 P10 P11 P13 P15 R1 R2 R4 R9 R10 R12 R14 T11 T12 T14 U4 U14 V6 Y21 AB1 AB19 AB25 AE1 AE24
P23 R16 R19 T17 U18 U20 V18 V20 V21 W19 W22 W24 W25
L17
47 mA
AVDDCK_3D3V
C531
C531
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
62 mA
AVDDK_1D2V
C533
C533
DY
DY
SCD1U10V2KX-4GP
A A
5
4
SCD1U10V2KX-4GP
3
>15mil Width
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C532
C532
>15mil Width
12
C529
C529
L22
L22
1 2
0R0402-PAD
0R0402-PAD
L23
L23
1 2
0R0402-PAD
0R0402-PAD
3D3V_S0
1D2V_S0
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ATi-SB700_POWER&GND_(4/5)
ATi-SB700_POWER&GND_(4/5)
ATi-SB700_POWER&GND_(4/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
1
-2
-2
of
14 56Monday, March 02, 2009
of
14 56Monday, March 02, 2009
of
14 56Monday, March 02, 2009
-2
5
4
3
2
1
REQUIRED STRAPS
D D
R29110KR2J-3-GP
R29110KR2J-3-GP
12
DY
DY
C C
1
23
SRN10KJ-5-GP
SRN10KJ-5-GP
4
3D3V_S0 3D3V_S5
R29610KR2J-3-GP
R29610KR2J-3-GP
R10210KR2J-3-GP
R10210KR2J-3-GP
12
DY
DY
R10010KR2J-3-GP
R10010KR2J-3-GP
12
DY
DY
12
DY
DY
R29510KR2J-3-GP
R29510KR2J-3-GP
12
DY
DY
RN64
RN64
R29710KR2J-3-GP
R29710KR2J-3-GP
12
DY
DY
REQUIRED SYSTEM STRAPS
R26510KR2J-3-GP
R26510KR2J-3-GP
12
DY
DY
1
23
4
RN60
RN60 SRN10KJ-5-GP
SRN10KJ-5-GP
R27010KR2J-3-GP
R27010KR2J-3-GP
12
DY
DY
DY
DY
DY
DY
R24710KR2J-3-GP
R24710KR2J-3-GP
12
R24810KR2J-3-GP
R24810KR2J-3-GP
12
R28210KR2J-3-GP
R28210KR2J-3-GP
12
DY
DY
R28410KR2J-3-GP R28410KR2J-3-GP
12
R2672K2R2F-GP
R2672K2R2F-GP
12
DY
DY
1
23
4
RN58
RN58
SRN2K2J-1-GP
SRN2K2J-1-GP
12
R252
R252 2K2R2F-GP
2K2R2F-GP
DY
DY
PCI_CLK2 11
PCI_CLK3 11
CLK_PCI4 11
CLK_PCI_LOM 11
PCLK_FWH 11,41 PCLK_KBC 11,40
RTC_CLK 11,39
ACZ_RST#_R 12
SB_GPO17 12
SB_GPO16 12
DEBUG STRAPS
B B
PULL HIGH
PULL LOW
A A
PCI_CLK2
WatchDOG (NB_PWRGD) ENABLED
WatchDog (NB_PWRGD) DISABLED
DEFAULT
5
PCI_CLK3
USE DEBUG STRAPS
IGNORE DEBUG STRAPS
DEFAULT
CLK_PCI_LOM CLK_PCI4
RESERVED
PCLK_FWH
IMC ENABLED
IMC DISABLED
DEFAULT
CLKGEN ENABLED
(Use Internal)
CLKGEN DISABLED
(Use External)
DEFAULT
RTCCLKPCLK_KBC
INTERNAL RTC
DEFAULT
EXT. RTC
(PD on X1, apply 32KHz to RTC_CLK)
AZ_RST#
ENABLE PCI ROM BOOT
DISABLE PCI ROM BOOT
DEFAULT
SB_GPO17 , SB_GPO16
ROM TYPE: H, H = Reserved
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTCCLK
4
DEFAULT
Note: SB700 has 15K internal PU FOR PCI_AD[30:23]
3
PCI_AD28
USE
PULL
LONG
HIGH
RESET
(DEFAULT) (DEFA ULT)(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)
USE
PULL
SHORT
LOW
RESET
USE PCI PLL
BYPASS PCI PLL
PCI_AD26PCI_AD27
USE ACPI BCLK
BYPASS ACPI BCLK
2
PCI_AD25 PCI_AD23
USE IDE PLL
BYPASS IDE PLL
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCI_AD24
USE DEFAULT PCIE STRAPS
USE EEPROM PCIE STRAPS
ATi-SB700_STRAPPING_(5/5)
ATi-SB700_STRAPPING_(5/5)
ATi-SB700_STRAPPING_(5/5)
Reserved
Reserved
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
PCI_AD30 PCI_AD29
Reserved
-2
-2
of
15 56Friday, March 06, 2009
of
15 56Friday, March 06, 2009
of
15 56Friday, March 06, 2009
1
-2
5
D D
C C
B B
A A
5
VREF_DDR_MEM
4
MEM_MA_ADD05,18 MEM_MA_ADD15,18 MEM_MA_ADD25,18 MEM_MA_ADD35,18 MEM_MA_ADD45,18 MEM_MA_ADD55,18 MEM_MA_ADD65,18 MEM_MA_ADD75,18 MEM_MA_ADD85,18 MEM_MA_ADD95,18 MEM_MA_ADD105,18 MEM_MA_ADD115,18 MEM_MA_ADD125,18 MEM_MA_ADD135,18 MEM_MA_ADD145,18 MEM_MA_ADD155,18
MEM_MA_BANK25,18 MEM_MA_BANK05,18 MEM_MA_BANK15,18
MEM_MA_DATA05 MEM_MA_DATA15 MEM_MA_DATA25 MEM_MA_DATA35 MEM_MA_DATA45 MEM_MA_DATA55 MEM_MA_DATA65 MEM_MA_DATA75 MEM_MA_DATA85 MEM_MA_DATA95 MEM_MA_DATA105 MEM_MA_DATA115 MEM_MA_DATA125 MEM_MA_DATA135 MEM_MA_DATA145 MEM_MA_DATA155 MEM_MA_DATA165 MEM_MA_DATA175 MEM_MA_DATA185 MEM_MA_DATA195 MEM_MA_DATA205 MEM_MA_DATA215 MEM_MA_DATA225 MEM_MA_DATA235 MEM_MA_DATA245 MEM_MA_DATA255 MEM_MA_DATA265 MEM_MA_DATA275 MEM_MA_DATA285 MEM_MA_DATA295 MEM_MA_DATA305 MEM_MA_DATA315 MEM_MA_DATA325 MEM_MA_DATA335 MEM_MA_DATA345 MEM_MA_DATA355 MEM_MA_DATA365 MEM_MA_DATA375 MEM_MA_DATA385 MEM_MA_DATA395 MEM_MA_DATA405 MEM_MA_DATA415 MEM_MA_DATA425 MEM_MA_DATA435 MEM_MA_DATA445 MEM_MA_DATA455 MEM_MA_DATA465 MEM_MA_DATA475 MEM_MA_DATA485 MEM_MA_DATA495 MEM_MA_DATA505 MEM_MA_DATA515 MEM_MA_DATA525 MEM_MA_DATA535 MEM_MA_DATA545 MEM_MA_DATA555 MEM_MA_DATA565 MEM_MA_DATA575 MEM_MA_DATA585 MEM_MA_DATA595 MEM_MA_DATA605 MEM_MA_DATA615 MEM_MA_DATA625 MEM_MA_DATA635
MEM_MA0_CS#05,18 MEM_MA0_CS#15,18
MEM_MA_CKE05,18 MEM_MA_CKE15,18 MEM_MA_RAS#5,18 MEM_MA_CAS#5,18
MEM_MA_WE#5,18 SMBC0_SB3,12,17
SMBD0_SB3,12,17
MEM_MA0_ODT05,18 MEM_MA0_ODT15,18
SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
Place C2.2uF and 0.1uF < 500mils from DDR connector
SCD1U10V2KX-4GP
C342
C342
12
C341
C341
4
12
NP1
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84 85
107 106
5
7 17 19
4
6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76
123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194
50 69 83
120 163
110 115
79 80
108 113 109
197 195
114 119
1
201
Main Source:
PU_DM1
PU_DM1
NP1 A0
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16_BA2
BA0 BA1
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC#50 NC#69 NC#83 NC#120 NC#163/TEST
CS0# CS1# CKE0 CKE1 RAS# CAS# WE#
SCL SDA
ODT0 ODT1
VREF GND
SKT-SODIMM20020U4GP
SKT-SODIMM20020U4GP
62.10017.661
62.10017.661
2ND = 62.10017.G81
2ND = 62.10017.G81
NP2
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6
DQS7 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
CK0
CK0#
CK1
CK1#
SA0 SA1
VDD_SPD
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VSS VSS VSS VSS
NORMAL TYPE
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
GND
LOW 5.2 mm
NP2 13
31 51 70 131 148 169 188 11 29 49 68 129 146 167 186
10 26 52 67 130 147 170 185
30 32 164 166
198 200
199
81 82 87 88 95 96 103 104 111 112 117 118
2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196
202
090213 -1
3
(A0)
3
1D8V_S3
MEM_MA_DQS0_P 5 MEM_MA_DQS1_P 5 MEM_MA_DQS2_P 5 MEM_MA_DQS3_P 5 MEM_MA_DQS4_P 5 MEM_MA_DQS5_P 5 MEM_MA_DQS6_P 5 MEM_MA_DQS7_P 5 MEM_MA_DQS0_N 5 MEM_MA_DQS1_N 5 MEM_MA_DQS2_N 5 MEM_MA_DQS3_N 5 MEM_MA_DQS4_N 5 MEM_MA_DQS5_N 5 MEM_MA_DQS6_N 5 MEM_MA_DQS7_N 5
MEM_MA_DM0 5 MEM_MA_DM1 5 MEM_MA_DM2 5 MEM_MA_DM3 5 MEM_MA_DM4 5 MEM_MA_DM5 5 MEM_MA_DM6 5 MEM_MA_DM7 5
MEM_MA_CLK0_P 5 MEM_MA_CLK0_N 5 MEM_MA_CLK1_P 5 MEM_MA_CLK1_N 5
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
3D3V_S0
C340
C340
DY
DY
12
090206 -1
DY
DY
12
C339
C339 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
MEM_MA_CLK0_P
12
C236
C236 SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MA_CLK0_N MEM_MA_CLK1_P
12
C237
C237 SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MA_CLK1_N
DDR_VREF
1D8V_S3
RN85
RN85
1 2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
/$<287/RFDWHFORVHWR',00
VREF_DDR_MEM
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C658
C658
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
090209 -1
DY
DY
C659
C659
C652
C652
4
2
1
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsi chih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_SO-DIMM SKT_1
DDR_SO-DIMM SKT_1
DDR_SO-DIMM SKT_1
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
of
16 56Friday, March 06, 2009
of
16 56Friday, March 06, 2009
of
16 56Friday, March 06, 2009
1
-2
-2
-2
5
D D
C C
B B
A A
5
VREF_DDR_MEM
4
MEM_MB_ADD05,18 MEM_MB_ADD15,18 MEM_MB_ADD25,18 MEM_MB_ADD35,18 MEM_MB_ADD45,18 MEM_MB_ADD55,18 MEM_MB_ADD65,18 MEM_MB_ADD75,18 MEM_MB_ADD85,18
MEM_MB_ADD95,18 MEM_MB_ADD105,18 MEM_MB_ADD115,18 MEM_MB_ADD125,18 MEM_MB_ADD135,18 MEM_MB_ADD145,18 MEM_MB_ADD155,18
MEM_MB_BANK25,18 MEM_MB_BANK05,18 MEM_MB_BANK15,18
MEM_MB_DATA05 MEM_MB_DATA15 MEM_MB_DATA25 MEM_MB_DATA35 MEM_MB_DATA45 SMBD0_SB 3,12,16 MEM_MB_DATA55 MEM_MB_DATA65 MEM_MB_DATA75 MEM_MB_DATA85
MEM_MB_DATA95 MEM_MB_DATA105 MEM_MB_DATA115 MEM_MB_DATA125 MEM_MB_DATA135 MEM_MB_DATA145 MEM_MB_DATA155 MEM_MB_DATA165 MEM_MB_DATA175 MEM_MB_DATA185 MEM_MB_DATA195 MEM_MB_DATA205 MEM_MB_DATA215 MEM_MB_DATA225 MEM_MB_DATA235 MEM_MB_DATA245 MEM_MB_DATA255 MEM_MB_DATA265 MEM_MB_DATA275 MEM_MB_DATA285 MEM_MB_DATA295 MEM_MB_DATA305 MEM_MB_DATA315 MEM_MB_DATA325 MEM_MB_DATA335 MEM_MB_DATA345 MEM_MB_DATA355 MEM_MB_DATA365 MEM_MB_DATA375 MEM_MB_DATA385 MEM_MB_DATA395 MEM_MB_DATA405 MEM_MB_DATA415 MEM_MB_DATA425 MEM_MB_DATA435 MEM_MB_DATA445 MEM_MB_DATA455 MEM_MB_DATA465 MEM_MB_DATA475 MEM_MB_DATA485 MEM_MB_DATA495 MEM_MB_DATA505 MEM_MB_DATA515 MEM_MB_DATA525 MEM_MB_DATA535 MEM_MB_DATA545 MEM_MB_DATA555 MEM_MB_DATA565 MEM_MB_DATA575 MEM_MB_DATA585 MEM_MB_DATA595 MEM_MB_DATA605 MEM_MB_DATA615 MEM_MB_DATA625 MEM_MB_DATA635
MEM_MB_DQS0_N5 MEM_MB_DQS1_N5 MEM_MB_DQS2_N5 MEM_MB_DQS3_N5 MEM_MB_DQS4_N5 MEM_MB_DQS5_N5 MEM_MB_DQS6_N5 MEM_MB_DQS7_N5
MEM_MB_DQS0_P5 MEM_MB_DQS1_P5 MEM_MB_DQS2_P5 MEM_MB_DQS3_P5 MEM_MB_DQS4_P5 MEM_MB_DQS5_P5 MEM_MB_DQS6_P5 MEM_MB_DQS7_P5
MEM_MB0_ODT05,18 MEM_MB0_ODT15,18
SCD1U10V2KX-4GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
Place C2.2uF and 0. 1uF < 500mils from DDR connec t or
SCD1U10V2KX-4GP
12
12
C302
C302
C301
C301
HI 9.2mm
4
PU_DM2
PU_DM2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
SKT-SODIMM200-37GP
SKT-SODIMM200-37GP
62.10017.E21
62.10017.E21
2ND = 62.10017.G71
2ND = 62.10017.G71
NC#163/TEST
3
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
195
SDA
197
SCL
199
VDDSPD
SA0 SA1
NC#50 NC#69 NC#83
NC#120
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NORMAL TYPE
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS GND MH2
198 200
50 69 83 120 163
81 82 87 88 95 96 103 104 111 112 117 118
3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196
201 MH2
DIMM2_SA1
R173 10KR2J-3-GPR173 10KR2J-3-GP
1D8V_S3
1 2
(A2)
MEM_MB_RAS# 5,18 MEM_MB_WE# 5,18 MEM_MB_CAS# 5,18
MEM_MB0_CS#0 5,18 MEM_MB0_CS#1 5,18
MEM_MB_CKE0 5,18 MEM_MB_CKE1 5,18
MEM_MB_CLK0_P 5 MEM_MB_CLK0_N 5
MEM_MB_CLK1_P 5 MEM_MB_CLK1_N 5
MEM_MB_DM0 5 MEM_MB_DM1 5 MEM_MB_DM2 5 MEM_MB_DM3 5 MEM_MB_DM4 5 MEM_MB_DM5 5 MEM_MB_DM6 5 MEM_MB_DM7 5
SMBC0_SB 3,12,16
081225 SC
3
2
090206 -1
3D3V_S0
DY
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
12
12
DY
12
12
C303
C303
C304
C304
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
MEM_MB_CLK0_P
C247
C247 SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MB_CLK0_N MEM_MB_CLK1_P
C243
C243 SC1D5P50V2CN-1GP
SC1D5P50V2CN-1GP
MEM_MB_CLK1_N
2
1
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
DDR_SO-DIMM SKT_2
DDR_SO-DIMM SKT_2
DDR_SO-DIMM SKT_2
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
17 56Friday, March 06, 2009
17 56Friday, March 06, 2009
17 56Friday, March 06, 2009
of
of
1
of
-2
-2
-2
5
4
3
2
1
Decoupling Capacitor
0D9V_S3
12
12
C348
C348
SCD1U16V2ZY-2GP
D D
C C
B B
PARALLEL TERMINATION
RN35
RN35
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN33
RN33
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN38
RN38
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN36
RN36
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN34
RN34
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN37
RN37
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN39
RN39
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
Put decap near power(0.9V) and pull-up resistor
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
MEM_MA0_ODT1 5,16 MEM_MA0_CS#1 5,16 MEM_MA_CAS# 5,16 MEM_MA_WE# 5,16
MEM_MA_ADD5 5,16 MEM_MA_ADD8 5,16
MEM_MA_ADD9 5,16 MEM_MA_ADD12 5,16
MEM_MA_ADD2 5,16 MEM_MA_ADD4 5,16 MEM_MA_ADD0 5,16
MEM_MA_BANK1 5,16
MEM_MA_CKE0 5,16
MEM_MA_BANK2 5,16
MEM_MA_CKE1 5,16
MEM_MA_ADD15 5,16
MEM_MA_ADD10 5,16
MEM_MA_BANK0 5,16 MEM_MA_ADD3 5,16 MEM_MA_ADD1 5,16
MEM_MA_ADD14 5,16
MEM_MA_ADD11 5,16 MEM_MA_ADD7 5,16 MEM_MA_ADD6 5,16
MEM_MA0_CS#0 5,16
MEM_MA_RAS# 5,16
MEM_MA0_ODT0 5,16
MEM_MA_ADD13 5,16
0D9V_S30D9V_S3
RN29
RN29
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN32
RN32
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN30
RN30
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN24
RN24
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN31
RN31
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
RN25
RN25
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP RN26
RN26
1 2 3 4 5
SRN47J-4-GP
SRN47J-4-GP
Net swap 11/14 RN6,9,11,20,22,24
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
MEM_MB_ADD14 5,17 MEM_MB_ADD11 5,17 MEM_MB_ADD7 5,17 MEM_MB_ADD6 5,17
MEM_MB_ADD4 5,17 MEM_MB_ADD0 5,17 MEM_MB_ADD2 5,17 MEM_MB_BANK1 5,17
MEM_MB_RAS# 5,17 MEM_MB0_CS#0 5,17 MEM_MB0_ODT0 5,17 MEM_MB_ADD13 5,17
MEM_MB_ADD5 5,17 MEM_MB_ADD8 5,17 MEM_MB_ADD9 5,17 MEM_MB_BANK2 5,17
MEM_MB_CKE0 5,17 MEM_MB_CKE1 5,17 MEM_MB_ADD12 5,17 MEM_MB_ADD15 5,17
MEM_MB_BANK0 5,17 MEM_MB_ADD10 5,17 MEM_MB_ADD1 5,17 MEM_MB_ADD3 5,17
MEM_MB0_ODT1 5,17 MEM_MB0_CS#1 5,17 MEM_MB_CAS# 5,17 MEM_MB_WE# 5,17
SCD1U16V2ZY-2GP
Place these Caps near DM1
12
C322
C322
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
Place these Caps near DM2
1D8V_S3
12
C357
C357
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
Place these Caps near PARALLEL TERMINATION
DY
DY
12
12
C353
C353
C317
C317
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Put decap near power(0.9V) and pull-up resistor
DY
DY
12
C300
C300
C336
C336
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D8V_S3
DY
DY
12
C323
C323
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
12
C645
C645
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
DY
DY
12
C318
C318
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C308
C308
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
12
C643
C643
C356
C356
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
12
C644
C644
C324
C324
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
12
C295
C295
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
12
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C335
C335
C337
C337
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C320
C320
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
090206 -1
DY
DY
12
C315
C315
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
090209 -1
DY
DY
DY
DY
12
C294
C294
C330
C330
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C346
C346
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
090206 -1
12
12
C355
C355
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
C314
C314
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
12
C319
C319
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
C310
C310
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
C321
C321
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3
12
C640
C640
C316
C316
SC180P50V2JN-1GP
SC180P50V2JN-1GP
DY
DY
12
12
C327
C327
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C299
C299
C338
C338
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
Layout Note: Place one cap close to every 2 pullup resistors terminated to 0D9V_S3
1D8V_S30D9V_S3
DY
DY
C329
C329
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C307
C307
090206 -1
12
C347
C347
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
12
C298
C298
SC10P50V2JN-4GP
SC10P50V2JN-4GP
Do not share the Term resistor between the DDR addess and Control Signals.
DY
12
C331
C331
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C293
C293
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
12
A A
5
4
3
C354
C354
C326
C326
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
12
C350
C350
C351
C351
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C292
C292
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2
12
12
C352
C352
C328
C328
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR_DAMPING & TERMINATION
DDR_DAMPING & TERMINATION
DDR_DAMPING & TERMINATION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
JM70-PU
JM70-PU
JM70-PU
18 56Friday, March 06, 2009
18 56Friday, March 06, 2009
18 56Friday, March 06, 2009
1
-2
-2
of
of
of
-2
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