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JE40-HR
Schematic
103 pgs2.96 Mb2

Wistron JE40-HR, Aspire 4750, Aspire 4750G, Aspire 4750Z, Aspire 4752 Schematic

4.5 (2)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Cover Page
A3
1 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Cover Page
A3
1 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Cover Page
A3
1 102
Thursday, December 02, 2010
HR UMA
ANNIE: ONLY FOR ANNIE solution.
PSL: KBC795 PSL circuit for 10mW solution installed.
10mW: External circuit for 10mW solution installed.
65W: for 65W adaptor installed.
90W: for 90W adaptor installed.
DY :None Installed
DIS:DIS installed
DIS_Muxless :BOTH DIS or Muxless installed
DIS_PX:BOTH DIS or PX installed
DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
PX_Muxless:BOTH PX or Muxless installed.
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
Intel PCH
DIS/UMA/Muxless Schematics Document
Sandy Bridge
JE40 HR
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Block Diagram
A3
2 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Block Diagram
A3
2 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Block Diagram
A3
2 102
Thursday, December 02, 2010
HR UMA
INPUTS
VGA
DCBATOUT
OUTPUTS
26
RT8208BGQW
VGA_CORE
0D75V_S0
3D3V_AUX_S5
NCP6131S52MNR
INPUTS
VCC_CORE
OUTPUTS
SYSTEM DC/DC
UP6165BQKF
DDR_VREF_S3
OUTPUTS
CPU DC/DC
DCBATOUT
1D5V_S3
INPUTS
UP6183PQAG
DCBATOUT 5V_S5
OUTPUTS
3D3V_S5
UP6128PQDD
OUTPUTS
SYSTEM DC/DC
INPUTS
DCBATOUT
INPUTS
SYSTEM DC/DC
DCBATOUT
1D5V_VGA_S0
OUTPUTS
OUTPUTS
SYSTEM DC/DC
INPUTS
BQ24745RHDR
INPUTS
TI CHARGER
DCBATOUT
5V_AUX_S5
INPUTS
SYSTEM DC/DC
OUTPUTS
26
RT9025
3D3V_S0
3D3V_VGA_S03D3V_S0
1D8V_S0
DCBATOUT
PCB LAYER
L1:Top
L2:VCC
L3:Signal
VCC_GFXCORE_PWR
1D5V_S3
NCP5911MNTBG
1D8V_VGA_S0
SYSTEM DC/DC
Switches
INPUTS OUTPUTS
1D05V_VTT
42~43
45
41
46
44
92
47
93
2869 2569
40
RT9025-25PSP
INPUTS OUTPUTS
1D5V_S3 1V_VGA_S0
L4:Signal
L5:GND
L6:Bottom
3D3V_S5
APL5916KAI
INPUTS
0D85V_S0
OUTPUTS
SYSTEM DC/DC
1D05V_PWR
48
PCIE x 1
USB x 1
57
60
71
LPC debug port
Nvidia N12P
Project code : 91.4IQ01.001
PCB P/N : 48.4IQ01.0SA
Revision : 10267-1
ENE P2800
ENE P2793
ALC271X
DMIx4
1000 NIC
RJ45
CONN
SIM
SPI
Flash ROM
4MB
51
Mini-Card
HDMI
HDMI
88,89,90,91
83.84,85,86,87
BCM57780A1
KBC
Thermal
Int.
KB
LPC Bus
DDRIII
1066/1333
Intel CPU
DDRIII 1066/1333 Channel A
Slot 0
14
15
4,5,6,7,8,9,10,11,12,13
Slot 1
JE40 HR Block Diagram
(Discrete/UMA/co-lay)
Bluetooth
63
Left Side:
USB x 1
WWAN
Right Side:
USB x 1
CAMERA
49
MIC IN
Mini-Card
802.11a/b/g
LVDS(Dual Channel)
CRT
Intel
56
LCD
RGB CRT
ODD
56
14 USB 2.0/1.1 ports
High Definition Audio
SATA x 2
SATA ports (6)
ACPI 1.1
LPC I/F
HDD
SD/MMC+/MS/
MS Pro/xD
Azalia
CODEC
USB2.0 x 4
29
2CH SPEAKER
HP1
Internal Analog MIC
ETHERNET (10/100/1000Mb)
NPCE795P
PCIE ports (8)
NUVOTON
28
DDR3
800MHz
2GB/1GB/512MB
Fan
VRAM
27
49
17,18,19,20,21,22,23,24,25,26
PCIe x 16
Touch
PAD
FDIx4x2
(UMA only)
Discreet/UMA/PX Co-lay
AZALIA
65
66 66
31
59
64
50
(Discrete only)
Level
shifter
##OnMainBoard
SMBus
USB 2.0 x 1
PCIE x 1,USB x 1
PCIE x 1
Sandy Bridge
FSB: 1066 MHz
DDRIII
1066/1333
DDRIII 1066/1333 Channel B
PCH
Cougar Point
75
PCIE x 1
USB x 2
USB3.0
uPD720200
BT+
A
B
C
D
E
4 4
3 3
2 2
1 1
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Table of Content
A3
3102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Table of Content
A3
3102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Table of Content
A3
3102
Thursday, December 02, 2010
HR UMA
PCIE Routing
LANE2
LANE3 Card Reader
Onboard LAN
LANE4
Mini Card1(WLAN)
SATA Table
Pair
SATA
Device
0
5
4
3
2
1
HDD1
ODD
N/A
HDD2
N/A
ESATA
LANE1 Mini Card2(WWAN)
LANE5
LANE6
LANE7
LANE8 New Card
Intel GBE LAN
CFG[6:5]
CFG[7]
Processor Strapping
CFG[2]
Disabled - No Physical Display Port attached to
Embedded DisplayPort.
CFG[4]
Pin Name Strap Description Configuration (Default value for each bit is
1 unless specified otherwise)
1:
Huron River Schematic Checklist Rev.0_7
0:
PCI-Express Static
Lane Reversal
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
Default
Value
PCI-Express
Port Bifurcation
Straps
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
PEG DEFER TRAINING
1
0
1
1:
0:
Enabled - An external Display Port device is
connectd to the EMBEDDED display Port
11
1:
0:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
SPKR
Name Schematics Notes
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC
Huron River Schematic Checklist Rev.0_7
INIT3_3V#
Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55
GNT2#/GPIO53
GNT1#/GPIO51
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
PCH Strapping
SPI_MOSI
Internal weak Pull-down.
Connect to Vcc3_3 with 8.2-kȍ
- 10-kȍ weak pull-up resistor.
NV_ALE
Enable Danbury:
Disable Danbury:
NC_CLE
DMI termination voltage. Weak internal pull-up. Do not pull low.
GPIO15
GPIO8
Reboot option at power-up
Default Mode:
No Reboot Mode with TCO Disabled:
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
GPIO27
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Voltage Rails
VOLTAGE
DESCRIPTION
ACTIVE IN
POWER PLANE
CPU Core Rail
Graphics Core Rail
AC Brick Mode only
Legacy WOL
Powered by Li Coin Cell in G3
and +V3ALW in Sx
3D3V_AUX_KBC
3.3V
DSW, Sx ON for supporting Deep Sleep states
S0
S3
All S states
WOL_EN
G3, Sx
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0
5V
3.3V
1.8V
1.5V
1.05V
0.95 - 0.85V
0.75V
0.35V to 1.5V
0.4 to 1.25V
1.8V
3.3V
1V
5V
1.5V
0.75V
5V_USBX_S3
1D5V_S3
DDR_VREF_S3
BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5
6V-14.1V
6V-14.1V
5V
5V
3.3V
3.3V
3.3V3D3V_LAN_S5
3.3V
3D3V_AUX_S5
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
Device
I C / SMBus Addresses
2
EC SMBus 1
Battery
CHARGER
EC SMBus 2
PCH
eDP
PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI
BAT_SCL/BAT_SDA
SMBus ADDRESSES
HURON RIVER ORB
Address Hex Bus Ref Des
USB3.0
Dock
USB Table
13
EDP CAMERA
12
X
Mini Card1 (WLAN)
Fingerprint
X
New Card
USB Ext. port 2
10
0
11
USB Ext. port 1 (HS)
Pair
4
5
2
3
1
Device
6
7
8
9
BLUETOOTH
Touch Panel / 3G SIM
CARD READER
USB Ext. port 4 / E-SATA /USB CHARGER
CAMERA
Mini Card2 (WWAN)
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
5
4
3
2
1
D D
C C
B B
A
A
PEG_C_TXN3
PEG_C_TXN15
PEG_C_TXN10
PEG_C_TXN5
PEG_C_TXN0
PEG_C_TXN12
PEG_C_TXN7
PEG_C_TXN2
PEG_C_TXN14
PEG_C_TXN9
PEG_C_TXN4
PEG_C_TXN11
PEG_C_TXN6
PEG_C_TXN1
PEG_C_TXN13
PEG_C_TXN8
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXP5
PEG_RXN0
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_RXP15
PEG_RXN15
PEG_RXN14
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXN13
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXP6
PEG_RXN7
PEG_RXN6
PEG_IRCOMP_R
PEG_C_TXP3
PEG_C_TXP15
PEG_C_TXP10
PEG_C_TXP5
PEG_C_TXP0
PEG_C_TXP12
PEG_C_TXP7
PEG_C_TXP2
PEG_C_TXP14
PEG_C_TXP9
PEG_C_TXP4
PEG_C_TXP11
PEG_C_TXP6
PEG_C_TXP1
PEG_C_TXP13
PEG_C_TXP8
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
FDI_FSYNC0
FDI_LSYNC1
FDI_INT
FDI_LSYNC0
FDI_FSYNC1
DP_COMP
eDP_HPD
FDI_TXP4
FDI_TXP5
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXP6
FDI_TXP7
FDI_TXN0
FDI_TXN1
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXN2
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
1D05V_VTT
1D05V_VTT
PEG_TXP[0..15] 83
PEG_TXN[0..15] 83
PEG_RXP[0..15] 83
PEG_RXN[0..15] 83
DMI_RXN[3:0]19
DMI_RXP[3:0]19
DMI_TXN[3:0]19
DMI_TXP[3:0]19
FDI_TXN[7:0]19
FDI_TXP[7:0]19
FDI_FSYNC019
FDI_FSYNC119
FDI_INT19
FDI_LSYNC019
FDI_LSYNC119
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (PCIE/DMI/FDI)
A3
4102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (PCIE/DMI/FDI)
A3
4102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (PCIE/DMI/FDI)
A3
4102
Thursday, December 02, 2010
HR UMA
SSID = CPU
Stuff to disable internal graphics
function for power saving.
NOTE:
Select a Fast FET similar to 2N7002E whose rise/
fall time is less than 6 ns. If HPD on eDP interface is
disabled, connect it to CPU VCCIO via a 10-kȍ pull-Up
resistor on the motherboard.
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
PEG Static Lane Reversal
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Lane reversal does not apply to
FDI sideband signals.
Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
20100614 V1.1
JE40 delete eDP function
C424 Do Not Stuff
DIS_PX_Muxless
C424 Do Not Stuff
DIS_PX_Muxless
1 2
C405 Do Not Stuff
DIS_PX_Muxless
C405 Do Not Stuff
DIS_PX_Muxless
1 2
C427 Do Not Stuff
DIS_PX_Muxless
C427 Do Not Stuff
DIS_PX_Muxless
1 2
C402 Do Not Stuff
DIS_PX_Muxless
C402 Do Not Stuff
DIS_PX_Muxless
1 2
C430 Do Not Stuff
DIS_PX_Muxless
C430 Do Not Stuff
DIS_PX_Muxless
1 2
R402 24D9R2F-L-GPR402 24D9R2F-L-GP
1 2
C401 Do Not Stuff
DIS_PX_Muxless
C401 Do Not Stuff
DIS_PX_Muxless
1 2
R403 10KR2J-3-GPR403 10KR2J-3-GP
1 2
R401
24D9R2F-L-GP
R401
24D9R2F-L-GP
1 2
RN401
Do Not Stuff
DIS
RN401
Do Not Stuff
DIS
1
2
3
4 5
6
7
8
C414 Do Not Stuff
DIS_PX_Muxless
C414 Do Not Stuff
DIS_PX_Muxless
1 2
C418 Do Not Stuff
DIS_PX_Muxless
C418 Do Not Stuff
DIS_PX_Muxless
1 2
R404
Do Not Stuff
DIS
R404
Do Not Stuff
DIS
12
C419 Do Not Stuff
DIS_PX_Muxless
C419 Do Not Stuff
DIS_PX_Muxless
1 2
C410 Do Not Stuff
DIS_PX_Muxless
C410 Do Not Stuff
DIS_PX_Muxless
1 2
C422 Do Not Stuff
DIS_PX_Muxless
C422 Do Not Stuff
DIS_PX_Muxless
1 2
C407 Do Not Stuff
DIS_PX_Muxless
C407 Do Not Stuff
DIS_PX_Muxless
1 2
C404 Do Not Stuff
DIS_PX_Muxless
C404 Do Not Stuff
DIS_PX_Muxless
1 2
C425 Do Not Stuff
DIS_PX_Muxless
C425 Do Not Stuff
DIS_PX_Muxless
1 2
C428 Do Not Stuff
DIS_PX_Muxless
C428 Do Not Stuff
DIS_PX_Muxless
1 2
C431 Do Not Stuff
DIS_PX_Muxless
C431 Do Not Stuff
DIS_PX_Muxless
1 2
C416 Do Not Stuff
DIS_PX_Muxless
C416 Do Not Stuff
DIS_PX_Muxless
1 2
C413 Do Not Stuff
DIS_PX_Muxless
C413 Do Not Stuff
DIS_PX_Muxless
1 2
C412 Do Not Stuff
DIS_PX_Muxless
C412 Do Not Stuff
DIS_PX_Muxless
1 2
C420 Do Not Stuff
DIS_PX_Muxless
C420 Do Not Stuff
DIS_PX_Muxless
1 2
C409 Do Not Stuff
DIS_PX_Muxless
C409 Do Not Stuff
DIS_PX_Muxless
1 2
C423 Do Not Stuff
DIS_PX_Muxless
C423 Do Not Stuff
DIS_PX_Muxless
1 2
C406 Do Not Stuff
DIS_PX_Muxless
C406 Do Not Stuff
DIS_PX_Muxless
1 2
C426 Do Not Stuff
DIS_PX_Muxless
C426 Do Not Stuff
DIS_PX_Muxless
1 2
C403 Do Not Stuff
DIS_PX_Muxless
C403 Do Not Stuff
DIS_PX_Muxless
1 2
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
62.10055.421
Change:62.10053.611
2nd = 62.10055.321
3rd = 62.10040.821
PCI EXPRESS* - GRAPHICS
DMI
Intel(R) FDI
eDP
1 OF 9
SANDY
CPU1A
SANDY
62.10055.421
Change:62.10053.611
2nd = 62.10055.321
3rd = 62.10040.821
DMI_RX#0
B27
DMI_RX#1
B25
DMI_RX#2
A25
DMI_RX#3
B24
DMI_RX0
B28
DMI_RX1
B26
DMI_RX2
A24
DMI_RX3
B23
DMI_TX#0
G21
DMI_TX#1
E22
DMI_TX#2
F21
DMI_TX#3
D21
DMI_TX0
G22
DMI_TX1
D22
DMI_TX3
C21
DMI_TX2
F20
FDI0_TX#0
A21
FDI0_TX#1
H19
FDI0_TX#2
E19
FDI0_TX#3
F18
FDI1_TX#0
B21
FDI1_TX#1
C20
FDI1_TX#2
D18
FDI1_TX#3
E17
FDI0_TX0
A22
FDI0_TX1
G19
FDI0_TX2
E20
FDI0_TX3
G18
FDI1_TX0
B20
FDI1_TX1
C19
FDI1_TX2
D19
FDI1_TX3
F17
FDI0_FSYNC
J18
FDI1_FSYNC
J17
FDI_INT
H20
FDI0_LSYNC
J19
FDI1_LSYNC
H17
PEG_ICOMPI
J22
PEG_ICOMPO
J21
PEG_RCOMPO
H22
PEG_RX#0
K33
PEG_RX#1
M35
PEG_RX#2
L34
PEG_RX#3
J35
PEG_RX#4
J32
PEG_RX#5
H34
PEG_RX#6
H31
PEG_RX#7
G33
PEG_RX#8
G30
PEG_RX#9
F35
PEG_RX#10
E34
PEG_RX#11
E32
PEG_RX#12
D33
PEG_RX#13
D31
PEG_RX#14
B33
PEG_RX#15
C32
PEG_RX0
J33
PEG_RX1
L35
PEG_RX2
K34
PEG_RX3
H35
PEG_RX4
H32
PEG_RX5
G34
PEG_RX6
G31
PEG_RX7
F33
PEG_RX8
F30
PEG_RX9
E35
PEG_RX10
E33
PEG_RX11
F32
PEG_RX12
D34
PEG_RX13
E31
PEG_RX14
C33
PEG_RX15
B32
PEG_TX#0
M29
PEG_TX#1
M32
PEG_TX#2
M31
PEG_TX#3
L32
PEG_TX#4
L29
PEG_TX#5
K31
PEG_TX#6
K28
PEG_TX#7
J30
PEG_TX#8
J28
PEG_TX#9
H29
PEG_TX#10
G27
PEG_TX#11
E29
PEG_TX#12
F27
PEG_TX#13
D28
PEG_TX#14
F26
PEG_TX#15
E25
PEG_TX0
M28
PEG_TX1
M33
PEG_TX2
M30
PEG_TX3
L31
PEG_TX4
L28
PEG_TX5
K30
PEG_TX6
K27
PEG_TX7
J29
PEG_TX8
J27
PEG_TX9
H28
PEG_TX10
G28
PEG_TX11
E28
PEG_TX12
F28
PEG_TX13
D27
PEG_TX14
E26
PEG_TX15
D25
EDP_AUX
C15
EDP_AUX#
D15
EDP_TX0
C17
EDP_TX1
F16
EDP_TX2
C16
EDP_TX3
G15
EDP_TX#0
C18
EDP_TX#1
E16
EDP_TX#2
D16
EDP_TX#3
F15
EDP_COMPIO
A18
EDP_HPD
B16
EDP_ICOMPO
A17
C429 Do Not Stuff
DIS_PX_Muxless
C429 Do Not Stuff
DIS_PX_Muxless
1 2
C432 Do Not Stuff
DIS_PX_Muxless
C432 Do Not Stuff
DIS_PX_Muxless
1 2
C415 Do Not Stuff
DIS_PX_Muxless
C415 Do Not Stuff
DIS_PX_Muxless
1 2
C417 Do Not Stuff
DIS_PX_Muxless
C417 Do Not Stuff
DIS_PX_Muxless
1 2
C411 Do Not Stuff
DIS_PX_Muxless
C411 Do Not Stuff
DIS_PX_Muxless
1 2
C421 Do Not Stuff
DIS_PX_Muxless
C421 Do Not Stuff
DIS_PX_Muxless
1 2
C408 Do Not Stuff
DIS_PX_Muxless
C408 Do Not Stuff
DIS_PX_Muxless
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A
A
XDP_TRST#
XDP_DBRESET#
XDP_TDO
CLK_DP_P_R
CLK_DP_N_R
BUF_CPU_RST#
H_PROCHOT#
H_PROCHOT#_R SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_DBRESET#
BUF_CPU_RST#
XDP_TRST#
XDP_TDO
1D05V_VTT
1D05V_VTT
3D3V_S0
1D05V_VTT
H_SNB_IVB#18
H_PM_SYNC19
PM_DRAM_PWRGD19,37
H_PECI22,27
H_CPUPWRGD22,36,97
H_THERMTRIP#22,36
H_PROCHOT#27,42
VDDPWRGOOD37
CLK_EXP_P 20
CLK_EXP_N 20
SM_DRAMRST# 37
PLT_RST#18,27,31,36,65,66,71,82,97
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (THERMAL/CLOCK/PM )
Custom
5102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (THERMAL/CLOCK/PM )
Custom
5102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (THERMAL/CLOCK/PM )
Custom
5102
Thursday, December 02, 2010
HR UMA
SSID = CPU
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
CRB : 47pf
CEKLT:43pf
Connect EC to PROCHOT# through inverting OD buffer.
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
R506 140R2F-GPR506 140R2F-GP
1 2
R507 25D5R2F-GPR507 25D5R2F-GP
1 2
R508 200R2F-L-GPR508 200R2F-L-GP
1 2
R501
62R2J-GP
R501
62R2J-GP
1 2
R503
10KR2J-3-GP
R503
10KR2J-3-GP
1 2
R502
4K99R2F-L-GP
R502
4K99R2F-L-GP
1 2
RN503
SRN1K5J-1-GP
RN503
SRN1K5J-1-GP
1
2
3
4 5
6
7
8
RN501
SRN51J-GP
RN501
SRN51J-GP
1
2 3
4
C502
SC47P50V2JN-3GP
C502
SC47P50V2JN-3GP
12
R505
Do Not Stuff
DY
R505
Do Not Stuff
DY
1 2
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
CLOCKS
MISCTHERMALPWR MANAGEMENT
DDR3
MISC
JTAG & BPM
2 OF 9
SANDY
CPU1B
SANDY
SM_RCOMP1
A5
SM_RCOMP2
A4
SM_DRAMRST#
R8
SM_RCOMP0
AK1
BCLK#
A27
BCLK
A28
DPLL_REF_SSCLK#
A15
DPLL_REF_SSCLK
A16
CATERR#
AL33
PECI
AN33
PROCHOT#
AL32
THERMTRIP#
AN32
SM_DRAMPWROK
V8
RESET#
AR33
PRDY#
AP29
PREQ#
AP27
TCK
AR26
TMS
AR27
TRST#
AP30
TDI
AR28
TDO
AP26
DBR#
AL35
BPM#0
AT28
BPM#1
AR29
BPM#2
AR30
BPM#3
AT30
BPM#4
AP32
BPM#5
AR31
BPM#6
AT31
BPM#7
AR32
PM_SYNC
AM34
SKTOCC#
AN34
SNB_IVB#
C26
UNCOREPWRGOOD
AP33
RN502
Do Not Stuff
DIS
RN502
Do Not Stuff
DIS
1
2 3
4
R513
56R2J-4-GP
R513
56R2J-4-GP
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_DQ44
M_A_DQ36
M_A_DQ47
M_A_DQ40
M_A_DQ39
M_A_DQ37
M_A_DQ35
M_A_DQ34
M_A_DQ59
M_A_DQ54
M_A_DQ53
M_A_DQ63
M_A_DQ60
M_A_DQ61
M_A_DQ58
M_A_DQ51
M_A_DQ48
M_A_DQ57
M_A_DQ55
M_A_DQ49
M_A_DQ50
M_A_DQ62
M_A_DQ52
M_A_DQ56
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ7
M_A_DQ5
M_A_DQ4
M_A_DQ6
M_A_DQ12
M_A_DQ10
M_A_DQ13
M_A_DQ9
M_A_DQ8
M_A_DQ11
M_A_DQ15
M_A_DQ14
M_A_DQ27
M_A_DQ25
M_A_DQ20
M_A_DQ19
M_A_DQ30
M_A_DQ18
M_A_DQ16
M_A_DQ28
M_A_DQ17
M_A_DQ26
M_A_DQ31
M_A_DQ29
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ21
M_A_DQ46
M_A_DQ42
M_A_DQ38
M_A_DQ32
M_A_DQ45
M_A_DQ33
M_A_DQ43
M_A_DQ41
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ15
M_B_DQ13
M_B_DQ12
M_B_DQ14
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ22
M_B_DQ28
M_B_DQ26
M_B_DQ29
M_B_DQ25
M_B_DQ31
M_B_DQ24
M_B_DQ27
M_B_DQ30
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ39
M_B_DQ37
M_B_DQ36
M_B_DQ38
M_B_DQ44
M_B_DQ42
M_B_DQ45
M_B_DQ41
M_B_DQ47
M_B_DQ40
M_B_DQ43
M_B_DQ46
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ55
M_B_DQ53
M_B_DQ52
M_B_DQ54
M_B_DQ60
M_B_DQ58
M_B_DQ61
M_B_DQ57
M_B_DQ63
M_B_DQ56
M_B_DQ59
M_B_DQ62
M_A_DQS4
M_A_DQS3
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_A7
M_A_A12
M_A_A14
M_A_A13
M_A_A9
M_A_A15
M_A_A10
M_A_A0
M_A_A6
M_A_A8
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A11
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
M_A_DQ[63:0]14 M_B_DQ[63:0]15
M_A_BS014
M_A_BS114
M_A_BS214
M_A_CAS#14
M_A_RAS#14
M_A_WE#14
M_B_BS015
M_B_BS115
M_B_BS215
M_B_CAS#15
M_B_RAS#15
M_B_WE#15
M_A_DQS#[7:0] 14
M_A_A[15:0] 14
M_A_DQS[7:0] 14
M_A_DIM0_CKE0 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_B_A[15:0] 15
M_B_DQS[7:0] 15
M_B_DQS#[7:0] 15
M_B_DIM0_CKE0 15
M_B_DIM0_CKE1 15
M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15
M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15
M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (DDR)
A3
6 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (DDR)
A3
6 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (DDR)
A3
6 102
Thursday, December 02, 2010
HR UMA
SSID = CPU
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
DDR SYSTEM MEMORY B
4 OF 9
SANDY
CPU1D
SANDY
SB_BS0
AA9
SB_BS1
AA7
SB_BS2
R6
SB_CAS#
AA10
SB_RAS#
AB8
SB_WE#
AB9
SB_CLK0
AE2
SB_CLK1
AE1
SB_CLK#0
AD2
SB_CLK#1
AD1
SB_CKE0
R9
SB_CKE1
R10
SB_ODT0
AE4
SB_ODT1
AD4
SB_DQS4
AN6
SB_DQS#4
AN5
SB_DQS5
AP8
SB_DQS#5
AP9
SB_DQS6
AK11
SB_DQS#6
AK12
SB_DQS7
AP14
SB_DQS#7
AP15
SB_DQS0
C7
SB_DQS#0
D7
SB_DQS1
G3
SB_DQS#1
F3
SB_DQS2
J6
SB_DQS#2
K6
SB_DQS3
M3
SB_DQS#3
N3
SB_MA0
AA8
SB_MA1
T7
SB_MA2
R7
SB_MA3
T6
SB_MA4
T2
SB_MA5
T4
SB_MA6
T3
SB_MA7
R2
SB_MA8
T5
SB_MA9
R3
SB_MA10
AB7
SB_MA11
R1
SB_MA12
T1
SB_MA13
AB10
SB_MA14
R5
SB_MA15
R4
SB_DQ0
C9
SB_DQ1
A7
SB_DQ2
D10
SB_DQ3
C8
SB_DQ4
A9
SB_DQ5
A8
SB_DQ6
D9
SB_DQ7
D8
SB_DQ8
G4
SB_DQ9
F4
SB_DQ10
F1
SB_DQ11
G1
SB_DQ12
G5
SB_DQ13
F5
SB_DQ14
F2
SB_DQ15
G2
SB_DQ16
J7
SB_DQ17
J8
SB_DQ18
K10
SB_DQ19
K9
SB_DQ20
J9
SB_DQ21
J10
SB_DQ22
K8
SB_DQ23
K7
SB_DQ24
M5
SB_DQ25
N4
SB_DQ26
N2
SB_DQ27
N1
SB_DQ28
M4
SB_DQ29
N5
SB_DQ30
M2
SB_DQ31
M1
SB_DQ32
AM5
SB_DQ33
AM6
SB_DQ34
AR3
SB_DQ35
AP3
SB_DQ36
AN3
SB_DQ37
AN2
SB_DQ38
AN1
SB_DQ39
AP2
SB_DQ40
AP5
SB_DQ41
AN9
SB_DQ42
AT5
SB_DQ43
AT6
SB_DQ44
AP6
SB_DQ45
AN8
SB_DQ46
AR6
SB_DQ47
AR5
SB_DQ48
AR9
SB_DQ49
AJ11
SB_DQ50
AT8
SB_DQ51
AT9
SB_DQ52
AH11
SB_DQ53
AR8
SB_DQ54
AJ12
SB_DQ55
AH12
SB_DQ56
AT11
SB_DQ57
AN14
SB_DQ58
AR14
SB_DQ59
AT14
SB_DQ60
AT12
SB_DQ61
AN15
SB_DQ62
AR15
SB_DQ63
AT15
SB_CLK2
AB2
SB_CLK#2
AA2
SB_CKE2
T9
SB_CLK3
AA1
SB_CLK#3
AB1
SB_CKE3
T10
SB_CS#0
AD3
SB_CS#1
AE3
SB_CS#2
AD6
SB_CS#3
AE6
SB_ODT2
AD5
SB_ODT3
AE5
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
DDR SYSTEM MEMORY A
3 OF 9
SANDY
CPU1C
SANDY
SA_BS0
AE10
SA_BS1
AF10
SA_BS2
V6
SA_CAS#
AE8
SA_RAS#
AD9
SA_WE#
AF9
SA_CLK0
AB6
SA_CLK1
AA5
SA_CLK#0
AA6
SA_CLK#1
AB5
SA_CKE0
V9
SA_CKE1
V10
SA_CS#0
AK3
SA_CS#1
AL3
SA_ODT0
AH3
SA_ODT1
AG3
SA_DQS0
D4
SA_DQS#0
C4
SA_DQS1
F6
SA_DQS#1
G6
SA_DQS2
K3
SA_DQS#2
J3
SA_DQS3
N6
SA_DQS#3
M6
SA_DQS4
AL5
SA_DQS#4
AL6
SA_DQS5
AM9
SA_DQS#5
AM8
SA_DQS6
AR11
SA_DQS#6
AR12
SA_DQS7
AM14
SA_DQS#7
AM15
SA_MA0
AD10
SA_MA1
W1
SA_MA2
W2
SA_MA3
W7
SA_MA4
V3
SA_MA5
V2
SA_MA6
W3
SA_MA7
W6
SA_MA8
V1
SA_MA9
W5
SA_MA10
AD8
SA_MA11
V4
SA_MA12
W4
SA_MA13
AF8
SA_MA14
V5
SA_MA15
V7
SA_DQ0
C5
SA_DQ1
D5
SA_DQ2
D3
SA_DQ3
D2
SA_DQ4
D6
SA_DQ5
C6
SA_DQ6
C2
SA_DQ7
C3
SA_DQ8
F10
SA_DQ9
F8
SA_DQ10
G10
SA_DQ11
G9
SA_DQ12
F9
SA_DQ13
F7
SA_DQ14
G8
SA_DQ15
G7
SA_DQ16
K4
SA_DQ17
K5
SA_DQ18
K1
SA_DQ19
J1
SA_DQ20
J5
SA_DQ21
J4
SA_DQ22
J2
SA_DQ23
K2
SA_DQ24
M8
SA_DQ25
N10
SA_DQ26
N8
SA_DQ27
N7
SA_DQ28
M10
SA_DQ29
M9
SA_DQ30
N9
SA_DQ31
M7
SA_DQ32
AG6
SA_DQ33
AG5
SA_DQ34
AK6
SA_DQ35
AK5
SA_DQ36
AH5
SA_DQ37
AH6
SA_DQ38
AJ5
SA_DQ39
AJ6
SA_DQ40
AJ8
SA_DQ41
AK8
SA_DQ42
AJ9
SA_DQ43
AK9
SA_DQ44
AH8
SA_DQ45
AH9
SA_DQ46
AL9
SA_DQ47
AL8
SA_DQ48
AP11
SA_DQ49
AN11
SA_DQ50
AL12
SA_DQ51
AM12
SA_DQ52
AM11
SA_DQ53
AL11
SA_DQ54
AP12
SA_DQ55
AN12
SA_DQ56
AJ14
SA_DQ57
AH14
SA_DQ58
AL15
SA_DQ59
AK15
SA_DQ60
AL14
SA_DQ61
AK14
SA_DQ62
AJ15
SA_DQ63
AH15
SA_CLK2
AB4
SA_CLK#2
AA4
SA_CLK3
AB3
SA_CLK#3
AA3
SA_CKE2
W9
SA_CKE3
W10
SA_CS#2
AG1
SA_CS#3
AH1
SA_ODT2
AG2
SA_ODT3
AH2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CFG2
M_VREF_DQ_DIMM0_C
M_VREF_DQ_DIMM1_C
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (RESERVED)
A3
7 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (RESERVED)
A3
7 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (RESERVED)
A3
7 102
Thursday, December 02, 2010
HR UMA
SSID = CPU
B4:VREF_DQ CHA
D1:VREF_DQ CHB
0:Lane Reversed
1: Normal Operation; Lane #
definition matches socket pin map definition
PEG Static Lane Reversal
CFG2
RN701
SRN1KJ-7-GP
RN701
SRN1KJ-7-GP
1
2 3
4
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
RESERVED
5 OF 9
SANDY
CPU1E
SANDY
CFG0
AK28
CFG1
AK29
CFG2
AL26
CFG3
AL27
CFG4
AK26
CFG5
AL29
CFG6
AL30
CFG7
AM31
CFG8
AM32
CFG9
AM30
CFG10
AM28
CFG11
AM26
CFG12
AN28
CFG13
AN31
CFG14
AN26
CFG15
AM27
CFG16
AK31
CFG17
AN29
RSVD#AM33
AM33
RSVD#AJ27
AJ27
RSVD#J16
J16
RSVD#AT34
AT34
RSVD#H16
H16
RSVD#G16
G16
RSVD#AR35
AR35
RSVD#AT33
AT33
RSVD#AR34
AR34
RSVD#AT2
AT2
RSVD#AT1
AT1
RSVD#AR1
AR1
RSVD#B34
B34
RSVD#A33
A33
RSVD#A34
A34
RSVD#B35
B35
RSVD#C35
C35
RSVD#AJ32
AJ32
RSVD#AK32
AK32
RSVD#AE7
AE7
RSVD#AK2
AK2
RSVD#L7
L7
RSVD#AG7
AG7
RSVD#J15
J15
RSVD#C30
C30
RSVD#D23
D23
RSVD#A31
A31
RSVD#B30
B30
RSVD#D30
D30
RSVD#B29
B29
RSVD#A30
A30
RSVD#B31
B31
RSVD#C29
C29
RSVD#J20
J20
RSVD#T8
T8
RSVD#B4
B4
RSVD#D1
D1
RSVD#F25
F25
RSVD#F24
F24
RSVD#D24
D24
RSVD#G25
G25
RSVD#G24
G24
RSVD#E23
E23
RSVD#W8
W8
RSVD#AT26
AT26
RSVD#B18
B18
RSVD#AP35
AP35
RSVD#F23
F23
RSVD#AJ26
AJ26
RSVD#AJ31
AJ31
RSVD#AH31
AH31
RSVD#AJ33
AJ33
RSVD#AH33
AH33
RSVD#AH27
AH27
RSVD#A19
A19
RSVD#AN35
AN35
RSVD#AM35
AM35
R702
Do Not Stuff
DIS_PX_Muxless
R702
Do Not Stuff
DIS_PX_Muxless
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_CPU_SVIDALRT#
H_CPU_SVIDDAT
VCC_CORE
VCC_CORE
1D05V_VTT
1D05V_VTT
VCC_CORE
1D05V_VTT
VCCIO_SENSE 45
H_CPU_SVIDDAT 42
VR_SVID_ALERT# 42
H_CPU_SVIDCLK 42
VCCSENSE 42
VSSSENSE 42
VSSIO_SENSE 45
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
CPU (VCC_CORE)
Custom
8 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
CPU (VCC_CORE)
Custom
8 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
CPU (VCC_CORE)
Custom
8 102
Thursday, December 02, 2010
HR UMA
No-stuff sites outside the socket may be removed.
No-stuff sites inside the socket cavity need to remain.
VCC Output Decoupling Recommendation:
4 x 470 uF at Bottom Socket Edge
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
7 x 22 uF & 2 x 0805 no-stuff at Top
R801,R802 close to CPU
SSID = CPU
For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
For CRB VIDALERT# need to pull high 75 ohm close to CPU
53A
PROCESSOR CORE POWER
C819
Do Not Stuff
DY
C819
Do Not Stuff
DY
12
C834
SC10U6D3V5KX-1GP
C834
SC10U6D3V5KX-1GP
12
C821
Do Not Stuff
DY
C821
Do Not Stuff
DY
12
C838
SC10U6D3V5KX-1GP
C838
SC10U6D3V5KX-1GP
12
C831
Do Not Stuff
DY
C831
Do Not Stuff
DY
12
C836
SC10U6D3V5KX-1GP
C836
SC10U6D3V5KX-1GP
12
C802
Do Not Stuff
DY
C802
Do Not Stuff
DY
12
R802
100R2F-L1-GP-U
R802
100R2F-L1-GP-U
12
C820
Do Not Stuff
DY
C820
Do Not Stuff
DY
12
C833
SC10U6D3V5KX-1GP
C833
SC10U6D3V5KX-1GP
12
C826
SC10U6D3V5KX-1GP
C826
SC10U6D3V5KX-1GP
12
C829
SC10U6D3V5KX-1GP
C829
SC10U6D3V5KX-1GP
12
C841
SC10U6D3V5KX-1GP
C841
SC10U6D3V5KX-1GP
12
C803
Do Not Stuff
DY
C803
Do Not Stuff
DY
12
C840
SC10U6D3V5KX-1GP
C840
SC10U6D3V5KX-1GP
12
C828
SC10U6D3V5KX-1GP
C828
SC10U6D3V5KX-1GP
12
C839
SC10U6D3V5KX-1GP
C839
SC10U6D3V5KX-1GP
12
C812
SC10U6D3V5KX-1GP
C812
SC10U6D3V5KX-1GP
12
C823
SC10U6D3V5KX-1GP
C823
SC10U6D3V5KX-1GP
12
C804
Do Not Stuff
DY
C804
Do Not Stuff
DY
12
C844
SC10U6D3V5KX-1GP
C844
SC10U6D3V5KX-1GP
12
C825
SC10U6D3V5KX-1GP
C825
SC10U6D3V5KX-1GP
12
C807
SC10U6D3V5KX-1GP
C807
SC10U6D3V5KX-1GP
12
C816
SC10U6D3V5KX-1GP
C816
SC10U6D3V5KX-1GP
12
C830
SC10U6D3V5KX-1GP
C830
SC10U6D3V5KX-1GP
12
C810
SC10U6D3V5KX-1GP
C810
SC10U6D3V5KX-1GP
12
C811
Do Not Stuff
DY
C811
Do Not Stuff
DY
12
C822
SC10U6D3V5KX-1GP
C822
SC10U6D3V5KX-1GP
12
C813
SC10U6D3V5KX-1GP
C813
SC10U6D3V5KX-1GP
12
C805
SC10U6D3V5KX-1GP
C805
SC10U6D3V5KX-1GP
12
C835
SC10U6D3V5KX-1GP
C835
SC10U6D3V5KX-1GP
12
C845
SC10U6D3V5KX-1GP
C845
SC10U6D3V5KX-1GP
12
C815
Do Not Stuff
DY
C815
Do Not Stuff
DY
12
C843
Do Not Stuff
C843
Do Not Stuff
12
R804 130R2F-1-GPR804 130R2F-1-GP
1 2
R801
100R2F-L1-GP-U
R801
100R2F-L1-GP-U
12
C842
Do Not Stuff
DY
C842
Do Not Stuff
DY
12
C817
Do Not Stuff
DY
C817
Do Not Stuff
DY
12
C832
Do Not Stuff
DY
C832
Do Not Stuff
DY
12
C801
Do Not Stuff
DY
C801
Do Not Stuff
DY
12
C806
SC10U6D3V5KX-1GP
C806
SC10U6D3V5KX-1GP
12
C814
SC10U6D3V5KX-1GP
C814
SC10U6D3V5KX-1GP
12
C809
SC10U6D3V5KX-1GP
C809
SC10U6D3V5KX-1GP
12
C827
SC10U6D3V5KX-1GP
C827
SC10U6D3V5KX-1GP
12
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
POWER
CORE SUPPLY
PEG AND DDR
SENSE LINES SVID
6 OF 9
SANDY
CPU1F
SANDY
VCC_SENSE
AJ35
VSS_SENSE
AJ34
VIDALERT#
AJ29
VIDSCLK
AJ30
VIDSOUT
AJ28
VSSIO_SENSE
A10
VCC
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCCIO
AH13
VCCIO
J11
VCCIO
G12
VCCIO
F14
VCCIO
F13
VCCIO
F12
VCCIO
F11
VCCIO
E14
VCCIO
E12
VCCIO
AH10
VCCIO
AG10
VCCIO
AC10
VCCIO
Y10
VCCIO
U10
VCCIO
P10
VCCIO
L10
VCCIO
J14
VCCIO
J13
VCCIO
J12
VCCIO
H14
VCCIO
H12
VCCIO
H11
VCCIO
G14
VCCIO
G13
VCCIO
E11
VCCIO
C12
VCCIO
C11
VCCIO
B14
VCCIO
B12
VCCIO
A14
VCCIO
A13
VCCIO
A12
VCCIO
A11
VCCIO
D14
VCCIO
D13
VCCIO
D12
VCCIO
D11
VCCIO
C14
VCCIO
C13
VCCIO_SENSE
B10
VCCIO
J23
C837
SC10U6D3V5KX-1GP
C837
SC10U6D3V5KX-1GP
12
C818
Do Not Stuff
DY
C818
Do Not Stuff
DY
12
R803
43R2J-GP
R803
43R2J-GP
1 2
C824
SC10U6D3V5KX-1GP
C824
SC10U6D3V5KX-1GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSS_AXG_SENSE
VCC_AXG_SENSE
H_FC_C22
VCCUSA_SENSE
VCC_GFXCORE
VCC_GFXCORE
1D8V_S0
VCC_GFXCORE
1D5V_S0
0D85V_S0
0D85V_S0
VCC_AXG_SENSE 42
VSS_AXG_SENSE 42
+V_SM_VREF_CNT 37
VCCSA_SEL 48
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VCC_GFXCORE)
A3
9 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VCC_GFXCORE)
A3
9 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VCC_GFXCORE)
A3
9 102
Thursday, December 02, 2010
HR UMA
SSID = CPU
VAXG Output Decoupling Recommendation:
2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge
PROCESSOR VAXG: 24A
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
Disabling Guidelines for External Graphics Designs:
Can connect to GND if motherboard only supports external
graphics and if GFX VR is not stuffed.
Can be left floating (Gfx VR keeps VAXG rail from floating)
if the VR is stuffed
PROCESSOR VCCPLL: 1.2A
Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.
+V_SM_VREF_CNT should have 10 mil trace width
R906,R907 close to CPU
PROCESSOR VCCSA: 6A
VDDQ Output Decoupling Recommendation:
1 x 330 uF
6 x 10 uF
PROCESSOR VDDQ: 10A
VCCSA Output Decoupling Recommendation:
1 x 330 uF
2 x 10 uF at Bottom Socket Cavity
1 x 10 uF at Bottom Socket Edge
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
R902 need be close to pin H23.
C914
Do Not Stuff
DY
C914
Do Not Stuff
DY
12
C915
SC10U6D3V5KX-1GP
C915
SC10U6D3V5KX-1GP
12
C918
Do Not Stuff
DY
C918
Do Not Stuff
DY
12
C916
Do Not Stuff
DY
C916
Do Not Stuff
DY
12
C901
Do Not Stuff
DY
C901
Do Not Stuff
DY
12
C905
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C905
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
C921
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C921
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
C902
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C902
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
C912
SC10U6D3V5KX-1GP
C912
SC10U6D3V5KX-1GP
12
C920
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C920
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
C922
SC1U10V2KX-1GP
C922
SC1U10V2KX-1GP
12
C909
Do Not Stuff
DY
C909
Do Not Stuff
DY
12
C907
Do Not Stuff
DY
C907
Do Not Stuff
DY
12
R906
100R2F-L1-GP-U
R906
100R2F-L1-GP-U
12
R902
10R2J-2-GP
R902
10R2J-2-GP
12
C919
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C919
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
R907
100R2F-L1-GP-U
R907
100R2F-L1-GP-U
12
C908
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C908
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
R901
Do Not Stuff
DIS
R901
Do Not Stuff
DIS
1 2
C906
Do Not Stuff
DY
C906
Do Not Stuff
DY
12
C911
SC10U6D3V5KX-1GP
C911
SC10U6D3V5KX-1GP
12
C903
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C903
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
C904
SC10U6D3V5KX-1GP
UMA_PX_Muxless
C904
SC10U6D3V5KX-1GP
UMA_PX_Muxless
12
R904
Do Not Stuff
DIS
R904
Do Not Stuff
DIS
1 2
RN901
SRN1KJ-7-GP
RN901
SRN1KJ-7-GP
1
23
4
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
POWER
GRAPHICS
DDR3 -1.5V RAILS
SENSE
LINES
1.8V RAIL
SA RAIL
VREFMISC
7 OF 9
SANDY
CPU1G
SANDY
SM_VREF
AL1
VSSAXG_SENSE
AK34
VAXG_SENSE
AK35
VAXG
AT24
VAXG
AT23
VAXG
AT21
VAXG
AT20
VAXG
AT18
VAXG
AT17
VAXG
AR24
VAXG
AR23
VAXG
AR21
VAXG
AR20
VAXG
AR18
VAXG
AR17
VAXG
AP24
VAXG
AP23
VAXG
AP21
VAXG
AP20
VAXG
AP18
VAXG
AP17
VAXG
AN24
VAXG
AN23
VAXG
AN21
VAXG
AN20
VAXG
AN18
VAXG
AN17
VAXG
AM24
VAXG
AM23
VAXG
AM21
VAXG
AM20
VAXG
AM18
VAXG
AM17
VAXG
AL24
VAXG
AL23
VAXG
AL21
VAXG
AL20
VAXG
AL18
VAXG
AL17
VAXG
AK24
VAXG
AK23
VAXG
AK21
VAXG
AK20
VAXG
AK18
VAXG
AK17
VAXG
AJ24
VAXG
AJ23
VAXG
AJ21
VAXG
AJ20
VAXG
AJ18
VAXG
AJ17
VAXG
AH24
VAXG
AH23
VAXG
AH21
VAXG
AH20
VAXG
AH18
VAXG
AH17
VDDQ
U4
VDDQ
U1
VDDQ
P7
VDDQ
P4
VDDQ
P1
VDDQ
AF7
VDDQ
AF4
VDDQ
AF1
VDDQ
AC7
VDDQ
AC4
VDDQ
AC1
VDDQ
Y7
VDDQ
Y4
VDDQ
Y1
VDDQ
U7
VCCPLL
B6
VCCPLL
A6
VCCSA
M27
VCCSA
M26
VCCSA
L26
VCCSA
J26
VCCSA
J25
VCCSA
J24
VCCSA
H26
VCCSA
H25
VCCSA_SENSE
H23
VCCSA_VID1
C24
VCCPLL
A2
FC_C22
C22
TP901 Do Not StuffTP901 Do Not Stuff
1
C910
SC10U6D3V5KX-1GP
C910
SC10U6D3V5KX-1GP
12
R903
Do Not Stuff
DIS
R903
Do Not Stuff
DIS
1 2
C913
SC10U6D3V5KX-1GP
C913
SC10U6D3V5KX-1GP
12
R905
Do Not Stuff
DIS
R905
Do Not Stuff
DIS
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VSS)
A3
10 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VSS)
A3
10 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
CPU (VSS)
A3
10 102
Thursday, December 02, 2010
HR UMA
SSID = CPU
VSS
8 OF 9
SANDY
CPU1H
SANDY
VSS
8 OF 9
SANDY
CPU1H
SANDY
VSS
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
AT19
VSS
AT16
VSS
AT13
VSS
AT10
VSS
AT7
VSS
AT4
VSS
AT3
VSS
AR25
VSS
AR22
VSS
AR19
VSS
AR16
VSS
AR13
VSS
AR10
VSS
AR7
VSS
AR4
VSS
AR2
VSS
AP34
VSS
AP31
VSS
AP28
VSS
AP25
VSS
AP22
VSS
AP19
VSS
AP16
VSS
AP13
VSS
AP10
VSS
AP7
VSS
AP4
VSS
AP1
VSS
AN30
VSS
AN27
VSS
AN25
VSS
AN22
VSS
AN19
VSS
AN16
VSS
AN13
VSS
AN10
VSS
AN7
VSS
AN4
VSS
AM29
VSS
AM25
VSS
AM22
VSS
AM19
VSS
AM16
VSS
AM13
VSS
AM10
VSS
AM7
VSS
AM4
VSS
AM3
VSS
AM2
VSS
AM1
VSS
AL34
VSS
AL31
VSS
AL28
VSS
AL25
VSS
AL22
VSS
AL19
VSS
AL16
VSS
AL13
VSS
AL10
VSS
AL7
VSS
AL4
VSS
AL2
VSS
AK33
VSS
AK30
VSS
AK27
VSS
AK25
VSS
AK22
VSS
AK19
VSS
AK16
VSS
AK13
VSS
AK10
VSS
AK7
VSS
AK4
VSS
AJ25
VSS
AJ22
VSS
AJ19
VSS
AJ16
VSS
AJ13
VSS
AJ10
VSS
AJ7
VSS
AJ4
VSS
AJ3
VSS
AJ2
VSS
AJ1
VSS
AH35
VSS
AH34
VSS
AH32
VSS
AH30
VSS
AH29
VSS
AH28
VSS
AH26
VSS
AH25
VSS
AH22
VSS
AH19
VSS
AH16
VSS
AH7
VSS
AH4
VSS
AG9
VSS
AG8
VSS
AG4
VSS
AF6
VSS
AF5
VSS
AF3
VSS
AF2
VSS
AE35
VSS
AE34
VSS
AE33
VSS
AE32
VSS
AE31
VSS
AE30
VSS
AE29
VSS
AE28
VSS
AE27
VSS
AE26
VSS
AE9
VSS
AD7
VSS
AC9
VSS
AC8
VSS
AC6
VSS
AC5
VSS
AC3
VSS
AC2
VSS
AB35
VSS
AB34
VSS
AB33
VSS
AB32
VSS
AB31
VSS
AB30
VSS
AB29
VSS
AB28
VSS
AB27
VSS
AB26
VSS
Y9
VSS
Y8
VSS
Y6
VSS
Y5
VSS
Y3
VSS
Y2
VSS
W35
VSS
W34
VSS
W33
VSS
W32
VSS
W31
VSS
W30
VSS
W29
VSS
W28
VSS
W27
VSS
W26
VSS
U9
VSS
U8
VSS
U6
VSS
U5
VSS
U3
VSS
U2
VSS
9 OF 9
SANDY
CPU1I
SANDY
VSS
9 OF 9
SANDY
CPU1I
SANDY
VSS
T35
VSS
T34
VSS
T33
VSS
T32
VSS
T31
VSS
T30
VSS
T29
VSS
T28
VSS
T27
VSS
T26
VSS
P9
VSS
P8
VSS
P6
VSS
P5
VSS
P3
VSS
P2
VSS
N35
VSS
N34
VSS
N33
VSS
N32
VSS
N31
VSS
N30
VSS
N29
VSS
N28
VSS
N27
VSS
N26
VSS
M34
VSS
L33
VSS
L30
VSS
L27
VSS
L9
VSS
L8
VSS
L6
VSS
L5
VSS
L4
VSS
L3
VSS
L2
VSS
L1
VSS
K35
VSS
K32
VSS
K29
VSS
K26
VSS
J34
VSS
J31
VSS
H33
VSS
H30
VSS
H27
VSS
H24
VSS
H21
VSS
H18
VSS
H15
VSS
H13
VSS
H10
VSS
H9
VSS
H8
VSS
H7
VSS
H6
VSS
H5
VSS
H4
VSS
H3
VSS
H2
VSS
H1
VSS
G35
VSS
G32
VSS
G29
VSS
G26
VSS
G23
VSS
G20
VSS
G17
VSS
G11
VSS
F34
VSS
F31
VSS
F29
VSS
F22
VSS
F19
VSS
E30
VSS
E27
VSS
E24
VSS
E21
VSS
E18
VSS
E15
VSS
E13
VSS
E10
VSS
E9
VSS
E8
VSS
E7
VSS
E6
VSS
E5
VSS
E4
VSS
E3
VSS
E2
VSS
E1
VSS
D35
VSS
D32
VSS
D29
VSS
D26
VSS
D20
VSS
D17
VSS
C34
VSS
C31
VSS
C28
VSS
C27
VSS
C25
VSS
C23
VSS
C10
VSS
C1
VSS
B22
VSS
B19
VSS
B17
VSS
B15
VSS
B13
VSS
B11
VSS
B9
VSS
B8
VSS
B7
VSS
B5
VSS
B3
VSS
B2
VSS
A35
VSS
A32
VSS
A29
VSS
A26
VSS
A23
VSS
A20
VSS
A3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
XDP
A3
11 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
XDP
A3
11 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
XDP
A3
11 102
Thursday, December 02, 2010
HR UMA
JE40 delete XDP function
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
12 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
12 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
12 102
Thursday, December 02, 2010
HR UMA
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
13 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
13 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Reserved
A4
13 102
Thursday, December 02, 2010
HR UMA
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_A_A1
M_A_DQS#0
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQS3
M_A_DQ0
M_A_DQS#5
M_A_A2
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQS4
M_A_A3
M_A_DQS#6
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ1
M_A_A4
M_A_DQS5
M_A_DQS#7
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQS#1
M_A_A5
M_A_DQ2
M_A_DQS6
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQS0
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A6
M_A_DQ3
M_A_DQS#2
M_A_DQS7
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQS1
M_A_A13
M_A_A14
M_A_A15
M_A_A12
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQS#3
M_A_A0
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQS2
M_A_DQS#4
TS#_DIMM0_1
1D5V_S3
3D3V_S0
0D75V_S0
DDR_VREF_S3
3D3V_S0
1D5V_S3
DDR_VREF_S3
0D75V_S0
DDR3_DRAMRST#15,37
M_A_DIM0_ODT06
M_A_DIM0_ODT16
M_A_BS26
M_A_BS06
M_A_BS16
M_A_DQ[63:0]6
TS#_DIMM0_1 15
PCH_SMBCLK 15,20
PCH_SMBDATA 15,20
M_A_WE# 6
M_A_DIM0_CS#0 6
M_A_CAS# 6
M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6
M_A_DIM0_CS#1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
M_A_RAS# 6
M_A_A[15:0] 6
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM1
Custom
14 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM1
Custom
14 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM1
Custom
14 102
Thursday, December 02, 2010
HR UMA
H =4mm
SSID = MEMORY
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
Thermal EVENT
SODIMM A DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMA.
PART NUMBER Height
TYPE
Place these caps
close to VTT1 and
VTT2.
-2
C1405
Do Not Stuff
DY
C1405
Do Not Stuff
DY
12
C1416
SCD1U10V2KX-5GP
C1416
SCD1U10V2KX-5GP
12
C1417
SCD1U10V2KX-5GP
C1417
SCD1U10V2KX-5GP
12
C1409
SCD1U50V3KX-GP
3G_RF
C1409
SCD1U50V3KX-GP
3G_RF
12
R1403
10KR2J-3-GP
R1403
10KR2J-3-GP
1 2
C1404
SC10U6D3V5KX-1GP
C1404
SC10U6D3V5KX-1GP
12
C1403
SC10U6D3V5KX-1GP
C1403
SC10U6D3V5KX-1GP
12
C1413
SCD1U10V2KX-5GP
C1413
SCD1U10V2KX-5GP
12
C1419
SC1U6D3V2KX-GP
C1419
SC1U6D3V2KX-GP
12
C1421
SC1U6D3V2KX-GP
C1421
SC1U6D3V2KX-GP
12
C1401
SCD1U10V2KX-5GP
C1401
SCD1U10V2KX-5GP
12
C1410
SCD1U50V3KX-GP
3G_RF
C1410
SCD1U50V3KX-GP
3G_RF
12
C1406
SC10U6D3V5KX-1GP
C1406
SC10U6D3V5KX-1GP
12
C1408
SC56P50V2JN-2GP
3G_RF
C1408
SC56P50V2JN-2GP
3G_RF
12
DM1
DDR3-204P-122-GP
62.10017.Z51
2nd = 62.10017.V51
3rd = 62.10017.M51
4th = 62.10017.X41
DM1
DDR3-204P-122-GP
62.10017.Z51
2nd = 62.10017.V51
3rd = 62.10017.M51
4th = 62.10017.X41
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
C1407
SC10U6D3V5KX-1GP
C1407
SC10U6D3V5KX-1GP
12
C1411
SCD1U10V2KX-5GP
C1411
SCD1U10V2KX-5GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
M_B_A1
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQS#0
M_B_DQ43
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ15
M_B_DQS3
M_B_DQ0
M_B_A2
M_B_DQS#5
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ47
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQS4
M_B_A3
M_B_DQS#6
M_B_DQ51
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
SA1_DIM1
M_B_DQ1
M_B_A4
M_B_DQS5
M_B_DQS#7
M_B_DQ53
M_B_DQ52
M_B_DQ24
M_B_DQ55
M_B_DQ54
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQS#1
M_B_DQ2
M_B_A5
M_B_DQS6
M_B_DQ57
M_B_DQ56
M_B_DQS0
M_B_DQ59
M_B_DQ58
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_A7
M_B_A6
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_DQ3
M_B_DQS#2
M_B_DQS7
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_B_DQ60
M_B_DQ33
M_B_DQ32
M_B_DQ35
M_B_DQ34
M_B_DQS1
M_B_A12
M_B_A15
M_B_A14
M_B_A13
M_B_DQ5
M_B_DQ4
M_B_DQ7
M_B_DQ6
M_B_DQS#3
M_B_A0
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ8
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQS2
M_B_DQS#4
1D5V_S3
3D3V_S0
0D75V_S0
1D5V_S3
DDR_VREF_S3
DDR_VREF_S3
0D75V_S0
DDR3_DRAMRST#14,37
M_B_BS06
M_B_BS26
M_B_BS16
M_B_DQ[63:0]6
TS#_DIMM0_1 14
PCH_SMBCLK 14,20
PCH_SMBDATA 14,20
M_B_A[15:0] 6
M_B_DQS[7:0] 6
M_B_DQS#[7:0] 6
M_B_DIM0_ODT06
M_B_DIM0_ODT16
M_B_WE# 6
M_B_DIM0_CS#0 6
M_B_CAS# 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CS#1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
M_B_RAS# 6
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
Custom
15 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
Custom
15 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
Custom
15 102
Thursday, December 02, 2010
HR UMA
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
H = 8mm
SSID = MEMORY
SODIMM B DECOUPLING
Layout Note:
Place these Caps near
SO-DIMMB.
Place these caps
close to VTT1 and
VTT2.
-2
C1509
SC10U6D3V5KX-1GP
C1509
SC10U6D3V5KX-1GP
12
C1504
SC56P50V2JN-2GP
3G_RF
C1504
SC56P50V2JN-2GP
3G_RF
12
DM2
DDR3-204P-126-GP
62.10024.D41
2nd = 62.10017.R91
3rd = 62.10017.V61
4th = 62.10017.X51
DM2
DDR3-204P-126-GP
62.10024.D41
2nd = 62.10017.R91
3rd = 62.10017.V61
4th = 62.10017.X51
A0
98
A1
97
A2
96
A3
95
A4
92
A5
91
A6
90
A7
86
A8
89
A9
85
A10/AP
107
A11
84
A12
83
A13
119
A14
80
A15
78
A16/BA2
79
BA0
109
BA1
108
DQ0
5
DQ1
7
DQ2
15
DQ3
17
DQ4
4
DQ5
6
DQ6
16
DQ7
18
DQ8
21
DQ9
23
DQ10
33
DQ11
35
DQ12
22
DQ13
24
DQ14
34
DQ15
36
DQ16
39
DQ17
41
DQ18
51
DQ19
53
DQ20
40
DQ21
42
DQ22
50
DQ23
52
DQ24
57
DQ25
59
DQ26
67
DQ27
69
DQ28
56
DQ29
58
DQ30
68
DQ31
70
DQ32
129
DQ33
131
DQ34
141
DQ35
143
DQ36
130
DQ37
132
DQ38
140
DQ39
142
DQ40
147
DQ41
149
DQ42
157
DQ43
159
DQ44
146
DQ45
148
DQ46
158
DQ47
160
DQ48
163
DQ49
165
DQ50
175
DQ51
177
DQ52
164
DQ53
166
DQ54
174
DQ55
176
DQ56
181
DQ57
183
DQ58
191
DQ59
193
DQ60
180
DQ61
182
DQ62
192
DQ63
194
DQS0#
10
DQS1#
27
DQS2#
45
DQS3#
62
DQS4#
135
DQS5#
152
DQS6#
169
DQS7#
186
DQS0
12
DQS1
29
DQS2
47
DQS3
64
DQS4
137
DQS5
154
DQS6
171
DQS7
188
ODT0
116
ODT1
120
VREF_DQ
1
VSS
2
NP1
NP1
NP2
NP2
RAS#
110
WE#
113
CAS#
115
CS0#
114
CS1#
121
CKE0
73
CKE1
74
CK0
101
CK0#
103
CK1
102
CK1#
104
DM0
11
DM1
28
DM2
46
DM3
63
DM4
136
DM5
153
DM6
170
DM7
187
SDA
200
SCL
202
VDDSPD
199
SA0
197
SA1
201
VREF_CA
126
VDD18
124
NC#1
77
NC#2
122
NC#/TEST
125
VDD3
81
VDD4
82
VDD5
87
VDD6
88
VDD7
93
VDD8
94
VDD9
99
VDD10
100
VDD13
111
VDD14
112
VDD15
117
VDD16
118
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VDD1
75
VSS
65
VSS
66
VSS
71
VSS
72
VDD2
76
VDD11
105
VDD12
106
VDD17
123
VSS
127
VSS
128
VSS
134
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
151
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
173
VSS
172
VSS
179
VSS
178
VSS
185
VSS
184
VSS
189
VSS
190
VSS
195
VSS
196
RESET#
30
EVENT#
198
VSS
205
VSS
206
VTT1
203
VTT2
204
R1501
10KR2J-3-GP
R1501
10KR2J-3-GP
12
C1514
SCD1U10V2KX-5GP
C1514
SCD1U10V2KX-5GP
12
C1510
SCD1U50V3KX-GP
3G_RF
C1510
SCD1U50V3KX-GP
3G_RF
12
C1503
SC5D6P50V2CN-1GP
3G_RF
C1503
SC5D6P50V2CN-1GP
3G_RF
12
C1501
SCD1U10V2KX-5GP
C1501
SCD1U10V2KX-5GP
12
C1507
SC10U6D3V5KX-1GP
C1507
SC10U6D3V5KX-1GP
12
C1513
SCD1U10V2KX-5GP
C1513
SCD1U10V2KX-5GP
12
C1517
SCD1U10V2KX-5GP
C1517
SCD1U10V2KX-5GP
12
C1508
SCD1U50V3KX-GP
3G_RF
C1508
SCD1U50V3KX-GP
3G_RF
12
C1515
SCD1U10V2KX-5GP
C1515
SCD1U10V2KX-5GP
12
C1505
SC10U6D3V5KX-1GP
C1505
SC10U6D3V5KX-1GP
12
C1519
SC1U6D3V2KX-GP
C1519
SC1U6D3V2KX-GP
12
C1521
SC1U6D3V2KX-GP
C1521
SC1U6D3V2KX-GP
12
C1506
SC10U6D3V5KX-1GP
C1506
SC10U6D3V5KX-1GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
A4
16 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
A4
16 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
DDR3-SODIMM2
A4
16 102
Thursday, December 02, 2010
HR UMA
(Blanking)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDS_IBG
DAC_IREF_R
LVDS_VREFH
LVDS_VREFL
L_CTRL_DATA
L_CTRL_CLK
LVDS_VDD_EN
CRT_RED
L_CTRL_DATA
CRT_BLUE
L_BKLT_EN
CRT_GREEN
L_CTRL_CLK
DDBP_DATA0
DDBP_DATA0#
DDBP_DATA2#
DDBP_DATA2
DDBP_CLK#
DDBP_DATA1#
DDBP_CLK
DDBP_DATA1
3D3V_S0
3D3V_S0
CRT_HSYNC95
CRT_VSYNC95
LVDS_DDC_CLK_R94
LVDS_DDC_DATA_R94
LVDSA_DATA094
LVDSA_DATA194
LVDSA_DATA294
LVDSA_DATA0#94
LVDSA_DATA1#94
LVDSA_DATA2#94
LVDSA_CLK#94
LVDSA_CLK94
L_BKLT_CTRL94
LVDS_VDD_EN94
L_BKLT_EN94
CRT_BLUE95
CRT_GREEN95
CRT_RED95
CRT_DDC_CLK95
CRT_DDC_DATA95
HDMI_PCH_DET 51
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
HDMI_DATA0_R 51
HDMI_DATA0_R# 51
HDMI_CLK_R 51
HDMI_DATA1_R 51
HDMI_CLK_R# 51
HDMI_DATA1_R# 51
HDMI_DATA2_R 51
HDMI_DATA2_R# 51
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (LVDS/CRT/DDI)
A3
17 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (LVDS/CRT/DDI)
A3
17 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (LVDS/CRT/DDI)
A3
17 102
Thursday, December 02, 2010
HR UMA
Place near PCH
Impedance:90 ohm
L_DDC_DATA(PAGE17):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display
JE40 delete LVDS B channel
Close to PCH side
DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected
Impedance:100 ohm
Close to PCH side
Impedance:90 ohm
JE40 modify
RN1706
SRN2K2J-1-GP
UMA_Muxless
RN1706
SRN2K2J-1-GP
UMA_Muxless
1
2 3
4
C1706 SCD1U10V2KX-5GP
UMA_Muxless
C1706 SCD1U10V2KX-5GP
UMA_Muxless
1 2
RN1705
SRN150F-1-GP
UMA_PX_Muxless
RN1705
SRN150F-1-GP
UMA_PX_Muxless
1
2
3
4 5
6
7
8
C1707 SCD1U10V2KX-5GP
UMA_Muxless
C1707 SCD1U10V2KX-5GP
UMA_Muxless
1 2
C1703 SCD1U10V2KX-5GP
UMA_Muxless
C1703 SCD1U10V2KX-5GP
UMA_Muxless
1 2
C1702 SCD1U10V2KX-5GP
UMA_Muxless
C1702 SCD1U10V2KX-5GP
UMA_Muxless
1 2
R1702
1KR2D-1-GP
R1702
1KR2D-1-GP
12
C1708 SCD1U10V2KX-5GP
UMA_Muxless
C1708 SCD1U10V2KX-5GP
UMA_Muxless
1 2
RN1704
SRN0J-6-GP
UMA_Muxless
RN1704
SRN0J-6-GP
UMA_Muxless
1
2 3
4
C1701 SCD1U10V2KX-5GP
UMA_Muxless
C1701 SCD1U10V2KX-5GP
UMA_Muxless
1 2
R1701
2K37R2F-GP
UMA_Muxless
R1701
2K37R2F-GP
UMA_Muxless
12
C1704 SCD1U10V2KX-5GP
UMA_Muxless
C1704 SCD1U10V2KX-5GP
UMA_Muxless
1 2
RN1702
SRN100KJ-6-GP
UMA_Muxless
RN1702
SRN100KJ-6-GP
UMA_Muxless
1
2 3
4
LVDS
Digital Display Interface
CRT
4 OF 10
Cougar
Point
PCH1D
COUGAR-GP-U2-NF
LVDS
Digital Display Interface
CRT
4 OF 10
Cougar
Point
PCH1D
COUGAR-GP-U2-NF
L_BKLTCTL
P45
L_BKLTEN
J47
L_CTRL_CLK
T45
L_CTRL_DATA
P39
L_DDC_CLK
T40
L_DDC_DATA
K47
L_VDD_EN
M45
LVDSA_CLK#
AK39
LVDSA_CLK
AK40
LVDSA_DATA#0
AN48
LVDSA_DATA#1
AM47
LVDSA_DATA#2
AK47
LVDSA_DATA#3
AJ48
LVDSA_DATA0
AN47
LVDSA_DATA1
AM49
LVDSA_DATA2
AK49
LVDSA_DATA3
AJ47
LVDSB_CLK#
AF40
LVDSB_CLK
AF39
LVDSB_DATA#0
AH45
LVDSB_DATA#1
AH47
LVDSB_DATA#2
AF49
LVDSB_DATA#3
AF45
LVDSB_DATA0
AH43
DDPB_0N
AV42
DDPB_1N
AV45
LVD_VREFH
AE48
LVD_VREFL
AE47
DDPD_2N
BF42
DDPD_3N
BJ42
DDPB_2N
AU48
DDPB_3N
AV47
DDPC_0N
AY47
DDPC_1N
AY43
DDPC_2N
BA47
DDPC_3N
BB47
DDPD_0N
BB43
DDPD_1N
BF44
DDPB_0P
AV40
DDPB_1P
AV46
DDPD_2P
BE42
DDPD_3P
BG42
DDPB_2P
AU47
DDPB_3P
AV49
LVDSB_DATA1
AH49
LVDSB_DATA2
AF47
LVDSB_DATA3
AF43
LVD_IBG
AF37
LVD_VBG
AF36
DDPC_1P
AY45
DDPC_0P
AY49
DDPC_2P
BA48
DDPC_3P
BB49
DDPD_0P
BB45
DDPD_1P
BE44
CRT_BLUE
N48
CRT_DDC_CLK
T39
CRT_DDC_DATA
M40
CRT_GREEN
P49
CRT_HSYNC
M47
CRT_IRTN
T42
CRT_RED
T49
CRT_VSYNC
M49
DAC_IREF
T43
SDVO_CTRLCLK
P38
SDVO_CTRLDATA
M39
DDPC_CTRLCLK
P46
DDPC_CTRLDATA
P42
DDPD_CTRLCLK
M43
DDPD_CTRLDATA
M36
DDPB_AUXN
AT49
DDPC_AUXN
AP47
DDPD_AUXN
AT45
DDPB_AUXP
AT47
DDPC_AUXP
AP49
DDPD_AUXP
AT43
DDPB_HPD
AT40
DDPC_HPD
AT38
DDPD_HPD
BH41
SDVO_TVCLKINP
AP45
SDVO_TVCLKINN
AP43
SDVO_STALLP
AM40
SDVO_STALLN
AM42
SDVO_INTP
AP40
SDVO_INTN
AP39
RN1701
SRN2K2J-1-GP
UMA_Muxless
RN1701
SRN2K2J-1-GP
UMA_Muxless
1
2 3
4
C1705 SCD1U10V2KX-5GP
UMA_Muxless
C1705 SCD1U10V2KX-5GP
UMA_Muxless
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
INT_PIRQB#
INT_PIRQH#
CLK_PCI_LPC_R
INT_PIRQF#
INT_PIRQH#
INT_PIRQE#
CLK_PCI_FB_R
CLK_PCI_KBC_R
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
INT_PIRQA#
DGPU_PWM_SELECT#
NV_CLE
USB_RBIAS
USB30_SMI#
INT_PIRQE#
INT_PIRQC#INT_PIRQA#
NV_CLE
INT_PIRQD#
INT_PIRQF#
DGPU_SELECT#
DGPU_PWR_EN#
DGPU_HOLD_RST#
3D3V_S0
3D3V_S0
1D8V_S0
3D3V_S5
CLK_PCI_FB20
CLK_PCI_LPC71
CLK_PCI_KBC27
USB_PN12 49
USB_PP12 49
PLT_RST#5,27,31,36,65,66,71,82,97
USB_PN9 61
USB_PP9 61
USB_PN11 65
USB_PP11 65
USB_PN1 61
USB_PP1 61
USB_PN3 63
USB_PP3 63
USB_PN0 66
USB_PP0 66
USB_PN4 66
USB_PP4 66
H_SNB_IVB# 5
DGPU_HOLD_RST#83
DGPU_PWR_EN#93
USB_PN8 82
USB_PP8 82
USB_PN5 32
USB_PP5 32
USB30_SMI#82
SATA_ODD_DA#56
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI/USB/NVRAM)
A3
18 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI/USB/NVRAM)
A3
18 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI/USB/NVRAM)
A3
18 102
Thursday, December 02, 2010
HR UMA
KBC CLK EMI
Reserved01
11
BOOT BIOS Strap
GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19
0 1 Reserved
SPI(Default)
SSID = PCH
0 0 LPC
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
override/Top-Block
Swap Override enabled
High = Default
NV_CLE
Set to Vss when LOW
DMI & FDI Termination Voltage
Set to Vcc when HIGH
OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)
USB Table
13
12
X
Mini Card1 (WLAN)
Fingerprint
X
New Card
USB Ext. port 2
10
0
11
USB Ext. port 1 (HS)
Pair
4
5
2
3
1
Device
6
7
8
9
BLUETOOTH
CARD READER(DY)
EDP CAMERA
CAMERA
Mini Card2 (WWAN)
USB Ext. port 1 (HS)
External debug port use on Huron river platform
Touch Panel / 3G SIM
USB Ext. port 4 / E-SATA /USB CHARGE
R
CRB : 2.2K
CEKLT: 1K
JE40 delete FP function
JE40 delete New Card function
JE40 delete eDP function
JE40 co-lay USB2.0
JE40 modify 07/16
check R1808 R1809
ଖ
SB add USB port 5
EC1802
Do Not Stuff
DY
EC1802
Do Not Stuff
DY
1 2
RN1801
SRN8K2J-2-GP-U
RN1801
SRN8K2J-2-GP-U
1
2
3
4
5 6
7
8
9
10
R1806 22R2J-2-GPR1806 22R2J-2-GP
1 2
RSVD
NVRAM
PCI
USB
5 OF 10
Cougar
Point
PCH1E
COUGAR-GP-U2-NF
RSVD
NVRAM
PCI
USB
5 OF 10
Cougar
Point
PCH1E
COUGAR-GP-U2-NF
RSVD
AV5
RSVD
AY7
RSVD
AV7
RSVD
AU3
RSVD
BG4
DF_TVS
AY1
RSVD
AT10
RSVD
BC8
RSVD
AU2
RSVD
AT4
RSVD
BB5
RSVD
BB3
RSVD
BB7
RSVD
BE8
RSVD
BD4
RSVD
BF6
RSVD
AT3
RSVD
AT1
RSVD
AY3
RSVD
AT5
RSVD
AV3
RSVD
AV1
RSVD
BB1
RSVD
BA3
RSVD
AT8
RSVD
AV10
RSVD
AY5
RSVD
BA2
RSVD
AT12
RSVD
BF3
PIRQA#
K40
PIRQB#
K38
PIRQC#
H38
PIRQD#
G38
REQ1#/GPIO50
C46
REQ2#/GPIO52
C44
REQ3#/GPIO54
E40
GNT1#/GPIO51
D47
GNT2#/GPIO53
E42
GNT3#/GPIO55
F46
PIRQE#/GPIO2
G42
PIRQF#/GPIO3
G40
PIRQG#/GPIO4
C42
PIRQH#/GPIO5
D44
USBP0N
C24
USBP0P
A24
USBP1N
C25
USBP1P
B25
USBP2N
C26
USBP2P
A26
USBP3N
K28
USBP3P
H28
USBP4N
E28
USBP4P
D28
USBP5N
C28
USBP5P
A28
USBP6N
C29
USBP6P
B29
USBP7N
N28
USBP7P
M28
USBP8N
L30
USBP8P
K30
USBP9N
G30
USBP9P
E30
USBP10N
C30
USBP10P
A30
USBP11N
L32
USBP11P
K32
USBP12N
G32
USBP12P
E32
USBP13N
C32
USBP13P
A32
PME#
K10
CLKOUT_PCI0
H49
CLKOUT_PCI1
H43
CLKOUT_PCI2
J48
USBRBIAS#
C33
USBRBIAS
B33
OC0#/GPIO59
A14
OC1#/GPIO40
K20
OC2#/GPIO41
B17
OC3#/GPIO42
C16
OC4#/GPIO43
L16
OC5#/GPIO9
A16
OC6#/GPIO10
D14
OC7#/GPIO14
C14
CLKOUT_PCI4
H40
CLKOUT_PCI3
K42
PLTRST#
C6
TP1
BG26
TP2
BJ26
TP3
BH25
TP6
AH38
TP7
AH37
TP8
AK43
TP9
AK45
TP16
Y13
TP17
K24
TP18
L24
TP19
AB46
TP20
AB45
TP21
B21
TP22
M20
TP23
AY16
TP25
BE28
TP26
BC30
TP27
BE32
TP28
BJ32
TP29
BC28
TP30
BE30
TP31
BF32
TP32
BG32
TP33
AV26
TP34
BB26
TP35
AU28
TP36
AY30
TP37
AU26
TP38
AY26
TP39
AV28
TP40
AW30
TP4
BJ16
TP5
BG16
TP15
AM5
TP14
AM4
TP13
AH12
TP12
H3
TP11
N30
TP10
C18
TP24
BG46
R1804 22R2J-2-GPR1804 22R2J-2-GP
1 2
EC1803
Do Not Stuff
DY
EC1803
Do Not Stuff
DY
1 2
R1811
22D6R2F-L1-GP
R1811
22D6R2F-L1-GP
1 2
R1805 22R2J-2-GPR1805 22R2J-2-GP
1 2
R1820
10KR2J-3-GP
R1820
10KR2J-3-GP
1 2
RN1803
SRN10KJ-5-GP
RN1803
SRN10KJ-5-GP
1
2 3
4
R1813
Do Not Stuff
R1813
Do Not Stuff
1 2
TP1806Do Not Stuff TP1806Do Not Stuff
1
R1808
2K2R2J-2-GP
R1808
2K2R2J-2-GP
12
TP1804Do Not Stuff TP1804Do Not Stuff
1
R1809
1KR2J-1-GP
R1809
1KR2J-1-GP
1 2
EC1801
Do Not Stuff
DY
EC1801
Do Not Stuff
DY
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BATLOW#
PM_CLKRUN#
RBIAS_CPY
DSWODVREN
PM_RSMRST#
BATLOW#
PM_RI#
AC_PRESENT
SUS_PWR_ACK
DSWODVREN
SYS_RESET#
PCH_DPWROK
PM_RSMRST#
DMI_COMP_R
PM_RI#
SUS_PWR_ACK
PM_RSMRST#
3V_5V_POK_#
PWROK
PM_RSMRST#
PCIE_WAKE#
PWROK
SYS_PWROK
RTC_AUX_S5
3D3V_S5
1D05V_VTT
3D3V_S0
3D3V_S0
RTC_AUX_S5
3D3V_AUX_S5
DMI_RXP[3:0]4
DMI_RXN[3:0]4
PM_SLP_S4# 27,46
PM_CLKRUN# 27
H_PM_SYNC 5
PM_SLP_S3# 27,36,37,47,92
PCH_SUSCLK_KBC 27
PCIE_WAKE# 31,65,66,82
DMI_RXP04
S0_PWR_GOOD27,42
PM_PWRBTN#27,97
DMI_RXP34
DMI_RXP24
DMI_RXP14
DMI_TXN14
DMI_TXN04
DMI_TXP04
DMI_TXN34
DMI_TXN24
DMI_TXP34
DMI_TXP24
DMI_TXP14
DMI_RXN04
PM_DRAM_PWRGD5,37
AC_PRESENT27
DMI_RXN34
DMI_RXN24
DMI_RXN14
FDI_LSYNC0 4
FDI_FSYNC1 4
SUS_PWR_ACK27
FDI_TXP0 4
FDI_TXN0 4
FDI_INT 4
FDI_TXP6 4
FDI_TXP4 4
FDI_TXN6 4
FDI_TXP5 4
FDI_TXP2 4
FDI_TXN4 4
FDI_TXN7 4
FDI_TXP7 4
FDI_TXN5 4
FDI_TXN2 4
FDI_TXN3 4
FDI_LSYNC1 4
FDI_FSYNC0 4
FDI_TXP1 4
FDI_TXP3 4
FDI_TXN1 4
RSMRST#_KBC 27
3V_5V_POK 41
DMI_TXP[3:0]4
DMI_TXN[3:0]4
FDI_TXP[7:0] 4
SYS_PWROK36
FDI_TXN[7:0] 4
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (DM I/FDI/PM)
A3
19 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (DM I/FDI/PM)
A3
19 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (DM I/FDI/PM)
A3
19 102
Thursday, December 02, 2010
HR UMA
Signal Routing Guideline:
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
PCIE_WAKE#
CRB : 1K
CEKLT: 10K
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
SSID = PCH
0628 Modify:
Change R1904 to 100K 0402 from 10K and default stuff.
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
PWRBTN#
This signal has an internal pull-up resistor
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected on board)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
PM_RSMRST#
CRB : PL 10K
ANNIE : PL 100K
JE40 modify 07/16
JE40 modify
JE40 modify
SB modify
R1926
Do Not Stuff
DY
R1926
Do Not Stuff
DY
1 2
R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP
1 2
R1916
10KR2J-3-GP
R1916
10KR2J-3-GP
1 2
R1918 Do Not Stuff
DY
R1918 Do Not Stuff
DY
1 2
R1921
10KR2J-3-GP
R1921
10KR2J-3-GP
12
R1905
10KR2J-3-GP
R1905
10KR2J-3-GP
1 2
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q1901
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
2
34
5
6
R1909
100KR2J-1-GP
R1909
100KR2J-1-GP
12
R1924
Do Not Stuff
R1924
Do Not Stuff
12
R1902 750R2F-GPR1902 750R2F-GP
1 2
R1911
Do Not Stuff
DY
R1911
Do Not Stuff
DY
1 2
R1904
100KR2J-1-GP
R1904
100KR2J-1-GP
1 2
DMI
FDI
System Power Management
3 OF 10
Cougar
Point
PCH1C
COUGAR-GP-U2-NF
DMI
FDI
System Power Management
3 OF 10
Cougar
Point
PCH1C
COUGAR-GP-U2-NF
DMI0RXN
BC24
DMI1RXN
BE20
DMI2RXN
BG18
DMI3RXN
BG20
DMI0RXP
BE24
DMI1RXP
BC20
DMI2RXP
BJ18
DMI3RXP
BJ20
DMI0TXN
AW24
DMI1TXN
AW20
DMI2TXN
BB18
DMI3TXN
AV18
DMI0TXP
AY24
DMI1TXP
AY20
DMI2TXP
AY18
DMI3TXP
AU18
DMI_ZCOMP
BJ24
DMI_IRCOMP
BG25
FDI_RXN0
BJ14
FDI_RXN1
AY14
FDI_RXN2
BE14
FDI_RXN3
BH13
FDI_RXN4
BC12
FDI_RXN5
BJ12
FDI_RXN6
BG10
FDI_RXN7
BG9
FDI_RXP0
BG14
FDI_RXP1
BB14
FDI_RXP2
BF14
FDI_RXP3
BG13
FDI_RXP4
BE12
FDI_RXP5
BG12
FDI_RXP6
BJ10
FDI_RXP7
BH9
FDI_FSYNC0
AV12
FDI_FSYNC1
BC10
FDI_LSYNC0
AV14
FDI_LSYNC1
BB10
FDI_INT
AW16
PMSYNCH
AP14
SLP_SUS#
G16
SLP_S3#
F4
SLP_S4#
H4
SLP_S5#/GPIO63
D10
SYS_RESET#
K3
SYS_PWROK
P12
PWRBTN#
E20
RI#
A10
WAKE#
B9
SUS_STAT#/GPIO61
G8
SUSCLK/GPIO62
N14
ACPRESENT/GPIO31
H20
BATLOW#/GPIO72
E10
PWROK
L22
CLKRUN#/GPIO32
N3
SUSWARN#/SUSPWRDNACK/GPIO30
K16
RSMRST#
C21
DRAMPWROK
B13
SLP_LAN#/GPIO29
K14
APWROK
L10
DPWROK
E22
DMI2RBIAS
BH21
SLP_A#
G10
DSWVRMEN
A18
SUSACK#
C12
RN1901
SRN10KJ-6-GP
RN1901
SRN10KJ-6-GP
1
2
3
45
6
7
8
R1919
8K2R2J-3-GP
R1919
8K2R2J-3-GP
1 2
R1908
100KR2J-1-GP
R1908
100KR2J-1-GP
12
R1910
Do Not Stuff
R1910
Do Not Stuff
1 2
R1901 49D9R2F-GPR1901 49D9R2F-GP
1 2
R1912
1KR2J-1-GP
R1912
1KR2J-1-GP
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
XTAL25_IN
PCIE_CLK_REQ6#
CLK_BUF_EXP_N
CLK_BUF_EXP_P
XTAL25_OUT
CLK_BUF_CKSSCD_P
PCIE_TXP5_C
PCIE_TXN5_C
XTAL25_IN
XTAL25_OUT
PCH_GPIO74
PCIE_CLK_RQ2#
CLK_PCIE_WWAN_REQ#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
DGPU_PRSNT#
PEG_B_CLKRQ#
CLK_PCH_SRC1_P
CLK_PCH_SRC1_N
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
PCIE_CLK_REQ5#
CLK_PCH_SRC3_P
CLK_PCH_SRC3_N
PEG_CLKREQ#_R
XCLK_RCOMP
CLK_BUF_REF14
SMB_DATA
SML0_CLK
PCIE_TXP4_C
PCIE_TXN4_C
PCIE_TXP2_C
PCIE_TXN2_C
CLK_BUF_DOT96_P
CLK_BUF_DOT96_N
CLK_BUF_CKSSCD_N
SMB_CLK
SML0_DATA
CLK_PCIE_NEW_REQ#
SMB_CLK
CLK_PCH_SRC4_P
CLK_PCH_SRC4_N
SMB_DATA
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
DGPU_PRSNT#
PCIE_CLK_RQ2#
CLK_PCIE_WLAN_REQ#
SMB_CLK
DRAMRST_CNTRL_PCH
SMB_DATA
SML0_DATA
SML0_CLK
SML1_DATA
SML1_CLK
USB3_PEGB_CLKREQ#
PCIE_CLK_LAN_RQ#
PCH_GPIO74
PCIE_CLK_REQ6#
CLK_PCIE_WWAN_REQ#
PEG_B_CLKRQ#
CLK_PCIE_NEW_REQ#
PCIE_CLK_REQ5#
EC_SWI#
PEG_CLKREQ#_R
CLK_48_USB30
CLK_48_USB30
1D05V_VTT
3D3V_S0
3D3V_S0 3D3V_S0
3D3V_S0
3D3V_S5
3D3V_S5
3D3V_S0
PCIE_RXN265
PCIE_RXP265
PCIE_TXN265
PCIE_TXP265
PCIE_RXN431
PCIE_RXP431
PCIE_TXN431
PCIE_TXP431
CLK_PCI_FB 18
PCH_SMBDATA 14,15
PCH_SMBCLK 14,15
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
SML1_DATA 27,86
SML1_CLK 27,86
PEG_CLKREQ# 83
PCIE_RXN582
PCIE_RXP582
PCIE_TXN582
PCIE_TXP582
DRAMRST_CNTRL_PCH 37
CLK_PCIE_USB3#82
CLK_PCIE_USB382
EC_SWI# 27
USB3_PEGB_CLKREQ#82
UMA_DIS# 22
CLK_PCIE_WLAN#65
CLK_PCIE_WLAN65
CLK_PCIE_WLAN_REQ#65
CLK_PCIE_LAN31
CLK_PCIE_LAN#31
PCIE_CLK_LAN_RQ#31
CLK_EXP_N 5
CLK_EXP_P 5
48MHZ_OUT 32
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI-E/SMBUS/CLOCK/CL)
A3
20 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI-E/SMBUS/CLOCK/CL)
A3
20 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (PCI-E/SMBUS/CLOCK/CL)
A3
20 102
Thursday, December 02, 2010
HR UMA
SSID = PCH
WWAN CLK
NEW CARD
Dock
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
For DIS_PX mode or MXM mode.
LAN CLK
Intel GBE LAN
WLAN CLK
USB3.0 CLK
need very close to PCH
Card Reader
W-WAN
LAN
USB3.0
WLAN
R2008 and C2008 CO-LAY
– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3
– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2
if more than 2 PCI clocks + PCI loopback are routed.
PCIECLKRQ1# and PCIECLKRQ2#
Support S0 power only
JE40 delete New Card function
JE40 delete XDP function
CRB : 1K
CEKLT: 10K
JE40 modify
SB
SB
RN2014
SRN0J-6-GP
RN2014
SRN0J-6-GP
1
2 3
4
R2007
90D9R2F-1-GP
R2007
90D9R2F-1-GP
1 2
C2008
SC12P50V2JN-3GP
C2008
SC12P50V2JN-3GP
12
RN2002
SRN10KJ-6-GP
RN2002
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
C2009 SCD1U10V2KX-5GPC2009 SCD1U10V2KX-5GP
1 2
RN2016
SRN0J-6-GP
RN2016
SRN0J-6-GP
1
2 3
4
R2006
1M1R2J-GP
R2006
1M1R2J-GP
1 2
RFC2001
Do Not Stuff
DY
RFC2001
Do Not Stuff
DY
12
RN2007
SRN2K2J-1-GP
RN2007
SRN2K2J-1-GP
1
2 3
4
C2007
SC12P50V2JN-3GP
C2007
SC12P50V2JN-3GP
12
R2004
10KR2J-3-GP
R2004
10KR2J-3-GP
12
R2005
Do Not Stuff
DY
R2005
Do Not Stuff
DY
12
RN2008
SRN10KJ-5-GP
RN2008
SRN10KJ-5-GP
1
2 3
4
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
Cougar
Point
PCH1B
COUGAR-GP-U2-NF
PCI-E*
CLOCKS
FLEX CLOCKS
SMBUSController
Link
2 OF 10
Cougar
Point
PCH1B
COUGAR-GP-U2-NF
PERN1
BG34
PERP1
BJ34
PERN2
BE34
PERP2
BF34
PERN3
BG36
PERP3
BJ36
PERN4
BF36
PERP4
BE36
PERN5
BG37
PERP5
BH37
PERN6
BJ38
PERP6
BG38
PERN7
BG40
PERP7
BJ40
PERN8
BE38
PERP8
BC38
PETN1
AV32
PETP1
AU32
PETN2
BB32
PETP2
AY32
PETN3
AV34
PETP3
AU34
PETN4
AY34
PETP4
BB34
PETN5
AY36
PETP5
BB36
PETN6
AU36
PETP6
AV36
PETN7
AY40
PETP7
BB40
PETN8
AW38
PETP8
AY38
CLKOUT_PCIE0N
Y40
CLKOUT_PCIE0P
Y39
CLKOUT_PCIE1N
AB49
CLKOUT_PCIE1P
AB47
CLKOUT_PCIE2N
AA48
CLKOUT_PCIE2P
AA47
CLKOUT_PCIE3N
Y37
CLKOUT_PCIE3P
Y36
CLKOUT_PCIE4N
Y43
CLKOUT_PCIE4P
Y45
CLKOUT_PCIE5N
V45
CLKOUT_PCIE5P
V46
CLKIN_GND1_N
BJ30
CLKIN_GND1_P
BG30
CLKIN_DMI_N
BF18
CLKIN_DMI_P
BE18
CLKIN_DOT_96N
G24
CLKIN_DOT_96P
E24
CLKIN_SATA_N
AK7
CLKIN_SATA_P
AK5
XTAL25_IN
V47
XTAL25_OUT
V49
REFCLK14IN
K45
CLKIN_PCILOOPBACK
H45
CLKOUT_PEG_A_N
AB37
CLKOUT_PEG_A_P
AB38
PEG_A_CLKRQ#/GPIO47
M10
PCIECLKRQ0#/GPIO73
J2
PCIECLKRQ1#/GPIO18
M1
PCIECLKRQ2#/GPIO20
V10
PCIECLKRQ3#/GPIO25
A8
PCIECLKRQ4#/GPIO26
L12
PCIECLKRQ5#/GPIO44
L14
CLKOUTFLEX0/GPIO64
K43
CLKOUTFLEX1/GPIO65
F47
CLKOUTFLEX2/GPIO66
H47
CLKOUTFLEX3/GPIO67
K49
CLKOUT_DMI_N
AV22
CLKOUT_DMI_P
AU22
PEG_B_CLKRQ#/GPIO56
E6
CLKOUT_PEG_B_P
AB40
CLKOUT_PEG_B_N
AB42
XCLK_RCOMP
Y47
CLKOUT_DP_P
AM13
CLKOUT_DP_N
AM12
CLKOUT_PCIE6N
V40
CLKOUT_PCIE6P
V42
PCIECLKRQ7#/GPIO46
K12
CLKOUT_PCIE7N
V38
CLKOUT_PCIE7P
V37
CLKOUT_ITPXDP_N
AK14
CLKOUT_ITPXDP_P
AK13
SMBALERT#/GPIO11
E12
SMBCLK
H14
SMBDATA
C9
SML0ALERT#/GPIO60
A12
SML0CLK
C8
SML0DATA
G12
SML1ALERT#/PCHHOT#/GPIO74
C13
SML1CLK/GPIO58
E14
SML1DATA/GPIO75
M16
CL_CLK1
M7
CL_DATA1
T11
CL_RST1#
P10
PCIECLKRQ6#/GPIO45
T13
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
Q2001
2N7002KDW-GP
84.2N702.A3F
2nd = 84.DM601.03F
1
2
34
5
6
C2010 SCD1U10V2KX-5GPC2010 SCD1U10V2KX-5GP
1 2
R2009
1KR2J-1-GP
R2009
1KR2J-1-GP
1 2
X2001
XTAL-25MHZ-102-GP
82.30020.851
2nd = 82.30020.791
X2001
XTAL-25MHZ-102-GP
82.30020.851
2nd = 82.30020.791
1 2
C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP
1 2
C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP
1 2
RN2006
SRN10KJ-5-GP
RN2006
SRN10KJ-5-GP
1
2 3
4
C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP
1 2
R2012
10KR2J-3-GP
UMA_Muxless
R2012
10KR2J-3-GP
UMA_Muxless
12
RN2005
SRN2K2J-1-GP
RN2005
SRN2K2J-1-GP
1
2 3
4
RN2013
SRN0J-6-GP
RN2013
SRN0J-6-GP
1
2 3
4
R2010
Do Not Stuff
DIS_PX
R2010
Do Not Stuff
DIS_PX
12
RN2003
SRN2K2J-1-GP
RN2003
SRN2K2J-1-GP
1
23
4
R2003
Do Not Stuff
R2003
Do Not Stuff
1 2
R2013
10KR2J-3-GP
DIS_UMA
R2013
10KR2J-3-GP
DIS_UMA
12
RN2004
SRN2K2J-1-GP
RN2004
SRN2K2J-1-GP
1
23
4
RN2018
SRN10KJ-5-GP
RN2018
SRN10KJ-5-GP
1
2 3
4
RN2009
SRN10KJ-L3-GP
RN2009
SRN10KJ-L3-GP
1
2
3
4
5 6
7
8
9
10
RN2012
SRN0J-6-GP
RN2012
SRN0J-6-GP
1
2 3
4
C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP
1 2
R2011
Do Not Stuff
PX_Muxless
R2011
Do Not Stuff
PX_Muxless
12
R2002
Do Not Stuff
RTS
R2002
Do Not Stuff
RTS
1 2
RN2001
SRN10KJ-6-GP
RN2001
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
HDA_SYNC
PCH_SPI_CLK
PCH_SPI_SI
PCH_SPI_CS0#
HDA_CODEC_SYNC
HDA_BITCLK
HDA_RST#
HDA_SYNC
SATA_LED#
SATA_DET#0
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
INT_SERIRQ
HDA_SDOUT
HDA_RST#
HDA_BITCLK
RBIAS_SATA3
SATA_COMP
SATA_DET#0
HDA_SDOUT
PCH_JTAG_TCK_BUF
RTC_X2
SM_INTRUDER#
RTC_X2
RTC_X1
SRTC_RST#
PCH_INTVRMEN
RTC_X1
RTC_RST#
SATA3_COMP
SPI_CS0#_RHDA_CODEC_BITCLK HDA_CODEC_SDOUT
HDA_SYNC_R HDA_SYNC
HDA_SYNC
HDA_SDOUT
+3VS_+1.5VS_HDA_IO
RTC_AUX_S5
RTC_AUX_S5
1D05V_VTT
3D3V_S0
1D05V_VTT
+3VS_+1.5VS_HDA_IO
5V_S0
HDA_CODEC_BITCLK29
HDA_CODEC_RST#29
HDA_SPKR29
INT_SERIRQ 27
LPC_AD[0..3] 27,71
HDA_SDIN029
SPI_CS0#_R27,60
SPI_SO_R27,60
SPI_SI_R27,60
SPI_CLK_R27,60
SATA_LED# 68
SATA_RXN0 56
SATA_RXP0 56
SATA_TXN0 56
SATA_TXP0 56
SATA_RXN4 56
SATA_RXP4 56
SATA_TXN4 56
SATA_TXP4 56
ME_UNLOCK27
LPC_FRAME# 27,71
PSW_CLR#22
HDA_CODEC_SDOUT29
HDA_CODEC_SYNC29
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (SPI/RTC/LPC/SATA/IHDA)
A3
21 102
Thursday, December 02, 2010
HR UMA
PLL ODVR VOLTAGE
HDA_SYNC
Low = 1.8V (Default)
High = 1.5V
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
No Reboot Strap
HDA_SPKR
Low = Default
High = No Reboot
SSID = PCH
INTVRMEN- Integrated SUS
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs
ESATA
HDA_SDOUT
Low = Default
High = Enable
Flash Descriptor Security Overide
ODD
HDD1
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this
signal on the board. Signal may have leakage paths via powered off devices (Audio
Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete.
HDD2
JE40 modify
?
?
?
?
?
?
RTC Reset
SB SEIKO suggest modify to 5P
EPSON suggest modifyg to 6P
-1M
-1M
-1M
R2114 750R2F-GPR2114 750R2F-GP
1 2
R2102
Do Not Stuff
DY
R2102
Do Not Stuff
DY
1 2
RN2103
SRN10KJ-6-GP
RN2103
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
R2108
33R2J-2-GP
R2108
33R2J-2-GP
1 2
R2124
Do Not Stuff
R2124
Do Not Stuff
1 2
RN2104
SRN20KJ-GP-U
RN2104
SRN20KJ-GP-U
1
2 3
4
G2101
Do Not Stuff
G2101
Do Not Stuff
21
EC2101
Do Not Stuff
DY
EC2101
Do Not Stuff
DY
1 2
Q2101
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
Q2101
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
G
S
D
R2101 10MR2J-L-GPR2101 10MR2J-L-GP
1 2
EC2102
Do Not Stuff
DY
EC2102
Do Not Stuff
DY
1 2
C2103
SC1U6D3V2KX-GP
C2103
SC1U6D3V2KX-GP
12
EC2103
Do Not Stuff
DY
EC2103
Do Not Stuff
DY
1 2
R2109
33R2J-2-GP
R2109
33R2J-2-GP
1 2
R2105
330KR2F-L-GP
R2105
330KR2F-L-GP
1 2
R2112 37D4R2F-GPR2112 37D4R2F-GP
1 2
RN2102
SRN33J-5-GP-U
RN2102
SRN33J-5-GP-U
1
2 3
4
R2110 33R2J-2-GPR2110 33R2J-2-GP
1 2
C2104
SC1U6D3V2KX-GP
C2104
SC1U6D3V2KX-GP
12
R2113 49D9R2F-GPR2113 49D9R2F-GP
1 2
RTCIHDA
SATA
LPC
SPI
JTAG
SATA 6G
1 OF 10
Cougar
Point
PCH1A
COUGAR-GP-U2-NF
RTCIHDA
SATA
LPC
SPI
JTAG
SATA 6G
1 OF 10
Cougar
Point
PCH1A
COUGAR-GP-U2-NF
RTCX1
A20
RTCX2
C20
INTVRMEN
C17
INTRUDER#
K22
HDA_BCLK
N34
HDA_SYNC
L34
HDA_RST#
K34
HDA_SDIN0
E34
HDA_SDIN1
G34
HDA_SDIN2
C34
HDA_SDO
A36
SATALED#
P3
FWH0/LAD0
C38
FWH1/LAD1
A38
FWH2/LAD2
B37
FWH3/LAD3
C37
LDRQ1#/GPIO23
K36
FWH4/LFRAME#
D36
LDRQ0#
E36
RTCRST#
D20
HDA_SDIN3
A34
HDA_DOCK_EN#/GPIO33
C36
HDA_DOCK_RST#/GPIO13
N32
SRTCRST#
G22
SATA0RXN
AM3
SATA0RXP
AM1
SATA0TXN
AP7
SATA0TXP
AP5
SATA1RXN
AM10
SATA1RXP
AM8
SATA1TXN
AP11
SATA1TXP
AP10
SATA2RXN
AD7
SATA2RXP
AD5
SATA2TXN
AH5
SATA2TXP
AH4
SATA3RXN
AB8
SATA3RXP
AB10
SATA3TXN
AF3
SATA3TXP
AF1
SATA4RXN
Y7
SATA4RXP
Y5
SATA4TXN
AD3
SATA4TXP
AD1
SATA5RXN
Y3
SATA5RXP
Y1
SATA5TXN
AB3
SATA5TXP
AB1
SATAICOMPI
Y10
SPI_CLK
T3
SPI_CS0#
Y14
SPI_CS1#
T1
SPI_MOSI
V4
SPI_MISO
U3
SATA0GP/GPIO21
V14
SATA1GP/GPIO19
P1
JTAG_TCK
J3
JTAG_TMS
H7
JTAG_TDI
K5
JTAG_TDO
H1
SERIRQ
V5
SPKR
T10
SATAICOMPO
Y11
SATA3COMPI
AB13
SATA3RCOMPO
AB12
SATA3RBIAS
AH1
R2107
1KR2J-1-GP
R2107
1KR2J-1-GP
1 2
C2101
SC5P50V2CN-2GP
C2101
SC5P50V2CN-2GP
12
R2122
33R2J-2-GP
DY
R2122
33R2J-2-GP
DY
12
X2101
X-32D768KHZ-34GPU
82.30001.661
2nd = 82.30001.B21
X2101
X-32D768KHZ-34GPU
82.30001.661
2nd = 82.30001.B21
1
2 3
4
R2121
4K7R2J-2-GP
R2121
4K7R2J-2-GP
12
R2103
1KR2J-1-GP
R2103
1KR2J-1-GP
1 2
R2123
33R2J-2-GP
R2123
33R2J-2-GP
12
R2104
1M1R2J-GP
R2104
1M1R2J-GP
12
C2102
SC5P50V2CN-2GP
C2102
SC5P50V2CN-2GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB3_PWR_ON
FDI_OVRVLTG
DMI_OVRVLTG
H_PECI_R
PLL_ODVR_EN
GFX_CRB_DET
PCH_GPIO12
PCH_GPIO22
PCH_GPIO24
PCH_GPIO15
EC_SMI#
DGPU_HPD_INTR#
PCH_GPIO27
PLL_ODVR_EN
DMI_OVRVLTG
ICC_EN#
MFG_MODE
ICC_EN#
FFS_INT2_R
VRAM_SIZE1
VRAM_SIZE2
VRAM_SIZE1
VRAM_SIZE2
FP_DET#
GFX_CRB_DET
DGPU_HPD_INTR#
PCH_NCTF_4
PCH_NCTF_1
H_RCIN#
S_GPIO
PCH_TEMP_ALERT#
USB3_PWR_ON
PCH_GPIO12
H_A20GATE
EC_SCI#
FP_DET#
MFG_MODE
PCH_THERMTRIP_R
PCH_THERMTRIP_R
EC_SMI#
S_GPIO
PCH_GPIO15
PCH_GPIO24
PCH_NCTF_3
PCH_NCTF_2
PCH_GPIO22
FFS_INT2_R SATA_ODD_PRSNT#
FDI_OVRVLTG
3D3V_S0
3D3V_S0
3D3V_S0
3D3V_S5
1D05V_VTT
3D3V_S0
3D3V_S0
3D3V_S0
H_A20GATE 27
H_CPUPWRGD 5,36,97
H_RCIN# 27
H_PECI 5,27
PCH_TEMP_ALERT#27
EC_SCI#27
DGPU_PWROK92,93
UMA_DIS# 20
PSW_CLR#21
H_THERMTRIP# 5,36
SATA_ODD_PWRGT 56
SATA_ODD_PRSNT#56
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (GPIO/CPU)
A3
22 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (GPIO/CPU)
A3
22 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (GPIO/CPU)
A3
22 102
Thursday, December 02, 2010
HR UMA
SSID = PCH
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
ICC_EN#
GPIO36
(DMI_OVRVLTG)
DMI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
PLL ON DIE VR ENABLE
NOTE:This signal has a weak internal pull-up 20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
LOW (R2211)- ENABLED
Integrated Clock Chip Enable
HIGH (R2211 DY)- DISABLED [DEFAULT]
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
GPIO37
(FDI_OVRVLTG)
FDI TERMINATION VOLTAGE OVERRIDE
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
Note:
For PCH debug with XDP, need to NO STUFF R2218
GPIO8 has a weak[20K] internal pull up.
VRAM Frequency
Pull high: 800MHZ
Pull low :900MHZ
TS Signal Disable Guideline:
TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
should not float on the motherboard. They should
be tied to GND directly.
JE40 delete FP function
JE40 delete G Sensor
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
Pass Word Clear
0806 delete TP2202, TP2203
SB
SB
ֆࣨ
check different , check need modify or not
check intel , R2204
SB add Zero ODD function
VRAM SizeSB
RN2203
SRN10KJ-5-GP
RN2203
SRN10KJ-5-GP
1
2 3
4
R2204
54D9R2F-L1-GP
R2204
54D9R2F-L1-GP
1 2
R2203
Do Not Stuff
DY
R2203
Do Not Stuff
DY
1 2
RN2205
Do Not Stuff
DY
RN2205
Do Not Stuff
DY
1
2 3
4
TP2202
Do Not Stuff
TP2202
Do Not Stuff
1
R2215
Do Not Stuff
1G_512M
R2215
Do Not Stuff
1G_512M
12
RN2204
SRN10KJ-6-GP
RN2204
SRN10KJ-6-GP
1
2
3
45
6
7
8
R2202
10KR2J-3-GP
R2202
10KR2J-3-GP
1 2
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
D1,D49,E1,E49,F1,F49
Cougar
Point
PCH1F
COUGAR-GP-U2-NF
CPU/MISC
NCTF
GPIO
6 OF 10
NCTF TEST PIN:
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
D1,D49,E1,E49,F1,F49
Cougar
Point
PCH1F
COUGAR-GP-U2-NF
GPIO27
E16
GPIO28
P8
GPIO24/MEM_LED
E8
GPIO57
D6
LAN_PHY_PWR_CTRL/GPIO12
C4
NCTF_VSS#A4
A4
NCTF_VSS#A44
A44
NCTF_VSS#A45
A45
NCTF_VSS#A46
A46
NCTF_VSS#A5
A5
NCTF_VSS#A6
A6
NCTF_VSS#B3
B3
NCTF_VSS#B47
B47
NCTF_VSS#BD1
BD1
NCTF_VSS#BD49
BD49
NCTF_VSS#BE1
BE1
NCTF_VSS#BE49
BE49
TACH2/GPIO6
H36
TACH0/GPIO17
D40
TACH3/GPIO7
E38
SATA3GP/GPIO37
M5
SATA5GP/GPIO49
V3
SCLOCK/GPIO22
T5
SLOAD/GPIO38
N2
SDATAOUT0/GPIO39
M3
SDATAOUT1/GPIO48
V13
PROCPWRGD
AY11
RCIN#
P5
PECI
AU16
THRMTRIP#
AY10
GPIO8
C10
BMBUSY#/GPIO0
T7
GPIO15
G2
TACH1/GPIO1
A42
SATA2GP/GPIO36
V8
INIT3_3V#
T14
STP_PCI#/GPIO34
K1
GPIO35
K4
SATA4GP/GPIO16
U2
NCTF_VSS#F49
F49
A20GATE
P4
TACH4/GPIO68
C40
TACH6/GPIO70
C41
TACH7/GPIO71
A40
TACH5/GPIO69
B41
NCTF_VSS#BH3
BH3
NCTF_VSS#BH47
BH47
NCTF_VSS#BJ4
BJ4
NCTF_VSS#BJ44
BJ44
NCTF_VSS#BJ45
BJ45
NCTF_VSS#BJ46
BJ46
NCTF_VSS#BJ5
BJ5
NCTF_VSS#BJ6
BJ6
NCTF_VSS#C2
C2
NCTF_VSS#C48
C48
NCTF_VSS#D1
D1
NCTF_VSS#D49
D49
NCTF_VSS#E1
E1
NCTF_VSS#E49
E49
NCTF_VSS#F1
F1
TS_VSS4
AK10
TS_VSS3
AH10
TS_VSS2
AK11
TS_VSS1
AH8
NC_1
P37
NCTF_VSS#BF1
BF1
NCTF_VSS#BF49
BF49
NCTF_VSS#BG2
BG2
NCTF_VSS#BG48
BG48
TP2210Do Not Stuff TP2210Do Not Stuff
1
TP2203
Do Not Stuff
TP2203
Do Not Stuff
1
R2216
Do Not Stuff
1G
R2216
Do Not Stuff
1G
12
R2220
10KR2J-3-GP
R2220
10KR2J-3-GP
1 2
R2218
10KR2J-3-GP
UMA_VRAM800MHZ
R2218
10KR2J-3-GP
UMA_VRAM800MHZ
12
R2217
Do Not Stuff
512M_2G
R2217
Do Not Stuff
512M_2G
12
RN2202
SRN10KJ-6-GP
RN2202
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
TP2206Do Not Stuff TP2206Do Not Stuff
1
R2219
10KR2J-3-GP
VRAM900MHZ
R2219
10KR2J-3-GP
VRAM900MHZ
12
TP2207Do Not Stuff TP2207Do Not Stuff
1
TP2209Do Not Stuff TP2209Do Not Stuff
1
G2201
Do Not Stuff
G2201
Do Not Stuff
21
R2212
Do Not Stuff
DY
R2212
Do Not Stuff
DY
12
R2210
10KR2J-3-GP
R2210
10KR2J-3-GP
12
TP2208Do Not Stuff TP2208Do Not Stuff
1
R2214
Do Not Stuff
2G
R2214
Do Not Stuff
2G
12
R2206
100KR2J-1-GP
R2206
100KR2J-1-GP
12
R2201
1KR2J-1-GP
R2201
1KR2J-1-GP
1 2
RN2201
SRN10KJ-6-GP
RN2201
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
R2208
10KR2J-3-GP
R2208
10KR2J-3-GP
12
R2211
1KR2J-1-GP
R2211
1KR2J-1-GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.8VS_VCCTX_LVDS
+1.05VS_VCC_DMI_CCI
+VCCA_DAC_1_2
+3VS_VCCA_LVDS
VCCVRM_S0
VCCVRM_S0
1D05V_VTT
1D05V_VTT
1D05V_VTT
1D05V_VTT
3D3V_S0
1D05V_VTT
3D3V_S0
1D05V_VTT
1D8V_S0
3D3V_S0
3D3V_DAC_S0
3D3V_S0
1D8V_S0
5V_S0
3D3V_DAC_S0
1D05V_VTT
3D3V_S5
3D3V_S0 VCCVRM_S01D5V_S0
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER1)
A3
23 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER1)
A3
23 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER1)
A3
23 102
Thursday, December 02, 2010
HR UMA
Refer to NPCE795 shared SPI flash architecture
2.925A(Total current of VCCIO)
0.266A (Totally VCC3_3 current)
0.159A(Totally current of VCCVRM)
0.042A (Totally current of VCCDMI)
(1uFx3)
(10uFx1_0603)
(1uF x4)
(0.1uF x1)
1.3A
(10uF x1_0603)
(0.1uF/0.01uF x1)
(22uF x1)
(0.01uF x2)
0.06A
(1uFx1)
0.001A
(1uF x1)
(1uFx1)
(10uFx1)
0.02A
0.19A
0.02A
SSID = PCH
3.3V CRT LDO
6A
U2301 for ANNIE flicker issue
R2312 for don't flicker solution
JE40 modify 07/16
JE40 modify
JE40 modify
JE40 modify
JE40 modify
0806 check VCCAFDIPLL
SB ֆࣨsuggest delete 3D3V_S0, R2313
SPI only support 3D3V_S5
The same BIOS SPI ROM power
SB add C2327
-2 modify power net name
-2 modify power net name
-1M add LDO for VCCVRM_S0
Vout=1.25*(1+R1/R2)
C2315
Do Not Stuff
DY
C2315
Do Not Stuff
DY
12
R2305
0R5J-5-GP
UMA_PX_Muxless
R2305
0R5J-5-GP
UMA_PX_Muxless
1 2
C2320
SC1U6D3V2KX-GP
C2320
SC1U6D3V2KX-GP
12
C2310
SCD1U10V2KX-5GP
C2310
SCD1U10V2KX-5GP
12
C2301
SC10U6D3V5KX-1GP
C2301
SC10U6D3V5KX-1GP
12
C2314
SCD1U10V2KX-5GP
UMA_PX_Muxless
C2314
SCD1U10V2KX-5GP
UMA_PX_Muxless
12
C2306
Do Not Stuff
DY
C2306
Do Not Stuff
DY
12
R2304
0R3J-0-U-GP
UMA_PX_Muxless
R2304
0R3J-0-U-GP
UMA_PX_Muxless
12
C2329
SC4D7U6D3V3KX-GP
DY
C2329
SC4D7U6D3V3KX-GP
DY
12
C2322
SCD1U10V2KX-5GP
C2322
SCD1U10V2KX-5GP
12
C2303
SC1U6D3V2KX-GP
C2303
SC1U6D3V2KX-GP
12
C2316
SCD01U16V2KX-3GP
UMA_PX_Muxless
C2316
SCD01U16V2KX-3GP
UMA_PX_Muxless
12
C2319
SCD1U10V2KX-5GP
C2319
SCD1U10V2KX-5GP
12
C2309
SC1U6D3V2KX-GP
C2309
SC1U6D3V2KX-GP
12
C2313
SCD01U16V2KX-3GP
UMA_PX_Muxless
C2313
SCD01U16V2KX-3GP
UMA_PX_Muxless
12
C2325
Do Not Stuff
DY
C2325
Do Not Stuff
DY
12
L2303
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
L2303
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
1 2
R2316
2K8R2F-GP
DY
R2316
2K8R2F-GP
DY
12
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
NAND / SPI HVCMOS
7 OF 10
Cougar
Point
PCH1G
COUGAR-GP-U2-NF
POWER
VCC CORE
DMI
VCCIO
CRTLVDS
FDI
NAND / SPI HVCMOS
7 OF 10
Cougar
Point
PCH1G
COUGAR-GP-U2-NF
VCCCORE
AA23
VCCCORE
AC23
VCCCORE
AD21
VCCCORE
AD23
VCCCORE
AF21
VCCCORE
AF23
VCCCORE
AG21
VCCCORE
AG23
VCCCORE
AG24
VCCCORE
AG26
VCCCORE
AG27
VCCCORE
AG29
VCCCORE
AJ23
VCCCORE
AJ26
VCCCORE
AJ27
VccDFTERM
AJ17
VccDFTERM
AJ16
VCCIO
AN21
VCCIO
AN26
VCCIO
AN27
VCCIO
AP21
VCCIO
AP26
VCCIO
AT24
VCCIO
AN16
VCCIO
AN17
VCCIO
AP23
VCCIO
AP24
VCCADAC
U48
VCCTX_LVDS
AM37
VCCTX_LVDS
AM38
VCCALVDS
AK36
VCCVRM
AT16
VCCVRM
AP16
VCCAPLLEXP
BJ22
VCCAFDIPLL
BG6
VCCIO
AN19
VCCTX_LVDS
AP37
VCCTX_LVDS
AP36
VSSADAC
U47
VSSALVDS
AK37
VCCIO
AP17
VCC3_3
V33
VCC3_3
V34
VCC3_3
BH29
VccDFTERM
AG17
VccDFTERM
AG16
VCCDMI
AT20
VCCIO
AN33
VCCIO
AN34
VCCCORE
AJ29
VCCCORE
AJ31
VCCSPI
V1
VCCCLKDMI
AB36
VCCDMI
AU20
R2315
Do Not Stuff
R2315
Do Not Stuff
1 2
R2309
Do Not Stuff
DIS
R2309
Do Not Stuff
DIS
1 2
U2301
G9091-330T11U-GP
2nd = 74.09198.G7F
UMA_PX_Muxless
74.09091.J3F
U2301
G9091-330T11U-GP
2nd = 74.09198.G7F
UMA_PX_Muxless
74.09091.J3F
VIN
1
GND
2
EN
3
NC#4
4
VOUT
5
C2302
SC1U6D3V2KX-GP
C2302
SC1U6D3V2KX-GP
12
C2317
SCD01U16V2KX-3GP
UMA_PX_Muxless
C2317
SCD01U16V2KX-3GP
UMA_PX_Muxless
12
C2318
Do Not Stuff
DY
C2318
Do Not Stuff
DY
1 2
C2327
SC10U6D3V3MX-GP
C2327
SC10U6D3V3MX-GP
12
C2328
SC1U10V3KX-3GP
DY
C2328
SC1U10V3KX-3GP
DY
12
C2308
SC1U6D3V2KX-GP
C2308
SC1U6D3V2KX-GP
12
U2302
G913CF-GP
74.00913.A3F
DY
U2302
G913CF-GP
74.00913.A3F
DY
SHDN#
1
GND
2
IN
3
OUT
4
SET
5
C2311
SC1U10V2KX-1GP
UMA_PX_Muxless
C2311
SC1U10V2KX-1GP
UMA_PX_Muxless
12
C2331
SCD1U10V2KX-5GP
DY
C2331
SCD1U10V2KX-5GP
DY
12
C2312
SC1U6D3V2KX-GP
UMA_PX_Muxless
C2312
SC1U6D3V2KX-GP
UMA_PX_Muxless
12
R2303
Do Not Stuff
DIS
R2303
Do Not Stuff
DIS
1 2
R2317
10KR2J-3-GP
DY
R2317
10KR2J-3-GP
DY
12
C2321
SC1U6D3V2KX-GP
C2321
SC1U6D3V2KX-GP
12
C2307
SC1U6D3V2KX-GP
C2307
SC1U6D3V2KX-GP
12
C2304
SC1U6D3V2KX-GP
C2304
SC1U6D3V2KX-GP
12
C2330
SC22P50V2JN-4GP
DY
C2330
SC22P50V2JN-4GP
DY
12
C2323
SC1U6D3V2KX-GP
C2323
SC1U6D3V2KX-GP
12
R2301
Do Not Stuff
DIS
R2301
Do Not Stuff
DIS
1 2
C2326
SCD1U10V2KX-5GP
C2326
SCD1U10V2KX-5GP
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+1.05VS_VCCA_A_DPL
+VCCRTCEXT
+1.05VS_VCCA_A_DPL+1.05VS_VCCA_A_DPL
+VCCSST
+1.05VS_VCCA_B_DPL
+5VA_PCH_VCC5REFSUS
+5VS_PCH_VCC5REF
+1.05VS_VCCA_B_DPL+1.05VS_VCCA_B_DPL
1D5V_S0
3D3V_S5
3D3V_S5
3D3V_S0
3D3V_S5
1D05V_VTT
1D05V_VTT
3D3V_S0
3D3V_S0
1D05V_VTT
3D3V_S5 1D5V_S5
1D05V_VTT
1D05V_VTT
RTC_AUX_S5
1D05V_VTT
1D05V_VTT
3D3V_S0
VCCVRM_S0
1D05V_VTT
1D05V_VTT
3D3V_S5
1D05V_VTT
3D3V_S5
5V_S0
5V_S5
1D5V_S5
3D3V_S5
VCCVRM_S0
+3VS_+1.5VS_HDA_IO
1D5V_S5
+3VS_+1.5VS_HDA_IO
3D3V_S5
1D05V_VTT
1D05V_VTT
3D3V_S5
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER2)
A3
24 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER2)
A3
24 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (POWER2)
A3
24 102
Thursday, December 02, 2010
HR UMA
(1uFx1)
(10uFx1)
(0.1uFx1)
(1uFx3)
(22uFx2_0603)
(10uFx1)
0.002A
SSID = PCH
1.01A (Total current of VCCASW)
0.08A
0.08A
0.16A (Totally current of VCCVRM
(220uFx1)
(220uFx1)
(1uFx1)
(1uFx1)
(0.1uFx1)
0.055A
(0.1uFx1)
0.095A
0.001A
6uA
(0.1uFx2)
(1uFx1)
(1uFx1)
(0.1uFx2)
(1uFx1)
(1uFx1)
(4.7uFx1_0603)
(1uFx1)
(0.1uFx1)
(1uFx1)
(0.1uFx2)
(1uFx1)
0.01A
(1uFx1)
0.001A
0.001A
0.097A (Totally current of VCCSUS3_3)
(1uFx1)
(0.1uFx1)
(0.1uFx1)
(0.1uFx1)
(0.1uFx1)
(1uFx1)
JE40 modify 07/16
JE40 modify 07/16
JE40 modify 07/16
JE40 modify 07/16
JE40 modify 07/16
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
JE40 modify
-1M modify power net name
-1M
-1M
C2406
SC1U6D3V2KX-GP
C2406
SC1U6D3V2KX-GP
12
R2407
10R2J-2-GP
R2407
10R2J-2-GP
1 2
C2407
SC1U6D3V2KX-GP
C2407
SC1U6D3V2KX-GP
12
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
Cougar
Point
PCH1J
COUGAR-GP-U2-NF
POWER
SATA USB
Clock and Miscellaneous
HDA
CPURTC
PCI/GPIO/LPCMISC
10 OF 10
Cougar
Point
PCH1J
COUGAR-GP-U2-NF
DCPSUSBYP
V12
VCCASW
AA19
VCCASW
AA21
VCCASW
AA24
VCCASW
AA27
VCCASW
AA29
VCCSUSHDA
P32
VCCSUS3_3
P24
VCCIO
T26
VCCIO
AD17
VCCASW
AA31
VCCASW
AC26
VCCASW
AC27
VCCASW
AC29
VCCASW
AC31
VCCASW
AD29
V5REF
P34
VCC3_3
T34
VCCRTC
A22
VCCSUS3_3
V24
VCCSUS3_3
V23
VCCSUS3_3
T24
VCCSUS3_3
T23
VCCIO
AC16
VCCADPLLB
BF47
VCCDIFFCLKN
AF33
V5REF_SUS
M26
VCCIO
AC17
DCPSUS
T17
VCCSSC
AG33
VCCADPLLA
BD47
VCCVRM
Y49
VCCACLK
AD49
DCPRTC
N16
VCCASW
AA26
VCCDIFFCLKN
AF34
VCCIO
AF17
DCPSST
V16
VCCIO
AF13
VCCASW
T21
VCCASW
V21
VCCASW
T19
VCC3_3
AA16
VCC3_3
W16
VCCSUS3_3
N20
VCCSUS3_3
N22
VCCSUS3_3
P20
VCCSUS3_3
P22
VCCIO
N26
VCCIO
P26
VCCIO
P28
VCCIO
T27
V_PROC_IO
BJ8
VCCIO
T29
VCCDIFFCLKN
AG34
VCCASW
AD31
VCCASW
W21
VCCASW
W23
VCCASW
W24
VCCASW
W26
VCCASW
W29
VCCASW
W31
VCCASW
W33
VCCIO
AF14
VCCVRM
AF11
VCCIO
AH13
VCCIO
AH14
VCC3_3
AJ2
VCCAPLLSATA
AK1
DCPSUS
AL24
VCCIO
AL29
DCPSUS
AN23
VCCSUS3_3
AN24
VCCAPLLDMI2
BH23
DCPSUS
V19
VCCDSW3_3
T16
VCC3_3
T38
D2401
Do Not Stuff
Do Not Stuff
2nd = 83.R2004.B8F
DY
D2401
Do Not Stuff
Do Not Stuff
2nd = 83.R2004.B8F
DY
21
C2410
SC1U6D3V2KX-GP
C2410
SC1U6D3V2KX-GP
12
L2403
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
L2403
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
1 2
C2430
SCD1U10V2KX-5GP
C2430
SCD1U10V2KX-5GP
12
C2435
SC1U6D3V2KX-GP
C2435
SC1U6D3V2KX-GP
12
C2413
SC1U6D3V2KX-GP
C2413
SC1U6D3V2KX-GP
1 2
R2414
Do Not Stuff
DY
R2414
Do Not Stuff
DY
1 2
C2418
SCD1U10V2KX-5GP
C2418
SCD1U10V2KX-5GP
12
C2403
SC10U6D3V5KX-1GP
C2403
SC10U6D3V5KX-1GP
12
C2433
SCD1U10V2KX-5GP
C2433
SCD1U10V2KX-5GP
12
C2414
SC1U6D3V2KX-GP
C2414
SC1U6D3V2KX-GP
12
R2413 Do Not Stuff
DY
R2413 Do Not Stuff
DY
1 2
C2416
Do Not Stuff
DY
C2416
Do Not Stuff
DY
12
R2415 Do Not Stuff
DY
R2415 Do Not Stuff
DY
1 2
C2431
SCD1U10V2KX-5GP
C2431
SCD1U10V2KX-5GP
12
C2425
SCD1U10V2KX-5GP
C2425
SCD1U10V2KX-5GP
12
D2402
Do Not Stuff
Do Not Stuff
2nd = 83.R2004.B8F
DY
D2402
Do Not Stuff
Do Not Stuff
2nd = 83.R2004.B8F
DY
21
C2426
SCD1U10V2KX-5GP
C2426
SCD1U10V2KX-5GP
12
C2424
SCD1U10V2KX-5GP
C2424
SCD1U10V2KX-5GP
12
C2436
Do Not Stuff
DY
C2436
Do Not Stuff
DY
12
C2419
Do Not Stuff
DY
C2419
Do Not Stuff
DY
12
R2402
Do Not Stuff
DY
R2402
Do Not Stuff
DY
12
C2415
SCD1U10V2KX-5GP
C2415
SCD1U10V2KX-5GP
12
C2405
Do Not Stuff
DY
C2405
Do Not Stuff
DY
12
L2402
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
L2402
IND-10UH-218-GP
68.10050.10Y
2nd = 68.10090.10B
1 2
C2412
SC1U6D3V2KX-GP
C2412
SC1U6D3V2KX-GP
1 2
C2423
SC1U6D3V2KX-GP
C2423
SC1U6D3V2KX-GP
12
C2417
SC4D7U6D3V3KX-GP
C2417
SC4D7U6D3V3KX-GP
12
C2427
SC1U10V2KX-1GP
C2427
SC1U10V2KX-1GP
12
C2420
SC1U6D3V2KX-GP
C2420
SC1U6D3V2KX-GP
12
R2409 Do Not StuffR2409 Do Not Stuff
1 2
C2402
SC1U10V2KX-1GP
C2402
SC1U10V2KX-1GP
12
C2411
SCD1U10V2KX-5GP
C2411
SCD1U10V2KX-5GP
12
R2408
10R2J-2-GP
R2408
10R2J-2-GP
1 2
C2404
SC10U6D3V5KX-1GP
C2404
SC10U6D3V5KX-1GP
12
C2429
SCD1U10V2KX-5GP
C2429
SCD1U10V2KX-5GP
12
C2409
SC1U6D3V2KX-GP
C2409
SC1U6D3V2KX-GP
12
C2432
SC1U6D3V2KX-GP
C2432
SC1U6D3V2KX-GP
12
C2428
SC1U6D3V2KX-GP
C2428
SC1U6D3V2KX-GP
12
U2401
Do Not Stuff
DY
Do Not Stuff
U2401
Do Not Stuff
DY
Do Not Stuff
VIN
1
GND
2
EN
3
NC#4
4
VOUT
5
C2408
Do Not Stuff
DY
C2408
Do Not Stuff
DY
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (VSS)
A3
25 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (VSS)
A3
25 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
PCH (VSS)
A3
25 102
Thursday, December 02, 2010
HR UMA
SSID = PCH
9 OF 10
Cougar
Point
PCH1I
COUGAR-GP-U2-NF
9 OF 10
Cougar
Point
PCH1I
COUGAR-GP-U2-NF
VSS
AY4
VSS
AY42
VSS
AY46
VSS
AY8
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B27
VSS
B31
VSS
B35
VSS
B39
VSS
B7
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB22
VSS
BB24
VSS
BB28
VSS
BB30
VSS
BB38
VSS
BB4
VSS
BB46
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC26
VSS
BC32
VSS
BC34
VSS
BC36
VSS
BC40
VSS
BC42
VSS
BC48
VSS
BD46
VSS
BD5
VSS
BE22
VSS
BE26
VSS
BE40
VSS
BF10
VSS
BF12
VSS
BF16
VSS
BF20
VSS
BF22
VSS
BF24
VSS
BF26
VSS
BF28
VSS
BD3
VSS
BF30
VSS
BF38
VSS
BF40
VSS
BF8
VSS
BG17
VSS
BG21
VSS
BG33
VSS
BG44
VSS
BG8
VSS
BH11
VSS
BH15
VSS
BH17
VSS
BH19
VSS
BH27
VSS
BH31
VSS
BH33
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH7
VSS
D3
VSS
D12
VSS
D16
VSS
D18
VSS
D22
VSS
D24
VSS
D26
VSS
D30
VSS
D32
VSS
K7
VSS
L18
VSS
L2
VSS
L20
VSS
L26
VSS
L28
VSS
L36
VSS
L48
VSS
M12
VSS
P16
VSS
M18
VSS
M22
VSS
M24
VSS
M30
VSS
M32
VSS
M34
VSS
M38
VSS
M4
VSS
M42
VSS
M46
VSS
M8
VSS
N18
VSS
P30
VSS
P11
VSS
P18
VSS
T33
VSS
P40
VSS
P43
VSS
P47
VSS
P7
VSS
R2
VSS
R48
VSS
T12
VSS
T31
VSS
T37
VSS
T4
VSS
W34
VSS
T46
VSS
T47
VSS
T8
VSS
V11
VSS
V17
VSS
V26
VSS
V27
VSS
V29
VSS
V31
VSS
V36
VSS
V39
VSS
V43
VSS
V7
VSS
W17
VSS
W19
VSS
D34
VSS
D38
VSS
D42
VSS
D8
VSS
E18
VSS
E26
VSS
G18
VSS
G20
VSS
G26
VSS
G28
VSS
G36
VSS
G48
VSS
H12
VSS
H18
VSS
W2
VSS
W27
VSS
W48
VSS
Y12
VSS
Y38
VSS
Y4
VSS
Y42
VSS
Y46
VSS
Y8
VSS
BG29
VSS
N24
VSS
AJ3
VSS
N47
VSS
H22
VSS
H24
VSS
H26
VSS
H30
VSS
H32
VSS
H34
VSS
F3
VSS
K39
VSS
K46
VSS
H46
VSS
K18
VSS
K26
VSS
AD47
VSS
B43
VSS
BE10
VSS
BG41
VSS
G14
VSS
H16
VSS
T36
VSS
BG22
VSS
BG24
VSS
C22
VSS
AP13
VSS
F45
VSS
H10
VSS
M14
VSS
AP3
VSS
AP1
VSS
BE16
VSS
BC16
VSS
BG28
VSS
BJ28
8 OF 10
Cougar
Point
PCH1H
COUGAR-GP-U2-NF
8 OF 10
Cougar
Point
PCH1H
COUGAR-GP-U2-NF
VSS
AA17
VSS
AA2
VSS
AA3
VSS
AA34
VSS
AB11
VSS
AB14
VSS
AB39
VSS
AB4
VSS
AB43
VSS
AB5
VSS
AB7
VSS
AC19
VSS
AC2
VSS
AC21
VSS
AC24
VSS
AC33
VSS
AC34
VSS
AC48
VSS
AD10
VSS
AD11
VSS
AD12
VSS
AD13
VSS
AD19
VSS
AD24
VSS
AD26
VSS
AD27
VSS
AD33
VSS
AD34
VSS
AD36
VSS
AD37
VSS
AD39
VSS
AD4
VSS
AD40
VSS
AD42
VSS
AD43
VSS
AD45
VSS
AD46
VSS
AF10
VSS
AF12
VSS
AD16
VSS
AF16
VSS
AF19
VSS
AF24
VSS
AF26
VSS
AF27
VSS
AF29
VSS
AF31
VSS
AF38
VSS
AF4
VSS
AF42
VSS
AF46
VSS
AF7
VSS
AF8
VSS
AG19
VSS
AG2
VSS
AG31
VSS
AG48
VSS
AH11
VSS
AH3
VSS
AH36
VSS
AH39
VSS
AH40
VSS
AH42
VSS
AH46
VSS
AH7
VSS
AJ19
VSS
AJ33
VSS
AJ34
VSS
AK12
VSS
AK3
VSS
AK38
VSS
AK4
VSS
AK42
VSS
AK46
VSS
AK8
VSS
AL16
VSS
AL17
VSS
AL19
VSS
AL2
VSS
AL21
VSS
AL23
VSS
AL26
VSS
AL27
VSS
AL31
VSS
AL48
VSS
AM11
VSS
AM14
VSS
AM36
VSS
AM39
VSS
AM45
VSS
AM46
VSS
AM7
VSS
AN2
VSS
AN29
VSS
AN3
VSS
AN31
VSS
AP12
VSS
AP19
VSS
AP28
VSS
AP30
VSS
AP32
VSS
AP38
VSS
AP42
VSS
AP46
VSS
AP8
VSS
AR2
VSS
AR48
VSS
AT11
VSS
AT13
VSS
AT18
VSS
AT22
VSS
AT26
VSS
AT28
VSS
AT30
VSS
AT32
VSS
AT42
VSS
AT46
VSS
AT7
VSS
AU24
VSS
AU30
VSS
AV16
VSS
AV20
VSS
AV24
VSS
AV30
VSS
AV38
VSS
AV4
VSS
AV43
VSS
AV8
VSS
AW14
VSS
AW18
VSS
AW2
VSS
AW22
VSS
AW26
VSS
AW28
VSS
AW32
VSS
AW34
VSS
AW36
VSS
AW40
VSS
AW48
VSS
AV11
VSS
AY12
VSS
AY22
VSS
AY28
VSS
AD8
VSS
AE3
VSS
AD14
VSS
AP4
VSS
H5
VSS
AF5
VSS
AD38
VSS
AA33
VSS
AJ21
VSS
AJ24
VSS
AE2
VSS
AT34
VSS
AT39
VSS
AM43
VSS
AL34
VSS
AL33
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Clock(colay)
A4
26 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Clock(colay)
A4
26 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Clock(colay)
A4
26 102
Thursday, December 02, 2010
HR UMA
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A
A
Wireless_SW
EC_GPIO6
EC_SPI_DI_C
AC_IN_KBC
EC_GPIO33
FAN_TACH2
PCB_VER_AD
DISCRETE#
ADT_TYPE
PROCHOT_EC
DISCRETE#
VGA_THRM
EC_SPI_DO_C
EC_SPI_CLK_C
BAT_SCL
BAT_SDA
ECSWI#_KBC
PECI
KCOL0
ECRST#
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KROW0
KROW1
KCOL1
KROW2
KCOL2
KROW3
KCOL3
KCOL4
KROW4
KROW5
KCOL5
KCOL6
KROW6
KROW7
KCOL7
KCOL8
KBC_VCORF
BLUETOOTH_EN
ECSCI#_KBC
ECSWI#_KBC
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
EC_VTT
AD_OFF
STOP_CHG#
CHG_ON#
PCIE_RST#
WIRELESS_LED_OFF#
ADT_TYPE
PROCHOT_EC
BAT_IN#
EC_GPIO72
S5_ENABLE
EC_SPI_DI_C
EC_ENABLE
KBC_ON#_R
EC_GPIO6
PLT_RST#_EC
EC_GPIO95
ECRST#
PCB_VER_AD
EC_ENABLE
EC_SPI_CS#_C
AC_IN_KBC
KBC_ON#_GATE
KCOL17
H_PROCHOT#_EC
PCIE_RST#
EC_GPIO72
ECSCI#_KBC
HDMI_IN#
PURE_HW_SHUTDOWN#
PURE_HW_SHUTDOWN#
ECRST#
3D3V_AUX_KBC
3D3V_AUX_S5
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_KBC
3D3V_S0
3D3V_AUX_KBC
3D3V_AUX_KBC
1D05V_VTT
3D3V_S0
3D3V_AUX_S5
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_KBC
RTC_AUX_S5
3D3V_AUX_S5
3D3V_AUX_S53D3V_AUX_S5
KBC_PWRBTN#82
AD_OFF38
DBC_EN49
WLAN_TEST_LED68
BAT_IN#39
AD_IA40
PM_SLP_S3#19,36,37,47,92
KBC_BEEP29TPCLK 69
TPDATA 69
USB_PWR_EN#61,82
EC_SCI#22
EC_SWI#20
PM_SLP_S4#19,46
RSMRST#_KBC19
BLON_OUT 49
SUS_PWR_ACK19
PCH_SUSCLK_KBC19
PLT_RST# 5,18,31,36,65,66,71,82,97
PWRLED68
ME_UNLOCK21
BRIGHTNESS94
H_PECI5,22
KCOL[0..16] 69
KROW[0..7] 69
FAN1_PWM28
H_A20GATE 22
LID_CLOSE#70
BAT_SDA 39,40
BAT_SCL 39,40
STOP_CHG#40
WIFI_RF_EN65
PM_CLKRUN# 19
LPC_FRAME# 21,71
INT_SERIRQ 21
LPC_AD[0..3] 21,71
S5_ENABLE36,97
E51_RxD65
E51_TxD65
PANEL_BLEN 94
AC_PRESENT19
3G_EN66
BLUETOOTH_EN63,65
CLK_PCI_KBC 18
SML1_DATA 20,86
SML1_CLK 20,86
PCH_TEMP_ALERT# 22
STDBY_LED68
PM_PWRBTN#19,97
H_RCIN# 22
SPI_CLK_R 21,60
SPI_SI_R 21,60
SPI_SO_R 21,60
SPI_CS0#_R 21,60
CHARGE_LED68
FAN_TACH128
T8_THERM28
SYS_THRM28
S0_PWR_GOOD19,42
AC_OK40
DC_BATFULL68
CRT_DEC# 50
KCOL17 69
CHG_ON# 40
ALL_POWER_OK37,42,48
WIRELESS_LED_OFF# 68
HDMI_IN# 51
PURE_HW_SHUTDOWN#28,36
FAN_TACH1 28
H_PROCHOT# 5,42
Wireless_SW 82
EC_GPIO9560
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
KBC Nuvoton NPCE795
Custom
27 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
KBC Nuvoton NPCE795
Custom
27 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
KBC Nuvoton NPCE795
Custom
27 102
Thursday, December 02, 2010
HR UMA
Reserved
1.3VReserved 100.0K
ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
N/A65W
90W
3.3V
0V
30W
100.0K
0.3V
40W
100.0K
20.0K
10.0K
47.0K
64.9K
0.55V
120W 0.82V33.0K
1.06V
100.0K
N/A
0604 Modify:
Add Pull down 100k ohm at F_SDI for Power consumption concern.
Reserved
47.0K
1.65VReserved
64.9K
65W_90W#
High: 65W / Low 90W
DISCRETE#
High: UMA / Low: Discrete
<------PCH / EDP
<------ BATTERY / CHARGER
76.8
SSID = KBC
100.0K
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
0628 Modify:
Move R2771 to closed 3D3V_AUX_KBC power
rail base on layout placement.
NO PSL SOLUTION
C2716 need very close to EC
JE40 delete AMP function
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR
EC_GPIO47 High Active
PULL-HIGH RESISTOR VOLTAGE
100.0K
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
<------ TP
SA
SB
3.0V
2.75V
PSL SOLUTION
(Power Switch Control Logic)
SC
100.0K
2.48V
EC GPIO standard PH/PL
0604 Modify:
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.
-1
100.0K
100.0K
100.0K
100.0K
100.0K
10.0K
2.24V
-1M
20.0K
2.0V
33.0K
1.87V
100.0K
100.0K
0604 Modify:
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.
100.0K
JE40 delete USB Charger function
JE40 modify
JE40 VGA_THRM
ڕ࣠ฝೈ
PLS function
૞ޏګ
pull high 3D3V_AUX_S5
0806 chagne GND
SB modify R2756 stuff, R2760 change DY
Prevent BIOS data loss
-1M
SB LID_CLOSE# can not pull high, because push pull
suggest RN2708 Pin5 change FAN_TACH1
SB EC_AGND , change GND
SB to -1
SB to -1
SB to -1 default active Low
R2710
10KR2J-3-GP
UMA
R2710
10KR2J-3-GP
UMA
12
C2706
SCD1U10V2KX-5GP
C2706
SCD1U10V2KX-5GP
12
R2721 43R2J-GPR2721 43R2J-GP
1 2
RN2707
SRN100KJ-6-GP
RN2707
SRN100KJ-6-GP
1
2 3
4
C2711
Do Not Stuff
DY
C2711
Do Not Stuff
DY
1 2
R2739
Do Not Stuff
DIS_PX_Muxless
R2739
Do Not Stuff
DIS_PX_Muxless
12
R2774
Do Not Stuff
DY
R2774
Do Not Stuff
DY
1 2
R2733
Do Not Stuff
R2733
Do Not Stuff
1 2
Q2702
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q2702
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
G
S
D
RN2709
SRN10KJ-5-GP
RN2709
SRN10KJ-5-GP
1
2 3
4
C2709
Do Not Stuff
DY
C2709
Do Not Stuff
DY
12
R2769
100KR2J-1-GP
R2769
100KR2J-1-GP
12
1 OF 2
U2701A
NPCE795PA0DX-GP-U
1 OF 2
U2701A
NPCE795PA0DX-GP-U
VREF
104
GPIO90/AD0
97
GPIO91/AD1
98
GPIO92/AD2
99
GPIO93/AD3
100
GPIO94/DA0
101
GPIO95/DA1
105
GPIO96/DA2
106
GPIO2
79
GPIO3/AD6
95
GPIO4/AD5
96
GPIO5/AD4
108
PSL_IN2#_GPIO6
93
GPIO7/AD7
94
GPIO16
114
GPIO24
6
GPIO30
109
GPIO34/CIRRXL
14
GPIO41
80
GPIO42/TCK
17
GPIO43/TMS
20
GPIO44/TDI
21
GPIO46/CIRRXM/TRST#
23
GPIO51
26
PSL_IN1_GPIO70
73
PSL_OUT_GPIO71
74
VBKUP
75
GPIO75
82
GPO76/SHBM
83
GPIO77
84
GPIO81
91
GPO82/IOX_LDSH/TEST#
110
GPIO84/IOX_SCLK/XORTR#
112
GPIO97
107
GPIO36
15
VCORF
44
GND
18
GND
45
GND
78
GND
89
GND
116
GND
5
AGND
103
GPIO11/CLKRUN#
8
LAD3
1
LAD2
128
LAD1
127
LAD0
126
LFRAME#
3
LCLK
2
LRESET#
7
SERIRQ
125
GPIO85/GA20
121
KBRST#/GPIO86
122
ECSCI#/GPIO54
29
GPIO65/SMI#
9
GPIO10/LPCPD#
124
GPIO67/PWUREQ#
123
GPIO37/PSCLK1
72
GPIO26/PSCLK2
10
GPIO35/PSDAT1
71
GPIO27/PSDAT2
11
GPIO50/PSCLK3/TDO
25
GPIO52/PSDAT3/RDY#
27
GPIO17/SCL1
70
GPIO73/SCL2
67
GPIO23/SCL3
119
GPIO22/SDA1
69
GPIO74/SDA2
68
GPIO31/SDA3
120
GPIO47/SCL4
24
GPIO53/SDA4
28
F_SDI/F_SDIO1
86
F_SDIO/F_SDIO0
87
F_SCK
92
F_CS0#
90
VCC
19
VCC
46
VCC
76
VCC
88
VCC
115
AVCC
102
VDD
4
C2701
SC2D2U10V3KX-1GP
C2701
SC2D2U10V3KX-1GP
12
R2704
330KR2J-L1-GP
R2704
330KR2J-L1-GP
1 2
R2722 33R2J-2-GPR2722 33R2J-2-GP
12
R2707
100KR2F-L1-GP
65W
R2707
100KR2F-L1-GP
65W
12
R2756
Do Not Stuff
R2756
Do Not Stuff
1 2
R2735
Do Not Stuff
R2735
Do Not Stuff
1 2
2 OF 2
U2701B
NPCE795PA0DX-GP-U
2 OF 2
U2701B
NPCE795PA0DX-GP-U
GPIO56/TA1
31
GPIO20/TA2
117
GPIO14/TB1
63
GPIO01/TB2
64
GPIO15/A_PWM
32
GPIO21/B_PWM
118
GPIO13/C_PWM
62
GPIO32/D_PWM
65
GPIO66/G_PWM
81
GPIO33/H_PWM
66
GPIO45/E_PWM
22
GPIO40/F_PWM
16
VCC_POR#
85
GPIO83/SOUT_CR/TRIST#
111
GPIO87/CIRRXM/SIN_CR
113
GPIO00/EXTCLK
77
GPIO55/CLKOUT/IOX_DIN_DIO
30
PECI
13
VTT
12
KBSOUT0/JENK#
53
KBSOUT1/TCK
52
KBSOUT2/TMS
51
KBSOUT3/TDI
50
KBSOUT4/JEN0#
49
KBSOUT5/TDO
48
KBSOUT6/RDY#
47
KBSOUT7
43
KBSOUT8
42
KBSOUT9/SDP_VIS#
41
KBSOUT10/P80_CLK
40
KBSOUT11/P80_DAT
39
KBSOUT12/GPIO64
38
KBSOUT13/GPIO63
37
KBSOUT14/GPIO62
36
KBSOUT15/GPIO61/XOR_OUT
35
GPIO60/KBSOUT16
34
GPIO57/KBSOUT17
33
KBSIN0
54
KBSIN1
55
KBSIN2
56
KBSIN3
57
KBSIN4
58
KBSIN5
59
KBSIN6
60
KBSIN7
61
TP2715Do Not Stuff TP2715Do Not Stuff
1
C2703
Do Not Stuff
DY
C2703
Do Not Stuff
DY
12
C2704
SCD1U10V2KX-5GP
C2704
SCD1U10V2KX-5GP
12
G
D
Q2703
Do Not Stuff
2ND = 84.03413.A31
Do Not Stuff
PSL
G
D
Q2703
Do Not Stuff
2ND = 84.03413.A31
Do Not Stuff
PSL
S
D
G
C2705
Do Not Stuff
DY
C2705
Do Not Stuff
DY
12
R2768
Do Not Stuff
R2768
Do Not Stuff
1 2
TP2705Do Not Stuff TP2705Do Not Stuff
1
C2707
SCD1U10V2KX-5GP
C2707
SCD1U10V2KX-5GP
12
R2701
100KR2F-L1-GP
90W
R2701
100KR2F-L1-GP
90W
12
33R2J-2-GPR2736 33R2J-2-GPR2736
12
RN2708
SRN10KJ-6-GP
RN2708
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
R2758
Do Not Stuff
R2758
Do Not Stuff
1 2
RN2701
SRN4K7J-8-GP
RN2701
SRN4K7J-8-GP
1
2 3
4
RN2705
SRN10KJ-6-GP
RN2705
SRN10KJ-6-GP
1
2
3
4 5
6
7
8
R2759
Do Not Stuff
R2759
Do Not Stuff
1 2
TP2709Do Not Stuff TP2709Do Not Stuff
1
RN2706
Do Not Stuff
PSL
RN2706
Do Not Stuff
PSL
1
23
4
R2705
10KR2J-3-GP
R2705
10KR2J-3-GP
12
R2772
Do Not Stuff
R2772
Do Not Stuff
1 2
R2726
100KR2F-L1-GP
R2726
100KR2F-L1-GP
12
R2737 0R2J-2-GPR2737 0R2J-2-GP
12
C2713
Do Not Stuff
PSL
C2713
Do Not Stuff
PSL
12
R2770
1KR2J-1-GP
R2770
1KR2J-1-GP
1 2
R2720
Do Not Stuff
R2720
Do Not Stuff
1 2
C2708
Do Not Stuff
DY
C2708
Do Not Stuff
DY
12
Q2705
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
PSL
Q2705
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
PSL
G
S
D
R2760
Do Not Stuff
DY
R2760
Do Not Stuff
DY
1 2
U2702
Do Not Stuff
DY
Do Not Stuff
U2702
Do Not Stuff
DY
Do Not Stuff
GND
1
RESET#
2
VCC
3
R2775
100KR2J-1-GP
R2775
100KR2J-1-GP
12
33R2J-2-GPR2719 33R2J-2-GPR2719
12
TP2701 Do Not StuffTP2701 Do Not Stuff
1
R2773
100KR2J-1-GP
R2773
100KR2J-1-GP
12
R2757
470R2J-2-GP
R2757
470R2J-2-GP
12
C2715
Do Not Stuff
DY
C2715
Do Not Stuff
DY
12
C2702
SCD1U10V2KX-5GP
C2702
SCD1U10V2KX-5GP
12
D2701
Do Not Stuff
Do Not Stuff
2nd = 83.BAT54.N81
3nd = 83.00054.T81
DY
D2701
Do Not Stuff
Do Not Stuff
2nd = 83.BAT54.N81
3nd = 83.00054.T81
DY
1
2
3
R2767
Do Not Stuff
DY
R2767
Do Not Stuff
DY
1 2
C2710
SCD1U10V2KX-5GP
C2710
SCD1U10V2KX-5GP
12
R2724
64K9R2F-1-GP
R2724
64K9R2F-1-GP
12
G2701
Do Not Stuff
G2701
Do Not Stuff
2 1
C2712
SC1U10V3ZY-6GP
C2712
SC1U10V3ZY-6GP
12
C2717
Do Not Stuff
DY
C2717
Do Not Stuff
DY
12
C2714 Do Not Stuff
DY
C2714 Do Not Stuff
DY
1 2
C2716
SCD1U16V2KX-3GP
C2716
SCD1U16V2KX-3GP
12
R2732
100KR2J-1-GP
R2732
100KR2J-1-GP
12
Q2701
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
Q2701
MMBT3906-4-GP
2nd = 84.03906.F11
84.T3906.A11
C
B
E
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
FAN_TACH1_C
FAN1_PWM_C
P2800_DXP
THERM_SYS_SHDN# ADJ
P2800_DXN
FAN_TACH1_C
ADJ
THERM_SYS_SHDN#
5V_S0
3D3V_S0
3D3V_AUX_S5
3D3V_S0
3D3V_S0
3D3V_S0
5V_S0
3D3V_S0
3D3V_DAC_S0
FAN1_PWM27
T8_THERM 27
SYS_THRM 27
FAN_TACH127
PURE_HW_SHUTDOWN#27,36
IMVP_PWRGD 36,42
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Thermal P2800/Fan Controllor P2793
Custom
28 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Thermal P2800/Fan Controllor P2793
Custom
28 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Thermal P2800/Fan Controllor P2793
Custom
28 102
Thursday, December 02, 2010
HR UMA
SSID = Thermal
Thermal sensor P2800
Fan controller P2793
For PWM FAN
Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.
1.H/W T8 Shutdown
2.System Sensor, Put on palm rest
*Layout* 15 mil
JE40 HR modify
VGA Thermal sensor P2800
SMBUS modify to Page 84
SB modify R2803,R2804 setting
SB to -1
D2802
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
D2802
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
21
C2808
SCD1U10V2KX-5GP
C2808
SCD1U10V2KX-5GP
12
R2809
100KR2J-1-GP
R2809
100KR2J-1-GP
12
R2805
Do Not Stuff
DY
R2805
Do Not Stuff
DY
12
C2809
SC4D7U6D3V3KX-GP
C2809
SC4D7U6D3V3KX-GP
12
C2811
Do Not Stuff
DY
C2811
Do Not Stuff
DY
12
R2803
107KR2F-GP
R2803
107KR2F-GP
12
R2811
Do Not Stuff
R2811
Do Not Stuff
1 2
C2802
SCD1U10V2KX-5GP
C2802
SCD1U10V2KX-5GP
12
R2807
Do Not Stuff
DY
R2807
Do Not Stuff
DY
1 2
R2804
226KR2F-GP
R2804
226KR2F-GP
12
C2807
SC2200P50V2KX-2GP
C2807
SC2200P50V2KX-2GP
12
C2805
SCD1U10V2KX-5GP
C2805
SCD1U10V2KX-5GP
12
R2806
Do Not Stuff
R2806
Do Not Stuff
1 2
C2806
SC470P50V3JN-2GP
C2806
SC470P50V3JN-2GP
12
R2812
Do Not Stuff
DY
R2812
Do Not Stuff
DY
12
C2815
Do Not Stuff
DY
C2815
Do Not Stuff
DY
1 2
FAN1
ACES-CON4-4-GP
20.F0765.004
2nd = 20.F1808.004
3rd = 20.F1426.004
FAN1
ACES-CON4-4-GP
20.F0765.004
2nd = 20.F1808.004
3rd = 20.F1426.004
4
3
2
1
5 6
D2801
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
D2801
CH551H-30PT-GP
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
83.R5003.C8F
21
Q2801
PMBS3904-1-GP
84.03904.L06
Q2801
PMBS3904-1-GP
84.03904.L06
3
1
2
R2810
Do Not Stuff
DY
R2810
Do Not Stuff
DY
1 2
D2803
Do Not Stuff
2ND = 83.BAT54.D81
Do Not Stuff
DY
3rd = 83.BAT54.S81
D2803
Do Not Stuff
2ND = 83.BAT54.D81
Do Not Stuff
DY
3rd = 83.BAT54.S81
1
2
3
U2801
P2800EA1-GP
74.02800.A71
U2801
P2800EA1-GP
74.02800.A71
VCC
5
DXP
6
DXN
7
OTZ
8
GND
2
ADJ
1
TDL
3
TDR
4
Q2802
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
Q2802
2N7002K-2-GP
84.2N702.J31
2ND = 84.2N702.031
G
S
D
C2801
Do Not Stuff
DY
C2801
Do Not Stuff
DY
12
R2808
Do Not Stuff
DY
R2808
Do Not Stuff
DY
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMBO_MIC_R
INT_MIC1_R
ALC268_SENSE_A
AUDIO_PC_BEEP
SPKR_SB_1
KBC_BEEP_1AUDIO_BEEP
MIC1-R_PORT-B
MIC2-R_PORT-B
AUD_CBN
AUDIO_PC_BEEP
MIC1-VREFO_R
MIC1-VREFO_L
HP_OUT_R_AUD
AUD_3VD_R
EAPD
HP_OUT_L_AUD
MIC2V
MIC1-L_PORT-B
MIC2-L_PORT-B
AC97_DATIN
VREF
JDREF
LDO_CAP_AUDIO
AUD_CBP
AUD_MIC_L
CPVEE
AUD_MIC_R
ACZ_BITCLK_AUDIO_+
COMBO_MIC_JD#
MIC2V
MIC2V
ALC268_SENSE_B
COMBO_MIC
LIN2-R_PORT-B
LIN2-L_PORT-B
EAPD
PD#
EAPD PD#
MIC_IN_L
MIC_IN_R
HDA_CODEC_SDOUT
HDA_CODEC_BITCLK
COMBO_MIC_JD#
COMBO_MIC_Q
INT_MIC_L_R
AUD_AGND
5V_S0
AUD_AGND
AUD_AGND
3D3V_S0
5VA_S0
AUD_AGND
5V_S0
3D3V_S0
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
AUD_AGND
3D3V_S0
1D5V_S0
5VA_S0
5V_S0
5V_S0
3D3V_S05V_S0
3D3V_S0
5VA_S0
AUD_AGND
AUD_AGND
INT_MIC_L_R 49,97
AUD_HP1_JD# 82
HDA_CODEC_BITCLK21
AUD_SPK_L+82
KBC_BEEP 27
HDA_SPKR 21
AUD_SPK_R+82
HDA_CODEC_RST# 21
HDA_CODEC_SYNC 21
AUD_SPK_R-82
HDA_CODEC_SDOUT21
MIC_IN_R 82
MIC_IN_L 82
HDA_SDIN021
AUD_SPK_L-82
AUD_HP1_JACK_R282
AUD_HP1_JACK_L282
COMBO_MIC 82
EXT_MIC_JD# 82
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Audio Codec
A3
29 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Audio Codec
A3
29 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
JE40-HR
-1
Audio Codec
A3
29 102
Thursday, December 02, 2010
HR UMA
CLOSE TO PIN1 and 9
CLOSE TO PIN18
CLOSE TO PIN35
CLOSE TO PIN34
CLOSE TO PIN19
CLOSE TO PIN39 and 46
MIC2V Ref voltage is 2.5V
becasue Vgs(th)concern
cann't use 2N702 for desing
Max Vgs(th) 1.8V
ANALOG
DIGITAL
(include thermal pad) Spilt by DGND
CLOSE TO PIN38
SB modify
SB
SB
-1 PVDD timeing
Ꮑ૞ֺ
AVDD
ඡ
,
ࠌش
PW 74.00545.079
װၲ
vensor suggest ,
Ꮑ૞ᖄԵႯ
C2928
SC10U10V5KX-2GP
C2928
SC10U10V5KX-2GP
12
C2924 SC1U25V3KX-1-GPC2924 SC1U25V3KX-1-GP
1 2
C2904
SCD1U10V2KX-5GP
C2904
SCD1U10V2KX-5GP
12
R2917
2K2R2J-2-GP
R2917
2K2R2J-2-GP
1 2
R2919
Do Not Stuff
R2919
Do Not Stuff
1 2
C2907
SCD1U10V2KX-5GP
C2907
SCD1U10V2KX-5GP
12
C2909
Do Not Stuff
DY
C2909
Do Not Stuff
DY
12
C2912
SC2D2U10V3KX-1GP
C2912
SC2D2U10V3KX-1GP
12
RN2903
SRN4K7J-8-GP
RN2903
SRN4K7J-8-GP
1
23
4
R2905
Do Not Stuff
R2905
Do Not Stuff
1 2
R2921
Do Not Stuff
DY
R2921
Do Not Stuff
DY
1 2
R2914
33R2J-2-GP
R2914
33R2J-2-GP
1 2
R2927
22K1R2F-L-GP
R2927
22K1R2F-L-GP
12
R2909
20KR2F-L-GP
R2909
20KR2F-L-GP
12
R2902
0R2J-2-GP
DY
R2902
0R2J-2-GP
DY
1 2
C2918 SC2D2U10V3KX-1GPC2918 SC2D2U10V3KX-1GP
1 2
RN2904
SRN68J-5-GP
RN2904
SRN68J-5-GP
1
2 3
4
R2925
Do Not Stuff
R2925
Do Not Stuff
1 2
.
.
.
.
.
Q2902
Do Not Stuff
Do Not Stuff
.
.
.
.
.
Q2902
Do Not Stuff
Do Not Stuff
G
S
D
R2922
2D2R3J-2-GP
R2922
2D2R3J-2-GP
1 2
C2921
SC1U6D3V2KX-GP
C2921
SC1U6D3V2KX-GP
12
Q2901
BSS138-7F-GP
2ND = 84.00138.H31
84.00138.F31
Q2901
BSS138-7F-GP
2ND = 84.00138.H31
84.00138.F31
G
DS
R2906
4K7R2J-2-GP
R2906
4K7R2J-2-GP
12
C2927
SC1U10V3KX-4GP
C2927
SC1U10V3KX-4GP
12
C2917 SC2D2U10V3KX-1GPC2917 SC2D2U10V3KX-1GP
1 2
C2926
Do Not Stuff
DY
C2926
Do Not Stuff
DY
12
R2908 20KR2F-L-GPR2908 20KR2F-L-GP
1 2
RN2902
SRN1KJ-4-GP
RN2902
SRN1KJ-4-GP
1
2
3
4 5
6
7
8
G2901
Do Not Stuff
G2901
Do Not Stuff
1 2
R2915
22R2J-2-GP
R2915
22R2J-2-GP
1 2
C2910
SCD1U10V2KX-5GP
C2910
SCD1U10V2KX-5GP
12
C2922
SC100P50V2JN-3GP
C2922
SC100P50V2JN-3GP
12
R2926
10KR2J-3-GP
R2926
10KR2J-3-GP
12
U2902
G9091-475T12U-GP
74.09091.F3F
2ND = 74.09198.A7F
U2902
G9091-475T12U-GP
74.09091.F3F
2ND = 74.09198.A7F
EN
1
GND
2
VIN
3
VOUT
4
NC#5
5
C2919 SC2D2U10V3KX-1GPC2919 SC2D2U10V3KX-1GP
1 2
G2903
Do Not Stuff
G2903
Do Not Stuff
1 2
RN2905
Do Not Stuff
RN2905
Do Not Stuff
1
23
4
C2925 SC1U25V3KX-1-GPC2925 SC1U25V3KX-1-GP
1 2
R2924
Do Not Stuff
DY
R2924
Do Not Stuff
DY
1 2
R2907 39K2R2F-L-GPR2907 39K2R2F-L-GP
1 2
R2920
20KR2F-L-GP
R2920
20KR2F-L-GP
1 2
C2920 SC2D2U10V3KX-1GPC2920 SC2D2U10V3KX-1GP
1 2
RN2901
SRN47K-2-GP-U
RN2901
SRN47K-2-GP-U
1
23
4
C2916
SCD1U10V2KX-5GP
C2916
SCD1U10V2KX-5GP
1 2
RFC2902
Do Not Stuff
DY
RFC2902
Do Not Stuff
DY
12
C2903
SC10U6D3V3MX-GP
C2903
SC10U6D3V3MX-GP
12
C2913
SCD1U10V2KX-5GP
C2913
SCD1U10V2KX-5GP
12
U2901
ALC271X-VB3-GR-GP
71.00271.A03
U2901
ALC271X-VB3-GR-GP
71.00271.A03
AVDD2
38
PVDD1
39
SPK-OUT-L+
40
SPK-OUT-L-
41
PVSS1
42
PVSS2
43
SPK-OUT-R-
44
SPK-OUT-R+
45
PVDD2
46
EAPD
47
SPDIFO
48
GND
49
DVDD
1
GPIO0/DMIC-DATA
2
GPIO1/DMIC-CLK
3
PD#
4
SDATA-OUT
5
BCLK
6
DVSS
7
SDATA-IN
8
DVDD-IO
9
SYNC
10
RESET#
11
PCBEEP
12
SENSE_A
13
LINE1-R/PORT-C-R
24
LINE1-L/PORT-C-L
23
MIC1-R/PORT-B-R
22
MIC1-L/PORT-B-L
21
MONO-OUT
20
JDREF
19
SENSE_B
18
MIC2-R/PORT-F-R
17
MIC2-L/PORT-F-L
16
LINE2-R/PORT-E-R
15
LINE2-L/PORT-E-L
14
AVSS2
37
CBP
36
CBN
35
CPVEE
34
HPOUT-R/PORT-I-R
33
HPOUT-L/PORT-I-L
32
MIC1-VREFO-L
31
MIC1-VREFO-R
30
MIC2-VREFO
29
LDO-CAP
28
VREF
27
AVSS1
26
AVDD1
25
C2914
SC10U6D3V5KX-1GP
C2914
SC10U6D3V5KX-1GP
1 2
RFC2901
Do Not Stuff
DY
RFC2901
Do Not Stuff
DY
12
C2906
SC10U6D3V3MX-GP
C2906
SC10U6D3V3MX-GP
12
C2911
SC2D2U10V3KX-1GP
C2911
SC2D2U10V3KX-1GP
1 2
R2904
Do Not Stuff
R2904
Do Not Stuff
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Audio AMP
A4
30 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Audio AMP
A4
30 102
Thursday, December 02, 2010
HR UMA
Title
Size Document Number Rev
Date: Sheet
of
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
-1
Audio AMP
A4
30 102
Thursday, December 02, 2010
HR UMA
AUDIO OP AMPLIFIER
JE40 delete AMP function
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