Wistron JM70-MV, Aspire 7535, Aspire 7535ZG, Aspire 7735, Aspire 7735G Schematic

5

JM70 -MV Block Diagram

D D

C C

32

INT.SUBWOOFER

LINE IN

32

Int MIC

32

MIC In

32

B B

INT.SPKR

1.5W

32

Line Out (SPDIF)

RJ11

CLK GEN.

ICS9LPRS365BKLFT

3

DDR3

800/1066 MHz

16,17

DDR3

800/1066 MHz

SUBWOOFER AMP

G1442RD

Codec

ALC888

OP AMP

G1454R

MODEM

MDC Card

16,17

32

30

31

34

AZALIA

HDD SATA

ODD SATA

ESATA

4

Mobile CPU

Penryn

4, 5

HOST BUS 667/800/1066MHz@1.05V

Cantiga

AGTL+ CPU I/F DDR Memory I/F

INTEGRATED GRAHPICS

X4 DMI 400MHz

LVDS, CRT I/F

6,7,8,9,10,11

C-Link0

ICH9M

6 PCIe ports

PCI/PCI BRIDGE

ACPI 2.0 4 SATA

12 USB 2.0/1.1 ports

ETHERNET (10/100/1000MbE)

High Definition Audio

LPC I/F

Serial Peripheral I/F

Matrix Storage Technology(DO)

Active Managemnet Technology(DO)

12,13,14,15

SATA

25

Mini USB

22

Blue Tooth

Finger

24

Printer

USB

26

41

PCIex16

USB

PCIe

LPC BUS

Camera

USB 4 Port

SMSC

EMC2102

38

VGA Borad

(MXM 3.0 Connector)

CardBus

AU6433

BCM5764MKMLG

New Card

19

27

3

18

LAN

Giga LAN

KBC

Winbond

WPCE773LA0DG

Touch Pad

41 39

Level shift PS8101

MS/MS Pro/xD

35 35

/MMC/SD

TXFM RJ45

28

PWR SW TPS2231

36 36

Mini 1 Card Wire LAN

Mini 2 Card TV TUNER

SPI

39

INT. KB

BIOS (2MB)

MEDIA KEY

37

40

42

29 29

LPC

DEBUG

40

CONN.

HDMI

LCD

CRT

2

Project code: 91.4AN01.001 PCB P/N : 48.4AN01.0SA REVISION : SB 08246

21

19

20

PCB STACKUP

TOP

GND

S

GND

BOTTOM

1

SYSTEM DC/DC

ISL62392

INPUTS

DCBATOUT

SYSTEM DC/DC

TPS51124

INPUTS OUTPUTS

DCBATOUT

RT9026

1.5V_S3

G9198-15

3D3V_S5 1D5V_S5

CHARGER

DCBATOUT

CPU DC/DC

INPUTS

DCBATOUT

GFX DC/DC

INPUTS

DCBATOUT

OUTPUTS

5V_S5(6A) 3D3V_S5(7A) 5V_AUX_S5 3D3V_AUX_S5

1D05V_S0(10A) 1D5V_S3(10A)

DDR_VREF_S3 (1.2A)

(300mA)

ISL88731A

OUTPUTSINPUTS

CHG_PWR

18V 6.0A

ADP3208C

OUTPUTS VCC_CORE

0~1.3V 38A

ISL6263

OUTPUTS

VCC_GFXCORE

0~1.3V

6.5A

46

49

14

50

51

48

SATA

2nd HDD

A A

23

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BLOCK DIAGRAM

Size Document Number Rev

Size Document Number Rev A2

A2

A2 Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

JM70-MV

1

SB

155Saturday, December 20, 2008

SB

of

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

HDA_SYNC

4 4

GNT2#/ GPIO53

GPIO20 GNT1#/

GPIO51

GNT3#/ GPIO55

GNT0#: SPI_CS1#/ GPIO58

SPI_MOSI

3 3

GPIO49

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK _EN#

Usage/When Sampled

XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK

PCIE config1 bit0, Rising Edge of PWROK.

PCIE config2 bit2, Rising Edge of PWROK.

Reserved ESI Strap (Server Only)

Rising Edge of PWROK

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.

Integrated TPM Enable, Rising Edge of CLPWROK

DMI Termination Voltage, Rising Edge of PWROK.

PCI Express Lane Reversal. Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK

Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down

This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)

This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.

ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.

The signal is required to be low for desktop applications and required to be high for mobile applications.

Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.

This signal should not be pull low unless using XOR Chain testing.

Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

2 2

B

ICH9M Integrated Pull-up

page 92

and Pull-down Resistors

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

C

Cantiga chipset and ICH9M I/O controller Hub strapping configuration

ICH9 EDS 642879 Rev.1.5

PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K

The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller

PULL-DOWN 20K

PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

SDVO_CTRLDATA

D

Montevina Platform Design guide 22339 0.5

Pin Name

CFG[2:0]

CFG[4:3] CFG8 CFG[15:14] CFG[18:17]

CFG5 CFG6

CFG7

CFG9

CFG10 PCIE Loopback enable

CFG[13:12]

CFG16

CFG19

CFG20

L_DDC_DATA

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.

Strap Description

FSB Frequency Select

Reserved

DMI x2 Select iTPM Host

Interface

Intel Management engine Crypto strap

PCIE Graphics Lane

XOR/ALL

FSB Dynamic ODT

DMI Lane Reversal

Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe

SDVO Present

Local Flat Panel (LFP) Present

Configuration

000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved

0 = DMI x2

1 = DMI x4

0= The iTPM Host Interface is enabled(Note2)

1=The iTPM Host Interface is disalbed(default)

0 = Transport Layer Security (TLS) cipher suite with no confidentiality

1 = TLS cipher suite with confidentiality (default)

0 = Reverse Lanes,15->0,14->1 ect..

1= Normal operation(Default):Lane Numbered in order

0 = Enable (Note 3)

1= Disabled (default)

00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)

11 = Disabled (default)

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled 0 = Normal operation(Default):

Lane Numbered in Order

1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)

0 = Only Digital Display Port or PCIE is operational (Default)

1 =Digital display Port and PCIe are operting simulataneously via the PEG port

0 =No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1= LFP Card Present; PCIE disabled

E

page 218

(Default)

UMA

1 1

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

Reference

JM70-MV

of

255Saturday, December 20, 2008

SB

A

3D3V_S0

3D3V_48MPWR_S0 3D3V_CLKPLL_S0

R383

12

0R0603-PAD

4 4

DY

12

C556

Do Not Stuff

C555

SCD1U16V2ZY-2GP

12

C560

SC1U16V3ZY-GP

1D05V_S0

3D3V_S0

2008.12.08 SB

CL=20pF±0.2pF

C260

1 2

SC33P50V2JN-3GP

C238

1 2

SC27P50V2JN-2-GP

45 3 2 1

8 7 6

12

DY

CPU_SEL2_R PCLKCLK4

PCLKCLK5

EC56

SC27P50V2JN-2-GP

PCLKCLK2

CPU_SEL2_R PCLKCLK4 PCLKCLK5

EC61

SC10P50V2JN-4GP

Do Not Stuff

12

DY

3D3V_S0

RN57

3 3

2 2

CPU_SEL24,7

CLK_ICH1413

PCLK_KBC39 PCLK_ICH13

6 7 8

SRN10KJ-6-GP

RN56

1 2 3 4 5

SRN33J-7-GP

EMI capacitor

GEN_XTAL_IN

12

X2

X-14D31818M-44GP

GEN_XTAL_OUT_R

82.30005.951

2nd = 82.30005.891

CLK48 PCLKCLK2 PCLKCLK4 PCLKCLK5

EC59

EC57

Do Not Stuff

12

DY

B

R384

12

0R0603-PAD

DY

R393

12

Do Not Stuff

R158 Do Not Stuff

PCLK_FWH40

DY

R157

1 2

0R0402-PAD

CLK48_Cardreader35

CLK48_ICH13

CPU_SEL04,7

CPU_SEL14,7

12

3D3V_S0

AFTE14P-GP

SCD1U16V2ZY-2GP

12

C581

C222

R378 22R2J-2-GPR378 22R2J-2-GP R381 22R2J-2-GPR381 22R2J-2-GP R374 2K2R2J-2-GPR374 2K2R2J-2-GP

CLK_PWRGD13

Do Not Stuff

R399 22R2J-2-GPR399 22R2J-2-GP

TP150

1

12

C580

PM_STPCPU#13

SCD1U16V2ZY-2GP

12 12 12

PM_STPPCI#13

SMBC_ICH15,16,17

R403

12

CPU_SEL2_R

12

C199

GEN_XTAL_OUT

SMBD_ICH15,16,17

DY

SCD1U16V2ZY-2GP

12

PCLKCLK2 PCLKCLK3 PCLKCLK4 PCLKCLK5

12

C557

C

SCD1U16V2ZY-2GP

12

C554

C569

3D3V_48MPWR_S0

3D3V_CLKGEN_S0

U54

3

X1

2

X2

CLK48

17

USB_48MHZ/FSLA

45

PCI_STOP#

44

CPU_STOP#

7

SCLK

6

SDATA

63

CK_PWRGD/PD#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SELECT

14

PCI_F5/ITP_EN

64

FSLB/TEST_MODE

5

REF0/FSLC/TEST_SEL

55

NC#55

71.09365.A03

ICS9LPRS365BKLFT-GP-U

2nd = 71.08513.003

D

SCD1U16V2ZY-2GP

12

C226

UMA

2 3 1

4

UMA

3D3V_CLKGEN_S0

SCD1U16V2ZY-2GP

12

C250

RN52

RN52 SRN0J-6-GP

SRN0J-6-GP

4

RN53

1

SRN0J-6-GP

23

SCD1U16V2ZY-2GP

SC4D7U10V5ZY-3GP

12

C582

12

C566

12

C576

CPUT0 CPUC0

SRCT6 SRCC6

SRCT9 SRCC9

SRCT4 SRCC4

C576

61 60

58 57

54 53

51 50

48 47

41 42

40 39

37 38

34 35

31 32

28 29

24 25

20 21

DREFSSCLK_1 DREFSSCLK_1#

DREFCLK_1 DREFCLK_1#

SC4D7U6D3V3KX-GP

3D3V_CLKPLL_S0

33

43

52

4

VDDREF

GND48

18

16

VDD48

GNDPCI

15

46

62

9

23

VDDPCI

VDDSRC

VDDCPU

VDDPLL3

GNDREF

GND

GNDSRC

1

22

30

36

49

56

19

27

VDD96_IO

VDDSRC_IO

VDDPLL3_IO

27MHZ_NONSS/SRCT1/SE1

GND

GNDSRC

GNDCPU

26

59

65

VDDCPU_IO

CPUT1_F CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT10 SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

27MHZ_SS/SRCC1/SE2

SRCT0/DOTT_96

SRCC0/DOTC_96

GND

E

R402

0R0603-PAD

SCD1U16V2ZY-2GP

12

C239

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13

CLK_PCIE_NEW 36 CLK_PCIE_NEW# 36

CLK_PCIE_MINI1 37 CLK_PCIE_MINI1# 37

CLK_PCIE_LAN 28 CLK_PCIE_LAN# 28

CLK_PCIE_PEG 18 CLK_PCIE_PEG# 18

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

CLK_PCIE_MINI2 37 CLK_PCIE_MINI2# 37

CLK_PCIE_SATA 12 CLK_PCIE_SATA# 12

DREFSSCLK 7 DREFSSCLK# 7

DREFCLK 7 DREFCLK# 7

3D3V_S0

12

ICS9LPRS365YGLFT setting table

PIN NAME DESCRIPTION

Byte 5, bit 7 0 = PCI0 enabled (default)

PCI0/CR#_A

PCI1/CR#_B

PCI2/TME PCI3

1 1

PCI4/27M_SEL PCI_F5/ITP_EN

SRCT3/CR#_C

1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair

Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair

0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed

0 = Pin17 as SRC-1, Pin18 as SRC-1#, Pin13 as DOT96, Pin14 as DOT96# 1 = Pin17 as 27MHz, Pin 18 as 27MHz_SS, Pin13 as SRC-0, Pin14 as SRC-0#

0 =SRC8/SRC8# 1 = ITP/ITP#

Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair

A

B

PIN NAME DESCRIPTION

Byte 5, bit 1 0 = SRC3 enabled (default)

SRCC3/CR#_D

SRCC7/CR#_E

SRCT7/CR#_F

SRCC11/CR#_G

SRCT11/CR#_H

1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair

Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6

Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8

Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9

Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10

C

D

SEL2 FSC

UMA

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

SEL1

SEL0

FSB

FSA

1 0 01 0

01 01

1 01

00 0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Clock Generator

JM70-MV

E

CPU

100M 133M 166M 200M

355Saturday, December 20, 2008

FSB

X 533M 667M 800M

1067M266M

SB

of

SB

A

B

C

D

E

R115

1 2

0R2J-2-GP

TP90AFTE14P-GP TP90AFTE14P-GP TP94AFTE14P-GP TP94AFTE14P-GP

TDI_TDO_M

-BPM1_0

-BPM1_1

-BPM1_2

A

H_A#[35..3]

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_STPCLK#_R

-BPM1_1

-BPM1_0 H_THA_Q H_THC_Q

-BPM1_2

RSVD_CPU_C3

1

RSVD_CPU_D2

1

TDO_2 TDI_1

Close to CPU

C467

DY

Do Not Stuff

R100

1 2

DY

1 2

DY

R105

1 OF 4

CPU1A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU6

62.10079.001

2nd = 62.10053.401

Do Not Stuff

Do Not Stuff Do Not Stuff

Do Not Stuff

TDI_1 TDO_2

ADDR GROUP 0

ADDR GROUP 1

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

ICH

THERMTRIP#

HCLK

RESERVED

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

THRMDA THRMDC

BCLK0 BCLK1

H1 E2 G5

H5 F21 E1

F1 D20

B3 H4 C1

F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6

TDI

AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

TP85 AFTE14P-GPTP85 AFTE14P-GP

1

H_ADS# 6 H_BNR# 6

H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_IERR#

H_INIT# 12 H_LOCK# 6

H_RS#0 H_RS#1 H_RS#2

XDP_BPM#5 XDP_TCK XDP_TDI

XDP_TMS XDP_TRST# XDP_DBRESET#

PM_THRMTRIP-A#_CPU

R362

1 2

Do Not Stuff

QC = 64.10005.6DL

XDP_TMS XDP_TDI XDP_BPM#5

H_CPURST#

XDP_DBRESET#

XDP_TCK XDP_TRST#

H_CPURST# 6,54

H_TRDY# 6 H_HIT# 6

H_HITM# 6

1 1 1

CPU_PROCHOT#_2

H_THERMDA 38 H_THERMDC 38

1 2

0R2J-2-GP

R119

DY

R74 54D9R2F-L1-GPR74 54D9R2F-L1-GP R78 54D9R2F-L1-GPR78 54D9R2F-L1-GP R71 54D9R2F-L1-GPR71 54D9R2F-L1-GP

R106 Do Not Stuff

R116 Do Not Stuff

R73 54D9R2F-L1-GPR73 54D9R2F-L1-GP R70 54D9R2F-L1-GPR70 54D9R2F-L1-GP

All place within 2" to CPU

B

1D05V_S0

H_RS#[2..0] 6

TP52 AFTE14P-GPTP52 AFTE14P-GP TP53 AFTE14P-GPTP53 AFTE14P-GP TP56 AFTE14P-GPTP56 AFTE14P-GP

TP55 AFTE14P-GPTP55 AFTE14P-GP TP54 AFTE14P-GPTP54 AFTE14P-GP TP93 AFTE14P-GPTP93 AFTE14P-GP

CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3

1 2 1 2 1 2

1 2

DY

1 2

DY

1 2 1 2

Place testpoint on

12

1D05V_S0

H_IERR# with a GND

0.1" away

R110

R110 56R2J-4-GP

56R2J-4-GP

QC = 64.49R95.6DL

12

R111

R111 68R2-GP

68R2-GP

R112

1 2

Do Not Stuff

DY

PM_THRMTRIP-A# 7,12,44

PH @ page48

Layout Note: "CPU_GTLREF0"

0.5" max length.

QC = 64.17415.6DL

1D05V_S0

3D3V_S0

H_THERMDA

H_THERMDC

Close to CPU

CPU_PROCHOT#_R 51

should connect toPM_THRMTRIP# without T-ingICH9 and MCH

1D05V_S0

R79

2KR2F-3-GP

1 2

DY

R114 Do Not Stuff

1 2

DY

R113 Do Not Stuff

DY

C

12

1KR2F-3-GP

1KR2F-3-GP R81

R81

1 2 12

C428

12

Do Not Stuff

C514

C514 Do Not Stuff

Do Not Stuff

DY

12

DY

Do Not Stuff

TEST1

TEST2

TEST4

H_D#0

E22

H_D#1

F24

H_D#2

E26

H_D#3

G22

H_D#4

F23

H_D#5

G25

H_D#6

E25

H_D#7

E23

H_D#8

K24

H_D#9

G24

H_D#10

J24

H_D#11

J23

H_D#12

H22

H_D#13

F26

H_D#14

K22

H_D#15

H23

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

TEST1 TEST2

H26 H25

N22 K25 P26 R23 L23 M24 L22 M23 P25 P23 P22 T24 R24 L25 T25 N25 L26 M26 N24

AD26

C23 D25 C24

AF26

AF1 A26

B22 B23 C21

1 1 1 1 1 1 1

J26

H_DSTBN#06 H_DSTBP#06 H_DINV#06

H_DSTBN#16 H_DSTBP#16 H_DINV#16

CPU_GTLREF0

C128

CPU_SEL03,7 CPU_SEL13,7 CPU_SEL23,7

Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals

TEST4

H_DPRSTP# H_DPSLP# H_DPWR# H_PWRGD H_CPUSLP# H_INIT# H_CPURST#

Place these TP on button-side, easy to measure.

2 OF 4

CPU1B

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL0 BSEL1 BSEL2

BGA479-SKT6-GPU6

TP108 AFTE14P-GPTP108 AFTE14P-GP TP99 AFTE14P-GPTP99 AFTE14P-GP TP95 AFTE14P-GPTP95 AFTE14P-GP TP86 AFTE14P-GPTP86 AFTE14P-GP TP96 AFTE14P-GPTP96 AFTE14P-GP TP98 AFTE14P-GPTP98 AFTE14P-GP TP89 AFTE14P-GPTP89 AFTE14P-GP

D

DATA GRP0 DATA GRP1

DATA GRP2DATA GRP3

DSTBN2# DSTBP2#

DSTBN3# DSTBP3#

MISC

DPRSTP#

PWRGOOD

H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]

H_D#32

Y22

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47#

DINV2#

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

DINV3# COMP0

COMP1 COMP2 COMP3

DPSLP#

DPWR#

SLP#

PSI#

Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

UMA

Title

Size Document Number Rev

Date: Sheet of

AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

COMP0 COMP1 COMP2 COMP3

H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

Layout Note:

H_DINV#[3..0] 6 H_DSTBN#[3..0] 6 H_DSTBP#[3..0] 6 H_D#[63..0] 6

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

R305 27D4R2F-L1-GP

1 2

R288 54D9R2F-L1-GP

1 2

R80 27D4R2F-L1-GP

1 2

R82 54D9R2F-L1-GP

1 2

H_DPRSTP# 7,12,51 H_DPSLP# 12 H_DPWR# 6

H_CPUSLP# 6 H_PSI# 51

CPU (1 of 2)

JM70-MV

12

C181

DY

Do Not Stuff

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

QC = 64.24R95.6DL

QC = 64.24R95.6DL QC = 64.49R95.6DL

QC = 64.49R95.6DL QC = 64.24R95.6DL

QC = 64.24R95.6DL QC = 64.49R95.6DL

QC = 64.49R95.6DL

H_PWRGD 12,44

455Saturday, December 20, 2008

SB

H_A#[35..3]6

4 4

H_ADSTB#06 H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#12

H_FERR#12

H_IGNNE#12

H_STPCLK#12

2 2

1D05V_S0

1 1

H_INTR12 H_NMI12 H_SMI#12

H_THA_Q38 H_THC_Q38

H_GTUREF_25

H_THA_Q38

H_THC_Q38

XDP FOR QUAD CORE CPU

R103

1 2

DY

Do Not Stuff

R86

1 2

DY

Do Not Stuff

R94

1 2

DY

Do Not Stuff

R107

1 2

DY

Do Not Stuff

A

VCC_CORE

B

VCC_CORE

C

D

E

12

C132

C133

SCD1U10V2KX-4GP

VCC_CORE

4 4

3 3

AA7

AA10 AA12

1D05V_S0

DY

AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

12

2 2

1 1

CPU1C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC VCC VCC VCC VCC VCC VCC VCC

AB9

VCC VCC VCC VCC VCC VCC VCC VCC

BGA479-SKT6-GPU6

12

C159

C139

Do Not Stuff

3 OF 4

SCD1U10V2KX-4GP

A

VCCSENSE

VSSSENSE

12

C154

SCD1U10V2KX-4GP

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

DY

VCC_CORE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

12

C146

C143

SC4D7U6D3V3KX-GP

Do Not Stuff

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

DY

C171

SCD1U10V2KX-4GP

VCC_SENSE_1

VSS_SENSE_1

12

C158

Do Not Stuff

1D05V_S0_CPU

GAP-CLOSE-PWR

C140

12

VCC_CORE

G8

1 2

SCD1U10V2KX-4GP

H_VID[6..0] 51

12

R67

100R2F-L1-GP-U

12

R68

100R2F-L1-GP-U

12

C173

C130

SCD1U10V2KX-4GP

1D05V_S0

layout note: "1D5V_VCCA_S0" as short as possible

1D5V_VCCA_S0

12

C510

SCD01U16V2KX-3GP

R63

1 2

0R2J-2-GP

QC = 64.12115.6DL

QC = 64.12115.6DL QC = 64.12115.6DL

QC = 64.12115.6DL

R64

1 2

0R2J-2-GP

Layout Note:

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

AA7

R76

0R2J-2-GP

QC = DY

B

12

C129

C122

SC10U6D3V5MX-3GP

Do Not Stuff

QC = 64.10015.6DL

QC = 64.17415.6DL

Do Not Stuff

FCM1608KF-1-GP

1 2

L12

C502

2nd = 68.00248.061

SC10U6D3V5MX-3GP

VCC_SENSE 51

VSS_SENSE 51

VCC_CORE

12

SC10U6D3V5MX-3GP

R99

R104

1D5V_S0

C121

SC10U6D3V5MX-3GP

1D05V_S0

DY

12

C175

12

C119

C123

SC10U6D3V5MX-3GP

QC = 84.00138.F31

C123

SC10U6D3V5MX-3GP

DS

DY

Do Not Stuff

Do Not Stuff Q8

Q8

G

QC = 84.T3904.C11

Do Not Stuff

C

12

C120

C184

SC10U6D3V5MX-3GP

12

C185

SC10U6D3V5MX-3GP

waiting QUAD CORE symbol

H_GTUREF_2 4

3D3V_S5

12

R102

R102 Do Not Stuff

Do Not Stuff

DY

QC = 63.10434.1DL

Q7

R95

DY

B

R95

1 2

Do Not Stuff

C

E

CPU TYPE TABLE

CPU DAUL CORE QUAD CORE

GTLREF_CONTROL

C182

SC10U6D3V5MX-3GP

DY

QC = 63.10334.1DL

SC10U6D3V5MX-3GP

1D05V_S0

R96

R96 Do Not Stuff

Do Not Stuff

DY

QC = 63.10334.1DL

1 2

12

C168

C176

C182

GND PIN

FLOATING PIN

12

C183

C131

SC10U6D3V5MX-3GP

GTLREF_Control

QC = 63.R0034.1DL

QC = DY

H_GTLREF

0V

0.63*VTT

SC10U6D3V5MX-3GP

DY

D

12

C138

TP48AFTE14P-GP TP48AFTE14P-GP

0R2J-2-GP

R92

R92 Do Not Stuff

Do Not Stuff

1 2

DCLKPH_2

R91

R91 0R2J-2-GP

0R2J-2-GP

1 2

SC10U6D3V5MX-3GP

ACLKPH_2

12

R108

4 OF 4

CPU1D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

1

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU6

Title

Size Document Number Rev

Date: Sheet of

P6

VSS

P21

VSS

P24

VSS

R2

VSS

R5

VSS

R22

VSS

R25

VSS

T1

VSS

T4

VSS

T23

VSS

T26

VSS

U3

VSS

U6

VSS

U21

VSS

U24

VSS

V2

VSS

V5

VSS

V22

VSS

V25

VSS

W1

VSS

W4

VSS

W23

VSS

W26

VSS

Y3

VSS

Y6

VSS

Y21

VSS

Y24

VSS

AA2

VSS

AA5

VSS

AA8

VSS

AA11

VSS

AA14

VSS

AA16

VSS

AA19

VSS

AA22

VSS

AA25

VSS

AB1

VSS

AB4

VSS

AB8

VSS

AB11

VSS

AB13

VSS

AB16

VSS

AB19

VSS

AB23

VSS

AB26

VSS

AC3

VSS

AC6

VSS

AC8

VSS

AC11

VSS

AC14

VSS

AC16

VSS

AC19

VSS

AC21

VSS

AC24

VSS

AD2

VSS

AD5

VSS

AD8

VSS

AD11

VSS

AD13

VSS

AD16

VSS

AD19

VSS

AD22

VSS

AD25

VSS

AE1

VSS

AE4

VSS

AE8

VSS

AE11

VSS

AE14

VSS

AE16

VSS

AE19

VSS

AE23

VSS

AE26

VSS

A2

VSS

AF6

VSS

AF8

VSS

AF11

VSS

AF13

VSS

AF16

VSS

AF19

VSS

AF21

VSS

A25

VSS

AF25

VSS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (2 of 2)

JM70-MV

E

HFPLL_2

TEST55

555Saturday, December 20, 2008

1

1 1

0R2J-2-GP

12

R75

0R2J-2-GP

12

R72

TP47 AFTE14P-GPTP47 AFTE14P-GP

TP51 AFTE14P-GPTP51 AFTE14P-GP TP107 AFTE14P-GPTP107 AFTE14P-GP

TP103 AFTE14P-GPTP103 AFTE14P-GP TP50 AFTE14P-GPTP50 AFTE14P-GP

SB

5

H_SWING

C192

SCD1U10V2KX-4GP

H_RCOMP

1D05V_S0

12

R126

R126 221R2F-2-GP

221R2F-2-GP

12

R125

R125 100R2F-L1-GP-U

100R2F-L1-GP-U

QC = 64.75R05.6DL

D D

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )

12

C C

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

R132

QC = 64.16R95.6DL

Place them near to the chip ( < 0.5")

B B

1D05V_S0

R123

R123 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R121

R121 2KR2F-3-GP

2KR2F-3-GP

4

H_AVREF

H_D#[63..0]

SCD1U16V2ZY-2GP

12

C189

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_CPURST#4,54 H_CPUSLP#4

AD14

AA13

AA11 AD11 AD10 AD13

AE12

AE14

AE11

AG2 AD6

M11

N12

P13

N10

Y10 Y12 Y14

AA8

AA9

AE9 AA2 AD8 AA3 AD3 AD7

AF3 AC1 AE3 AC3

AE8

C12 E11

A11 B11

F2

G8

F8 E6

G2

H6 H2 F6 D4 H3

M9

J1 J2

J6

P2

L2 R2 N9

L6

M5

J3 N2 R1 N5 N6

N8

L7

M3

Y3 Y6

Y7

W2

Y9

C5 E3

H_D#[63..0]4

3

NB1A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1

H_REQ#_2 H_REQ#_3

H_REQ#_4

H_RS#_0 H_RS#_1 H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

2

H_A#[35..3]

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4

H_BPRI# 4

H_BREQ#0 4

H_DEFER# 4

H_DBSY# 4

CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3

H_DPWR# 4

H_DRDY# 4 H_HIT# 4 H_HITM# 4

H_LOCK# 4 H_TRDY# 4

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

1

H_A#[35..3] 4

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

A A

5

4

3

2

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cantiga (1 of 6)

Size Document Number Rev

Date: Sheet of

Cantiga (1 of 6)

JM70-MV

655Saturday, December 20, 2008

1

SB

5

D D

CPU_SEL03,4

1 2

0R2J-2-GP

R139

12

R160100R2J-2-GP R160100R2J-2-GP

12

C257

DY

R141

0R2J-2-GP

PM_DPRSLPVR_MCH

LCTLA_CLK LCTLB_DATA

PM_EXTTS#0 PM_EXTTS#1

CPU_SEL13,4 CPU_SEL23,4

PM_EXTTS#0 PM_EXTTS#1

RSTIN# NB_THERMTRIP#

PM_DPRSLPVR_MCH

4

CFG9

CFG16

CFG20

RN24

SRN10KJ-5-GP

SRN10KJ-5-GP RN23

RN23

SRN10KJ-5-GP

C C

1D5V_S3

12

R181

R181 80D6R2F-L-GP

80D6R2F-L-GP

M_RCOMPP

5

12

R182

80D6R2F-L-GP

PM_THRMTRIP-A#4,12,44

PM_DPRSLPVR13,51

M_RCOMPN

PLT_RST1#13,18,28,36,37,39,40

PM_SYNC#13

H_DPRSTP#4,12,51

PM_EXTTS#016,17

PWROK13,38

Do Not Stuff

3D3V_S0

R130 Do Not Stuff

1 2

DY

R129 Do Not Stuff

1 2

DY

R260 Do Not Stuff

1 2

DY

CFG20

CFG9

CFG16

2008.12.08 SB

B B

A A

UMA

AH10 AH12 AH13

AL34 AK34 AN35

AM35

AY21

BG23

BF23 BH18 BF18

AT40 AT11

BG48

BF48 BD48 BC48 BH47

BG47

BE47 BH46 BF46

BG45

BH44 BH43

3D3V_S0

1 23

NB1B

M36

RESERVED#M36

N36

RESERVED#N36

R33

RESERVED#R33

T33

RESERVED#T33

AH9

RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13

K12

RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35

T24

RESERVED#T24

B31

RESERVED#B31

B2

RESERVED#B2

M1

RESERVED#M1

RESERVED#AY21

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1 PWROK RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

4

CFG

PM

1D05V_S0

MCH_TSATN#

GFXVR_EN

2 OF 10

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

M_RCOMPP

BG22

M_RCOMPN

BH21

SM_RCOMP_VOH

BF28

SM_RCOMP_VOL

BH28 AV42

DDR2 : connect to GND

AR36

SM_REXT

BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

GFXVR_EN

C34

AH37 AH36 AN36 AJ35

MCH_CLVREF

AH34

for HDMI port C

N28 M28 G36 E36 K36 H36

MCH_TSATN#

B12

HDA_BCLK

B28

HDA_RST#

B30

HDA_SDI

B29

HDA_SDO

C29

HDA_SYNC

A28

HDA_SYNC HDA_BCLK HDA_SDO HDA_RST#

M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17

M_CLK_DDR#0 16 M_CLK_DDR#1 16 M_CLK_DDR#2 17 M_CLK_DDR#3 17

M_CKE0 16 M_CKE1 16 M_CKE2 17 M_CKE3 17

M_CS0# 16 M_CS1# 16 M_CS2# 17 M_CS3# 17

M_ODT0 16 M_ODT1 16 M_ODT2 17 M_ODT3 17

R170 499R2F-2-GPR170 499R2F-2-GP

1 2

DDR3_DRAMRST# 16,17

DREFCLK 3

DREFCLK# 3

DREFSSCLK 3

DREFSSCLK# 3

CLK_MCH_3GPLL 3

CLK_MCH_3GPLL# 3

DMI_TXN0 13 DMI_TXN1 13 DMI_TXN2 13 DMI_TXN3 13

DMI_TXP0 13 DMI_TXP1 13 DMI_TXP2 13 DMI_TXP3 13

DMI_RXN0 13 DMI_RXN1 13 DMI_RXN2 13 DMI_RXN3 13

DMI_RXP0 13 DMI_RXP1 13 DMI_RXP2 13 DMI_RXP3 13

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4

GMCH_HDMI_CLK 21 GMCH_HDMI_DATA 21

MCH_ICH_SYNC# 13

UMA

R120 33R2J-2-GP

1 2

2008.11.27 SB

SRN33J-7-GP

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0

SB_CK#_1 SA_CKE_0

SA_CKE_1 SB_CKE_0

RSVD

SB_CKE_1 SA_CS#_0

SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI

DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

NC

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

MISC

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

12

R122

56R2J-4-GP

GFXVR_EN 48

R124

R124 Do Not Stuff

Do Not Stuff

DY

1 2

PWROK 13,38 CL_RST#0 13

RN19

1 2 3 4 5

UMA

R167 1KR2F-3-GPR167 1KR2F-3-GP

12

R174

R174 3K01R2F-3-GP

3K01R2F-3-GP

R178

R178 1KR2F-3-GP

1KR2F-3-GP

1 2

GFX_VID[4..0] 48

CL_CLK0 13 CL_DATA0 13

8 7 6

12

3

SM_PWROK 44

DDR_VREF_S3_1

0.75V

12

C274

SCD1U10V2KX-4GP

1D05V_S0

R152

R152 1KR2F-3-GP

1KR2F-3-GP

1 2

12

C243

R156

499R2F-2-GP

FOR Cantiga:500 ohm Teenah: 392 ohm

SCD1U10V2KX-4GP

ACZ_SDIN3 12

ACZ_SYNC_R 12 ACZ_BIT_CLK 12 ACZ_SDATAOUT_R 12 ACZ_RST#_R 12

1D5V_S3

12

C277

C277 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C289

C289 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

3

CLK_DDC_EDID19 DAT_DDC_EDID19

GMCH_LCDVDD_ON19

GMCH_BLUE20

GMCH_GREEN20

GMCH_RED20

GMCH_DDCCLK20 GMCH_DDCDATA20

GMCH_HSYNC20 GMCH_VSYNC20

SM_RCOMP_VOH

12

C282

C282 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

SM_RCOMP_VOL

12

C290

C290 SC2D2U6D3V3MX-1-GP

SC2D2U6D3V3MX-1-GP

layout take note

L_BKLTCTL19 GMCH_BL_ON39

CLK_DDC_EDID DAT_DDC_EDID

GMCH_LCDVDD_ON

GMCH_TXACLK-19 GMCH_TXACLK+19 GMCH_TXBCLK-19 GMCH_TXBCLK+19

GMCH_TXAOUT0-19 GMCH_TXAOUT1-19 GMCH_TXAOUT2-19

GMCH_TXAOUT0+19 GMCH_TXAOUT1+19 GMCH_TXAOUT2+19

GMCH_TXBOUT0-19 GMCH_TXBOUT1-19 GMCH_TXBOUT2-19

GMCH_TXBOUT0+19 GMCH_TXBOUT1+19 GMCH_TXBOUT2+19

GMCH_BLUE GMCH_GREEN GMCH_RED

GMCH_DDCCLK GMCH_DDCDATA

1 2

UMA

R128 1K02R2F-1-GP

FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm

CRT_IREF routing Trace width use 20 mil

LCTLA_CLK

LCTLB_DATA

LIBG

TV_DACA TV_DACB TV_DACC

CRT_IREF

NB1C

L32 G32 M32

M33 K33

J33

M29 C44 B43 E37 E38 C41 C40 B37 A37

H47 E46 G40 A40

H48 D45

F40 B40

A41 H38 G37

J37 B42

G38

F37 K37

F25 H25 K25

H24

C31 E32

E28 G28

J28 G29 H32

J32

J29 E29

L29

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

DREFCLK DREFCLK#

DREFSSCLK DREFSSCLK#

L_BKLT_CTRL L_BKLT_EN L_CTRL_CLK

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE CRT_GREEN CRT_RED CRT_IRTN CRT_DDC_CLK

CRT_DDC_DATA CRT_HSYNC CRT_TVO_IREF CRT_VSYNC

DY

2 3 1

DY

2 3 1

2

3 OF 10

PEG_CMP

T37

PEG_COMPI

T36

PEG_COMPO

H44

PEG_RX#_0

J46

PEG_RX#_1

L44

PEG_RX#_2

L40

PEG_RX#_3

N41

PEG_RX#_4

P48

PEG_RX#_5

N44

PEG_RX#_6

T43

PEG_RX#_7

U43

PEG_RX#_8

Y43

PEG_RX#_9

Y48

PEG_RX#_10

Y36

PEG_RX#_11

LVDS

TV VGA

PCI-EXPRESS GRAPHICS

RN21

4

Do Not Stuff

RN25

4

Do Not Stuff

2

AA43

PEG_RX#_12

AD37

PEG_RX#_13

AC47

PEG_RX#_14

AD39

PEG_RX#_15

H43

PEG_RX_0

J44

PEG_RX_1

L43

PEG_RX_2

L41

PEG_RX_3

N40

PEG_RX_4

P47

PEG_RX_5

N43

PEG_RX_6

T42

PEG_RX_7

U42

PEG_RX_8

Y42

PEG_RX_9

W47

PEG_RX_10

Y37

PEG_RX_11

AA42

PEG_RX_12

AD36

PEG_RX_13

AC48

PEG_RX_14

AD40

PEG_RX_15

J41

PEG_TX#_0

M46

PEG_TX#_1

M47

PEG_TX#_2

M40

PEG_TX#_3

M42

PEG_TX#_4

R48

PEG_TX#_5

N38

PEG_TX#_6

T40

PEG_TX#_7

U37

PEG_TX#_8

U40

PEG_TX#_9

Y40

PEG_TX#_10

AA46

PEG_TX#_11

AA37

PEG_TX#_12

AA40

PEG_TX#_13

AD43

PEG_TX#_14

AC46

PEG_TX#_15

J42

PEG_TX_0

L46

PEG_TX_1

M48

PEG_TX_2

M39

PEG_TX_3

M43

PEG_TX_4

R47

PEG_TX_5

N37

PEG_TX_6

T39

PEG_TX_7

U36

PEG_TX_8

U39

PEG_TX_9

Y39

PEG_TX_10

Y46

PEG_TX_11

AA36

PEG_TX_12

AA39

PEG_TX_13

AD42

PEG_TX_14

AD46

PEG_TX_15

UMA

UMA UMA

UMA

PEG_RXP3

GMCH_RED GMCH_GREEN GMCH_BLUE

FOR Discrete change RN to 0 ohm (66.R0036.A8L)

RN27

6 7 8

SRN75J-1-GP

FOR Discrete,change to 0 ohm (66.R0036.A8L)

1D05V_S0

Close to GMCH as 500 mils.

12

R142 49D9R2F-GPR142 49D9R2F-GP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7 PEG_RXN8 PEG_RXN9 PEG_RXN10 PEG_RXN11 PEG_RXN12 PEG_RXN13 PEG_RXN14 PEG_RXN15

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7 PEG_RXP8 PEG_RXP9 PEG_RXP10 PEG_RXP11 PEG_RXP12 PEG_RXP13 PEG_RXP14 PEG_RXP15

0R2J-2-GP

RN22

4 5 3 2 1

1 2

R77

SRN150J-1-GP

UMA

45 3 2 1

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7 PEG_TXN8 PEG_TXN9 PEG_TXN10 PEG_TXN11 PEG_TXN12 PEG_TXN13 PEG_TXN14 PEG_TXN15

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7 PEG_TXP8 PEG_TXP9 PEG_TXP10 PEG_TXP11 PEG_TXP12 PEG_TXP13 PEG_TXP14 PEG_TXP15

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3

C107 SCD1U10V2KX-5GP

1 2

C112 SCD1U10V2KX-5GP

1 2

C111 SCD1U10V2KX-5GP

1 2

C114 SCD1U10V2KX-5GP

1 2

C108 SCD1U10V2KX-5GP

1 2

C110 SCD1U10V2KX-5GP

1 2

C109 SCD1U10V2KX-5GP

1 2

C113 SCD1U10V2KX-5GP

1 2

UMA

6 7 8

TV_DACC TV_DACB TV_DACA

UMA

Title

Size Document Number Rev

Date: Sheet

PEG_RXN[15..0] 18

PEG_RXP[15..0] 18

GMCH_BL_ON GMCH_LCDVDD_ON

LIBG

CRT_IREF

GMCH_VSYNC GMCH_HSYNC

Cantiga (2 of 6)

1

PEG_TXN[15..0] 18

PEG_TXP[15..0] 18

HDMI_DATA2- 21 HDMI_DATA1- 21 HDMI_DATA0- 21 HDMI_CLK- 21

HDMI_DATA2+ 21 HDMI_DATA1+ 21 HDMI_DATA0+ 21 HDMI_CLK+ 21

HDMI_DETECT# 21

UMA

RN26

2 3 1

4

SRN100KJ-6-GP

R127

1 2

UMA

2K37R2F-GP

2K37R2F-GP RN20

RN20

4 5 3

6

2

7

1

8

Do Not Stuff

DIS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JM70-MV

1

755Saturday, December 20, 2008

SB

of

5

NB1D

M_A_DQ[63..0]16

D D

C C

B B

M_A_DQ[63..0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

NB1D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

DDR SYSTEM MEMORY A

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

4

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

M_A_BS#0 16 M_A_BS#1 16 M_A_BS#2 16

M_A_RAS# 16

M_A_CAS# 16

M_A_WE# 16

M_A_DM[7..0] 16

M_A_DQS[7..0] 16

M_A_DQS#[7..0] 16

M_A_A[14..0] 16

3

NB1E

M_B_DQ[63..0]17

M_B_DQ[63..0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

NB1E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

2

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

M_B_DM0

AM47

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17

1

M_B_BS#0 17 M_B_BS#1 17 M_B_BS#2 17

M_B_DM[7..0] 17

M_B_DQS[7..0] 17

M_B_DQS#[7..0] 17

M_B_A[14..0] 17

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Cantiga (3 of 6)

JM70-MV

855Saturday, December 20, 2008

1

SB

5

VCC_GFXCORE

7 OF 10

1D5V_S3

D D

C C

B B

VCC_AXG_SENSE48 VSS_AXG_SENSE48

U60(ISL6263ACRZ-T-GP) place near Cantiga

VCC_GFXCORE

NB1G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

POWER

VCC SMVCC GFX

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH

4

R146

R146 Do Not Stuff

Do Not Stuff

DIS

1 2

12

C276

C256

C280

SCD1U10V2KX-4GP

place near Cantiga

3

1D05V_S0

R518

R517

R516

R515

R514

R513

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

VCC_GFXCOREVCC_GFXCORE 1D05V_S01D05V_S0

0R2J-2-GP

12

R512

R511

R510

R509

R508

R507

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

0R2J-2-GP

UMA

12

C235

SC10U6D3V5MX-3GP

Coupling CAP 370 mils from the Edge

2008.12.14 SB

VCC_GFXCORE

12

C240

C220

C221

Do Not Stuff

SC10U6D3V5MX-3GP

DY

UMA

12

C241

SC10U6D3V5MX-3GP

UMA

SC10U6D3V5MX-3GP

Place on the Edge Coupling CAP

FOR VCC SM

SCD1U10V2KX-4GP

Do Not Stuff

C283

12

DY

SCD47U16V3ZY-3GP

12

C275

SCD22U10V2KX-1GP

C273

C287

C245

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

C281

C268

12

C252

C232

Do Not Stuff

UMA

DY

SC10U6D3V5MX-3GP

C262

C271

12

Place on the Edge

DY

12

C215

C255

SC1U10V3ZY-6GP

Do Not Stuff

C255

Do Not Stuff

SCD1U10V2KX-4GP

DY

UMA

1D5V_S3

2

FOR VCC CORE

12

C234

SC10U6D3V5MX-3GP

12

C225

SC10U6D3V5MX-3GP

Coupling CAP

C237

SCD22U10V2KX-1GP

12

C214

12

C230

SCD1U10V2KX-4GP

G9

1 2

GAP-CLOSE-PWR

12

C194

SCD1U10V2KX-4GP

VCC_GMCH_35

NB1F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VCC CORE

POWER

6 OF 10

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

1

1D05V_S0

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga (4 of 6)

JM70-MV

1

955Saturday, December 20, 2008

SB

of

5

5V_S0

SC1U16V3ZY-GP

12

D D

1D05V_S0

C C

1D05V_S0

2nd = 68.00248.061

1D05V_S0

B B

220ohm 100MHz

1D5V_S0

Imax = 300 mA

U52

1

VIN

2

GND EN/EN#3NC#4

RT9198-33PBR-GP

BC3

74.09198.G7F

UMA

65mA

R370

12

0R0603-PAD

65mA

R375

12

0R0603-PAD

FCM1608KF-1-GP

1 2

L14

FCM1608KF-1-GP

1 2

L16

120ohm 100MHz

L15

1 2

FCM1608CF-221T02-GP

68.00217.521

2nd = 68.00084.A81

VOUT

SC10U6D3V5MX-3GP

12

C547

UMA

5 4

12

C542

UMA

3D3V_S0_DAC

BC4

SC1U16V3ZY-GP

UMA

12

UMA

M_VCCA_DPLLA

SCD1U10V2KX-4GP

12

C540

UMA

M_VCCA_DPLLB

SCD1U10V2KX-4GP

12

C549

UMA

24mA

M_VCCA_HPLL

SC4D7U6D3V3KX-GP

12

C567

C565

C565 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_MPLL

SC10U6D3V5MX-3GP

12

C572

1D05V_RUN_PEGPLL

12

C568

C568 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C524

SC22U6D3V5MX-2GP

12

R369

R369 Do Not Stuff

Do Not Stuff

DY

12

R376

R376 Do Not Stuff

Do Not Stuff

DY

139.2mA

12

C570

C570 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D05V_S0

58.7mA

12

C205

Do Not Stuff

DY

L4

A A

1 2

68.00206.041

PBY160808T-181Y-GP

2nd = 68.00214.101

1D5VRUN_QDAC

12

C209

SCD01U16V2KX-3GP

12

C202

SCD1U10V2KX-4GP

12

C198

SCD1U10V2KX-4GP

3D3V_S0_DAC

1 2

0R0402-PAD

480mA

1D5V_S0

UMA

1D05V_S0

C579

180ohm 100MHz

5

R365

0R0603-PAD

R364

1D5V_S0

24mA

C191

SCD1U10V2KX-4GP

12

4

12

5mA

C525

UMA

Do Not Stuff

C251

12

4

73mA

C522

UMA

12

SC10U6D3V5MX-3GP

12

C208

3D3V_S0_DAC

1D8V_S3

60.3mA

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SCD01U16V2KX-3GP

C521

12

UMA

1D8V_S3

C196

C261

12

C242

1D5V_S0

3D3V_CRTDAC_S0

SCD1U10V2KX-4GP

12

DY

13.2mA

12

C574

C574 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

12

SC2D2U6D3V3MX-1-GP

12

C247

R366

1 2

0R0402-PAD

C227

50mA

12

M_VCCA_DAC_BG

M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL

1D05V_RUN_PEGPLL

C267

SC1U10V3KX-3GP

C267

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

3D3V_S0_DAC_1

1D5VRUN_QDAC

1D05V_RUN_PEGPLL

12

SCD1U10V2KX-4GP

12

C203

SCD1U10V2KX-4GP

UMA

C203

C200

SC10U6D3V5MX-3GP

UMA

50mA

NB1H

B27

VCCA_CRT_DAC

A26

VCCA_CRT_DAC

A25

VCCA_DAC_BG

B25

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

AD48

VCCA_PEG_BG

AA48

VCCA_PEG_PLL

AR20

VCCA_SM

AP20

VCCA_SM

AN20

VCCA_SM

AR17

VCCA_SM

AP17

VCCA_SM

AN17

VCCA_SM

AT16

VCCA_SM

AR16

VCCA_SM

AP16

VCCA_SM

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

3

8 OF 10

U13

VTT

T13

VTT

U12

VTT

T12

VTT

U11

VTT

T11

VTT

U10

VTT

T10

VTT

U9

VTT

VCC_AXF VCC_AXF VCC_AXF

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

VCC_HV VCC_HV VCC_HV

HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

VTTLF

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VTTLF VTTLF VTTLF

T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47 C35

B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

322mA

106mA

VTTLF1 VTTLF2 VTTLF3

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

DMI

LVDS

3

12

C249

1

2

12

C218

SC4D7U6D3V3KX-GP

PM_SLP_S4#13,36,39,44,47,49

1D05V_S0

SC1U10V3KX-3GP

12

3D3V_S0

1

C228

2

SCD47U6D3V2KX-GP

2

C223

12

SCD1U10V2KX-4GP

12

C583

1

1D05V_S0

852mA

C206

SC4D7U6D3V3KX-GP

12

C193

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

456mA157.2mA

1

C201

2

SCD47U6D3V2KX-GP

C217

1D05V_S0

C286

12

C190

SCD47U6D3V2KX-GP

C263

SC2D2U6D3V3MX-1-GP

SC4D7U6D3V3KX-GP

1

2

R371

1 2

0R2J-2-GP

UMA

12

C295

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

C197

SC1KP50V2KX-1GP

C197

SC1KP50V2KX-1GP

12

1782mA

SC10U6D3V5MX-3GP

12

C233

SCD1U10V2KX-4GP

12

C586

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

12

C206

12

1

C562

2

SCD47U6D3V2KX-GP

83.BAT54.D81

D20

2nd = 83.00054.Z81

1D05V_HV_S0

3

BAT54-5-GP

12

C544

DY

200mA

119mA

C207

UMA

1D05V_S0

SC10U6D3V5MX-3GP

12

C213

SC10U6D3V5MX-3GP

12

C246

C216

SCD1U10V2KX-4GP

3D3V_S5

Do Not Stuff

12

C536

SC1U16V3ZY-GP

UMA

1D5V_S3

SC1U10V3KX-3GP

12

UMA

SCD1U10V2KX-4GP

C224

12

Cantiga (5 of 6)

3D3V_S0

12

R363

10R2J-2-GP

U51

1

VIN

2

GND EN/EN#3NC#4

RT9198-18PBR-GP

2nd = 74.09091.G3F

UMA

1D8V_S3

1D05V_S0

SC10U6D3V5MX-3GP

12

C585

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

JM70-MV

1D8V_S3

5

VOUT

4

74.09198.C7F

R382

1 2

DIS

Do Not Stuff

10 55Saturday, December 20, 2008

1

UMA

12

C550

12

C548

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

UMA

SB

of

SB

5

NB1I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

D D

C C

B B

A A

5

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

VSS

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

4

3

10 OF 10

NB1J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17 M17 H17

C17 BA16 AU16

AN16

N16

K16

G16

E16 BG15 AC15

W15

A15 BG14 AA14

C14 BG13 BC13 BA13

AN13

AJ13

AE13

N13

L13 G13 E13

BF12 AV12 AT12 AM12 AA12

J12

A12 BD11 BB11 AY11 AN11 AH11

Y11

N11

G11

C11 BG10 AV10 AT10

AJ10 AE10 AA10

M10 BF9 BC9 AN9

AM9

AD9

G9

B9 BH8 BB8 AV8 AT8

CANTIGA-GM-GP-U-NF

71.CNTIG.00U

3

VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

NCTF_VSS_SCB#BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

NCTF TEST PIN:

A3,C1,A48,BH1,BH48

VSS SCB

10 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS NCTF

VSS_NCTF VSS_NCTF

NCTF_VSS_SCB#BH1

NCTF_VSS_SCB#A48

NCTF_VSS_SCB#C1

NCTF_VSS_SCB#A3

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46

NC

NC#D47 NC#B47 NC#A46

NC#F48 NC#E48 NC#C48 NC#B48

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

2

Title

Size Document Number Rev

Date: Sheet of

2

Date: Sheet of

Cantiga (6 of 6)

JM70-MV

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

11 55Saturday, December 20, 2008

1

SB

5

3D3V_AUX_S5

D D

RTC1

RTC_BAT

1

PWR

2

GND

NP1

NP2

BAT-CON2-1-GP-U

62.70001.011

C C

B B

12

DY

1 2

R235 1KR2J-1-GPR235 1KR2J-1-GP

C371

Do Not Stuff

3D3V_S0

R396

1 2

10KR2J-3-GP

RTC_BAT_R

D18

2

3

1

BAS40CW-GP

83.00040.E81

2nd = 83.00040.K81

3D3V_S0

MEDIA_LED#_1

RN45 SRN20KJ-GP-URN45 SRN20KJ-GP-U

2 3 1

R332 1MR2J-1-GPR332 1MR2J-1-GP

21

G96

GAP-OPEN

ACZ_BTCLK_MDC34

ACZ_BIT_CLK7

ACZ_SYNC_R7

ACZ_RST#_R7

ACZ_SDATAIN030 ACZ_SDATAIN134 ACZ_SDIN218

ACZ_SDATAOUT_R7

MEDIA_LED#42,54

RTC_AUX_S5 RTC_AUX_S5

12

R319

R319 330KR2F-L-GP

330KR2F-L-GP

INTVRMEN LAN100_SLP

12

R323

DY

Do Not Stuff

RTC_AUX_S5

SC1U16V3ZY-GP

12

1 2

ACZ_SDIN37

TP174AFTE14P-GP TP174AFTE14P-GP

C474

4

C489

4

X-32D768KHZ-34GPU

12

C479

SC1U16V3ZY-GP

close to SB1

EC58

1 2

SC12P50V2JN-3GP

R391 33R2J-2-GPR391 33R2J-2-GP

1 2

HDA_DOCK_RST#

1

R392

1 2

100R2J-2-GP

HDD

2nd HDD

12

R316

R316 330KR2F-L-GP

330KR2F-L-GP

12

R87

DY

Do Not Stuff

C470

1 2

SC6P50V2CN-1GP

X3

2 3

2nd = 82.30001.B21

82.30001.661

1 2

SC6P50V2CN-1GP

GLAN_COMP place within 500 mil of ICH9M

1D5V_S0

MEDIA_LED#_1

82.30001.661

C464

1 2

R340

1 2

DY

R390 Do Not Stuff

ACZ_RST#18,30,34

ACZ_SDATAOUT18,30,34

ACZ_SYNC18,30,34

ACZ_BITCLK18,30

4

1

24D9R2F-L-GP

ACZ_SDATAOUT_R

SATA_RXN022

SATA_RXP022 SATA_TXN022 SATA_TXP022

SATA_RXN123

SATA_RXP123 SATA_TXN123 SATA_TXP123

RTC_X1

2008.12.15 SB

12

R297

R297 10MR2J-L-GP

10MR2J-L-GP

RTC_X2

RTC_RST# SRTC_RST#

INTRUDER#

INTVRMEN LAN100_SLP

GLAN_COMP

ACZ_BIT_CLK ACZ_SYNC_R

ACZ_RST#_R

HDA_DOCK_EN#

RN54

1 2 3 4 5

SRN33J-7-GP

C23 C24

A25 F20 C22

B22 A22

E25 C13 F14

G13 D14

D13 D12 E13

B10 B28

B27 AF6

AH4 AE7 AF4

AG4 AH3 AE5

AG5 AG7

AE8 AG8

AJ16

AH16

AF17

AG17 AH13

AJ13

AG14

AF14

8 7 6

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable Low=Disable

3

SB1A

RTCX1 RTCX2

RTCRST# SRTCRST# INTRUDER#

INTVRMEN LAN100_SLP

GLAN_CLK LAN_RSTSYNC LAN_RXD0

LAN_RXD1 LAN_RXD2

LAN_TXD0 LAN_TXD1 LAN_TXD2

GLAN_DOCK#/GPIO56 GLAN_COMPI

GLAN_COMPO HDA_BIT_CLK

HDA_SYNC HDA_RST# HDA_SDIN0

HDA_SDIN1 HDA_SDIN2 HDA_SDIN3

HDA_SDOUT HDA_DOCK_EN#/GPIO33

HDA_DOCK_RST#/GPIO34 SATALED# SATA0RXN

SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

ICH9M-GP-NF

71.ICH9M.00U

ACZ_RST#_R ACZ_SDATAOUT_R ACZ_SYNC_R ACZ_BIT_CLK

1 OF 6

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT# INTR

RCIN#

STPCLK#

THRMTRIP#

PECI

SATA4RXN

IHDA

SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATA_CLKN SATA_CLKP

SATA

SATARBIAS#

SATARBIAS

NMI

SMI#

LPC_LAD0

K5

LPC_LAD1

K4

LPC_LAD2

L6

LPC_LAD3

K2 K3 J3

J1 N7

AJ27

H_DPRSTP#

AJ25 AE23

H_FERR#_R

AJ26

H_PWRGD

AD22 AF25 AE22

AG25 L3

AF23 AF24

AH27 AG26 AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

AJ7 AH7

SATA_RXN4_C SATA_RXP4_C SATA_TXN4_C SATA_TXP4_C

SATARBIAS

24D9R2F-L-GP

Place within 500 mils of ICH9 ball

2

LPC_LAD[0..3]

LPC_LFRAME# 39,40

KA20GATE 39 H_A20M# 4

H_PWRGD 4,44 H_IGNNE# 4 H_INIT# 4

H_INTR 4 KBRCIN# 39

H_STPCLK# 4

H_THERMTRIP_R

CLK_PCIE_SATA# 3

CLK_PCIE_SATA 3

12

R380

LPC_LAD[0..3] 39,40

H_DPRSTP# 4,7,51 H_DPSLP# 4

H_NMI 4 H_SMI# 4

1 2

SATA_RXN4_C 25 SATA_RXP4_C 25

SATA_TXN4_C 25 SATA_TXP4_C 25

SATA_RXN5 24

SATA_RXP5 24 SATA_TXN5 24

SATA_TXP5 24

1D05V_S0

RN51

1 2 3

SRN56J-4-GP

QC = 66.49R96.04L

1 2

56R2J-4-GP

QC = 64.49R95.6DL

R135 Do Not Stuff

DY

QC = 64.49R95.6DL

ESATA ODD

1

1D05V_S0 1D05V_S0

12

H_DPRSTP# H_PWRGD

4

R136

Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub

H_FERR# 4

1D05V_S0

PM_THRMTRIP-A# 4,7,44

R386

R386 Do Not Stuff

Do Not Stuff

DY

12

R368

R368 Do Not Stuff

Do Not Stuff

DY

UMA

A A

5

4

3

2

UMA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH9-M (1 of 4)

Size Document Number Rev

Date: Sheet

Date: Sheet of

ICH9-M (1 of 4)

JM70-MV

1

12 55Saturday, December 20, 2008

of

12 55Saturday, December 20, 2008

of

12 55Saturday, December 20, 2008

SB

5

2 OF 6

SB1B

D11

AD0

C8 D9

E12

E9

C9

E10

B7

C7

PCI_GNT#0 and SPI_CS1#

D D

have weak internal Pull up

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

C C

PCI_PERR# INT_PIRQE# PCI_LOCK# INT_PIRQA#

3D3V_S0

PCI_REQ#2 PCI_REQ#1

PM_CLKRUN#

3D3V_S0

B B

RP2

1 2 3 4 5 6

SRN8K2J-2-GP-U

RP3

1 2 3 4 5 6

SRN8K2J-2-GP-U

PCIE_RXN128

PCIE_RXP128 PCIE_TXN128 PCIE_TXP128

LAN

PCIE_RXN237

PCIE_RXP237 PCIE_TXN237 PCIE_TXP237

MINICARD1

PCIE_RXN337

PCIE_RXP337 PCIE_TXN337 PCIE_TXP337

MINICARD2

C188 SCD1U10V2KX-5GPC188 SCD1U10V2KX-5GP C187 SCD1U10V2KX-5GPC187 SCD1U10V2KX-5GP

C186 SCD1U10V2KX-5GPC186 SCD1U10V2KX-5GP C180 SCD1U10V2KX-5GPC180 SCD1U10V2KX-5GP

C179 SCD1U10V2KX-5GP

C179 SCD1U10V2KX-5GP C178 SCD1U10V2KX-5GP

C178 SCD1U10V2KX-5GP

C5

G11

F8

F11

E7 A3

D2

F10

D5

D10

B3 F7

C3

F3

F4 C1 G7 H7 D1 G5 H6 G1 H3

J5

E1

J6

10

INT_PIRQH#

9

PCI_REQ#0

8

INT_PIRQC#

7

INT_PIRQB# ECSCI#_1

10

INT_SERIRQ

9

PCI_DEVSEL#

8

PCI_STOP#

7

PCI_FRAME#

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5

ICH9M-GP-NF

71.ICH9M.00U

PCI_REQ#3

3D3V_S0

INT_PIRQF# INT_PIRQG# PCI_SERR#

3D3V_S0

TXN1

12

TXP1

12

TXN2

12

TXP2

12

TXN3

12

TXP3

12

TV_tuner

TV_tuner TV_tuner

TV_tuner

2008.12.14 SB

PCIE_RXN536

PCIE_RXP536 PCIE_TXN536 PCIE_TXP536

NEW CARD

C177 Do Not Stuff

C177 Do Not Stuff C174 Do Not Stuff

C174 Do Not Stuff

NEW

NEW NEW

NEW

TXN5

12

TXP5

12

2008.12.14 SB

SPI_ICH_CS1#

USB_OC#0

12

USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11

USB_RBIAS_PN

USB_OC#127,54

A A

These R need close SB within 600 mils

USB_OC#927

R134 22D6R2F-L1-GPR134 22D6R2F-L1-GP

5

2 OF 6

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

FRAME#

PLTRST#

PCICLK

PME#

PIRQE#/GPIO2 PIRQF#/GPIO3

PIRQG#/GPIO4

SB1D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M-GP-NF

71.ICH9M.00U

PCI_REQ#0

F1

PCI_GNT#0

G4

PCI_REQ#1

B6

PCI_GNT#1

A7

PCI_REQ#2

F13

PCI_GNT#2

F12

PCI_REQ#3

E6

PCI_GNT#3

F6 D8

B4 D6 A5

PCI_IRDY#

D3 E3 R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_LOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PLT_RST#_R

C14 D4 R2

INT_PIRQE#

H4

INT_PIRQF#

K6

INT_PIRQG#

F2

INT_PIRQH#

G2

RP4

1 2 3 4 5 6

SRN8K2J-2-GP-U

USB

4

TP71 AFTE14P-GPTP71 AFTE14P-GP

1

TP173 AFTE14P-GPTP173 AFTE14P-GP

1

R341

1 2

0R2J-2-GP

ICH_PME#

1

10

INT_PIRQD#

9

PCI_IRDY#

8

PCI_TRDY#

7

4 OF 6

DMI0RXN

DMI0RXP DMI0TXN DMI0TXP

DMI1RXN

DMI1RXP DMI1TXN DMI1TXP

DMI2RXN

DMI2RXP DMI2TXN DMI2TXP

DMI3RXN

DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN

PCI-Express

DMI_CLKP

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N USBP4P USBP5N

SPI

USBP5P USBP6N USBP6P USBP7N USBP7P USBP8N USBP8P USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

4

PLT_RST1# 7,18,28,36,37,39,40

1 2

C491 Do Not Stuff

DY

PCLK_ICH 3

TP110 AFTE14P-GPTP110 AFTE14P-GP

3D3V_S0

V27 V26 U29 U28

Y27 Y26 W29 W28

AB27 AB26 AA29 AA28

AD27 AD26 AC29 AC28

T26 T25

AF29 AF28

AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R

USBPN0 25

USBPP0 25

USBPN1 27,54

USBPP1 27,54

USBPN2 27,54

USBPP2 27,54 USBPN3 37 USBPP3 37

USBPN4 19,54

USBPP4 19,54 USBPN5 36 USBPP5 36 USBPN6 41,54 USBPP6 41,54 USBPN7 26,54 USBPP7 26,54

USBPN9 27 USBPP9 27 USBPN10 37 USBPP10 37 USBPN11 35 USBPP11 35

Pair

0 1 2 3 4 5 6 7 8 9 10 11

1D5V_S0

12

USB

SMB_CLK15,28,36,37 SMB_DATA15,28,36,37

3D3V_S0

12

R372

10KR2J-3-GP

21

G97

GAP-OPEN

R133

R133 24D9R2F-L-GP

24D9R2F-L-GP

Device USB2 USB3 USB4 MINIC1 WEBCAM NEW1 FP Bluetooth NC USB1 MINIC2 Cardreader

3

SMB_LINK_ALERT#

PM_RI#

DBRESET#

PM_SYNC#7

PM_STPPCI#3 PM_STPCPU#3

PM_CLKRUN#39

PCIE_WAKE#28,36

INT_SERIRQ39

VGATE_PWRGD18,38,51

EC_TMR39

ECSCI#_139

ECSWI#39

MCH_ICH_SYNC#7

SMB_ALERT#

THRM#38

ICH_TP7

1 2

DY

Do Not Stuff

R89

PSW_CLR#

ACZ_SPKR30

No Reboot Strap

SPKR LOW = Defaule

ACZ_SPKR

PWROK

SB1C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

71.ICH9M.00U

High=No Reboot

1 2

R361 Do Not Stuff

DY

RN48

1 2 3

SRN10KJ-5-GP

3D3V_S0

4

BOOT BIOS Strap

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

A16 swap override strap

PCI_GNT#3

3

01 11

low = A16 swap override enable high = default

PCI_GNT#0 SPI_ICH_CS1# PCI_GNT#3

1 2

R358

DY

1 2

R355

DY

1 2

R353

DY

2

SATA

GPIO

SATA

GPIO

SMB

Clocks

SYS GPIO

Power MGTController Link

GPIO

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

USB_OC#1 PM_BATLOW#_R ECSWI# USB_OC#0 SUSPWRACK

3D3V_S5

USB_OC#2 USB_OC#7 PM_RI#

3D3V_S5

PCI LPC(Default)

Do Not Stuff

Do Not Stuff Do Not Stuff

Do Not Stuff

2

3 OF 6

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

GPIO24/MEM_LED

GPIO9/WOL_EN

RP1

1 2 3 4 5 6

SRN10KJ-L3-GP

RP5

1 2 3 4 5 6

SRN10KJ-L3-GP

AH23 AF19 AE21 AD20

H1 AF3

P1 C16

E16 G17

C10 G20 M2 B13 R3 D20 D22 R5 R6 B16 F24

B19 F22

C19 C25

A19 F21

D18 A16

C18 C11 C20

1

SRN10KJ-6-GP

SATA0GP SATA1GP ICH_GPIO36 ICH_GPIO37

CLK_ICH14 3 CLK48_ICH 3

PM_SUS_CLK 38

PM_SLP_S3# 18,31,36,38,39,44,47,48

PM_SLP_S4# 10,36,39,44,47,49

PM_DPRSLPVR_1

PM_BATLOW#_R PWRBTN#_ICH

RSMRST#_SB

CL_VREF0_ICH

SUSPWRACK AC_PRESENT

ICH_GPIO9

100KR2J-1-GP

12

R88

3D3V_S5

10

USB_OC#5

9

SMB_LINK_ALERT#

8 7

SMB_ALERT#

3D3V_S5

10

USB_OC#4

9

DBRESET#

8

USB_OC#3PCIE_WAKE#

7

USB_OC#6

RSMRST#_KBC39

UMA

Title

Size Document Number Rev

Date: Sheet

PWROK 7,38

R117 100R2J-2-GPR117 100R2J-2-GP R118

R118

1

2

CLK_PWRGD 3 PWROK 7,38

CL_CLK0 7

CL_DATA0 7

CL_RST#0 7

TP70 AFTE14P-GPTP70 AFTE14P-GP

1

3

BAT54-5-GP

83.BAT54.D81

2nd = 83.00054.Z81

1 2

Do Not Stuff

D19

BAS16-1-GP

3

2nd = 83.00016.F11 / 83.00016.G11

USB_OC#11 USB_OC#10 USB_OC#8 USB_OC#9

3D3V_S5

D17

1

2

ICH9-M (2 of 4)

JM70-MV

SRN10KJ-6-GP

6 7 8

RN55

12

DY

R335

3K24R2F-GP

12

RN18

8 7 6

SRN10KJ-6-GP

1

23

RN44

RN44 SRN10KJ-5-GP

SRN10KJ-5-GP

4

AC_PRESENT RSMRST#_SB

12

R284

100KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

13 55Saturday, December 20, 2008

1

45 3 2 1

PM_DPRSLPVR 7,51

PM_PWRBTN# 39,54

3D3V_S0

12

R334

R334 453R2F-1-GP

453R2F-1-GP

C493

SCD1U10V2KX-4GP

3D3V_S5

1 2 3 45

of

SB

5

D D

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

5V_S0

D7

D7 RB751V-40-2-GP

2mA

C C

V5REF_S0

Layout Note: Place near ICH9

2mA

V5REF_S5

B B

RB751V-40-2-GP

83.R2004.B8F

K A

2nd = 83.R0304.A8F

12

C151

SCD1U16V2ZY-2GP

D9

D9 RB751V-40-2-GP

RB751V-40-2-GP

83.R2004.B8F

K A

2nd = 83.R0304.A8F

12

C195

SCD1U16V2ZY-2GP

12

5V_S53D3V_S5

12

R93

R93 100R2J-2-GP

100R2J-2-GP

R131

R131 100R2J-2-GP

100R2J-2-GP

C170

RTC_AUX_S5

1D5V_S0

12

C535

SC10U6D3V5MX-3GP

1 2

1D5V_S0

C476

SCD1U10V2KX-4GP

12

47mA

L5

IND-1D2UH-10-GP

68.1R220.10D

2nd = 68.1R220.10B

1.64A

12

USBPLL=11mA

12

C538

C537

SCD1U10V2KX-4GP

3D3V_S0

19mA in S0;78mA in S3/S4/S5

12

C482

SCD1U10V2KX-4GP

A A

SC4D7U6D3V3KX-GP

5

1D5V_S0

80mA

C483

R90

1 2

0R0402-PAD

12

C543

23mA

12

C148

SC1U16V3ZY-GP

SCD1U10V2KX-4GP

4

6uA in G3

12

C475

SCD1U10V2KX-4GP

12

C515

C501

SC10U6D3V5MX-3GP

SC2D2U10V3KX-1GP

1D5V_APLL_S01D5V_S03D3V_S0

12

C526

C541

SC1U16V3ZY-GP

12

C532

SCD1U10V2KX-4GP

C490

SC10U6D3V5MX-3GP

12

C147

4

V5REF_S0 V5REF_S5

646mA

12

C211

C212

SC1U16V3ZY-GP

SC10U6D3V5MX-3GP

12

C545

SC1U16V3ZY-GP

VCCLAN_1D05V_INT_ICH

12

SCD1U10V2KX-4GP

1D5VGLANPLL_ICH

3D3V_S0

1mA

AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29

W24 W25

AJ19

AC16 AD15 AD16 AE15 AF15

AG15

AH15

AJ15

AC11 AD11 AE11

AF11 AG10 AG11

AH10

AJ10

AC18

AC19

AC21

AC12

AC13

AC14

AE1

G25 H24 H25

M24 M25 N23 N24 N25

R24 R25 R26 R27

U24 U25

U23

AC9

G10

AA7 AB6 AB7 AC6 AC7

D28 D29

A23

A6

F25

J24 J25 K24 K25 L23 L24 L25

P24 P25

T24 T27 T28 T29

V24 V25

K23 Y24 Y25

G9

AJ5

A10 A11

A12 B12

A27

E26 E27

A26

SB1F

VCCRTC V5REF V5REF_SUS VCC1_5_B

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCCUSBPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCCLAN1_05 VCCLAN1_05

VCCLAN3_3 VCCLAN3_3

VCCGLANPLL VCCGLAN1_5

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

VCCGLAN3_3

ICH9M-GP-NF

71.ICH9M.00U

CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

PCI

VCCPSUSVCCPUSB

GLAN POWER

3

6 OF 6

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCCDMIPLL

VCCDMI VCCDMI

V_CPU_IO V_CPU_IO

VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCHDA

VCCSUSHDA

VCCSUS1_05 VCCSUS1_05

VCCSUS1_5 VCCSUS1_5

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5 VCCCL3_3

VCCCL3_3

3

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 W23

Y23 AB23

AC23 AG29 AJ6 AC10 AD19

AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4 AJ3 AC8

F17 AD8 F18

A18 D16 D17 E22

AF1 T1

T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22 G23 A24

B24

C492

SCD1U10V2KX-4GP

TP_VCCSUS1D05V_ICH_1

VCCSUS1D5V_INT_ICH

SCD1U10V2KX-4GP

Place near ICH9MLayout Note:

1.16A

12

SCD1U10V2KX-4GP

C511

C512

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

12

C552

C539

SCD1U10V2KX-4GP

VCC3_3=308mA

3D3V_S0

12

C497

12

C496

VCCCL1D05V_INT_ICH VCCCL1D5V_INT_ICH

12

C505

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

C498

3D3V_S0

19mA

12

C503

SCD1U10V2KX-4GP

12

C516

3D3V_S0

C495

SCD1U10V2KX-4GP

VCCHDA_ICH

VCCSUSHDA_ICH

12

C509

C509 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

212mA

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

2

1D05V_S0

12

C519

SC10U6D3V5MX-3GP

SCD01U16V2KX-3GP

12

C528

SC4D7U6D3V3KX-GP

3D3V_S0

12

C546

SCD1U10V2KX-4GP

12

C529

C529 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S5

C499

SCD1U10V2KX-4GP

12

C504

C506

2

12

C520

41mA

12

32mA

C551

SCD1U10V2KX-4GP

32mA

12

C210

SCD1U10V2KX-4GP

12

1

23mA

L13

1 2

IND-1D2UH-10-GP

C518

68.1R220.10D

SC10U6D3V5MX-3GP

2nd = 68.1R220.10B

1D05V_S0

1D5V_S0

1D05V_S0

2mA

12

C533

SCD1U10V2KX-4GP

3D3V_S5

SC1U16V3ZY-GP

C507

Title

Size Document Number Rev

Date: Sheet

C527

C513

SCD1U10V2KX-4GP

DIS

R379 0R2J-2-GP

1 2

UMA

1 2

12

BC2

SC4D7U6D3V3KX-GP

R140

12

R143 0R2J-2-GP

1 2

UMA

Do Not Stuff

DIS

12

R144Do Not Stuff

3D3V_S0 1D5V_S0

2008.11.27 SB

U22

VIN GND EN/EN#3NC#4

RT9198-15PBR-GP

74.09198.B7F

2nd = 74.09091.I3F

ICH9-M (3 of 4)

JM70-MV

5

VOUT

4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

3D3V_S5 1D5V_S5

1D5V_S5

SC1U16V3ZY-GP

12

14 55Saturday, December 20, 2008

BC1

of

12

C219

SC22U6D3V6KX-1GP

SB

A

SB1E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

VSS

AB29

VSS

AB4

VSS

AB5

VSS

AC17

VSS

4 4

3 3

2 2

1 1

AC26

VSS

AC27

VSS

AC3

VSS

AD1

VSS

AD10

VSS

AD12

VSS

AD13

VSS

AD14

VSS

AD17

VSS

AD18

VSS

AD21

VSS

AD28

VSS

AD29

VSS

AD4

VSS

AD5

VSS

AD6

VSS

AD7

VSS

AD9

VSS

AE12

VSS

AE13

VSS

AE14

VSS

AE16

VSS

AE17

VSS

AE2

VSS

AE20

VSS

AE24

VSS

AE3

VSS

AE4

VSS

AE6

VSS

AE9

VSS

AF13

VSS

AF16

VSS

AF18

VSS

AF22

VSS

AH26

VSS

AF26

VSS

AF27

VSS

AF5

VSS

AF7

VSS

AF9

VSS

AG13

VSS

AG16

VSS

AG18

VSS

AG20

VSS

AG23

VSS

AG3

VSS

AG6

VSS

AG9

VSS

AH12

VSS

AH14

VSS

AH17

VSS

AH19

VSS

AH2

VSS

AH22

VSS

AH25

VSS

AH28

VSS

AH5

VSS

AH8

VSS

AJ12

VSS

AJ14

VSS

AJ17

VSS

AJ8

VSS

B11

VSS

B14

VSS

B17

VSS

B2

VSS

B20

VSS

B23

VSS

B5

VSS

B8

VSS

C26

VSS

C27

VSS

E11

VSS

E14

VSS

E18

VSS

E2

VSS

E21

VSS

E24

VSS

E5

VSS

E8

VSS

F16

VSS

F28

VSS

F29

VSS

G12

VSS

G14

VSS

G18

VSS

G21

VSS

G24

VSS

G26

VSS

G27

VSS

G8

VSS

H2

VSS

H23 H28 H29

A

NCTF TEST PIN:

VSS VSS VSS

ICH9M-GP-NF

71.ICH9M.00U

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

A1,A2,B1,A28,A29,B29

AH1,AJ1,AJ2,AH29,AJ28,AJ29

5 OF 6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NCTF_VSS#A1 NCTF_VSS#A2

NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29 NCTF_VSS#AJ1 NCTF_VSS#AJ2

NCTF_VSS#AH1 NCTF_VSS#AJ28 NCTF_VSS#AJ29

NCTF_VSS#AH29

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29

B

C

SMB_CLK13,28,36,37

SMB_DATA13,28,36,37

D

3D3V_S5 3D3V_S0

SRN4K7J-10-GP

678

RN43

123

4 5

3D3V_S0

Q19

3 4 2 1

5 6

2nd = 84.27002.C3F

2N7002DW-1-GP

E

SMBC_ICH 3,16,17

SMBD_ICH 3,16,17

SMBUS

TP76 AFTE14P-GPTP76 AFTE14P-GP

1

TP72 AFTE14P-GPTP72 AFTE14P-GP

1

TP80 AFTE14P-GPTP80 AFTE14P-GP

1

TP75 AFTE14P-GPTP75 AFTE14P-GP

1

TP74 AFTE14P-GPTP74 AFTE14P-GP

1

TP79 AFTE14P-GPTP79 AFTE14P-GP

1

TP144 AFTE14P-GPTP144 AFTE14P-GP

1

TP145 AFTE14P-GPTP145 AFTE14P-GP

1

TP142 AFTE14P-GPTP142 AFTE14P-GP

1

TP148 AFTE14P-GPTP148 AFTE14P-GP

1

TP143 AFTE14P-GPTP143 AFTE14P-GP

1

TP141 AFTE14P-GPTP141 AFTE14P-GP

1

B

C

D

Title

Size Document Number Rev

Date: Sheet

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ICH9-M (4 of 4)

JM70-MV

15 55Saturday, December 20, 2008

E

SB

of

A

B

C

D

E

DDR3 SOCKET_1

4 4

DM1

M_A_A[14..0]8

TP157AFTE14P-GP TP157AFTE14P-GP

M_A_BS#28 M_A_BS#08

M_A_BS#18

M_A_DQ[63..0]8

3 3

2 2

1 1

Layout Note：Near Pin 126

DDR_VREF_S3_1

12

C350

Do Not Stuff

C340

C340 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

：

DDR_VREF_S3_1

C358

Do Not Stuff

Near Pin 1

DY

12

DY

C351

C351 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Layout Note

A

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

DDR_VREF_S3_1

DDR_VREF_S3

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT07 M_ODT17

DDR3_DRAMRST#7,17

12

C342

C352

SC1U10V3ZY-6GP

B

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_A15

1

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

SC10U6D3V5MX-3GP

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA

1

VREF_DQ RESET#

VTT1 VTT2

DDR3-204P-9-GP

62.10017.G11

NC#/TEST

40 42 50 52 57 59 67 69 56 58 68

70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10

27

45

62 135 152 169 186

12

29

47

64 137 154 171 188

116 120

126

30

203 204

2nd = 62.10017.K11

High 5.2mm

RAS# CAS#

CKE0 CKE1

EVENT#

VDDSPD

NC#1 NC#2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113

WE#

115 114

CS0#

121

CS1#

73 74

101

CK0

103

CK0#

102

CK1

104

CK1#

M_A_DM0

11

DM0

M_A_DM1M_A_DM1

28

DM1

M_A_DM2M_A_DM2

46

DM2

M_A_DM3M_A_DM3

63

DM3

M_A_DM4M_A_DM4

136

DM4

M_A_DM5M_A_DM5

153

DM5

M_A_DM6M_A_DM6

170

DM6

M_A_DM7M_A_DM7

187

DM7

SMBD_ICH

200

SDA

SMBC_ICH

202

SCL

198 199

DDRA_SA0

197

SA0

DDRA_SA1

201

SA1

77 122

1D5V_S3

125 75

76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

C

M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8

M_CS0# 7 M_CS1# 7

M_CKE0 7 M_CKE1 7

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

SMBD_ICH 3,15,17 SMBC_ICH 3,15,17

PM_EXTTS#0 7,17

RN34

1 2 3

SRN10KJ-5-GP

M_A_DM[7..0] 8

4

1D5V_S3

3D3V_S0

12

C344

SC2D2U6D3V2MX-GP

C345

SCD1U16V2ZY-2GP

12

C353

12

C355

C348

SC10U6D3V5MX-3GP

Do Not Stuff

DY

SCD1U16V2ZY-2GP

Do Not Stuff

12

C356

C357

DY

D

12

C354

Do Not Stuff

12

C349

DY

12

C347

C346

SC10U6D3V5MX-3GP

Do Not Stuff

SC10U6D3V5MX-3GP

Do Not Stuff

DY

SCD1U16V2ZY-2GP

12

C343

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DDR3 Socket

JM70-MV

E

SB

of

16 55Saturday, December 20, 2008

of

16 55Saturday, December 20, 2008

of

16 55Saturday, December 20, 2008

A

B

C

D

E

DDR3 SOCKET_2

DM2

4 4

3 3

M_B_A[14..0]8

M_B_A15

TP155AFTE14P-GP TP155AFTE14P-GP

1

M_B_BS#28 M_B_BS#08

M_B_BS#18

M_B_DQ[63..0]8

Layout Note：Near Pin 126

DDR_VREF_S3_1

12

C322

SC2D2U6D3V3MX-1-GP

C314

C337

12

SC2D2U6D3V3MX-1-GP

C314 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

：

Near Pin 1

12

C330

C330 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

DDR_VREF_S3_1

DDR_VREF_S3

M_ODT27 M_ODT37

DDR3_DRAMRST#7,16

12

C336

C315

SC1U10V3ZY-6GP

2 2

Layout Note

DDR_VREF_S3_1

1 1

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8

M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

SC10U6D3V5MX-3GP

2nd = 62.10017.K01

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-8-GP

62.10017.G21

High 9.2 mm

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

M_B_DM0

11

DM0

M_B_DM1

28

DM1

M_B_DM2

46

DM2

M_B_DM3

63

DM3

M_B_DM4

136

DM4

M_B_DM5

153

DM5

M_B_DM6

170

DM6

M_B_DM7

187

DM7

200

SDA

202

SCL

198

EVENT#

199

VDDSPD

DDRB_SA0

197

SA0

DDRB_SA1

201

SA1

77

NC#1

122

NC#2

125

NC#/TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

NORMAL TYPE

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

10KR2J-3-GP

R217

R217 R214

R214

10KR2J-3-GP

M_B_RAS# 8 M_B_WE# 8 M_B_CAS# 8

M_CS2# 7 M_CS3# 7

M_CKE2 7 M_CKE3 7

M_CLK_DDR2 7 M_CLK_DDR#2 7

M_CLK_DDR3 7 M_CLK_DDR#3 7

M_B_DM[7..0] 8

SMBD_ICH 3,15,16 SMBC_ICH 3,15,16

PM_EXTTS#0 7,16

12 12

3D3V_S0

12

C316

SC2D2U6D3V2MX-GP

C323

SCD1U16V2ZY-2GP

1D5V_S3

12

C319

C320

Do Not Stuff

DY

Do Not Stuff

12

C317

DY

12

C321

C334

Do Not Stuff

SC10U6D3V5MX-3GP

DY

SCD1U16V2ZY-2GP

12

C318

C331

12

C333

C335

Do Not Stuff

SC10U6D3V5MX-3GP

SCD1U16V2ZY-2GP

SC10U6D3V5MX-3GP

DY

Do Not Stuff

12

C332

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DDR3 Socket2

Size Document Number Rev

Date: Sheet

A

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

JM70-MV

E

SB

of

17 55Saturday, December 20, 2008

of

17 55Saturday, December 20, 2008

of

17 55Saturday, December 20, 2008