Page 1
5
4
3
2
1
JE40 HR
DIS/UMA/Muxless Schematics Document
D D
Sandy Bridge
Intel PCH
C C
DY :None Installed
DIS:DIS installed
DIS_Muxless :BOTH DIS or Muxless installed
DIS_PX:BOTH DIS or PX installed
ANNIE: ONLY FOR ANNIE solution.
PSL: KBC795 PSL circuit for 10mW solution installed.
10mW: External circuit for 10mW solution installed.
65W: for 65W adaptor installed.
90W: for 90W adaptor installed.
DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
PX_Muxless:BOTH PX or Muxless installed.
B B
UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed
HR UMA
HR UMA
A A
5
4
3
2
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Cover Page
Cover Page
Cover Page
JE40-HR
JE40-HR
JE40-HR
of
of
1 102
1 102
1 102
1
-1
-1
-1
Page 2
5
##OnMainBoard
VRAM
D D
2GB/1GB/512MB
88,89,90,91
DDR3
800MHz
Nvidia N12P
83.84,85,86,87
Discreet/UMA/PX Co-lay
C C
HDMI
LCD
B B
HP1
MIC IN
A A
2CH SPEAKER
51
49
Left Side:
USB x 1
Bluetooth
CAMERA
Internal Analog MIC
5
63
49
64
RGB CRT
CRT
LVDS(Dual Channel)
50
USB2.0 x 4
Azalia
CODEC
ALC271X
4
3
JE40 HR Block Diagram
(Discrete/UMA/co-lay)
Project code : 91.4IQ01.001
PCB P/N : 48.4IQ01.0SA
Revision : 10267-1
DDRIII 1066/1333 Channel A
DDRIII 1066/1333 Channel B
PCIE x 1,USB x 1
USB 2.0 x 1
SATA x 2
LPC debug port
SMBus
3
Thermal
ENE P2800
ENE P2793
71
Fan
2869 2569
(Discrete only)
HDMI
Level
shifter
AZALIA
29
4
PCIe x 16
FDIx4x2
(UMA only)
57
Intel CPU
Sandy Bridge
FSB: 1066 MHz
4,5,6,7,8,9,10,11,12,13
DMIx4
Intel
PCH
Cougar Point
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
SATA ports (6)
PCIE ports (8)
LPC I/F
ACPI 1.1
17,18,19,20,21,22,23,24,25,26
SPI
Flash ROM
4MB
Touch
PAD
LPC Bus
60
KBC
NUVOTON
NPCE795P
27
Int.
KB
DDRIII
1066/1333
DDRIII
1066/1333
PCIE x 1
USB x 2
PCIE x 1
USB x 1
PCIE x 1
2
Slot 0
Slot 1
14
15
USB3.0
uPD720200
Mini-Card
802.11a/b/g
1000 NIC
BCM57780A1
Mini-Card
WWAN
Right Side:
USB x 1
SYSTEM DC/DC
APL5916KAI
INPUTS
1D05V_PWR
75
65
RJ45
CONN
31
SD/MMC+/MS/
MS Pro/xD
66 66
48
OUTPUTS
0D85V_S0
59
SIM
1
CPU DC/DC
NCP6131S52MNR
INPUTS
DCBATOUT
OUTPUTS
VCC_CORE
SYSTEM DC/DC
UP6128PQDD
INPUTS
DCBATOUT
OUTPUTS
1D05V_VTT
SYSTEM DC/DC
UP6183PQAG
INPUTS
DCBATOUT 5V_S5
OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
3D3V_S5
SYSTEM DC/DC
UP6165BQKF
INPUTS
DCBATOUT
OUTPUTS
1D5V_S3
0D75V_S0
DDR_VREF_S3
SYSTEM DC/DC
NCP5911MNTBG
INPUTS
DCBATOUT
OUTPUTS
VCC_GFXCORE_PWR
VGA
RT8208BGQW
INPUTS
DCBATOUT
OUTPUTS
VGA_CORE
TI CHARGER
BQ24745RHDR
INPUTS
DCBATOUT
26
SYSTEM DC/DC
OUTPUTS
BT+
RT9025
INPUTS
3D3V_S0
OUTPUTS
1D8V_S0
SYSTEM DC/DC
RT9025-25PSP
INPUTS OUTPUTS
26
1D5V_S3 1V_VGA_S0
3D3V_S5
1D8V_VGA_S0
42~43
45
41
46
44
92
40
47
93
Switches
HDD
56
ODD
56
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
28
2
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
JE40-HR
JE40-HR
JE40-HR
INPUTS OUTPUTS
1D5V_S3
1D5V_VGA_S0
3D3V_VGA_S03D3V_S0
PCB LAYER
L1:Top
L2:VCC
L3:Signal
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
L4:Signal
L5:GND
L6:Bottom
of
of
of
2 102
2 102
2 102
-1
-1
-1
Page 3
A
PCH Strapping
Name Schematics Notes
SPKR
INIT3_3V#
GNT3#/GPIO55
4 4
GNT2#/GPIO53
GNT1#/GPIO51
SPI_MOSI
NV_ALE
NC_CLE
HAD_DOCK_EN#
/GPIO[33]
3 3
HDA_SDO
HDA_SYNC
GPIO15
GPIO8
2 2
GPIO27
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kȍ
No Reboot Mode with TCO Disabled:
- 10-kȍ weak pull-up resistor.
Weak internal pull-up. Leave as "No Connect".
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Enable Danbury:
Disable Danbury:
DMI termination voltage. Weak internal pull-up. Do not pull low.
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Huron River Schematic Checklist Rev.0_7
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
B
C
Processor Strapping
Pin Name Strap Description Configuration (Default value for each bit is
CFG[2]
PCI-Express Static
Lane Reversal
CFG[4]
CFG[6:5]
CFG[7]
POWER PLANE
5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0
5V_USBX_S3
1D5V_S3
DDR_VREF_S3
BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5
3D3V_AUX_KBC
3D3V_AUX_S5
PCI-Express
Port Bifurcation
Straps
PEG DEFER TRAINING
VOLTAGE
5V
3.3V
1.8V
1.5V
1.05V
0.95 - 0.85V
0.75V
0.35V to 1.5V
0.4 to 1.25V
1.8V
3.3V
1V
5V
1.5V
0.75V
6V-14.1V
6V-14.1V
5V
5V
3.3V
3.3V
3.3V3D3V_LAN_S5
3.3V
3.3V
1 unless specified otherwise)
1:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Disabled - No Physical Display Port attached to
1:
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connectd to the EMBEDDED display Port
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
1:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
0:
Voltage Rails
ACTIVE IN
S0
S3
All S states
WOL_EN
DSW, Sx ON for supporting Deep Sleep states
G3, Sx
D
Huron River Schematic Checklist Rev.0_7
DESCRIPTION
CPU Core Rail
Graphics Core Rail
AC Brick Mode only
Legacy WOL
Powered by Li Coin Cell in G3
and +V3ALW in Sx
Default
Value
1
0
11
1
E
USB Table
Pair
PCIE Routing
0
1
LANE1 Mini Card2(WWAN)
LANE2
LANE3 Card Reader
LANE4
1 1
LANE5
LANE6
LANE7
LANE8 New Card
Mini Card1(WLAN)
Onboard LAN
USB3.0
Intel GBE LAN
Dock
SATA Table
SATA
Pair
0
1
2
3
4
5
Device
HDD1
HDD2
N/A
N/A
ODD
ESATA
2
3
4
5
6
7
8
9
10
11
12
13
Device
Touch Panel / 3G SIM
USB Ext. port 1 (HS)
Fingerprint
BLUETOOTH
Mini Card2 (WWAN)
CARD READER
X
X
USB Ext. port 4 / E-SATA /USB CHARGER
USB Ext. port 2
EDP CAMERA
Mini Card1 (WLAN)
CAMERA
New Card
SMBus ADDRESSES
2
I C / SMBus Addresses
Device
EC SMBus 1
Battery
CHARGER
EC SMBus 2
PCH
eDP
PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI
HURON RIVER ORB
Address Hex Bus Ref Des
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Table of Content
Table of Content
Table of Content
JE40-HR
JE40-HR
JE40-HR
3102
3102
3102
of
of
-1
-1
-1
Page 4
A
SSID = CPU
5
D D
C C
B B
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Lane reversal does not apply to
FDI sideband signals.
1D05V_VTT
Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
DMI_TXN[3:0]19
DMI_TXP[3:0]19
DMI_RXN[3:0]19
DMI_RXP[3:0]19
FDI_TXN[7:0]19
FDI_TXP[7:0]19
R402 24D9R2F-L-GPR402 24D9R2F-L-GP
1 2
R403 10KR2J-3-GPR403 10KR2J-3-GP
1 2
JE40 delete eDP function
4
CPU1A
CPU1A
SANDY
SANDY
62.10055.421
62.10055.421
Change:62.10053.611
Change:62.10053.611
2nd = 62.10055.321
2nd = 62.10055.321
3rd = 62.10040.821
3rd = 62.10040.821
SANDY
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
FDI_FSYNC019
FDI_FSYNC119
FDI_INT19
FDI_LSYNC019
FDI_LSYNC119
DP_COMP
eDP_HPD
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
H20
H17
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
J18
J17
J19
DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
FDI0_TX#0
FDI0_TX#1
FDI0_TX#2
FDI0_TX#3
FDI1_TX#0
FDI1_TX#1
FDI1_TX#2
FDI1_TX#3
FDI0_TX0
FDI0_TX1
FDI0_TX2
FDI0_TX3
FDI1_TX0
FDI1_TX1
FDI1_TX2
FDI1_TX3
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
EDP_COMPIO
EDP_ICOMPO
EDP_HPD
EDP_AUX
EDP_AUX#
EDP_TX0
EDP_TX1
EDP_TX2
EDP_TX3
EDP_TX#0
EDP_TX#1
EDP_TX#2
EDP_TX#3
SANDY
DMI
DMI
Intel(R) FDI
Intel(R) FDI
eDP
eDP
3
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1 OF 9
1 OF 9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
J22
J21
H22
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_IRCOMP_R
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_C_TXN15
PEG_C_TXN14
PEG_C_TXN13
PEG_C_TXN12
PEG_C_TXN11
PEG_C_TXN10
PEG_C_TXN9
PEG_C_TXN8
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0
PEG_C_TXP15
PEG_C_TXP14
PEG_C_TXP13
PEG_C_TXP12
PEG_C_TXP11
PEG_C_TXP10
PEG_C_TXP9
PEG_C_TXP8
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0
R401
R401
1 2
24D9R2F-L-GP
24D9R2F-L-GP
C401 Do Not Stuff
C401 Do Not Stuff
C402 Do Not Stuff
C402 Do Not Stuff
C403 Do Not Stuff
C403 Do Not Stuff
C404 Do Not Stuff
C404 Do Not Stuff
C405 Do Not Stuff
C405 Do Not Stuff
C406 Do Not Stuff
C406 Do Not Stuff
C407 Do Not Stuff
C407 Do Not Stuff
C408 Do Not Stuff
C408 Do Not Stuff
C409 Do Not Stuff
C409 Do Not Stuff
C410 Do Not Stuff
C410 Do Not Stuff
C411 Do Not Stuff
C411 Do Not Stuff
C412 Do Not Stuff
C412 Do Not Stuff
C413 Do Not Stuff
C413 Do Not Stuff
C414 Do Not Stuff
C414 Do Not Stuff
C415 Do Not Stuff
C415 Do Not Stuff
C416 Do Not Stuff
C416 Do Not Stuff
C417 Do Not Stuff
C417 Do Not Stuff
C418 Do Not Stuff
C418 Do Not Stuff
C419 Do Not Stuff
C419 Do Not Stuff
C420 Do Not Stuff
C420 Do Not Stuff
C421 Do Not Stuff
C421 Do Not Stuff
C422 Do Not Stuff
C422 Do Not Stuff
C423 Do Not Stuff
C423 Do Not Stuff
C424 Do Not Stuff
C424 Do Not Stuff
C425 Do Not Stuff
C425 Do Not Stuff
C426 Do Not Stuff
C426 Do Not Stuff
C427 Do Not Stuff
C427 Do Not Stuff
C428 Do Not Stuff
C428 Do Not Stuff
C429 Do Not Stuff
C429 Do Not Stuff
C430 Do Not Stuff
C430 Do Not Stuff
C431 Do Not Stuff
C431 Do Not Stuff
C432 Do Not Stuff
C432 Do Not Stuff
1D05V_VTT
PEG_RXN[0..15] 83
PEG_RXP[0..15] 83
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
PEG Static Lane Reversal
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
1 2
DIS_PX_Muxless
DIS_PX_Muxless
2
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
1
PEG_TXN[0..15] 83
PEG_TXP[0..15] 83
Stuff to disable internal graphics
function for power saving.
FDI_LSYNC0
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_INT
678
R404
R404
Do Not Stuff
Do Not Stuff
DIS
DIS
12
RN401
RN401
Do Not Stuff
Do Not Stuff
DIS
DIS
123
4 5
20100614 V1.1
NOTE:
Select a Fast FET similar to 2N7002E whose rise/
fall time is less than 6 ns. If HPD on eDP interface is
disabled, connect it to CPU VCCIO via a 10-kȍ pull-Up
resistor on the motherboard.
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
JE40-HR
JE40-HR
JE40-HR
4102
4102
4102
of
of
of
A
-1
-1
-1
Page 5
A
SSID = CPU
5
H_SNB_IVB#18
D D
1D05V_VTT
1 2
R501
R501
62R2J-GP
62R2J-GP
CRB : 47pf
CEKLT:43pf
C C
B B
H_PROCHOT#
12
C502
C502
SC47P50V2JN-3GP
SC47P50V2JN-3GP
R513
R513
3D3V_S0
8
7
6
1 2
56R2J-4-GP
56R2J-4-GP
BUF_CPU_RST#
H_THERMTRIP#22,36
H_PM_SYNC19
1 2
R505
R505
BUF_CPU_RST#
H_PROCHOT#27,42
Connect EC to PROCHOT# through inverting OD buffer.
H_CPUPWRGD22,36,97
PM_DRAM_PWRGD19,37
VDDPWRGOOD37
RN503
RN503
SRN1K5J-1-GP
XDP_DBRESET#
PLT_RST#18,27,31,36,65,66,71,82,97
SRN1K5J-1-GP
1
2
3
4 5
5
4
JE40 modify
JE40 modify
H_PECI22,27
H_PROCHOT#_R SM_RCOMP_0
R503
R503
1 2
10KR2J-3-GP
10KR2J-3-GP
DY
DY
Do Not Stuff
Do Not Stuff
CPU1B
CPU1B
SANDY
SANDY
C26
SNB_IVB#
AN34
SKTOCC#
AL33
CATERR#
AN33
PECI
AL32
PROCHOT#
AN32
THERMTRIP#
AM34
PM_SYNC
AP33
UNCOREPWRGOOD
V8
SM_DRAMPWROK
AR33
RESET#
SANDY
SANDY
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
CLOCKS
CLOCKS
DDR3
DDR3
JTAG & BPM
JTAG & BPM
4
3
2 OF 9
2 OF 9
BCLK
BCLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
MISC
MISC
PRDY#
PREQ#
TCK
TMS
TRST#
TDO
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
3
A28
CLK_EXP_P 20
A27
CLK_EXP_N 20
CLK_DP_P_R
A16
CLK_DP_N_R
A15
R8
AK1
A5
A4
AP29
AP27
AR26
AR27
AP30
AR28
TDI
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
1 2
SM_RCOMP_1
SM_RCOMP_2
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
JE40 modify
XDP_TRST#
XDP_TDO
XDP_DBRESET#
JE40 modify
RN502
RN502
Do Not Stuff
Do Not Stuff
1
DIS
DIS
2 3
R502
R502
4K99R2F-L-GP
4K99R2F-L-GP
R506 140R2F-GPR506 140R2F-GP
1 2
R507 25D5R2F-GPR507 25D5R2F-GP
1 2
R508 200R2F-L-GPR508 200R2F-L-GP
1 2
4
1D05V_VTT
SM_DRAMRST# 37
XDP_TDO
XDP_TRST#
2
JE40 modify
RN501
RN501
SRN51J-GP
SRN51J-GP
2 3
1
2
1
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
1D05V_VTT
4
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
JE40-HR
JE40-HR
JE40-HR
5102
5102
5102
1
-1
-1
of
of
of
-1
A
Page 6
5
4
3
2
1
SSID = CPU
4 OF 9
3 OF 9
CPU1C
CPU1C
SANDY
SANDY
D D
C C
B B
M_A_DQ[63:0]14 M_B_DQ[63:0]15
M_A_BS014
M_A_BS114
M_A_BS214
M_A_CAS#14
M_A_RAS#14
M_A_WE#14
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
G10
N10
M10
AG6
AG5
AK6
AK5
AH5
AH6
AK8
AK9
AH8
AH9
AL9
AL8
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
AE8
AD9
AF9
C5
SA_DQ0
D5
SA_DQ1
D3
SA_DQ2
D2
SA_DQ3
D6
SA_DQ4
C6
SA_DQ5
C2
SA_DQ6
C3
SA_DQ7
F10
SA_DQ8
F8
SA_DQ9
SA_DQ10
G9
SA_DQ11
F9
SA_DQ12
F7
SA_DQ13
G8
SA_DQ14
G7
SA_DQ15
K4
SA_DQ16
K5
SA_DQ17
K1
SA_DQ18
J1
SA_DQ19
J5
SA_DQ20
J4
SA_DQ21
J2
SA_DQ22
K2
SA_DQ23
M8
SA_DQ24
SA_DQ25
N8
SA_DQ26
N7
SA_DQ27
SA_DQ28
M9
SA_DQ29
N9
SA_DQ30
M7
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
AJ5
SA_DQ38
AJ6
SA_DQ39
AJ8
SA_DQ40
SA_DQ41
AJ9
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
V6
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
3 OF 9
SA_CLK0
SA_CLK#0
SA_CKE0
SA_CLK1
SA_CLK#1
SA_CKE1
SA_CLK2
SA_CLK#2
SA_CKE2
SA_CLK3
SA_CLK#3
SA_CKE3
SA_CS#0
SA_CS#1
SA_CS#2
SA_CS#3
SA_ODT0
SA_ODT1
SA_ODT2
SA_ODT3
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
AB6
AA6
V9
AA5
AB5
V10
AB4
AA4
W9
AB3
AA3
W10
AK3
AL3
AG1
AH1
AH3
AG3
AG2
AH2
C4
G6
J3
M6
AL6
AM8
AR12
AM15
D4
F6
K3
N6
AL5
AM9
AR11
AM14
AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CKE0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
M_A_A[15:0] 14
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_BS015
M_B_BS115
M_B_BS215
M_B_CAS#15
M_B_RAS#15
M_B_WE#15
D10
K10
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
AA10
AB8
AB9
CPU1D
CPU1D
SANDY
SANDY
C9
SB_DQ0
A7
SB_DQ1
SB_DQ2
C8
SB_DQ3
A9
SB_DQ4
A8
SB_DQ5
D9
SB_DQ6
D8
SB_DQ7
G4
SB_DQ8
F4
SB_DQ9
F1
SB_DQ10
G1
SB_DQ11
G5
SB_DQ12
F5
SB_DQ13
F2
SB_DQ14
G2
SB_DQ15
J7
SB_DQ16
J8
SB_DQ17
SB_DQ18
K9
SB_DQ19
J9
SB_DQ20
J10
SB_DQ21
K8
SB_DQ22
K7
SB_DQ23
M5
SB_DQ24
N4
SB_DQ25
N2
SB_DQ26
N1
SB_DQ27
M4
SB_DQ28
N5
SB_DQ29
M2
SB_DQ30
M1
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
R6
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
SB_BS1
SB_BS2
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
4 OF 9
SB_CLK0
SB_CLK#0
SB_CKE0
SB_CLK1
SB_CLK#1
SB_CKE1
SB_CLK2
SB_CLK#2
SB_CKE2
SB_CLK3
SB_CLK#3
SB_CKE3
SB_CS#0
SB_CS#1
SB_CS#2
SB_CS#3
SB_ODT0
SB_ODT1
SB_ODT2
SB_ODT3
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
AE2
M_B_DIM0_CLK_DDR0 15
AD2
M_B_DIM0_CLK_DDR#0 15
R9
M_B_DIM0_CKE0 15
AE1
M_B_DIM0_CLK_DDR1 15
AD1
M_B_DIM0_CLK_DDR#1 15
R10
M_B_DIM0_CKE1 15
AB2
AA2
T9
AA1
AB1
T10
AD3
M_B_DIM0_CS#0 15
AE3
M_B_DIM0_CS#1 15
AD6
AE6
AE4
M_B_DIM0_ODT0 15
AD4
M_B_DIM0_ODT1 15
AD5
AE5
M_B_DQS#0
D7
M_B_DQS#1
F3
M_B_DQS#2
K6
M_B_DQS#3
N3
M_B_DQS#4
AN5
M_B_DQS#5
AP9
M_B_DQS#6
AK12
M_B_DQS#7
AP15
M_B_DQS0
C7
M_B_DQS1
G3
M_B_DQS2
J6
M_B_DQS3
M3
M_B_DQS4
AN6
M_B_DQS5
AP8
M_B_DQS6
AK11
M_B_DQS7
AP14
M_B_A0
AA8
M_B_A1
T7
M_B_A2
R7
M_B_A3
T6
M_B_A4
T2
M_B_A5
T4
M_B_A6
T3
M_B_A7
R2
M_B_A8
T5
M_B_A9
R3
M_B_A10
AB7
M_B_A11
R1
M_B_A12
T1
M_B_A13
AB10
M_B_A14
R5
M_B_A15
R4
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
M_B_A[15:0] 15
SANDY
SANDY
SANDY
A A
5
4
3
SANDY
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
2
Date: Sheet
CPU (DDR)
CPU (DDR)
CPU (DDR)
JE40-HR
JE40-HR
JE40-HR
6 102
6 102
6 102
1
-1
-1
of
of
-1
Page 7
5
4
3
2
1
SSID = CPU
CFG2
12
R702
D D
DIS_PX_Muxless
DIS_PX_Muxless
PEG Static Lane Reversal
CFG2
1: Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
R702
Do Not Stuff
Do Not Stuff
AK28
AK29
AL26
AL27
AK26
AL29
AL30
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
AJ31
AH31
AJ33
AH33
AJ26
CPU1E
CPU1E
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD#AJ31
RSVD#AH31
RSVD#AJ33
RSVD#AH33
RSVD#AJ26
SANDY
SANDY
B4:VREF_DQ CHA
M_VREF_DQ_DIMM0_C
C C
B B
M_VREF_DQ_DIMM1_C
D1:VREF_DQ CHB
4
RN701
RN701
SRN1KJ-7-GP
SRN1KJ-7-GP
1
2 3
G25
G24
F25
F24
F23
D24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
B18
A19
J20
J15
B4
D1
RSVD#B4
RSVD#D1
RSVD#F25
RSVD#F24
RSVD#F23
RSVD#D24
RSVD#G25
RSVD#G24
RSVD#E23
RSVD#D23
RSVD#C30
RSVD#A31
RSVD#B30
RSVD#B29
RSVD#D30
RSVD#B31
RSVD#A30
RSVD#C29
RSVD#J20
RSVD#B18
RSVD#A19
RSVD#J15
RESERVED
RESERVED
5 OF 9
5 OF 9
RSVD#L7
RSVD#AG7
RSVD#AE7
RSVD#AK2
RSVD#W8
RSVD#AT26
RSVD#AM33
RSVD#AJ27
RSVD#T8
RSVD#J16
RSVD#H16
RSVD#G16
RSVD#AR35
RSVD#AT34
RSVD#AT33
RSVD#AP35
RSVD#AR34
RSVD#B34
RSVD#A33
RSVD#A34
RSVD#B35
RSVD#C35
RSVD#AJ32
RSVD#AK32
RSVD#AH27
RSVD#AN35
RSVD#AM35
RSVD#AT2
RSVD#AT1
RSVD#AR1
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
AM35
AT2
AT1
AR1
SANDY
SANDY
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
CPU (RESERVED)
CPU (RESERVED)
CPU (RESERVED)
JE40-HR
JE40-HR
JE40-HR
7 102
7 102
7 102
1
of
of
-1
-1
-1
Page 8
5
SSID = CPU
PROCESSOR CORE POWER
VCC_CORE
D D
C C
B B
A A
12
C801
C801
DY
DY
12
C820
C820
DY
DY
12
12
VCC Output Decoupling Recommendation:
4 x 470 uF at Bottom Socket Edge
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity
53A
12
C802
C802
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C819
C819
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C821
C821
C816
C816
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C836
C836
C837
C837
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
5
12
C803
C803
DY
DY
Do Not Stuff
Do Not Stuff
12
C818
C818
DY
DY
Do Not Stuff
Do Not Stuff
12
C822
C822
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C835
C835
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C804
C804
DY
DY
Do Not Stuff
Do Not Stuff
12
C817
C817
DY
DY
Do Not Stuff
Do Not Stuff
12
C823
C823
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C834
C834
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C811
C811
Do Not Stuff
Do Not Stuff
12
C815
C815
Do Not Stuff
Do Not Stuff
12
C824
C824
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C833
C833
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C825
C825
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C832
C832
DY
DY
Do Not Stuff
Do Not Stuff
12
C826
C826
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C831
C831
Do Not Stuff
Do Not Stuff
12
C827
C827
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C828
C828
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
4
VCC_CORE
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
3
POWER
CPU1F
CPU1F
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
SANDY
SANDY
POWER
SANDY
SANDY
CORE SUPPLY
CORE SUPPLY
SENSE LINES SVID
SENSE LINES SVID
6 OF 9
6 OF 9
AH13
VCCIO
AH10
VCCIO
AG10
VCCIO
AC10
VCCIO
Y10
VCCIO
U10
VCCIO
P10
VCCIO
L10
VCCIO
J14
VCCIO
J13
VCCIO
J12
VCCIO
J11
VCCIO
H14
VCCIO
H12
VCCIO
H11
VCCIO
G14
VCCIO
G13
VCCIO
G12
VCCIO
F14
VCCIO
F13
VCCIO
F12
VCCIO
F11
VCCIO
E14
VCCIO
E12
VCCIO
E11
VCCIO
D14
VCCIO
D13
VCCIO
D12
VCCIO
D11
VCCIO
C14
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VIDALERT#
VIDSCLK
VIDSOUT
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
H_CPU_SVIDALRT#
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
PEG AND DDR
PEG AND DDR
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
3
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
7 x 22 uF & 2 x 0805 no-stuff at Top
12
C805
C805
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
No-stuff sites outside the socket may be removed.
No-stuff sites inside the socket cavity need to remain.
12
C812
C812
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
For CRB VIDSOUT need to pull high 130 ohm closr to CPU and IMVP7
For CRB VIDALERT# need to pull high 75 ohm close to CPU
VCCIO_SENSE 45
VSSIO_SENSE 45
12
12
C806
C806
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C813
C813
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
H_CPU_SVIDCLK 42
H_CPU_SVIDDAT 42
VCC_CORE
2
12
12
C829
C829
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C810
C810
C809
C809
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C830
C830
C842
C842
DY
DY
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VR_SVID_ALERT# 42
H_CPU_SVIDDAT
R801,R802 close to CPU
VCCSENSE 42
VSSSENSE 42
2
C807
C807
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C814
C814
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R803
R803
43R2J-GP
43R2J-GP
12
R801
R801
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R802
R802
100R2F-L1-GP-U
100R2F-L1-GP-U
1
1D05V_VTT
12
12
C838
C838
C839
C839
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
12
12
C844
C844
C843
C843
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R804 130R2F-1-GPR804 130R2F-1-GP
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet of
12
12
12
1 2
C841
C841
C840
C840
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C845
C845
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
JE40-HR
JE40-HR
JE40-HR
1D05V_VTT
1
8 102
of
8 102
of
8 102
-1
-1
-1
Page 9
5
VAXG Output Decoupling Recommendation:
SSID = CPU
VCC_GFXCORE
2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge
PROCESSOR VAXG: 24A
D D
C C
B B
VCC_GFXCORE
Disabling Guidelines for External Graphics Designs:
Can connect to GND if motherboard only supports external
graphics and if GFX VR is not stuffed.
Can be left floating (Gfx VR keeps VAXG rail from floating)
if the VR is stuffed
R903
R903
Do Not Stuff
Do Not Stuff
DIS
DIS
1 2
12
12
C901
C901
DY
DY
Do Not Stuff
Do Not Stuff
UMA_PX_Muxless
UMA_PX_Muxless
12
12
C907
C907
DY
DY
Do Not Stuff
Do Not Stuff
UMA_PX_Muxless
UMA_PX_Muxless
R904
R904
Do Not Stuff
Do Not Stuff
DIS
DIS
1 2
12
C902
C902
C903
C903
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
UMA_PX_Muxless
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C918
C918
C908
C908
DY
DY
Do Not Stuff
Do Not Stuff
UMA_PX_Muxless
UMA_PX_Muxless
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R905
R905
Do Not Stuff
Do Not Stuff
DIS
DIS
1 2
12
C904
C904
UMA_PX_Muxless
UMA_PX_Muxless
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C919
C919
UMA_PX_Muxless
UMA_PX_Muxless
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
1D8V_S0
12
4
12
12
C905
C905
C906
C906
DY
DY
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
UMA_PX_Muxless
UMA_PX_Muxless
R901
R901
Do Not Stuff
Do Not Stuff
DIS
DIS
C921
C921
C920
C920
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
PROCESSOR VCCPLL: 1.2A
C922
C922
SC1U10V2KX-1GP
SC1U10V2KX-1GP
AT24
AT23
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
3
2
1
R906,R907 close to CPU
VCC_GFXCORE
12
C914
C914
Do Not Stuff
Do Not Stuff
12
R906
R906
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R907
R907
100R2F-L1-GP-U
100R2F-L1-GP-U
1D5V_S0
POWER
CPU1G
CPU1G
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
B6
VCCPLL
A6
VCCPLL
A2
VCCPLL
SANDY
SANDY
POWER
SANDY
SANDY
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
SENSE
SENSE
VREFMISC
VREFMISC
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
SA RAIL
SA RAIL
7 OF 9
7 OF 9
VAXG_SENSE
VSSAXG_SENSE
LINES
LINES
SM_VREF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA_SENSE
FC_C22
VCCSA_VID1
AK35
AK34
Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.
VCC_AXG_SENSE 42
VSS_AXG_SENSE 42
+V_SM_VREF_CNT should have 10 mil trace width
AL1
AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
+V_SM_VREF_CNT 37
PROCESSOR VDDQ: 10A
12
12
C909
C909
C910
Do Not Stuff
Do Not Stuff
C910
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
0D85V_S0
DY
DY
12
C911
C911
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
PROCESSOR VCCSA: 6A
VCCSA Output Decoupling Recommendation:
12
M27
M26
L26
J26
J25
J24
H26
H25
H23
C22
C24
VCCUSA_SENSE
H_FC_C22
DY
DY
0D85V_S0
12
12
R902
R902
10R2J-2-GP
10R2J-2-GP
23
C915
C915
C916
C916
Do Not Stuff
Do Not Stuff
1 x 330 uF
2 x 10 uF at Bottom Socket Cavity
1 x 10 uF at Bottom Socket Edge
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R902 need be close to pin H23.
1
TP901 Do Not StuffTP901 Do Not Stuff
RN901
RN901
SRN1KJ-7-GP
SRN1KJ-7-GP
VCCSA_SEL 48
1
VCC_AXG_SENSE
VSS_AXG_SENSE
12
C912
C912
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C913
C913
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VDDQ Output Decoupling Recommendation:
1 x 330 uF
6 x 10 uF
4
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
9 102
9 102
9 102
-1
-1
-1
Page 10
5
4
3
2
1
SSID = CPU
8 OF 9
CPU1H
CPU1H
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
D D
C C
B B
AT19
AT16
AT13
AT10
AT7
AT4
AT3
AR25
AR22
AR19
AR16
AR13
AR10
AR7
AR4
AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AP7
AP4
AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AN7
AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AM7
AM4
AM3
AM2
AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AL7
AL4
AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AK7
AK4
AJ25
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SANDY
SANDY
VSS
VSS
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
CPU1I
CPU1I
SANDY
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P9
VSS
P8
VSS
P6
VSS
P5
VSS
P3
VSS
P2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L9
VSS
L8
VSS
L6
VSS
L5
VSS
L4
VSS
L3
VSS
L2
VSS
L1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H9
VSS
H8
VSS
H7
VSS
H6
VSS
H5
VSS
H4
VSS
H3
VSS
H2
VSS
H1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
SANDY
VSS
VSS
9 OF 9
9 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
SANDY
SANDY
A A
5
4
3
SANDY
SANDY
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
2
Date: Sheet
CPU (VSS)
CPU (VSS)
CPU (VSS)
JE40-HR
JE40-HR
JE40-HR
10 102
10 102
10 102
1
-1
-1
of
of
-1
Page 11
5
D D
C C
4
3
2
1
JE40 delete XDP function
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
XDP
XDP
XDP
JE40-HR
JE40-HR
JE40-HR
11 102
11 102
11 102
1
of
of
-1
-1
-1
Page 12
5
D D
C C
4
3
2
1
(Blanking)
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
12 102
12 102
12 102
of
of
of
1
-1
Page 13
5
D D
C C
4
3
2
1
(Blanking)
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
13 102
13 102
13 102
of
of
of
1
-1
Page 14
5
SSID = MEMORY
M_A_A[15:0] 6
D D
M_A_BS26
M_A_BS06
M_A_BS16
M_A_DQ[63:0]6
C C
B B
DDR_VREF_S3
12
-2
0D75V_S0
A A
12
C1413
C1411
C1411
12
C1413
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Place these caps
close to VTT1 and
VTT2.
12
C1419
C1419
C1421
C1421
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
5
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
M_A_DIM0_ODT06
M_A_DIM0_ODT16
DDR3_DRAMRST#15,37
DDR_VREF_S3
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
0D75V_S0
4
H =4mm
4
3
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
NP1
NP2
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
EVENT#
VDDSPD
SA0
SA1
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
197
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
1D5V_S3
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_A_DIM0_CS#0 6
M_A_DIM0_CS#1 6
M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
PCH_SMBDATA 15,20
PCH_SMBCLK 15,20
TS#_DIMM0_1 15
PART NUMBER Height
DM1
DM1
DDR3-204P-122-GP
DDR3-204P-122-GP
62.10017.Z51
62.10017.Z51
2nd = 62.10017.V51
2nd = 62.10017.V51
3rd = 62.10017.M51
3rd = 62.10017.M51
4th = 62.10017.X41
4th = 62.10017.X41
3
3D3V_S0
12
C1401
C1401
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Thermal EVENT
TS#_DIMM0_1
1D5V_S3
TYPE
2
R1403
R1403
1 2
10KR2J-3-GP
10KR2J-3-GP
SODIMM A DECOUPLING
12
C1403
C1403
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
2
3D3V_S0
12
C1404
C1404
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C1416
C1416
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
Layout Note:
Place these Caps near
SO-DIMMA.
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
12
12
C1406
C1406
C1407
C1407
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
DY
DY
C1405
C1405
12
C1417
C1417
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C1408
C1408
3G_RF
3G_RF
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
JE40-HR
JE40-HR
JE40-HR
12
C1409
C1409
3G_RF
3G_RF
3G_RF
3G_RF
SCD1U50V3KX-GP
SCD1U50V3KX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
C1410
C1410
SCD1U50V3KX-GP
SCD1U50V3KX-GP
of
of
of
14 102
14 102
14 102
-1
-1
-1
Page 15
5
SSID = MEMORY
M_B_A[15:0] 6
D D
M_B_BS26
M_B_BS06
M_B_BS16
M_B_DQ[63:0]6
C C
B B
DDR_VREF_S3
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1515
C1515
Place these caps
close to VTT1 and
VTT2.
12
C1519
C1519
C1521
C1521
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C1517
C1517
M_B_DQS#[7:0] 6
M_B_DQS[7:0] 6
M_B_DIM0_ODT06
M_B_DIM0_ODT16
DDR3_DRAMRST#14,37
5
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
-2
0D75V_S0
A A
12
4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
DDR_VREF_S3
0D75V_S0
4
H = 8mm
3
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
NP1
NP2
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
EVENT#
VDDSPD
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
197
SA0
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6
M_B_DIM0_CS#0 6
M_B_DIM0_CS#1 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
PCH_SMBDATA 14,20
PCH_SMBCLK 14,20
TS#_DIMM0_1 14
SA1_DIM1
1D5V_S3
3D3V_S0
12
12
R1501
R1501
10KR2J-3-GP
10KR2J-3-GP
DM2
DM2
DDR3-204P-126-GP
DDR3-204P-126-GP
62.10024.D41
62.10024.D41
2nd = 62.10017.R91
2nd = 62.10017.R91
3rd = 62.10017.V61
3rd = 62.10017.V61
4th = 62.10017.X51
4th = 62.10017.X51
3
C1501
C1501
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Layout Note:
Place these Caps near
SO-DIMMB.
2
1D5V_S3
SODIMM B DECOUPLING
C1503
C1503
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
12
3G_RF
3G_RF
3G_RF
3G_RF
2
1
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
12
C1505
C1505
C1504
C1504
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
C1513
C1513
12
12
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
C1507
C1507
C1506
C1506
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1514
C1514
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
12
12
C1508
C1508
3G_RF
3G_RF
SCD1U50V3KX-GP
SCD1U50V3KX-GP
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
JE40-HR
JE40-HR
JE40-HR
12
C1509
C1509
3G_RF
3G_RF
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
C1510
C1510
of
of
of
15 102
15 102
15 102
-1
-1
-1
Page 16
5
D D
4
3
2
1
C C
B B
A A
5
(Blanking)
4
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR3-SODIMM2
DDR3-SODIMM2
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
3
Date: Sheet
2
DDR3-SODIMM2
JE40-HR
JE40-HR
JE40-HR
16 102
16 102
16 102
-1
-1
of
of
of
1
-1
Page 17
5
D D
4
3
2
1
3D3V_S0
RN1701
RN1701
SRN2K2J-1-GP
SRN2K2J-1-GP
2 3
1
UMA_Muxless
UMA_Muxless
RN1702
RN1702
SRN100KJ-6-GP
SRN100KJ-6-GP
1
2 3
UMA_Muxless
UMA_Muxless
C C
4
4
L_CTRL_DATA
L_CTRL_CLK
L_BKLT_EN
LVDS_VDD_EN
L_DDC_DATA(PAGE17):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display
Place near PCH
2K37R2F-GP
2K37R2F-GP
UMA_Muxless
UMA_Muxless
R1701
R1701
12
Impedance:90 ohm
L_BKLT_EN94
LVDS_VDD_EN94
L_BKLT_CTRL94
LVDS_DDC_CLK_R94
LVDS_DDC_DATA_R94
RN1704
RN1704
SRN0J-6-GP
SRN0J-6-GP
1
2 3
UMA_Muxless
UMA_Muxless
LVDSA_CLK#94
LVDSA_CLK94
LVDSA_DATA0#94
LVDSA_DATA1#94
LVDSA_DATA2#94
LVDSA_DATA094
LVDSA_DATA194
LVDSA_DATA294
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VREFH
4
LVDS_VREFL
JE40 modify
JE40 delete LVDS B channel
Close to PCH side
CRT_BLUE
CRT_GREEN
B B
CRT_RED
678
123
4 5
RN1705
RN1705
SRN150F-1-GP
SRN150F-1-GP
UMA_PX_Muxless
UMA_PX_Muxless
CRT_BLUE95
CRT_GREEN95
CRT_RED95
CRT_DDC_CLK95
CRT_DDC_DATA95
CRT_HSYNC95
CRT_VSYNC95
1KR2D-1-GP
1KR2D-1-GP
R1702
R1702
DAC_IREF_R
12
PCH1D
PCH1D
J47
L_BKLTEN
M45
L_VDD_EN
P45
L_BKLTCTL
T40
L_DDC_CLK
K47
L_DDC_DATA
T45
L_CTRL_CLK
P39
L_CTRL_DATA
AF37
LVD_IBG
AF36
LVD_VBG
AE48
LVD_VREFH
AE47
LVD_VREFL
AK39
LVDSA_CLK#
AK40
LVDSA_CLK
AN48
LVDSA_DATA#0
AM47
LVDSA_DATA#1
AK47
LVDSA_DATA#2
AJ48
LVDSA_DATA#3
AN47
LVDSA_DATA0
AM49
LVDSA_DATA1
AK49
LVDSA_DATA2
AJ47
LVDSA_DATA3
AF40
LVDSB_CLK#
AF39
LVDSB_CLK
AH45
LVDSB_DATA#0
AH47
LVDSB_DATA#1
AF49
LVDSB_DATA#2
AF45
LVDSB_DATA#3
AH43
LVDSB_DATA0
AH49
LVDSB_DATA1
AF47
LVDSB_DATA2
AF43
LVDSB_DATA3
N48
CRT_BLUE
P49
CRT_GREEN
T49
CRT_RED
T39
CRT_DDC_CLK
M40
CRT_DDC_DATA
M47
CRT_HSYNC
M49
CRT_VSYNC
T43
DAC_IREF
T42
CRT_IRTN
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
LVDS
LVDS
CRT
CRT
Digital Display Interface
Digital Display Interface
4 OF 10
4 OF 10
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
UMA_Muxless
UMA_Muxless
DDBP_DATA2#
DDBP_DATA2
DDBP_DATA1#
DDBP_DATA1
DDBP_DATA0#
DDBP_DATA0
DDBP_CLK#
DDBP_CLK
Impedance:90 ohm
3D3V_S0
4
RN1706
RN1706
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
C1701 SCD1U10V2KX-5GP
C1701 SCD1U10V2KX-5GP
1 2
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
C1702 SCD1U10V2KX-5GP
C1702 SCD1U10V2KX-5GP
1 2
C1703 SCD1U10V2KX-5GP
C1703 SCD1U10V2KX-5GP
1 2
C1704 SCD1U10V2KX-5GP
C1704 SCD1U10V2KX-5GP
1 2
C1705 SCD1U10V2KX-5GP
C1705 SCD1U10V2KX-5GP
1 2
C1706 SCD1U10V2KX-5GP
C1706 SCD1U10V2KX-5GP
1 2
C1707 SCD1U10V2KX-5GP
C1707 SCD1U10V2KX-5GP
1 2
C1708 SCD1U10V2KX-5GP
C1708 SCD1U10V2KX-5GP
1 2
Close to PCH side
DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected
HDMI_PCH_DET 51
HDMI_DATA2_R# 51
HDMI_DATA2_R 51
HDMI_DATA1_R# 51
HDMI_DATA1_R 51
HDMI_DATA0_R# 51
HDMI_DATA0_R 51
HDMI_CLK_R# 51
HDMI_CLK_R 51
Impedance:100 ohm
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
17 102
17 102
17 102
-1
-1
-1
Page 18
5
R
4
3
2
1
SSID = PCH
RN1801
RN1801
SRN8K2J-2-GP-U
D D
3D3V_S0
INT_PIRQH#
INT_PIRQB#
INT_PIRQF#
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
C C
GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19
0 0 LPC
0 1 Reserved
B B
SRN8K2J-2-GP-U
1
2
3
4
5 6
override/Top-Block
Swap Override enabled
High = Default
10
INT_PIRQD#
9
INT_PIRQE#
8
INT_PIRQC#INT_PIRQA#
7
USB30_SMI#
BOOT BIOS Strap
11
SPI(Default)
3D3V_S0
RN1803
RN1803
SRN10KJ-5-GP
DGPU_HOLD_RST#83
1
DGPU_PWR_EN#93
1
R1813
R1813
Do Not Stuff
Do Not Stuff
1 2
SRN10KJ-5-GP
2 3
1
DGPU_PWM_SELECT#
4
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
DGPU_SELECT#
INT_PIRQE#
INT_PIRQF#
INT_PIRQH#
DGPU_HOLD_RST#
DGPU_PWR_EN#
TP1806Do Not Stuff TP1806Do Not Stuff
Reserved01
TP1804Do Not Stuff TP1804Do Not Stuff
SATA_ODD_DA#56
USB30_SMI#82
JE40 modify 07/16
PLT_RST#5,27,31,36,65,66,71,82,97
R1804 22R2J-2-GPR1804 22R2J-2-GP
CLK_PCI_LPC71
CLK_PCI_FB20
CLK_PCI_KBC27
EC1803
EC1803
Do Not Stuff
Do Not Stuff
1 2
DY
DY
DY
DY
1 2
R1805 22R2J-2-GPR1805 22R2J-2-GP
1 2
R1806 22R2J-2-GPR1806 22R2J-2-GP
1 2
EC1802
EC1802
1 2
Do Not Stuff
Do Not Stuff
DY
DY
EC1801
EC1801
Do Not Stuff
Do Not Stuff
1 2
CLK_PCI_LPC_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
PCH1E
PCH1E
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
C18
N30
H3
AH12
AM4
AM5
Y13
K24
L24
AB46
AB45
B21
M20
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
K40
K38
H38
G38
C46
C44
E40
D47
E42
F46
G42
G40
C42
D44
K10
C6
H49
H43
J48
K42
H40
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
TP1
Point
Point
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20
TP21
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
PIRQA#
PIRQB#
PIRQC#
PIRQD#
REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54
GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PME#
PLTRST#
CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4
RSVD
RSVD
PCI
PCI
NVRAM
NVRAM
USB
USB
5 OF 10
5 OF 10
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
DF_TVS
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
AV5
NV_CLE
AY1
AV10
AT8
AY5
BA2
AT12
USB Ext. port 1 (HS)
BF3
External debug port use on Huron river platform
C24
A24
C25
B25
C26
JE40 delete FP function
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
JE40 delete eDP function
A30
L32
K32
G32
E32
C32
JE40 delete New Card function
A32
USB_RBIAS
C33
B33
A14
K20
B17
C16
L16
A16
D14
C14
DMI & FDI Termination Voltage
NV_CLE
Set to Vss when LOW
Set to Vcc when HIGH
check R1808 R1809
CRB : 2.2K
CEKLT: 1K
NV_CLE
USB_PN0 66
USB_PP0 66
USB_PN1 61
USB_PP1 61
USB_PN3 63
USB_PP3 63
USB_PN4 66
USB_PP4 66
USB_PN5 32
USB_PP5 32
USB_PN8 82
USB_PP8 82
USB_PN9 61
USB_PP9 61
USB_PN11 65
USB_PP11 65
USB_PN12 49
USB_PP12 49
3D3V_S5
1 2
R1820
R1820
10KR2J-3-GP
10KR2J-3-GP
SB add USB port 5
JE40 co-lay USB2.0
1 2
R1811
R1811
22D6R2F-L1-GP
22D6R2F-L1-GP
1 2
R1809
R1809
1KR2J-1-GP
1KR2J-1-GP
12
R1808
R1808
2K2R2J-2-GP
2K2R2J-2-GP
ଖ
H_SNB_IVB# 5
1D8V_S0
USB Table
Pair
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Touch Panel / 3G SIM
USB Ext. port 1 (HS)
Fingerprint
BLUETOOTH
Mini Card2 (WWAN)
CARD READER(DY)
X
X
USB Ext. port 4 / E-SATA /USB CHARGE
USB Ext. port 2
EDP CAMERA
Mini Card1 (WLAN)
CAMERA
New Card
Device
OC[3:0]# for Device 29 (Ports 0-7)
KBC CLK EMI
A A
5
4
OC[7:4]# for Device 26 (Ports 8-13)
3
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
18 102
18 102
18 102
-1
-1
-1
Page 19
5
4
3
2
1
SSID = PCH
D D
Signal Routing Guideline:
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
1D05V_VTT
R1901 49D9R2F-GPR1901 49D9R2F-GP
R1902 750R2F-GPR1902 750R2F-GP
R1926
R1926
Do Not Stuff
Do Not Stuff
1 2
DY
C C
DY
1 2
R1904
R1904
100KR2J-1-GP
100KR2J-1-GP
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
B B
A A
SYS_PWROK
PWROK
3D3V_S5
5
3D3V_S0
S0_PWR_GOOD27,42
RN1901
RN1901
SRN10KJ-6-GP
SRN10KJ-6-GP
8
7
6
R1921
R1921
10KR2J-3-GP
10KR2J-3-GP
R1908
R1908
100KR2J-1-GP
100KR2J-1-GP
DMI_RXN[3:0]4
DMI_RXP[3:0]4
DMI_TXN[3:0]4
DMI_TXP[3:0]4
DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34
DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34
DMI_TXN04
DMI_TXN14
DMI_TXN24
DMI_TXN34
DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34
R1924
R1924
Do Not Stuff
Do Not Stuff
PM_DRAM_PWRGD5,37
DMI_COMP_R
RBIAS_CPY
SUS_PWR_ACK
SYS_RESET#
SYS_PWROK36
PWROK
12
JE40 modify
PCIE_WAKE#
CRB : 1K
PM_RSMRST#
BATLOW#
PM_RI#
1 2
1 2
0628 Modify:
Change R1904 to 100K 0402 from 10K and default stuff.
JE40 modify
1 2
R1905
R1905
10KR2J-3-GP
10KR2J-3-GP
SUS_PWR_ACK27
PM_PWRBTN#27,97
AC_PRESENT27
BATLOW#
1
PM_RI#
2
AC_PRESENT
3
SUS_PWR_ACK
45
PCIE_WAKE#
12
PCH1C
PCH1C
BC24
DMI0RXN
BE20
DMI1RXN
BG18
DMI2RXN
BG20
DMI3RXN
BE24
DMI0RXP
BC20
DMI1RXP
BJ18
DMI2RXP
BJ20
DMI3RXP
AW24
DMI0TXN
AW20
DMI1TXN
BB18
DMI2TXN
AV18
DMI3TXN
AY24
DMI0TXP
AY20
DMI1TXP
AY18
DMI2TXP
AU18
DMI3TXP
BJ24
DMI_ZCOMP
BG25
DMI_IRCOMP
BH21
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT/GPIO31
E10
BATLOW#/GPIO72
A10
RI#
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
CEKLT: 10K
PWRBTN#
This signal has an internal pull-up resistor
12
PM_RSMRST#
PM_RSMRST#
CRB : PL 10K
ANNIE : PL 100K
4
Cougar
Cougar
Point
Point
3 OF 10
3 OF 10
BJ14
FDI_RXN0
AY14
FDI_RXN1
BE14
FDI_RXN2
BH13
FDI_RXN3
BC12
FDI_RXN4
BJ12
FDI_RXN5
BG10
FDI_RXN6
BG9
FDI_RXN7
BG14
FDI_RXP0
BB14
FDI_RXP1
BF14
FDI_RXP2
BG13
FDI_RXP3
BE12
FDI_RXP4
BG12
FDI_RXP5
BJ10
DMI
DMI
System Power Management
System Power Management
FDI_RXP6
FDI
FDI
FDI_RXP7
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
DSWVRMEN
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_SUS#
PMSYNCH
SLP_LAN#/GPIO29
3D3V_AUX_S5
R1916
R1916
10KR2J-3-GP
10KR2J-3-GP
1 2
3V_5V_POK_#
FDI_INT
DPWROK
WAKE#
SLP_S4#
SLP_S3#
SLP_A#
BH9
AW16
AV12
BC10
AV14
BB10
A18
E22
B9
N3
G8
N14
D10
H4
F4
G10
G16
AP14
K14
R1909
R1909
100KR2J-1-GP
100KR2J-1-GP
FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4
FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4
FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
DSWODVREN
PCH_DPWROK
PCIE_WAKE# 31,65,66,82
PM_CLKRUN# 27
PCH_SUSCLK_KBC 27
PM_SLP_S4# 27,46
PM_SLP_S3# 27,36,37,47,92
H_PM_SYNC 5
12
5
6
3
34
2
1
FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
DY
DY
PM_RSMRST#
Q1901
Q1901
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
R1910
R1910
Do Not Stuff
Do Not Stuff
1 2
1 2
R1911
R1911
Do Not Stuff
Do Not Stuff
JE40 modify 07/16
R1912
R1912
1KR2J-1-GP
1KR2J-1-GP
1 2
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected on board)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
PM_RSMRST#
RTC_AUX_S5
SB modify
RSMRST#_KBC 27
3V_5V_POK 41
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP
1 2
DSWODVREN
PM_CLKRUN#
2
R1918 Do Not Stuff
R1918 Do Not Stuff
1 2
DY
DY
R1919
R1919
8K2R2J-3-GP
8K2R2J-3-GP
1 2
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
RTC_AUX_S5
3D3V_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
19 102
19 102
19 102
-1
-1
-1
Page 20
5
SSID = PCH
D D
C C
B B
A A
PCIE_RXN265
PCIE_RXP265
PCIE_TXN265
PCIE_TXP265
PCIE_RXN431
PCIE_RXP431
PCIE_TXN431
PCIE_TXP431
PCIE_RXN582
PCIE_RXP582
PCIE_TXN582
PCIE_TXP582
C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP
1 2
C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP
1 2
C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP
1 2
C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP
1 2
C2009 SCD1U10V2KX-5GPC2009 SCD1U10V2KX-5GP
1 2
C2010 SCD1U10V2KX-5GPC2010 SCD1U10V2KX-5GP
1 2
JE40 delete New Card function
WWAN CLK
RN2012
RN2012
SRN0J-6-GP
SRN0J-6-GP
WLAN CLK
LAN CLK
USB3.0 CLK
3D3V_S0
RN2018
RN2018
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
CLK_PCIE_WLAN#65
CLK_PCIE_WLAN65
CLK_PCIE_LAN#31
CLK_PCIE_LAN31
CLK_PCIE_USB3#82
CLK_PCIE_USB382
PCIE_CLK_RQ2#
4
CLK_PCIE_WLAN_REQ#
2 3
1
RN2014
RN2014
SRN0J-6-GP
SRN0J-6-GP
2 3
1
RN2013
RN2013
SRN0J-6-GP
SRN0J-6-GP
2 3
1
PCIECLKRQ1# and PCIECLKRQ2#
Support S0 power only
5
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_TXN4_C
PCIE_TXP4_C
PCIE_TXN5_C
PCIE_TXP5_C
CLK_PCIE_WWAN_REQ#
CLK_PCH_SRC1_N
CLK_PCH_SRC1_P
4
CLK_PCIE_WLAN_REQ#65
PCIE_CLK_RQ2#
CLK_PCH_SRC3_N
CLK_PCH_SRC3_P
4
PCIE_CLK_LAN_RQ#31
CLK_PCH_SRC4_N
CLK_PCH_SRC4_P
4
USB3_PEGB_CLKREQ#82
PCIE_CLK_REQ5#
PEG_B_CLKRQ#
PCIE_CLK_REQ6#
CLK_PCIE_NEW_REQ#
4
PCH1B
PCH1B
BG34
BJ34
AV32
AU32
BE34
BF34
BB32
AY32
BG36
BJ36
AV34
AU34
BF36
BE36
AY34
BB34
BG37
BH37
AY36
BB36
BJ38
BG38
AU36
AV36
BG40
BJ40
AY40
BB40
BE38
BC38
AW38
AY38
Y40
Y39
J2
AB49
AB47
M1
AA48
AA47
V10
Y37
Y36
A8
Y43
Y45
L12
V45
V46
L14
AB42
AB40
E6
V40
V42
T13
V38
V37
K12
AK14
AK13
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3
– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0 and FLEX2
if more than 2 PCI clocks + PCI loopback are routed.
4
Cougar
Cougar
PERN1
PERP1
Point
Point
PETN1
W-WAN
PETP1
PERN2
PERP2
WLAN
PETN2
PETP2
PERN3
PERP3
Card Reader
PETN3
PETP3
PERN4
PERP4
LAN
PETN4
PETP4
PERN5
PERP5
USB3.0
PETN5
PETP5
PERN6
PERP6
Intel GBE LAN
PETN6
PETP6
PERN7
PERP7
Dock
PETN7
PETP7
PERN8
NEW CARD
PERP8
PETN8
PETP8
CLKOUT_PCIE0N
CLKOUT_PCIE0P
PCIECLKRQ0#/GPIO73
CLKOUT_PCIE1N
CLKOUT_PCIE1P
PCIECLKRQ1#/GPIO18
CLKOUT_PCIE2N
CLKOUT_PCIE2P
PCIECLKRQ2#/GPIO20
CLKOUT_PCIE3N
CLKOUT_PCIE3P
PCIECLKRQ3#/GPIO25
CLKOUT_PCIE4N
CLKOUT_PCIE4P
PCIECLKRQ4#/GPIO26
CLKOUT_PCIE5N
CLKOUT_PCIE5P
PCIECLKRQ5#/GPIO44
CLKOUT_PEG_B_N
CLKOUT_PEG_B_P
PEG_B_CLKRQ#/GPIO56
CLKOUT_PCIE6N
CLKOUT_PCIE6P
PCIECLKRQ6#/GPIO45
CLKOUT_PCIE7N
CLKOUT_PCIE7P
PCIECLKRQ7#/GPIO46
CLKOUT_ITPXDP_N
CLKOUT_ITPXDP_P
PCI-E*
PCI-E*
CLOCKS
CLOCKS
SMBALERT#/GPIO11
SML0ALERT#/GPIO60
SMBUSController
SMBUSController
SML1ALERT#/PCHHOT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
Link
Link
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_SATA_N
CLKIN_SATA_P
CLKIN_PCILOOPBACK
XCLK_RCOMP
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
FLEX CLOCKS
FLEX CLOCKS
2 OF 10
2 OF 10
SMBCLK
SMBDATA
SML0CLK
SML0DATA
CL_CLK1
CL_DATA1
CL_RST1#
REFCLK14IN
XTAL25_IN
XTAL25_OUT
3
E12
H14
C9
A12
C8
G12
C13
E14
M16
M7
T11
P10
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
3
SMB_CLK
SMB_DATA
SML0_CLK
SML0_DATA
PCH_GPIO74
JE40 modify
JE40 delete XDP function
For DIS_PX mode or MXM mode.
PEG_CLKREQ#_R
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLK_EXP_N 5
CLK_EXP_P 5
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
DGPU_PRSNT#
CLK_48_USB30
1 2
R2007
R2007
90D9R2F-1-GP
90D9R2F-1-GP
1 2
EC_SWI# 27
DRAMRST_CNTRL_PCH 37
SML1_CLK 27,86
SML1_DATA 27,86
R2003
R2003
1 2
Do Not Stuff
Do Not Stuff
2 3
1
4
RN2016
RN2016
SRN0J-6-GP
SRN0J-6-GP
2 3
1
RN2008
RN2008
SRN10KJ-5-GP
SRN10KJ-5-GP
CLK_PCI_FB 18
1D05V_VTT
RTS
RTS
R2002
R2002
Do Not Stuff
Do Not Stuff
SB
PEG_CLKREQ#_R
PEG_CLKREQ# 83
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
4
CLK_BUF_REF14
CLK_BUF_CKSSCD_P
CLK_BUF_CKSSCD_N
48MHZ_OUT 32
2
3D3V_S0
12
R2004
R2004
10KR2J-3-GP
10KR2J-3-GP
12
R2005
R2005
Do Not Stuff
Do Not Stuff
DY
DY
SMB_DATA
Q2001
Q2001
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
SMB_CLK
RN2009
RN2009
SRN10KJ-L3-GP
SRN10KJ-L3-GP
1
2
3
4
5 6
need very close to PCH
CLK_48_USB30
Do Not Stuff
Do Not Stuff
12
RFC2001
RFC2001
SB
DY
DY
2
1
3D3V_S0
RN2007
RN2007
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
6
5
4
1
2
34
SMB_CLK
SMB_DATA
SML0_DATA
SML0_CLK
SML1_CLK
SML1_DATA
PCH_GPIO74
PCIE_CLK_REQ6#
DRAMRST_CNTRL_PCH
4
4
2 3
1
1
2 3
1 2
CRB : 1K
CEKLT: 10K
PCH_SMBDATA 14,15
PCH_SMBCLK 14,15
R2008 and C2008 CO-LAY
SC12P50V2JN-3GP
XTAL25_IN
R2006
R2006
1M1R2J-GP
1M1R2J-GP
XTAL25_OUT
3D3V_S0 3D3V_S0
12
R2012
R2012
10KR2J-3-GP
10KR2J-3-GP
UMA_Muxless
UMA_Muxless
12
R2010
R2010
Do Not Stuff
Do Not Stuff
DIS_PX
DIS_PX
10
9
8
7
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
12
R2013
R2013
10KR2J-3-GP
10KR2J-3-GP
DIS_UMA
DIS_UMA
DGPU_PRSNT#
12
R2011
R2011
Do Not Stuff
Do Not Stuff
PX_Muxless
PX_Muxless
3D3V_S5
CLK_BUF_EXP_P
CLK_BUF_EXP_N
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
JE40-HR
JE40-HR
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
JE40-HR
SC12P50V2JN-3GP
X2001
X2001
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
82.30020.851
82.30020.851
2nd = 82.30020.791
2nd = 82.30020.791
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
UMA_DIS# 22
RN2001
RN2001
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
RN2002
RN2002
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
RN2003
RN2003
1
SRN2K2J-1-GP
SRN2K2J-1-GP
23
RN2004
RN2004
23
SRN2K2J-1-GP
SRN2K2J-1-GP
1
RN2005
RN2005
SRN2K2J-1-GP
SRN2K2J-1-GP
4
RN2006
RN2006
4
SRN10KJ-5-GP
SRN10KJ-5-GP
R2009
R2009
1KR2J-1-GP
1KR2J-1-GP
C2008
C2008
12
12
C2007
C2007
PCIE_CLK_LAN_RQ#
8
7
CLK_PCIE_WWAN_REQ#
6
USB3_PEGB_CLKREQ#
PCIE_CLK_REQ5#
8
CLK_PCIE_NEW_REQ#
7
PEG_B_CLKRQ#
6
EC_SWI#
of
of
of
20 102
20 102
20 102
3D3V_S5
-1
-1
-1
Page 21
5
4
3
2
1
SSID = PCH
RTC_X1
1 2
R2101 10MR2J-L-GPR2101 10MR2J-L-GP
X2101
X2101
X-32D768KHZ-34GPU
X-32D768KHZ-34GPU
82.30001.661
D D
12
SC5P50V2CN-2GP
SC5P50V2CN-2GP
C C
+3VS_+1.5VS_HDA_IO
B B
+3VS_+1.5VS_HDA_IO
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
A A
82.30001.661
2nd = 82.30001.B21
2nd = 82.30001.B21
1
C2101
C2101
2 3
HDA_CODEC_SYNC29
HDA_CODEC_SDOUT29
HDA_CODEC_RST#29
HDA_CODEC_BITCLK29
1 2
1 2
5V_S0
HDA_CODEC_SYNC
4
DY
DY
R2102
R2102
Do Not Stuff
Do Not Stuff
R2103
R2103
1KR2J-1-GP
1KR2J-1-GP
G
S
RTC_X2
SB SEIKO suggest modify to 5P
12
EPSON suggest modifyg to 6P
C2102
C2102
SC5P50V2CN-2GP
SC5P50V2CN-2GP
-1M
R2122
R2122
33R2J-2-GP
33R2J-2-GP
DY
DY
R2123
R2123
33R2J-2-GP
33R2J-2-GP
1
2 3
RN2102
RN2102
SRN33J-5-GP-U
SRN33J-5-GP-U
Flash Descriptor Security Overide
HDA_SDOUT
HDA_SDOUT
HDA_SPKR
HDA_SYNC
HDA_SYNC
-1M
HDA_SYNC_R HDA_SYNC
D
Q2101
Q2101
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
5
12
12
4
No Reboot Strap
PLL ODVR VOLTAGE
RTC_AUX_S5
HDA_SYNC
HDA_SDOUT
HDA_RST#
HDA_BITCLK
Low = Default
High = Enable
Low = Default
High = No Reboot
Low = 1.8V (Default)
High = 1.5V
2 3
1
RN2104
RN2104
SRN20KJ-GP-U
SRN20KJ-GP-U
C2104
C2104
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4
12
C2103
C2103
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
21
12
G2101
G2101
Do Not Stuff
Do Not Stuff
RTC Reset
ME_UNLOCK27
DY
DY
1 2
INTVRMEN- Integrated SUS
1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs
RTC_AUX_S5
HDA_SPKR29
HDA_SDIN029
?????
?
R2107
R2107
1 2
1KR2J-1-GP
1KR2J-1-GP
SPI_CLK_R27,60
SPI_CS0#_R27,60
SPI_SI_R27,60
SPI_SO_R27,60
EC2102
EC2102
DY
DY
-1M
Do Not Stuff
R2124
R2124
Do Not Stuff
Do Not Stuff
1 2
HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this
signal on the board. Signal may have leakage paths via powered off devices (Audio
Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete.
4
Do Not Stuff
RTC_X1
RTC_X2
RTC_RST#
12
12
R2108
R2108
33R2J-2-GP
33R2J-2-GP
R2109
R2109
33R2J-2-GP
33R2J-2-GP
Do Not Stuff
Do Not Stuff
SRTC_RST#
SM_INTRUDER#
PCH_INTVRMEN
HDA_BITCLK
HDA_SYNC
HDA_RST#
PCH_JTAG_TCK_BUF
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_SI
1M1R2J-GP
1M1R2J-GP
R2104
R2104
1 2
R2105
R2105
330KR2F-L-GP
330KR2F-L-GP
R2121
R2121
4K7R2J-2-GP
4K7R2J-2-GP
1 2
1 2
1 2
R2110 33R2J-2-GPR2110 33R2J-2-GP
EC2103
EC2103
1 2
HDA_SDOUT
JE40 modify
SPI_CS0#_RHDA_CODEC_BITCLK HDA_CODEC_SDOUT
EC2101
EC2101
1 2
DY
DY
Do Not Stuff
Do Not Stuff
3
PCH1A
PCH1A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN#/GPIO33
N32
HDA_DOCK_RST#/GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
RTCIHDA
RTCIHDA
JTAG
JTAG
SPI
SPI
1 OF 10
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LPC
LPC
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
PSW_CLR#22
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SATA_DET#0
2
LPC_FRAME# 27,71
INT_SERIRQ 27
SATA_RXN0 56
SATA_RXP0 56
SATA_TXN0 56
SATA_TXP0 56
SATA_RXN4 56
SATA_RXP4 56
SATA_TXN4 56
SATA_TXP4 56
SATA_COMP
SATA3_COMP
RBIAS_SATA3
SATA_LED# 68
SATA_LED#
INT_SERIRQ
SATA_DET#0
LPC_AD[0..3] 27,71
HDD1
HDD2
ODD
ESATA
1D05V_VTT
R2112 37D4R2F-GPR2112 37D4R2F-GP
1 2
R2113 49D9R2F-GPR2113 49D9R2F-GP
1 2
R2114 750R2F-GPR2114 750R2F-GP
1 2
RN2103
RN2103
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
HR UMA
HR UMA
HR UMA
Title
Title
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
1D05V_VTT
3D3V_S0
8
7
6
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
21 102
21 102
21 102
1
-1
-1
-1
Page 22
5
4
3
2
1
3D3V_S0
RN2203
RN2203
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
D D
3D3V_S0
4
R2220
R2220
1 2
10KR2J-3-GP
10KR2J-3-GP
H_RCIN#
H_A20GATE
FFS_INT2_R SATA_ODD_PRSNT#
Note:
For PCH debug with XDP, need to NO STUFF R2218
3D3V_S0
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
C C
B B
GFX_CRB_DET
12
R2206
R2206
100KR2J-1-GP
100KR2J-1-GP
EC_SMI#
DGPU_HPD_INTR#
EC_SCI#
MFG_MODE
FP_DET#
S_GPIO
PCH_TEMP_ALERT#
USB3_PWR_ON
PCH_GPIO12
PCH_GPIO24
PCH_GPIO15
RN2201
RN2201
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
RN2202
RN2202
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
RN2204
RN2204
SRN10KJ-6-GP
SRN10KJ-6-GP
8
7
6
R2201
R2201
1 2
1KR2J-1-GP
1KR2J-1-GP
Pass Word Clear
3D3V_S0
8
7
6
8
7
6
3D3V_S5
1
2
3
45
PSW_CLR#21
JE40 delete FP function
VRAM Frequency
Pull high: 800MHZ
3D3V_S0
Pull low :900MHZ
12
R2218
R2218
10KR2J-3-GP
10KR2J-3-GP
UMA_VRAM800MHZ
A A
UMA_VRAM800MHZ
PCH_GPIO22
12
R2219
R2219
10KR2J-3-GP
10KR2J-3-GP
VRAM900MHZ
VRAM900MHZ
5
2G
2G
1G_512M
1G_512M
3D3V_S0
SSID = PCH
EC_SCI#27
SATA_ODD_PRSNT#56
R2202
R2202
10KR2J-3-GP
10KR2J-3-GP
1 2
DGPU_PWROK92,93
0806 delete TP2202, TP2203
JE40 delete G Sensor
PCH_TEMP_ALERT#27
VRAM SizeSB
12
R2214
R2214
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
R2215
R2215
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
4
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
21
12
R2216
R2216
1G
1G
VRAM_SIZE1
VRAM_SIZE2
12
R2217
R2217
512M_2G
512M_2G
TP2202
TP2202
TP2203
TP2203
G2201
G2201
Do Not Stuff
Do Not Stuff
TP2210Do Not Stuff TP2210Do Not Stuff
TP2206Do Not Stuff TP2206Do Not Stuff
TP2208Do Not Stuff TP2208Do Not Stuff
TP2207Do Not Stuff TP2207Do Not Stuff
TP2209Do Not Stuff TP2209Do Not Stuff
S_GPIO
EC_SMI#
DGPU_HPD_INTR#
ICC_EN#
PCH_GPIO12
PCH_GPIO15
PCH_GPIO22
PCH_GPIO24
1
PCH_GPIO27
1
PLL_ODVR_EN
FP_DET#
DMI_OVRVLTG
FDI_OVRVLTG
MFG_MODE
GFX_CRB_DET
FFS_INT2_R
USB3_PWR_ON
1
PCH_NCTF_1
1
PCH_NCTF_3
1
PCH_NCTF_2
1
PCH_NCTF_4
1
6 OF 10
PCH1F
PCH1F
T7
BMBUSY#/GPIO0
A42
TACH1/GPIO1
H36
TACH2/GPIO6
E38
TACH3/GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL/GPIO12
G2
GPIO15
U2
SATA4GP/GPIO16
D40
TACH0/GPIO17
T5
SCLOCK/GPIO22
E8
GPIO24/MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI#/GPIO34
K4
GPIO35
V8
SATA2GP/GPIO36
M5
SATA3GP/GPIO37
N2
SLOAD/GPIO38
M3
SDATAOUT0/GPIO39
V13
SDATAOUT1/GPIO48
V3
SATA5GP/GPIO49
D6
GPIO57
A4
NCTF_VSS#A4
A44
NCTF_VSS#A44
A45
NCTF_VSS#A45
A46
NCTF_VSS#A46
A5
NCTF_VSS#A5
A6
NCTF_VSS#A6
B3
NCTF_VSS#B3
B47
NCTF_VSS#B47
BD1
NCTF_VSS#BD1
BD49
NCTF_VSS#BD49
BE1
NCTF_VSS#BE1
BE49
NCTF_VSS#BE49
BF1
NCTF_VSS#BF1
BF49
NCTF_VSS#BF49
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
GPIO
GPIO
NCTF
NCTF
NCTF TEST PIN:
NCTF TEST PIN:
D1,D49,E1,E49,F1,F49
D1,D49,E1,E49,F1,F49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
6 OF 10
TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
CPU/MISC
CPU/MISC
INIT3_3V#
TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4
NC_1
NCTF_VSS#BG2
NCTF_VSS#BG48
NCTF_VSS#BH3
NCTF_VSS#BH47
NCTF_VSS#BJ4
NCTF_VSS#BJ44
NCTF_VSS#BJ45
NCTF_VSS#BJ46
NCTF_VSS#BJ5
NCTF_VSS#BJ6
NCTF_VSS#C2
NCTF_VSS#C48
NCTF_VSS#D1
NCTF_VSS#D49
NCTF_VSS#E1
NCTF_VSS#E49
NCTF_VSS#F1
NCTF_VSS#F49
C40
B41
C41
A40
P4
AU16
P5
AY11
AY10
T14
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
PLL ON DIE VR ENABLE
NOTE:This signal has a weak internal pull-up 20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
3
SB add Zero ODD function
SATA_ODD_PWRGT 56
H_A20GATE 27
H_RCIN# 27
H_CPUPWRGD 5,36,97
SB
ֆࣨ
UMA_DIS# 20
1 2
PCH_THERMTRIP_R
check different , check need modify or not
VRAM_SIZE1
VRAM_SIZE2
H_PECI_R
PCH_THERMTRIP_R
check intel , R2204
TS Signal Disable Guideline:
TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
should not float on the motherboard. They should
be tied to GND directly.
FDI_OVRVLTG
12
R2208
R2208
10KR2J-3-GP
10KR2J-3-GP
DMI_OVRVLTG
12
R2210
R2210
10KR2J-3-GP
10KR2J-3-GP
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
ICC_EN#
12
R2211
R2211
1KR2J-1-GP
1KR2J-1-GP
GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
PLL_ODVR_EN
12
R2212
R2212
Do Not Stuff
Do Not Stuff
DY
DY
2
R2203
R2203
Do Not Stuff
Do Not Stuff
DY
DY
H_PECI 5,27
1 2
R2204
R2204
54D9R2F-L1-GP
54D9R2F-L1-GP
RN2205
RN2205
Do Not Stuff
Do Not Stuff
1
2 3
DY
DY
SB
4
1D05V_VTT
H_THERMTRIP# 5,36
FDI TERMINATION VOLTAGE OVERRIDE
GPIO37
(FDI_OVRVLTG)
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
DMI TERMINATION VOLTAGE OVERRIDE
GPIO36
(DMI_OVRVLTG)
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
Integrated Clock Chip Enable
ICC_EN#
HIGH (R2211 DY)- DISABLED [DEFAULT]
LOW (R2211)- ENABLED
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
PCH (GPIO/CPU)
PCH (GPIO/CPU)
PCH (GPIO/CPU)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
22 102
22 102
22 102
-1
-1
-1
Page 23
5
SSID = PCH
6A
1D05V_VTT
1.3A
(1uFx3)
D D
(10uFx1_0603)
12
C2301
C2301
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C2302
C2302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2303
C2303
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
JE40 modify 07/16
1D05V_VTT
2.925A(Total current of VCCIO)
(1uF x4)
C C
0.266A (Totally VCC3_3 current)
(0.1uF x1)
0.159A(Totally current of VCCVRM)
B B
12
DY
DY
C2306
C2306
Do Not Stuff
Do Not Stuff
12
3D3V_S0
12
C2308
C2307
C2307
C2308
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
SC1U6D3V2KX-GP
C2310
C2310
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
-2 modify power net name
0806 check VCCAFDIPLL
0.042A (Totally current of VCCDMI)
12
C2304
C2304
1D05V_VTT
JE40 modify
12
C2309
C2309
VCCVRM_S0
1D05V_VTT
1D05V_VTT
JE40 modify
4
AA23
AC23
AD21
AD23
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
PCH1G
PCH1G
Cougar
Cougar
VCCCORE
Point
Point
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCIO
VCCAPLLEXP
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCC3_3
VCCVRM
VCCAFDIPLL
VCCIO
VCCDMI
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
7 OF 10
7 OF 10
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCCLKDMI
VccDFTERM
VccDFTERM
VccDFTERM
VccDFTERM
VCCSPI
3
+VCCA_DAC_1_2
U48
U47
UMA_PX_Muxless
UMA_PX_Muxless
+3VS_VCCA_LVDS
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
AT20
AB36
AG16
AG17
AJ16
AJ17
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
V1
1 2
DIS
DIS
3D3V_S0
12
C2319
C2319
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2326
C2326
12
C2323
C2323
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(0.1uF/0.01uF x1)
(10uF x1_0603)
12
C2313
C2313
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
UMA_PX_Muxless
UMA_PX_Muxless
DIS
DIS
R2303
R2303
Do Not Stuff
Do Not Stuff
0.06A
R2309
R2309
Do Not Stuff
Do Not Stuff
1 2
12
C2320
C2320
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
UMA_PX_Muxless
UMA_PX_Muxless
JE40 modify
0.02A
+1.05VS_VCC_DMI_CCI
12
12
C2321
C2321
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
12
12
0.02A
C2325
C2325
Do Not Stuff
Do Not Stuff
C2322
C2322
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S5
(1uFx1)
R2301
R2301
Do Not Stuff
Do Not Stuff
1 2
1 2
12
12
C2315
C2315
C2314
C2314
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Do Not Stuff
Do Not Stuff
DY
DY
0.001A
+1.8VS_VCCTX_LVDS
12
C2316
C2316
C2317
C2317
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
UMA_PX_Muxless
UMA_PX_Muxless
C2318
C2318
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
Do Not Stuff
Do Not Stuff
DY
DY
1 2
-2 modify power net name
VCCVRM_S0
1D05V_VTT
(1uF x1)
L2303
L2303
IND-10UH-218-GP
IND-10UH-218-GP
1 2
68.10050.10Y
68.10050.10Y
2nd = 68.10090.10B
2nd = 68.10090.10B
1D8V_S0
0.19A
JE40 modify
SB ֆࣨsuggest delete 3D3V_S0, R2313
SPI only support 3D3V_S5
2
DIS
DIS
R2315
R2315
Do Not Stuff
Do Not Stuff
R2304
R2304
0R3J-0-U-GP
0R3J-0-U-GP
UMA_PX_Muxless
UMA_PX_Muxless
R2305
R2305
0R5J-5-GP
0R5J-5-GP
1 2
UMA_PX_Muxless
UMA_PX_Muxless
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1D05V_VTT
(1uFx1)
(10uFx1)
3D3V_S0
3D3V_DAC_S0
3D3V_S0
12
1D8V_S0
(0.01uF x2)
(22uF x1)
C2328
C2328
U2301 for ANNIE flicker issue
R2312 for don't flicker solution
3.3V CRT LDO
U2301
U2301
G9091-330T11U-GP
5V_S0
12
C2311
C2311
UMA_PX_Muxless
UMA_PX_Muxless
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
2nd = 74.09198.G7F
2nd = 74.09198.G7F
1
2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
UMA_PX_Muxless
UMA_PX_Muxless
-1M add LDO for VCCVRM_S0
3D3V_S0 VCCVRM_S01D5V_S0
U2302
U2302
G913CF-GP
G913CF-GP
74.00913.A3F
74.00913.A3F
1
SHDN#
2
GND
3
12
DY
DY
IN
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
Vout=1.25*(1+R1/R2)
Refer to NPCE795 shared SPI flash architecture
VIN
VOUT
GND
EN3NC#4
5
SET
4
OUT
C2329
C2329
1
3D3V_DAC_S0
5
4
12
UMA_PX_Muxless
UMA_PX_Muxless
SB add C2327
SC22P50V2JN-4GP
SC22P50V2JN-4GP
12
C2330
C2330
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C2331
DY
DY
C2331
DY
DY
C2312
C2312
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
R2316
R2316
2K8R2F-GP
2K8R2F-GP
DY
DY
12
R2317
R2317
DY
DY
10KR2J-3-GP
10KR2J-3-GP
12
C2327
C2327
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
The same BIOS SPI ROM power
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
PCH (POWER1)
PCH (POWER1)
PCH (POWER1)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
23 102
23 102
23 102
-1
-1
-1
Page 24
5
4
3
2
1
JE40 modify 07/16
PCH1J
SSID = PCH
(0.1uFx1)
(10uFx1)
(1uFx1)
D D
C2402
C2402
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D05V_VTT
3D3V_S5
3D3V_S0
12
1D05V_VTT
JE40 modify
0.002A
JE40 modify
JE40 modify
JE40 modify
(10uFx1)
JE40 modify
1.01A (Total current of VCCASW)
12
12
12
C2403
C2403
C2404
C2404
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C C
1D05V_VTT
B B
L2402
L2402
IND-10UH-218-GP
IND-10UH-218-GP
1 2
68.10050.10Y
68.10050.10Y
2nd = 68.10090.10B
2nd = 68.10090.10B
L2403
L2403
IND-10UH-218-GP
IND-10UH-218-GP
1 2
68.10050.10Y
68.10050.10Y
2nd = 68.10090.10B
2nd = 68.10090.10B
0.08A
+1.05VS_VCCA_A_DPL+1.05VS_VCCA_A_DPL
0.08A
+1.05VS_VCCA_B_DPL+1.05VS_VCCA_B_DPL
(1uFx1)
(220uFx1)
12
C2409
C2409
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1uFx1)
(220uFx1)
12
C2410
C2410
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2411
C2411
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
JE40 modify 07/16
1D05V_VTT
(1uFx1)
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2414
C2414
12
+VCCRTCEXT
SC10U6D3V5KX-1GP
0.16A (Totally current of VCCVRM
(0.1uFx1)
1D05V_VTT
0.055A
1D05V_VTT
(1uFx1)
1D05V_VTT
12
C2406
C2406
C2407
C2407
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(22uFx2_0603)
(1uFx3)
C2412
C2412
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C2413
C2413
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
12
C2408
C2408
DY
DY
Do Not Stuff
Do Not Stuff
-1M
VCCVRM_S0
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
JE40 modify
(1uFx1)
0.095A
JE40 modify
(1uFx1)
+VCCSST
12
(0.1uFx1)
C2415
C2415
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
JE40 modify
0.001A
(0.1uFx2)
A A
(4.7uFx1_0603)
RTC_AUX_S5
12
12
C2417
C2417
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C2418
C2418
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
C2419
C2419
Do Not Stuff
Do Not Stuff
6uA
(0.1uFx2)
(1uFx1)
5
12
C2420
C2420
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4
PCH1J
AD49
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3
BH23
VCCAPLLDMI2
AL29
VCCIO
AL24
DCPSUS
AA19
VCCASW
AA21
VCCASW
AA24
VCCASW
AA26
VCCASW
AA27
VCCASW
AA29
VCCASW
AA31
VCCASW
AC26
VCCASW
AC27
VCCASW
AC29
VCCASW
AC31
VCCASW
AD29
VCCASW
AD31
VCCASW
W21
VCCASW
W23
VCCASW
W24
VCCASW
W26
VCCASW
W29
VCCASW
W31
VCCASW
W33
VCCASW
N16
DCPRTC
Y49
VCCVRM
BD47
VCCADPLLA
BF47
VCCADPLLB
AF17
VCCIO
AF33
VCCDIFFCLKN
AF34
VCCDIFFCLKN
AG34
VCCDIFFCLKN
AG33
VCCSSC
V16
DCPSST
T17
DCPSUS
V19
DCPSUS
BJ8
V_PROC_IO
A22
VCCRTC
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
POWER
POWER
Cougar
Cougar
Point
Point
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
CPURTC
CPURTC
HDA
HDA
3
10 OF 10
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
DCPSUS
VCCSUS3_3
V5REF
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCIO
VCCIO
VCCIO
VCCIO
VCCAPLLSATA
VCCVRM
VCCIO
VCCIO
VCCIO
VCCASW
VCCASW
VCCASW
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
1D05V_VTT
12
(1uFx1)
C2423
C2423
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0.097A (Totally current of VCCSUS3_3)
12
C2424
C2424
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2425
C2425
SCD1U10V2KX-5GP
1D05V_VTT
+5VA_PCH_VCC5REFSUS
JE40 modify
3D3V_S5
+5VS_PCH_VCC5REF
JE40 modify
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
JE40 modify
-1M modify power net name
VCCVRM_S0
JE40 modify
1D05V_VTT
JE40 modify
3D3V_S5
12
C2428
C2428
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2430
C2430
12
C2429
C2429
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2432
C2432
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1D05V_VTT
(1uFx1)
12
C2435
C2435
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+3VS_+1.5VS_HDA_IO
(1uFx1)
SCD1U10V2KX-5GP
JE40 modify 07/16
3D3V_S0
(0.1uFx2)
12
C2431
C2431
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
(0.1uFx1)
1D05V_VTT
(1uFx1)
JE40 modify 07/16
0.01A
(0.1uFx1)
12
C2433
C2433
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
3D3V_S5
(0.1uFx1)
3D3V_S5
(0.1uFx1)
0.001A
0.001A
JE40 modify 07/16
3D3V_S5
D2401
D2401
21
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
Do Not Stuff
DY
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
1 2
R2408
R2408
10R2J-2-GP
10R2J-2-GP
12
C2426
C2426
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
D2402
D2402
21
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
Do Not Stuff
DY
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
1 2
R2407
R2407
10R2J-2-GP
12
3D3V_S5 1D5V_S5
3D3V_S5
12
C2436
C2436
Do Not Stuff
Do Not Stuff
DY
DY
+3VS_+1.5VS_HDA_IO
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
1 2
U2401
U2401
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
VIN
2
GND
EN3NC#4
R2409 Do Not StuffR2409 Do Not Stuff
R2415 Do Not Stuff
R2415 Do Not Stuff
R2413 Do Not Stuff
R2413 Do Not Stuff
PCH (POWER2)
PCH (POWER2)
PCH (POWER2)
JE40-HR
JE40-HR
JE40-HR
10R2J-2-GP
C2427
C2427
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R2414
R2414
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
VOUT
-1M
1 2
1 2
DY
DY
1 2
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DY
DY
5
4
12
R2402
R2402
Do Not Stuff
Do Not Stuff
1
5V_S5
(0.1uFx1)
5V_S0
(1uFx1)
1D5V_S5
12
C2416
C2416
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
3D3V_S5
1D5V_S0
1D5V_S5
of
of
of
24 102
24 102
24 102
12
C2405
C2405
Do Not Stuff
Do Not Stuff
-1
-1
-1
Page 25
5
4
3
2
1
SSID = PCH
D D
C C
B B
A A
5
PCH1H
PCH1H
H5
VSS
AA17
VSS
AA2
VSS
AA3
VSS
AA33
VSS
AA34
VSS
AB11
VSS
AB14
VSS
AB39
VSS
AB4
VSS
AB43
VSS
AB5
VSS
AB7
VSS
AC19
VSS
AC2
VSS
AC21
VSS
AC24
VSS
AC33
VSS
AC34
VSS
AC48
VSS
AD10
VSS
AD11
VSS
AD12
VSS
AD13
VSS
AD19
VSS
AD24
VSS
AD26
VSS
AD27
VSS
AD33
VSS
AD34
VSS
AD36
VSS
AD37
VSS
AD38
VSS
AD39
VSS
AD4
VSS
AD40
VSS
AD42
VSS
AD43
VSS
AD45
VSS
AD46
VSS
AD8
VSS
AE2
VSS
AE3
VSS
AF10
VSS
AF12
VSS
AD14
VSS
AD16
VSS
AF16
VSS
AF19
VSS
AF24
VSS
AF26
VSS
AF27
VSS
AF29
VSS
AF31
VSS
AF38
VSS
AF4
VSS
AF42
VSS
AF46
VSS
AF5
VSS
AF7
VSS
AF8
VSS
AG19
VSS
AG2
VSS
AG31
VSS
AG48
VSS
AH11
VSS
AH3
VSS
AH36
VSS
AH39
VSS
AH40
VSS
AH42
VSS
AH46
VSS
AH7
VSS
AJ19
VSS
AJ21
VSS
AJ24
VSS
AJ33
VSS
AJ34
VSS
AK12
VSS
AK3
VSS
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
8 OF 10
8 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28
4
PCH1I
PCH1I
AY4
VSS
AY42
VSS
AY46
VSS
AY8
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B27
VSS
B31
VSS
B35
VSS
B39
VSS
B7
VSS
F45
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB22
VSS
BB24
VSS
BB28
VSS
BB30
VSS
BB38
VSS
BB4
VSS
BB46
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC26
VSS
BC32
VSS
BC34
VSS
BC36
VSS
BC40
VSS
BC42
VSS
BC48
VSS
BD46
VSS
BD5
VSS
BE22
VSS
BE26
VSS
BE40
VSS
BF10
VSS
BF12
VSS
BF16
VSS
BF20
VSS
BF22
VSS
BF24
VSS
BF26
VSS
BF28
VSS
BD3
VSS
BF30
VSS
BF38
VSS
BF40
VSS
BF8
VSS
BG17
VSS
BG21
VSS
BG33
VSS
BG44
VSS
BG8
VSS
BH11
VSS
BH15
VSS
BH17
VSS
BH19
VSS
H10
VSS
BH27
VSS
BH31
VSS
BH33
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH7
VSS
D3
VSS
D12
VSS
D16
VSS
D18
VSS
D22
VSS
D24
VSS
D26
VSS
D30
VSS
D32
VSS
D34
VSS
D38
VSS
D42
VSS
D8
VSS
E18
VSS
E26
VSS
G18
VSS
G20
VSS
G26
VSS
G28
VSS
G36
VSS
G48
VSS
H12
VSS
H18
VSS
H22
VSS
H24
VSS
H26
VSS
H30
VSS
H32
VSS
H34
VSS
F3
VSS
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
Cougar
Cougar
Point
Point
9 OF 10
9 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
2
Date: Sheet
PCH (VSS)
PCH (VSS)
PCH (VSS)
JE40-HR
JE40-HR
JE40-HR
25 102
25 102
25 102
1
-1
-1
of
of
-1
Page 26
5
D D
C C
4
3
2
1
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Clock(colay)
Clock(colay)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Clock(colay)
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
26 102
26 102
26 102
of
of
of
1
-1
Page 27
A
3D3V_AUX_KBC
0628 Modify:
Move R2771 to closed 3D3V_AUX_KBC power
D D
12
C2701
C2701
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
12
C2704
C2704
rail base on layout placement.
12
12
C2706
C2706
C2705
C2705
DY
DY
Do Not Stuff
Do Not Stuff
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SB to -1 default active Low
JE40 delete USB Charger function
JE40 VGA_THRM
C C
0604 Modify:
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.
3D3V_S0
RN2708
RN2708
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
3D3V_AUX_KBC
4 5
RN2707
RN2707
SRN100KJ-6-GP
SRN100KJ-6-GP
1
2 3
R2770
R2770
1KR2J-1-GP
1KR2J-1-GP
1 2
B B
EC_GPIO47 High Active
PROCHOT_EC
12
R2732
R2732
100KR2J-1-GP
100KR2J-1-GP
AC_PRESENT19
PCIE_RST#
8
WIRELESS_LED_OFF#
7
HDMI_IN#
6
SB LID_CLOSE# can not pull high, because push pull
suggest RN2708 Pin5 change FAN_TACH1
CHG_ON#
4
STOP_CHG#
AD_OFF
G
S
Q2702
Q2702
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
12
12
C2707
C2707
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AD_IA40
C2714 Do Not Stuff
C2714 Do Not Stuff
1 2
DY
DY
T8_THERM28
EC_GPIO9560
3G_EN66
SUS_PWR_ACK19
TP2715Do Not Stuff TP2715Do Not Stuff
SYS_THRM28
ALL_POWER_OK37,42,48
DC_BATFULL68
AD_OFF38
S5_ENABLE36,97
BAT_IN#39
LID_CLOSE#70
RSMRST#_KBC19
PM_SLP_S4#19,46
ME_UNLOCK21
DBC_EN49
WIFI_RF_EN65
BLUETOOTH_EN63,65
S0_PWR_GOOD19,42
WLAN_TEST_LED68
USB_PWR_EN#61,82
FAN_TACH1 28
H_PROCHOT#_EC
D
SSID = KBC
12
12
C2708
C2708
Do Not Stuff
Do Not Stuff
DY
DY
EC_GPIO95
12
C2712
C2712
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C2709
C2709
Do Not Stuff
Do Not Stuff
PCB_VER_AD
ADT_TYPE
VGA_THRM
1
EC_GPIO6
AC_IN_KBC
EC_ENABLE
EC_GPIO72
DISCRETE#
KBC_VCORF
R2733
R2733
Do Not Stuff
Do Not Stuff
1 2
C2710
C2710
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
U2701A
U2701A
NPCE795PA0DX-GP-U
NPCE795PA0DX-GP-U
102
115
GND
5
116
4
AVCC
GPIO11/CLKRUN#
ECSCI#/GPIO54
GPIO10/LPCPD#
GPIO67/PWUREQ#
KBRST#/GPIO86
GPIO52/PSDAT3/RDY#
GPIO50/PSCLK3/TDO
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
F_SDI/F_SDIO1
F_SDIO/F_SDIO0
VCC19VCC46VCC76VCC88VCC
104
VREF
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
101
GPIO94/DA0
105
GPIO95/DA1
106
GPIO96/DA2
79
GPIO2
95
GPIO3/AD6
96
GPIO4/AD5
108
GPIO5/AD4
93
PSL_IN2#_GPIO6
94
GPIO7/AD7
114
GPIO16
6
GPIO24
109
GPIO30
14
GPIO34/CIRRXL
15
GPIO36
80
GPIO41
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
23
GPIO46/CIRRXM/TRST#
26
GPIO51
73
PSL_IN1_GPIO70
74
PSL_OUT_GPIO71
75
VBKUP
82
GPIO75
83
GPO76/SHBM
84
GPIO77
91
GPIO81
110
GPO82/IOX_LDSH/TEST#
112
GPIO84/IOX_SCLK/XORTR#
107
GPIO97
44
VCORF
GND18GND45GND78GND89GND
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
EC_SPI_DI_C
12
R2773
R2773
100KR2J-1-GP
100KR2J-1-GP
0604 Modify:
Add Pull down 100k ohm at F_SDI for Power consumption concern.
H_PROCHOT# 5,42
5
5
4
3D3V_S0
12
C2702
C2702
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 OF 2
1 OF 2
VDD
PLT_RST#_EC
7
LRESET#
2
LCLK
3
LFRAME#
GPIO65/SMI#
GPIO85/GA20
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
GPIO47/SCL4
GPIO53/SDA4
103
LPC_AD3
1
LAD3
LPC_AD2
128
LAD2
LPC_AD1
127
LAD1
LPC_AD0
126
LAD0
125
SERIRQ
8
9
ECSCI#_KBC
29
124
ECSWI#_KBC
123
121
122
27
PCIE_RST#
25
11
10
71
72
70
69
67
68
119
120
PROCHOT_EC
24
28
EC_SPI_CS#_C
90
F_CS0#
EC_SPI_CLK_C
92
F_SCK
EC_SPI_DI_C
86
EC_SPI_DO_C
87
AGND
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
PURE_HW_SHUTDOWN#28,36
4
12
DY
DY
10KR2J-3-GP
10KR2J-3-GP
C2703
C2703
Do Not Stuff
Do Not Stuff
R2705
R2705
C2711
C2711
Do Not Stuff
Do Not Stuff
1 2
DY
DY
1 2
12
R2735
R2735
Do Not Stuff
Do Not Stuff
INT_SERIRQ 21
PM_CLKRUN# 19
PANEL_BLEN 94
PCH_TEMP_ALERT# 22
H_A20GATE 22
H_RCIN# 22
BLON_OUT 49
WIRELESS_LED_OFF# 68
HDMI_IN# 51
TPDATA 69
BAT_SCL 39,40
BAT_SDA 39,40
SML1_CLK 20,86
SML1_DATA 20,86
CRT_DEC# 50
Wireless_SW 82
CHG_ON# 40
33R2J-2-GPR2736 33R2J-2-GPR2736
12
33R2J-2-GPR2719 33R2J-2-GPR2719
12
R2737 0R2J-2-GPR2737 0R2J-2-GP
12
R2722 33R2J-2-GPR2722 33R2J-2-GP
12
RN2709
RN2709
SRN10KJ-5-GP
SRN10KJ-5-GP
1
4
2 3
3D3V_AUX_KBC
12
R2724
R2724
64K9R2F-1-GP
64K9R2F-1-GP
-1M
PCB_VER_AD
PLT_RST# 5,18,31,36,65,66,71,82,97
CLK_PCI_KBC 18
LPC_FRAME# 21,71
LPC_AD[0..3] 21,71
12
R2726
R2726
100KR2F-L1-GP
100KR2F-L1-GP
0806 chagne GND
<------ TP
<------ BATTERY / CHARGER
<------PCH / EDP
SB to -1
SPI_CS0#_R 21,60
SPI_CLK_R 21,60
SPI_SO_R 21,60
SPI_SI_R 21,60
ECRST#
PURE_HW_SHUTDOWN#
E
B
C
Q2701
Q2701
MMBT3906-4-GP
MMBT3906-4-GP
84.T3906.A11
84.T3906.A11
2nd = 84.03906.F11
2nd = 84.03906.F11
3
PCB VERSION A/D(PIN98) PULL-LOW RESISTOR
SA
SB
SC
-1
-1M
Reserved
FAN_TACH128
PM_PWRBTN#19,97
TP2705Do Not Stuff TP2705Do Not Stuff
PM_SLP_S3#19,36,37,47,92
CHARGE_LED68
KBC_BEEP29TPCLK 69
BRIGHTNESS94
STOP_CHG#40
FAN1_PWM28
TP2709Do Not Stuff TP2709Do Not Stuff
1
STDBY_LED68
PWRLED68
JE40 delete AMP function
PCH_SUSCLK_KBC19
H_PECI5,22
1D05V_VTT
R2721 43R2J-GPR2721 43R2J-GP
1 2
R2720
R2720
1 2
Do Not Stuff
Do Not Stuff
C2716 need very close to EC
Do Not Stuff
Do Not Stuff
PURE_HW_SHUTDOWN#
Prevent BIOS data loss
12
C2715
C2715
DY
DY
ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE
90W
30W
40W
120W 0.82V33.0K
Reserved
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
1
E51_RxD65
E51_TxD65
U2702
U2702
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1
2
GND
RESET#
N/A65W
100.0K
10.0K
20.0K
47.0K
64.9K
FAN_TACH2
EC_GPIO33
ECRST#
PECI
EC_VTT
12
C2716
C2716
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VCC
PULL-HIGH RESISTOR VOLTAGE
31
117
63
64
32
118
62
65
81
66
22
16
85
113
111
30
77
13
12
3D3V_AUX_S53D3V_AUX_S5
DY
DY
3
3
10.0K
20.0K
33.0K
47.0K
64.9K
76.8
100.0K
U2701B
U2701B
NPCE795PA0DX-GP-U
NPCE795PA0DX-GP-U
GPIO56/TA1
GPIO20/TA2
GPIO14/TB1
GPIO01/TB2
GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO32/D_PWM
GPIO66/G_PWM
GPIO33/H_PWM
GPIO45/E_PWM
GPIO40/F_PWM
VCC_POR#
GPIO87/CIRRXM/SIN_CR
GPIO83/SOUT_CR/TRIST#
GPIO55/CLKOUT/IOX_DIN_DIO
GPIO00/EXTCLK
PECI
VTT
3.0V
2.75V
2.48V
2.24V
2.0V
1.87V
1.65VReserved
KBSOUT0/JENK#
KBSOUT4/JEN0#
KBSOUT9/SDP_VIS#
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
EC GPIO standard PH/PL
3D3V_AUX_KBC
100.0K
N/A
100.0K
100.0K
100.0K
100.0K
3.3V
0V
0.3V
0.55V
1.06V
1.3VReserved 100.0K
EC_ENABLE
2 OF 2
2 OF 2
KCOL0
53
KCOL1
52
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
RN2701
RN2701
SRN4K7J-8-GP
SRN4K7J-8-GP
2 3
1
RN2705
RN2705
SRN10KJ-6-GP
SRN10KJ-6-GP
1
2
3
4 5
KCOL2
51
KCOL3
50
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KCOL8
42
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
KCOL16
34
KCOL17
33
KROW0
54
KBSIN0
KROW1
55
KBSIN1
KROW2
56
KBSIN2
KROW3
57
KBSIN3
KROW4
58
KBSIN4
KROW5
59
KBSIN5
KROW6
60
KBSIN6
KROW7
61
KBSIN7
BAT_SCL
BAT_SDA
4
R2775
R2775
100KR2J-1-GP
100KR2J-1-GP
BAT_IN#
12
S5_ENABLE
8
ECRST#
7
6
Wireless_SW
SB to -1
65W_90W#
High: 65W / Low 90W
DISCRETE#
High: UMA / Low: Discrete
2
R2767
R2767
Do Not Stuff
Do Not Stuff
1 2
DY
DY
G
S
Q2705
Q2705
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
1
ADT_TYPE
DISCRETE#
2
3D3V_AUX_S5
RN2706
RN2706
Do Not Stuff
Do Not Stuff
KBC_ON#_R
D
PSL
PSL
PSL SOLUTION
(Power Switch Control Logic)
PSL
PSL
1234
KBC_ON#_GATE
SB modify R2756 stuff, R2760 change DY
R2756
R2756
1 2
KCOL[0..16] 69
KCOL17 69
TP2701 Do Not StuffTP2701 Do Not Stuff
KROW[0..7] 69
RTC_AUX_S5
3D3V_AUX_S5
Do Not Stuff
Do Not Stuff
1 2
DY
DY
R2760
R2760
Do Not Stuff
Do Not Stuff
ڕ࣠ฝೈ
ECSWI#_KBC
R2758
R2758
3D3V_AUX_KBC
12
65W
65W
12
90W
90W
R2707
R2707
R2701
R2701
100KR2F-L1-GP
100KR2F-L1-GP
100KR2F-L1-GP
100KR2F-L1-GP
1 2
1 2
1
2
10KR2J-3-GP
10KR2J-3-GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
ECSCI#_KBC
R2759
R2759
Do Not Stuff
Do Not Stuff
3
DY
DY
D2701
D2701
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 83.BAT54.N81
2nd = 83.BAT54.N81
3nd = 83.00054.T81
3nd = 83.00054.T81
12
R2710
R2710
UMA
UMA
12
R2739
R2739
DIS_PX_Muxless
DIS_PX_Muxless
EC_SWI#20
EC_SCI#22
JE40 modify
SB EC_AGND , change GND
3D3V_AUX_S5
S
G
G
G
D
D
C2713
C2713
Do Not Stuff
Do Not Stuff
12
D
PSL
PSL
PSL
PSL
3D3V_AUX_KBC
EC_GPIO72
KBC_PWRBTN#82
PLS function
AC_OK40
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
1
Q2703
Q2703
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.03413.A31
2ND = 84.03413.A31
Do Not Stuff
Do Not Stuff
ޏګ
0604 Modify:
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
3D3V_AUX_KBC
NO PSL SOLUTION
3D3V_AUX_S5
R2704
R2704
330KR2J-L1-GP
330KR2J-L1-GP
1 2
R2757
R2757
470R2J-2-GP
470R2J-2-GP
G2701
G2701
2 1
pull high 3D3V_AUX_S5
BLUETOOTH_EN
1 2
DY
DY
R2774
R2774
Do Not Stuff
Do Not Stuff
R2768
R2768
Do Not Stuff
Do Not Stuff
AC_IN_KBC
1 2
12
R2769
R2769
100KR2J-1-GP
100KR2J-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
JE40-HR
JE40-HR
JE40-HR
1
R2772
R2772
1 2
Do Not Stuff
Do Not Stuff
EC_GPIO6
12
12
DY
DY
27 102
27 102
27 102
3D3V_AUX_S5
C2717
C2717
Do Not Stuff
Do Not Stuff
-1
-1
-1
of
of
of
A
Page 28
5
4
3
2
1
SSID = Thermal
12
C2801
C2801
DY
DY
P2800_DXP
P2800_DXN
3D3V_S0
12
Do Not Stuff
Do Not Stuff
C2802
C2802
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2807
C2807
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
D D
Q2801
Q2801
PMBS3904-1-GP
PMBS3904-1-GP
84.03904.L06
84.03904.L06
12
C C
R2808
R2808
DY
DY
Do Not Stuff
Do Not Stuff
3
2
Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.
12
C2806
C2806
SC470P50V3JN-2GP
SC470P50V3JN-2GP
1
2.System Sensor, Put on palm rest
Thermal sensor P2800
3D3V_DAC_S0
12
ADJ
12
R2804
R2804
226KR2F-GP
226KR2F-GP
U2801
3D3V_S0
THERM_SYS_SHDN# ADJ
U2801
P2800EA1-GP
P2800EA1-GP
74.02800.A71
74.02800.A71
5
VCC
6
DXP
7
DXN
8
OTZ
1.H/W T8 Shutdown
SB to -1
R2803
R2803
107KR2F-GP
107KR2F-GP
SB modify R2803,R2804 setting
12
C2805
C2805
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
TDR
3
TDL
2
GND
1
ADJ
SYS_THRM 27
T8_THERM 27
JE40 HR modify
Fan controller P2793
C2815
C2815
Do Not Stuff
Do Not Stuff
1 2
DY
DY
FAN_TACH1_C
5V_S0
12
C2809
C2809
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
FAN1_PWM_C
5V_S0
12
C2808
C2808
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
3
2
1
5 6
FAN1
FAN1
ACES-CON4-4-GP
ACES-CON4-4-GP
20.F0765.004
20.F0765.004
2nd = 20.F1808.004
2nd = 20.F1808.004
3rd = 20.F1426.004
3rd = 20.F1426.004
*Layout* 15 mil
21
D2802
D2802
CH551H-30PT-GP
CH551H-30PT-GP
83.R5003.C8F
83.R5003.C8F
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3D3V_S0
R2807
R2807
Do Not Stuff
Do Not Stuff
1 2
DY
DY
FAN_TACH127
D2801
D2801
CH551H-30PT-GP
CH551H-30PT-GP
83.R5003.C8F
83.R5003.C8F
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3rd = 83.5R003.08F
12
R2805
R2805
Do Not Stuff
Do Not Stuff
DY
DY
21
FAN_TACH1_C
FAN1_PWM27
3rd = 83.5R003.08F
1 2
R2806
R2806
Do Not Stuff
Do Not Stuff
For PWM FAN
B B
3D3V_AUX_S5
1
12
Do Not Stuff
Do Not Stuff
DY
DY
3
DY
DY
C2811
C2811
Do Not Stuff
Do Not Stuff
THERM_SYS_SHDN#
2
D
Q2802
Q2802
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
2
S
G
D2803
D2803
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 83.BAT54.D81
2ND = 83.BAT54.D81
3rd = 83.BAT54.S81
VGA Thermal sensor P2800
PURE_HW_SHUTDOWN#27,36
3rd = 83.BAT54.S81
12
R2812
R2812
DY
DY
SMBUS modify to Page 84
A A
5
4
3
3D3V_S0
12
R2809
R2809
100KR2J-1-GP
100KR2J-1-GP
R2810
R2810
Do Not Stuff
Do Not Stuff
1 2
DY
DY
1 2
R2811
R2811
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Title
Title
Title
Thermal P2800/Fan Controllor P2793
Thermal P2800/Fan Controllor P2793
Thermal P2800/Fan Controllor P2793
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
3D3V_S0
IMVP_PWRGD 36,42
JE40-HR
JE40-HR
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
JE40-HR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
28 102
of
28 102
of
28 102
1
-1
-1
-1
Page 29
5
4
3
2
1
5V_S0
D D
-1 PVDD timeing
vensor suggest ,
12
C2927
C2927
SC1U10V3KX-4GP
SC1U10V3KX-4GP
R2921
R2921
Do Not Stuff
Do Not Stuff
1 2
DY
DY
1
EN
NC#5
2
GND
VIN3VOUT
U2902
U2902
G9091-475T12U-GP
G9091-475T12U-GP
74.09091.F3F
74.09091.F3F
2ND = 74.09198.A7F
2ND = 74.09198.A7F
Ꮑֺ
ᏁᖄԵႯ
SB
C C
PD#
B B
CLOSE TO PIN38
A A
5
5
4
AVDDඡ,
3D3V_S05V_S0
1
23
RN2905
RN2905
Do Not Stuff
Do Not Stuff
4
SB
5VA_S0
5VA_S0
12
C2928
C2928
Q2902
Q2902
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
D
.
.
AUD_AGND
AUD_AGND
AUD_HP1_JACK_R282
AUD_HP1_JACK_L282
SC10U10V5KX-2GP
SC10U10V5KX-2GP
.
...
.
...
AUD_SPK_R+82
AUD_SPK_R-82
AUD_SPK_L-82
AUD_SPK_L+82
12
C2910
C2910
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
12
C2903
C2903
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
ࠌش
PW 74.00545.079
HDA_SDIN021
HDA_CODEC_BITCLK21
HDA_CODEC_SDOUT21
3D3V_S0
G
S
DIGITAL
(include thermal pad) Spilt by DGND
EAPD
5V_S0
5V_S0
AUD_AGND
ALC271X-VB3-GR-GP
ALC271X-VB3-GR-GP
71.00271.A03
71.00271.A03
CLOSE TO PIN35
5V_S0
12
C2904
C2904
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
EAPD PD#
1 2
EAPD
49
48
47
46
45
44
43
42
41
40
39
38
37
U2901
U2901
C2911
C2911
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
12
C2906
C2906
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R2915
R2915
1 2
22R2J-2-GP
22R2J-2-GP
R2914
R2914
1 2
33R2J-2-GP
33R2J-2-GP
DY
DY
R2924
R2924
Do Not Stuff
Do Not Stuff
3D3V_S0
GND
SPDIFO
EAPD
PVDD2
SPK-OUT-R+
SPK-OUT-RPVSS2
PVSS1
SPK-OUT-LSPK-OUT-L+
PVDD1
AVDD2
AVSS2
12
1
DVDD
CBP36CBN35CPVEE34HPOUT-R/PORT-I-R33HPOUT-L/PORT-I-L32MIC1-VREFO-L31MIC1-VREFO-R30MIC2-VREFO29LDO-CAP28VREF27AVSS126AVDD1
AUD_CBP
C2907
C2907
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
װၲ
ACZ_BITCLK_AUDIO_+
3
4
5
7
2
6
PD#
BCLK
SDATA-OUT
GPIO1/DMIC-CLK
GPIO0/DMIC-DATA
MIC1-VREFO_L
CPVEE
AUD_CBN
HP_OUT_R_AUD
HP_OUT_L_AUD
R2922
R2922
2D2R3J-2-GP
2D2R3J-2-GP
1 2
G2901
G2901
1 2
Do Not Stuff
Do Not Stuff
G2903
G2903
1 2
Do Not Stuff
Do Not Stuff
AUD_3VD_R
AC97_DATIN
AUDIO_PC_BEEP
10
9
12
8
11
DVSS
SYNC
RESET#
DVDD-IO
SDATA-IN
LINE2-L/PORT-E-L
LINE2-R/PORT-E-R
MIC2-L/PORT-F-L
MIC2-R/PORT-F-R
MIC1-L/PORT-B-L
MIC1-R/PORT-B-R
LINE1-L/PORT-C-L
LINE1-R/PORT-C-R
25
MIC1-VREFO_R
MIC2V
VREF
LDO_CAP_AUDIO
AUD_AGND
CLOSE TO PIN1 and 9
R2925
R2925
Do Not Stuff
Do Not Stuff
1 2
R2902
R2902
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
HDA_CODEC_SYNC 21
HDA_CODEC_RST# 21
12
C2909
C2909
Do Not Stuff
Do Not Stuff
DY
DY
PCBEEP
SENSE_A
SENSE_B
JDREF
MONO-OUT
ALC268_SENSE_A
13
LIN2-L_PORT-B
14
LIN2-R_PORT-B
15
MIC2-L_PORT-B
16
MIC2-R_PORT-B
17
ALC268_SENSE_B
18
19
20
21
22
23
24
ANALOG
5VA_S0
AUD_AGND
12
C2913
C2913
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_AGND
CLOSE TO PIN34
C2912
C2912
12
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
RN2903
RN2904
RN2904
SRN68J-5-GP
SRN68J-5-GP
2 3
1
MIC2V
4
4
RN2903
SRN4K7J-8-GP
SRN4K7J-8-GP
4
HDA_CODEC_SDOUT
12
DY
DY
3D3V_S0
1D5V_S0
MIC1-L_PORT-B
MIC1-R_PORT-B
JDREF
12
R2909
R2909
20KR2F-L-GP
20KR2F-L-GP
1
23
HDA_CODEC_BITCLK
12
RFC2902
RFC2901
RFC2901
RFC2902
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
AUDIO_PC_BEEP
R2907 39K2R2F-L-GPR2907 39K2R2F-L-GP
1 2
R2908 20KR2F-L-GPR2908 20KR2F-L-GP
1 2
C2925 SC1U25V3KX-1-GPC2925 SC1U25V3KX-1-GP
1 2
C2924 SC1U25V3KX-1-GPC2924 SC1U25V3KX-1-GP
1 2
C2920 SC2D2U10V3KX-1GPC2920 SC2D2U10V3KX-1GP
1 2
C2919 SC2D2U10V3KX-1GPC2919 SC2D2U10V3KX-1GP
1 2
1 2
1 2
COMBO_MIC_JD#
R2920
R2920
1 2
20KR2F-L-GP
20KR2F-L-GP
C2918 SC2D2U10V3KX-1GPC2918 SC2D2U10V3KX-1GP
C2917 SC2D2U10V3KX-1GPC2917 SC2D2U10V3KX-1GP
CLOSE TO PIN19
C2916
C2916
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C2914
C2914
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
MIC_IN_R
MIC_IN_L
3
CLOSE TO PIN39 and 46
12
C2921
C2921
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
COMBO_MIC
AUD_HP1_JD# 82
EXT_MIC_JD# 82
CLOSE TO PIN18
AUD_MIC_L
AUD_MIC_R
AUD_AGND
AUD_AGND
12
C2922
C2922
SC100P50V2JN-3GP
SC100P50V2JN-3GP
R2919
R2919
1 2
Do Not Stuff
Do Not Stuff
12
R2906
R2906
4K7R2J-2-GP
4K7R2J-2-GP
COMBO_MIC_Q
12
C2926
C2926
Do Not Stuff
Do Not Stuff
DY
DY
AUD_AGND
INT_MIC1_R
COMBO_MIC_R
2
RN2901
RN2901
SRN47K-2-GP-U
SRN47K-2-GP-U
4
RN2902
RN2902
SRN1KJ-4-GP
SRN1KJ-4-GP
4 5
3
2
1
R2926
R2926
10KR2J-3-GP
10KR2J-3-GP
R2904
1
23
G
KBC_BEEP_1AUDIO_BEEP
SPKR_SB_1
COMBO_MIC_JD#
DS
Q2901
Q2901
BSS138-7F-GP
BSS138-7F-GP
84.00138.F31
84.00138.F31
2ND = 84.00138.H31
2ND = 84.00138.H31
R2904
Do Not Stuff
Do Not Stuff
1 2
1 2
R2905
R2905
Do Not Stuff
Do Not Stuff
KBC_BEEP 27
HDA_SPKR 21
Max Vgs(th) 1.8V
AUD_AGND
INT_MIC_L_R 49,97
6
7
MIC_IN_L 82
8
MIC_IN_R 82
INT_MIC_L_R
12
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
MIC2V Ref voltage is 2.5V
becasue Vgs(th)concern
cann't use 2N702 for desing
MIC2V
R2917
R2917
2K2R2J-2-GP
2K2R2J-2-GP
1 2
COMBO_MIC 82
12
R2927
R2927
22K1R2F-L-GP
22K1R2F-L-GP
SB modify
AUD_AGND
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Audio Codec
Audio Codec
Audio Codec
JE40-HR
JE40-HR
JE40-HR
29 102
29 102
29 102
1
-1
-1
of
of
of
-1
Page 30
5
4
3
2
1
AUDIO OP AMPLIFIER
D D
JE40 delete AMP function
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Audio AMP
Audio AMP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Audio AMP
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
30 102
30 102
30 102
of
of
of
1
-1
Page 31
5
4
3
2
1
SB modify L3101,2,4,5,6 to 0 ohm
3D3V_S5
R3101
R3101
Do Not Stuff
Do Not Stuff
1 2
D D
1D2V_LAN_S5
C C
CLK_PCIE_LAN20
CLK_PCIE_LAN#20
PCIE_WAKE#19,65,66,82
PCIE_CLK_LAN_RQ#20
B B
EC3102
EC3102
CLK_PCIE_LAN
12
Do Not Stuff
Do Not Stuff
DY
DY
A A
3D3V_LAN_S5
12
C3101
C3101
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
L3101
L3101
Do Not Stuff
Do Not Stuff
1 2
L3103
L3103
GBK160808T-601Y-GP
GBK160808T-601Y-GP
68.00248.011
68.00248.011
2nd = 68.00217.241
2nd = 68.00217.241
1 2
L3106
L3106
Do Not Stuff
Do Not Stuff
1 2
PCIE_RXP420
PCIE_RXN420
PCIE_TXP420
PCIE_TXN420
PLT_RST#5,18,27,36,65,66,71,82,97
SD_DAT0/XD_D0/MS_D032
SD_DAT1/XD_D1/MS_D132
SD_DAT2/XD_D2/MS_D232
SD_DAT3/XD_D3/MS_D332
SD_DAT4/XD_D4/MS_D432
SD_DAT5/XD_D5/MS_D532
SD_DAT6/XD_D6/MS_D632
SD_DAT7/XD_D7/MS_D732
SB to -1 modify to short pad
3D3V_LAN_S03D3V_S0
R3135
R3135
12
Do Not Stuff
Do Not Stuff
EC3101
EC3101
Do Not Stuff
Do Not Stuff
12
C3129
C3129
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CLK_PCIE_LAN#
12
DY
DY
5
12
C3102
C3102
SC47P50V2JN-3GP
SC47P50V2JN-3GP
3G_RF
3G_RF
3G_RF
3G_RF
12
C3116
C3116
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C3119
C3119
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C3120
C3120
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
PCIE_TXP420
PCIE_TXN420
PLT_RST#5,18,27,36,65,66,71,82,97
3D3V_LAN_S5
C3134
C3134
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
PCIE_RXP420
PCIE_RXN420
PCIE_WAKE#19,65,66,82
SB C3134, C3135 change 15P
1D2V_LAN_S5
12
C3104
C3103
C3103
SC56P50V2JN-2GP
SC56P50V2JN-2GP
AVDDL_G
GPHY_PLLVDD
PCIE_PLLVDD
100R2J-2-GP
100R2J-2-GP
C3104
12
C3117
C3117
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C3112
C3112
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C3121
C3121
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C3123 SCD1U10V2KX-5GPC3123 SCD1U10V2KX-5GP
1 2
C3124 SCD1U10V2KX-5GPC3124 SCD1U10V2KX-5GP
1 2
PCIE_CLK_LAN_RQ#20
12
R3111
R3111
12
C3128
C3128
SC33P50V2JN-3GP
SC33P50V2JN-3GP
R3120 Do Not StuffR3120 Do Not Stuff
1 2
R3122 Do Not StuffR3122 Do Not Stuff
1 2
R3123 Do Not StuffR3123 Do Not Stuff
1 2
R3124 Do Not StuffR3124 Do Not Stuff
1 2
R3126 Do Not StuffR3126 Do Not Stuff
1 2
R3127 Do Not StuffR3127 Do Not Stuff
1 2
R3128 Do Not StuffR3128 Do Not Stuff
1 2
R3130 Do Not StuffR3130 Do Not Stuff
1 2
3D3V_LAN_S0
RN3101
RN3101
SRN4K7J-8-GP
SRN4K7J-8-GP
2 3
1
LAN_XO_R
LAN_XI
1 2
X3101
X3101
12
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
82.30020.851
82.30020.851
12
C3105
C3105
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R3142
R3142
Do Not Stuff
Do Not Stuff
1 2
R3134
R3134
1 2
1KR2J-1-GP
1KR2J-1-GP
4
12
C3135
C3135
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3G_RF
3G_RF
CLK_PCIE_LAN20
CLK_PCIE_LAN#20
R3138
R3138
200R2F-L-GP
200R2F-L-GP
C3108
C3108
SC47P50V2JN-3GP
SC47P50V2JN-3GP
1D2V_LAN_S5
AVDDL_G
AVDDL_G
AVDDL_G
GPHY_PLLVDD
PCIE_PLLVDD
PCIE_RXDP4
PCIE_RXDN4
PCIE_WAKE#_C
LAN_RST
BCM57785_CR_DATA0
BCM57785_CR_DATA1
BCM57785_CR_DATA2
BCM57785_CR_DATA3
BCM57785_CR_DATA4
BCM57785_CR_DATA5
BCM57785_CR_DATA6
BCM57785_CR_DATA7
VMAINPRSNT
BCM57785_TEST1
BCM57785_TEST2
LAN_X0
12
LAN_RDAC
12
R3139
R3139
1K24R2F-GP
1K24R2F-GP
4
3D3V_LAN_S5
SB mmodify vendor suggest
62
56
20
VDDO_CR
VDDO/VDDIO7VDDO/VDDIO
35
VDDC
61
VDDC
39
AVDDL
45
AVDDL
51
AVDDL
36
GPHY_PLLVDDL
32
PCIE_PLLVDDL
29
PCIE_PLLVDDL
28
PCIE_TXD_P
27
PCIE_TXD_N
33
PCIE_RXD_P
34
PCIE_RXD_N
3
WAKE#
12
CLK_REQ#
11
PERST#
31
PCIE_REFCLK_P
30
PCIE_REFCLK_N
25
CR_DATA0
24
CR_DATA1
23
CR_DATA2
22
CR_DATA3
52
CR_DATA4
53
CR_DATA5
54
CR_DATA6
55
CR_DATA7
58
VMAIN_PRSNT
6
TEST1
10
TEST2
19
XTALO
18
XTALI
38
RDAC
U3101
U3101
BCM57785XA0KMLG-GP
BCM57785XA0KMLG-GP
71.57785.M02
71.57785.M02
Change:71.57785.M03
Change:71.57785.M03
VDDO/VDDIO
10ִࢍޏؚ71.57785.M03
SPD100LED#_SERIALDO
TRAFFICLED#_SERIALDI
SCLK_SPD1000LED#
SD_DETECT/XD_WE#
SR_DISABLE/XD_DETECT#
MS_INS#/XD_CE#
GPIO_2/MEDIA_SENSE/XD_RE#
CR_WP#/XD_WP#
CR_LED/CR_BUS_PWR/XD_ALE
CR_CLK/XD_RY_BY#
CR_CMD/XD_CLE
GND
69
BIASVDDH
XTALVDDH
AVDDH
AVDDH
TRD3_N
TRD3_P
TRD2_N
TRD2_P
TRD1_N
TRD1_P
TRD0_N
TRD0_P
LOW_PWR
GPIO1_LR_OUT
GPIO_0
SI_EEDATA
SO_LINKLED#
CS#_EECLK
SR_LX
SR_VFB
SR_VDDP
SR_VDD
3
BIASVDD_G
37
XTALVDD_G
17
LAN_AVDD
48
LAN_AVDD
42
49
50
47
46
43
44
41
40
LOW_PWR
4
2
67
8
BCM57785_GPIO0
5
BCM57785_1000LED#
66
LAN_FLASH_SI/EEDATA
64
BCM57785_LINKLED#
65
BCM57785_CS#/EECLK
63
BCM57785_XD_WE#
1
BCM57785_XD_DETECT#
68
BCM57785_XD_CE#
59
BCM57785_XD_RE#
9
57
BCM57785_XD_ALE
60
BCM57785_XD_R/B
21
BCM57785_XD_CLE
26
1D2V_LAN_S5_SR
16
1D2V_LAN_S5
13
15
14
3G_RF
3G_RF
MDI3- 59
MDI3+ 59
MDI2- 59
MDI2+ 59
MDI1- 59
MDI1+ 59
MDI0- 59
MDI0+ 59
R3106
R3106
1 2
Do Not Stuff
Do Not Stuff
10M/100M/1G_LED# 59
LAN_ACT_LED# 59
TP1
TP1
Do Not Stuff
Do Not Stuff
SB
3D3V_LAN_S5
12
12
C3137
C3137
C3136
C3136
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
BIASVDD_G
12
C3111
C3111
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
XTALVDD_G
12
12
DY
DY
12
C3113
RFC3101
RFC3101
C3113
SC47P50V2JN-3GP
SC47P50V2JN-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
LAN_AVDD
12
C3115
C3115
C3114
C3114
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R3109
R3109
1 2
Do Not Stuff
Do Not Stuff
R3114
R3114
1 2
Do Not Stuff
Do Not Stuff
SB delete R3117
R3118 Do Not StuffR3118 Do Not Stuff
1 2
R3119 Do Not StuffR3119 Do Not Stuff
1 2
R3121 Do Not StuffR3121 Do Not Stuff
1 2
R3125 Do Not StuffR3125 Do Not Stuff
1 2
DY
DY
R3131 Do Not Stuff
R3131 Do Not Stuff
1 2
R3132 Do Not StuffR3132 Do Not Stuff
1 2
R3133 Do Not StuffR3133 Do Not Stuff
1 2
L3107
L3107
IND-4D7UH-192-GP
IND-4D7UH-192-GP
68.4R750.20C
68.4R750.20C
12
12
3G_RF
3G_RF
SC56P50V2JN-2GP
SC56P50V2JN-2GP
3D3V_LAN_S5
L3102
L3102
Do Not Stuff
Do Not Stuff
1 2
BCM57785_CS#/EECLK
L3104
L3104
Do Not Stuff
Do Not Stuff
1 2
LAN_FLASH_SI/EEDATA
SB delete EEPROM
L3105
L3105
Do Not Stuff
Do Not Stuff
1 2
128K byte
10M/100M/1G_LED#
BCM57785_GPIO0
SB delete R3112
10M/100M/1G_LED#
SD_CD/XD_WE# 32,74
XD_CD# 32
XD_CE#/MS_INS# 32
XD_RE# 32
C3130
C3130
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
2
XD_WP#/SD_WP# 32
XD_ALE 32
SD_CLK/XD_R/B# 32
SD_CMD/XD_CLE/MS_BS 32
Card-reader Off-Page
SB delete R3129 for LDO power
1D2V_LAN_S5
12
C3132
C3132
3G_RF
3G_RF
SB modify R3102 DY, R3104 to pull low
3D3V_LAN_S5
RN3102
RN3102
SRN4K7J-8-GP
SRN4K7J-8-GP
2 3
1
4
3D3V_LAN_S5
VDDO_CR
12
C3126
C3126
12
C3118
C3118
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
DY
DY
1 2
12
C3125
C3125
R3140
R3140
Do Not Stuff
Do Not Stuff
R3141
R3141
10KR2J-3-GP
10KR2J-3-GP
Check VDDO_CR power plan
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SB for B version
3D3V_CARD_S0 VDDO_CR
1 2
R3143
R3143
Do Not Stuff
Do Not Stuff
LOW_PWR
1 2
R3144
R3144
Do Not Stuff
Do Not Stuff
SB for B version can no use LDO
delete LDO
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
BCM57780
BCM57780
BCM57780
JE40-HR
JE40-HR
JE40-HR
1
31 102
31 102
31 102
of
of
of
XD_ALE 32
-1
-1
-1
Page 32
5
SB modify add 0 ohm
R3202
R3202
Do Not Stuff
Do Not Stuff
SB add
12
C3202
C3202
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
48MHZ_OUT20
R3201
R3201
Do Not Stuff
Do Not Stuff
1 2
RTS
RTS
USB_PN518
USB_PP518
3D3V_CARD_S0
D D
3D3V_S0
12
12
C3206
C3206
3D3V_CARD_S0
C C
C3205
C3205
Do Not Stuff
Do Not Stuff
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
12
12
C3204
C3204
C3201
C3201
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
C3203
C3203
Do Not Stuff
Do Not Stuff
RREF
RTS
RTS
VREG
12
1 2
RTS
RTS
1
2
3
4
5
6
25
RTS
RTS
RREF
DM
DP
3V3_IN
CARD_3V3
V18
GND
XD_D6/MS_BS
XD_D5/SD_D2/MS_D5
XD_D4/SD_D3/MS_D1
SD_DAT7/XD_D7/MS_D7_RTS
24
22
23
XD_D7
CLK_IN
XD_CD#7SP18SP29SP310SP411SP5
XD_CD#_RTS
XD_RDY/SD_WP/MS_CLK
XD_RE#/MS_INS#
XD_CE#/SD_D1
XD_CLE/SD_D0/MS_D7
XD_D3/SD_D4/MS_D4
SP1119SP1220SP1321SP14
SP10
GPIO0
SP9
SP8
SP7
SP6
12
XD_ALE/SD_D7/MS_D3
U3201
U3201
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Near CARD1 Pin11, Pin18, Pin22
B B
A A
5
XD_D2/SD_CMD
18
17
XD_D1/SD_D5/MS_D0
16
XD_D0/SD_CLK/MS_D2
15
XD_WP/SD_D6/MS_D6
14
SD_CD/XD_WE#_RTS
13
4
RN3209
RN3209
Do Not Stuff
XD_RDY/SD_WP/MS_CLK
XD_CE#/SD_D1
XD_CE#/SD_D1
XD_RE#/MS_INS#
XD_RE#/MS_INS#
XD_ALE/SD_D7/MS_D3
XD_ALE/SD_D7/MS_D3
XD_CLE/SD_D0/MS_D7
XD_CLE/SD_D0/MS_D7
XD_D0/SD_CLK/MS_D2
XD_WP/SD_D6/MS_D6
XD_D2/SD_CMD
XD_D2/SD_CMD
XD_D1/SD_D5/MS_D0
XD_D1/SD_D5/MS_D0
XD_D4/SD_D3/MS_D1
XD_D4/SD_D3/MS_D1
XD_D4/SD_D3/MS_D1
XD_D3/SD_D4/MS_D4
XD_D6/MS_BS
XD_D6/MS_BS
XD_D5/SD_D2/MS_D5
XD_D5/SD_D2/MS_D5
SD_DAT7/XD_D7/MS_D7_RTS
XD_CD#_RTS
SD_CD/XD_WE#_RTS
4
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3203
RN3203
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3202
RN3202
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3211
RN3211
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3204
RN3204
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3207
RN3207
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3201
RN3201
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
RN3216
RN3216
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RTS
RTS
3
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
MS-SCLK_17 74
SD-WP_2 74
XD-R/-B_38 74
SD-DAT1_3 74
XD_CE#_36 74
MS_INS#_14 74
XD_RE#_37 74
MS-DATA3_15 74
XD_ALE_34 74
SD_DATA0_4 74
XD_CLE_35 74
SD-CLK_9 74
MS-DATA2_12 74
XD_D0_30 74
XD_WP_32 74
SD_CMD_16 74
XD_D2_28 74
MS_DATA0_10 74
XD_D1_29 74
SD-DATA3_19 74
MS-DATA1_8 74
XD_D4_26 74
XD_D3_27 74
MS_BS_7 74
XD_D6_24 74
SD-DATA1_21 74
XD_D5_25 74
XD_D7_23 74
XD_CD#_39 74
SD_CD/XD_WE#_1_33_43 74
3
SD_CLK/XD_R/B#31
XD_CE#/MS_INS#31
XD_WP#/SD_WP#31
SB to -1
SD_DAT1/XD_D1/MS_D131
SD_DAT1/XD_D1/MS_D131
SD_DAT1/XD_D1/MS_D131
SD_CD/XD_WE#31,74
SD_DAT0/XD_D0/MS_D031
SD_DAT0/XD_D0/MS_D031
SD_DAT0/XD_D0/MS_D031
XD_RE#31
SD_DAT3/XD_D3/MS_D331
SD_DAT3/XD_D3/MS_D331
SD_DAT3/XD_D3/MS_D331
SD_CMD/XD_CLE/MS_BS31 MS_BS_7 74
SD_CMD/XD_CLE/MS_BS31
SD_CMD/XD_CLE/MS_BS31
SD_DAT2/XD_D2/MS_D231
SD_DAT2/XD_D2/MS_D231
SD_DAT2/XD_D2/MS_D231
SD_DAT4/XD_D4/MS_D431
SD_DAT5/XD_D5/MS_D531
SD_DAT6/XD_D6/MS_D631
SD_DAT7/XD_D7/MS_D731 XD_D7_23 74
2
XD_CD#31 XD_CD#_39 74
XD_ALE31
RN3210
RN3210
SRN0J-7-GP
SRN0J-7-GP
1
2
3
4 5
BCM
BCM
RN3206
RN3206
SRN0J-7-GP
SRN0J-7-GP
1
2
3
4 5
BCM
BCM
R3205
R3205
100R2J-2-GP
100R2J-2-GP
1 2
BCM
BCM
RN3213
RN3213
SRN47J-4-GP
SRN47J-4-GP
1
2
3
4 5
BCM
BCM
R3206
R3206
100R2J-2-GP
100R2J-2-GP
1 2
BCM
BCM
RN3214
RN3214
SRN47J-4-GP
SRN47J-4-GP
1
2
3
4 5
BCM
BCM
R3203
R3203
100R2J-2-GP
100R2J-2-GP
1 2
BCM
BCM
RN3205
RN3205
SRN47J-7-GP
SRN47J-7-GP
1
2 3
BCM
BCM
R3204
R3204
100R2J-2-GP
100R2J-2-GP
1 2
BCM
BCM
RN3208
RN3208
SRN47J-7-GP
SRN47J-7-GP
1
2 3
BCM
BCM
R3207
R3207
100R2J-2-GP
100R2J-2-GP
1 2
BCM
BCM
RN3212
RN3212
SRN47J-4-GP
SRN47J-4-GP
1
2
3
4 5
BCM
BCM
RN3215
RN3215
SRN47J-4-GP
SRN47J-4-GP
1
2
3
4 5
BCM
BCM
8
7
6
8
7
6
8
7
6
8
7
6
4
4
8
7
6
8
7
6
MS-SCLK_17 74
SD-CLK_9 74
XD-R/-B_38 74
MS_INS#_14 74
XD_CE#_36 74
SD-WP_2 74
XD_WP_32 74
-1M
MS-DATA1_8 74
-1M
SD-DAT1_3 74
XD_D1_29 74
SD_CD/XD_WE#_1_33_43 74
MS_DATA0_10 74
SD_DATA0_4 74
XD_D0_30 74
XD_RE#_37 74
MS-DATA3_15 74
SD-DATA3_19 74
XD_D3_27 74
SD_CMD_16 74
XD_CLE_35 74
MS-DATA2_12 74
SD-DATA1_21 74
XD_D2_28 74
XD_ALE_34 74
XD_D4_26 74
XD_D5_25 74
XD_D6_24 74
HR UMA
HR UMA
HR UMA
-1M
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
RTS5159 (CARD READER)
RTS5159 (CARD READER)
RTS5159 (CARD READER)
JE40-HR
JE40-HR
JE40-HR
1
32 102
32 102
32 102
of
of
of
-1
-1
-1
Page 33
A
4 4
B
C
D
E
3 3
2 2
1 1
A
(Blanking)
B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
C
Date: Sheet
D
Reserved
JE40-HR
JE40-HR
JE40-HR
33 102
33 102
33 102
of
of
of
E
-1
-1
-1
Page 34
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
34 102
34 102
34 102
of
of
of
1
-1
Page 35
5
D D
C C
4
3
2
1
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
USB 3.0 Controller
USB 3.0 Controller
USB 3.0 Controller
JE40-HR
JE40-HR
JE40-HR
35 102
35 102
35 102
1
of
of
-1
-1
-1
Page 36
5
4
3
2
1
Power Sequence
D D
IMVP_PWRGD28,42 SYS_PWROK 19
PM_SLP_S3#19,27,37,47,92
3
D3603
D3603
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2ND = 83.00016.F11
2ND = 83.00016.F11
ANNIE Run Power
C C
3D3V_S0
PM_SLP_S3#19,27,37,47,92
5V_S5
-1 co-layout SLG55221
PM_SLP_S3#19,27,37,47,92
B B
R3614
R3614
1 2
Do Not Stuff
Do Not Stuff
1
2
U3609
U3609
SLG55221-130010VTR-GP
SLG55221-130010VTR-GP
74.55221.0E3
74.55221.0E3
1
VCC
ON
DIS2
GND
NC#9
G1/G2
S/DIS1
3D3V_S0
5V_S0
2
3
4
12
C3612
C3612
R3614
Do Not Stuff
Do Not Stuff
DY
DY
9
8
PG
7
6
5
D
RUN_ENABLE
U3610
U3610
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
6
5
4
DY
DY
CRB : 1K
5V_S0
5V_S5
VCC
EN
GND
DC2
HV
DC1
U3604
U3604
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
5V_S0
2nd = 84.08882.037
C3607
C3607
Do Not Stuff
Do Not Stuff
1 2
DY
RUN_ENABLE
12
C3606
C3606
RUN_ENABLE
DY
DY
12
R3633
R3633
Do Not Stuff
Do Not Stuff
5V_S5
1
2
3
12
R3621
DY
DY
DY
DY
R3621
Do Not Stuff
Do Not Stuff
DY
DY
Do Not Stuff
Do Not Stuff
-1 modify R3621,D3602 to DY
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
DY
R3626
R3626
1 2
0R2J-2-GP
0R2J-2-GP
D3602
D3602
Do Not Stuff
Do Not Stuff
2ND = 83.9R103.F3F
2ND = 83.9R103.F3F
A K
Do Not Stuff
Do Not Stuff
C3611
C3611
12
2nd = 84.08882.037
3D3V_S0
2nd = 84.08882.037
2nd = 84.08882.037
1D5V_S0
change:84.03006.A37
change:84.03006.A37
S
S
1
S
S
2
S
S
3
GD
GD
4 5
U3607
U3607
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
S
S
1
S
S
2
S
S
3
GD
GD
4 5
U3605
U3605
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
S
S
1
S
S
2
S
S
3
GD
GD
4 5
5V_S5
D
D
8
D
D
7
D
D
6
3D3V_S5
D
D
8
D
D
7
D
D
6
1D5V_S3
D
D
8
D
D
7
D
D
6
1D5V_S0
MAX Current 3000 mA
Design Current 2100 mA
Total= 11.39A
3D3V_S5
R3608
R3608
1 2
100KR2J-1-GP
100KR2J-1-GP
D
S
G
PM_SLP_S3#19,27,37,47,92
SB modify part number
PS_S3CNTRL 37
Q3606
Q3606
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
SB
R3622
R3622
1D05V_VTT
H_PWRGD_R
R3601
R3601
DY
DY
12
R3602
R3602
1 2
DY
DY
R3616
R3616
12
4K7R2J-2-GP
4K7R2J-2-GP
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
R3632
R3632
2K2R2J-2-GP
2K2R2J-2-GP
2
1
R36032KR2F-3-GP R36032KR2F-3-GP
H_CPUPWRGD5,22,97
PLT_RST#5,18,27,31,65,66,71,82,97
A A
3V_5V_EN41
5
12
Do Not Stuff
Do Not Stuff
B
12
C3602
C3602
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3
D3601
D3601
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2ND = 83.00016.F11
2ND = 83.00016.F11
12
4
H_THERMTRIP# 5,22
E
Q3601
Q3601
CHT2222APT-GP
CHT2222APT-GP
C
84.02222.S11
84.02222.S11
2nd = 84.02222.V11
2nd = 84.02222.V11
PURE_HW_SHUTDOWN# 27,28
S5_ENABLE 27,97
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Power Plane Enable
Power Plane Enable
Power Plane Enable
JE40-HR
JE40-HR
JE40-HR
36 102
36 102
36 102
1
-1
-1
of
of
of
-1
Page 37
5
Close to CPU
S3 Power Reduction Circuit Processor VREF_DQ Implementation
D D
S3 Power Reduction X01 20091111 JE40 HR modify
5
DDR_VREF_S3
4
R3707
R3707
Do Not Stuff
Do Not Stuff
1 2
DY
DY
S
D
Q3708
Q3708
2N7002K-2-GP
2N7002K-2-GP
2ND = 84.2N702.031
2ND = 84.2N702.031
84.2N702.J31
84.2N702.J31
G
R3705
R3705
100KR2J-1-GP
100KR2J-1-GP
1 2
PM_SLP_S3# 19,27,36,47,92
+V_SM_VREF_CNT 9
᧭ᢞ
3
R3710
Ղٙ
2
Q3701
Q3701
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
PS_S3CNTRL36
1
Close to DIMM
S3 Power Reduction Circuit SM_DRAMPWROK
0D75V_S0
12
R3703
R3703
22R2J-2-GP
22R2J-2-GP
D
S
G
SB to -1 reserve R3723
C C
PS_S3CNTRL 36
SB to -1
1D5V_S0
R3715
R3715
Do Not Stuff
Do Not Stuff
DY
DY
1 2
1.5V_RUN_CPU_EN
R3722
R3722
Do Not Stuff
Do Not Stuff
DY
DY
SB to -1
1 2
B B
PM_DRAM_PWRGD5,19
ALL_POWER_OK27,42,48
A A
5
5V_S5
DY
DY
B
DY
DY
R3713
R3713
200R2F-L-GP
200R2F-L-GP
12
R3714
R3714
Do Not Stuff
Do Not Stuff
1.5V_RUN_CPU_EN#
C
E
Q3706
Q3706
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.03904.P11
2ND = 84.03904.P11
3rd = 84.03904.L06
3rd = 84.03904.L06
3D3V_S5
12
R3701
R3701
1 2
0R2J-2-GP
0R2J-2-GP
C3701
C3701
Do Not Stuff
Do Not Stuff
DY
DY
SB
1D5V_S3
12
DY
DY
0D75V_EN_1
12
DY
DY
R3723
R3723
Do Not Stuff
Do Not Stuff
1 2
Q3705
Q3705
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
G
S
DY
DY
R3721
R3721
Do Not Stuff
Do Not Stuff
1
IN B
2
IN A
GND3OUT Y
U3701
U3701
74VHC1G09DFT2G-GP
74VHC1G09DFT2G-GP
73.01G09.AAH
73.01G09.AAH
OD AND gate required
3D3V_S0
12
DY
DY
0D75V_EN_L
D
PM_SLP_S3#19,27,36,47,92
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
1D5V_S03D3V_S5
CEKLT V1.0: PCH to 1K,CUP to 200R
12
R3702
R3702
200R2F-L-GP
VCC
4
5
VDDPWRGOOD_R
4
200R2F-L-GP
R3719
R3719
1 2
130R2F-1-GP
130R2F-1-GP
1 2
For U3701 not OD AND gate
R3719 to 64.15015.6DL
R3720 to 64.75005.6DL
R3702 to DY
SM_DRAMPWROK must have a maximum of 15ns rise or fall time
over VDDQ * 0.55± 200mV and the edge must be monotonic
R3712
R3712
Do Not Stuff
Do Not Stuff
R3711
R3711
Do Not Stuff
Do Not Stuff
DY
DY
R3716
R3716
Do Not Stuff
Do Not Stuff
R3720
R3720
Do Not Stuff
Do Not Stuff
DY
DY
12
12
DY
DY
VDDPWRGOOD 5
1.05VTT_PWRGD 45,48
R3710
R3710
Do Not Stuff
Do Not Stuff
1 2
12
C3705
C3705
Do Not Stuff
Do Not Stuff
3
0D75V_EN 46
Close to CPU
S3 Power Reduction Circuit SM_DRAMPWROK
R3709
R3709
Do Not Stuff
Do Not Stuff
1 2
DY
DY
SM_DRAMRST#5
S
G
2
Q3703
Q3703
2ND = 84.2N702.031
2ND = 84.2N702.031
84.2N702.J31
84.2N702.J31
2N7002K-2-GP
2N7002K-2-GP
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
1D5V_S3
12
R3706
R3706
1KR2J-1-GP
1KR2J-1-GP
S3 Power Reduction Circuit
SM_DRAMRST#
SM_DRAMRST#_D
D
12
C3702
C3702
DY
DY
Do Not Stuff
Do Not Stuff
C3703
C3703
DRAMRST_CNTRL_PCH
12
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
1 2
0R2J-2-GP
0R2J-2-GP
R3718
R3718
SB to -1
DRAMRST_CNTRL_PCH 20
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ADAPTER
ADAPTER
ADAPTER
JE40-HR
JE40-HR
JE40-HR
1
DDR3_DRAMRST# 14,15
of
of
of
37 102
37 102
37 102
-1
-1
-1
Page 38
5
4
3
2
1
ANNIE solution
D D
DCIN1
DCIN1
ACES-CON5-14-GP
ACES-CON5-14-GP
20.F1701.005
20.F1701.005
2nd = 20.F1763.005
2nd = 20.F1763.005
1Pin=3A
C C
NP1
1
2
3
4
5
NP2
JE40 change DCIN1 part number
B B
Adaptor in to generate DCBATOUT
AD_JK
PC3801
PC3801
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
A K
D3801
D3801
P6SBMJ27APT-GP
P6SBMJ27APT-GP
83.P6SBM.DAG
83.P6SBM.DAG
2nd = 83.P6SMB.JAG
2nd = 83.P6SMB.JAG
3rd = 83.P6SMB.CAG
3rd = 83.P6SMB.CAG
R1
R1
AD_OFF27
1
R2
R2
PQ3801
PQ3801
LTC024EUB-FS8-GP
LTC024EUB-FS8-GP
84.00024.A1K
84.00024.A1K
2ND = 84.00124.H1K
2ND = 84.00124.H1K
3rd = 84.05124.011
3rd = 84.05124.011
DY
DY
A K
D3802
D3802
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 83.P6SMB.JAG
2nd = 83.P6SMB.JAG
3rd = 83.P6SMB.CAG
3rd = 83.P6SMB.CAG
3
2
PWR_ADJK_ENPWR_ADJK_EN
PC3802
PC3802
12
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
PU3802
PU3802
P1403EV8-GP
P1403EV8-GP
84.P1403.B37
84.P1403.B37
2ND = 84.04407.F37
2ND = 84.04407.F37
S
D
S
1
2
3
4 5
D
S
S
S
S
GD
GD
8
D
D
7
D
D
6
AD+
PWR_ADJK_ENPWR_ADJK_EN
R2
R2
B
PQ3802
PQ3802
PDTA124EU-1-GP
PDTA124EU-1-GP
84.00124.K1K
84.00124.K1K
2nd = 84.00024.01K
2nd = 84.00024.01K
3rd = 84.05124.A11
3rd = 84.05124.A11
E
R1
R1
C
AD_JK
PR3807
PR3807
200KR2F-L-GP
200KR2F-L-GP
1 2
PWR_AD+_2
PC3805
PC3805
12
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
12
PR3808
PR3808
100KR2J-1-GP
100KR2J-1-GP
HR UMA
HR UMA
HR UMA
A A
Title
Title
Title
DCIN JACK
DCIN JACK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
DCIN JACK
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
38 102
38 102
38 102
1
-1
-1
-1
Page 39
5
4
3
2
1
BATTERY CONNECTOR
BT+
D D
12
12
PC3901
SCD1U50V3KX-GP
SCD1U50V3KX-GP
BAT_IN#27
BAT_SCL27,40
BAT_SDA27,40
C C
PC3901
KA
PD3901
PD3901
MMPZ5232BPT-GP-U
MMPZ5232BPT-GP-U
83.5R603.D3F
83.5R603.D3F
2ND = 83.5R603.K3F
2ND = 83.5R603.K3F
3rd = 83.5R603.Q3F
3rd = 83.5R603.Q3F
PC3902
PC3902
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
PRN3901
PRN3901
SRN33J-7-GP
SRN33J-7-GP
1
2
3
4 5
PR3901
PR3901
BATT_SENSE40
8
7
6
1 2
BAT_IN#_1
BATA_SCL_1
BATA_SDA_1
Do Not Stuff
Do Not Stuff
BT+
12
R3902
R3902
Do Not Stuff
Do Not Stuff
9
1
BAT1
2
3
4
5
6
7
8
10
BAT1
TCN-CON8-7-GP
TCN-CON8-7-GP
20.81362.008
20.81362.008
2nd = 20.81371.008
2nd = 20.81371.008
EC Protect
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
BATT CONN
BATT CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
BATT CONN
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
39 102
39 102
39 102
of
of
of
1
-1
Page 40
5
NEAR
AD+
S
D
S
D
8
7
6
84.P1403.B37
D D
C C
B B
84.P1403.B37
2ND = 84.04407.F37
2ND = 84.04407.F37
PR4023
PR4023
10KR2F-2-GP
10KR2F-2-GP
1 2
DC_IN_D
2nd = 84.DM601.03F
2nd = 84.DM601.03F
20100706 Wayne
PR4010
PR4010
49K9R2F-L-GP
49K9R2F-L-GP
CHG_AGND
AD_IA27
SC220P50V2KX-3GP
SC220P50V2KX-3GP
S
D
S
D
S
D
S
D
GD
GD
PU4001
PU4001
P1403EV8-GP
P1403EV8-GP
PQ4001
PQ4001
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
AC_OK
12
PR4013
PR4013
1 2
Do Not Stuff
Do Not Stuff
PC4011
PC4011
1
2
3
45
PR4022
PR4022
49K9R2F-L-GP
49K9R2F-L-GP
AD+_G_1
1234
5
6
3D3V_AUX_S5
PC4007
PC4007
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
12
AD+_TO_SYS
12
PR4021
PR4021
100KR2J-1-GP
100KR2J-1-GP
AD+_G_2
12
PR4006
PR4006
316KR3F-2-GP
316KR3F-2-GP
CHG_AGND
SC150P50V2JN-3GP
SC150P50V2JN-3GP
PC4010
PC4010
1 2
PC4012
PC4012
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
PWR_CHG_REF_RC
12
PD4001
PD4001
1SS400GPT-GP
1SS400GPT-GP
83.00400.C1F
83.00400.C1F
2nd = 83.1S400.B2F
2nd = 83.1S400.B2F
AD+
12
12
PC4008
PC4008
SC1U10V3KX-3GP
SC1U10V3KX-3GP
PWR_CHG_FBO_RC
PR4015
PR4015
1 2
200KR2F-L-GP
200KR2F-L-GP
PR4016
PR4016
7K5R2F-1-GP
7K5R2F-1-GP
1 2
PC4013
PC4013
SC56P50V2JN-2GP
SC56P50V2JN-2GP
AC_OK
PC4001
PC4001
PR4014
PR4014
1 2
12
SC1U25V5KX-1GP
SC1U25V5KX-1GP
PR4011
PR4011
1 2
Do Not Stuff
Do Not Stuff
BAT_SCL27,39
BAT_SDA27,39
4K7R2J-2-GP
4K7R2J-2-GP
12
PC4014
PC4014
SC1U10V3KX-3GP
SC1U10V3KX-3GP
4
AD+ total power R1 R2
65w 49.9k
187k
90w 121k
AD+_TO_SYS
AD+
K A
12
PWR_CHG_ACIN
CHG_AGND
ADD A 24V ZENAR
R2
1 2
PR4008
PR4008
49K9R2F-L-GP
49K9R2F-L-GP
CHG_AGND
PWR_CHG_DCIN
PWR_CHG_ACOK
PWR_CHG_VICM
PWR_CHG_FBO
PWR_CHG_EAI
PWR_CHG_EAO
PWR_CHG_REF
PWR_CHG_CE
CHG_AGND
22
DCIN
2
ACIN
11
VDDSMB
13
ACOK
10
SCL
9
SDA
14
NC#14
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
PWR_CHG_REF
12
R1
PWR_CHG_ICREF
1
ICREF
GND
29
49.9k
PR4007
PR4007
121KR2F-L-GP
121KR2F-L-GP
PC4002
PC4002
SCD1U50V3KX-GP
SCD1U50V3KX-GP
CHG_AGND
CSSP
CSSN
ICOUT
BOOT
VDDP
UGATE
PHASE
LGATE
PGND
CSOP
CSON
NC#16
VFB
PU4003
PU4003
BQ24745RHDR-GP
BQ24745RHDR-GP
74.24745.073
74.24745.073
PWR_CHG_CSSP
12
28
PWR_CHG_CSSN
27
PWR_CHG_ICOUT
26
PWR_CHG_BOOT
25
PWR_CHG_VDDP
21
PWR_CHG_UGATE
24
PWR_CHG_PHASE
23
PWR_CHG_LGATE
20
19
PWR_CHG_CSOP
18
PWR_CHG_CSON
17
16
15
3
AD+ total power
80w 49.9k137k
PR4004
PR4004
1 2
D01R3721F-GP-U
D01R3721F-GP-U
PG4001
PG4001
Do Not Stuff
Do Not Stuff
12
12
PC4003
PC4003
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PR4012
PR4012
1 2
Do Not Stuff
Do Not Stuff
BATT_SENSE 39
12
PC4015
PC4015
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
CHG_AGND
R1 R2
PG4002
PG4002
Do Not Stuff
Do Not Stuff
12
PC4004
PC4004
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
STOP_CHG#
STOP_CHG#27
CHG_AGND
83.R0203.08F
83.R0203.08F
2nd = 83.1R003.I8F
2nd = 83.1R003.I8F
PD4003
PD4003
K A
CH520S-30PT-GP
CH520S-30PT-GP
1 2
PC4017
PC4017
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4009
PC4009
PC4016
PC4016
SCD1U50V3KX-GP
SCD1U50V3KX-GP
STOP_CHG#
20100721
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
2
DCBATOUT
567
8
DDD
D
DDD
D
SI4178DY-T1-GE3-GP
SI4178DY-T1-GE3-GP
G
G
4
SSS
SSS
123
678
DDD
DDD
SI4134DY-T1-GE3-GP
SI4134DY-T1-GE3-GP
SSS
GD
SSS
GD
123
4 5
AD+
12
PR4005
PR4005
470KR2J-2-GP
470KR2J-2-GP
20101018
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
12
PC4005
PU4004
PU4004
84.04178.037
84.04178.037
2nd = 84.08884.037
2nd = 84.08884.037
PL4001
PL4001
IND-4D7UH-173-GP
IND-4D7UH-173-GP
68.4R71C.10K
68.4R71C.10K
2nd = 68.4R710.20D
2nd = 68.4R710.20D
PU4005
PU4005
84.04134.037
84.04134.037
2nd = 84.08878.037
2nd = 84.08878.037
PC4005
1 2
CHG_AGND
S
S
1
S
S
2
S
S
3
GD
GD
4 5
PU4002
PU4002
P1403EV8-GP
P1403EV8-GP
84.P1403.B37
84.P1403.B37
2ND = 84.04407.F37
2ND = 84.04407.F37
DCBATOUT
12
12
PC4025
PC4025
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DY
DY
BT+_R
1 2
D01R3721F-GP-U
D01R3721F-GP-U
PG4003
PG4003
Do Not Stuff
Do Not Stuff
12
PR4018
PR4018
1 2
Do Not Stuff
Do Not Stuff
D
D
8
D
D
7
D
D
6
PC4006
PC4006
Do Not Stuff
Do Not Stuff
PR4017
PR4017
1
BT+
PD4002
PD4002
SMF18AT1G-GP
SMF18AT1G-GP
A K
83.SMF18.0AH
83.SMF18.0AH
2ND = 83.SMF18.AAH
2ND = 83.SMF18.AAH
12
RFC4025
RFC4025
SC56P50V2JN-2GP
SC56P50V2JN-2GP
PC4018
PC4018
PC4019
PG4004
PG4004
Do Not Stuff
Do Not Stuff
12
PC4019
12
12
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
BT+
PC4024
PC4024
PC4023
PC4023
12
12
Do Not Stuff
Do Not Stuff
SC10U25V5KX-GP
SC10U25V5KX-GP
JE40 HR RF
12
RFC4024
RFC4024
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
PC4020
PC4020
12
SC10U25V5KX-GP
SC10U25V5KX-GP
-1M
12
RFC4023
RFC4023
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
BT+
PC4021
PC4021
12
SC10U25V5KX-GP
SC10U25V5KX-GP
PC4022
PC4022
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
RN4001
RN4001
1
3D3V_AUX_S5
A A
PWR_CHG_REF
5
4
SRN100KJ-6-GP
SRN100KJ-6-GP
PR4019
PR4019
10KR2F-2-GP
10KR2F-2-GP
23
12
PWR_CHG_CE
AC_OK
AC_OK 27
AC_OK to KBC
4
Do Not Stuff
Do Not Stuff
C433
C433
PWR_CHG_CE
DY
DY
12
-1M
G
D
PQ4002
PQ4002
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
S
3
CHG_ON#
CHG_ON# 27
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
CHARGER BQ24745
CHARGER BQ24745
CHARGER BQ24745
JE40-HR
JE40-HR
JE40-HR
40 102
40 102
40 102
1
-1
-1
of
of
of
-1
Page 41
A
3D3V_PWR3D3V_S5 5V_PWR 5V_S5
PG4109
PG4109
1 2
Do Not Stuff
Do Not Stuff
PG4110
PG4110
1 2
Do Not Stuff
Do Not Stuff
PG4111
PG4111
1 2
Do Not Stuff
Do Not Stuff
PG4112
PG4112
4 4
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PG4113
PG4113
PG4114
PG4114
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PG4101
PG4101
PG4102
PG4102
PG4103
PG4103
PG4104
PG4104
PWR_3D3V_DCBATOUTDCBATOUT
Do Not Stuff
Do Not Stuff
B
PWR_5V_ENTRIP1
12
PC4105
PC4105
DY
DY
SBcheck power team
12
PR4104
PR4104
110KR2F-GP
110KR2F-GP
PWR_3D3V_ENTRIP2
Do Not Stuff
Do Not Stuff
PC4106
PC4106
C
PWR_5V_DCBATOUTDCBATOUT
PG4105
PG4105
1 2
Do Not Stuff
12
12
PR4103
PR4103
118KR2F-1-GP
118KR2F-1-GP
DY
DY
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PG4106
PG4106
PG4107
PG4107
PG4108
PG4108
D
PG4115
PG4115
1 2
Do Not Stuff
Do Not Stuff
PG4116
PG4116
1 2
Do Not Stuff
Do Not Stuff
PG4117
PG4117
1 2
Do Not Stuff
Do Not Stuff
PG4118
PG4118
1 2
Do Not Stuff
Do Not Stuff
PG4119
PG4119
1 2
Do Not Stuff
Do Not Stuff
PG4120
PG4120
1 2
Do Not Stuff
Do Not Stuff
E
20100728
DCBATOUT
PU4103
PU4103
RT8223MGQW-GP-U1
RT8223MGQW-GP-U1
74.08223.A73
74.08223.A73
9
BOOT2
10
UGATE2
11
PHASE2
12
LGATE2
7
VOUT2
5
FB2
13
EN
6
ENTRIP2
3
REF
4
TONSEL
14
SKIPSEL
PG4122
PG4122
1 2
PC4125
PC4125
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
12
12
DY
DY
PWR_5V_FB1_R
12
DY
DY
PWR_5V_DCBATOUT
20100715
PC4111
PC4111
PC4114
PC4114
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PG4124
PG4124
PC4120
PC4120
Do Not Stuff
Do Not Stuff
12
12
3G_RF
3G_RF
12
PR4115
PR4115
33KR2F-2-GP
33KR2F-2-GP
12
PR4119
PR4119
21K5R2F-GP
21K5R2F-GP
12
5V_PWR
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4116
PC4116
12
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC4113
PC4113
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
12
16
VIN
PWR_5V_BOOT1
22
BOOT1
PWR_5V_UGATE1
21
UGATE1
PWR_5V_PHASE1
20
PHASE1
PWR_5V_LGATE1
19
LGATE1
PWR_5V_VOUT1
24
VOUT1
PWR_5V_FB1
2
FB1
23
PGOOD
PWR_5V_ENTRIP1
1
ENTRIP1
15
PGND
25
GND
PWR_5V3D3V_ENC
18
ENC
VREG3
VREG5
8
17
5V_AUX_S5
PG4123
PG4123
1 2
Do Not Stuff
Do Not Stuff
PWR_5V3D3V_VREG3
PWR_5V3D3V_VREG5
12
12
PC4126
PC4126
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
20100715
PR4106
PR4106
2D2R3-1-U-GP
2D2R3-1-U-GP
PWR_5V_BOOT1_1
1 2
3D3V_S5
12
PR4110
PR4110
DY
DY
Do Not Stuff
Do Not Stuff
PR4113
PR4113
Do Not Stuff
Do Not Stuff
1 2
TONSEL
GND
VREF
VREG3 or VREG5
SKIPSEL GNDVREG3 or VREG5
Operating
Mode
3V_5V_EN 36
200kHz
300kHz
400kHz
OOA Auto Skip Auto Skip
3V_5V_POK 19
CH2CH1
250kHz
375kHz
500kHz
VREF(2V)
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC4118
PC4118
20100721
567
8
DDD
D
DDD
D
D
PU4104
PU4104
SI4178DY-T1-GE3-GP
SI4178DY-T1-GE3-GP
84.04178.037
84.04178.037
2nd = 84.08884.037
2nd = 84.08884.037
G
G
4
SSS
SSS
PL4102
PL4102
123
G
S
IND-2D2UH-122-GP
678
DDD
DDD
GD
GD
4 5
IND-2D2UH-122-GP
68.2R21B.10J
68.2R21B.10J
2nd = 68.2R210.20B
2nd = 68.2R210.20B
D
DY
SSS
SSS
2 1
123
SG
Do Not Stuff
Do Not Stuff
1 2
PD4102 Do Not StuffDYPD4102 Do Not Stuff
PR4114
PR4114
Do Not Stuff
Do Not Stuff
PC4128
PC4128
Close to VFB Pin (pin2)
1 2
SI4134DY-T1-GE3-GP
SI4134DY-T1-GE3-GP
PU4105
PU4105
84.04134.037
84.04134.037
2nd = 84.08878.037
2nd = 84.08878.037
-1 EE modiyf PR4115 to 33K2 for SIV
PWM only
12
PC4129
PC4129
12
PC4112
PC4112
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PG4121
PG4121
12
PWR_3D3V_DCBATOUT
12
PC4110
PC4110
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PL4101
PL4101
IND-2D2UH-122-GP
IND-2D2UH-122-GP
68.2R21B.10J
68.2R21B.10J
2nd = 68.2R210.20B
2nd = 68.2R210.20B
PD4101 Do Not StuffDYPD4101 Do Not Stuff
Do Not Stuff
Do Not Stuff
20100715
12
12
RFC4134
RFC4134
RFC4133
RFC4133
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
3 3
Iomax=5A
OCP>7.5A
Matsuki cap 220uF
6.3V, ESR=17mohm
Do Not Stuff
Do Not Stuff
DY
DY
3D3V_PWR
PC4119
PC4119
SCD1U50V3KX-GP
SCD1U50V3KX-GP
RFC4135
RFC4135
12
3G_RF
3G_RF
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
PTC4101
PTC4101
SE220U6D3VM-21-GP
SE220U6D3VM-21-GP
77.52271.04L
77.52271.04L
20100723
12
12
PR4112
DY
DY
DY
DY
12
PR4112
Do Not Stuff
Do Not Stuff
PWR_3D3V_FB2_R
12
PC4124
PC4124
Do Not Stuff
Do Not Stuff
PR4111
PR4111
7K32R2B-GP
7K32R2B-GP
2 2
SB to -1 change 7K32
PR4116
PR4116
10KR2F-2-GP
10KR2F-2-GP
Close to VFB Pin (pin5)
12
DY
SI4178DY-T1-GE3-GP
SI4178DY-T1-GE3-GP
SI4134DY-T1-GE3-GP
SI4134DY-T1-GE3-GP
2 1
20100721
D
567
8
DDD
D
DDD
D
PU4101
PU4101
84.04178.037
84.04178.037
2nd = 84.08884.037
2nd = 84.08884.037
G
G
4
SSS
SSS
123
SG
D
678
DDD
DDD
PU4102
PU4102
84.04134.037
84.04134.037
2nd = 84.08878.037
2nd = 84.08878.037
SSS
GD
SSS
GD
123
4 5
S
G
3D3V_AUX_S5
PWR_5V3D3V_VREF
PWR_5V3D3V_VREF
3D3V_AUX_S5
2nd source
20100715
PC4115
PC4115
PWR_3D3V_BOOT1
12
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1 2
PR4109 Do Not Stuff
PR4109 Do Not Stuff
PWR_5V3D3V_VREF
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
PR4126
PR4126
12
DY
DY
Do Not Stuff
Do Not Stuff
PR4117
PR4117
DY
DY
Do Not Stuff
Do Not Stuff
PR4118
PR4118
Do Not Stuff
Do Not Stuff
PR4120
PR4120
DY
DY
Do Not Stuff
Do Not Stuff
PR4121
PR4121
Do Not Stuff
Do Not Stuff
PR4123
PR4123
DY
DY
Do Not Stuff
Do Not Stuff
ᝫآᖄԵ
PR4105
PR4105
2D2R3-1-U-GP
2D2R3-1-U-GP
1 2
PWR_3D3V_UGATE2
DY
DY
PC4122
PC4122
12
PWR_5V3D3V_TONSEL
PWR_5V3D3V_SKIPSEL
12
12
12
12
12
74.51123.073
PWR_3D3V_BOOT2
PWR_3D3V_PHASE2
PWR_3D3V_LGATE2
PWR_3D3V_VOUT2
PWR_3D3V_FB2
PWR_5V3D3V__EN0
PWR_3D3V_ENTRIP2
3D3V_AUX_S5
Do Not Stuff
Do Not Stuff
Iomax=6A
OCP>9A
PTC4102
PTC4102
SE220U6D3VM-21-GP
SE220U6D3VM-21-GP
77.52271.04L
77.52271.04L
Matsuki cap 220uF
6.3V, ESR=17mohm
20100715
DCBATOUT
12
PR4125
PR4125
100KR2F-L1-GP
100KR2F-L1-GP
12
PR4129
PR4129
750KR2F-GP
750KR2F-GP
RFC4131
RFC4131
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
PU4106
PU4106
2N7002DW-7F-GP
2N7002DW-7F-GP
5
6
12
JE40 HR RFJE40 HR RF
RFC4130
RFC4130
12
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
Vz=3.9V
PWR_5V3D3V__EN0
34
2
1
RFC4132
RFC4132
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
DCBATOUT
KA
12
12
PD4105
PD4105
MMPZ5228BPT-GP
MMPZ5228BPT-GP
PR4128
PR4128
4K02R2F-GP
4K02R2F-GP
PR4127
PR4127
6K98R2-GP
6K98R2-GP
1 1
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
5V/3D3V(RT8223M)
5V/3D3V(RT8223M)
5V/3D3V(RT8223M)
JE40-HR
JE40-HR
JE40-HR
E
41 102
41 102
41 102
-1
-1
-1
of
of
of
Page 42
5
12
PR4201
PR4201
8K06R2F-GP
8K06R2F-GP
UMA_Muxless
UMA_Muxless
D D
PR4202
PR4202
Do Not Stuff
Do Not Stuff
DY
DY
JE40 to KBC?
SB 20100908
TP8702Do Not StuffTP8702Do Not Stuff
C C
H_CPU_SVIDCLK8
ALL_POWER_OK
7,37,48
S0_PWR_GOOD19,27
TP8703Do Not StuffTP8703Do Not Stuff
1
UMA_Muxless
UMA_Muxless
21KR2F-GP
21KR2F-GP
VSS_AXG_SENSE
H_CPU_SVIDDAT8
VR_SVID_ALERT#8
PR4216 Do Not Stuff
PR4216 Do Not Stuff
PWR_VCCCORE_IMON
1
VSSSENSE8
1 2
PR4206
PR4206
1
1 2
1 2
UMA_Muxless
UMA_Muxless
PC4202
PC4202
1 2
SC39P50V2JN-1GP
SC39P50V2JN-1GP
UMA_Muxless
UMA_Muxless
PC4204
PC4204
1 2
SC150P50V2KX-GP
SC150P50V2KX-GP
PWR_GFXCORE_IMON
12
TP8705Do Not StuffTP8705Do Not Stuff
0R2J-2-GP
0R2J-2-GP
PR4215
PR4215
Do Not Stuff
Do Not Stuff
DY
DY
PR4218
PR4218
17K8R2F-GP
17K8R2F-GP
SCD047U25V2KX-GP
SCD047U25V2KX-GP
1 2
0R2J-2-GP
0R2J-2-GP
1 2
0R2J-2-GP
0R2J-2-GP
1 2
12
SB
-1M
B B
A A
Place near high side MOSFET of Phase1
DY
DY
1 2
PR4224 Do Not Stuff
PR4224 Do Not Stuff
PC4211
PC4211
DY
PWR_VCCCORE_ISEN3
Do Not Stuff
Do Not Stuff
VCCSENSE8
VSSSENSE8
DY
1 2
SC150P50V2KX-GP
SC150P50V2KX-GP
PWR_GFXCORE_VW
PC4201
PC4201
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
UMA_Muxless
UMA_Muxless
1 2
UMA_Muxless
UMA_Muxless
PR4204
PR4204
1 2
475KR2F-GP
475KR2F-GP
UMA_Muxless
UMA_Muxless
12
PC4205
PC4205
SCD015U25V2KX-GP
SCD015U25V2KX-GP
PR4208
PR4208
PR4212
PR4212
PR4214
PR4214
3D3V_S0
IMVP_PWRGD28,36
JE40 to TP?
PC4207
PC4207
PC4209
PC4209
1 2
DY
DY
PR4220
PR4220
1 2
3K83R2F-GP
3K83R2F-GP
12
PR4223
PR4223
8K06R2F-GP
8K06R2F-GP
PC4212
PC4212
1 2
SC39P50V2JN-1GP
SC39P50V2JN-1GP
1 2
PC4213
PC4213
UMA_Muxless
UMA_Muxless
PR4203
PR4203
1 2
422R2F-2-GP
422R2F-2-GP
UMA_Muxless
UMA_Muxless
PR4205
PR4205
1 2
2K49R2F-GP
2K49R2F-GP
1D05V_VTT
PC4206
PC4206
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PR4210
PR4210
12
12
PR4209
PR4209
130R2F-1-GP
130R2F-1-GP
PR4217 1K91R2F-1-GPPR4217 1K91R2F-1-GP
1 2
1D05V_VTT
12
H_PROCHOT#5,27
SC47P50V2JN-3GP
SC47P50V2JN-3GP
Do Not Stuff
Do Not Stuff
PR4221
PR4221
1 2
NTC-470K-9-GP
NTC-470K-9-GP
1 2
PR4222 27K4R2F-GPPR4222 27K4R2F-GP
PC4210
PC4210
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1 2
1 2
499R2F-2-GP
499R2F-2-GP
1 2
PR4226 316KR2F-GPPR4226 316KR2F-GP
PR4228
VCC_CORE
PR4228
Parallel
5
4
SB 20100908
1 2
Close to CPU
12
PR4211
PR4211
75R2F-2-GP
75R2F-2-GP
1K91R2F-1-GP
1K91R2F-1-GP
54D9R2F-L1-GP
54D9R2F-L1-GP
JE40 to TP?
TP8701Do Not StuffTP8701Do Not Stuff
PR4219
PR4219
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PC4208
PC4208
PR4225
PR4225
SC470P50V-2-GP
SC470P50V-2-GP
PR4227
PR4227
1 2
3K09R2F-1-GP
3K09R2F-1-GP
1 2
10R2F-L-GP
10R2F-L-GP
PR4229
PR4229
1 2
10R2F-L-GP
10R2F-L-GP
4
-1 20100921
SC220P50V2KX-3GP
SC220P50V2KX-3GP
PR4249
PR4249
12
UMA_Muxless
UMA_Muxless
12
PC4234
PC4234
2KR2F-3-GP
2KR2F-3-GP
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
PC4203
PC4203
1 2
SC680P50V2KX-2GP
SC680P50V2KX-2GP
3D3V_S0
12
PR4213
PR4213
UMA_Muxless
UMA_Muxless
1
PWR_VCCCORE_SDA
PWR_VCCCORE_ALERT#
PWR_VCCCORE_SCLK
PWR_VCCCORE_VRON
PWR_VCCCORE_PGD
PWR_VCCCORE_IMON
PWR_VCCCORE_NTC
PWR_VCCCORE_VW
12
PC4214
PC4214
1 2
1
2
3
4
5
6
7
8
9
10
11
12
PU4201
PU4201
ISL95831HRTZ-T-GP
ISL95831HRTZ-T-GP
74.95831.A73
74.95831.A73
PWR_VCCCORE_COMP
PWR_VCCCORE_FB
-1 20100921
PR4248
PR4248
1 2
1 2
2KR2F-3-GP
2KR2F-3-GP
SC560P50V2KX-2GP
SC560P50V2KX-2GP
PC4215
PC4215
PWR_VCCCORE_VSUM-
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
PC4216
PC4216
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
PC4217
PC4217
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
VWG
IMONG
PGOODG
SDA
ALERT#
SCLK
VR_ON
PGOOD
IMON
VR_HOT#
NTC
VW
1 2
1 2
1 2
PC4233
PC4233
49
GND
SB to -1 modify to 3K09
PC4218
PC4218
DY
DY
1 2
Do Not Stuff
Do Not Stuff
1 2
PC4219
PC4219
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
3
12
PC4222
PC4222
SCD068U10V2KX-1GP
SCD068U10V2KX-1GP
UMA_Muxless
UMA_Muxless
PR4232
PR4232
1 2
24K9R2F-L-GP
24K9R2F-L-GP
PWR_GFXCORE_COMP
PWR_GFXCORE_RTN
PWR_GFXCORE_VSEN
PWR_GFXCORE_FB
48
COMPG
COMP13FB14ISEN3/FB215ISEN216ISEN117VSEN18RTN19ISUMN20ISUMP21VDD22VIN23PROG1
PWR_GFXCORE_PROG2
PWR_GFXCORE_NTC
PWR_GFXCORE_ISN
PWR_GFXCORE_ISP
47
45
42
46
41
44
43
FBG
ISPG
ISNG
RTNG
NTCG
VSENG
PWR_VCCCORE_ISEN3
PWR_VCCCORE_ISEN2
PWR_VCCCORE_ISEN1
PWR_VCORE_ISUMN
12
PC4220
PC4220
SC330P50V2KX-3GP
SC330P50V2KX-3GP
Do Not Stuff
Do Not Stuff
40
39
38
PHG
UGG
PROG2
BOOTG
PWR_VCORE_VDD
PR4245
PR4245
1 2
1K3R2F-1-GP
1K3R2F-1-GP
1 2
DY
DY
PC4231
PC4231
3
PC4221
PC4221
DY
DY
1 2
Do Not Stuff
Do Not Stuff
1 2
PC4223
PC4223
UMA_Muxless
UMA_Muxless
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
PWR_GFXCORE_ISP 44
PWR_GFXCORE_ISN 44
-1M
PWR_GFXCORE_BOOT
PWR_GFXCORE_HG
PWR_GFXCORE_PH
PWR_GFXCORE_LG
37
LGG
36
BOOT2
35
UG2
34
PH2
33
VSSP2
32
LG2
PWR_VCORE_VDDP
31
VDDP
PWM3
VSSP1
BOOT1
24
PWR_VCORE_PRG1
PWR_VCORE_VIN
LG1
PH1
UG1
12
30
29
28
27
26
25
PC4227
PC4227
PWR_VCCCORE_PWR3_R
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SB 20100831
PC4229
PC4229
12
PR4246
PR4246
1 2
DY
DY
Do Not Stuff
Do Not Stuff
1 2
UMA_Muxless
UMA_Muxless
PR4231
PR4231
1 2
UMA_Muxless
UMA_Muxless
PWR_GFXCORE_BOOT 44
PWR_GFXCORE_HG 44
PWR_GFXCORE_PH 44
PWR_GFXCORE_LG 44
-1M
PR4239
PR4239
0R2J-2-GP
0R2J-2-GP
PR4240
PR4240
1 2
Do Not Stuff
Do Not Stuff
PR4241
PR4241
1 2
1R2F-GP
1R2F-GP
1
1
PC4228
PC4228
2
2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
PWR_VCCCORE_VSUM+
PC4230
PC4230
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
12
PWR_VCCCORE_VSUM-
VCC_GFXCORE
PR4230
PR4230
10R2F-L-GP
10R2F-L-GP
Parallel
10R2F-L-GP
10R2F-L-GP
PWR_VCCCORE_BOOT2 43
PWR_VCCCORE_HG2 43
PWR_VCCCORE_PH2 43
PWR_VCCCORE_LG2 43
PWR_VCCCORE_LG1 43
PWR_VCCCORE_PH1 43
PWR_VCCCORE_HG1 43
PWR_VCCCORE_BOOT1 43
PWR_DCBATOUT_VCCCORE
5V_S5
PR4243
PR4243
12
PR4242
PR4242
12
2K61R2F-1-GP
2K61R2F-1-GP
12
PR4244
PR4244
NTC-10K-27-GP
NTC-10K-27-GP
11KR2F-L-GP
11KR2F-L-GP
12
PC4232
PC4232
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
VCC_AXG_SENSE 9
VSS_AXG_SENSE 9
-1M
PC4224 Do Not Stuff
PC4224 Do Not Stuff
DY
DY
1 2
UMA_Muxless
UMA_Muxless
UMA_Muxless
PR4233
PR4233
1 2
NTC-470K-9-GP
NTC-470K-9-GP
PR4235
PR4235
27K4R2F-GP
1 2
27K4R2F-GP
PR4236
PR4236
0R2J-2-GP
0R2J-2-GP
NTC place near high side MOSFET of Phase1
UMA_Muxless
PR4234
PR4234
12
3K83R2F-GP
3K83R2F-GP
12
UMA_Muxless
UMA_Muxless
PWR_VCCCORE_PWM3 43
DY
DY
PR4237
PR4237
1 2
Do Not Stuff
Do Not Stuff
12
PC4225
PC4225
SC1U10V2KX-1GP
SC1U10V2KX-1GP
20100804
For Discrete only,
UMA need to DUMMY
PWR_VCCCORE_ISEN143
PWR_VCCCORE_ISEN243
PWR_VCCCORE_ISEN343
PWR_VCCCORE_VSUM+ 43
Place near choke of Phase1
HR UMA
HR UMA
HR UMA
PWR_VCCCORE_VSUM- 43
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
1
5V_S5
PR4247
PR4238
PR4238
0R2J-2-GP
0R2J-2-GP
1 2
12
PC4226
PC4226
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PWR_VCCCORE_ISEN1
PWR_VCCCORE_ISEN2
PWR_VCCCORE_ISEN3
CPU Core-1(ISL95831)
CPU Core-1(ISL95831)
CPU Core-1(ISL95831)
JE40-HR
JE40-HR
JE40-HR
PR4247
Do Not Stuff
Do Not Stuff
DIS
DIS
1 2
PWR_GFXCORE_ISN
-1M
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
42 102
42 102
42 102
1
-1
-1
of
of
of
-1
Page 43
5
4
3
2
1
PWR_DCBATOUT_VCCCORE
12
12
12
PC4313
SSS
SSS
123
SIR172DP-T1-GE3-GP
SIR172DP-T1-GE3-GP
SSS
SSS
123
PU4305
PU4305
84.00172.037
84.00172.037
2nd = 84.08030.037
2nd = 84.08030.037
SSS
SSS
123
PU4306
PU4306
SIR166DP-T1-GE3-GP
SIR166DP-T1-GE3-GP
84.00166.037
84.00166.037
2nd = 84.08028.037
2nd = 84.08028.037
SSS
SSS
123
PC4313
Do Not Stuff
Do Not Stuff
678
DDD
PU4309
PU4309
DDD
GD
GD
4 5
678
DDD
DDD
GD
GD
4 5
678
DDD
DDD
GD
GD
4 5
SIR172DP-T1-GE3-GP
SIR172DP-T1-GE3-GP
678
DDD
DDD
GD
GD
4 5
PR4314
PR4314
DCBATOUT PWR_DCBATOUT_VCCCORE
PG4305
PG4305
1 2
Do Not Stuff
Do Not Stuff
PG4306
PG4306
1 2
Do Not Stuff
Do Not Stuff
PG4307
DCBATOUT
DY
DY
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
12
PTC4306
PTC4306
SE47U25VM-11-GP
SE47U25VM-11-GP
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
12
PTC4307
PTC4307
Do Not Stuff
Do Not Stuff
PG4307
PG4308
PG4308
PG4309
PG4309
PG4310
PG4310
PWR_DCBATOUT_VCCCORE
PG4311
PG4311
PG4312
PG4312
PG4313
PG4313
PG4314
PG4314
PG4315
PG4315
PG4316
PG4316
D D
C C
B B
PWR_VCCCORE_BOOT142
PWR_VCCCORE_HG142
PWR_VCCCORE_PH142
PWR_VCCCORE_LG142
PWR_VCCCORE_BOOT242
PWR_VCCCORE_HG242
PWR_VCCCORE_PH242
PWR_VCCCORE_LG242
PWR_VCCCORE_BOOT1_1
1 2
2D2R3-1-U-GP
2D2R3-1-U-GP
SCD22U25V3KX-GP
SCD22U25V3KX-GP
84.00172.037
SIR172DP-T1-GE3
Id=20A, Qg=9.8~15nC,
Rdson=10.3~12.4mohm
PR4308
PR4308
PWR_VCCCORE_BOOT2_1
1 2
2D2R3-1-U-GP
2D2R3-1-U-GP
SCD22U25V3KX-GP
SCD22U25V3KX-GP
84.00164.037
SIR164DP-T1-GE3
Id=22.8A,Qg=40.6~61nc,
Rdson=2.6~3.2mohm
2nd = 84.08030.037
2nd = 84.08030.037
12
PC4318
PC4318
SIR166DP-T1-GE3-GP
SIR166DP-T1-GE3-GP
2nd = 84.08028.037
2nd = 84.08028.037
PC4312
PC4312
PU4308
PU4308
84.00172.037
84.00172.037
84.00166.037
84.00166.037
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
PG4317
PG4317
PWR_VCCCORE_VSUM+_1
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PC4314
PC4314
PC4315
PC4315
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
PL4303
PL4303
L-D36UH-1-GP
L-D36UH-1-GP
68.R3610.20A
68.R3610.20A
2nd = 68.R3610.10M
2nd = 68.R3610.10M
12
PC4308
PC4308
PL4302
PL4302
L-D36UH-1-GP
L-D36UH-1-GP
68.R3610.20A
68.R3610.20A
2nd = 68.R3610.10M
2nd = 68.R3610.10M
PG4303
PG4303
1 2
PWR_VCCCORE_VSUM+_2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
PWR_VCCCORE_VSUM-_1
PWR_DCBATOUT_VCCCORE
1 2
PG4304
PG4304
Do Not Stuff
Do Not Stuff
12
PC4316
PC4316
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PG4318
PG4318
Do Not Stuff
Do Not Stuff
PR4315
PR4315
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PR4316
PR4316
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PR4317
PR4317
1 2
1R2F-GP
1R2F-GP
PR4318
PR4318
10KR2F-2-GP
10KR2F-2-GP
PR4319
PR4319
3K65R2F-1-GP
3K65R2F-1-GP
12
PC4310
PC4310
1 2
Do Not Stuff
Do Not Stuff
PWR_VCCCORE_VSUM-_2
12
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
Non_NEC
Non_NEC
12
Non_NEC
Non_NEC
DY
DY
DY
DY
SB 20100908
12
PTC4301
PTC4301
SE470UF2VDM-GP
SE470UF2VDM-GP
Non_NEC
Non_NEC
PC4311
PC4311
68.R3610.20A
0.36uH, Idc=24A
DCR=1.1 mohm
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
12
PR4309
PR4309
1 2
Do Not Stuff
Do Not Stuff
PR4310
PR4310
1 2
Do Not Stuff
Do Not Stuff
PR4311
PR4311
1 2
1R2F-GP
1R2F-GP
PR4312
PR4312
12
10KR2F-2-GP
10KR2F-2-GP
PR4313
PR4313
12
3K65R2F-1-GP
3K65R2F-1-GP
12
12
PTC4302
PTC4302
SE470UF2VDM-GP
SE470UF2VDM-GP
Non_NEC
Non_NEC
PWR_VCCCORE_ISEN2 42
PWR_VCCCORE_ISEN3 42
PWR_VCCCORE_VSUM- 42
PWR_VCCCORE_ISEN1 42
PWR_VCCCORE_VSUM+ 42
SB 20100910
12
PTC4303
PTC4303
PTC4304
PTC4304
SE470UF2VDM-GP
SE470UF2VDM-GP
Do Not Stuff
Do Not Stuff
DY
DY
VCC_CORE
PTC4308
PTC4308
SE470UF2VDM-GP
SE470UF2VDM-GP
Non_NEC
Non_NEC
VCC_CORE
JE40 HR RF
12
12
RFC4320
RFC4320
RFC4319
RFC4319
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
12
3 4
RFC4322
RFC4322
12
12
RFC4327
RFC4327
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
12
PTC4305
PTC4305
SE470UF2VDM-GP
SE470UF2VDM-GP
PWR_VCCCORE_ISEN1 42
PWR_VCCCORE_ISEN3 42
PWR_VCCCORE_VSUM- 42
PWR_VCCCORE_ISEN2 42
PWR_VCCCORE_VSUM+ 42
12
RFC4321
RFC4321
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
PTC4309
PTC4309
NEC
NEC
Do Not Stuff
Do Not Stuff
JE40 HR RF
12
RFC4323
RFC4323
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
20100804
79.47719.2BL
Pana 470u , 2V
ESR=6mȍ, Iripple=3.5A
Vcc_core
Iomax=53A
OCP>97.5A
5V_S5
PC4301
PC4301
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DCBATOUT PWR_DCBATOUT_VCCCORE
PG4319
PG4319
1 2
Do Not Stuff
Do Not Stuff
PG4320
PG4320
1 2
Do Not Stuff
Do Not Stuff
PG4321
PG4321
1 2
Do Not Stuff
Do Not Stuff
PG4322
PG4322
1 2
Do Not Stuff
Do Not Stuff
PG4323
PG4323
1 2
Do Not Stuff
Do Not Stuff
PG4324
PG4324
A A
1 2
Do Not Stuff
Do Not Stuff
PWR_VCCCORE_PWM342
5
0R2J-2-GP
0R2J-2-GP
PR4301
PR4301
1 2
PWR_VCCCORE_BOOT3
12
5
1
VCC
BOOT
2
PWM
PHASE
UGATE
FCCM
GND
GND
3
9
LGATE
PU4302
PU4302
ISL6208CRZ-TGP-U
ISL6208CRZ-TGP-U
74.06208.073
74.06208.073
6
20100728
PWR_VCCCORE_PH3
7
PWR_VCCCORE_HG3
8
PWR_VCCCORE_LG3
4
PR4302
PR4302
1 2
2D2R3-1-U-GP
2D2R3-1-U-GP
PWR_VCCCORE_BOOT3_1
PC4302
PC4302
SCD22U25V3KX-GP
SCD22U25V3KX-GP
4
12
2nd = 84.08030.037
2nd = 84.08030.037
20100728
PWR_VCCCORE_HG3
2nd = 84.08028.037
2nd = 84.08028.037
PU4304
PU4304
84.00172.037
84.00172.037
PU4303
PU4303
SIR166DP-T1-GE3-GP
SIR166DP-T1-GE3-GP
84.00166.037
84.00166.037
12
PC4303
PC4303
678
DDD
DDD
SSS
GD
SSS
GD
123
4 5
GD
GD
4 5
678
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SIR172DP-T1-GE3-GP
SIR172DP-T1-GE3-GP
DDD
DDD
SSS
SSS
123
PWR_DCBATOUT_VCCCORE
12
PC4305
PC4305
1 2
PG4301
PG4301
1 2
PWR_VCCCORE_VSUM+_3PWR_VCCCORE_VSUM+_3
PL4301
PL4301
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
L-D36UH-1-GP
L-D36UH-1-GP
68.R3610.20A
68.R3610.20A
2nd = 68.R3610.10M
2nd = 68.R3610.10M
PG4302
PG4302
Do Not Stuff
Do Not Stuff
3
12
PC4306
PC4306
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
Do Not Stuff
Do Not Stuff
PR4303
PR4303
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PR4304
PR4304
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PR4305
PWR_VCCCORE_VSUM-_3
PR4305
1 2
1R2F-GP
1R2F-GP
PR4306
PR4306
10KR2F-2-GP
10KR2F-2-GP
PR4307
PR4307
3K65R2F-1-GP
3K65R2F-1-GP
VCC_CORE
PWR_VCCCORE_ISEN1 42
PWR_VCCCORE_ISEN2 42
12
12
PWR_VCCCORE_VSUM- 42
PWR_VCCCORE_ISEN3 42
PWR_VCCCORE_VSUM+ 42
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
CPU Core-2(ISL95831)
CPU Core-2(ISL95831)
CPU Core-2(ISL95831)
JE40-HR
JE40-HR
JE40-HR
1
43 102
43 102
43 102
of
of
of
-1
-1
-1
Page 44
5
PWR_DCBATOUT_GFXCOREDCBATOUT
PG4403
PG4403
1 2
Do Not Stuff
Do Not Stuff
PG4404
PG4404
1 2
Do Not Stuff
Do Not Stuff
PG4405
PG4405
D D
C C
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
12
PTC4404
PTC4404
SE47U25VM-11-GP
SE47U25VM-11-GP
PG4406
PG4406
PG4407
PG4407
PG4408
PG4408
PG4409
PG4409
UMA_Muxless
UMA_Muxless
PR4401
PR4401
PWR_GFXCORE_BOOT42
PWR_GFXCORE_HG42
PWR_GFXCORE_PH42
PWR_GFXCORE_LG42
1 2
1R3J-L1-GP
1R3J-L1-GP
PWR_GFXCORE_BOOT_1
SCD22U25V3KX-GP
SCD22U25V3KX-GP
UMA_Muxless
UMA_Muxless
4
84.00172.037
SIR172DP-T1-GE3
Id=20A, Qg=9.8~15nC,
Rdson=10.3~12.4mohm
PU4401
PU4401
84.00172.037
84.00172.037
2nd = 84.08030.037
2nd = 84.08030.037
UMA_Muxless
UMA_Muxless
12
PC4407
PC4407
PU4403
SIR166DP-T1-GE3-GP
SIR166DP-T1-GE3-GP
2nd = 84.08028.037
2nd = 84.08028.037
PU4403
84.00166.037
84.00166.037
UMA_Muxless
UMA_Muxless
678
DDD
DDD
GD
GD
4 5
678
DDD
DDD
GD
GD
4 5
SSS
SSS
123
SIR172DP-T1-GE3-GP
SIR172DP-T1-GE3-GP
SSS
SSS
123
UMA_Muxless
UMA_Muxless
PG4401
PG4401
12
PC4401
PC4401
UMA_Muxless
UMA_Muxless
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SB 20100908
1 2
IND-D36UH-9-GP
IND-D36UH-9-GP
1 2
3
PWR_DCBATOUT_GFXCORE
12
12
PC4402
PC4402
UMA_Muxless
UMA_Muxless
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
PL4401
PL4401
PG4402
PG4402
Do Not Stuff
Do Not Stuff
12
PC4403
PC4403
PC4404
PC4404
DY
DY
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
UMA_Muxless
UMA_Muxless
1 2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
20100721
68.R3610.20K
0.36uH, Idc=24A
DCR=0.76+/-5% mohm
2
UMA_Muxless
UMA_Muxless
20100721
VCC_GFXCORE
Iomax=12A
OCP>18A
PTC4401
PTC4401
SE330U2VDM-L-GP
SE330U2VDM-L-GP
79.33719.L01
79.33719.L01
UMA_Muxless
UMA_Muxless
1
JE40 HR RF
RFC4413
RFC4413
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
UMA_Muxless
UMA_Muxless
12
12
PTC4402
PTC4402
SE330U2VDM-L-GP
SE330U2VDM-L-GP
79.33719.L01
79.33719.L01
UMA_Muxless
UMA_Muxless
12
RFC4414
RFC4414
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
VCC_GFXCORE
12
RFC4412
RFC4412
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
UMA_Muxless
UMA_Muxless
79.33719.2CL
Pana 330uF, 2.5V, 7343
ESR=9mȍ, Iripple=3A
B B
A A
5
84.00164.037
SIR164DP-T1-GE3
Id=22.8A,Qg=40.6~61nc,
Rdson=2.6~3.2mohm
4
PWR_GFXCORE_ISP_R
3
PWR_GFXCORE_ISN_R
UMA_Muxless
UMA_Muxless
UMA_Muxless
UMA_Muxless
PR4408
PR4408
12
10KR2F-2-GP
10KR2F-2-GP
UMA_Muxless
UMA_Muxless
Place near choke
UMA_Muxless
UMA_Muxless
PR4403
PR4403
1 2
1R2F-GP
1R2F-GP
PR4405
PR4405
7K5R2F-1-GP
7K5R2F-1-GP
12
12
PR4407
PR4407
NTC-10K-27-GP
NTC-10K-27-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
PR4406
PR4406
UMA_Muxless
UMA_Muxless
11KR2F-L-GP
11KR2F-L-GP
SB 20100831
12
PC4409
PC4409
UMA_Muxless
UMA_Muxless
PC4410
PC4410
12
12
SCD068U16V2KX-GP
SCD068U16V2KX-GP
UMA_Muxless
UMA_Muxless
PC4408
PC4408
DY
DY
Do Not Stuff
Do Not Stuff
1 2
649R2F-GP
PC4411
PC4411
649R2F-GP
UMA_Muxless
UMA_Muxless
SCD022U25V2KX-GP
SCD022U25V2KX-GP
UMA_Muxless
UMA_Muxless
2
12
PR4404
PR4404
PR4402
PR4402
DY
DY
1 2
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
20100906
PWR_GFXCORE_ISN 42
PWR_GFXCORE_ISP 42
CPU Core-3(ISL95831)
CPU Core-3(ISL95831)
CPU Core-3(ISL95831)
JE40-HR
JE40-HR
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
JE40-HR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
44 102
44 102
44 102
1
-1
-1
of
of
of
-1
Page 45
5
4
3
2
1
1D05V_VTT 1D05V_VTT
DCBATOUT PWR_DCBATOUT_1D05V
D D
C C
B B
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
PTC4501
PTC4501
Do Not Stuff
Do Not Stuff
RUNPWROK46,47
PG4501
PG4501
1 2
PG4502
PG4502
1 2
PG4503
PG4503
1 2
PG4504
PG4504
1 2
TPS51218D for 1D05V
PWR_DCBATOUT_1D05V
JE40 HR RF
12
DY
DY
RFC4512
RFC4512
12
RFC4513
RFC4513
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
12
RFC4514
RFC4514
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
PWR_DCBATOUT_1D05V
12
PC4504
PC4504
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
12
20100728
D
567
8
DDD
D
DDD
D
RMW150N03FUB-GP-U
G
G
G
G
567
DDD
DDD
RMW150N03FUB-GP-U
SSS
SSS
123
8
123
Mag. 0.56uH 10*10*4
S
DCR=1.6~1.8mohm
Idc=25A, Isat=40A
1 2
PL4501
PL4501
IND-D56UH-27-GP
IND-D56UH-27-GP
68.R5610.10P
68.R5610.10P
2nd = 68.R5610.20H
2nd = 68.R5610.20H
D
D
D
RMW180N03FUBTB-GP
RMW180N03FUBTB-GP
SSS
SSS
VTT_SENSE_L
Id=12.9A
Qg=9.8~15nC
Rdson=10.3~12.4mohm
2nd source
PR4516
PR4516
PC4505
PC4505
12
PR4504
PR4504
1 2
82KR2F-1-GP
82KR2F-1-GP
3D3V_S0
1.05VTT_PWRGD37,48
1 2
PR4512
PR4512
0R2J-2-GP
0R2J-2-GP
10KR2J-3-GP
10KR2J-3-GP
12
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
ᝫآᖄԵ
SB 20100831
PWR_1D05V_IMAX
PWR_1D05V_EN
PWR_1D05V_VFB PWR_1D05V_PHASE
PWR_1D05V_CCM
12
PR4503
PR4503
470KR2F-GP
470KR2F-GP
74.08237.073
PU4501
PU4501
TPS51218DSCR-GP-U1
TPS51218DSCR-GP-U1
74.51218.073
74.51218.073
1
2
3
4
5
PGOOD
TRIP
EN
VFB
RF
GND
VBST
DRVH
V5IN
DRVL
SW
11
10
9
8
7
6
PWR_1D05V_UGATE
PWR_1D05V_LGATE
Freq=360KHz
PR4505
PR4505
2D2R3-1-U-GP
2D2R3-1-U-GP
1 2
5V_S5
PC4503
PC4503
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PWR_1D05V_BOOT_RPWR_1D05V_BOOT
1 2
PU4502
PU4502
84.15N03.037
84.15N03.037
2nd = 84.08065.037
2nd = 84.08065.037
PU4503
PU4503
84.18003.037
84.18003.037
2nd = 84.08062.037
2nd = 84.08062.037
4
G
4
GS
20100728
Id=19.4A
Qg=16.8~25.5nC
Rdson=4.9~6.1mohm
PWR_1D05V_VFB
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
PC4506
PC4506
PC4507
PC4507
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
20100906
PR4506
PR4506
10R2F-L-GP
10R2F-L-GP
PR4507
PR4507
10KR2F-2-GP
10KR2F-2-GP
PR4508
PR4508
20KR2F-L-GP
20KR2F-L-GP
1D05V_PWR
PG4513
PG4513
1 2
PG4514
PG4514
1 2
PG4515
PG4515
1 2
PG4516
PG4516
1 2
PG4517
PG4517
1 2
PG4518
PG4518
1 2
PG4519
PG4519
1 2
PG4520
PG4520
1 2
12
PC4511
PC4511
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
PC4508
12
12
12
PC4508
DY
DY
PTC4502
PTC4502
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 77.C3371.051
2nd = 77.C3371.051
PG4505
PG4505
1 2
Do Not Stuff
Do Not Stuff
PG4506
PG4506
1 2
Do Not Stuff
Do Not Stuff
PG4507
PG4507
1 2
Do Not Stuff
Do Not Stuff
PG4508
PG4508
1 2
Do Not Stuff
Do Not Stuff
PG4510
PG4510
1 2
Do Not Stuff
Do Not Stuff
PG4509
PG4509
1 2
Do Not Stuff
Do Not Stuff
PG4511
PG4511
1 2
Do Not Stuff
Do Not Stuff
PG4512
PG4512
1 2
Do Not Stuff
Do Not Stuff
20100728
Iomax=14A
OCP>21A
1D05V_PWR
12
DY
DY
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4509
PC4509
12
12
3G_RF
3G_RF
PTC4503
PTC4503
SE330U2VDM-L-GP
SE330U2VDM-L-GP
79.33719.L01
79.33719.L01
2nd = 77.C3371.051
2nd = 77.C3371.051
VTT_SENSE_L
VSS_SENSE_L
A A
5
4
1 2
DY
DY
PR4510 Do Not Stuff
PR4510 Do Not Stuff
12
PC4510
PC4510
DY
DY
Do Not Stuff
Do Not Stuff
1 2
DY
DY
PR4511 Do Not Stuff
PR4511 Do Not Stuff
VCCIO_SENSE 8
VSSIO_SENSE 8
3
20100728
Vout=0.704*(1+R1/R2)
2
VSS_SENSE_L
PR4509
PR4509
10R2F-L-GP
10R2F-L-GP
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2010072820100728
12
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DC to DC_1D05V(TPS51218D)
DC to DC_1D05V(TPS51218D)
DC to DC_1D05V(TPS51218D)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
45 102
45 102
45 102
-1
-1
-1
Page 46
5
4
3
2
1
SSID = PWR.Plane.Regulator_1p5v0p75v
DCBATOUT PWR_DCBATOUT_1D5V
PG4601
PG4601
1 2
Do Not Stuff
Do Not Stuff
PG4602
PG4602
1 2
Do Not Stuff
D D
C C
B B
Do Not Stuff
PG4603
PG4603
1 2
Do Not Stuff
Do Not Stuff
PG4604
PG4604
1 2
Do Not Stuff
Do Not Stuff
12
PTC4601
PTC4601
Do Not Stuff
Do Not Stuff
PM_SLP_S4#19,27
DY
DY
1 2
PR4612 Do Not StuffPR4612 Do Not Stuff
Close to pin23
PWR_1D5V_EN
12
PC4612
PC4612
Do Not Stuff
Do Not Stuff
DY
DY
1D5V_S3
Close to pin23
RUNPWROK45,47
PWR_DCBATOUT_1D5V
PG4605
PG4605
1 2
Do Not Stuff
Do Not Stuff
PG4606
PG4606
1 2
Do Not Stuff
Do Not Stuff
1D5V_S3
20100728
Iomax=1A
OCP>1.5A
20100728
PG4607
PG4607
1 2
Do Not Stuff
Do Not Stuff
3D3V_S5
PR4610
PR4610
1 2
620KR2F-GP
620KR2F-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DDR_VREF_PWR
12
PR4602
PR4602
10KR2F-2-GP
10KR2F-2-GP
PWR_1D5V_TON
PWR_1D5V_EN
PWR_0D75V_EN
PWR_1D5V_VTTIN
12
PC4603
PC4603
PWR_1D5V_VDDQ
PWR_1D5V_VCC5
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12
PC4602
PC4602
PWR_1D5V_CS
Close to output cap pin1, not
inside of the output cap
2nd source
+0.75VS
20100805
RT8207L for 1D5V
PR4604
PR4604
12
PR4605
PR4605
1 2
Do Not Stuff
Do Not Stuff
C694
C694
SC1U10V2KX-1GP
SC1U10V2KX-1GP
5V_S5
DDR_VREF_S3
5V_S5
-1 PR4608
SB 20100831
12
PR4603
PR4603
12K4R2F-GP
12K4R2F-GP
16
14
CS
PGOOD
TON
S5
S3
VLDOIN
NC#7
VTTGND
MODE
VTT
VTTSNS
GND
25
VDD
GND
3
13
12
11
10
23
7
1
4
24
2
ᝫآᖄԵ
PWR_1D5V_VTTREF
12
PC4606
PC4606
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PWR_1D5V_VDDP
15
VDDP
22
BOOT
21
UGATE
20
PHASE
19
LGATE
18
PGND
17
NC#17
PWR_1D5V_VDDQ
8
VDDQ
PWR_1D5V_FB
9
FB
6
DEM
VTTREF
PU4601
PU4601
RT8207LGQW-GP-U1
RT8207LGQW-GP-U1
5
74.08207.B73
74.08207.B73
74.51116.073
PR4607
PR4607
1 2
Do Not Stuff
Do Not Stuff
12
PC4608
PC4608
SCD033U16V2KX-GP
SCD033U16V2KX-GP
5D1R2F-GP
5D1R2F-GP
12
PWR_1D5V_UGATE
PWR_1D5V_PHASE
PWR_1D5V_LGATE
5V_S5
20100728
Id=12.9A
Qg=9.8~15nC
Rdson=10.3~12.4mohm
SB
PR4606
PR4606
12
PR4608
PR4608
33KR2F-GP
33KR2F-GP
12
PR4609
PR4609
30KR2F-GP
30KR2F-GP
PWR_1D5V_PHASE_LPWR_1D5V_BOOT
1 2
2D2R3-1-U-GP
2D2R3-1-U-GP
R1
R2
Close to PIN9
PWR_DCBATOUT_1D5V
JE40 HR RF
12
RFC4617
RFC4617
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
PC4609
PC4609
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
Ꮑലࠐຟޏ
12
DY
DY
PC4610
PC4610
Do Not Stuff
Do Not Stuff
SB R4608 chekc
Vout
12
RFC4618
RFC4618
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
84.15N03.037
84.15N03.037
2nd = 84.08065.037
2nd = 84.08065.037
84.18003.037
84.18003.037
2nd = 84.08062.037
2nd = 84.08062.037
32k4
Ꮑ٦
RFC4616
RFC4616
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
PWR_DCBATOUT_1D5V
567
8
DDD
D
DDD
PU4602
PU4602
D
G
G
4
SSS
SSS
123
GS
567
8
DDD
D
DDD
PU4603
PU4603
Ⴏ
D
G
G
4
SSS
SSS
123
GS
20100728
Id=19.4A
Qg=16.8~25.5nC
Rdson=4.9~6.1mohm
ଥޏ
1.55V
אՂ
PC4614
PC4614
PC4611
PC4611
12
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
D
RMW150N03FUB-GP-U
RMW150N03FUB-GP-U
Mag. 1.0uH 10*10*4
DCR=2.9~3.3mohm
Idc=18A, Isat=36A
1 2
PL4601
PL4601
IND-1UH-93-GP
IND-1UH-93-GP
68.1R01B.10J
68.1R01B.10J
D
2nd = 68.1R01C.10Q
2nd = 68.1R01C.10Q
RMW180N03FUBTB-GP
RMW180N03FUBTB-GP
31K6R
20100906
PC4616
PC4616
PC4617
PC4617
PC4615
DY
DY
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
12
PC4613
PC4613
PC4615
12
SCD1U25V3KX-GP
SCD1U25V3KX-GP
Iomax=12A
OCP>20A
1D5V_S3
12
Do Not Stuff
Do Not Stuff
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
Vout=0.75*(1+R1/R2)
PTC4602
PTC4602
SE390U2D5VM-7GP
SE390U2D5VM-7GP
79.3971V.30L
79.3971V.30L
2nd = 79.3971V.6AL
2nd = 79.3971V.6AL
Matsuki cap 390uF
2.5V, ESR=10mohm
Iomax: 1.2A
PR4615
PG4608
PG4608
1 2
Do Not Stuff
Do Not Stuff
PG4609
PG4609
1 2
Do Not Stuff
Do Not Stuff
A A
5
12
PC4604
PC4604
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
PC4605
PC4605
DDR_VREF_PWR0D75V_S0
Do Not Stuff
Do Not Stuff
DY
DY
4
0D75V_EN37
PR4615
1 2
Do Not Stuff
Do Not Stuff
3
PWR_0D75V_EN
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
TPS5111
TPS5111
TPS5111
JE40-HR
JE40-HR
JE40-HR
Taipei Hsien 221, Taiwan, R.O.C.
of
46 102
of
46 102
of
46 102
1
-1
-1
-1
Page 47
5
4
SSID = PWR.Plane.Regulator_1p8v
3
2
1
D D
C C
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SB add PR4706 PC4707
PR4706
PR4706
PM_SLP_S3#19,27,36,37,92
B B
1 2
Do Not Stuff
Do Not Stuff
DY
DY
RT9025 for 1D8V_S0
12
PC4707
PC4707
Do Not Stuff
Do Not Stuff
3D3V_S0
PC4701
PC4701
PWR_1D8V_EN
RUNPWROK45,46
12
5V_S5
PC4702
PC4702
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
3
2
1
PU4701
PU4701
RT9025-25PSP-GP
RT9025-25PSP-GP
74.09025.03D
74.09025.03D
2nd = 74.09661.07D
2nd = 74.09661.07D
3rd = 74.00105.03D
3rd = 74.00105.03D
12
9
VDD4NC#5
GND
VIN
EN
PGOOD
VOUT
ADJ
GND
Iomax>1A
OCP>2A
PG4701
PG4701
Vo(cal.)=1.812V
5
6
7
8
PWR_1D8V_ADJ
12
PR4704
PR4704
20K5R2F-GP
20K5R2F-GP
12
PR4705
PR4705
16K2R2F-GP
16K2R2F-GP
12
PC4704
PC4704
DY
DY
Do Not Stuff
Do Not Stuff
1D8V_LDO 1D8V_S0
12
PC4705
PC4705
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
PC4706
PC4706
DY
DY
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PG4702
PG4702
1 2
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
LDO_1D8V(RT9025)
LDO_1D8V(RT9025)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
LDO_1D8V(RT9025)
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
47 102
47 102
47 102
of
of
of
1
-1
Page 48
5
4
3
2
1
APL5916 for VCCSA
1D05V_VTT
PG4801
PC4802
PC4802
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
R2
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PC4803
PC4803
12
12
12
Do Not Stuff
Do Not Stuff
PG4801
PG4802
PG4802
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PR4806
PR4806
DY
DY
12
12
PC4804
PC4804
SC100P50V2JN-3GP
SC100P50V2JN-3GP
VCCSA_PWR
12
PC4805
PC4805
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
Iomax=6A
OCP>9A
VCCSA=0.85V
12
PC4806
PC4806
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
PTC4801
PTC4801
DY
DY
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
PG4803
PG4803
PG4804
PG4804
PG4805
PG4805
PG4806
PG4806
PG4807
PG4807
PG4808
PG4808
0D85V_S0
D D
20100614 V1.1
for CRB board
3D3V_S0
12
R4807
SB modify 2K2 for no run code
ALL_POWER_OK27,37,42
1.05VTT_PWRGD37,45
C C
R4807
2K2R2J-2-GP
2K2R2J-2-GP
Do Not Stuff
Do Not Stuff
DY
DY
PC4809
PC4809
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
5V_S5
12
PC4801
PC4801
7
POK
8
EN
U4801
U4801
APL5916KAI-TRL-GP
APL5916KAI-TRL-GP
74.05916.031
74.05916.031
6
VCNTL
GND
1
VOUT
VOUT
5
VIN
9
VIN
3
4
2
FB
PWR_VCCSA_VIN
12
R1
PR4804
PR4804
10KR2F-2-GP
10KR2F-2-GP
PWR_VCCSA_FB
PR4805
PR4805
150KR2F-L-GP
150KR2F-L-GP
DS
DY
DY
G
PWR_VCCSA_SEL0
3
PWR_VCCSA_SEL1
12
DY
DY
PC4807
PC4807
Do Not Stuff
Do Not Stuff
DY
DY
PR4807
PR4807
1 2
Do Not Stuff
Do Not Stuff
VCCSA_SEL 9
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
LDO_VCCSA(APL5916)
LDO_VCCSA(APL5916)
LDO_VCCSA(APL5916)
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
48 102
48 102
48 102
-1
-1
-1
PQ4801
Vout=0.8*(1+R1/R2)
PQ4801
Do Not Stuff
Do Not Stuff
VCCSA_SEL VCCSA_PWR
L
B B
A A
5
H
0.9V
0.8V
4
Page 49
SSID = VIDEO
LVDS CONNECTOR
DCBATOUT_LCD
31
NP1
NP2
32
LCD1
LCD1
PS-CON30-GP
PS-CON30-GP
20.F1816.030
20.F1816.030
1
2
3
4
5
DBC_EN_C
6
BLON_OUT_C
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
LCD_BRIGHTNESS
USB_CAMERA#
USB_CAMERA
1
33R2J-2-GP
33R2J-2-GP
3D3V_CAMERA_S0
1 2
R4908 Do Not StuffR4908 Do Not Stuff
1 2
R4909 Do Not StuffR4909 Do Not Stuff
12
C4901
C4901
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP4901Do Not StuffTP4901Do Not Stuff
12
R4902
R4902
3D3V_S0
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
USB_PN12 18
USB_PP12 18
For Camera GND
LVDSA_CLK_R 94
LVDSA_CLK_R# 94
LVDSA_DATA2_R 94
LVDSA_DATA2_R# 94
LVDSA_DATA1_R 94
LVDSA_DATA1_R# 94
LVDSA_DATA0_R 94
LVDSA_DATA0_R# 94
LVDS_DDC_DATA 94
LVDS_DDC_CLK 94
LCDVDD
C4902
C4902
LBKLT_CTL 94
INVERTER POWER
F4901
F4901
POLYSW-1D1A24V-GP-U
DCBATOUT_LCD
12
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
INT_MIC_L_R 29,97
12
Analogy
EC4906
EC4906
Microphone 0719
DY
DY
Do Not Stuff
Do Not Stuff
12
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C4906
C4906
C4904
C4904
F4902
F4902
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
69.50007.691
69.50007.691
2ND = 69.50007.771
2ND = 69.50007.771
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
Camera Power
12
EC4903
EC4903
Do Not Stuff
Do Not Stuff
DY
DY
POLYSW-1D1A24V-GP-U
69.50007.A31
69.50007.A31
2nd = 69.50007.A41
2nd = 69.50007.A41
C4905
C4905
3D3V_CAMERA_S03D3V_S0
12
C4903
C4903
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
DCBATOUT
R4904
R4904
Do Not Stuff
Do Not Stuff
DY
DY
12
3D3V_S0
SSID = VIDEO
DBC_EN_C
LCD POWER for ANNIE
LCDVDD
U4901
U4901
1
EN
2
74.05285.07F
74.05285.07F
2nd = 74.09724.09F
2nd = 74.09724.09F
IN#5
GND
OUT3IN#4
G5285T11U-GP
G5285T11U-GP
C4909
C4909
Layout 40 mil
12
C4908
C4908
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
LCDVDD_EN94
3G_RF
3G_RF
12
12
R4914
R4914
100KR2J-1-GP
100KR2J-1-GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
3D3V_S0
5
4
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C4907
C4907
BLON_OUT27
DY
DY
12
R4906
R4906
Do Not Stuff
Do Not Stuff
R4901
R4901
33R2J-2-GP
33R2J-2-GP
1 2
R4903
R4903
1KR2J-1-GP
1KR2J-1-GP
12
BLON_OUT_C
100KR2J-1-GP
100KR2J-1-GP
R4911
R4911
1 2
DBC_EN 27
12
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C4910
C4910
For EMI request
Close to LVDS connector
LCD_BRIGHTNESS
LVDSA_CLK_R#
LVDSA_CLK_R
12
EC4904
EC4904
Do Not Stuff
Do Not Stuff
DY
DY
EC4905
EC4905
Do Not Stuff
Do Not Stuff
DY
DY
12
12
EC4902
EC4902
Do Not Stuff
Do Not Stuff
DY
DY
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LCD Connector
LCD Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
LCD Connector
JE40-HR
JE40-HR
JE40-HR
49 102
49 102
49 102
of
of
of
-1
-1
-1
Page 50
5
4
3
2
1
5V_CRT_S0
9
VCC_CRT
12
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C5012
C5012
D D
CRT_VSYNC_CON95
CRT_HSYNC_CON95
C C
CRT_DEC#27
CRT_DDCDATA_CON
CRT_DDCCLK_CON
CRT_R
CRT_G
CRT_B
12
DDCDATA_ID1
15
DDCCLK_ID3
1
CRT_RED
2
CRT_GREEN
3
CRT_BLUE
14
VSYNC
13
HSYNC
CRT1
CRT1
D-SUB-15-54-GP
D-SUB-15-54-GP
20.20873.015
20.20873.015
R5001
R5001
470R2J-2-GP
470R2J-2-GP
12
SC100P50V2JN-3GP
SC100P50V2JN-3GP
12
CRT_IN#_R
C5007
C5007
NC#4
NC#11
GND
GND
GND
GND
GND
GND
GND
4
11
5
6
7
8
10
16
17
CRT_IN#_R
3
SB
DY
DY
5V_S0
2
1
D5002
D5002
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Pull High 5V Design on CRT Board
CRT DDCDATA & DDCCLK level shift
3D3V_S0
1
23
RN5002
RN5002
SRN2K2J-1-GP
SRN2K2J-1-GP
4
DDCDATA95
DDCCLK95
3D3V_S0
CRT_DDCDATA_CON
34
5
6
2
1
Q5001
Q5001
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
CRT_DDCCLK_CON
5V_CRT_S0
5V_HDMI
3D3V_S0
500mA
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
2 1
3rd = 83.5R003.08F
3rd = 83.5R003.08F
678
RN5003
RN5003
SRN10KJ-6-GP
SRN10KJ-6-GP
123
4 5
D5001
D5001
CH551H-30PT-GP
CH551H-30PT-GP
83.R5003.C8F
83.R5003.C8F
CRT_IN#_R
L5001
L5001
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
68.00245.011
CRT RGB
CRT_RED_R95
B B
A A
CRT_GREEN_R95
CRT_BLUE_R95
DY
DY
Do Not Stuff
Do Not Stuff
12
C5001
C5001
4
DY
DY
Do Not Stuff
Do Not Stuff
678
RN5004
RN5004
SRN150F-1-GP
SRN150F-1-GP
123
4 5
0806 check RN5004
5
ឭ࣋ۯᆜ
68.00245.011
2nd = 68.00230.021
2nd = 68.00230.021
12
12
C5003
C5003
C5002
C5002
DY
DY
Do Not Stuff
Do Not Stuff
1 2
L5002
L5002
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
68.00245.011
68.00245.011
1 2
L5003
L5003
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
68.00245.011
68.00245.011
1 2
12
C5004
C5004
SC10P50V2JN-4GP
SC10P50V2JN-4GP
3
12
C5005
C5005
SC10P50V2JN-4GP
SC10P50V2JN-4GP
12
CRT_R
CRT_G
CRT_B
C5006
C5006
SC10P50V2JN-4GP
SC10P50V2JN-4GP
CRT_DDCDATA_CON
12
C5008
C5008
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C5009
C5009
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
CRT_HSYNC_CON
CRT_VSYNC_CON
12
CRT_DDCCLK_CON
C5010
C5010
12
C5011
DY
DY
CRT Connector
CRT Connector
CRT Connector
JE40-HR
JE40-HR
JE40-HR
C5011
Do Not Stuff
Do Not Stuff
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
50 102
50 102
50 102
of
of
of
1
-1
-1
-1
Page 51
5
SSID = VIDEO
UMA_Muxless : default setting used PS8101. if don't used PS8101
please change C5103~C5110 to 0 ohm resister
D D
HDMI Level Shifter & CONNECTOR
HDMI DISCRETE/ UMA Co-lay
DIS_PX
VGA
PCH
UMA_Muxless
C C
0806 SB Cap change schematic to Page 84
HDMI_CLK#84
HDMI_CLK84
HDMI_DATA0#84
HDMI_DATA084
HDMI_DATA1#84
B B
HDMI_DATA184
HDMI_DATA2#84
HDMI_DATA284
HDMI_CLK#
HDMI_CLK
HDMI_DATA0#
HDMI_DATA0
HDMI_DATA1#
HDMI_DATA1
HDMI_DATA2#
HDMI_DATA2
Close to HDMI Connector
HDMI_CLK_R#17
HDMI_CLK_R17
HDMI_DATA0_R#17
HDMI_DATA0_R17
HDMI_DATA1_R#17
HDMI_DATA1_R17
HDMI_DATA2_R#17
HDMI_DATA2_R17
A A
C5103 Do Not Stuff
C5103 Do Not Stuff
C5104 Do Not Stuff
C5104 Do Not Stuff
C5105 Do Not Stuff
C5105 Do Not Stuff
C5106 Do Not Stuff
C5106 Do Not Stuff
C5110 Do Not Stuff
C5110 Do Not Stuff
C5107 Do Not Stuff
C5107 Do Not Stuff
C5108 Do Not Stuff
C5108 Do Not Stuff
C5109 Do Not Stuff
C5109 Do Not Stuff
5
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
5V_S0
123
Close to Level Shift
678
RN5114
RN5114
SRN499F-GP
SRN499F-GP
4 5
HDMI_PLL_GND
SRN499R
678
123
4
HDMI Connctor
RN5115
RN5115
SRN499F-GP
SRN499F-GP
4 5
SB to -1 for vendor suggest
D
Q5105
Q5105
.
.
2N7002E-1-GP
2N7002E-1-GP
.
.
84.2N702.E31
84.2N702.E31
.
.
.
.
.
.
84.2N702.D31
84.2N702.D31
S
G
4
HDMI_CLK_R#
HDMI_CLK_R
HDMI_DATA0_R#
HDMI_DATA0_R
HDMI_DATA1_R#
HDMI_DATA1_R
HDMI_DATA2_R#
HDMI_DATA2_R
R5133
R5133
0R2J-2-GP
0R2J-2-GP
UMA_Muxless
UMA_Muxless
5V_S0 3D3V_VGA_S0
1 2
1 2
HDMI CONN
R5134
R5134
Do Not Stuff
Do Not Stuff
DIS
DIS
22
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
23
HDMI1
HDMI1
SKT-HDMI19P-78-GP-U
SKT-HDMI19P-78-GP-U
22.10296.271
22.10296.271
2nd = 22.10296.311
2nd = 22.10296.311
3rd = 22.10296.501
3rd = 22.10296.501
Do Not Stuff
Do Not Stuff
5V Tolerance
3
R5110
R5110
GPU_HDMI_CLK84
GPU_HDMI_DATA84
3
HDMI_DATA2_R
HDMI_DATA2_R#
HDMI_DATA1_R
HDMI_DATA1_R#
HDMI_DATA0_R
HDMI_DATA0_R#
HDMI_CLK_R
HDMI_CLK_R#
DDC_CLK_HDMI
DDC_DATA_HDMI
5V_HDMI5V_HDMI5V_HDMI5V_HDMI
HPD_HDMI_CON
12
DY
DY
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
PCH_HDMI_CLK17
PCH_HDMI_DATA17
R5111
R5111
150KR2J-L1-GP
150KR2J-L1-GP
RN5102
RN5102
1 2
3D3V_VGA_S0
4
1
HDMI_HPD_B
2 3
2 3
1
1
2 3
5V_HDMI
RN5105
RN5105
Do Not Stuff
Do Not Stuff
DIS
DIS
4
4
RN5106
RN5106
SRN0J-6-GP
SRN0J-6-GP
UMA_Muxless
UMA_Muxless
F5101
F5101
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
69.50007.691
69.50007.691
2nd = 69.50007.771
2nd = 69.50007.771
Q5102
Q5102
MMBT3904-4-GP
MMBT3904-4-GP
C
84.T3904.C11
84.T3904.C11
B
2ND = 84.03904.P11
2ND = 84.03904.P11
3rd = 84.03904.L06
3rd = 84.03904.L06
E
12
R5112
R5112
10KR2J-3-GP
10KR2J-3-GP
HDMI_CLK_1
HDMI_DATA_1
HDMI_DATA_1
5V_S0
12
R5127 Do Not Stuff
R5127 Do Not Stuff
R5128 0R2J-2-GP
R5128 0R2J-2-GP
R5131
R5131
Do Not Stuff
Do Not Stuff
DIS
DIS
DIS
DIS
1 2
1 2
UMA_Muxless
UMA_Muxless
2
HDMI_OE#
D
Q5106
Q5106
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
S
G
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3D3V_S03D3V_VGA_S0
R5132
R5132
0R2J-2-GP
0R2J-2-GP
UMA_Muxless
UMA_Muxless
1 2
1 2
HPD_HDMI_CON
SB to -1 add R5124,R5125 for DIS only HPD
HDMI_HPD_DET 84
HDMI_PCH_DET 17
3D3V_S03D3V_VGA_S0
R5125
R5125
R5124
R5124
0R2J-2-GP
0R2J-2-GP
Do Not Stuff
Do Not Stuff
UMA_Muxless
UMA_Muxless
DIS
DIS
1 2
1 2
3D3V_HDMI
34
2
5
UMA_Muxless
UMA_Muxless
1
6
Q5104
Q5104
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
HR UMA
HR UMA
HR UMA
Title
Title
Title
HDMI Level Shifter/Connector
HDMI Level Shifter/Connector
HDMI Level Shifter/Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
1 2
DY
DY
4
1
1
R5130
R5130
Do Not Stuff
Do Not Stuff
HDMI_IN# 27
D5102
D5102
BAW56-5-GP
BAW56-5-GP
83.00056.Q11
83.00056.Q11
2nd = 83.00056.K11
2nd = 83.00056.K11
1
2
RN5101
RN5101
SRN2K2J-1-GP
SRN2K2J-1-GP
2 3
DDC_CLK_HDMI
DDC_DATA_HDMI
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
JE40-HR
JE40-HR
1
5V_S0
3
51 102
51 102
51 102
-1
-1
-1
of
of
of
Page 52
5
4
3
2
1
LED BACKLIGHT CONVERTER POWER
D D
C C
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
eDP
eDP
eDP
JE40-HR
JE40-HR
JE40-HR
52 102
52 102
52 102
1
of
of
-1
-1
-1
Page 53
5
D D
4
3
2
1
C C
(Blanking)
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
S-VIDEO
S-VIDEO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
S-VIDEO
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
53 102
53 102
53 102
of
of
of
1
-1
Page 54
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
54 102
54 102
54 102
of
of
of
1
-1
Page 55
5
4
SSID = User.Interface
3
2
1
D D
ITP Connector
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
C C
CPU
TCK(PIN AC5)
ITP Connector
TCK(PIN 5)
FBO(PIN 11)
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
ITP
ITP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
ITP
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
55 102
55 102
55 102
of
of
of
1
-1
Page 56
SSID = SATA
SATA HDD Connector
HDD1
HDD1
SKT-SATA7P+15P-32-GP
SKT-SATA7P+15P-32-GP
62.10065.921
62.10065.921
16
P10
P11
P12
P13
P14
P15
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
P7
P8
P9
17
SATA_TXP0_C
C5610SCD01U16V2KX-3GP C5610SCD01U16V2KX-3GP
SATA_TXP021
SATA_TXN021
SATA_RXN021
SATA_RXP021
5V_S0
12
C5609SCD01U16V2KX-3GP C5609SCD01U16V2KX-3GP
12
C5602SCD01U16V2KX-3GP C5602SCD01U16V2KX-3GP
1 2
C5603SCD01U16V2KX-3GP C5603SCD01U16V2KX-3GP
1 2
12
C5605
C5605
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
12
C5606
C5606
Do Not Stuff
Do Not Stuff
DY
DY
ODD Connector
R5603
R5603
0R5J-5-GP
0R5J-5-GP
SATA_ODD_DA# SATA_ODD_DA#_C
SATA_ODD_PWRGT SATA_ODD_DA#
SATA_TXN421
SATA_TXP421
SATA_RXN421
SATA_RXP421
3D3V_S0
RN5601
RN5601
1
2 3
Do Not Stuff
Do Not Stuff
ZPO
ZPO
5V_S0
SATA_ODD_PWRGT
4
0707 Modify:
Change Q5601 to DUAL 2N7002 for isolate MD/DA signal between PCH and ODD.
C5611SCD01U16V2KX-3GP C5611SCD01U16V2KX-3GP
12
C5612SCD01U16V2KX-3GP C5612SCD01U16V2KX-3GP
12
C5607SCD01U16V2KX-3GP C5607SCD01U16V2KX-3GP
12
C5608SCD01U16V2KX-3GP C5608SCD01U16V2KX-3GP
12
Q5601
Q5601
ODD
ODD
ZPO
ZPO
3D3V_S0
12
SATA_TXN4_C
SATA_TXP4_C
SATA_RX4-_C
SATA_RX4+_C
12
R5605
R5605
10KR2J-3-GP
10KR2J-3-GP
ODD_PWRGT#
5
6
123 4
ODD1
ODD1
SKT-SATA7P-6P-90-GP
SKT-SATA7P-6P-90-GP
22.10300.C11
22.10300.C11
P2
+5V
P3
+5V
A-S3GND
S2
A+
S5
B-
S6
B+
NP1
NP1
NP2
NP2
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.DM601.03F
2nd = 84.DM601.03F
GND
GND
GND
GND
GND
GND
SB
SATA_ODD_PWRGT22
SATA_ODD_DA#_CODD_PWR_5V
P4
MD
P1
DP
S1
S4
S7
P5
P6
14
15
DY
DY
R5602Do Not Stuff
R5602Do Not Stuff
12
SATA_ODD_DA# 18
SATA_ODD_PRSNT# 22
12
R5604
R5604
Do Not Stuff
Do Not Stuff
DY
DY
5V_S0
12
ZPO
ZPO
TC5601
TC5601
Do Not Stuff
Do Not Stuff
SATA Zero Power ODD
SB modify part number
U5601
U5601
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
EN/EN#4OC#
3
IN#3
2
IN#2
1
GND
Currentlimit
ActiveHigh
MIN=>2.01A
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
ZOP
ZOP
5
6
OUT#6
7
OUT#7
8
OUT#8
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
HDD/ODD
HDD/ODD
HDD/ODD
JE40-HR
JE40-HR
JE40-HR
100 mil
ODD_PWR_5V
12
of
of
of
56 102
56 102
56 102
TC5602
TC5602
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
-1
-1
-1
Page 57
5
4
3
2
1
ESATA Power
D D
C C
USB CHARGER
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
E-SATA/USB CHARGER
E-SATA/USB CHARGER
E-SATA/USB CHARGER
JE40-HR
JE40-HR
JE40-HR
1
of
of
57 102
57 102
57 102
-1
-1
-1
Page 58
5
4
3
2
1
SSID = AUDIO
Speaker Connector
LINE1 OUT
SPDIF
JE40 Modify LINE OUT
D D
Audio at small board
C C
MIC IN
Internal
B B
Microphone
JE40 delete Line in function
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Audio Jack
Audio Jack
Audio Jack
JE40-HR
JE40-HR
JE40-HR
58 102
58 102
58 102
1
of
of
-1
-1
-1
Page 59
5
GIGA Lan Transformer
SSID = LOM
D D
C5901
C5901
C C
XRF_TDC1
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C5903
C5903
XRF_TDC2
12
C5902
C5902
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
XRF_TDC3
12
XRF_TDC4
12
C5904
C5904
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
LAN MDI Off-Page
MDI3+31
MDI3-31
MDI2-31
MDI2+31
MDI1+31
MDI1-31
MDI0-31
MDI0+31
1
3
2
7
6
8 9
1
3
2
7
6
8 9
4
XF5901
XF5901
XFORM-12P-36-GP
XFORM-12P-36-GP
68.HD081.30B
68.HD081.30B
Change:68.68160.30B
Change:68.68160.30B
2nd = 68.HD081.30B
2nd = 68.HD081.30B
1CT:1CT
1CT:1CT
Tx Side
Tx Side
1CT:1CT
1CT:1CT
Rx Side
Rx Side
XF5902
XF5902
XFORM-12P-36-GP
XFORM-12P-36-GP
68.HD081.30B
68.HD081.30B
Change:68.68160.30B
Change:68.68160.30B
2nd = 68.HD081.30B
2nd = 68.HD081.30B
1CT:1CT
1CT:1CT
Tx Side
Tx Side
1CT:1CT
1CT:1CT
Rx Side
Rx Side
3
SB modiyf Pin9 Pin10 SWAP
RJ45_7
16
MCT2
14
RJ45_8
15
RJ45_5
10
MCT1
11
RJ45_4
RJ45_3
16
MCT4
14
RJ45_6
15
RJ45_2
10
MCT3
11
RJ45_1
SB modify For EMI
U5901
5V_S5
MDI1+31
MDI1-31
5V_S5
U5901
123
U5903
U5903
456
TVLST2304AD0-GP
TVLST2304AD0-GP
SURGE
SURGE
MDI0+31
MDI0-31
5V_S5
5V_S5
10M/100M/1G_LED#31
LAN_ACT_LED#31
3D3V_S5
2
U5902
U5902
U5904
U5904
123
456
CONN_PWR2
RJ45_1
RJ45_2
RJ45_3
RJ45_4
RJ45_5
RJ45_6
RJ45_7
RJ45_8
CONN_PWR
RN5901
RN5901
SRN470J-4-GP-U
SRN470J-4-GP-U
1
2 3
TVLST2304AD0-GP
TVLST2304AD0-GP
SURGE
SURGE
4
14
9
10
1
2
3
4
5
6
7
8
12
13
15
RJ45
RJ45
RJ45-12P-16-GP
RJ45-12P-16-GP
22.10321.Y21
22.10321.Y21
2nd = 22.10321.Y91
2nd = 22.10321.Y91
CONN_PWR2
CONN_PWR
LED COLOR
10(+) 9(-)::GREEN
GREEN
GREEN
12(+) 13(-):ORANGE
ORANGE
ORANGE
12
EC5901
EC5901
Do Not Stuff
Do Not Stuff
DY
DY
12
EC5902
EC5902
Do Not Stuff
Do Not Stuff
DY
DY
1
TVLST2304AD0-GP
MCT_R
75R3J-L-GP
75R3J-L-GP
456
MCT2
12
12
R5904
R5904
TVLST2304AD0-GP
SURGE
SURGE
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
LAN CONNECTOR
LAN CONNECTOR
LAN CONNECTOR
JE40-HR
JE40-HR
JE40-HR
1
59 102
59 102
59 102
of
of
of
-1
-1
-1
MCT4
12
75R3J-L-GP
75R3J-L-GP
R5901
R5901
SC1KP2KV6KX-GP
SC1KP2KV6KX-GP
2
123
MCT1
12
75R3J-L-GP
75R3J-L-GP
R5902
R5902
C5905
C5905
TVLST2304AD0-GP
456
B88069X9231T203-GP
B88069X9231T203-GP
SURGE
SURGE
TVLST2304AD0-GP
SURGE
SURGE
MCT3
12
GDT3
GDT3
B88069X9231T203-GP
B88069X9231T203-GP
MCT4
12
GDT4
GDT4
SURGE
SURGE
MDI2+31
MDI2-31
MCT3
12
75R3J-L-GP
75R3J-L-GP
R5903
R5903
123
B B
C5916
C5916
XRF_TDC1
XRF_TDC2
XRF_TDC3
XRF_TDC4
MDI0+
EC5909
EC5909
Do Not Stuff
Do Not Stuff
1 2
MDI1-
SC6D8P50V2CN-GP
SC6D8P50V2CN-GP
EC5903
EC5903
1 2
MDI1+
EC5904
EC5904
Do Not Stuff
Do Not Stuff
1 2
5
MDI2-
EC5905
EC5905
Do Not Stuff
Do Not Stuff
1 2
MDI2+
EC5906
EC5906
Do Not Stuff
Do Not Stuff
1 2
MDI3-
EC5908
EC5908
Do Not Stuff
Do Not Stuff
1 2
MDI3+
EC5907
EC5907
Do Not Stuff
Do Not Stuff
1 2
C5907
C5907
12
Do Not Stuff
Do Not Stuff
C5906
C5906
Do Not Stuff
Do Not Stuff
DY
DY
MDI0-
A A
EC5910
EC5910
Do Not Stuff
Do Not Stuff
1 2
1 2
Do Not Stuff
Do Not Stuff
DY
DY
C5917
C5917
1 2
Do Not Stuff
Do Not Stuff
DY
DY
C5918
C5918
1 2
Do Not Stuff
Do Not Stuff
DY
DY
C5919
C5919
1 2
Do Not Stuff
Do Not Stuff
DY
DY
LAN_ACT_LED#
10M/100M/1G_LED#
12
DY
DY
4
MDI3+31
MDI3-31
B88069X9231T203-GP
B88069X9231T203-GP
SURGE
SURGE
MCT1
12
GDT1
GDT1
3
B88069X9231T203-GP
B88069X9231T203-GP
SURGE
SURGE
MCT2
12
GDT2
GDT2
Page 60
5
4
3
2
1
12
Do Not Stuff
Do Not Stuff
DY
DY
EC6003
EC6003
3D3V_S5
12
C6001
C6001
C6002
C6002
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SB 3D3V_SPI,
12
12
DY
DY
DY
DY
EC6001
Do Not Stuff
Do Not Stuff
EC6001
Do Not Stuff
Do Not Stuff
1
PWR
2
GND
NP1
NP1
NP2
NP2
RTC1
RTC1
BAT-330DG02PSS0301CE-GP
BAT-330DG02PSS0301CE-GP
62.70001.051
62.70001.051
Change:62.70001.061
Change:62.70001.061
2nd = 62.70001.061
2nd = 62.70001.061
3rd = 62.70014.001
3rd = 62.70014.001
3D3V_AUX_S5
ޏ൷
3D3V_S5,
SPI_CLK_R 21,27
SPI_SI_R 21,27
JE40 change RTC part number
SPI FLASH ROM (4M byte) for PCH
SSID = Flash.ROM
D D
SPI_CS0#_R21,27
SPI_SO_R21,27
C C
1 2
R6001
R6001
33R2J-2-GP
33R2J-2-GP
Do Not Stuff
Do Not Stuff
SSID = RBATT
RTC_AUX_S5
C6003
C6003
Do Not Stuff
Do Not Stuff
B B
-1 for RTC Leakage
EC6002
EC6002
DY
DY
1 2
3D3V_S5
678
123
SPI_SO
SPI_WP#
12
DY
DY
Q6001
Q6001
CH715FPT-GP
CH715FPT-GP
2nd = 83.00040.E81
2nd = 83.00040.E81
83.R0304.B81
83.R0304.B81
3
Do Not Stuff
Do Not Stuff
RN6001
RN6001
SRN4K7J-10-GP
SRN4K7J-10-GP
4 5
1
2
R6004
R6004
SPI_HOLD_0#
1
CE#
2
SO
3
WP#
VSS4SI
U6001
U6001
SST25VF032B-80-4I-S2AF-GP
SST25VF032B-80-4I-S2AF-GP
72.25032.D01
72.25032.D01
2ND = 72.25P32.C01
2ND = 72.25P32.C01
3rd = 72.25Q32.A01
3rd = 72.25Q32.A01
RTC_PWR
12
DY
DY
SYSTEM
SPI ROM
8
VDD
7
HOLD#
6
SCK
5
R6002
R6002
1KR2J-1-GP
1KR2J-1-GP
1 2
Width=20mils
+RTC_VCC
R6006
R6006
Do Not Stuff
Do Not Stuff
1 2
3D3V_S5
SPI ROM Equal length need to less than 500mil
SPI ROM Equal length need to less than 500mil
SD
DY
DY
Q6002
Q6002
R6003
R6003
DY
DY
G
R6005
R6005
Do Not Stuff
Do Not Stuff
1 2
DY
DY
12
SB to -1 default active Low
EC_GPIO95 27
3
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
Flash/RTC
Flash/RTC
Flash/RTC
JE40-HR
JE40-HR
JE40-HR
60 102
60 102
60 102
1
-1
-1
of
of
of
-1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.00610.C31
2ND = 84.00610.C31
Do Not Stuff
Do Not Stuff
A A
5
4
Page 61
5
SSID = USB
IO Board USB Power
4
3
2
1
D D
5V_S5
at least 80 mil
12
C6101
C6101
Do Not Stuff
Do Not Stuff
DY
DY
C C
USB_PN118
USB_PP118
USB_PWR_EN#27,82
R6103 Do Not StuffR6103 Do Not Stuff
1 2
R6104 Do Not StuffR6104 Do Not Stuff
1 2
5V_USB1_S3
USBPN1_C
USBPP1_C
Support 2A
1
GND
2
IN#2
3
IN#3
4
EN/EN#
U6101
U6101
G547E2P81U-GP
G547E2P81U-GP
74.00547.079
74.00547.079
2nd = 74.02101.079
2nd = 74.02101.079
OUT#8
OUT#7
OUT#6
OC#
8
6
1
2
3
4
5
7
5V_USB1_S3
8
7
6
5
at least 80 mil
SC1U10V2KX-1GP
SC1U10V2KX-1GP
USB1
USB1
SKT-USB8-3-GP-U
SKT-USB8-3-GP-U
22.10321.B81
22.10321.B81
2nd = 22.10321.C41
2nd = 22.10321.C41
3rd = 22.10321.E01
3rd = 22.10321.E01
12
C6102
C6102
TC6201 change ঁࡵ
12
SE100U16VM-13GP
SE100U16VM-13GP
TC6201
TC6201
79.1071D.3CL
79.1071D.3CL
2nd =
2nd =
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
EC6101
EC6101
Change Main source
B B
5V_USB1_S3
8
6
1
R6101 Do Not StuffR6101 Do Not Stuff
USB_PN918
USB_PP918
A A
5
1 2
R6102 Do Not StuffR6102 Do Not Stuff
1 2
USBPN9_C
USBPP9_C
4
2
3
4
5
7
USB2
USB2
SKT-USB8-3-GP-U
SKT-USB8-3-GP-U
22.10321.B81
22.10321.B81
2nd = 22.10321.C41
2nd = 22.10321.C41
3rd = 22.10321.E01
3rd = 22.10321.E01
3
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
USB Power SW
USB Power SW
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
USB Power SW
JE40-HR
JE40-HR
JE40-HR
61 102
61 102
61 102
of
of
of
1
-1
-1
-1
Page 62
5
D D
C C
4
3
2
1
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
USB 3.0 Port
USB 3.0 Port
USB 3.0 Port
JE40-HR
JE40-HR
JE40-HR
1
of
of
62 102
62 102
62 102
-1
-1
-1
Page 63
5
4
3
2
1
SSID = User.Interface
Bluetooth Module conn.
D D
ANNIE Bluetooth Module
U6301
U6301
G5240B1T1U-GP
3D3V_BT_S0
3D3V_BT_S0
12
EC6302
C C
Do Not Stuff
Do Not Stuff
DY
DY
EC6302
EC6302 put near
BLUE1 / all USB
put one choke
near connector
by EMI request
G5240B1T1U-GP
74.05240.A7F
74.05240.A7F
2nd = 74.07534.A7F
2nd = 74.07534.A7F
1
OUT
2
GND
NC#33EN
IN
BT2
BT2
ACES-CON4-7-GP-U
ACES-CON4-7-GP-U
2nd = 20.F1804.004
2nd = 20.F1804.004
20.F0772.004
20.F0772.004
5
6
1
2
3
4
5
4
3D3V_S0
C6302
C6302
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
BLUETOOTH_EN 27,65
USB_PN3 18
USB_PP3 18
3D3V_BT_S0
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Bluetooth
Bluetooth
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Bluetooth
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
63 102
63 102
63 102
of
of
of
1
-1
Page 64
5
D D
4
3
2
1
Finger printer
JE40 delete FP function
C C
F/P
B B
A A
5
4
3
18
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RESERVED
RESERVED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
RESERVED
JE40-HR
JE40-HR
JE40-HR
64 102
64 102
64 102
of
of
of
1
-1
-1
-1
Page 65
5
4
3
2
1
SSID = Wireless
Mini Card Connector(802.11a/b/g/n)
3D3V_S0
D D
PCIE_WAKE#19,31,66,82
CLK_PCIE_WLAN_REQ#20
CLK_PCIE_WLAN#20
CLK_PCIE_WLAN20
R6511
R6511
1 2
DY
DY
Do Not Stuff
Do Not Stuff
53
1
3
5
7
9
11
13
15
NP1
2
4
6
8
10
12
14
16
1D5V_S0
R6501 Do Not StuffR6501 Do Not Stuff
C6504
C6504
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
R6502 Do Not StuffR6502 Do Not Stuff
1 2
PCIE_RXN220
PCIE_RXP220
PCIE_TXN220
PCIE_TXP220
3D3V_S0
R6503
R6503
Do Not Stuff
Do Not Stuff
1 2
R6515
R6515
1 2
DY
DY
Do Not Stuff
Do Not Stuff
+5V_MINI_DEBUG
E51_RXD27
E51_TXD27
C C
5V_S5
BLUETOOTH_EN27,63
3D3V_S0
B B
12
C6502
C6502
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
12
C6503
C6503
Do Not Stuff
Do Not Stuff
12
E51_RXD_R
E51_TXD_R
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
54
WLAN1
WLAN1
PTWO-CONN52A-9-GP-U
PTWO-CONN52A-9-GP-U
20.F1519.052
20.F1519.052
2nd = 62.10043.A51
2nd = 62.10043.A51
3rd = 20.F1693.052
3rd = 20.F1693.052
4th = 20.F1743.052
4th = 20.F1743.052
SB modify for SIV
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2
WIFI_RF_EN 27
PLT_RST# 5,18,27,31,36,66,71,82,97
USB_PN11 18
USB_PP11 18
WMAX_LED#_C
1 2
R6513 Do Not StuffR6513 Do Not Stuff
RF suggestion
12
EC6511
3G_RF
3G_RF
EC6511
SC56P50V2JN-2GP
SC56P50V2JN-2GP
EC6509
EC6509
WLAN_LED# 68
R6512
R6512
DY
DY
Do Not Stuff
Do Not Stuff
1 2
USB_PN11 USB_PP11 3D3V_S0+5V_MINI_DEBUG
12
Do Not Stuff
Do Not Stuff
DY
DY
EC6507
EC6507
3D3V_S0
12
Do Not Stuff
Do Not Stuff
DY
DY
EC6503
EC6503
12
Do Not Stuff
Do Not Stuff
DY
DY
-2
CLK_PCIE_WLAN
1D5V_S0 VCCVRM_S0
12
C6505
A A
5
C6505
Do Not Stuff
Do Not Stuff
12
C6506
C6506
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
12
C6507
C6507
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
4
EC6513SC8P250V2CC-GP EC6513SC8P250V2CC-GP
CLK_PCIE_WLAN#
EC6512SC8P250V2CC-GP EC6512SC8P250V2CC-GP
12
12
3
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
MINICARD(WLAN)/ITP CONN
MINICARD(WLAN)/ITP CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
Date: Sheet
MINICARD(WLAN)/ITP CONN
JE40-HR
JE40-HR
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
2
JE40-HR
65 102
65 102
65 102
of
of
of
1
-1
-1
-1
Page 66
5
4
3
2
1
SSID = Wireless
Mini Card Connector(WWAN)
20100712 V1.5
Place near MINI Card CONN
D D
3G_RF
3G_RF
12
C6601
C6601
SC47P50V2JN-3GP
SC47P50V2JN-3GP
3D3V_S0
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
3G_RF
3G_RF
C6602
C6602
DY
DY
12
C6608
C6608
Do Not Stuff
Do Not Stuff
53
R6604
R6604
PCIE_WAKE#19,31,65,82
1 2
DY
DY
Do Not Stuff
Do Not Stuff
1
3
5
7
9
11
13
15
NP1
2
4
6
8
10
12
14
16
1D5V_S0
3D3V_S0
UIM_PWR
UIM_DATA
UIM_CLK
UIM_RESET
UIM_VPP
1D5V_S0
C C
B B
DY
DY
12
12
C6606
C6606
C6610
C6610
Do Not Stuff
Do Not Stuff
3G Sku
3G Sku
12
C6609
C6609
DY
DY
Do Not Stuff
Do Not Stuff
SIM1
SIM1
CARDBUS9P-GP
CARDBUS9P-GP
20.I0063.001
20.I0063.001
UIM_PWR
UIM_VPP
UIM_RESET
UIM_CLK
TP6601Do Not Stuff TP6601Do Not Stuff
UIM_DATA
1
CD
1
VCC
6
VPP
2
RST
3
CLK
7
I/O
9
CD
3G Sku
3G Sku
NP1
NP2
RESERVED#4
RESERVED#8
GND
GND
GND
NP1
NP2
4
8
5
10
11
USB_PP0 18
USB_PN0 18
3D3V_S0
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
54
WWAN1
WWAN1
PTWO-CONN52A-9-GP-U
PTWO-CONN52A-9-GP-U
20.F1519.052
20.F1519.052
2nd = 62.10043.A51
2nd = 62.10043.A51
3rd = 20.F1693.052
3rd = 20.F1693.052
4th = 20.F1743.052
4th = 20.F1743.052
3G Sku
3G Sku
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
NP2
PLT_RST#_WAN
R6605
R6605
1 2
Do Not Stuff
Do Not Stuff
DY
DY
USB_PN4 18
USB_PP4 18
R6606
R6606
DY
DY
Do Not Stuff
Do Not Stuff
1 2
3G_EN 27
PLT_RST# 5,18,27,31,36,65,71,82,97
3G_LED# 68
3D3V_S0
RF suggestion
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP
EC6601
EC6601
A A
5
12
Do Not Stuff
Do Not Stuff
DY
DY
EC6603
EC6603
12
Do Not Stuff
Do Not Stuff
DY
DY
4
DY
DY
12
EC6602
EC6602
EC6604
Do Not Stuff
Do Not Stuff
EC6604
12
Do Not Stuff
Do Not Stuff
DY
DY
3
EC6608
EC6608
12
Do Not Stuff
Do Not Stuff
DY
DY
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
WWAN Connector
WWAN Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
WWAN Connector
JE40-HR
JE40-HR
JE40-HR
66 102
66 102
66 102
1
of
of
of
-1
-1
-1
Page 67
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
67 102
67 102
67 102
of
of
of
1
-1
Page 68
5
SSID = User.Interface
D D
Power button LED
Q6801
Q6801
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
R1
R1
PWRLED27
1
R2
R2
FRONT_PWRLED#_Q
3
2
Power STDBY_LED
Q6802
Q6802
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
C C
STDBY_LED27
84.00143.G1K
R1
R1
1
R2
R2
STDBY_LED#_Q
3
2
4
FRONT_PWRLED#_Q
STDBY_LED#_Q
DC_BATFULL#_Q
CHARGE_LED#_Q
FRONT_PWRLED#_Q 82
STDBY_LED#_Q 82
R6801 300R2F-GPR6801 300R2F-GP
1 2
R6802 330R2F-GPR6802 330R2F-GP
1 2
R6803 300R2F-GPR6803 300R2F-GP
1 2
R6804 470R2J-2-GPR6804 470R2J-2-GP
1 2
FRONT_PWRLED#_Q
CHARGE_LED#_Q
STDBY_LED#_Q
DC_BATFULL#_Q
DY
DY
DY
DY
DY
DY
DY
DY
FRONT_PWRLED#_R
STDBY_LED#_R
DC_BATFULL#_R
CHARGE_LED#_R
1 2
EC6801 Do Not Stuff
EC6801 Do Not Stuff
1 2
EC6802 Do Not Stuff
EC6802 Do Not Stuff
1 2
EC6803 Do Not Stuff
EC6803 Do Not Stuff
1 2
EC6804 Do Not Stuff
EC6804 Do Not Stuff
3
PWR_LED1
PWR_LED1
LED-BO-5-GP-U1
LED-BO-5-GP-U1
83.00326.A70
83.00326.A70
2nd = 83.01220.I70
2nd = 83.01220.I70
2
CHARGER_LED1
CHARGER_LED1
LED-BO-5-GP-U1
LED-BO-5-GP-U1
83.00326.A70
83.00326.A70
2nd = 83.01220.I70
2nd = 83.01220.I70
2
TP6801Do Not StuffTP6801Do Not Stuff
2
1
WLAN_LED
13
5V_S5
From module
WLAN_LED# 65
R2
R2
13
5V_S5
2ND = 84.2N702.031
2ND = 84.2N702.031
1
5V_AUX_S5
WLAN_LED#_1
Q6806
Q6806
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
S
2
3
D
G
1
R1
R1
Q6803
Q6803
DTC143ZUB-GP
DTC143ZUB-GP
WLAN_TEST_LED 27
for factory test
WIRELESS_LED_OFF# 27
Battery LED2(DC_BATFULL)
Q6805
Q6805
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
R1
R1
DC_BATFULL27
B B
1
R2
R2
DC_BATFULL#_Q
3
2
3D3V_S0
SATA_LED#21
R2
R2
1
R1
R1
Q6809
Q6809
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
2
3
Battery LED1(CHARGE)
Q6808
Q6808
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
R1
R1
CHARGE_LED27
A A
1
R2
R2
5
CHARGE_LED#_Q
3
2
WLAN_LED#_1 WLAN_LED#_R
4
SATA HDD LED
MEDIA_LED1
MEDIA_LED1
LED-B-67-GP-U2
LED-B-67-GP-U2
83.00110.F70
83.00110.F70
2nd = 83.01221.P70
2nd = 83.01221.P70
MEDIA_LED#_RSATA_LED#_1
R6807
R6807
12
470R2J-2-GP
470R2J-2-GP
3G_LED#_R3G_LED#_1
R6806
R6806
1 2
300R2F-GP
300R2F-GP
R6805
R6805
1 2
510R2J-1-GP
510R2J-1-GP
3
2
NC
K A
COM_LED1
COM_LED1
LED-BO-5-GP-U1
LED-BO-5-GP-U1
83.00326.A70
83.00326.A70
2nd = 83.01220.I70
2nd = 83.01220.I70
13
5V_S0
5V_S0
3G_LED#_1
Q6807
Q6807
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
2
3G LED
From module
3G_LED# 66
2
3
Q6804
Q6804
DTC143ZUB-GP
DTC143ZUB-GP
D
S
G
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
3D3V_S0
12
R6809
R6809
4K7R2J-2-GP
4K7R2J-2-GP
R2
R2
1
R1
R1
WLAN_TEST_LED 27
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LED Bard/Power Button
LED Bard/Power Button
LED Bard/Power Button
JE40-HR
JE40-HR
JE40-HR
for factory test
68 102
68 102
68 102
1
of
of
of
-1
-1
-1
Page 69
5
4
3
2
1
TOUCH PAD
5V_S0
SSID = KBC
1
23
RN6901
D D
RN6901
SRN4K7J-8-GP
SRN4K7J-8-GP
Internal KeyBoard
4
SC56P50V2JN-2GP
SC56P50V2JN-2GP
3G_RF
3G_RF
12
EC6901
EC6901
SC56P50V2JN-2GP
SC56P50V2JN-2GP
3G_RF
3G_RF
12
EC6902
EC6902
5V_S0
Connector
EC6903
EC6903
Do Not Stuff
Do Not Stuff
DY
DY
1
2 3
RN6902
RN6902
SRN33J-5-GP-U
SRN33J-5-GP-U
EC6904
EC6904
1 2
TPCLK27
TPDATA27
KB1
20.K0320.026
20.K0320.026
2nd = 20.K0382.026
2nd = 20.K0382.026
123456789
C C
KCOL0
MB PIN DEFINE 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
KB PIN DEFINE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
KCOL1
KCOL2
KCOL4
KCOL3
KCOL5
10111213141516171819202122232425262728
KCOL9
KCOL7
KCOL8
KCOL6
KCOL11
KCOL12
KCOL10
KCOL14
KCOL13
KCOL15
KCOL16
KB1
ACES-CON26-6GP-U
ACES-CON26-6GP-U
KROW0
KROW3
KROW1
KROW2
KCOL17
KROW5
KROW4
KROW6
KROW7
KCOL17 27
KROW[0..7] 27
KCOL[0..16] 27
TP_DATA
TP_CLK
TP_LEFT
TP_RIGHT
4
TP_CLK
TP_DATA
EC6906
EC6905
EC6905
Do Not Stuff
Do Not Stuff
1 2
DY
DY
EC6906
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
Do Not Stuff
DY
DY
1 2
1 2
FFC
TP_LEFT
TP_RIGHT
ฆ૿
TPAD1
TPAD1
ACES-CON6-13-GP
ACES-CON6-13-GP
20.K0320.006
20.K0320.006
2nd = 20.K0382.006
2nd = 20.K0382.006
8
6
5
4
3
2
1
7
K/B
B B
SW_R1
SW_R1
SW-TACT-5P-9-GP
SW-TACT-5P-9-GP
62.40089.141
62.40089.141
Change:62.40089.221
Change:62.40089.221
1 2
3 4
A A
5
126
SB to -1 modify Part number
SW_L1
SW_L1
SW-TACT-5P-9-GP
SW-TACT-5P-9-GP
62.40089.141
62.40089.141
Change:62.40089.221
Change:62.40089.221
TP_LEFTTP_RIGHT
5
4
1 2
3 4
5
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Key Board/Touch Pad
Key Board/Touch Pad
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
3
Date: Sheet
2
Key Board/Touch Pad
JE40-HR
JE40-HR
JE40-HR
69 102
69 102
69 102
of
of
of
1
-1
-1
-1
Page 70
5
D D
C C
LID_CLOSE#27
4
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R7002
R7002
100R2J-2-GP
100R2J-2-GP
1 2
12
C7001
C7001
DY
DY
Do Not Stuff
Do Not Stuff
3
12
C7002
C7002
LID_CLOSE#_1
3D3V_AUX_KBC
HALLSW1
HALLSW1
APX9132HAI-TRG-GP
APX9132HAI-TRG-GP
74.09132.C7B
74.09132.C7B
1
VDD
GND
2
VOUT
2
3
1
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Hall Sensor
Hall Sensor
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Hall Sensor
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
70 102
70 102
70 102
of
of
of
1
-1
Page 71
5
D D
C C
4
3
2
3D3V_S0
1
1
LPC_AD021,27
LPC_AD121,27
LPC_AD221,27
LPC_AD321,27
LPC_FRAME#21,27
PLT_RST#5,18,27,31,36,65,66,82,97
CLK_PCI_LPC18
B B
HR UMA
HR UMA
HR UMA
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
2
3
4
5
6
7
8
9
10
11
12
DB1
DB1
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Dubug connector
Dubug connector
Dubug connector
JE40-HR
JE40-HR
JE40-HR
71 102
71 102
71 102
1
-1
-1
of
of
of
-1
Page 72
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Reserved
Reserved
Reserved
JE40-HR
JE40-HR
JE40-HR
72 102
72 102
72 102
1
of
of
-1
-1
-1
Page 73
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Reserved
Reserved
Reserved
JE40-HR
JE40-HR
JE40-HR
73 102
73 102
73 102
1
of
of
-1
-1
-1
Page 74
5
SSID = SDIO
4
3
SD/XD/MS Card Reader
2
1
D D
SD-DATA3_1932
SD_CMD_1632
SD-CLK_932
SD_DATA0_432
SD-DAT1_332
SD-DATA1_2132
SD-WP_232
SD_CD/XD_WE#31,32
MS_BS_732
MS-DATA1_832
MS_DATA0_1032
MS-DATA2_1232
MS_INS#_1432
MS-DATA3_1532
MS-SCLK_1732
C C
XD_CD#_3932
XD-R/-B_3832
XD_RE#_3732
XD_CE#_3632
XD_CLE_3532
XD_ALE_3432
SD_CD/XD_WE#_1_33_4332
XD_WP_3232
XD_D0_3032
XD_D1_2932
XD_D2_2832
XD_D3_2732
XD_D4_2632
XD_D5_2532
XD_D6_2432
XD_D7_2332
3D3V_CARD_S0
SD-DATA3_19
SD_CMD_16
SD-CLK_9
SD_DATA0_4
SD-DAT1_3
SD-DATA1_21
SD-WP_2
SD_CD/XD_WE#_1_33_43
SD_CD/XD_WE#_1_33_43
MS_BS_7
MS-DATA1_8
MS_DATA0_10
MS-DATA2_12
MS_INS#_14
MS-DATA3_15
MS-SCLK_17
3D3V_CARD_S0
CARD1
CARD1
19
SD-DAT3/MMC-RSV
16
SD-CMD/MMC-CMD
13
SD-VSS/MMC-VSS1
11
SD-VDD/MMC-VDD
9
SD-CLK/MMC-CLK
6
SD-VSS/MMC-VSS2
4
SD-DAT0/MMC-DAT
3
SD-DAT1
21
SD-DAT2
2
SD-WP
1
SD-CD#1
43
SD-CD#43
5
MS-VSS/GND
7
MS-BS
8
MS-DATA1
10
MS-SDIO/DATA0
12
MS-DATA2
14
MS-INS
15
MS-DATA3
17
MS-SCLK
18
MS-VCC
20
MS-VSS/GND
NP1
NP1
CARDBUS40P-SKT-2-GP
CARDBUS40P-SKT-2-GP
20.I0087.I21
20.I0087.I21
2nd = 62.10024.B41
2nd = 62.10024.B41
XD-GND
XD-CD
XD-R/-B
XD-RE
XD-CE
XD-CLE
XD-ALE
XD-WE
XD-WP
XD-GND
XD-D0
XD-D1
XD-D2
XD-D3
XD-D4
XD-D5
XD-D6
XD-D7
XD-VCC
SD-VSS/MMC-VSS2/GND
GND
GND
NP2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
44
42
41
NP2
XD_CD#_39
XD-R/-B_38
XD_RE#_37
XD_CE#_36
XD_CLE_35
XD_ALE_34
SD_CD/XD_WE#_1_33_43
XD_WP_32
XD_D0_30
XD_D1_29
XD_D2_28
XD_D3_27
XD_D4_26
XD_D5_25
XD_D6_24
XD_D7_23
3D3V_CARD_S0
B B
SD-WP_2
12
A A
DY
DY
EC7407
EC7407
Do Not Stuff
Do Not Stuff
XD_ALE_34
12
5
DY
DY
EC7403
EC7403
Do Not Stuff
Do Not Stuff
XD-R/-B_38
12
DY
DY
EC7401
EC7401
Do Not Stuff
Do Not Stuff
MS_BS_7
12
DY
DY
EC7404
EC7404
Do Not Stuff
Do Not Stuff
SD_CD/XD_WE#
12
DY
DY
EC7405
EC7405
Do Not Stuff
Do Not Stuff
MS_INS#_14
12
DY
DY
4
EC7406
EC7406
Do Not Stuff
Do Not Stuff
XD_RE#_37
12
DY
DY
EC7402
EC7402
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CARD Reader CONN
CARD Reader CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
3
Date: Sheet
2
CARD Reader CONN
JE40-HR
JE40-HR
JE40-HR
74 102
74 102
74 102
of
of
of
1
-1
-1
-1
Page 75
5
4
3
2
1
SSID = ExpressCard
+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA
D D
C C
B B
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
New Card
New Card
New Card
JE40-HR
JE40-HR
JE40-HR
75 102
75 102
75 102
1
of
of
-1
-1
-1
Page 76
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
76 102
76 102
76 102
of
of
of
1
-1
Page 77
5
D D
C C
4
3
2
1
B B
A A
5
4
3
(Blanking)
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
77 102
77 102
77 102
1
-1
-1
of
of
of
-1
Page 78
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
78 102
78 102
78 102
of
of
of
1
-1
Page 79
5
4
3
2
1
Note
SSID = User.Interface
D D
Free Fall Sensor
C C
- no via, trace, under the sensor (keep out area around 2mm)
- stay away from the screw hole or metal shield soldering joints
- design PCB pad based on our sensor LGA pad size (add 0.1mm)
- solder stencil opening to 90% of the PCB pad size
- mount the sensor near the center of mass of the NB as possible as you can
JE40 delete G Sensor Function
B B
HR UMA
HR UMA
HR UMA
A A
(1) Keep all signals are the same trace width. (included VDD, GND).
(2) No VIA under IC bottom.
Title
Title
Title
Free Fall Sensor
Free Fall Sensor
Note
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Free Fall Sensor
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
79 102
79 102
79 102
of
of
of
1
-1
Page 80
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
80 102
80 102
80 102
of
of
of
1
-1
Page 81
5
D D
4
3
2
1
(Blanking)
C C
B B
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Reserved
JE40-HR
JE40-HR
JE40-HR
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
-1
-1
81 102
81 102
81 102
of
of
of
1
-1
Page 82
5
4
3
2
1
USBCN1 FFC
PWRCN1 FFC
11
D D
PWRCN1
PWRCN1
ACES-CON10-20-GP
ACES-CON10-20-GP
20.K0422.010
20.K0422.010
2nd = 20.K0382.010
2nd = 20.K0382.010
C C
1
2
3
4
5
6
7
8
9
10
12
ฆ૿
5V_S5
KBC_PWRBTN# 27
FRONT_PWRLED#_Q 68
STDBY_LED#_Q 68
AUD_SPK_L- 29
AUD_SPK_L+ 29
AUD_SPK_R- 29
AUD_SPK_R+ 29
R8105
R8105
Do Not Stuff
Do Not Stuff
1 2
AUD_AGND
EXT_MIC_JD#29
MIC_IN_R29
MIC_IN_L29
ٵ૿
1D5V_S3
28
PCIE_WAKE#19,31,65,66
USB30_SMI#18
COMBO_MIC29
AUD_HP1_JACK_R229
AUD_HP1_JD#29
AUD_HP1_JACK_L229
USB_PN818
USB_PP818
USB_PWR_EN#27,61
PLT_RST#5,18,27,31,36,65,66,71,97
USB3_PEGB_CLKREQ#20
3D3V_S5
5V_S5
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
27
USBCN1
USBCN1
ACES-CON26-11-GP
ACES-CON26-11-GP
20.K0315.026
20.K0315.026
2nd = 20.K0370.026
2nd = 20.K0370.026
USBCN2 FFC
0806 change 10Pin
B B
USBCN2
USBCN2
ACES-CON10-18-GP
ACES-CON10-18-GP
20.K0315.010
20.K0315.010
2nd = 20.K0392.010
2nd = 20.K0392.010
1
CLK_PCIE_USB320
CLK_PCIE_USB3#20
PCIE_RXN520
PCIE_RXP520
A A
PCIE_TXN520
PCIE_TXP520
5
2
3
4
5
6
7
8
9
10
11
12
4
3
-1 add RF connector
BAE40 Only
Wireless_SW27
RF_CN1
RF_CN1
ACES-CON2-11-GP
ACES-CON2-11-GP
20.F0772.002
20.F0772.002
Cabele Wire to BD
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
IO Board Connector
IO Board Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
IO Board Connector
JE40-HR
JE40-HR
JE40-HR
ٵ૿
BAE40
1
BAE40
of
of
of
3
1
2
4
82 102
82 102
82 102
-1
-1
-1
Page 83
5
3D3V_VGA_S0
Do Not Stuff
Do Not Stuff
12
R8303
R8303
DY
DY
SB
ڂ sequence ᄎڶࠟ
R8303 change to pull low ቃఎ ??
VGA_RST#
R8361
R8361
D D
PEG_CLKREQ#20
C C
PEG_TXP[0..15]4
PEG_TXN[0..15]4
B B
A A
DGPU_HOLD_RST#18
3D3V_VGA_S0
Q8301
Q8301
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
20100621 NV suggestion
PEG_RXP[0..15] 4
PEG_RXN[0..15] 4
5
G
SD
1 2
Do Not Stuff
Do Not Stuff
3D3V_VGA_S0
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
CLK_PCIE_VGA20
CLK_PCIE_VGA#20
PEG_RXP0 PEG_C_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
12
R8302
R8302
VGA_RST#
PEG_CLKREQ#_1
C8301Do Not Stuff
C8301Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8302Do Not Stuff
C8302Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8303Do Not Stuff
C8303Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8304Do Not Stuff
C8304Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8305Do Not Stuff
C8305Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8306Do Not Stuff
C8306Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8308Do Not Stuff
C8308Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8307Do Not Stuff
C8307Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8309Do Not Stuff
C8309Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8310Do Not Stuff
C8310Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8311Do Not Stuff
C8311Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8312Do Not Stuff
C8312Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8313Do Not Stuff
C8313Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8314Do Not Stuff
C8314Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8316Do Not Stuff
C8316Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8315Do Not Stuff
C8315Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8318Do Not Stuff
C8318Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8317Do Not Stuff
C8317Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8320Do Not Stuff
C8320Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8319Do Not Stuff
C8319Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8321Do Not Stuff
C8321Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8322Do Not Stuff
C8322Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8323Do Not Stuff
C8323Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8324Do Not Stuff
C8324Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8325Do Not Stuff
C8325Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8326Do Not Stuff
C8326Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8328Do Not Stuff
C8328Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8327Do Not Stuff
C8327Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8330Do Not Stuff
C8330Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8329Do Not Stuff
C8329Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8332Do Not Stuff
C8332Do Not Stuff
12
DIS_Muxless
DIS_Muxless
C8331Do Not Stuff
C8331Do Not Stuff
12
DIS_Muxless
DIS_Muxless
N12P GV : 71.0N12P.A0U
N12P GS: 71.0N12P.E0U
N11P GS: 71.0N11P.E0U
PEG_C_RXN0
PEG_TXP0
PEG_TXN0
PEG_C_RXP1
PEG_C_RXN1
PEG_TXP1
PEG_TXN1
PEG_C_RXP2
PEG_C_RXN2
PEG_TXP2
PEG_TXN2
PEG_C_RXP3
PEG_C_RXN3
PEG_TXP3
PEG_TXN3
PEG_C_RXP4
PEG_C_RXN4
PEG_TXP4
PEG_TXN4
PEG_C_RXP5
PEG_C_RXN5
PEG_TXP5
PEG_TXN5
PEG_C_RXP6
PEG_C_RXN6
PEG_TXP6
PEG_TXN6
PEG_C_RXP7
PEG_C_RXN7
PEG_TXP7
PEG_TXN7
PEG_C_RXP8
PEG_C_RXN8
PEG_TXP8
PEG_TXN8
PEG_C_RXP9
PEG_C_RXN9
PEG_TXP9
PEG_TXN9
PEG_C_RXP10
PEG_C_RXN10
PEG_TXP10
PEG_TXN10
PEG_C_RXP11
PEG_C_RXN11
PEG_TXP11
PEG_TXN11
PEG_C_RXP12
PEG_C_RXN12
PEG_TXP12
PEG_TXN12
PEG_C_RXP13
PEG_C_RXN13
PEG_TXP13
PEG_TXN13
PEG_C_RXP14
PEG_C_RXN14
PEG_TXP14
PEG_TXN14
PEG_C_RXP15
PEG_C_RXN15
PEG_TXP15
PEG_TXN15
AM16
AR13
AR16
AR17
AL17
AM17
AP17
AN17
AM18
AM19
AN19
AP19
AL19
AK19
AR19
AR20
AL20
AM20
AP20
AN20
AM21
AM22
AN22
AP22
AL22
AK22
AR22
AR23
AL23
AM23
AP23
AN23
AM24
AM25
AN25
AP25
AL25
AK25
AR25
AR26
AL26
AM26
AP26
AN26
AM27
AM28
AN28
AP28
AL28
AK28
AR28
AR29
AK29
AL29
AP29
AN29
AM29
AM30
AN31
AP31
AM31
AM32
AR31
AR32
AN32
AP32
AR34
AP34
4
AJ17
AJ18
4
VGA1A
VGA1A
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
PEX_RST#
PEX_CLKREQ#
PEX_TSTCLK_OUT
PEX_TSTCLK_OUT#
PEX_REFCLK
PEX_REFCLK#
PEX_TX0
PEX_TX0#
PEX_RX0
PEX_RX0#
PEX_TX1
PEX_TX1#
PEX_RX1
PEX_RX1#
PEX_TX2
PEX_TX2#
PEX_RX2
PEX_RX2#
PEX_TX3
PEX_TX3#
PEX_RX3
PEX_RX3#
PEX_TX4
PEX_TX4#
PEX_RX4
PEX_RX4#
PEX_TX5
PEX_TX5#
PEX_RX5
PEX_RX5#
PEX_TX6
PEX_TX6#
PEX_RX6
PEX_RX6#
PEX_TX7
PEX_TX7#
PEX_RX7
PEX_RX7#
PEX_TX8
PEX_TX8#
PEX_RX8
PEX_RX8#
PEX_TX9
PEX_TX9#
PEX_RX9
PEX_RX9#
PEX_TX10
PEX_TX10#
PEX_RX10
PEX_RX10#
PEX_TX11
PEX_TX11#
PEX_RX11
PEX_RX11#
PEX_TX12
PEX_TX12#
PEX_RX12
PEX_RX12#
PEX_TX13
PEX_TX13#
PEX_RX13
PEX_RX13#
PEX_TX14
PEX_TX14#
PEX_RX14
PEX_RX14#
PEX_TX15
PEX_TX15#
PEX_RX15
PEX_RX15#
PCI_EXPRESS
PCI_EXPRESS
1 OF 16
1 OF 16
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDD
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_IOVDDQ
PEX_SVDD_3V3
NC#F7
NC#A2
NC#A7
NC#AA4
NC#AB4
NC#AB7
NC#AC5
NC#AD6
NC#AF6
NC#AG6
NC#AJ5
NC#AK15
NC#AL7
NC#B7
NC#C7
NC#D5
NC#D6
NC#D7
NC#E5
NC#E7
NC#F4
NC#G5
NC#H32
NC#P6
NC#U7
NC#V6
NC#Y4
VDD33
VDD33
VDD33
VDD33
VDD33
VDD_SENSE#D35
VDD_SENSE#P7
VDD_SENSE#AD20
GND_SENSE#AD19
GND_SENSE#R7
GND_SENSE#E35
PEX_PLLVDD
NC#AG20
PEX_TERMP
TESTMODE
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
X7R
X7R
12
C8333
C8333
DY
DY
DIS_Muxless
AK16
AK17
AK21
AK24
AK27
AG11
AG12
AG13
AG15
AG16
AG17
AG18
AG22
AG23
AG24
AG25
AG26
AJ14
AJ15
AJ19
AJ21
AJ22
AJ24
AJ25
AJ27
AK18
AK20
AK23
AK26
AL16
AG19
F7
A2
A7
AA4
AB4
AB7
AC5
AD6
AF6
AG6
AJ5
AK15
AL7
B7
HDA_SID_NC
C7
D5
D6
HDA_BLCK_NC
D7
E5
PGOOD
E7
F4
G5
H32
MULTI_STRAP
P6
U7
V6
Y4
J10
J11
J12
J13
J9
LA46: Test point
LKN3: connect to VGA core PWR IC
D35
P7
AD20
AD19
R7
E35
AG14
DIS_Muxless
X7R, Under GPU.
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
X7R, Under GPU.
DIS_Muxless
DIS_Muxless
VGACORE_VDD_SENSE_1
VGACORE_GND_SENSE_1
VCC1R05VIDEO_PEX_PLLVDD
Do Not Stuff
Do Not Stuff
X7R
X7R
12
C8352
C8352
DIS_Muxless
DIS_Muxless
C8344
C8344
X7R, Under GPU.
DIS_Muxless
DIS_Muxless
AG20
AG21
AP35
PEX_TERMP
TESTMODE
R8304
R8304
1 2
R8306
R8306
1 2
DIS_Muxless
DIS_Muxless
3
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
X7R
X7R
12
C8334
C8334
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
DY
DY
12
C8339
C8339
X7R
X7R
12
C8345
C8345
12
DIS_Muxless
DIS_Muxless
12
C8335
C8335
DIS_Muxless
DIS_Muxless
12
C8340
C8340
Do Not Stuff
Do Not Stuff
3.3V +/- 5%
240mA
(See NV DG)
12
C8346
C8346
Do Not Stuff
Do Not Stuff
X7R, Under GPU.
Do Not Stuff
Do Not Stuff
X7R
X7R
12
C8350
C8350
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
X7R, Under GPU.
Do Not Stuff
Do Not Stuff
12
C8354
C8354
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
3
1D05V_VGA_S0
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SB Missed 1x 22uF. C8355 Vendor suggest
12
12
C8337
C8337
C8336
C8336
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
12
C8341
C8341
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
C8338
C8338
DIS_Muxless
DIS_Muxless
12
C8342
C8342
C8343
C8343
Do Not Stuff
Do Not Stuff
SB Missed 1x 22uF. C8356 Vendor suggest
DIS_Muxless
DIS_Muxless
-1 Vendor suggest modify 3D3V_VGA_S0
3D3V_VGA_S0
DIS_Muxless
DIS_Muxless
3.3V +/- 5%
120mA
Do Not Stuff
Do Not Stuff
TP8304Do Not StuffTP8304Do Not Stuff
TP8302Do Not StuffTP8302Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C8355
C8355
(See NV DG)
X7R
X7R
12
C8348
C8348
3D3V_VGA_S0
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C8349
C8349
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
L8301
L8301
12
Do Not Stuff
Do Not Stuff
CHIP BEAD BLM18AG121SN1D
CHIP BEAD BLM18AG121SN1D
12
C8351
C8351
DIS_Muxless
DIS_Muxless
HDA_SID_NC
R8359
R8359
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N12P-GV
N12P-GV
1.05V +/- 3%
120mA
(See NV DG)
1D05V_VGA_S0
2
1.05V +/- 3%
2,200mA
(See NV DG)
1D05V_VGA_S0
-1 delete R8311 for suggest
SB modify to 3D3V_VGA_S0
3D3V_VGA_S0 3D3V_VGA_S0
R8355
R8355
Do Not Stuff
Do Not Stuff
DY
DY
1 2
HDA_BLCK_NC
DIS_Muxless
DIS_Muxless
N12P-GV
N12P-GV
1 2
2
1
11 OF 16
VGA1K
VGA1K
AA9
NC#AA9
AB9
NC#AB9
W9
NC#W9
Y9
NC#Y9
R8310
R8310
Do Not Stuff
DIS_Muxless
DIS_Muxless
R8357
R8357
Do Not Stuff
Do Not Stuff
DY
DY
1 2
R8356
R8356
Do Not Stuff
Do Not Stuff
1 2
1 2
PGOOD
DIS_Muxless
DIS_Muxless
N12P-GV
N12P-GV
Do Not Stuff
AA7
NC#AA7
AA6
NC#AA6
AF1
NC#AF1
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VGA1J
VGA1J
P9
NC#P9
R9
NC#R9
T9
NC#T9
U9
NC#U9
U5
NC#U5
T5
NC#T5
N5
NC#N5
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
MULTI_STRAP
R8360
R8358
R8358
Do Not Stuff
Do Not Stuff
1 2
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
R8360
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N12P-GV
N12P-GV
GPU_PCIE/STRAPPING(1/5)
GPU_PCIE/STRAPPING(1/5)
GPU_PCIE/STRAPPING(1/5)
JE40-HR
JE40-HR
JE40-HR
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
11 OF 16
Y1
NC#Y1
Y2
NC#Y2
Y3
NC#Y3
AB3
NC#AB3
AB2
NC#AB2
AB1
NC#AB1
AC4
NC#AC4
AC1
NC#AC1
AC2
NC#AC2
AC3
NC#AC3
AE3
NC#AE3
AE2
NC#AE2
U6
NC#U6
W6
NC#W6
Y6
NC#Y6
W3
NC#W3
W1
NC#W1
W2
NC#W2
Y5
NC#Y5
V4
NC#V4
W4
NC#W4
AE1
NC#AE1
10 OF 16
10 OF 16
N1
NC#N1
P4
NC#P4
P1
NC#P1
P2
NC#P2
P3
NC#P3
T3
NC#T3
T2
NC#T2
T1
NC#T1
U4
NC#U4
U1
NC#U1
U2
NC#U2
U3
NC#U3
R6
NC#R6
T6
NC#T6
N6
NC#N6
P5
NC#P5
N3
NC#N3
L3
NC#L3
N2
NC#N2
R4
NC#R4
T4
NC#T4
N4
NC#N4
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
83 102
83 102
83 102
of
of
1
of
-1
-1
-1
Page 84
5
4
3
2
1
LVDS Interface
VGA1G
VGA1G
1.05V +/- 3%
220mA
(See NV DG)
D D
C C
1D05V_VGA_S0
DG requires X7R for
1uF and 4.7uF as well.
3.3V +/- 5%
220mA
(See NV DG)
1D8V_VGA_S0
DG requires X7R for
1uF and 4.7uF as well.
L8401
L8401
Do Not Stuff
Do Not Stuff
CHIP BEAD BLM18AG121SN1D
CHIP BEAD BLM18AG121SN1D
1 2
DIS
DIS
C8403
C8403
DIS
DIS
Missed 1x 0.1uF
180ohm@100MHz ESR=0.15
DIS
DIS
1 2
L8402
L8402
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C8404
C8404
DIS
DIS
Do Not Stuff
Do Not Stuff
12
12
R8411
R8411
Do Not Stuff
Do Not Stuff
Muxless
Muxless
Do Not Stuff
Do Not Stuff
12
C8405
C8405
DIS
DIS
IFPAB_PLLVDD
IFPAB_RSET
1 2
R8401
R8401
DY
DY
Do Not Stuff
Do Not Stuff
IFPAB_IOVDD
Missed 1x 0.1uF
Muxless
Muxless
12
R8408
R8408
Do Not Stuff
Do Not Stuff
AK9
AJ11
AG9
AG10
IFPAB_PLLVDD
IFPAB_RSET
IFPA_IOVDD
IFPB_IOVDD
IFPAB
IFPAB
X7R, Under GPU.
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
9 OF 16
VGA1I
VGA1I
IFPEF
IFPEF
9 OF 16
7 OF 16
7 OF 16
IFPA_TXD0#
IFPA_TXD0
IFPA_TXD1#
IFPA_TXD1
IFPA_TXD2#
IFPA_TXD2
IFPA_TXD3#
IFPA_TXD3
IFPA_TXC#
IFPA_TXC
IFPB_TXD4#
IFPB_TXD4
IFPB_TXD5#
IFPB_TXD5
IFPB_TXD6#
IFPB_TXD6
IFPB_TXD7#
IFPB_TXD7
IFPB_TXC#
IFPB_TXC
GPIO0
AL8
AM8
AM9
AM10
AL10
AK10
AL11
AK11
AM12
AM11
AP8
AN8
AN10
AP10
AR10
AR11
AP11
AN11
AN13
AP13
K1
GPU_LVDSA_TX0# 94
GPU_LVDSA_TX0 94
GPU_LVDSA_TX1# 94
GPU_LVDSA_TX1 94
GPU_LVDSA_TX2# 94
GPU_LVDSA_TX2 94
GPU_LVDSA_TXC# 94
GPU_LVDSA_TXC 94
IFPC_IOVDD_PWR
Muxless
Muxless
SB modify connector to IFPCDE_PLLVDD_PWR
Under GPU.
IFPC_IOVDD_PWR
SB modify connector to IFPC_IOVDD_PWR
SA R8412, R8413 change DY
SB R8412, R8413 change delete
1.05V +/- 3%
285mA
(See NV DG)
1D05V_VGA_S0
IFPE_L3#
IFPE_L3
IFPE_L2#
IFPE_L2
IFPE_L1#
IFPE_L1
IFPE_L0#
IFPE_L0
GPIO15
IFPF_L3#
IFPF_L3
IFPF_L2#
IFPF_L2
IFPF_L1#
IFPF_L1
IFPF_L0#
IFPF_L0
GPIO21
AD4
AE4
AE5
AE6
AF5
AF4
AG4
AH4
AH5
AH6
L1
AF2
AF3
AH3
AH2
AH1
AJ1
AJ2
AJ3
AL3
AL2
K6
4
3
IFPE_AUX_I2CY_SDA#
IFPE_AUX_I2CY_SCL
B B
12
R8414
R8414
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
AJ6
AL1
IFPEF_PLLVDD
IFPEF_RSET
Under GPU.
IFPDE_PLL_IO_VDD
12
R8407
R8407
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
A A
AE7
IFPE_IOVDD
AD7
IFPF_IOVDD
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
5
IFPF_AUX_I2CZ_SDA#
IFPF_AUX_I2CZ_SCL
IFPCDE_PLLVDD_PWR
Do Not Stuff
Do Not Stuff
DIS
DIS
12
X7R, Under GPU.
R8410
R8410
Do Not Stuff
Do Not Stuff
IFPCDE_PLLVDD_PWR
X7R
X7R
12
C8402
C8402
IFPC_RSET_AK7
12
R8402
R8402
Do Not Stuff
Do Not Stuff
DIS
DIS
check R8402
VGA1H
VGA1H
AJ9
IFPC_PLLVDD
AK7
IFPC_RSET
AJ8
IFPC_IOVDD
Do Not Stuff
Do Not Stuff
VGA1E
VGA1E
AC6
IFPD_PLLVDD
AB6
IFPD_RSET
AK8
IFPD_IOVDD
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
IFPC
IFPC
IFPD
IFPD
8 OF 16
8 OF 16
IFPC_AUX_I2CW_SDA#
IFPC_AUX_I2CW_SCL
IFPC_L3#
IFPC_L3
IFPC_L2#
IFPC_L2
IFPC_L1#
IFPC_L1
IFPC_L0#
IFPC_L0
GPIO1
5 OF 16
5 OF 16
IFPD_AUX_I2CX_SDA#
IFPD_AUX_I2CX_SCL
IFPD_L3#
IFPD_L3
IFPD_L2#
IFPD_L2
IFPD_L1#
IFPD_L1
IFPD_L0#
IFPD_L0
GPIO19
HDMI Interface
3.3V +/- 5%
440mA (220mA each, max 2 links)
220ohm@100MHz ESR=0.05 300ohm@100MHz ESR=0.25
IFPC_IOVDD_PWR
L8403
L8403
Do Not Stuff
Do Not Stuff
1 2
DIS
DIS
12
C8409
C8409
DIS
DIS
Do Not Stuff
Do Not Stuff
X7R, Under GPU.
2
(See NV DG)
3D3V_VGA_S0
DG requires X7R for
1uF and 4.7uF as well.
L8405
L8405
Do Not Stuff
Do Not Stuff
1 2
DIS
DIS
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
AN3
AP2
AR2
AP1
AM4
AM3
AM5
AL5
AM6
AM7
K2
AN4
AP4
AR4
AR5
AP5
AN5
AN7
AP7
AR7
AR8
L7
12
C8417
C8417
Do Not Stuff
Do Not Stuff
DIS
DIS
GPU Memory(2/5)
GPU Memory(2/5)
GPU Memory(2/5)
JE40-HR
JE40-HR
JE40-HR
GPU_HDMI_DATA 51
GPU_HDMI_CLK 51
HDMI_CLK# 51
HDMI_CLK 51
HDMI_DATA0# 51
HDMI_DATA0 51
HDMI_DATA1# 51
HDMI_DATA1 51
HDMI_DATA2# 51
HDMI_DATA2 51
HDMI_HPD_DET 51
IFPCDE_PLLVDD_PWR
12
12
R8409
R8409
C8418
C8418
Do Not Stuff
Do Not Stuff
Muxless
Muxless
DIS
DIS
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
84 102
of
84 102
of
84 102
1
-1
-1
-1
Page 85
5
4
3
2
1
EDP 10A
2 OF 16
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28
FBA_CMD29
FBA_CMD30
FBA_CMD31
FBA_CLK0#
FBA_CLK1#
FBA_DEBUG0
FBA_DEBUG1
FB_DLLAVDD
FB_PLLAVDD
FB_DLLAVDD
FB_PLLAVDD
CLKA0
DIS_Muxless
DIS_Muxless
CLKA0#
2 OF 16
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CLK0
FBA_CLK1
AA27
AA29
AA31
AB27
AB29
AC27
AD27
AE27
AJ28
B18
E21
G17
G18
G22
G8
G9
H29
J14
J15
J16
J17
J20
J21
J22
J23
J24
J29
U30
-FBA_CS0 88
V30
U31
FBA_ODT0 88
V32
FBA_CKE0 88
T35
U33
FBA_RST 88,89
W32
FBA_A9 88,89
W33
FBA_A7 88,89
W31
FBA_A2 88,89
W34
FBA_A0 88,89
U34
FBA_A4 88,89
U35
FBA_A1 88,89
U32
FBA_BA0 88,89
T34
-FBA_WE 88,89
T33
W30
-FBA_CAS 88,89
AB30
-FBA_CS1 89
AA30
AB31
FBA_ODT1 89
AA32
FBA_CKE1 89
AB33
FBA_A13 88,89
Y32
FBA_A8 88,89
Y33
FBA_A6 88,89
AB34
FBA_A11 88,89
AB35
FBA_A5 88,89
Y35
FBA_A3 88,89
W35
FBA_BA2 88,89
Y34
FBA_BA1 88,89
Y31
FBA_A12 88,89
Y30
FBA_A10 88,89
W29
-FBA_RAS 88,89
Y29
T32
T31
AC31
AC30
T30
T29
AG27
AF27
J19
J18
R8518
R8518
R8519
R8519
CLKA0 88
CLKA0# 88
CLKA1 89
CLKA1# 89
1 2
DY
DY
1 2
DY
DY
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
X7R
X7R
12
Do Not Stuff
Do Not Stuff
1D5V_VGA_S0
FB_PLLVDD_16mil
C8513
C8513
DIS_Muxless
DIS_Muxless
X7R
X7R
12
C8514
C8514
Do Not Stuff
Do Not Stuff
X7R, Under GPU.
12
R8505
R8505
Do Not Stuff
Do Not Stuff
FBA_CKE0
CKE0
FBA_CKE1
CKE1
FBA_RST
Reset
FBA_ODT0
ODT0
FBA_ODT1
ODT1
DIS_Muxless
DIS_Muxless
4
VGA1B
VGA1B
MDA[63..0]88,89 MDB[63..0]90,91
D D
C C
DQMA088
DQMA188
DQMA288
DQMA388
DQMA489
DQMA589
DQMA689
DQMA789
B B
A A
MDA0
L32
FBA_D0
MDA1
N33
FBA_D1
MDA2
L33
FBA_D2
MDA3
N34
FBA_D3
MDA4
N35
FBA_D4
MDA5
P35
FBA_D5
MDA6
P33
FBA_D6
MDA7
P34
FBA_D7
MDA8
K35
FBA_D8
MDA9
K33
FBA_D9
MDA10
K34
FBA_D10
MDA11
H33
FBA_D11
MDA12
G34
FBA_D12
MDA13
G33
FBA_D13
MDA14
E34
FBA_D14
MDA15
E33
FBA_D15
MDA16
G31
FBA_D16
MDA17
F30
FBA_D17
MDA18
G30
FBA_D18
MDA19
G32
FBA_D19
MDA20
K30
FBA_D20
MDA21
K32
FBA_D21
MDA22
H30
FBA_D22
MDA23
K31
FBA_D23
MDA24
L31
FBA_D24
MDA25
L30
FBA_D25
MDA26
M32
FBA_D26
MDA27
N30
FBA_D27
MDA28
M30
FBA_D28
MDA29
P31
FBA_D29
MDA30
R32
FBA_D30
MDA31
R30
FBA_D31
MDA32
AG30
FBA_D32
MDA33
AG32
FBA_D33
MDA34
AH31
FBA_D34
MDA35
AF31
FBA_D35
MDA36
AF30
FBA_D36
MDA37
AE30
FBA_D37
MDA38
AC32
FBA_D38
MDA39
AD30
FBA_D39
MDA40
AN33
FBA_D40
MDA41
AL31
FBA_D41
MDA42
AM33
FBA_D42
MDA43
AL33
FBA_D43
MDA44
AK30
FBA_D44
MDA45
AK32
FBA_D45
MDA46
AJ30
FBA_D46
MDA47
AH30
FBA_D47
MDA48
AH33
FBA_D48
MDA49
AH35
FBA_D49
MDA50
AH34
FBA_D50
MDA51
AH32
FBA_D51
MDA52
AJ33
FBA_D52
MDA53
AL35
FBA_D53
MDA54
AM34
FBA_D54
MDA55
AM35
FBA_D55
MDA56
AF33
FBA_D56
MDA57
AE32
FBA_D57
MDA58
AF34
FBA_D58
MDA59
AE35
FBA_D59
MDA60
AE34
FBA_D60
MDA61
AE33
FBA_D61
MDA62
AB32
FBA_D62
MDA63
AC35
FBA_D63
P32
FBA_DQM0
H34
FBA_DQM1
J30
FBA_DQM2
P30
FBA_DQM3
AF32
FBA_DQM4
AL32
FBA_DQM5
AL34
FBA_DQM6
AF35
FBA_DQM7
5
L34
FBA_DQS_WP0
H35
FBA_DQS_WP1
J32
FBA_DQS_WP2
N31
FBA_DQS_WP3
AE31
FBA_DQS_WP4
AJ32
FBA_DQS_WP5
AJ34
FBA_DQS_WP6
AC33
FBA_DQS_WP7
L35
FBA_DQS_RN0
G35
FBA_DQS_RN1
H31
FBA_DQS_RN2
N32
FBA_DQS_RN3
AD32
FBA_DQS_RN4
AJ31
FBA_DQS_RN5
AJ35
FBA_DQS_RN6
AC34
FBA_DQS_RN7
P29
FBA_WCK0
R29
FBA_WCK0#
L29
FBA_WCK1
M29
FBA_WCK1#
AG29
FBA_WCK2
AH29
FBA_WCK2#
AD29
FBA_WCK3
AE29
FBA_WCK3#
J27
NC#J27
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
CLKA1
DIS_Muxless
DIS_Muxless
CLKA1#
12
QSAP_088
QSAP_188
QSAP_288
QSAP_388
QSAP_489
QSAP_589
QSAP_689
QSAP_789
QSAN_088
QSAN_188
QSAN_288
QSAN_388
QSAN_489
QSAN_589
QSAN_689
QSAN_789
R8504
R8504
Do Not Stuff
Do Not Stuff
FBA
FBA
DC tolerance +/- 75mV
AC tolerance +/- 50mV < 100MHz
X7R
X7R
X7R
X7R
X7R
X7R
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
C8504
C8504
12
C8505
C8505
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
12
C8506
C8506
X7R, Under GPU.
12
12
C8515
C8515
C8516
C8516
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Group A
12
R8508
R8508
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
12
R8509
R8509
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
X7R
X7R
X7R
X7R
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
C8507
C8507
12
C8512
C8512
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
X7R
X7R
12
C8508
C8508
DIS_Muxless
DIS_Muxless
X7R, Near GPU.
1.05V +/- 3%
200mA
(See NV DG)
1D05V_VGA_S0
L8501
L8501
(
(
(
(
21
Do Not Stuff
Do Not Stuff
CHIP BEAD BLM18KG300TN1D MURATA
CHIP BEAD BLM18KG300TN1D MURATA
DIS_Muxless
DIS_Muxless
12
12
R8510
R8510
R8511
R8511
R8512
R8512
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
X7R
X7R
12
C8509
C8509
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
3
1D5V_VGA_S0
12
C8510
C8510
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
R8513
R8513
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8511
C8511
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
R8514
R8514
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Group B
12
R8515
R8515
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
R8516
R8516
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DQMB090
DQMB190
DQMB290
DQMB390
DQMB491
DQMB591
DQMB691
DQMB791
12
Do Not Stuff
Do Not Stuff
QSBP_090
QSBP_190
QSBP_290
QSBP_390
QSBP_491
QSBP_591
QSBP_691
QSBP_791
QSBN_090
QSBN_190
QSBN_290
QSBN_390
QSBN_491
QSBN_591
QSBN_691
QSBN_791
FBB_CKE0
FBB_CKE1
FBB_RST
FBB_ODT0
FBB_ODT1
DIS_Muxless
DIS_Muxless
R8517
R8517
CKE0
CKE1
Reset
ODT0
ODT1
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
VGA1C
VGA1C
B13
FBB_D0
D13
FBB_D1
A13
FBB_D2
A14
FBB_D3
C16
FBB_D4
B16
FBB_D5
A17
FBB_D6
D16
FBB_D7
C13
FBB_D8
B11
FBB_D9
C11
FBB_D10
A11
FBB_D11
C10
FBB_D12
C8
FBB_D13
B8
FBB_D14
A8
FBB_D15
E8
FBB_D16
F8
FBB_D17
F10
FBB_D18
F9
FBB_D19
F12
FBB_D20
D8
FBB_D21
D11
FBB_D22
E11
FBB_D23
D12
FBB_D24
E13
FBB_D25
F13
FBB_D26
F14
FBB_D27
F15
FBB_D28
E16
FBB_D29
F16
FBB_D30
F17
FBB_D31
D29
FBB_D32
F27
FBB_D33
F28
FBB_D34
E28
FBB_D35
D26
FBB_D36
F25
FBB_D37
D24
FBB_D38
E25
FBB_D39
E32
FBB_D40
F32
FBB_D41
D33
FBB_D42
E31
FBB_D43
C33
FBB_D44
F29
FBB_D45
D30
FBB_D46
E29
FBB_D47
B29
FBB_D48
C31
FBB_D49
C29
FBB_D50
B31
FBB_D51
C32
FBB_D52
B32
FBB_D53
B35
FBB_D54
B34
FBB_D55
A29
FBB_D56
B28
FBB_D57
A28
FBB_D58
C28
FBB_D59
C26
FBB_D60
D25
FBB_D61
B25
FBB_D62
A25
FBB_D63
A16
FBB_DQM0
D10
FBB_DQM1
F11
FBB_DQM2
D15
FBB_DQM3
D27
FBB_DQM4
D34
FBB_DQM5
A34
FBB_DQM6
D28
FBB_DQM7
C14
FBB_DQS_WP0
A10
FBB_DQS_WP1
E10
FBB_DQS_WP2
D14
FBB_DQS_WP3
E26
FBB_DQS_WP4
D32
FBB_DQS_WP5
A32
FBB_DQS_WP6
B26
FBB_DQS_WP7
B14
FBB_DQS_RN0
B10
FBB_DQS_RN1
D9
FBB_DQS_RN2
E14
FBB_DQS_RN3
F26
FBB_DQS_RN4
D31
FBB_DQS_RN5
A31
FBB_DQS_RN6
A26
FBB_DQS_RN7
G14
FBB_WCK0
G15
FBB_WCK0#
G11
FBB_WCK1
G12
FBB_WCK1#
G27
FBB_WCK2
G28
FBB_WCK2#
G24
FBB_WCK3
G25
FBB_WCK3#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
CLKB1
DIS_Muxless
DIS_Muxless
FBCLK Termination place on VRAM sideFBCLK Termination place on VRAM side
2
FBB
FBB
FBB_CMD0
FBB_CMD1
FBB_CMD2
FBB_CMD3
FBB_CMD4
FBB_CMD5
FBB_CMD6
FBB_CMD7
FBB_CMD8
FBB_CMD9
FBB_CMD10
FBB_CMD11
FBB_CMD12
FBB_CMD13
FBB_CMD14
FBB_CMD15
FBB_CMD16
FBB_CMD17
FBB_CMD18
FBB_CMD19
FBB_CMD20
FBB_CMD21
FBB_CMD22
FBB_CMD23
FBB_CMD24
FBB_CMD25
FBB_CMD26
FBB_CMD27
FBB_CMD28
FBB_CMD29
FBB_CMD30
FBB_CMD31
FBB_CLK0
FBB_CLK0#
FBB_CLK1
FBB_CLK1#
FBB_DEBUG0
FBB_DEBUG1
FB_CAL_PD_VDDQ
FB_CAL_PU_GND
FB_CAL_TERM_GND
12
R8506
R8506
Do Not Stuff
Do Not Stuff
CLKB0
DIS_Muxless
DIS_Muxless
CLKB0#CLKB1#
1D5V_VGA_S0
3 OF 16
3 OF 16
N27
FBVDDQ
P27
FBVDDQ
R27
FBVDDQ
T27
FBVDDQ
U27
FBVDDQ
U29
FBVDDQ
V27
FBVDDQ
V29
FBVDDQ
V34
FBVDDQ
W27
FBVDDQ
Y27
FBVDDQ
F18
E19
D18
C17
F19
C19
B17
E20
B19
D20
A19
D19
C20
F20
B20
G21
F22
F24
F23
C25
C23
F21
E22
D21
A23
D22
B23
C22
B22
A22
A20
G20
E17
D17
D23
E23
G19
G16
FB_CAL_PD_VDDQ
K27
FB_CAL_PU_GND
L27
FB_CAL_TERM_GND
M27
12
R8507
R8507
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
-FBB_CS0 90
FBB_ODT0 90
FBB_CKE0 90
FBB_RST 90,91
FBB_A9 90,91
FBB_A7 90,91
FBB_A2 90,91
FBB_A0 90,91
FBB_A4 90,91
FBB_A1 90,91
FBB_BA0 90,91
-FBB_WE 90,91
-FBB_CAS 90,91
-FBB_CS1 91
FBB_ODT1 91
FBB_CKE1 91
FBB_A13 90,91
FBB_A8 90,91
FBB_A6 90,91
FBB_A11 90,91
FBB_A5 90,91
FBB_A3 90,91
FBB_BA2 90,91
FBB_BA1 90,91
FBB_A12 90,91
FBB_A10 90,91
-FBB_RAS 90,91
CLKB0 90
CLKB0# 90
CLKB1 91
CLKB1# 91
1D5V_VGA_S0
R8520
R8520
1 2
DY
DY
R8521
R8521
Do Not Stuff
Do Not Stuff
1 2
DY
DY
Do Not Stuff
Do Not Stuff
1D5V_VGA_S0
DIS_Muxless
DIS_Muxless
R8501
R8501
1 2
Do Not Stuff
Do Not Stuff
12
12
R8502
DIS_Muxless
DIS_Muxless
GPU_DP/LVDS/CRT/GPIO(3/5)
GPU_DP/LVDS/CRT/GPIO(3/5)
GPU_DP/LVDS/CRT/GPIO(3/5)
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
R8502
R8503
R8503
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
JE40-HR
JE40-HR
JE40-HR
1
DIS_Muxless
DIS_Muxless
85 102
85 102
85 102
-1
-1
-1
of
of
of
Page 86
5
300ohm@100MHz ESR=0.25ohm
Do Not Stuff
Do Not Stuff
Do Not Stuff
VGA1D
VGA1D
DACA_VDD
DACA_VREF
DACA_RSET
Do Not Stuff
Do Not Stuff
Do Not Stuff
X7R
X7R
12
12
Do Not Stuff
Do Not Stuff
C8602
C8602
C8601
C8601
DIS
DIS
DIS
DIS
DACA
DACA
3D3V_VGA_S0_DACA_VDD_16MIL
12
Muxless
Muxless
R8629
R8629
Do Not Stuff
Do Not Stuff
D D
DACA_VREF_AK12
12
12
DIS
DIS
C8609
C8609
R8603
R8603
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS
DIS
X7R, Under GPU.
AJ12
AK12
AK13
delete 10K DY to GND
12
Do Not Stuff
Do Not Stuff
C8603
C8603
DIS
DIS
Missed 3x 0.1uF
4 OF 16
4 OF 16
I2CA_SCL
I2CA_SDA
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
L8602
L8602
1 2
DIS
DIS
3.3V +/- 5%
120mA
(See NV DG)
G1
G4
AM13
AL13
AM15
AM14
AL14
3D3V_VGA_S0
VGA_CRT_BLUE
VGA_CRT_GREEN
VGA_CRT_RED
20100621 NV suggestion
VGA_CRT_DDCCLK 95
VGA_CRT_DDCDATA 95
VGA_CRT_HSYNC 95
VGA_CRT_VSYNC 95
VGA_CRT_RED 95
VGA_CRT_GREEN 95
VGA_CRT_BLUE 95
RN8602
RN8602
1
8
2
7
3
6
4 5
Do Not Stuff
Do Not Stuff
DIS
DIS
VGA Thermal sensor P2800
DIS_Muxless
DIS_Muxless
1 2
R8639
6
5
SMBD_THERM_NV
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
ROM_CS#
ROM_SI_D3
ROM_SO_C4
ROM_SLK_D4
STRAP0
STRAP1
STRAP2
I2CH_SCL_F6
I2CH_SDA_G6
R8609
R8609
TP8602Do Not StuffTP8602Do Not Stuff
TP8612 Do Not StuffTP8612 Do Not Stuff
3D3V_VGA_S0
DY
DY
12
R8610
R8610
R8639
Do Not Stuff
Do Not Stuff
SML1_CLK 20,27
3D3V_VGA_S0
Do Not Stuff
Do Not Stuff
12
12
R8611
R8611
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
SB change 3D3V_VGA_S0,
R8638 change DY
R8638
R8638
Do Not Stuff
Do Not Stuff
1 2
Q8601
Q8601
Do Not Stuff
3D3V_VGA_S0
TP8610
TP8610
Do Not Stuff
Do Not Stuff
TP8611
TP8611
Do Not Stuff
Do Not Stuff
J26
J25
AB5
N9
M9
SMBC_THERM_NV
SML1_DATA20,27
VGA1L
VGA1L
B4
THERMDN
B5
THERMDP
AP14
JTAG_TCK
AR14
JTAG_TMS
AN14
JTAG_TDI
AN16
JTAG_TDO
AP16
JTAG_TRST#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VGA1M
VGA1M
NC#J26
NC#J25
CEC
MULTI_STRAP_REF0_GND
MULTI_STRAP_REF1_GND
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
MISC1
MISC1
MISC2
MISC2
4
RN8605
RN8605
Do Not Stuff
C C
B B
A A
1
SB R8619 15" DY
TP8603Do Not StuffTP8603Do Not Stuff
TP8604Do Not StuffTP8604Do Not Stuff
TP8605Do Not StuffTP8605Do Not Stuff
DIS_Muxless
DIS_Muxless
12
R8612
R8612
R8613
R8613
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
2 3
SMBC_THERM_NV
SMBD_THERM_NV
Modify SMBUS
Do Not Stuff
Do Not Stuff
TP8601
TP8601
DY
DY
R8619
R8619
Do Not Stuff
Do Not Stuff
N12P_GPIO_JTAG_TCK
1 2
N12P_JTAG_TMS
N12P_JTAG_TDI
N12P_JTAG_TDO
N12P_GPIO_JTAG_TRST
1 2
R8620
R8620
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
3D3V_VGA_S0
12
R8628
R8628
Do Not Stuff
Do Not Stuff
CEC_AB5
STRAP_REF0_GND_N9
STRAP_REF1_GND_M9
12
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
5
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.DM601.03F
2nd = 84.DM601.03F
DIS_Muxless
DIS_Muxless
12 OF 16
12 OF 16
I2CS_SCL
I2CS_SDA
I2CC_SCL
I2CC_SDA
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO16
GPIO17
GPIO18
GPIO20
GPIO22
GPIO23
GPIO24
13 OF 16
13 OF 16
ROM_CS#
ROM_SI
ROM_SO
ROM_SCLK
STRAP0
STRAP1
STRAP2
I2CH_SCL
I2CH_SDA
NC#A5
BUFRST#
NC#C5
GND
GND
1
2
3 4
E2
E1
E3
E4
K3
H3
H2
H1
H4
H5
H6
J7
K4
K5
H7
J4
J6
L2
L4
M4
L5
L6
M6
M7
SMBC_THERM_NV
SMBD_THERM_NV
N12P_GPIO7_H5
N12P_GPIO8_H6
N12P_GPIO9_J7
N12P_GPIO12_H7
N12P_GPIO7_M4
C3
D3
C4
D4
W5
W7
V7
F6
G6
A5
A4
C5
AK14
K9
4
DACB_VDD_AG7
12
R8616
R8616
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
3D3V_VGA_S0
SB
ଥޏՂٙ,թ౨ၒ٤ຒ
Pull high
DIS
DIS
3D3V_VGA_S0
DIS_Muless
DIS_Muless
R8614
R8614
Do Not Stuff
Do Not Stuff
1 2
1 2
R8615
R8615
Do Not Stuff
Do Not Stuff
DIS_Muless
DIS_Muless
4
VGA1F
VGA1F
AG7
DACB_VDD
AK6
DACB_VREF
AH7
DACB_RSET
Do Not Stuff
Do Not Stuff
ڇ
GPU_LVDS_CLK 94
GPU_LVDS_DATA 94
12
R8642
R8642
Do Not Stuff
Do Not Stuff
Page 94
DIS
DIS
DACB
DACB
12
R8623
R8623
Do Not Stuff
Do Not Stuff
6 OF 16
6 OF 16
I2CB_SCL
I2CB_SDA
DACB_HSYNC
DACB_VSYNC
DACB_RED
DACB_GREEN
DACB_BLUE
VGA_LBKLT_CTL 94
VGA_LCDVDD_EN 94
VGA_BLEN 94
PWRCNTL_0 92
PWRCNTL_1 92
G3
G2
AM1
AM2
AK4
AL4
AJ4
I2CB_SCL_G3
I2CB_SDA_G2
RN8604
RN8604
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
P-STATE
P12
P8
P0
ቃ
1234
0.9V
PWRCNTL_0
PWRCNTL_1
3D3V_VGA_S0
SJM50-CP SUPPORT
00
1 0 1.03V
3D3V_VGA_S0 3D3V_VGA_S0
DIS_Muxless
DIS_Muxless
1 2
DY
DY
1 2
TABLENVIDIA
Hynix 2G
0110
128*16*8
800MHZ
RO M_SIPD
R8627
GPU_ROM_SI
GPU_ROM_SO
GPU_ROM_SCLK
Hy2G_64.34825.6DL,Hy1G_64.15025.6DL,Sam1G512M_64.20025.6DL,Sam2G_64.45325.6DL
Hy2G_64.34825.6DL,Hy1G_64.15025.6DL,Sam1G512M_64.20025.6DL,Sam2G_64.45325.6DL
34.8Kohm
64.34825.6DL
for 1Gbit
for 2Gbit
Hynix VRAM
Hynix VRAM
RAM_CFG[0]=0
RAM_CFG[0]=0
RAM_CFG[1]=1
RAM_CFG[1]=1
RAM_CFG[2]=0
RAM_CFG[2]=1
RAM_CFG[3]=0
RAM_CFG[3]=0
VGA_DEVICE =1 (low bit)
SMB_ALT_ADDR =0
FB_0_BAR_SIZE =0
XCLK_417 =0 (High bit)
PEX_PLL_EN_TERM =0
SLOT_CLK_CFG =1
SUB_VENDOR =0
PCI_DEVID[4] =1
Hynix 1G
0000
64*16*8
800MHZ
64.49915.6DL
for 1Gbit
Samsung VRAM
RAM_CFG[0]=1
RAM_CFG[1]=1
RAM_CFG[2]=0
RAM_CFG[3]=0
N11P Fermi QS 1
5Kohm
for 2Gbit
Samsung VRAM
RAM_CFG[0]=1
RAM_CFG[1]=1
RAM_CFG[2]=1
RAM_CFG[3]=0
3
10
R8640
R8640
Do Not Stuff
Do Not Stuff
R8643
R8643
Do Not Stuff
Do Not Stuff
Samsung 1G
0011
64*16*8
800MHZ
64.20025.6DL
3
N11M-GE2 N11M-OP1
0.85V
0.85V
0.85V
0.85V
1.03V
R8644
R8644
Do Not Stuff
Do Not Stuff
DY
DY
1 2
R8641
R8641
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
20Kohm
Logical Strap Bit Mapping
Resistor Pull-up Pull-down
5Kohms 1000 0000
10Kohms 1001 0001
15Kohms 1010 0010
20Kohms 1011 0011
25Kohms 1100 0100
30Kohms 1101 0101
35Kohms 1110 0110
45Kohms 1111 0111
ROM_SI_D3
ROM_SO_C4
ROM_SLK_D4
R8627
R8627
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N11P-GE1NVVDD_ALTV0NVVDD_ALTV1 N11M-GE1
0.85V
0.80V
0.85V
0.85V
1.03V
0.95V
Samsung 512
64*16*4
800MHZ
20Kohm
64.20025.6DL
3D3V_VGA_S0
12
R8624
R8624
Do Not Stuff
Do Not Stuff
DY
DY
12
DIS_Muxless
DIS_Muxless
N12P-GS
N12P-GS
N11P-GE Fermi
0.85V
0.9V
0.95V
1.05V +/- 3%
150mA
(See NV DG)
CHIP BEAD BLM18KG300TN1D MURATA
CHIP BEAD BLM18KG300TN1D MURATA
Samsung 2G
0111
128*16*8
800MHZ
45Kohm
64.45325.6DL
R8625
R8625
Do Not Stuff
Do Not Stuff
12
12
DIS_Muxless
DIS_Muxless
N12P-GV
N12P-GV
12
12
R8617
R8617
Do Not Stuff
Do Not Stuff
DY
DY
PLLVDD_PWR1D05V_VGA_S0
L8601
L8601
Do Not Stuff
Do Not Stuff
(
(
(
(
21
DIS_Muxless
DIS_Muxless
SB DIS_Muxless
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV:64.49915.6DL
N12PGS_N12PGV:64.49915.6DL
R8626
R8626
Do Not Stuff
Do Not Stuff
R8618
R8618
Do Not Stuff
Do Not Stuff
C8605
C8605
12
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
X7R, Under GPU.
TP8609Do Not StuffTP8609Do Not Stuff
ຟՂٙࢨ
TABLE
NVIDIA
STRAP0
STRAP1
STRAP2
12
R8630
R8630
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
STRAP0
STRAP1
STRAP2
12
DY
DY
2
C8606
C8606
C8607
C8607
C8608
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DY??
C8608
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DY
DY
DIS_Muxless
DIS_Muxless
VIDEO_CLK_XTAL_SS
12
R8604
R8604
Do Not Stuff
Do Not Stuff
12
Do Not Stuff
Do Not Stuff
71.0N12P.E0U 71.0N12P.A0U
N12P-GS
DEV ID:
0x0DF4
25KohmSTRAP2 PU
64.24925.6DL
USER[0]=1
N12P-GS
USER[1]=1
USER[2]=1
USE 1111 (45K)
USER[3]=1
3GIO_PADCFG[0]=0
3GIO_PADCFG[1]=1
3GIO_PADCFG[2]=1
3GIO_PADCFG[3]=1
PCI_DEVID[0]=1
PCI_DEVID[1]=0
PCI_DEVID[2]=0
PCI_DEVID[3]=0
R8631
R8631
Do Not Stuff
Do Not Stuff
2
0
1
1
0
USE 0110 (35K)
N12P-GS GF108-730-A1 0x0DF4 (0X4) (0100)
N12P-GV1 GF108-705-A1 0x0DF7 (0X7) (0111)
N11P-GS Fermi 0x0DF0 (0000)
N11P-GE Fermi 0x0DF1 (0001)
3D3V_VGA_S0
12
DY
DY
R8632
R8632
Do Not Stuff
Do Not Stuff
12
R8633
R8633
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VGA1N
VGA1N
AE9
PLLVDD
AD9
VID_PLLVDD
AF9
SP_PLLVDD
D2
XTAL_SSIN
B1
XTAL_IN
Do Not Stuff
Do Not Stuff
20PF 5% 50V +/-0.25PF 0402
R8606
R8606
27MHZ_IN
Do Not Stuff
Do Not Stuff
1 2
DY
DY
DIS_Muxless
DIS_Muxless
1 2
X8601
C8610
C8610
Do Not Stuff
Do Not Stuff
X8601
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 82.30034.521
2nd = 82.30034.521
12
-1 modify N12P GV setting
N12P-GV
DEV ID:
0x1050
45Kohm
ES 45K QS 5K
64.49915.6DL
N12P-GV
12
R8634
R8634
Do Not Stuff
Do Not Stuff
DY
DY
12
R8635
R8635
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV:64.49915.6DL
N12PGS_N12PGV:64.49915.6DL
14 OF 16
XTAL_PLL
XTAL_PLL
Do Not Stuff
Do Not Stuff
27MHZ_OUT_R
N11P-GE Fermi
DEV ID:
0x0DF1
(0001)
14 OF 16
N12P_XTAL_OUTBUFF
D1
XTAL_OUTBUFF
B2
XTAL_OUT
R8607
R8607
DIS_Muxless
DIS_Muxless
1 2
12
C8611
C8611
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
SB HOSONIC modify to 12P, R8607 modify to 390R
27MHZ_OUT
N11P-GS Fermi
DEV ID:
0x0DF0
(0000)
DIS_Muxless
DIS_Muxless
10Kohm 5Kohm
63.10334.1DL 64.49915.6DL
N11P-GE N11P-GS
Pull Low Pull Low
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
1
12
R8605
R8605
Do Not Stuff
Do Not Stuff
N12P-GE
DEV ID:
0x0DF5
(0101)
30Kohm
64.30025.6DL
N12P-GE
GPU_POWER(4/5)
GPU_POWER(4/5)
GPU_POWER(4/5)
JE40-HR
JE40-HR
JE40-HR
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
86 102
86 102
86 102
of
of
of
-1
-1
-1
Page 87
5
EDP 50A
(TDP 37W)
VGA_CORE
D D
C C
DIS_Muxless
DIS_Muxless
B B
A A
Under GPU
12
C8715
C8715
Do Not Stuff
Do Not Stuff
12
Do Not Stuff
Do Not Stuff
C8721
C8721
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Under GPU
12
C8716
C8716
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
NEAR GPU
12
Do Not Stuff
Do Not Stuff
C8722
C8722
DIS_Muxless
DIS_Muxless
12
C8710
C8710
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8725
C8725
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
5
12
C8705
C8705
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
Do Not Stuff
Do Not Stuff
C8723
C8723
DIS_Muxless
DIS_Muxless
12
C8711
C8711
12
C8726
C8726
DY
DY
12
C8706
C8706
DIS_Muxless
DIS_Muxless
12
C8718
C8718
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
12
C8707
C8707
Do Not Stuff
Do Not Stuff
12
C8719
C8719
Do Not Stuff
Do Not Stuff
12
C8724
C8724
12
C8713
C8713
Do Not Stuff
Do Not Stuff
12
C8708
C8708
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8720
C8720
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8714
C8714
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
AB11
AB13
AB15
AB17
AB19
AB21
AB23
AB25
AC11
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
AC23
AC24
AC25
AD12
AD14
AD16
AD18
AD22
AD24
M12
M14
M16
M18
M20
M22
M24
P11
P13
P15
P17
P19
L11
L12
L13
L14
L15
L16
L17
L18
L19
L20
L21
L22
L23
L24
L25
4
VGA1P
VGA1P
NVVDD
NVVDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
4
16 OF 16
16 OF 16
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
P21
P23
P25
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23
R24
R25
T12
T14
T16
T18
T20
T22
T24
V11
V13
V15
V17
V19
V21
V23
V25
W11
W12
W13
W14
W15
W16
W17
W18
W19
W20
W21
W22
W23
W24
W25
Y12
Y14
Y16
Y18
Y20
Y22
Y24
VGA_CORE
3
3
AA11
AA12
AA13
AA14
AA15
AA16
AA17
AA18
AA19
AA2
AA20
AA21
AA22
AA23
AA24
AA25
AA34
AA5
AB12
AB14
AB16
AB18
AB20
AB22
AB24
AC9
AD11
AD13
AD15
AD17
AD2
AD21
AD23
AD25
AD31
AD34
AD5
AE11
AE12
AE13
AE14
AE15
AE16
AE17
AE18
AE19
AE20
AE21
AE22
AE23
AE24
AE25
AG2
AG31
AG34
AG5
AK2
AK31
AK34
AK5
AL12
AL15
AL18
AL21
AL24
AL27
AL30
AL6
AL9
AN2
AN34
AP12
AP15
AP18
AP21
AP24
AP27
AP3
AP30
AP33
AP6
AP9
B12
B15
B21
B24
B27
B30
B33
C34
E12
B3
B6
B9
C2
VGA1O
VGA1O
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
GND
GND
15 OF 16
15 OF 16
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
E15
E18
E24
E27
E30
E6
E9
F2
F31
F34
F5
J2
J31
J34
J5
L9
M11
M13
M15
M17
M19
M2
M21
M23
M25
M31
M34
M5
N11
N12
N13
N14
N15
N16
N17
N18
N19
N20
N21
N22
N23
N24
N25
P12
P14
P16
P18
P20
P22
P24
R2
R31
R34
R5
T11
T13
T15
T17
T19
T21
T23
T25
U11
U12
U13
U14
U15
U16
U17
U18
U19
U20
U21
U22
U23
U24
U25
V12
V14
V16
V18
V2
V20
V22
V24
V31
V5
V9
Y11
Y13
Y15
Y17
Y19
Y21
Y23
Y25
2
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
GPU_DPPWR/GND(5/5)
GPU_DPPWR/GND(5/5)
GPU_DPPWR/GND(5/5)
JE40-HR
JE40-HR
JE40-HR
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
87 102
87 102
87 102
1
-1
-1
-1
Page 88
5
4
3
2
1
1D5V_VGA_S0
D D
VRAM1_VREF
VRAM_ZQ2
R8801
R8801
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
C C
B B
FBA_A085,89
FBA_A185,89
FBA_A285,89
FBA_A385,89
FBA_A485,89
FBA_A585,89
FBA_A685,89
FBA_A785,89
FBA_A885,89
FBA_A985,89
FBA_A1085,89
FBA_A1185,89
FBA_A1285,89
FBA_A1385,89
FBA_BA085,89
FBA_BA185,89
FBA_BA285,89
CLKA085
CLKA0#85
FBA_CKE085
DQMA185
DQMA285
-FBA_WE85,89
-FBA_CAS85,89
-FBA_RAS85,89
VRAM1
VRAM1
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS_N12PGV
VRAM = N12PGS_N12PGV
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
CS#
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDA23
MDA19
MDA22
MDA16
MDA21
MDA18
MDA20
MDA17
MDA12
MDA8
MDA15
MDA10
MDA13
MDA9
MDA14
MDA11
FBA_ODT0 85
-FBA_CS0 85
FBA_RST 85,89
VRAM1_VREF
DIS_Muxless
DIS_Muxless
MDA[63..0] 85,89
QSAP_1 85
QSAN_1 85
QSAP_2 85
QSAN_2 85
DIS_Muxless
DIS_Muxless
12
R8804
R8804
Do Not Stuff
Do Not Stuff
1D5V_VGA_S0
12
12
R8803
R8803
Do Not Stuff
Do Not Stuff
C8802
C8802
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
R8802
R8802
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
VRAM1_VREF
VRAM_ZQ1
1D5V_VGA_S0
FBA_A085,89
FBA_A185,89
FBA_A285,89
FBA_A385,89
FBA_A485,89
FBA_A585,89
FBA_A685,89
FBA_A785,89
FBA_A885,89
FBA_A985,89
FBA_A1085,89
FBA_A1185,89
FBA_A1285,89
FBA_A1385,89
FBA_BA085,89
FBA_BA185,89
FBA_BA285,89
CLKA085
CLKA0#85
FBA_CKE085
DQMA085
DQMA385
-FBA_WE85,89
-FBA_CAS85,89
-FBA_RAS85,89
VRAM2
VRAM2
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS_N12PGV
VRAM = N12PGS_N12PGV
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
CS#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MDA26
E3
MDA27
F7
MDA28
F2
MDA30
F8
MDA24
H3
MDA31
H8
MDA25
G2
MDA29
H7
MDA7
D7
MDA0
C3
MDA6
C8
MDA2
C2
MDA4
A7
MDA3
A2
MDA5
B8
MDA1
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
QSAP_0 85
QSAN_0 85
QSAP_3 85
QSAN_3 85
FBA_ODT0 85
-FBA_CS0 85
FBA_RST 85,89
MDA[63..0] 85,89
SB to -1
VRAM1_VREF
12
C8817
C8817
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
FB CMD mapping Mode D-N12x
1D5V_VGA_S0
12
12
12
FOR VRAM1
A A
FOR VRAM2
5
C8801
C8801
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
12
C8810
C8810
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
C8803
C8803
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
CLOSE TO THE MEMORY
12
C8811
C8811
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
C8804
C8804
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8812
C8812
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C8805
C8805
DIS_Muxless
DIS_Muxless
12
C8813
C8813
DIS_Muxless
DIS_Muxless
VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
VRAM HYNIX 2Gb VR.2GB0G.001
12
C8806
C8806
Do Not Stuff
Do Not Stuff
12
C8814
C8814
Do Not Stuff
Do Not Stuff
4
DG requires 4x0.1uF and 8x1.0uF per
VRAM chip
1D5V_VGA_S0
12
C8809
C8809
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
CLOSE TO THE MEMORY
3
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM1,2 (1/4)
GPU-VRAM1,2 (1/4)
GPU-VRAM1,2 (1/4)
JE40-HR
JE40-HR
JE40-HR
1
88 102
88 102
88 102
-1
-1
-1
of
of
of
VRAM SAMSUNG 1Gb VR.1GB0B.006
Page 89
5
1D5V_VGA_S0
D D
SB to -1 modify to VRAM3_VREF
R8901
R8901
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
C C
B B
VRAM_ZQ3
VRAM3_VREF
1D5V_VGA_S0
FBA_A085,88
FBA_A185,88
FBA_A285,88
FBA_A385,88
FBA_A485,88
FBA_A585,88
FBA_A685,88
FBA_A785,88
FBA_A885,88
FBA_A985,88
FBA_A1085,88
FBA_A1185,88
FBA_A1285,88
FBA_A1385,88
FBA_BA085,88
FBA_BA185,88
FBA_BA285,88
CLKA185
CLKA1#85
FBA_CKE185
DQMA685
DQMA785
-FBA_WE85,88
-FBA_CAS85,88
-FBA_RAS85,88
VRAM3
VRAM3
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS_N12PGV
VRAM = N12PGS_N12PGV
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
CS#
4
MDA58
E3
MDA57
F7
MDA62
F2
MDA60
F8
MDA63
H3
MDA61
H8
MDA56
G2
MDA59
H7
MDA51
D7
MDA53
C3
MDA50
C8
MDA52
C2
MDA48
A7
MDA54
A2
MDA49
B8
MDA55
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBA_ODT1 85
-FBA_CS1 85
FBA_RST 85,88
VRAM3_VREF VRAM3_VREF
DIS_Muxless
DIS_Muxless
MDA[63..0] 85,88
QSAP_6 85
QSAN_6 85
QSAP_7 85
QSAN_7 85
1D5V_VGA_S0
DIS_Muxless
DIS_Muxless
12
R8903
R8903
Do Not Stuff
Do Not Stuff
SB to -1 modify to VRAM3_VREF
12
R8902
R8902
Do Not Stuff
Do Not Stuff
12
C8902
C8902
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
3
1D5V_VGA_S0
VRAM3_VREF
VRAM_ZQ4
R8904
R8904
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
FBA_A085,88
FBA_A185,88
FBA_A285,88
FBA_A385,88
FBA_A485,88
FBA_A585,88
FBA_A685,88
FBA_A785,88
FBA_A885,88
FBA_A985,88
FBA_A1085,88
FBA_A1185,88
FBA_A1285,88
FBA_A1385,88
FBA_BA085,88
FBA_BA185,88
FBA_BA285,88
CLKA185
CLKA1#85
FBA_CKE185
DQMA485
DQMA585
-FBA_WE85,88
-FBA_CAS85,88
-FBA_RAS85,88
FB CMD mapping Mode D-N12x
2
VRAM4
VRAM4
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS_N12PGV
VRAM = N12PGS_N12PGV
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
SB to -1 delete R8906 , R8905 , modify to VRAM2_VREF
1
MDA43
E3
MDA42
F7
MDA45
F2
MDA40
F8
MDA46
H3
MDA41
H8
MDA44
G2
MDA47
H7
MDA33
D7
MDA37
C3
MDA32
C8
MDA36
C2
MDA35
A7
MDA39
A2
MDA34
B8
MDA38
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBA_ODT1 85
-FBA_CS1 85
FBA_RST 85,88
SB to -1 modify to VRAM3_VREF
MDA[63..0] 85,88
QSAP_4 85
QSAN_4 85
QSAP_5 85
QSAN_5 85
12
C8917
C8917
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM SAMSUNG 1Gb VR.1GB0B.006
VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
VRAM HYNIX 2Gb VR.2GB0G.001
FOR VRAM3
Do Not Stuff
Do Not Stuff
12
C8901
C8901
Do Not Stuff
Do Not Stuff
12
C8903
C8903
Do Not Stuff
Do Not Stuff
12
C8904
C8904
Do Not Stuff
Do Not Stuff
12
C8905
C8905
Do Not Stuff
Do Not Stuff
12
C8906
C8906
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
FOR VRAM4
A A
DIS_Muxless
DIS_Muxless
5
CLOSE TO THE MEMORY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C8910
C8910
DIS_Muxless
DIS_Muxless
Do Not Stuff
12
C8911
C8911
DIS_Muxless
DIS_Muxless
12
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C8912
C8912
C8913
C8913
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C8914
C8914
1D5V_VGA_S0
Do Not Stuff
Do Not Stuff
12
C8909
C8909
DIS_Muxless
DIS_Muxless
HR UMA
HR UMA
CLOSE TO THE MEMORY
4
3
2
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM3,4 (2/4)
GPU-VRAM3,4 (2/4)
GPU-VRAM3,4 (2/4)
JE40-HR
JE40-HR
JE40-HR
89 102
89 102
89 102
1
of
of
of
-1
-1
-1
Page 90
5
4
3
2
1
1D5V_VGA_S0
D D
SB to -1 modify to VRAM5_VREF
DIS_Muxless
DIS_Muxless
C C
B B
R9001
R9001
Do Not Stuff
Do Not Stuff
1 2
VRAM5_VREF
VRAM_ZQ5
FBB_A085,91
FBB_A185,91
FBB_A285,91
FBB_A385,91
FBB_A485,91
FBB_A585,91
FBB_A685,91
FBB_A785,91
FBB_A885,91
FBB_A985,91
FBB_A1085,91
FBB_A1185,91
FBB_A1285,91
FBB_A1385,91
FBB_BA085,91
FBB_BA185,91
FBB_BA285,91
CLKB085 CLKB0#85
CLKB0#85
FBB_CKE085
DQMB185
DQMB285
-FBB_WE85,91
-FBB_CAS85,91
-FBB_RAS85,91
VRAM5
VRAM5
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS
VRAM = N12PGS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
QSBP_1 85
QSBN_1 85
QSBP_2 85
QSBN_2 85
VRAM5_VREF
MDB[63..0] 85,91
12
R9004
R9004
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
SB to -1 modify to VRAM5_VREF
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
12
R9003
R9003
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
C9002
C9002
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
R9002
R9002
Do Not Stuff
Do Not Stuff
1 2
VRAM5_VREF
VRAM_ZQ6
MDB20
E3
MDB17
F7
MDB18
F2
MDB19
F8
MDB22
H3
MDB21
H8
MDB23
G2
MDB16
H7
MDB14
D7
MDB8
C3
MDB15
C8
MDB10
C2
MDB12
A7
MDB9
A2
MDB13
B8
MDB11
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBB_ODT0 85
-FBB_CS0 85
FBB_RST 85,91
1D5V_VGA_S0
FBB_A085,91
FBB_A185,91
FBB_A285,91
FBB_A385,91
FBB_A485,91
FBB_A585,91
FBB_A685,91
FBB_A785,91
FBB_A885,91
FBB_A985,91
FBB_A1085,91
FBB_A1185,91
FBB_A1285,91
FBB_A1385,91
FBB_BA085,91
FBB_BA185,91
FBB_BA285,91
CLKB085
FBB_CKE085
DQMB385
DQMB085
-FBB_WE85,91
-FBB_CAS85,91
-FBB_RAS85,91
VRAM6
VRAM6
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS
VRAM = N12PGS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
ODT
CS#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
QSBP_3 85
QSBN_3 85
QSBP_0 85
QSBN_0 85
VRAM5_VREF
MDB[63..0] 85,91
12
C9017
C9017
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
MDB3
E3
MDB7
F7
MDB0
F2
MDB5
F8
MDB1
H3
MDB6
H8
MDB2
G2
MDB4
H7
MDB30
D7
MDB25
C3
MDB31
C8
MDB27
C2
MDB28
A7
MDB26
A2
MDB29
B8
MDB24
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBB_ODT0 85
-FBB_CS0 85
FBB_RST 85,91
SB to -1 modify to VRAM5_VREF
VRAM SAMSUNG 1Gb VR.1GB0B.006
VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
VRAM HYNIX 2Gb VR.2GB0G.001
1D5V_VGA_S0
DG requires 4x0.1uF and 8x1.0uF per
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
FOR VRAM5
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
A A
Do Not Stuff
Do Not Stuff
FOR VRAM6
DIS_Muxless
DIS_Muxless
5
12
12
C9001
C9001
DIS_Muxless
DIS_Muxless
12
C9003
C9003
C9004
C9004
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
CLOSE TO THE MEMORY
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C9010
C9010
DIS_Muxless
DIS_Muxless
Do Not Stuff
12
C9011
C9011
DIS_Muxless
DIS_Muxless
12
C9012
C9012
DIS_Muxless
DIS_Muxless
12
C9005
C9005
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9013
C9013
DIS_Muxless
DIS_Muxless
Do Not Stuff
12
C9006
C9006
Do Not Stuff
Do Not Stuff
12
C9014
C9014
4
VRAM chip
3
1D5V_VGA_S0
Do Not Stuff
Do Not Stuff
12
C9009
C9009
DIS_Muxless
DIS_Muxless
CLOSE TO THE MEMORY
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
JE40-HR
JE40-HR
JE40-HR
90 102
90 102
90 102
1
-1
-1
-1
of
of
of
Page 91
5
4
3
2
1
1D5V_VGA_S0
D D
SB to -1 modify to VRAM7_VREF
DIS_Muxless
DIS_Muxless
C C
B B
FOR VRAM7
R9101
R9101
Do Not Stuff
Do Not Stuff
1 2
VRAM7_VREF
VRAM_ZQ7
FBB_A085,90
FBB_A185,90
FBB_A285,90
FBB_A385,90
FBB_A485,90
FBB_A585,90
FBB_A685,90
FBB_A785,90
FBB_A885,90
FBB_A985,90
FBB_A1085,90
FBB_A1185,90
FBB_A1285,90
FBB_A1385,90
FBB_BA085,90
FBB_BA185,90
FBB_BA285,90
CLKB185
CLKB1#85
FBB_CKE185
DQMB685
DQMB485
-FBB_WE85,90
-FBB_CAS85,90
-FBB_RAS85,90
1D5V_VGA_S0
DIS_Muxless
DIS_Muxless
1D5V_VGA_S0
Do Not Stuff
Do Not Stuff
12
C9101
C9101
DIS_Muxless
DIS_Muxless
VRAM7
VRAM7
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS
VRAM = N12PGS
Do Not Stuff
Do Not Stuff
12
C9102
C9102
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9103
C9103
DIS_Muxless
DIS_Muxless
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
Do Not Stuff
Do Not Stuff
12
C9104
C9104
DIS_Muxless
DIS_Muxless
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
Do Not Stuff
Do Not Stuff
12
C9105
C9105
DIS_Muxless
DIS_Muxless
CLOSE TO THE MEMORY
MDB34
MDB33
MDB36
MDB37
MDB35
MDB38
MDB32
MDB39
MDB48
MDB53
MDB50
MDB55
MDB51
MDB54
MDB49
MDB52
FBB_ODT1 85
-FBB_CS1 85
FBB_RST 85,90
VRAM7_VREF VRAM7_VREF
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9106
C9106
MDB[63..0] 85,90
QSBP_6 85
QSBN_6 85
QSBP_4 85
QSBN_4 85
1D5V_VGA_S0
DIS_Muxless
DIS_Muxless
12
R9103
R9103
Do Not Stuff
Do Not Stuff
SB to -1 modify to VRAM7_VREF
12
R9102
R9102
Do Not Stuff
Do Not Stuff
12
C9118
C9118
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
CLOSE TO THE MEMORY
DIS_Muxless
DIS_Muxless
R9104
R9104
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
1D5V_VGA_S0
VRAM7_VREF
VRAM_ZQ8
12
C9109
C9109
Do Not Stuff
Do Not Stuff
1D5V_VGA_S0
FBB_A085,90
FBB_A185,90
FBB_A285,90
FBB_A385,90
FBB_A485,90
FBB_A585,90
FBB_A685,90
FBB_A785,90
FBB_A885,90
FBB_A985,90
FBB_A1085,90
FBB_A1185,90
FBB_A1285,90
FBB_A1385,90
FBB_BA085,90
FBB_BA185,90
FBB_BA285,90
CLKB185
CLKB1#85
FBB_CKE185
DQMB585
DQMB785
-FBB_WE85,90
-FBB_CAS85,90
-FBB_RAS85,90
VRAM8
VRAM8
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
VRAM = N12PGS
VRAM = N12PGS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDB58
E3
MDB57
F7
MDB59
F2
MDB56
F8
MDB63
H3
MDB61
H8
MDB60
G2
MDB62
H7
MDB41
D7
MDB47
C3
MDB42
C8
MDB45
C2
MDB40
A7
MDB43
A2
MDB44
B8
MDB46
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
FBB_ODT1 85
-FBB_CS1 85
FBB_RST 85,90
SB to -1 modify to VRAM7_VREF
VRAM SAMSUNG 1Gb VR.1GB0B.006
VRAM HYNIX 1Gb 72.51G63.C0U/VR.1GB0G.005
VRAM HYNIX 2Gb VR.2GB0G.001
MDB[63..0] 85,90
QSBP_5 85
QSBN_5 85
QSBP_7 85
QSBN_7 85
12
C9117
C9117
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
C9110
FOR VRAM8
A A
5
C9110
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9111
C9111
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9112
C9112
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
C9113
C9113
DIS_Muxless
DIS_Muxless
4
12
C9114
C9114
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
3
2
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
JE40-HR
JE40-HR
JE40-HR
91 102
91 102
91 102
1
-1
-1
-1
of
of
of
Page 92
5
20100715
DCBATOUT PWR_DCBATOUT_VGA_CORE VGA_CORE VGA_CORE_PWR VGA_CORE
PG9201
PG9201
1 2
Do Not Stuff
Do Not Stuff
PG9202
PG9202
1 2
Do Not Stuff
Do Not Stuff
PG9203
PG9203
D D
C C
B B
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
12
1 2
PG9204
PG9204
1 2
PG9228
PG9228
1 2
PG9229
PG9229
1 2
PG9230
PG9230
1 2
PG9231
PG9231
1 2
PTC9201
PTC9201
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
3D3V_VGA_S0
DIS_Muxless
DIS_Muxless
PC9207
PC9207
PM_SLP_S3#19,27,36,37,47
DIS_Muxless
DIS_Muxless
8209A_PGOOD_VGA
DIS_Muxless
DIS_Muxless
5V_S5
DIS_Muxless
DIS_Muxless
PR9201
PR9201
12
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_VDD
PR9204
PR9204
8209A_PGOOD_VGA
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_CS
1 2
DIS_Muxless
DIS_Muxless
12
N12PGS_N12PGV_64.63415.6DL
N12PGS_N12PGV_64.63415.6DL
8209A_EN/DEM_VGA
SB 20100831
DIS_Muxless
DIS_Muxless
PR9206 Do Not Stuff
PR9206 Do Not Stuff
1 2
2 1
DY
DY
PD9201
PD9201
Do Not Stuff
Do Not Stuff
3D3V_VGA_S0
12
PR9212
PR9212
Do Not Stuff
Do Not Stuff
PR9214
PR9214
1 2
Do Not Stuff
Do Not Stuff
12
PC9212
PC9212
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
PC9201
PC9201
12
8209A_EN/DEM_VGA
12
PC9211
PC9211
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
DGPU_PWROK 22,93
PWR_VGA_CORE_TON
16
TON
9
VDDP
2
VDD
4
PGOOD
10
CS
15
EM/DEM
17
GND
PU9201
PU9201
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SSID = PWR.Plane.Regulator_GFX
PWR_VGA_CORE_BOOT
13
BOOT
PWR_VGA_CORE_UGATE
12
UGATE
PWR_VGA_CORE_PHASE
11
PHASE
PWR_VGA_CORE_LGATE
8
LGATE
7
G0
PWR_VGA_CORE_FB
3
FB
14
G1
PWR_VGA_CORE_D1
5
D1
PWR_VGA_CORE_D0
6
D0
PWR_VGA_CORE_VOUT
1
VOUT
DIS_Muxless
DIS_Muxless
RT8208A
N12P GS
P-State
P8 , P12
P0 - HOT
P0 - COLD
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5UH PCMC104T-1R5MN Cyntec DCR:4.2mohm Isat =33Arms 68.1R510.10J
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3Arms Panasonic/ 79.33719.L01
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
Switching freq-->350KHz
Frequency setting
470K -->165KHz
200K -->323KHz
100K -->500KHz
4
PR9202
PR9202
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
PR9205
PR9205
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_BOOT_C
1 2
PWR_VGA_CORE_D1
L
L
H
HH
Do Not Stuff
Do Not Stuff
VGA_CORE_UGATE
PR9218
PR9218
1 2
Do Not Stuff
Do Not Stuff
VGA_CORE_LGATE
PR9219
PR9219
1 2
Do Not Stuff
Do Not Stuff
PWRCNTL_0 86
PWRCNTL_1 86
PWR_VGA_CORE_D0HVGA_CORE_PWR
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.08030.037
2nd = 84.08030.037
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV
N12PGS_N12PGV
DIS_Muxless
DIS_Muxless
PC9206
PC9206
1 2
PU9204
PU9204
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.08028.037
2nd = 84.08028.037
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV
N12PGS_N12PGV
L
L
20100715
PU9203
PU9203
GD
GD
4 5
GD
GD
4 5
0.825V
0.975V
1.00V
678
DDD
DDD
678
DDD
DDD
SSS
SSS
123
SSS
SSS
123
PU9202
PU9202
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.08030.037
2nd = 84.08030.037
DIS_Muxless
DIS_Muxless
N12PGS
N12PGS
678
DDD
DDD
SSS
GD
SSS
GD
DIS_Muxless
DIS_Muxless
123
4 5
PL9201
PL9201
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 68.R3610.10M
2nd = 68.R3610.10M
678
DDD
DDD
PU9205
PU9205
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
SSS
GD
SSS
GD
2nd = 84.08028.037
2nd = 84.08028.037
DIS_Muxless
DIS_Muxless
123
4 5
N12PGS_N12PGV
N12PGS_N12PGV
VGACORE_VDD_SENSE
0806 check Power
TP9203
TP9203
Do Not Stuff
Do Not Stuff
3
SB 20100831
PWR_DCBATOUT_VGA_CORE
Do Not Stuff
Do Not Stuff
12
PC9204
PC9204
1 2
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_VOUT
PWR_VGA_CORE_FB
R3
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
12
12
PC9202
PC9202
PC9213
PC9213
DY
DY
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
DIS_Muxless
1 2
DIS_Muxless
DIS_Muxless
12
PR9209
PR9209
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_D0
DIS_Muxless
DIS_Muxless
DIS_Muxless
PG9205
PG9205
12
12
PR9203
PR9203
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
PR9211
PR9211
Do Not Stuff
Do Not Stuff
12
PR9208
PR9208
Do Not Stuff
Do Not Stuff
R1
12
R2 R4
PR9210
PR9210
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV:63.75334.1DL
N12PGS_N12PGV:63.75334.1DL
PR9216
PR9216
Do Not Stuff
Do Not Stuff
1 2
GND_SENSE_1
DIS_Muxless
DIS_Muxless
12
PR9207
PR9207
Do Not Stuff
Do Not Stuff
DY
DY
Do Not Stuff
Do Not Stuff
12
PC9209
PC9209
Do Not Stuff
Do Not Stuff
12
2
Do Not Stuff
Do Not Stuff
12
PC9205
PC9205
PC9203
PC9203
DIS_Muxless
DIS_Muxless
Vout=0.75V*(R1+R2)/R2
Design Current = 21.94A
24.14A<OCP< 28.53A
VGA_CORE_PWR
Do Not Stuff
Do Not Stuff
12
PC9208
DY
DY
PC9210
PC9210
12
PC9208
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
12
DIS_Muxless
DIS_Muxless
PTC9202
PTC9202
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 77.C3371.051
2nd = 77.C3371.051
12
DIS_Muxless
DIS_Muxless
PTC9204
PTC9204
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 77.C3371.051
2nd = 77.C3371.051
12
DIS_Muxless
DIS_Muxless
PTC9203
PTC9203
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 77.C3371.051
2nd = 77.C3371.051
SB to -1 modify PR9213 VGA_Core to 1.05V
12
PR9213
PR9213
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
N12PGS_N12PGV:64.43025.6DL
N12PGS_N12PGV:64.43025.6DL
PWR_VGA_CORE_D1
TP9202Do Not StuffTP9202Do Not Stuff
3D3V_AUX_S5
DY
DY
1 2
PQ9201
PQ9201
Do Not Stuff
Do Not Stuff
8209A_EN/DEM_VGA PQ9206_3VGACORE_GND_SENSE
PR9217
PR9217
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PWR_VGA_CORE_EN_R#
5
6
DY
DY
123 4
20100719
PG9206
PG9206
1 2
PG9207
PG9207
1 2
PG9208
PG9208
1 2
PG9209
PG9209
1 2
PG9210
PG9210
1 2
PG9211
PG9211
1 2
PG9212
PG9212
1 2
PG9214
PG9214
1 2
PG9213
PG9213
1 2
PG9215
PG9215
1 2
PG9227
PG9227
1 2
1
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
VGA_CORE_PWR
PR9215
PR9215
Do Not Stuff
Do Not Stuff
DY
DY
1 2
PG9216
PG9216
PG9217
PG9217
PG9218
PG9218
PG9219
PG9219
PG9220
PG9220
PG9221
PG9221
PG9222
PG9222
PG9223
PG9223
PG9224
PG9224
PG9225
PG9225
PG9226
PG9226
N12P GV
P8 , P12
P0 - HOT
A A
5
P-State
PWR_VGA_CORE_D1
L
L
H
HH
PWR_VGA_CORE_D0HVGA_CORE_PWR
L
L
4
0.85V
1.00V
1.025VP0 - COLD
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
RT8208B_+VGA_CORE
RT8208B_+VGA_CORE
RT8208B_+VGA_CORE
JE40-HR
JE40-HR
JE40-HR
1
92 102
92 102
92 102
of
of
of
-1
-1
-1
Vout=0.75V*(R1+R2)/R2
Page 93
5
4
3
2
1
+3VS to 3.3V_DELAY Transfer
R9301
R9301
Do Not Stuff
Muxless
Muxless
Do Not Stuff
1 2
DIS
DIS
S
G
G
G
6
123 4
D
DGPU_PWR_EN
3D3V_VGA_S0 1D5V_S3 1D5V_VGA_S0
Muxless
Muxless
D
D
D
Q9302
Q9302
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.03413.A31
2ND = 84.03413.A31
5
3.3V_RUN_VGA_1
12
R9304
R9304
Do Not Stuff
Do Not Stuff
Muxless
Muxless
1
1
C9308
C9308
Do Not Stuff
Do Not Stuff
2
2
DIS_Muxless
DIS_Muxless
DGPU_PWROK22,92
+3VS to 1.8V Transfer
AO4468, SO-8
Id=11.6A, Qg=9~12nC
Rdson=17.4~22m ohm
RUN_ENABLE
R9310
R9310
Do Not Stuff
Do Not Stuff
1 2
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
-1 modify R9305 Q9303 to DY
R9305
R9305
Do Not Stuff
Do Not Stuff
1 2
DGPU_PWROK_R
DY
DY
C9304
C9304
DIS_EN_1D5_RUN_R
12
DY
DY
D D
3D3V_S0
12
R9302
R9302
Do Not Stuff
Do Not Stuff
Muxless
Muxless
3.3V_ALW_1
Q9301
Q9301
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.DM601.03F
2nd = 84.DM601.03F
C C
R9308
R9308
Do Not Stuff
Do Not Stuff
Muxless
Muxless
1 2
Muxless
Muxless
G
S
Q9305
Q9305
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
3D3V_S0
DGPU_PWR_EN#18
B B
RT9025 for 1D8V_VGA
1D5V_VGA_S0
12
C9301
C9301
DIS_Muxless
DIS_Muxless
DY
DY
S D
G
12
DY
DY
D
G
U9301
U9301
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 84.08882.037
2nd = 84.08882.037
D
D
8
D
D
7
D
D
6
DIS_Muxless
DIS_Muxless
RUNON_R
Q9303
Q9303
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.00610.C31
2ND = 84.00610.C31
R9306
R9306
Do Not Stuff
Do Not Stuff
DIS_EN_1D5_RUN
Q9304
Q9304
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
DY
DY
S
S
S
S
S
S
S
GD
GD
1
2
3
45
DY
DY
Do Not Stuff
Do Not Stuff
12
C9302
C9302
DIS_Muxless
DIS_Muxless
RUNON_R_1
R9303 Do Not Stuff
R9303 Do Not Stuff
1 2
DY
DY
12
R9307
R9307
Do Not Stuff
Do Not Stuff
TC9302
TC9302
12
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
Do Not Stuff
Do Not Stuff
1D05V_VGA_S0
Do Not Stuff
Do Not Stuff
12
C9303
C9303
DIS_Muxless
DIS_Muxless
DGPU_PWROK22,92
SB modify to 84.03006.A37
1.05V to 1.05V_VGA_S0 Transfer
TC9301
TC9301
Do Not Stuff
Do Not Stuff
12
Do Not Stuff
Do Not Stuff
2ND = 79.3971V.3AL
2ND = 79.3971V.3AL
DIS_Muxless
DIS_Muxless
5V_S5
1
2
3
4
U9304
U9304
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
VCC
NC#9
ON
DIS2
G1/G2
GND
S/DIS1
DIS_Muxless
DIS_Muxless
1D05V_VTT 1D05V_VGA_S0
PG
8
7
6
5
DIS_Muxless
DIS_Muxless
9
8
SLG_RUN_ENABLE_VGA
7
6
5
D
U9302
U9302
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
D
D
D
D
D
D
D
D
-1 modify R9322
check layout
RUNON_R_1
12
3.6A
R9322
R9322
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
S
S
1
S
S
2
S
S
3
G
G
4
Ղٙ
RUNON_R_1
1D5V_VGA_S0
5V_S5
R9309
DY
DY
12
C9307
C9307
Do Not Stuff
Do Not Stuff
R9309
Do Not Stuff
Do Not Stuff
1 2
DIS_Muxless
DIS_Muxless
DGPU_PWROK 22,92
-1 co-layout SLG55221
1D8V_S0_NV = IFPA_IOVDD & IFPB_IOVDD, it
should be the latest ramp up rail.
4
5V_S5
RUNON_R_1
12
R9323
R9323
DY
DY
Do Not Stuff
Do Not Stuff
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
DISCRETE VGA POWER
DISCRETE VGA POWER
DISCRETE VGA POWER
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
93 102
93 102
93 102
-1
-1
-1
U9305
U9305
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
VCC
GND
1
2
3
HV
2
DGPU_PWROK22,92
1D5V_VGA_S0
5V_S5
3
6
EN
5
DC2
4
DC1
U9303
U9303
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
VIN
GND
EN
NC#4
VOUT
DIS_Muxless
DIS_Muxless
A A
1
2
3
4
5
I=300mA
DGPU_PWROK_TO1D8V
1D8V_VGA_S0
C9305
C9305
Do Not Stuff
Do Not Stuff
1 2
DIS_Muxless
DIS_Muxless
5
3D3V_VGA_S0
C9306
C9306
Do Not Stuff
Do Not Stuff
1 2
DIS_Muxless
DIS_Muxless
Page 94
5
4
3
2
1
LVDS Channel A
RN9401
DIS
DIS
GPU_LVDSA_TX084
D D
C C
GPU_LVDSA_TX0#84
GPU_LVDSA_TX1#84
GPU_LVDSA_TX184
DIS
DIS
GPU_LVDSA_TX2#84
GPU_LVDSA_TX284
GPU_LVDSA_TXC84
GPU_LVDSA_TXC#84
UMA_Muxless
UMA_Muxless
LVDSA_DATA017
LVDSA_DATA0#17
LVDSA_DATA1#17
LVDSA_DATA117
RN9401
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RN9405
RN9405
Do Not Stuff
Do Not Stuff
1
2
3
4 5
RN9408
RN9408
SRN0J-7-GP
SRN0J-7-GP
4 5
3
2
1
8
7
6
8
7
6
6
7
8
LVDSA_DATA0_R 49
LVDSA_DATA0_R# 49
LVDSA_DATA1_R# 49
LVDSA_DATA1_R 49
LVDSA_DATA2_R# 49
LVDSA_DATA2_R 49
LVDSA_CLK_R 49
LVDSA_CLK_R# 49
LVDSA_DATA0_R 49
LVDSA_DATA0_R# 49
LVDSA_DATA1_R# 49
LVDSA_DATA1_R 49
RN9410
RN9410
SRN0J-7-GP
UMA_Muxless
LVDSA_DATA2#17
LVDSA_DATA217
LVDSA_CLK17
LVDSA_CLK#17
B B
A A
Panel BL brightness/Power En/BL En
BRIGHTNESS27
VGA_LBKLT_CTL86
5
UMA_Muxless
R9406
R9406
Do Not Stuff
Do Not Stuff
1 2
DY
DY
R9407
R9407
Do Not Stuff
Do Not Stuff
1 2
DIS
DIS
SRN0J-7-GP
4 5
3
2
1
LBKLT_CTL_R
6
7
8
L_BKLT_CTRL17
L_BKLT_EN17
LVDS_VDD_EN17
VGA_LCDVDD_EN86
VGA_BLEN86
4
LVDSA_DATA2_R# 49
LVDSA_DATA2_R 49
LVDSA_CLK_R 49
LVDSA_CLK_R# 49
RN9412
RN9412
SRN0J-7-GP
SRN0J-7-GP
6
7
8
RN9413
RN9413
Do Not Stuff
Do Not Stuff
6
7
8
DIS
DIS
RN9404
RN9404
Do Not Stuff
Do Not Stuff
DIS
GPU_LVDS_CLK86
GPU_LVDS_DATA86
LVDS_DDC_CLK_R17
LVDS_DDC_DATA_R17
45
3
2
1
45
3
2
1
3
LBKLT_CTL 49
PANEL_BLEN 27
LCDVDD_EN 49
LCDVDD_EN 49
PANEL_BLEN 27
LBKLT_CTL 49
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
2
DIS
4
RN9407
RN9407
SRN0J-6-GP
SRN0J-6-GP
4
UMA_Muxless
UMA_Muxless
LVDS_Switch
LVDS_Switch
LVDS_Switch
JE40-HR
JE40-HR
JE40-HR
3D3V_S0
1
23
RN9403
RN9403
SRN2K2J-1-GP
SRN2K2J-1-GP
4
23
1
1
23
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LVDS_DDC_CLK 49
LVDS_DDC_DATA 49
94 102
94 102
94 102
of
of
of
1
-1
-1
-1
Page 95
5
4
3
2
1
Close to CRT Board CONN
RN9501
RN9501
Do Not Stuff
Do Not Stuff
1
8
2
VGA_CRT_BLUE86
VGA_CRT_GREEN86
VGA_CRT_RED86
D D
CRT_RED17
CRT_GREEN17
CRT_BLUE17
C C
7
3
6
4 5
DIS
DIS
RN9502
RN9502
SRN0J-7-GP
SRN0J-7-GP
1
8
2
7
3
6
4 5
UMA_Muxless
UMA_Muxless
CRT_BLUE_R 50
CRT_GREEN_R 50
CRT_RED_R 50
CRT_RED_R 50
CRT_GREEN_R 50
CRT_BLUE_R 50
CRT DDCDATA & DDCCLK
RN9503
RN9503
SRN0J-6-GP
SRN0J-6-GP
CRT_DDC_DATA17
CRT_DDC_CLK17
5V Tolerance
VGA_CRT_DDCDATA86
VGA_CRT_DDCCLK86
1
2 3
1
2 3
4
UMA_Muxless
UMA_Muxless
RN9504
RN9504
Do Not Stuff
Do Not Stuff
DIS
DIS
DDCDATA
4
DDCCLK
DDCDATA 50
DDCCLK 50
Pull high ڇCRT
SB to -1 modify 4 port Logic
3D3V_S0
4
dGPU_SELECT_A
dGPU_SELECT_B
UMA_Muxless
UMA_Muxless
RN9505
RN9505
SRN0J-6-GP
SRN0J-6-GP
1
2 3
4
3D3V_S0
dGPU_SELECT_B
dGPU_SELECT_A
RN9506
RN9506
Do Not Stuff
Do Not Stuff
1
2 3
DIS
DIS
B B
CRT Hsync & Vsync level shift
5V_S0
U9506B
U9506B
TC74VHCT125AFTQK2M-GP
For DIS CRT
A A
For UMA CRT
5
TC74VHCT125AFTQK2M-GP
73.74125.F0B
73.74125.F0B
14
4
2nd = 73.74125.L13
2nd = 73.74125.L13
5 6
7
CRT_VSYNC1_1 CRT_HSYNC1_1
5V_S0 5V_S0
dGPU_SELECT_B
U9506C
U9506C
TC74VHCT125AFTQK2M-GP
TC74VHCT125AFTQK2M-GP
14
10
73.74125.F0B
73.74125.F0B
2nd = 73.74125.L13
2nd = 73.74125.L13
9 8
7
4
For DIS CRT
VGA_CRT_HSYNC86VGA_CRT_VSYNC86
For UMA CRT
CRT_HSYNC17CRT_VSYNC17
L=>B0 -DIS
H=>B1 -UMA
dGPU_SELECT_A
5V_S0
U9506A
U9506A
TC74VHCT125AFTQK2M-GP
TC74VHCT125AFTQK2M-GP
73.74125.F0B
73.74125.F0B
14
1
2nd = 73.74125.L13
2nd = 73.74125.L13
2 3
7
dGPU_SELECT_B
U9506D
U9506D
TC74VHCT125AFTQK2M-GP
TC74VHCT125AFTQK2M-GP
14
13
73.74125.F0B
73.74125.F0B
2nd = 73.74125.L13
2nd = 73.74125.L13
12 11
7
3
SB to -1 modify R9503,R9504 to 10 ohm
CRT_HSYNC1_1
CRT_VSYNC1_1
2
R9504
R9504
1 2
10R2J-2-GP
10R2J-2-GP
R9503
R9503
1 2
10R2J-2-GP
10R2J-2-GP
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
CRT_HSYNC_CON 50
CRT_VSYNC_CON 50
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CRT_Switch
CRT_Switch
CRT_Switch
JE40-HR
JE40-HR
JE40-HR
95 102
95 102
95 102
1
-1
-1
of
of
-1
Page 96
5
4
3
2
1
SSID = SDIO
D D
C C
B B
A A
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
TOUCH PANEL
TOUCH PANEL
TOUCH PANEL
JE40-HR
JE40-HR
JE40-HR
1
of
96 102
of
96 102
of
96 102
-1
-1
-1
Page 97
5
4
3
2
1
CPU
HS2
HS3
HS3
STF237R128H42-1-GP
STF237R128H42-1-GP
H1
H9
D D
H9
Do Not Stuff
Do Not Stuff
1
H8
H8
Do Not Stuff
Do Not Stuff
1
H7
H7
Do Not Stuff
Do Not Stuff
1
H6
H6
Do Not Stuff
Do Not Stuff
1
H5
H5
Do Not Stuff
Do Not Stuff
1
H4
H4
Do Not Stuff
Do Not Stuff
1
H3
H3
Do Not Stuff
Do Not Stuff
1
SB to -1 BOM add SPR2
SPR3
RFC9717
RFC9717
3G_RF
3G_RF
SPR3
Do Not Stuff
Do Not Stuff
DY
DY
1
RFC9714
RFC9714
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
3G_RF
3G_RF
-2 delete SPR5
RFC9715
RFC9716
RFC9716
12
RFC9715
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
3G_RF
3G_RF
Do Not Stuff
Do Not Stuff
RFC9713
RFC9713
12
DY
DY
SPR2
SPR2
SPRING-63-GP
SPRING-63-GP
1
C C
Change:34.40V16.001
Change:34.40V16.001
3D3V_S5 5V_S0 3D3V_S0 5V_S0
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
3G_RF
3G_RF
H2
H2
Do Not Stuff
Do Not Stuff
1
H1
Do Not Stuff
Do Not Stuff
1
H10
H10
Do Not Stuff
Do Not Stuff
1
H11
H11
Do Not Stuff
Do Not Stuff
1
HS4
HS4
Do Not Stuff
Do Not Stuff
DIS_Muxless
DIS_Muxless
HS7
HS7
STF256R89H178-GP
STF256R89H178-GP
3G Sku
3G Sku
HS2
STF237R128H42-1-GP
STF237R128H42-1-GP
1
VGA
HS5
HS5
Do Not Stuff
Do Not Stuff
1
DIS_Muxless
DIS_Muxless
HS6
HS6
STF256R89H178-GP
STF256R89H178-GP
1
1
AD_JK 1D5V_S3 1D05V_VTT
12
Do Not Stuff
Do Not Stuff
EC9703
EC9703
1
1
Do Not Stuff
Do Not Stuff
12
HS1
HS1
STF237R128H42-1-GP
STF237R128H42-1-GP
EC9702
EC9702
1
Do Not Stuff
Do Not Stuff
DY
DY
Test Point࣋ڇDimm Doorؚၲױၦྒྷ
EC9701
12
EC9706
EC9706
12
Do Not Stuff
Do Not Stuff
DY
DY
EC9705
EC9705
EC9701
12
3G_RF
3G_RF
EC9704
EC9704
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
3G_RF
3G_RF
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
EC9715
EC9715
3G_RF
3G_RF
Check test point
3D3V_S0
3D3V_AUX_S5
3D3V_S5
5V_S5
PM_PWRBTN#19,27
H_CPUPWRGD5,22,36
S5_ENABLE27,36
PLT_RST#5,18,27,31,36,65,66,71,82
AFTP1AFTP1
1
AFTP7AFTP7
1
AFTP8AFTP8
1
AFTP9AFTP9
1
AFTP10AFTP10
1
AFTP11AFTP11
1
AFTP12AFTP12
1
AFTP13AFTP13
1
SCD1U50V3KX-GP
B B
INT_MIC_L_R 29,49
5V_S0
Do Not Stuff
Do Not Stuff
DY
DY
DCBATOUT
SCD1U50V3KX-GP
SCD1U50V3KX-GP
A A
3G_RF
3G_RF
12
RFC9712
RFC9712
RFC9702
RFC9702
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
3G_RF
3G_RF
12
ECL9701
ECL9701
Do Not Stuff
Do Not Stuff
DY
DY
RFC9701
RFC9701
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
3G_RF
3G_RF
RFC9707
RFC9707
12
RFC9711
RFC9711
12
5
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
3G_RF
3G_RF
RFC9708
RFC9708
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
1D5V_S3 1D05V_VGA_S0 1D05V_VGA_S0
RFC9703
RFC9706
RFC9706
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
12
RFC9705
RFC9705
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
RFC9703
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
4
12
RFC9709
RFC9709
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
3D3V_S5 DCBATOUT
RFC9710
RFC9710
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
RFC9704
RFC9704
DY
DY
Do Not Stuff
Do Not Stuff
DCBATOUT
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9714
EC9714
3G_RF
3G_RF
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
EC9711
EC9711
3G_RF
3G_RF
3
12
Do Not Stuff
Do Not Stuff
EC9713
EC9713
DY
DY
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9708
EC9708
3G_RF
3G_RF
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9719
EC9719
3G_RF
3G_RF
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
EC9707
EC9707
3G_RF
3G_RF
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9718
EC9718
3G_RF
3G_RF
12
SC56P50V2JN-2GP
SC56P50V2JN-2GP
EC9712
EC9712
3G_RF
3G_RF
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
EC9716
EC9716
3G_RF
3G_RF
12
SCD1U50V3KX-GP
EC9709
EC9709
3G_RF
3G_RF
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
12
12
3G_RF
3G_RF
2
SCD1U50V3KX-GP
EC9717
EC9717
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
EC9710
EC9710
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
JE40-HR
JE40-HR
JE40-HR
97 102
97 102
97 102
1
of
of
of
-1
-1
-1
Page 98
5
Power Sequence
4
3
2
1
PU4601
1D5V_S3PM_SLP_S4#
D D
0D75V_EN
RUNPWROK
1D5V_S3
0D75V_S0
PU4501
1D05V_S0 1.05VTT_PWRGD
1D05V_VTT
U4801
0D85V_S0 0D85V_S0
ALL_POWER_OK
PLT_RST#
U?
ALL_POWER_OK
C C
EC S0_PWR_GOOD
U?
PCH PM_DRAM_PWRGDU?AND GATE
VDDPWRGOOD
U?
CPU
H_CPU_SVIDCLK
ALL_POWER_OK
H_CPUPWRGD
U?
VCC_GFXCORE
CPU_CORE
SYS_PWROK
VCC_CORE
H_CPU_SVIDCLK
B B
IMVP_PWRGD
U?
AND GATE
S0_PWR_GOOD
A A
5
4
3
2
HR UMA
HR UMA
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet of
Date: Sheet
Date: Sheet
Change History
Change History
Change History
JE40-HR
JE40-HR
JE40-HR
1
of
of
98 102
98 102
98 102
-1
-1
-1
Page 99
5
4
3
2
1
Intel-Power Up Sequence
(AC mode)
+RTC_VCC
PCH_RTCRST#
+PWR_SRC
D D
+3.3V_RTC_LDO
S5_ENABLE
+5V_ALW
+3.3V_ALW
+5VALW_PCH_VCC5REFSUS
+15V_ALW
3V_5V_POK
SUS_PWR_DN_ACK
PCH_RSMRST#(EC Delay 40ms)
PCH_SUSCLK_KBC
AC_PRESENT_EC
AC
AC
PM_SLP_S4#
C C
B B
A A
PM_SLP_S3#
PM_LAN_ENABLE
+3.3V_LAN
+1.5V_SUS
+V_DDR_REF(0.9V)
+5V_RUN
+3.3V_RUN
+5VS_PCH_VCC5REF
+1.5V_RUN
+1.8V_RUN
GFX_CORE_EN(Discrete only)------Delay 5ms
+VGA_CORE(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
+1.0V_RUN_VGA(Discrete only)
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms
+1.8V_RUN_VGA(Discrete only)
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
+3.3V_RUN_VGA(Discrete only)
RUNPWROK
+1.05V_VTT
+0.75V_DDR_VTT
H_VTTPWRGD
GFX_VR_EN(UMA only)
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
IMVP_VR_ON
+VCC_CORE
CLK_CPU_BCLK
CK_PWRGD
IMVP_PWRGD
PM_PWROK
PM_DRAM_PWRGD
H_PWRGD
PLT_RST#
PLTRST_DELAY#
H_CPURST#
T1
T2
T3
T4
KBC_PWRBTN_EC#
PM_PWRBTN#
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
+1.05V_VTT
AC
PM_PWRBTN#
3V_5V_POK
T14
-->Reserved for sequence
T39
( >99ms )
T41
(for S3 Reduction)
5
red word: KBC GPIO
T5
T6
T7
T8
T9
T10
>10ms
Press Power button
T13
T15
>30us
T16
T17
T18
T19
T20
T21
T40
T42
<3ms
1.5CPU_1.05VTT_PWRGD
+1.5V_RUN_CPU
T11
T12
<200ms
T23
T24
43
H_VTTPWRGD
PM_PWROK
+VCC_CORE
T22
>1ms
KBC GPIO36 control
TPS51125 to KBC GPIO46
PCH to KBC GPI94
KBC GPIO43 to PCH
PCH to KBC GPIO00
KBC_PWRBTN_EC# GPIO3
KBC GPO84 to PCH
KBC GPO16 to LAN
+5V_RUN & +3.3V_RUN need meet 0.7V difference
H_PWRGD
T25
>1ms
T26
T27
T28
T29
T30
T31
T32
T33
T34
CPU to TPS51611
KBC GPO53 to ISL62883
CLKIN_BCLK(from CK505) stable
>1ms
T44
T45
Delay 10ms
>5ms
T46
3ms< <20ms
T47
>100ns
T49
T50
T51
0.05ms< <650ms
>1ms
T48
>1ms
>1ms
T52
T53
>1ms
4
KBC GPIO71 to RT8208B
KBC GPIO30 to APL5930
KBC GPIO66 to APL5930
KBC GPI95
T35
TPS51218 to KBC GPI34
T36
T37
T38
UMA GFX CORE Power
CPU CORE Power
ISL62883 to CLOCKGEN
ISL62884 to KBC GPO14
KBC GPIO47 to PCH
KBC LRESET#
T54
KBC GPIO45
T55
(DC mode)
+RTC_VCC
PCH_RTCRST#
+PWR_SRC
+3.3V_RTC_LDO
KBC_PWRBTN_EC#
+KBC_PWR
S5_ENABLE
+5V_ALW
+3.3V_ALW
+5VALW_PCH_VCC5REFSUS
+15V_ALW
3V_5V_POK
PM_PWRBTN#
SUS_PWR_DN_ACK
PCH_RSMRST#
PCH_SUSCLK_KBC
DC
PM_SLP_S4#
PM_SLP_S3#
PM_LAN_ENABLE
+3.3V_LAN
+1.5V_SUS
+V_DDR_REF(0.9V)
+5V_RUN
+3.3V_RUN
+5VS_PCH_VCC5REF
+1.5V_RUN
+1.8V_RUN
GFX_CORE_EN(Discrete only) T26
+VGA_CORE(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)
+1.0V_RUN_VGA(Discrete only)
1.8V_VGA_RUN_EN(Discrete only)
+1.8V_RUN_VGA(Discrete only)
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
+3.3V_RUN_VGA(Discrete only)
RUNPWROK
+1.05V_VTT
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
+0.75V_DDR_VTT
H_VTTPWRGD
+1.05V_VTT
GFX_VR_EN(UMA only)
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
IMVP_VR_ON
+VCC_CORE
CLK_CPU_BCLK
CK_PWRGD
IMVP_PWRGD
PM_PWROK
PM_DRAM_PWRGD
H_PWRGD
PLT_RST#
PLTRST_DELAY#
H_CPURST#
3
red word: KBC GPIO
T1
T2
PCH_RSMRST#
T14
T39
T41
(for S3 Reduction)
Press Power button
T3
T4
T5
T6
T15
>30us
T16
T17
T18
T19
T20
T21
-->Reserved for sequence
T40
( >99ms )
T42
<3ms
1.5CPU_1.05VTT_PWRGD
KBC_PWRBTN_EC# GPIO3
EC_ENABLE# (GPIO51) keep low
KBC GPIO36 control
+5V_ALW & +3.3V_ALW need meet 0.7V difference
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
T8
T9
TPS51125 to KBC GPIO46
T10
T11
T12
>10ms
KBC GPO84 to PCH
PCH to KBC GPI94
KBC GPIO43 to PCH
PCH to KBC GPIO01
T13
KBC GPO16 to LAN
+5V_RUN & +3.3V_RUN need meet 0.7V difference
T22
T23
T24
H_PWRGD
T25
>1ms
T27
T28
T29
T30
T31
CPU to TPS51611
KBC GPO53 to ISL62883
CLKIN_BCLK(from CK505) stable
>1ms
43
+1.5V_RUN_CPU
H_VTTPWRGD
PM_PWROK
+VCC_CORE
>1ms
T44
>5ms
T46
3ms< <20ms
T47
>100ns
T49
T50
T51
0.05ms< <650ms
T52
2
T45
Delay 10ms
>1ms
>1ms
>1ms
T48
T32
T33
T34
T53
>1ms
KBC GPIO71 to RT8208B
KBC GPIO30 to APL5930
KBC GPIO66 to APL5930
KBC GPI95
T35
TPS51218 to KBC GPI34
T36
T37
T38
UMA GFX CORE Power
CPU CORE Power
ISL62883 to CLOCKGEN
ISL62884 to KBC GPO14
KBC GPIO47 to PCH
KBC LRESET#
T54
KBC GPIO45
T55
HR UMA
HR UMA
HR UMA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Power Sequence
Power Sequence
Power Sequence
JE40-HR
JE40-HR
JE40-HR
99 102
99 102
99 102
of
of
of
-1
-1
-1
Page 100
5
4
3
2
1D5V_VGA_S0
1
AO4468
RT8208B
D D
Adapter
DCBATOUT
VGA_CORE
NCP6131S52MNR2G
For Discrete
UP6128PQDD
APL5916KAI
AO4407A
1V_VGA_S0
UP6165BQKF-1
0D75V_S0DDR_VREF_S3
RT9025
1D5V_S3
Charger
VCC_CORE
Battery
BQ24745
+AD
UP6183PQAG
C C
3D3V_AUX_S5
SI2301CDS
+KBC_PWR
5V_AUX_S5
UP7534BRA8
5V_USB1_S3
UP7534BRA8
5V_USB2_S3
USB Power USB Power
5V_S5
UP7534BRA8
5V_USB0_S5
USB Charge Power
VCC_GFXCORE
For UMA
AO4468
5V_S0
G9091
1D05V_VTT
0D85V_S0
AO4468
3D3V_S0
3D3V_S5
3D3V_VGA_S0
For Discrete
For Discrete
RT9025
1D8V_VGA_S0
For Discrete
AO4468
1D5V_S0
1D5V_DDR_S0
RT9025
B B
3D3V_DAC_S0
1D8V_S0
G5285T11U-GP
LCDVDD
3D3V_CARD_S0
Power Shape
Regulator LDO Switch
HR UMA
HR UMA
A A
5
4
3
2
HR UMA
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Thursday, December 02, 2010
Thursday, December 02, 2010
Thursday, December 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet
Power Block Diagram
Power Block Diagram
Power Block Diagram
JE40-HR
JE40-HR
JE40-HR
1
of
of
of
100 102
100 102
100 102
-1
-1
-1
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