Wistron Domino Schematic
5
4
3
2
1
D D
Schematics Document
C C
Domino_BA
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A A
5
4
3
2
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Ti
tle
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
Date: Sheet
Co
Co
Co
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
ver Page
ver Page
ver Page
mino
mino
mino
1
of
11
of
11
of
11
-1
-1
-1
02
02
02
5
Do
D D
D 15"
LC
15.6 WXGA (1366x768) Glare
To
uch Panel
C C
C for Precision Touchpad
I2
2CH
SPEAKER
ternal MIC
Ex
Headphone
B B
4
3
mino_BA Board Block Diagram
C
I2
3L/ 1.35V
DDR
DDR
3L 1333MHz Channel A
MC
eM
US
B2.0 x 1
Ie x 1
PC
PC
Ie x 1
US
B2.0 x 1
US
B2.0
TA PORT0
SA
LPC
BUS
HD
MI 1.4a
US
B3.0/2.0
ODD
HD
Audio Codec
ALC255
SPI Flash
MX
25U6473FM2I
-10G-GP
8M
B
TPM
In
tel CPU
P
eD
52
C x1
I2
B2.0x1
US
52
MI
HD
54
B2.0
US
US
B3.0
34
TA PORT1
SA
56
Audio
HD
27
I
SP
25
LPC
BUS
88
Br
aswell
A15
FCBG
ckage
Pa
25*27
US
B 3.0 (4)/2.0 (5)/HSIC ports (2)
ETHERNET (10/100/1000Mb)
High Definition Audio
LPC I/F
5,7,8,9,10,
11,12,15,16,18,19,21
G
Sensor
BMA250E
DDR
3L-1333
Slot 1
8G
MC
eM
N
LA
altek
Re
RTL8111H
USB 2.0 HUB
2.0 por
ts(4)
GL850G
HD
D
SA
TA2.0 (3G b/s, 300MB/s )
LPC
debug port
2
oject code : 4PD053010001
Pr
PCB P/N : 14285
Revision : -1
70
12
57
30
US
B2.0 x 1
B2.0 x 1
US
US
B2.0 x 1
35
56
65
B2.0
US
RJ
45
Mini-Card
WLAN & BT
comb module
US
B2.0
all Board
sm
Ca
rd reader
mera
Ca
1
CHARGER
HPA02224
INPUTS
DCBATOUT
SYSTEM DC/DC
RT6575D
INPUTS
5V_S5
DCBATOUT
3D3V_S5
CPU DC/DC
NCP81201MNTXG
INPUTS
DCBATOUT
CPU DC/DC
NCP81201MNTXG
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51716
INPUTS
DCBATOUT
SYSTEM DC/DC
34
31
58
63
63
52
TPS51716
INPUTS
1D35V_CPU_VDDQ_S3
DCBATOUT
SYSTEM LDO
S-1339D15
INPUTS
3D3V_S5
SYSTEM LDO
RT9043GB
INPUTS
1D8V_S5
SYSTEM DC/DC
RT8068AZQWID
INPUTS
3D3V_S5
OUTPUTS
BT+
OUTPUTS
46-47
OUTPUTS
1V_CPU_CORE
48
OUTPUTS
GFX_CORE
OUTPUTS
1D05V_S5
OUTPUTS
OUTPUTS
1D5V_S0
OUTPUTS
1D24V_S5
OUTPUTS
1D8V_S5
44
45
50
49
51
51
51
To
uch PAD
PS2
KBC
CE985PB
NP
Ch
Bus
SM
24
t.
In
KB
6262
HP
arger
A02224R
44
Th
ermal
_IN1 / 2
VD
I2C for Precisio n Touchpad
D
VI
26
PCB LAYER
L4:Signal
L1:Top
L5:GND
L2:VCC
L6:Bottom
L3:Signal
A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
, 88, Sec.1, Hsin Tai Wu Rd., Hsich ih,
, 88, Sec.1, Hsin Tai Wu Rd., Hsich ih,
, 88, Sec.1, Hsin Tai Wu Rd., Hsich ih,
21F
21F
21F
Taipei Hs ien 221, Taiwan, R.O.C.
Taipei Hs ien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cu
Cu
Cu
stom
stom
stom
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hs ien 221, Taiwan, R.O.C.
ock Diagram
ock Diagram
ock Diagram
Bl
Bl
Bl
Do
Do
Do
mino
mino
mino
1
-1
-1
2102
2102
2102
-1
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Variant Name>
<Variant Name>
<Variant Name>
A A
Title
Title
Ti
tle
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
eserved)
eserved)
eserved)
(R
(R
(R
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
-1
-1
-1
02
02
31
31
31
of
of
of
1
02
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Variant Name>
<Variant Name>
<Variant Name>
A A
Title
Title
Ti
tle
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
eserved)
eserved)
eserved)
(R
(R
(R
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
-1
-1
-1
02
02
41
41
41
of
of
of
1
02
SSID = CPU
5
4
3
2
1
D D
M_
SM
_RCOMP_0
A_A15
A_A14
M_
A_A13
M_
M_
A_A12
A_A11
M_
M_
A_A10
A_A9
M_
M_
A_A8
A_A7
M_
A_A6
M_
M_
A_A5
M_
A_A4
M_
A_A3
A_A2
M_
M_A_A1
A_A0
M_
V_SM_VREF_CNT
M_
VREF_DQ_DIM0
M_
A_A[15:0]12
A_BS212
M_
M_
A_BS112
M_
A_BS012
A_CAS#12
M_
M_
A_RAS#12
A_WE#12
M_
A_CS#112
M_
M_
A_CS#012
M_
A_CLK112
M_
A_CLK#112
M_
A_CKE112
A_CLK012
M_
M_
A_CLK#012
A_CKE012
M_
C C
SM
_RCOMP_0
12
R504
R504
182R2F-GP
182R2F-GP
Layout Note: Close CPU
B B
1D35V_CPU_VDDQ _S3
DY
DY
01
01
RN5
RN5
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO
CPU PINS ON M_VREF ROUTE THE VREF POWER
SIGNALS WITH THICK TRACES
M_OCAVREF_R
DRA
4
DY
DY
R506
R506
0R2J-2-GP
0R2J-2-GP
12
12
DY
DY
A_DIM0_ODT012
M_
M_
A_DIM0_ODT112
SM
_DRAMRST#12
_DRAM_PWROK36,86
DDR3
A_DM712
M_
M_
A_DM612
M_
A_DM512
M_
A_DM412
M_
A_DM312
A_DM212
M_
M_
A_DM112
A_DM012
M_
M_
A_DQS_DP712
M_A_DQS_DN712
A_DQS_DP612
M_
A_DQS_DN612
M_
M_
A_DQS_DP512
A_DQS_DN512
M_
A_DQS_DP412
M_
A_DQS_DN412
M_
A_DQS_DP312
M_
A_DQS_DN312
M_
M_
A_DQS_DP212
A_DQS_DN212
M_
A_DQS_DP112
M_
M_
A_DQS_DN112
M_
A_DQS_DP012
M_
A_DQS_DN012
SM_VREF_CNT
V_
NOTE:
01
01
C5
C5
SC
SC
PLACE 0.1U CAP CLOSE TO CPU
D1U16V2KX-L-GP
D1U16V2KX-L-GP
U1A
U1A
CP
CP
BD49
DDR3
_M0_MA_15
BD47
DDR3_M0_MA_14
BF44
DDR3
BF48
DDR3
BB49
DDR3
BJ45
DDR3
BE52
DDR3
BD44
DDR3
BE46
DDR3
BB46
DDR3
BH48
DDR3
BD42
DDR3
BH47
DDR3
BJ48
DDR3
BC42
DDR3
BB47
DDR3
BF52
DDR3
AY40
DDR3
BH46
DDR3
BG45
DDR3
BA40
DDR3
BH44
DDR3
AU38
DDR3
AY38
DDR3
BD38
DDR3
BF38
DDR3
AY42
DDR3
BD40
DDR3
BF40
DDR3
BB44
DDR3
AT30
RS
AU30
RS
AV36
DDR3
BA38
DDR3_M0_ODT_1
AT28
DDR3
AU28
DDR3
BA42
DDR3
AV28
DDR3
BA28
DDR3
BH30
DDR3
BD32
DDR3
AY36
DDR3
BG41
DDR3
BA53
DDR3
AP44
DDR3
AT48
DDR3
AP52
DDR3
BH32
DDR3
BG31
DDR3
BC30
DDR3
BC32
DDR3
AT32
DDR3_M0_DQS_5
AT34
DDR3_M0_DQSB_5
BH40
DDR3
BG39
DDR3_M0_DQSB_4
AY52
DDR3_M0_DQS_3
BA51
DDR3
AT42
DDR3
AT41
DDR3
AV47
DDR3
AV48
DDR3
AM52
DDR3
AM51
DDR3
BRASW
BRASW
071.BRASW.000U
071.BRASW.000U
1D
35V_CPU_VDDQ_S3
PLACE TWO 4.7K RESISTORS CLOSE TO CPU TO
CPU PINS ON M_VREF ROUTE THE VREF POWER
SIGNALS WITH THICK TRACES
_M0_MA_13
_M0_MA_12
_M0_MA_11
_M0_MA_10
_M0_MA_9
_M0_MA_8
_M0_MA_7
_M0_MA_6
_M0_MA_5
_M0_MA_4
_M0_MA_3
_M0_MA_2
_M0_MA_1
_M0_MA_0
_M0_BS_2
_M0_BS_1
_M0_BS_0
_M0_CAS#
_M0_RAS#
_M0_WE#
_M0_CS1#
_M0_CS0#
_M0_CK_1
_M0_CK_1#
_M0_CKE_1
_M0_CK_0
_M0_CK_0#
_M0_CKE_0
VD#AT30
VD#AU30
_M0_ODT_0
_M0_OCAVREF
_M0_ODQVREF
_M0_DRAMRST#
_DRAM_PWROK
_M0_RCOMPPD
_M0_DM_7
_M0_DM_6
_M0_DM_5
_M0_DM_4
_M0_DM_3
_M0_DM_2
_M0_DM_1
_M0_DM_0
_M0_DQS_7
_M0_DQSB_7
_M0_DQS_6
_M0_DQSB_6
_M0_DQS_4
_M0_DQSB_3
_M0_DQS_2
_M0_DQSB_2
_M0_DQS_1
_M0_DQSB_1
_M0_DQS_0
_M0_DQSB_0
ELL-GP
ELL-GP
RN5
RN5
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
DDR0
DDR0
DY
DY
02
02
BRASWELL
BRASWELL
4
1 OF 13
1 OF 13
DDR3_M0_DQ_63
DDR3
_M0_DQ_62
_M0_DQ_61
DDR3
_M0_DQ_60
DDR3
DDR3
_M0_DQ_59
DDR3
_M0_DQ_58
DDR3
_M0_DQ_57
_M0_DQ_56
DDR3
_M0_DQ_55
DDR3
DDR3
_M0_DQ_54
DDR3
_M0_DQ_53
DDR3
_M0_DQ_52
DDR3
_M0_DQ_51
_M0_DQ_50
DDR3
DDR3
_M0_DQ_49
_M0_DQ_48
DDR3
DDR3
_M0_DQ_47
DDR3_M0_DQ_46
_M0_DQ_45
DDR3
_M0_DQ_44
DDR3
DDR3
_M0_DQ_43
DDR3
_M0_DQ_42
DDR3
_M0_DQ_41
_M0_DQ_40
DDR3
DDR3
_M0_DQ_39
_M0_DQ_38
DDR3
DDR3
_M0_DQ_37
_M0_DQ_36
DDR3
DDR3
_M0_DQ_35
_M0_DQ_34
DDR3
_M0_DQ_33
DDR3
DDR3
_M0_DQ_32
DDR3
_M0_DQ_31
_M0_DQ_30
DDR3
DDR3_M0_DQ_29
_M0_DQ_28
DDR3
DDR3
_M0_DQ_27
DDR3
_M0_DQ_26
DDR3_M0_DQ_25
DDR3
_M0_DQ_24
DDR3
_M0_DQ_23
DDR3
_M0_DQ_22
DDR3
_M0_DQ_21
DDR3
_M0_DQ_20
_M0_DQ_19
DDR3
DDR3
_M0_DQ_18
_M0_DQ_17
DDR3
DDR3
_M0_DQ_16
DDR3
_M0_DQ_15
_M0_DQ_14
DDR3
_M0_DQ_13
DDR3
DDR3
_M0_DQ_12
_M0_DQ_11
DDR3
DDR3
_M0_DQ_10
_M0_DQ_9
DDR3
DDR3_M0_DQ_8
_M0_DQ_7
DDR3
DDR3_M0_DQ_6
DDR3_M0_DQ_5
_M0_DQ_4
DDR3
_M0_DQ_3
DDR3
_M0_DQ_2
DDR3
_M0_DQ_1
DDR3
_M0_DQ_0
DDR3
M_ODQVREF_R
DRA
BG33
BH28
BJ29
BG28
BG32
BH34
BG29
BJ33
BD28
BF30
BA34
BD34
BD30
BA32
BC34
BF34
AV32
AV34
BD36
BF36
AU32
AU34
BA36
BC36
BH38
BH36
BJ41
BH42
BJ37
BG37
BG43
BG42
BB51
AW53
BC52
AW51
AV51
BC53
AV52
BD52
AV42
AP41
AV41
AT44
AP40
AT38
AP42
AT40
AV45
AY50
AT50
AP47
AV50
AY48
AT47
AP48
AP51
AR53
AK52
AL53
AR51
AT52
AL51
AK51
DY
DY
R5
R5
07
07
0R2J-2-GP
0R2J-2-GP
DY
DY
12
A_DQ63 12
M_
M_
A_DQ62 12
A_DQ61 12
M_
M_
A_DQ60 12
A_DQ59 12
M_
M_
A_DQ58 12
A_DQ57 12
M_
A_DQ56 12
M_
M_
A_DQ55 12
M_
A_DQ54 12
A_DQ53 12
M_
M_A_DQ52 12
A_DQ51 12
M_
M_
A_DQ50 12
M_
A_DQ49 12
M_A_DQ48 12
A_DQ47 12
M_
M_
A_DQ46 12
M_
A_DQ45 12
M_
A_DQ44 12
M_
A_DQ43 12
A_DQ42 12
M_
M_
A_DQ41 12
A_DQ40 12
M_
M_
A_DQ39 12
M_
A_DQ38 12
A_DQ37 12
M_
A_DQ36 12
M_
M_
A_DQ35 12
A_DQ34 12
M_
M_
A_DQ33 12
A_DQ32 12
M_
A_DQ31 12
M_
A_DQ30 12
M_
M_
A_DQ29 12
M_A_DQ28 12
M_
A_DQ27 12
A_DQ26 12
M_
A_DQ25 12
M_
M_
A_DQ24 12
M_
A_DQ23 12
A_DQ22 12
M_
M_
A_DQ21 12
A_DQ20 12
M_
M_
A_DQ19 12
M_
A_DQ18 12
M_
A_DQ17 12
M_
A_DQ16 12
M_
A_DQ15 12
A_DQ14 12
M_
M_
A_DQ13 12
M_
A_DQ12 12
M_A_DQ11 12
A_DQ10 12
M_
A_DQ9 12
M_
M_
A_DQ8 12
A_DQ7 12
M_
A_DQ6 12
M_
A_DQ5 12
M_
A_DQ4 12
M_
M_
A_DQ3 12
A_DQ2 12
M_
A_DQ1 12
M_
M_
A_DQ0 12
VREF_DQ_DIM0
M_
NOTE:
12
C502
C502
SC
SC
PLACE 0.1U CAP CLOSE TO CPU
D1U16V2KX-L-GP
D1U16V2KX-L-GP
_VCCA_PWRGD36
DDR3
SM
_DRAMRST#
DDR3_DRAM_PWROK
_VCCA_PWRGD
DDR3
12
DRA
R5
R5
08
08
182R2F-GP
182R2F-GP
DY
DY
DY
DY
DY
DY
M_RCOMP_1
1 2
1 2
1 2
502
502
EC
EC
SCD1U25V2KX-GP
SCD1U25V2KX-GP
EC
EC
503
503
SCD1U25V2KX-GP
SCD1U25V2KX-GP
EC
EC
504
504
SCD1U25V2KX-GP
SCD1U25V2KX-GP
CPU1
CPU1
BD5
DDR3_M1_MA_15
BD7
DDR3
BF10
DDR3
BF6
DDR3
BB5
DDR3
BJ9
DDR3
BE2
DDR3
BD10
DDR3
BE8
DDR3
BB8
DDR3
BH6
DDR3
BD12
DDR3
BH7
DDR3
BJ6
DDR3
BC12
DDR3
BB7
DDR3
BF2
DDR3
AY14
DDR3
BH8
DDR3_M1_BS_0
BG9
DDR3
BA14
DDR3
BH10
DDR3
AU16
DDR3
AY16
DDR3
BD16
DDR3
BF16
DDR3
AY12
DDR3
BD14
DDR3
BF14
DDR3
BB10
DDR3
AT24
RS
AU24
RS
AV18
DDR3_M1_ODT_0
BA16
DDR3
AT26
DDR3
AU26
DDR3_M1_ODQVREF
BA12
DDR3
AV26
DDR3
BA26
DDR3
BH24
DDR3
BD22
DDR3
AY18
DDR3
BG13
DDR3
BA1
DDR3
AP10
DDR3
AT6
DDR3
AP2
DDR3
BH22
DDR3
BG23
DDR3
BC24
DDR3
BC22
DDR3_M1_DQSB_6
AT22
DDR3_M1_DQS_5
AT20
DDR3
BH14
DDR3_M1_DQS_4
BG15
DDR3_M1_DQSB_4
AY2
DDR3
BA3
DDR3
AT12
DDR3
AT13
DDR3
AV7
DDR3
AV6
DDR3
AM2
DDR3
AM3
DDR3
BRASWELL-GP
BRASWELL-GP
B
B
_M1_MA_14
_M1_MA_13
_M1_MA_12
_M1_MA_11
_M1_MA_10
_M1_MA_9
_M1_MA_8
_M1_MA_7
_M1_MA_6
_M1_MA_5
_M1_MA_4
_M1_MA_3
_M1_MA_2
_M1_MA_1
_M1_MA_0
_M1_BS_2
_M1_BS_1
_M1_CAS#
_M1_RAS#
_M1_WE#
_M1_CS1#
_M1_CS0#
_M1_CK_1
_M1_CK_1#
_M1_CKE_1
_M1_CK_0
_M1_CK_0#
_M1_CKE_0
VD#AT24
VD#AU24
_M1_ODT_1
_M1_OCAVREF
_M1_DRAMRST#
_VCCA_PWROK
_M1_RCOMPPD
_M1_DM_7
_M1_DM_6
_M1_DM_5
_M1_DM_4
_M1_DM_3
_M1_DM_2
_M1_DM_1
_M1_DM_0
_M1_DQS_7
_M1_DQSB_7
_M1_DQS_6
_M1_DQSB_5
_M1_DQS_3
_M1_DQSB_3
_M1_DQS_2
_M1_DQSB_2
_M1_DQS_1
_M1_DQSB_1
_M1_DQS_0
_M1_DQSB_0
DDR1
DDR1
BRASWELL
BRASWELL
2 OF 13
2 OF 13
DDR3
_M1_DQ_63
_M1_DQ_62
DDR3
_M1_DQ_61
DDR3
DDR3
_M1_DQ_60
DDR3
_M1_DQ_59
DDR3
_M1_DQ_58
_M1_DQ_57
DDR3
DDR3
_M1_DQ_56
DDR3
_M1_DQ_55
DDR3
_M1_DQ_54
DDR3
_M1_DQ_53
DDR3
_M1_DQ_52
_M1_DQ_51
DDR3
DDR3
_M1_DQ_50
_M1_DQ_49
DDR3
DDR3
_M1_DQ_48
DDR3_M1_DQ_47
_M1_DQ_46
DDR3
_M1_DQ_45
DDR3
DDR3
_M1_DQ_44
DDR3
_M1_DQ_43
DDR3
_M1_DQ_42
_M1_DQ_41
DDR3
_M1_DQ_40
DDR3
_M1_DQ_39
DDR3
DDR3
_M1_DQ_38
_M1_DQ_37
DDR3
DDR3
_M1_DQ_36
_M1_DQ_35
DDR3
_M1_DQ_34
DDR3
DDR3
_M1_DQ_33
DDR3
_M1_DQ_32
_M1_DQ_31
DDR3
DDR3_M1_DQ_30
_M1_DQ_29
DDR3
DDR3
_M1_DQ_28
DDR3
_M1_DQ_27
DDR3_M1_DQ_26
DDR3
_M1_DQ_25
_M1_DQ_24
DDR3
DDR3
_M1_DQ_23
DDR3
_M1_DQ_22
DDR3
_M1_DQ_21
_M1_DQ_20
DDR3
DDR3
_M1_DQ_19
_M1_DQ_18
DDR3
DDR3
_M1_DQ_17
DDR3
_M1_DQ_16
_M1_DQ_15
DDR3
_M1_DQ_14
DDR3
DDR3
_M1_DQ_13
_M1_DQ_12
DDR3
DDR3
_M1_DQ_11
_M1_DQ_10
DDR3
DDR3_M1_DQ_9
DDR3_M1_DQ_8
DDR3_M1_DQ_7
DDR3_M1_DQ_6
_M1_DQ_5
DDR3
_M1_DQ_4
DDR3
_M1_DQ_3
DDR3
_M1_DQ_2
DDR3
_M1_DQ_1
DDR3
_M1_DQ_0
DDR3
BG21
BH26
BJ25
BG26
BG22
BH20
BG25
BJ21
BD26
BF24
BA20
BD20
BD24
BA22
BC20
BF20
AV22
AV20
BD18
BF18
AU22
AU20
BA18
BC18
BH16
BH18
BJ13
BH12
BJ17
BG17
BG11
BG12
BB3
AW1
BC2
AW3
AV3
BC1
AV2
BD2
AV12
AP13
AV13
AT10
AP14
AT16
AP12
AT14
AV9
AY4
AT4
AP7
AV4
AY6
AT7
AP6
AP3
AR1
AK2
AL1
AR3
AT2
AL3
AK3
A A
Wistron Confidential document, Anyone can not
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<Variant Name>
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stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
CPU
CPU
CPU
Do
Do
Do
mino
mino
mino
1
Taipei Hsien 221, Taiwan, R.O.C.
(DDR)
(DDR)
(DDR)
-1
-1
51
51
51
-1
02
02
02
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
U (CFG)
U (CFG)
U (CFG)
CP
CP
CP
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
61
61
61
-1
-1
-1
02
02
of
of
of
1
02
5
4
3
2
1
SSID = CPU
1D
05V_S5
05V_S5
05V_S5
1D
1D
05V_S5
1D
05V_S5
U1H
U1H
CP
AF36
AG33
AG35
AG36
AG38
AJ33
AJ36
AJ38
AF30
AG27
AG29
AG30
AJ27
AJ29
AJ30
AF29
AD16
AD18
AD19
AF16
AF18
AF19
AF21
AF22
AJ19
AG16
AG18
AG19
AG21
AG22
AG24
AJ21
AJ22
AJ24
AK24
AK30
AK35
AK36
AM29
AK33
AJ35
AM19
AK21
CP
RE_VCC1_S0IX3
CO
RE_VCC1_S0IX7
CO
RE_VCC1_S0IX8
CO
RE_VCC1_S0IX9
CO
RE_VCC1_S0IX10
CO
CO
RE_VCC1_S0IX14
CO
RE_VCC1_S0IX15
CO
RE_VCC1_S0IX16
RE_VCC1_S0IX2
CO
RE_VCC1_S0IX4
CO
RE_VCC1_S0IX5
CO
RE_VCC1_S0IX6
CO
RE_VCC1_S0IX11
CO
CO
RE_VCC1_S0IX12
CO
RE_VCC1_S0IX13
CO
RE_VCC1_S0IX1
_VGG_S0IX1
DDI
_VGG_S0IX2
DDI
_VGG_S0IX3
DDI
_VGG_S0IX4
DDI
DDI
_VGG_S0IX5
DDI
_VGG_S0IX6
DDI
_VGG_S0IX7
DDI
_VGG_S0IX8
_VGG_S0IX15
DDI
_VGG_S0IX9
DDI
_VGG_S0IX10
DDI
_VGG_S0IX11
DDI
_VGG_S0IX12
DDI
DDI
_VGG_S0IX13
DDI
_VGG_S0IX14
DDI
_VGG_S0IX16
DDI
_VGG_S0IX17
_VGG_S0IX18
DDI
_VGG_S0IX19
DDI
RE_V1P15_S0IX1
CO
RE_V1P15_S0IX2
CO
CO
RE_V1P15_S0IX3
CO
RE_V1P15_S0IX4
SE_V1P15_S0IX2
FU
SE_V1P15_S0IX1
FU
_V1P15_S0IX2
DDI
_V1P15_S0IX1
DDI
BRASWELL-GP
BRASWELL-GP
BRASWELL
BRASWELL
UNCO
USB
USB
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
UNCO
RE_V1P15_S0IX10
LKDDRPCIeSATA
LKDDRPCIeSATA
iC
iC
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
E_V1P05A_G31#V22
PCI
PCI
SAT
SAT
USB3
USB3
USBSSI
FU
FU
FUSE
FUSE
D D
C C
15V_S5
1D
1D
15V_S5
B B
Imax=0.7A (1D15V_S5)
1D
15V_S5
Imax=6.4A (merged VCC0+VCC1)
_CPU_CORE
1V
_CPU_CORE
1V
X_CORE
GF
Imax=11A
8 OF 13
8 OF 13
RE_VNN_S41
RE_VNN_S42
RE_VNN_S43
RE_VNN_S44
RE_VNN_S45
RE_VNN_S46
RE_VNN_S47
RE_VNN_S48
RE_VNN_S49
RE_VNN_S410
RE_VNN_S411
RE_VNN_S412
RE_VNN_S413
RE_VNN_S414
RSVD#
RE_V1P15_S0IX6
RE_V1P15_S0IX1
RE_V1P15_S0IX2
RE_V1P15_S0IX3
RE_V1P15_S0IX4
RE_V1P15_S0IX5
RE_V1P15_S0IX7
RE_V1P15_S0IX8
RE_V1P15_S0IX9
IC
IC
E_V1P05A_G32
A_V1P05A_G32
A_V1P05A_G31
SE3_V1P05A_G5
SE_V1P05A_G3
AA30
LK_GND_OFF2
LK_GND_OFF1
V1P05A_G31
V1P05A_G34
V1P05A_G32
V1P05A_G35
V1P05A_G36
V1P05A_G33
_V1P05A_G32
_V1P05A_G31
C_V1P05A_G3
AA18
AA19
AA21
AA22
AA24
AA25
AC18
AC19
AC21
AC22
AC24
AC25
AD25
AD27
AA30
V33
AA32
AA33
AA35
AA36
AC32
Y30
Y32
Y33
Y35
V19
V18
AM21
AM33
AM22
AN22
AN32
AM32
V22
V24
U24
U22
V27
U27
V29
N18
U19
RSVD#
AA30
Imax=1.9A (1D05V_S5)
TP
TP
701 TPAD14-OP-GP
701 TPAD14-OP-GP
1
1D
05V_S5
Wistron Confidential document, Anyone can not
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Duplicate, Modify, Forward or any other purpose
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1D
05V_S5
1D
05V_S5
1D
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
A A
Title
Title
Title
U (VCC_CORE)
U (VCC_CORE)
U (VCC_CORE)
CP
CP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
CP
Do
Do
Do
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
mino
mino
mino
-1
-1
71
71
71
of
of
of
1
-1
02
02
02
SSID = CPU
5
4
3
2
1
D D
I_DATA_CPU_P254
HDM
I_DATA_CPU_N254
HDM
HDM
P_TX_CPU_P052
eD
eD
P_TX_CPU_N052
eDP_TX_CPU_P152
P_TX_CPU_N152
eD
eD
P_AUX_CPU_P52
eD
P_AUX_CPU_N52
eD
P_HPD_CPU_N52
eD
P_BLEN_CPU24
eD
P_BLCTRL_CPU52
eD
P_VDDEN_CPU52
R813
R813
1MR2J-L3-GP
1MR2J-L3-GP
HDM
HDMI_DATA_CPU_P054
HDM
HDM
HDMI_DATA_CPU_N354
R8
R8
02
02
402R2F-GP
402R2F-GP
1 2
1 2
R8
R8
01
01
402R2F-GP
402R2F-GP
eD
TP803TPAD14-OP-GP TP803TPAD14-OP-GP
801TPAD14-OP-GPTP801TPAD14-OP-GP
TP
TP802TPAD14-OP-GP TP802TPAD14-OP-GP
I_DATA_CPU_P154
I_DATA_CPU_N154
I_DATA_CPU_N054
I_DATA_CPU_P354
HDM
I_DET_CPU54
P_BLEN_CPU
1
1
1
DDI
0_PLLOBS_P
0_PLLOBS_N
DDI
P_BLEN_CPU
eD
eD
P_VDDEN_CPU
DDI
DDI
1_PLLOBS_P
1_PLLOBS_N
HV
UA
UA
_DDI2_HPD
RT1_TX
RT1_RX
8V_S5
1D
HDMI
4
RN8
RN8
03
03
SRN2K2J-1-GP
SRN2K2J-1-GP
CRB 2.2k
1
I_CLK_CPU54,86
HDM
HDM
I_DATA_CPU54
C C
1D
8V_S5
P_BLEN_CPU
03 100KR2J-1-GP
03 100KR2J-1-GP
R8
R8
1 2
DY
DY
R804 100KR2J-1-GP
R804 100KR2J-1-GP
1 2
DY
DY
B B
eD
eD
P_BLCTRL_CPU
2 3
EDP
1 2
D50
C51
H49
H50
F53
F52
G53
G52
H47
H46
W51
Y51
Y52
V52
V51
W53
F38
G38
J51
H51
K51
K52
L53
L51
M52
M51
M42
K42
R51
P51
P52
R53
F47
F49
F40
G40
J40
K40
F42
G42
D44
F44
D48
C49
U51
T51
T52
B53
A52
E52
D52
B50
B49
E53
C53
A51
A49
G44
C
C
CPU1
CPU1
DDI
0_TXP_0
0_TXN_0
DDI
0_TXP_1
DDI
DDI
0_TXN_1
DDI
0_TXP_2
DDI
0_TXN_2
DDI
0_TXP_3
0_TXN_3
DDI
DDI
0_AUXP
DDI0_AUXN
_DDI0_HPD
HV
HV
_DDI0_DDC_SCL
HV
_DDI0_DDC_SDA
EL0_BKLTEN
PAN
PAN
EL0_BKLTCTL
EL0_VDDEN
PAN
DDI
0_PLLOBS_P
0_PLLOBS_N
DDI
1_TXP_0
DDI
1_TXN_0
DDI
DDI
1_TXP_1
DDI
1_TXN_1
DDI1_TXP_2
1_TXN_2
DDI
DDI
1_TXP_3
DDI1_TXN_3
1_AUXP
DDI
DDI
1_AUXN
HV
_DDI1_HPD
EL1_BKLTEN
PAN
PAN
EL1_BKLTCTL
EL1_VDDEN
PAN
DDI
1_PLLOBS_P
DDI
1_PLLOBS_N
2_TXP_0
DDI
2_TXN_0
DDI
2_TXP_1
DDI
DDI
2_TXN_1
DDI2_TXP_2
DDI2_TXN_2
DDI2_TXP_3
DDI2_TXN_3
2_AUXP
DDI
2_AUXN
DDI
_DDI2_HPD
HV
_DDI2_DDC_SCL
HV
HV
_DDI2_DDC_SDA
VD#B53
RS
RS
VD#A52
RS
VD#E52
RS
VD#D52
RS
VD#B50
RS
VD#B49
RSVD#E53
RS
VD#C53
RSVD#A51
RSVD#A49
RSVD#G44
BRASWELL
BRASWELL
1.0V
0
0
DDI
DDI
1.8V
1.0V
DDI1
DDI1
1.8V
DDI2
DDI2
DDI2 do not support eDP
1.8V
NC's
NC's
1D8V_S5
MMC1
MMC1
SD
SD
1D8V_S5
SDMMC2
SDMMC2
3.3V
1.8V
3.3V
SDMMC3
SDMMC3
1.8V
3 OF 13
3 OF 13
VD#M44
RS
VD#K44
RS
RS
VD#K48
RS
VD#K47
MC
SI_1_CLKP
SI_1_CLKN
MC
MC
SI_1_DP_0
MC
SI_1_DN_0
MC
SI_1_DP_1
SI_1_DN_1
MC
MC
SI_1_DP_2
SI_1_DN_2
MC
MC
SI_1_DP_3
SI and Camera interface
SI and Camera interface
MC
SI_1_DN_3
MC
MC
SI_2_CLKP
MC
SI_2_CLKN
MC
MC
SI_2_DP_0
MC
SI_2_DN_0
SI_2_DP_1
MC
SI_2_DN_1
MC
VD#T50
RS
RS
VD#T48
MC
SI_COMP
_CAMERASB00
GP
GP
_CAMERASB01
GP
_CAMERASB02
GP
_CAMERASB03
_CAMERASB04
GP
GP_CAMERASB05
_CAMERASB06
GP
GP
_CAMERASB07
GP
_CAMERASB08
GP
_CAMERASB09
_CAMERASB10
GP
GP
_CAMERASB11
MMC1_CLK
SD
MMC1_CMD
SD
SD
MMC1_D0
SD
MMC1_D1
MMC1_D2
SD
MMC1_D3_CD#
SD
MMC
1_D4_SD_WE
MMC
MMC
MMC
MMC1_RCLK
SDMMC1_RCOMP
SDMMC2_CLK
MMC2_CMD
SD
MMC2_D0
SD
MMC2_D1
SD
MMC2_D2
SD
MMC2_D3_CD#
SD
SD
MMC3_CLK
SD
MMC3_CMD
MMC3_CD#
SD
SD
MMC3_D0
SD
MMC3_D1
SD
MMC3_D2
SD
MMC3_D3
SD
MMC3_1P8_EN
SDMMC3_PWR_EN#
SDMMC3_RCOMP
M44
K44
K48
K47
T44
T45
Y47
Y48
V45
V47
V50
V48
T41
T42
P50
P48
P47
P45
M48
M47
T50
T48
SI_COMP
MC
P44
AB41
AB45
AB44
AC53
AB51
AB52
AA51
AB40
Y44
Y42
Y41
V40
M7
P6
M6
M4
P9
P7
T6
T7
1_D5
T10
1_D6
T12
1_D7
T13
SDMMC1_RCOMP
P13
K10
K9
M12
M10
K7
K6
F2
D2
PSW
K3
J1
J3
H3
G2
K2
L3
MMC3_RCOMP
SD
P12
_CLR#
R8
R8
1 2
150R2F-1-GP
150R2F-1-GP
R8
R8
14
14
1 2
100R2F-L1-GP-U
100R2F-L1-GP-U
R8
R8
1 2
80D6R2F-L-GP
80D6R2F-L-GP
17
17
To XDP
GP
_CAMERASB08 15
GP
_CAMERASB09 15
_CAMERASB11 15
GP
MMC
1_CLK 57
MMC
1_CMD_CPU 57
1_D0_CPU 57
MMC
MMC
1_D1_CPU 57
1_D2_CPU 57
MMC
MMC
1_D3_CPU 57
MMC
1_D4_CPU 57
MMC1_D5_CPU 57
MMC
1_D6_CPU 57
1_D7_CPU 57
MMC
1D8V_S5
12
R818
R818
10KR2J-L-GP
RT
C_DET# 25
15
15
10KR2J-L-GP
21
G8
G8
01
01
GAP-OPEN
GAP-OPEN
PSW
_CLR#
BRASWELL-GP
BRASWELL-GP
A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Variant Name>
<Variant Name>
<Variant Name>
application without get Wistron permission
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CPU
CPU
CPU
(DDI/EDP/GPIO)
(DDI/EDP/GPIO)
(DDI/EDP/GPIO)
Do
Do
Do
mino
mino
mino
1
-1
-1
81
81
81
-1
02
02
02
5
4
3
2
1
SSID = CPU
D D
CP
CP
U1L
U1K
U1K
CP
AN
BG30
BG27
BG24
BG20
BG19
BG18
BG16
BG14
BF42
BF32
BF28
BF27
BF26
BF22
BF12
BE35
BE19
C20
BD53
BG7
BD35
BD27
BD19
BD1
BC44
BC40
BC38
BC28
BC26
BC16
BC14
BC10
BB35
BB27
BB19
BA35
BA30
BA27
BA24
BA19
B36
B28
AY7
AY51
AY47
AY34
AY32
AY30
AY3
AN
AY45
21
30
CP
VSS5
VSS1
VSS1
VSS9
VSS9
VSS97
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9
VSS9
VSS8
VSS8
VSS8
VSS8
VSS8
VSS1
VSS8
VSS1
VSS8
VSS8
VSS8
VSS80
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS60
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
VSS6
VSS5
BRASWELL-GP
BRASWELL-GP
CP
CP
U1J
U1J
AN3
VSS9
AN29
VSS9
AN25
VSS9
AN24
VSS9
AN16
VSS94
AN14
VSS9
AN12
VSS9
AN11
VSS9
AN1
VSS9
AM50
VSS8
AM42
VSS8
AM4
VSS8
AM38
VSS8
AM35
VSS8
AH44
VSS6
AM30
VSS8
AM27
VSS8
U25
VSS1
P10
VSS9
AM16
C C
B B
AD4
AK7
AK50
AK47
AK45
AK44
AK40
AK4
AK38
AK32
AK27
AK25
AM24
AK16
AJ53
AJ51
AJ25
AJ16
AH9
AH47
AH42
AH41
AH14
AH13
AH12
AH10
AG25
AF47
AJ3
AJ1
VSS8
VSS3
VSS8
VSS7
VSS78
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS7
VSS8
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS59
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
BRASWELL-GP
BRASWELL-GP
Po
Po
BRASWELL
BRASWELL
8
7
6
5
3
2
1
0
9
8
7
6
5
0
4
3
00
9
1
1
0
9
7
6
5
4
3
2
1
0
2
9
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
wer-VSS
wer-VSS
10 OF 13
10 OF 13
VSS5
VSS5
VSS4
VSS4
VSS47
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS2
VSS2
VSS28
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1
AF38
1
AF32
0
AF25
9
AF10
8
AE9
AE8
6
AE6
5
AE53
4
AE50
3
AE48
2
AE46
1
AE45
0
AE43
9
AE42
8
AE40
7
AE14
6
AE12
5
AE11
4
AE1
3
AD44
2
AD36
0
AC29
3
AD32
9
AD30
AD21
7
AC38
6
AC35
5
AC33
4
AC16
2
AB6
1
AB50
0
AB47
9
AB42
8
AB4
7
AB14
6
AB13
5
AB12
4
AB10
3
AA53
2
AA38
1
AA27
0
AA1
6
A47
A4
3
A3
9
A3
1
3
A2
A1
9
A1
5
A1
1
Po
Po
BRASWELL
BRASWELL
01
00
9
8
6
5
4
3
2
1
0
9
8
7
6
5
03
4
02
3
2
1
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
9
8
6
5
4
3
7
wer-VSS
wer-VSS
11 OF 13
11 OF 13
VSS6
VSS5
VSS5
VSS5
VSS4
VSS48
VSS4
VSS4
VSS4
VSS4
VSS3
VSS2
VSS4
VSS4
VSS4
VSS4
VSS4
VSS3
VSS3
VSS1
VSS3
VSS3
VSS3
VSS3
VSS33
VSS3
VSS3
VSS3
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS1
VSS1
VSS1
VSS1
VSS1
VSS14
VSS1
VSS1
VSS1
VSS1
VSS9
VSS8
VSS7
AY9
1
AY28
2
AY26
1
AY24
0
AY22
9
AY20
AW35
7
AW27
6
AW19
5
13
AM
AK2
9
AK2
2
AV40
4
AV35
3
AV30
2
AV27
1
AV24
0
AV19
9
AV14
8
AJ
18
AU53
7
AU51
6
AU3
5
AU1
4
AT9
AT51
2
AT45
1
AT36
0
AT35
9
AT3
8
AT27
7
AT19
6
AT18
5
AP9
4
AP50
3
AP45
2
AP4
1
AN9
0
AN8
9
AN6
8
AN53
7
AN51
6
AN5
5
AN49
AN48
3
AN46
2
AN45
1
AN43
0
AN
42
AN
40
AN
38
U1L
AN
33
VSS2
P32
VSS9
P27
VSS9
P22
VSS9
P19
VSS9
AF
24
VSS1
N53
VSS95
N51
VSS9
N32
VSS9
N24
VSS9
N22
VSS9
M9
VSS9
K45
VSS7
M40
VSS8
M35
VSS8
M27
VSS8
AW
13
VSS3
M19
VSS8
M14
VSS8
L35
VSS8
L27
VSS8
L19
VSS8
L1
VSS7
K50
VSS7
T47
VSS100
K4
VSS7
K36
VSS7
K34
VSS7
K32
VSS7
K30
VSS7
K24
VSS7
K22
VSS7
K16
VSS6
K14
VSS6
K12
VSS6
J53
VSS6
M45
VSS8
J38
VSS6
J35
VSS6
J30
VSS6
J27
VSS6
J22
VSS6
J19
VSS5
J18
VSS58
H8
VSS5
E46
VSS4
H35
VSS5
H27
VSS5
H19
VSS5
M50
VSS8
V25
VSS1
BRASWELL-GP
BRASWELL-GP
Po
Po
BRASWELL
BRASWELL
9
8
7
6
4
3
2
1
0
7
7
6
5
4
3
2
1
0
9
8
6
5
4
3
2
1
0
9
8
7
6
8
4
3
2
1
0
9
7
0
6
5
4
9
01
wer-VSS
wer-VSS
12 OF 13
12 OF 13
VSS1
VSS5
VSS5
VSS5
VSS5
VSS4
VSS48
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS4
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS6
VSS29
VSS2
VSS2
VSS2
VSS2
VSS2
VSS2
VSS4
VSS2
VSS2
VSS2
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS11
VSS1
VSS9
VSS8
VSS7
VSS6
VSS5
Y24
02
G30
3
G28
2
G26
1
G22
0
G14
9
G12
F5
7
F35
6
F32
5
F27
4
F24
3
F19
2
E51
1
E35
9
E19
8
D42
7
D40
6
D38
5
D32
4
D27
3
D24
2
D16
1
D10
0
J42
5
C47
C39
8
C36
7
C30
6
C3
5
C28
4
C22
3
AW
BJ7
2
BJ47
1
BJ43
0
BJ39
9
BJ35
8
BJ31
7
BJ27
6
BJ23
5
BJ19
4
BJ15
3
BJ11
2
BG5
BG49
0
BG
BG
BG
BG
BG
B52 MAY NOT BE ABLE TO BREAK OUT IN ROUTING
41
40
38
36
35
34
901
901
TP
TP
TPAD14-OP-GP
TPAD14-OP-GP
TP
TP
902
902
TPAD14-OP-GP
TPAD14-OP-GP
CPU_
VSS16
1
nc b52
CPU_
VSS2
1
BH53
BH52
BH2
BH1
BG53
BG1
M24
BF
BF
BB5
BB4
BG47
F1
C1
B5
B2
A6
A5
A7
50
Y9
Y50
Y45
Y40
Y4
Y38
Y29
Y22
Y21
Y19
Y16
Y14
Y10
P4
L41
P36
CP
CP
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
VSS1
2
VSS5
VSS4
VSS2
VSS1
VSSA
VSS3
VSS9
4
VSS8
0
VSS7
VSS6
VSS1
VSS7
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS6
VSS60
VSS5
VSS5
VSS2
VSS1
VSS2
BRASWELL-GP
BRASWELL-GP
U1M
U1M
Po
Po
BRASWELL
BRASWELL
8
7
6
5
4
3
2
0
1
0
9
8
7
6
5
4
3
2
1
9
8
2
9
1
wer-VSS
wer-VSS
13 OF 13
13 OF 13
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
VSS5
VSS4
VSS4
VSS4
VSS4
VSS4
VSS44
VSS4
VSS4
VSS4
VSS4
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS3
VSS2
VSS2
VSS27
VSS2
VSS2
VSS2
VSS2
VSS2
W1
7
V44
6
V42
5
V41
4
V38
3
V32
2
V21
1
V16
0
U9
9
U8
8
U6
7
U53
6
U5
5
U49
U48
3
U46
2
U45
1
U43
0
U42
9
U40
8
U38
7
U33
5
U32
4
U30
3
U29
2
U21
1
U18
0
U36
6
U14
9
U12
8
U11
T9
6
P42
3
T14
5
R1
4
P35
0
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
A A
5
4
3
2
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
Date: Sheet
CP
CP
CP
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
U (VSS)
U (VSS)
U (VSS)
mino
mino
mino
of
of
of
9102
9102
9102
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
1V
_CPU_CORE
AF36, AG33, AG35, AG36, AG38, AJ33, AJ36, AJ38
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
PC1
PC1
C1
PC1
PC1
SC10U6D3V3MX-L-GP
PLACE ALL THE CAPS
UNDER THE PKG SHADOW
D D
SC10U6D3V3MX-L-GP
12
042
042
C1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
027
027
12
048
048
12
12
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1
C1
030
030
12
DY
DY
PC1
PC1
C1
C1
029
029
12
DY
DY
PC1
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
058
058
059
059
DY
DY
1D
05V_S5
AA18, AA19, AA21, AA22, AA24, AA25, AC18, AC19, AC21, AC22, AC24, AC25, AD25, AD27
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
024
024
12
12
SC1U10V2KX-1GP
C1
C1
C1
C1
025
025
001
001
12
12
SC1U10V2KX-1GP
SC10U6D3V3MX-L-GP
C1
C1
002
002
12
SC10U6D3V3MX-L-GP
C1
C1
PC1
PC1
008
008
12
12
009
009
PC1
PC1
010
010
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1
PC1
12
011
011
_CPU_CORE
1V
AF30, AG27, AG29, AG30, AJ27, AJ29, AJ30, AF29
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
SC4D7U6D3V2MX-GP-U
C1
C1
032
032
PC1
PC1
045
045
SC4D7U6D3V2MX-GP-U
C1
C1
036
036
12
PC1
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
12
062
062
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
039
039
049
049
12
12
12
DY
DY
12
DY
DY
PC1
PC1
PC1
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
061
061
060
060
DY
DY
PC1
PC1
PC1
PC1
PC1
12
DY
DY
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
064
064
065
065
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
063
063
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC4D7U6D3V2MX-GP-U
PC1
PC1
041
041
PC1
PC1
044
044
SC4D7U6D3V2MX-GP-U
C1
C1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
033
033
12
12
PC1
PC1
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
12
12
046
046
DY
DY
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
037
037
038
038
12
12
PC1
PC1
SC10U6D3V3MX-L-GP
PC1
PC1
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
031
031
15V_S5
12
SC10U6D3V3MX-L-GP
12
12
040
040
PC1
PC1
SC10U6D3V2MX-GP-U
SC10U6D3V2MX-GP-U
12
12
043
043
DY
DY
DY
DY
12/2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1034
C1034
035
035
12
PLACE ALL THE CAPS
UNDER THE PKG SHADOW
C C
B B
GF
X_CORE
12
DY
DY
1D
05V_S5
1D
V33, AA32, AA33, AA35, AA36, AC32, Y30, Y32, Y33, Y35
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
20150313 SC
PC1
PC1
12
014
014
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
SC1U10V2KX-1GP
C1
C1
005
005
12
05V_S5
1D
C1
C1
C1
C1
003
003
004
12
004
12
V18, V19
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12/2
1D
05V_S5
1D
12
05V_S5
C1018
C1018
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
050
050
12
DY
DY
U19
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
023
023
022
022
12
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1020
C1020
C1
C1
021
021
12
12
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
006
006
007
007
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
057
057
056
056
12
DY
DY
1D
1D
12
05V_S5
12
05V_S5
AM21, AM33, AM22, AN22, AN32, AM32
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PC1
PC1
C1
C1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
013
013
12
12
012
012
DY
DY
1D
05V_S5
V29 V22, V24, U24, U22, V27, U27
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
016
016
017
017
12
12
05V_S5
1D
N18
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
015
015
12
DY
DY
20150313 SC
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
019
019
DY
DY
DY
DY
DY
DY
DY
DY
DY
20150313 SC
1D15V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1047
C1047
12
A A
DY
DY
5
20150313 SC
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
026
026
028
028
12
12
DY
DY
DY
DY
DY
1D05V_S5 1D05V_S5
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1
PC1
PC1
PC1
12
12
051
051
052
052
DY
DY
DY
DY
PLACE CLOSE TO PIN 1 OF RA
4
3
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
PC1054
PC1054
PC1055
PC1055
12
DY
DY
PC1
PC1
12
12
053
053
PLACE CLOSE TO PIN 1 OF RB
DY
DY
DY
DY
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
2
Date: Sheet
CP
CP
CP
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
U (Power CAP1)
U (Power CAP1)
U (Power CAP1)
mino
mino
mino
10 102
10 102
10 102
1
-1
-1
of
of
of
-1
5
4
3
2
1
SSID = CPU
1D
35V_CPU_VDDQ_S3
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PC1
PC1
C1
C1
101
101
12
D D
Close to CPU
1D
35V_CPU_VDDQ_S3
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
118
118
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
143
143
12
Close to DDR
1D
24V_S5
1D
35V_CPU_VDDQ_S3
1D
24V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PC1
PC1
C1
C1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
112
112
12
12
119
119
SC1U10V2KX-1GP
C1
C1
144
144
12
Close to DDRClose to CPU
1D
05V_S5
12
RT
C_AUX_S5
H10, G10
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
125
125
C1
C1
132
132
12
C5, B6
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3D
3V_S5_PRIME
12
C1
C1
103
103
D4, E3
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Place close to CPU V36, Y36 T40, P40
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PC1
PC1
PC1
PC1
PC1
PC1
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
C C
24V_S5
1D
SC10U6D3V3MX-L-GP
12
120
120
122
122
PC1
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
SC10U6D3V3MX-L-GP
12
123
123
124
124
DY
DY
24V_S5
1D
M41 U35, V35
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
1D
12
DY
DY
24V_S5
C1
128
128
DY
DY
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
137
137
138
138
12
SC1U10V2KX-1GP
C1
C1
131
131
12
24V_S5
1D
Y27, Y25
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
134
134
12
24V_S5
1D
AF35, AD35, AD38, AC36 H44 P41
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
SC1U10V2KX-1GP
C1
C1
149
149
12
C1
C1
109
109
12
B B
20150313 SC
SC1U10V2KX-1GP
C1
C1
108
108
12
12
DY
DY
SC1U10V2KX-1GP
C1
C1
C1
C1
107
107
106
106
12
12
1D
8V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
114
114
DY
DY
1D
24V_S5
12
P38, V30, AC30
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
147
147
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
150
150
1D
12
DY
DY
24V_S5
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1117
C1117
116
116
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
129
129
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
148
148
12
DY
DY
3V_S5_PRIME
1D
8V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1105
C1105
104
104
12
12
3D
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
115
115
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
126
126
12
20150302 SC
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
127
127
12
3
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
2
Date: Sheet
CP
CP
CP
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
U (Power CAP2)
U (Power CAP2)
U (Power CAP2)
mino
mino
mino
11 102
11 102
11 102
1
-1
-1
of
of
of
-1
DY
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
111
111
DY
1D
8V_VCCCFIOAZA
12
4
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
102
102
DY
DY
1D
8V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
C1
C1
121
121
113
113
12
12
DY
DY
DY
A A
5
DY
20150313 SC
1D
8V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1130
C1130
12
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
110
110
12
DY
DY
3D
3V_1D8V_VCCPADCF1SI0
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1
C1
133
133
12
3D
3V_1D8V_VCCPADCF3SI0
5
4
3
2
1
SSID = MEMORY
P30
DM
DM
1
D D
A_A[15:0] 5
M_
M_
A_BS25
A_BS05
M_
M_A_BS15
M_
A_DQ15
A_DQ45
M_
M_
A_DQ25
M_
A_DQ35
M_
A_DQ05
M_
A_DQ55
A_DQ65
M_
M_
A_DQ75
A_DQ135
M_
M_
A_DQ95
M_
A_DQ105
M_
A_DQ145
A_DQ85
M_
A_DQ125
M_
M_
A_DQ115
A_DQ155
M_
M_
A_DQ225
A_DQ175
M_
C C
B B
M_A_DIM0_ODT05
M_
A_DIM0_ODT15
SM_DRAMRST#5
A A
M_A_DQ185
A_DQ235
M_
A_DQ195
M_
M_
A_DQ165
M_A_DQ205
M_
A_DQ215
A_DQ285
M_
A_DQ305
M_
M_
A_DQ245
M_
A_DQ265
M_
A_DQ275
A_DQ255
M_
M_
A_DQ315
A_DQ295
M_
M_
A_DQ325
M_
A_DQ375
M_
A_DQ345
M_
A_DQ385
A_DQ365
M_
M_
A_DQ335
A_DQ355
M_
M_
A_DQ395
M_
A_DQ405
M_A_DQ415
A_DQ425
M_
A_DQ465
M_
M_
A_DQ445
A_DQ455
M_
A_DQ435
M_
A_DQ475
M_
A_DQ485
M_
A_DQ525
M_
M_
A_DQ555
A_DQ515
M_
A_DQ535
M_
M_
A_DQ495
M_
A_DQ545
M_
A_DQ505
M_
A_DQ565
M_
A_DQ595
M_
A_DQ625
M_
A_DQ605
M_A_DQ585
M_A_DQ635
M_
A_DQ615
M_A_DQ575
A_DQS_DN05
M_
A_DQS_DN15
M_
M_A_DQS_DN25
A_DQS_DN35
M_
A_DQS_DN45
M_
A_DQS_DN55
M_
A_DQS_DN65
M_
A_DQS_DN75
M_
A_DQS_DP05
M_
M_
A_DQS_DP15
M_
A_DQS_DP25
M_
A_DQS_DP35
M_
A_DQS_DP45
M_
A_DQS_DP55
M_A_DQS_DP65
M_
A_DQS_DP75
VR
VREF_DQ
5
M_
A_DIM0_ODT0
M_A_DIM0_ODT1
EF_CA
675V_VREF_S0
0D
A_A0
M_
M_
A_A1
A_A2
M_
M_
A_A3
A_A4
M_
A_A5
M_
M_
A_A6
A_A7
M_
M_
A_A8
A_A9
M_
M_
A_A10
A_A11
M_
A_A12
M_
M_
A_A13
M_
A_A14
M_
A_A15
1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A1
0/AP
84
1
A1
83
A1
2
119
3
A1
80
A1
4
78
A1
5
79
A1
6/BA2
109
BA0
108
BA1
5
DQ
0
7
DQ
1
15
DQ2
17
3
DQ
4
4
DQ
6
DQ
5
16
DQ
6
18
DQ
7
21
8
DQ
23
9
DQ
33
DQ
10
35
11
DQ
22
DQ
12
24
13
DQ
34
DQ
14
36
15
DQ
39
16
DQ
41
DQ
17
51
DQ
18
53
DQ
19
40
20
DQ
42
DQ21
50
22
DQ
52
DQ
23
57
DQ
24
59
DQ25
67
DQ
26
69
27
DQ
56
DQ
28
58
DQ
29
68
DQ
30
70
DQ
31
129
32
DQ
131
DQ
33
141
34
DQ
143
DQ
35
130
DQ
36
132
DQ
37
140
38
DQ
142
39
DQ
147
DQ
40
149
41
DQ
157
DQ
42
159
43
DQ
146
DQ44
148
DQ45
158
46
DQ
160
DQ47
163
DQ48
165
49
DQ
175
50
DQ
177
51
DQ
164
52
DQ
166
53
DQ
174
54
DQ
176
55
DQ
181
DQ
56
183
DQ
57
191
58
DQ
193
DQ
59
180
DQ
60
182
DQ
61
192
DQ
62
194
DQ
63
10
DQ
S0#
27
DQS1#
45
DQS2#
62
DQS3#
135
S4#
DQ
152
DQS5#
169
S6#
DQ
186
S7#
DQ
12
S0
DQ
29
S1
DQ
47
DQ
S2
64
S3
DQ
137
S4
DQ
154
DQ
S5
171
DQ
S6
188
DQ
S7
116
OD
T0
120
OD
T1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
T1
VT
204
VTT2
SKT_DDR 204P SMD
SKT_DDR 204P SMD
DDR3-204P-263-GP-U
DDR3-204P-263-GP-U
d = 62.10024.M51
d = 62.10024.M51
2n
2n
62.10024.S61
62.10024.S61
4th = 62.10017.I21
4th = 62.10017.I21
3rd = 62.10024.Q71
3rd = 62.10024.Q71
NP1
NP1
NP2
2
NP
110
RA
S#
113
WE#
115
CA
S#
114
0#
CS
121
CS
1#
73
CK
E0
74
E1
CK
101
0
CK
103
CK
0#
102
CK
1
104
CK
1#
11
DM
0
28
1
DM
46
DM
2
63
DM
3
136
DM4
153
5
DM
170
6
DM
187
DM
7
200
SD
A
202
L
SC
EVEN
T#
VD
DSPD
SA0
SA1
NC#
1
NC#
2
NC#
/TEST
VDD1
D2
VD
VD
D3
VD
D4
VDD5
VD
D6
D7
VD
VD
D8
VD
D9
VD
D10
VD
D11
D12
VD
VD
D13
D14
VD
VD
D15
VD
D16
VD
D17
D18
VD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
198
199
197
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
TS
#_DIMM0_1
SA0 DIM0 = 0
SA1 DIM0 = 0
35V_CPU_VDDQ_S3
1D
4
M_
A_RAS# 5
M_
A_WE# 5
A_CAS# 5
M_
A_CS#0 5
M_
M_
A_CS#1 5
M_
A_CKE0 5
M_
A_CKE1 5
M_
A_CLK0 5
A_CLK#0 5
M_
M_
A_CLK1 5
M_A_CLK#1 5
M_
A_DM0 5
M_A_DM1 5
M_
A_DM2 5
A_DM3 5
M_
M_
A_DM4 5
M_
A_DM5 5
M_
A_DM6 5
M_
A_DM7 5
SM
B_DATA_DIMM 16
B_CLK_DIMM 16
SM
35V_CPU_VDDQ_S3
1D
3D
3V_S0
DY
DY
12
12
C1
C1
C1
C1
208
208
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
Layout Note:
Place these Caps near SO-DIMMA.
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
SODIMM A DECOUPLING
12
675V_VREF_S0
0D
DY
DY
10/13 EMC add
12
DY
DY
12
214
214
C1
C1
SC
SC
1U10V2KX-1GP
1U10V2KX-1GP
35V_CPU_VDDQ_S3
1D
EC
EC
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1201
1201
12
DY
DY
DY
DY
C1
C1
DY
DY
12
12
C1
C1
204
204
203
203
SC
SC
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
12
12
209
209
210
210
C1
C1
C1
C1
SC
SC
SC
SC
1U10V2KX-1GP
1U10V2KX-1GP
1U10V2KX-1GP
1U10V2KX-1GP
Layout Note:
Place these capsclose to VTT1 and VTT2.
12
12
216
216
215
215
C1
C1
C1
C1
SC
SC
SC
SC
1U10V2KX-1GP
1U10V2KX-1GP
1U10V2KX-1GP
1U10V2KX-1GP
DY
DY
EC
EC
EC
EC
EC
EC
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1203
1203
1204
1204
1202
1202
12
12
DY
DY
DY
DY
Reseve 0.1uF for ESD
No
te:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMM A SPD Address is 0xA0
SO-DIMM A TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMM A SPD Address is 0xA2
SO-DIMM A TS Address is 0x32
3D
3V_S0
R1
R1
211
TS
#_DIMM0_1
202
202
211
10KR2J-L-GP
10KR2J-L-GP
1 2
For Intel Recommend Close to DIMM(Braswell)
1D
35V_CPU_VDDQ_S3
SRN4K7J-8-GP
203
203
R1
12
C1
C1
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
12
C1
C1
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
1 2
213
213
20140304 SC
R1207
R1207
1 2
0R0402-PAD
0R0402-PAD
201
201
R1
0R2J-2-GP
0R2J-2-GP
EF_DQ_R1203
VR
VR
EF_CA_R1207
EF_DQ
VR
20150108 SA
12
C1
C1
C1
C1
205
205
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
12
211
211
C1
C1
SC
SC
1U10V2KX-1GP
1U10V2KX-1GP
12
217
217
C1
C1
SC
SC
1U10V2KX-1GP
1U10V2KX-1GP
DY
DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
207
207
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
12
C1
C1
DY
DY
C1
C1
221
221
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
220
220
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
20150108 SA
12
12
C1
C1
C1
C1
222
222
223
223
SC
SC
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
For Intel Recommend Close to DIMM(Braswell)
VR
EF_CA
3
2
12
C1
C1
206
206
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
12
212
212
C1
C1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
219
219
C1
C1
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
SRN4K7J-8-GP
1
4
2 3
RN1
RN1
201
201
1D35V_CPU_VDDQ _S3
RN1202
RN1202
2 3
1
4
SRN4K7J-8-GP
SRN4K7J-8-GP
Wistron Confidential document, Anyone can not
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<Variant Name>
<Variant Name>
<Variant Name>
application without get Wistron permission
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
DDR3-
DDR3-
DDR3-
Do
Do
Do
mino
mino
mino
1
Taipei Hsien 221, Taiwan, R.O.C.
SODIMM1
SODIMM1
SODIMM1
12
12
12
-1
-1
-1
102
102
102
5
4
3
2
1
SSID = MEMORY
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
eserved)
eserved)
eserved)
(R
(R
(R
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
13
13
13
-1
-1
-1
102
102
of
of
of
1
102
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
eserved)
eserved)
eserved)
(R
(R
(R
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
14
14
14
-1
-1
-1
102
102
of
of
of
1
102
5
SSID = STRAP
GPIO
D D
Schematic
STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC
SHOULD BE PLACED OUTSIDE KOZ AREA
0_Detected DDI1_DetectedDescription
DDI
_S5
1D8V
12
R1521
R1521
4K
4K
7R2F-GP
7R2F-GP
SO
C_WAKE_SCI# 16,24
12
R1516
R1516
10K
10K
R2F-2-GP
R2F-2-GP
DY
DY
All the straps are sampled on the rising edge of the
PMC_RSMRST_N signal (check list)
A16 Sw ap
Override
GP
IO_SUS1 GPIO_SUS2
1D8V
_S5
12
R1518
R1518
4K
4K
7R2F-GP
7R2F-GP
GP
12
R1512
R1512
10K
10K
R2F-2-GP
R2F-2-GP
DY
DY
IO_SUS1 16
1D8V
_S5
12
R1517
R1517
10K
10K
12
R1508
R1508
10K
10K
R2F-2-GP
R2F-2-GP
DY
DY
R2F-2-GP
R2F-2-GP
4
DSI Display Detected Boot BIOS Strap BBS
GP
IO_SUS3 GPIO_SUS4GPIO_SUS0
1D
8V_S5
12
R1
R1
520
520
10KR2F-2-GP
10KR2F-2-GP
DY
DY
IO_SUS2 16
GP
DY
DY
12
504
504
R1
R1
10KR2F-2-GP
10KR2F-2-GP
GP
IO_SUS3 16
3
Flash Descriptor
Security Override
GPIO_SUS5
1D
8V_S5
12
R1
R1
532
532
100KR2J-1-GP
100KR2J-1-GP
12
503
503
R1
R1
10KR2F-2-GP
10KR2F-2-GP
DY
DY
Stuff for production
1D
8V_S5
12
DY
DY
_IN#_CPU 16,62
TP
12
R1
R1
DY
DY
4K7R2F-GP
4K7R2F-GP
R1
R1
531
531
100KR2J-1-GP
100KR2J-1-GP
519
519
ME_
DFX Boot Halt Strap
& VISA Early POSM Debug Enable
FWP_SOC 16
GP
IO_SUS6 GPI O_SUS7
1D
8V_S5
12
R1
R1
506
506
4K7R2F-GP
4K7R2F-GP
C_RUNTIME_SCI# 16,24
SO
12
513
513
R1
R1
10KR2F-2-GP
10KR2F-2-GP
DY
DY
DFX Sus Debug Strap
1D
8V_S5
12
R1
R1
514
514
10KR2F-2-GP
10KR2F-2-GP
SMI# 16,24
EC_
12
515
515
R1
R1
10KR2F-2-GP
10KR2F-2-GP
DY
DY
2
LK, USB2, DDI SFR
IC
Supply Select
SEC
_GPIO_SUS8
8V_S5
1D
12
R1
R1
523
523
DY
DY
10KR2F-2-GP
10KR2F-2-GP
SEC_
GPIO_SUS8 16
12
R1
R1
522
522
4K7R2F-GP
4K7R2F-GP
1
ICLK SFR
Bypass
SEC
_GPIO_SUS9 SEC_GPIO_SUS10 GP_CAMERASB09GP_CAMERASB08 GP_CAMERASB11
1D
8V_S5
12
R1
R1
525
525
1KR2J-1-GP
1KR2J-1-GP
DY
DY
12
R1
R1
524
524
10KR2F-2-GP
10KR2F-2-GP
DY
DY
SEC_
GPIO_SUS9 16
POSM Select
8V_S5
1D
12
R1
R1
527
527
10KR2F-2-GP
10KR2F-2-GP
DY
DY
12
R1
R1
526
526
10KR2F-2-GP
10KR2F-2-GP
DY
DY
SEC_
GPIO_SUS10 16
ICLK Xtal OSC
Bypass
8V_S5
1D
12
R1
R1
529
529
10KR2F-2-GP
10KR2F-2-GP
DY
DY
12
533
533
R1
R1
100KR2J-1-GP
100KR2J-1-GP
GP
_CAMERASB08 8
CCU SUS RO
Bypass
8V_S5
1D
12
R1
R1
535
535
10KR2F-2-GP
10KR2F-2-GP
DY
DY
GP
12
534
534
R1
R1
100KR2J-1-GP
100KR2J-1-GP
_CAMERASB09 8
RT
bypass
8V_S5
1D
12
R1
R1
537
537
10KR2F-2-GP
10KR2F-2-GP
DY
DY
12
536
536
R1
R1
100KR2J-1-GP
100KR2J-1-GP
C OSC
GP
_CAMERASB11 8
High
Low
C C
B B
DDI0 Detect
Disable
DDI1 Detect
Disable
Normal Operation
Change Boot
Loader address
(A16 Override)
DSI Detect
Disable
Weak internal pull-down
Boot from SPI
Boot from LPC
Weak internal pull-up
Normal Operation
Override
Normal
Halt boot enable
Weak internal pull-up
Normal
Sus Debug enable
1.35V
1.25V
Weak internal pull-up
Bypass
with 1.05V
No bypass
PMC
Fuse controller
Weak internal pull-down
Bypass
No bypass
Bypass
No bypass
Bypass
No bypass
A A
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Variant Name>
<Variant Name>
<Variant Name>
application without get Wistron permission
W
W
W
istron Corporation
istron Corporation
istron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CP
CP
CP
U(STRAP)
U(STRAP)
U(STRAP)
Domino
Domino
Domino
Taipei Hsien 221, Taiwan, R.O.C.
15
15
15
-1
-1
-1
102
102
102
of
of
of
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
5
SSID = PCH
B30_TX_CPU_P034
US
US
B30_TX_CPU_N034
US
B30_RX_CPU_P034
US
B30_RX_CPU_N034
C1
C1
601
601
12
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SPEC CL=8.5pF
D D
602
602
C1
C1
12
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
8V_S5
1D
8V_S5
1D
C C
B B
A A
607
607
RN1
RN1
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
1 2
DY
DY
612 1KR2J-1-GP
612 1KR2J-1-GP
R1
R1
R1
R1
637
637
1 2
1 2
R1
R1
641 113R2F-GP
641 113R2F-GP
4
PC
U_SMB_ALERT#
US
B_HSIC_RCOMP
45D3R2F-L-GP
45D3R2F-L-GP
B_RCOMP
US
US
B_OC#0
US
B_OC#1
X1
X1
601
601
4 1
XTAL-19D2MHZ-12-GP
XTAL-19D2MHZ-12-GP
5
23
BOM use HSX321S
1st
1st
R1
R1
601 2K49R2F-GP
601 2K49R2F-GP
ENSOR_INT#70
GS
L_19D2M_X1_CPU
XT
R1
R1
200KR2F-L-GP
200KR2F-L-GP
1 2
XT
L_19D2M_X2_CPU
= 082.30001.0071
= 082.30001.0071
1 2
R1
R1
C_WAKE_SCI#15,24
SO
TP_IN#_CPU15,62
_FWP_SOC15
ME
C_RUNTIME_SCI#15,24
SO
EC
_GPIO_SUS915
SEC
_GPIO_SUS815
SEC
_GPIO_SUS1015
SEC
1 2
603
603
XT
L_19D2M_X1_CPU
XT
L_19D2M_X2_CPU
1 2
636 49D9R2F-GP
636 49D9R2F-GP
TP
1613TPAD14-OP-GPTP1613TPAD14-OP-GP
TP
1614TPAD14-OP-GPTP1614TPAD14-OP-GP
1615TPAD14-OP-GPTP1615TPAD14-OP-GP
TP
TP
1616TPAD14-OP-GPTP1616TPAD14-OP-GP
TP
R1639
R1639
1617TPAD14-OP-GPTP1617TPAD14-OP-GP
TP
TP
1612
1612
TPAD14-OP-GP
TPAD14-OP-GP
GP
IO_SUS115
GP
IO_SUS215
GPIO_SUS315
_SMI#15,24
100R2F-L1-GP-U
100R2F-L1-GP-U
R1
R1
402R2F-GP
402R2F-GP
LKICO MP
IC
IC
LKRC OMP
1
642
642
1 2
GP
1
GP
1
GP
1
GP
1
GP
1
IO_RCOMP18
GP
GP
IO_ALERT
IO_DFX0
IO_DFX2
IO_DFX5
IO_DFX7
IO_DFX8
AH45
AM40
AM41
AM44
AM45
AM47
AK48
AM48
AK41
AK42
AD51
AD52
AH50
AH48
AH51
AH52
AG51
AG53
AF52
AF51
AE51
AC51
AH40
P24
M22
N26
P20
N20
P26
K26
M26
US
US
J26
A9
C9
B8
B7
B5
B4
Y3
B3_OBSP
B3_OBSN
4
CPU1E
CPU1E
CIN
OS
OS
COUT
RS
VD#J26
VD#N26
RS
LKICOMP
IC
IC
LKRCOMP
RS
VD#P26
RS
VD#K26
VD#M26
RS
RSVD#AH45
MF
_PLT_CLK0
MF
_PLT_CLK1
MF_PLT_CLK2
MF
_PLT_CLK3
_PLT_CLK4
MF
MF
_PLT_CLK5
GP
IO_DFX0
IO_DFX1
GP
GP
IO_DFX2
IO_DFX3
GP
GP
IO_DFX4
GP
IO_DFX5
GP
IO_DFX6
IO_DFX7
GP
IO_DFX8
GP
IO_SUS0
GP
GP
IO_SUS1
IO_SUS2
GP
GPIO_SUS3
GPIO_SUS4
IO_SUS5
GP
GPIO_SUS6
GPIO_SUS7
_GPIO_SUS9
SEC
_GPIO_SUS8
SEC
_GPIO_SUS10
SEC
_GPIO_SUS11
SEC
IO0_RCOMP
GP
IO_ALERT
GP
ELL-GP
ELL-GP
BRASW
BRASW
4
1.8V
B32
C32
F28
D28
A33
C33
F30
D30
C34
B34
G32
C35
A35
G34
D34
F34
C37
A37
F36
D36
M34
M32
C38
B38
G36
N34
P34
iC
iC
J32
J34
J36
LK
LK
TFM CLK's
PL
GPIO_DFX
GPIO_DFX
GPIO_SUS
GPIO_SUS
TFM CLK's
PL
CPU1
CPU1
BRASWELL-GP
BRASWELL-GP
F
F
1.05V
US
B3_TXP0
B3_TXN0
US
US
B3_RXP0
US
B3_RXN0
US
B3_TXP1
B3_TXN1
US
US
B3_RXP1
B3_RXN1
US
B3_TXP2
US
B3_TXN2
US
B3_RXP2
US
B3_RXN2
US
B3_TXP3
US
USB3_TXN3
B3_RXP3
US
B3_RXN3
US
USB3_OBSP
US
B3_OBSN
VD#C37
RS
RS
VD#A37
RS
VD#F36
RS
VD#D36
VD#M34
RS
RS
VD#M32
RS
VD#C38
RS
VD#B38
RS
VD#G36
RS
VD#J36
RS
VD#N34
VD#P34
RS
BRASWELL
BRASWELL
RESERVED
RESERVED
RE
RE
1.8V
SMBUS
SMBUS
BRASWELL
BRASWELL
B3.0
B3.0
US
US
SERVED
SERVED
US
1.8V
USB2.0
USB2.0
US
B_VBUSSNS
USB_RCOMP
B_HSIC_0_STROBE
US
B_HSIC_0_DATA
US
US
B_HSIC_1_STROBE
US
B_HSIC_1_DATA
HSIC
HSIC
B_HSIC_RCOMP
US
UA
UA
UA
UA
UART
UART
UA
UA
UA
1.8V
UA
RS
RS
RS
RS
RS
RS
RS
RSVD#L13
I2C
I2C
I2C_NFC_SCL
C_NFC_SDA
I2
_SMB_CLK
MF
_SMB_DATA
MF
_SMB_ALERT#
MF
6 OF 13
6 OF 13
B_OTG_ID
US
B_DP0
B_DN0
US
US
B_DP1
B_DN1
US
B_DP2
US
US
B_DN2
US
B_DP3
B_DN3
US
B_DP4
US
B_DN4
US
B_OC1#
US
USB_OC0#
VD#B46
RS
RT1_TXD
RT1_RXD
RT1_CTS#
RT1_RTS#
RT2_TXD
RT2_RXD
RT2_CTS#
RT2_RTS#
5 OF 13
5 OF 13
VD#C11
VD#B10
VD#F12
VD#F10
VD#D12
RS
VD#E8
RS
VD#C7
VD#D6
RS
VD#J12
RS
VD#F7
VD#J14
C0_SCL
I2
I2
C0_SDA
I2
C1_SCL
I2
C1_SDA
I2
C2_SCL
C2_SDA
I2
I2
C3_SCL
I2
C3_SDA
C4_SCL
I2
I2
C4_SDA
I2
C5_SCL
C5_SDA
I2
I2C6_SCL
C6_SDA
I2
C11
B10
F12
F10
D12
E8
C7
D6
J12
F7
J14
L13
AK6
AH7
AF6
AH6
AF9
AF7
AE4
AD2
AC1
AD3
AB2
AC3
AA1
AB3
AA3
Y2
AM6
AM7
AM9
B48
C42
B42
C43
B44
C41
A41
C45
A45
B40
C40
P16
P14
B46
B47
A48
M36
N36
K38
M38
N38
AD10
AD12
AD13
AD14
Y6
Y7
V9
V10
B_OTG_ID
US
US
US
B_RCOMP1
US
US
B_VBUSSNS
B_RCOMP
US
B_HSIC_RCOMP
US
UA
RT1_TXD
UA
RT1_RXD
UA
RT1_CTS
RT1_RTS
UA
SI
SI
GS
GS
SIO_I2C5_CLK
O_I2C5_DATA
SI
SM
B_CLK_CPU
B_DATA_CPU
SM
U_SMB_ALERT#
PC
1 2
B_OC#1
B_OC#0
1
1
1
1
O_I2C0_CLK
O_I2C0_DATA
OR_I2C1_CLK
OR_I2C1_DATA
RN1
RN1
SRN2K2J-5-GP
SRN2K2J-5-GP
0R2J-2-GP
0R2J-2-GP
611
611
R1
R1
DY
DY
TP
TP
1608 TPAD14-OP-GP
1608 TPAD14-OP-GP
TP
TP
1609 TPAD14-OP-GP
1609 TPAD14-OP-GP
1610 TPAD14-OP-GP
1610 TPAD14-OP-GP
TP
TP
1611 TPAD14-OP-GP
1611 TPAD14-OP-GP
TP
TP
8V_S5
1D
23
608
608
3
US
B_CPU_PP0 34
B_CPU_PN0 34
US
B_CPU_PP1 34
US
US
B_CPU_PN1 34
US
B_CPU_PP2 52,86
US
B_CPU_PN2 52,86
B_CPU_PP3 52
US
B_CPU_PN3 52
US
US
B_CPU_PP4 35
USB_CPU_PN4 35
1 2
DY
DY
level-shift
GS
OR_I2C1_CLK 70
OR_I2C1_DATA 70
GS
1
ENSOR_1
ENSOR_1
GS
GS
4
GS
OR_I2C1_DATA
GSOR_I2C1_CLK
3
USB 3 (I/O)
USB 2 (I/O)
CCD
TS
USB HUB
617
617
R1
R1
0R2J-2-GP
0R2J-2-GP
SRN2K2J-1-GP
SRN2K2J-1-GP
RN1602
RN1602
1D8V_S5
2
20141224 SA
0R2J-2-GP
0R2J-2-GP
R1
R1
R1
616
616
610
610
B_DATA_CPU
R1
1 2
12
12
C1
C1
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
Vth(max)=1.1V
Q1
Q1
S1
S1
1
2 5
G1
G1
D2
D2
PJT138KA-GP
PJT138KA-GP
Vth(max)=1.1V
Q1
Q1
1
2 5
G1
G1
PJT138KA-GP
PJT138KA-GP
Vth(max)=1.1V
606
606
Q1
Q1
S1
S1
1
2 5
G1
G1
D2
D2
PJT138KA-GP
PJT138KA-GP
B_VBUSSNS
US
0R2J-2-GP
0R2J-2-GP
8V_S5
1D
4
RN1
RN1
SRN1K8J-GP
SRN1K8J-GP
1
2 3
B_CLK_CPU
SM
8V_S5
1D
SM
L1_SMBDATA
SM
1D
8V_S5
4
603
603
RN1
RN1
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
SIO_I2C5_DATA SIO_I2C5_DATA_Q
8V_S5
1D
O_I2C5_CLK_Q
SI
SI
O_I2C5_CLK
1
23
UCH_I2C
UCH_I2C
TO
TO
4
O_I2C0_DATA
SI
8V_S5
1D
O_I2C0_CLK_Q
SI
SI
O_I2C0_CLK
1D
614
614
B_VBUSSNS_R
US
DY
DY
609
609
DY
DY
614
614
D1
D1
6
G2
G2
S2
S2
43
604
604
S1
D1
S1
D1
6
G2
G2
D2
D2
S2
S2
43
UCH_I2C
UCH_I2C
TO
TO
D1
D1
6
G2
G2
S2
S2
43
2
Level shift
8V_S5
12
R1
R1
613
613
20KR2J-L2-GP
20KR2J-L2-GP
DY
DY
3D
3V_S5
DDR3L-SODIMM1
4
611
611
RN1
RN1
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
SM
L1_SMBDATA
8V_S5
1D
SM
B_DATA_DIMM12
3D
3V_S5
4
612
612
RN1
RN1
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
O_I2C5_CLK_Q
SI
8V_S5
1D
20141225 SA
3D3V_S5
4
613
613
RN1
RN1
SRN10KJ-5-GP
SRN10KJ-5-GP
UCH_I2C
UCH_I2C
TO
TO
1
2 3
8V_S5
1D
C1_S CL_TO UCH52
I2
20141225 SA
ME_FWP_SOC
L1_SMBCLK
SM
3V_S0
3D
TOUCH_PAD
3V_S3
3D
_TP_CLK62,86
PM
TOUCH_PANEL
SIO_I2C0_CLK_Q
O_I2C0_DATA_Q
SI
3V_S0
3D
1
8V_S5
1D
3D
3V_S5
12
R1651
R1651
2K2R2J-2-GP
2K2R2J-2-GP
DY
DY
12
_FWP_B
ME
DY
DY
CBE
612
612
Q1
Q1
LMBT3904LT1G-GP
LMBT3904LT1G-GP
84.
84.
T3904.H11
T3904.H11
2nd = 84.T3904.K11
2nd = 84.T3904.K11
3rd = 84.T3904.C11
3rd = 84.T3904.C11
615
615
R1
R1
1 2
0R0402-PAD
0R0402-PAD
Q1
Q1
618
618
3 4
2
1
2N7002KDW-G P
2N7002KDW-G P
2N702.A3F
2N702.A3F
84.
84.
2nd = 75.00601.07C
2nd = 75.00601.07C
Vth(max)=2.5V
619
619
Q1
Q1
3 4
2
1
2N7002KDW-G P
2N7002KDW-G P
84.
84.
2N702.A3F
2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
Q1620
Q1620
3 4
2
1
2N7002KDW-G P
2N7002KDW-G P
84.2N702.A3F
84.2N702.A3F
2nd = 75.00601.07C
2nd = 75.00601.07C
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Variant Name>
<Variant Name>
<Variant Name>
application without get Wistron permission
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
R1
R1
DY
DY
2K2R2J-2-GP
2K2R2J-2-GP
20140304 SC
SRN2K2J-1-GP
SRN2K2J-1-GP
5
SM
L1_SMBDATA
6
5
O_I2C5_CLK_Q
SI
6
5
O_I2C0_CLK_Q
SI
6
TO
TO
CPU
CPU
CPU
(USB/LPC/GPIO)
(USB/LPC/GPIO)
(USB/LPC/GPIO)
Do
Do
Do
mino
mino
mino
1
650
650
_UNLOCK# 24
ME
9/2 modified
3V_S0
3D
4
RN1
RN1
604
604
1
2 3
SM
3V_S0
3D
3D
3V_S3
4
RN1
RN1
605
605
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
3V_S3
3D
3D3V_S0
4
RN1606
RN1606
SRN2K2J-1-GP
SRN2K2J-1-GP
TO
TO
UCH_I2C
UCH_I2C
1
2 3
I2C1_S DA_T OUC H 5 2
3V_S0
3D
UCH_I2C
UCH_I2C
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
16
16
16
B_CLK_DIMM 12
_TP_DATA 62,86
PM
-1
-1
-1
102
102
102
5
4
3
2
1
SSID = CPU
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
eserved)
eserved)
eserved)
(R
(R
(R
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
17
17
17
-1
-1
-1
102
102
of
of
of
1
102
5
3V_AUX_S5
3D
1 2
DY
DY
826
826
R1
R1
100KR2J-1-GP
1 2
RS
MRST#_KBC_G
C_RST#_S
RT
12
R1
R1
2KR2F-L1-GP
2KR2F-L1-GP
830
830
100KR2J-1-GP
RT
C_RST#
RTC_TEST#
G
S
Q1
Q1
802
802
2N7002K-2-GP
2N7002K-2-GP
2N702.J31
2N702.J31
84.
84.
2ND = 84.2N702. 031
2ND = 84.2N702. 031
Q1
Q1
801
801
2345
1
6
2N7002KDW-GP
2N7002KDW-GP
2N702.A3F
2N702.A3F
84.
84.
2nd = 75.00601.07C
2nd = 75.00601.07C
3rd =
3rd =
RT
D
C_RST#
PM
_RSMR ST#
K_PCI_KBC24,86
CL
CL
K_PCI_LPC65,86
CL
K_PCI_TPM86,88
PM
_CLKR UN#_EC24,88
LP
C_FRAME#_CPU24,65,88
C_AD_CPU_P024,65,88
LP
C_AD_CPU_P124,65,88
LP
C_AD_CPU_P224,65,88
LP
C_AD_CPU_P324,65,88
LP
IN
T_SERIRQ24, 88
H_
820
820
R1
R1
10KR2J-3-GP
10KR2J-3-GP
D D
C_AUX_S5
RT
12
12
863
863
862
862
R1
R1
R1
R1
20KR2J-L2-GP
20KR2J-L2-GP
20KR2J-L2-GP
20KR2J-L2-GP
12
C1
C1
803
803
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
1D
8V_S5
C C
B B
A A
1 2
R1
R1
860 20KR2J-L2-GP
860 20KR2J-L2-GP
1 2
818 51R2J-2-GP
818 51R2J-2-GP
R1
R1
1 2
R1
R1
819 51R2J-2-GP
819 51R2J-2-GP
1 2
R1
R1
822 51R2J-2-GP
822 51R2J-2-GP
1 2
831 51R2J-2-GP
831 51R2J-2-GP
R1
R1
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
51R2J-2-GP
51R2J-2-GP
1 2
51R2J-2-GP
51R2J-2-GP
3V_S0
3D
RT
CRST_ON24
R1
R1
R1
R1
R1
R1
859
859
RCO
846
846
R1
R1
DY
DY
815
815
817
817
R1
R1
866
866
12
S_DY
S_DY
AP
AP
10KR2J-3-GP
10KR2J-3-GP
R1
R1
100KR2F-L3-GP
100KR2F-L3-GP
21
801
801
G1
G1
GAP-OPEN
GAP-OPEN
PR
OCHOT#_ CPU
XDP_TMS
P_TDI
XD
XD
P_TDO
XDP_PREQ #
MP_LPC_HVT
M_SOC
ED
XD
P_TCK
P_TRST#
XD
APS_SLP_S0IX#
832
832
12
802
802
C1
C1
SC1U6D3V3KX-2GP
SC1U6D3V3KX-2GP
12
841
841
R1
R1
1KR2J-1-GP
1KR2J-1-GP
1 2
1D
05V_VNN_PG_G
12
801
801
C1
C1
SC
SC
DY
DY
22P50V2GN-GP
22P50V2GN-GP
TP
1814TPAD14-OP-GPTP1814TPAD14-OP-GP
1
R1
R1
804 33R2J-L1-GP
804 33R2J-L1-GP
1 2
R1
R1
803 33R2J-L1-GP
803 33R2J-L1-GP
1 2
802 0R2J-2-GP
802 0R2J-2-GP
R1
R1
1 2
R1
R1
809
PROCHOT#24,44,46,48,86
809
20140304 SC
PM_SLP_S 4#_CPU
MRST#_KBC 24,25,86
RS
R1
R1
845 0R2J-2-GP
845 0R2J-2-GP
1 2
DY
DY
844
844
R1
R1
1 2
0R0402-PAD
0R0402-PAD
20140304 SC
XD
P_TCK
XD
P_TDI
XD
P_TDO
XDP_TMS
P_TRST#
XD
P_PRDY#
XD
XD
P_PREQ#
TPM
TPM
PR
1 2
0R0402-PAD
0R0402-PAD
4
RCOMP_LPC_HVT
OCHOT#_ CPU
2K2R2J-L1-GP
2K2R2J-L1-GP
ED
M_SOC
CL
K_PCI_LPC_R
CLK_PCI_TPM_R
1D8V_S5
12
840
840
R1
R1
DY
DY
_SLP_S3 #24,36,37,48,49,50,51
PM
05V_S5_PWRGD 50, 51
1D
3V
_5V_POK 45,50
CP
CP
U1G
U1G
AF42
TC
AD47
TD
AF40
TD
AD48
TM
AB48
TR
AD45
CX
AF41
CX
M13
RS
P2
MF
R3
MF
T3
LP
P3
LP
M3
MF
M2
MF
N3
MF
N1
MF
T4
LP
T2
IL
B_SERIRQ
H5
PW
H7
PW
P28
RS
P30
RS
AF50
RS
AF48
RS
AF44
RS
AF45
RS
AD50
PR
20140304 SC
BRASWELL-GP
BRASWELL-GP
071.
071.
3D
PM
DS
G
PL
K
I
AG/ITP
AG/ITP
O
JT
JT
S
ST#
_PRDY#
_PREQ#
VD#M13
_LPC_CLKOUT0
_LPC_CLKOUT1
C_CLKRUN#
C_FRAME#
_LPC_AD0
_LPC_AD1
_LPC_AD2
_LPC_AD3
C_HVT_RCOMP
M0
M1
VD#P28
VD#P30
VD#AF50
VD#AF48
VD#AF44
Reserved
Reserved
VD#AF45
OCHOT#
BRASW.000U
BRASW.000U
3V_S5
_SLP_S4 #_CPU_D
806
806
Q1
Q1
DMN5L06K-7-GP
DMN5L06K-7-GP
_SLP_S3 #
PM
TRST#_C PU
BRASWELL
BRASWELL
LPC
LPC
PWM
PWM
4
1 2
20140304 SC
BV
CCRTC_EXTPAD
C
C
RT
RT
RS
SU
U_RESE TBUTTON#
PM
PM
PMU
PMU
U_AC_PR ESENT
PM
PM
PM
PM
PM
U_WA KE_LAN#
D
D
SVI
SVI
SV
CO
RE_VCC0_SENSE
CO
RE_VSS0_SENSE
CO
RE_VCC1_SENSE
Voltage sense
Voltage sense
RE_VSS1_SENSE
CO
DDI
ORE_VSS_SENSE2
UNC
ORE_VSS_SENSE1
UNC
SRN10KJ-5-GP
SRN10KJ-5-GP
1804
1804
RN
RN
827
827
R1
R1
0R0402-PAD
0R0402-PAD
7 OF 13
7 OF 13
TCX1_PAD
BR
TCX2_PAD
BR
SR
TCRST#
CO
REPWROK
MRST#
RS
RT
VD_VSS#G18
SPWRDNACK
SU
S_STAT#
PM
U_SUSCL K
PM
U_SLP_S4 #
PM
U_SLP_S3 #
U_PLTRST #
PM
U_BATLO W#
U_SLP_S0 IX#
U_SLP_LA N#
PM
U_WA KE#
U_PWR BTN#
ID0_CLK
SV
ID0_DATA
SV
ID0_ALERT#
_VGG_SENSE
1
23
1D
R1
R1
842
842
2K2R2J-2-GP
2K2R2J-2-GP
T_RST#_ CPU_G
PL
M18
K18
F16
D18
G16
F18
J16
EST#
G18
SU
AE3
PM
D14
PCH_SUSC LK
C15
PM
C12
PM
B14
AF2
F14
PM
C14
AC
C13
AP
A13
B12
PCIE_W AKE# _CPU
N16
PM
M16
P18
AD42
VI
AD41
AD40
AG32
AJ32
AD29
AF27
AD24
AD22
AC27
PM
_SLP_S4 #
_SLP_S3 #
PM
810
810
Q1
Q1
2N7002KDW-GP
2N7002KDW-GP
2N702.A3F
2N702.A3F
84.
84.
2nd = 75.00601.07C
2nd = 75.00601.07C
1
2
3 4
3
8V_S5
12
DY
DY
G
XT
L_32D7 68K_X1_ CPU
XT
L_32D7 68K_X2_ CPU
BV
CCRTC_EXTPAD
C_RST#
RT
REPWROK
CO
_RSMR ST#
PM
C_TEST#
RT
RS
VD_VSS#G18
S_PWRDN_ACK_CPU
_SUS_ST AT#_CPU
_SLP_S4 #_CPU
_SLP_S3 #_CPU
C_RSTB TN#
PM
TRST#_C PU
PL
C_BATL OW#
_PRESENT_CPU
S_SLP_S0IX#
_PWR BTN#_CPU
DSOUT_C PU
VS
S_VNN_SE NSE
6
5
DMN5L06K-7-GP
DMN5L06K-7-GP
3V_S5
3D
R1
R1
843
843
10KR2J-3-GP
10KR2J-3-GP
1 2
T_RST#_ D
PL
DS
812
812
Q1
Q1
DMN5L06K-7-GP
DMN5L06K-7-GP
05067.031
05067.031
84.
84.
CO
PM
1 2
_PRESENT_CPU 24
AC
1
TP
TP
1812 TPAD14 -OP-GP
1812 TPAD14 -OP-GP
805 0R0402-PAD
805 0R0402-PAD
R1
R1
1 2
PM
_PWR BTN#_CPU 24 ,86
R1
R1
821 0R0402-PAD
821 0R0402-PAD
1 2
VC
C_SENS E 46
VS
S_SENSE 46
VC
C_VCOR E1_SENS E 46
VS
S_VCOR E1_SENS E 46
C_AXG_S ENSE 48
VC
S_AXG_S ENSE 48
VS
3D
3V_AUX_S5
_SLP_S4 #
PM
PM
_SLP_S3 #_CPU_D
DS
Q1815
Q1815
REPWROK 36,86
_RSMR ST# 86
R1
R1
816
816
10KR2J-3-GP
10KR2J-3-GP
4
PM
G
3V_S0
3D
12
PL
D
G
R1
R1
828
828
1 2
10KR2J-3-GP
10KR2J-3-GP
1815 TPAD14-OP-GP
1815 TPAD14-OP-GP
TP
TP
1
20140304 SC
1805
1805
RN
RN
23
1
SRN10KJ-5-GP
SRN10KJ-5-GP
_SLP_S4 # 24,36 ,49
1D
8V_S5
12
854
854
R1
R1
2K2R2J-L1-GP
2K2R2J-L1-GP
DY
DY
_SLP_S3 #_CPU
PM
R1
R1
864
864
1KR2J-1-GP
1KR2J-1-GP
TRST#
809
809
Q1
Q1
2N7002K-2-GP
2N7002K-2-GP
84.
84.
2N702.J31
2N702.J31
2ND = 84.2N702. 031
2ND = 84.2N702. 031
S
TRST#_C PU 8 6
PL
PC
IE_W AKE# 24,30, 58
CPU_SVIDCLK 46,48
H_
CPU_SVIDDAT 46,48
H_
SVID_ALERT# 46, 48
H_
PM
_SLP_S4 #_CPU_D
_SLP_S3 #_CPU_D
PM
810
810
R1
R1
1 2
20140304 SC
0R0402-PAD
0R0402-PAD
_SUS_ST AT#_CPU
PM
2
PL
T_RST# 24,30, 58,65, 86,88
1D8V_S5
S
R1
R1
10KR2J-L-GP
10KR2J-L-GP
TP
TP
1 2
PM
_SUS_ST AT#_B
G
Q1
Q1
2N7002K-2-GP
2N7002K-2-GP
84.
84.
2ND = 84.2N702. 031
2ND = 84.2N702. 031
D
C_VCOR E1_SENS E
VC
VS
S_VCOR E1_SENS E
C_SENS E
VC
VS
S_SENSE
VC
C_AXG_S ENSE
VS
S_AXG_S ENSE
VS
S_VNN_SE NSE
XT
L_32D7 68K_X1_ CPU
XT
L_32D7 68K_X2_ CPU
806
806
C1
C1
SC
SC
5P50V2CN-2GP
5P50V2CN-2GP
PM
_SUS_ST AT#_CPU
PM
_PWR BTN#_CPU
IE_W AKE#_ CPU
PC
_PRESENT_CPU
AC
847
847
M
M
813
813
2N702.J31
2N702.J31
M
M
TP
TP
20150302 SC
20150302 SC
20150302 SC
XTAL-32 D768KHZ -6-GP
XTAL-32 D768KHZ -6-GP
12
3V_S5
3D
R1
R1
10KR2J-L-GP
10KR2J-L-GP
TP
TP
1 2
1V
_CPU_CORE
R1
848100R2F-L1-GP-UR1848100R2F-L1-GP-U
12
PM
12
R1
849100R2F-L1-GP-UR1849100R2F-L1-GP-U
_CPU_CORE
1V
850100R2F-L1-GP-UR1850100R2F-L1-GP-U
R1
12
12
R1
851100R2F-L1-GP-UR1851100R2F-L1-GP-U
GF
X_CORE
R1
852100R2F-L1-GP-UR1852100R2F-L1-GP-U
12
12
R1
855100R2F-L1-GP-UR1855100R2F-L1-GP-U
05V_S5
1D
R1
875100R2F-L1-GP-UR1875100R2F-L1-GP-U
1 2
R1
R1
823
823
12
10MR2J-L-GP
10MR2J-L-GP
X1
X1
802
802
4 1
4
4
12
807
807
C1
C1
23
SC
SC
5P50V2CN-2GP
5P50V2CN-2GP
1D
1
23
SRN10KJ-5-GP
SRN10KJ-5-GP
23
1
SRN10KJ-5-GP
SRN10KJ-5-GP
8V_S5
RN
RN
1809
1809
RN
RN
1810
1810
Level shift
853
853
M
M
Only to TPM connector
PM_SUS_ STAT# 88
1
20KR2J-L2-GP
20KR2J-L2-GP
C_BATL OW#
R1
R1
839
839
12
824
824
R1
H_
SVID_ALERT#
PM
_RSMR ST#
CCRTC_EXTPAD
BV
C_RSTB TN#
PM
BOM use MC-146SMD
1st
1st
1 2
R1
R1
1 2
100KR2J-1-GP
100KR2J-1-GP
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
12
C1
C1
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
= 82.30001.661
= 82.30001.661
R1
200R2F-L-GP
200R2F-L-GP
861
861
C1
C1
810
810
12
825
825
R1
R1
2K7R2J-GP
2K7R2J-GP
811
811
1D
8V_S5
05V_S5
1D
1D
8V_S5
12
<Variant Name>
<Variant Name>
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsie n 221, Taiwan , R.O.C .
Taipei Hsie n 221, Taiwan , R.O.C .
Do
Do
Do
mino
mino
mino
1
Taipei Hsie n 221, Taiwan , R.O.C .
18 102
18 102
18 102
-1
-1
-1
Title
Title
Title
U (CLK/SPI/SIDEBAND/JTAG)
U (CLK/SPI/SIDEBAND/JTAG)
U (CLK/SPI/SIDEBAND/JTAG)
CP
CP
CP
Size Doc ument Number Rev
Size Doc ument Number Rev
Size Doc ument Number Rev
stom
stom
stom
Cu
Cu
Cu
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
5
917 SCD1U16V2KX-L-GP
917 SCD1U16V2KX-L-GP
C1
C1
PCI
E_TX_LAN_P030
PCI
E_TX_LAN_N030
E_RX_CPU_P030
LAN
D D
WLAN
C C
B B
PCI
E_RX_CPU_N030
PCI
E_TX_WLAN_P158,86
PCI
PCI
E_TX_WLAN_N158,86
PCI
E_RX_CPU_P158,86
PCI
E_RX_CPU_N158,86
LA
N_CLKREQ_LAN#30
WL
AN_CLKREQ_WLAN#58,86
N_CLK_CPU30
LA
N_CLK_CPU#30
LA
WL
AN_CLK_CPU58,86
WL
AN_CLK_CPU#58,86
8V_S5
1D
SRN10KJ-5-GP
SRN10KJ-5-GP
2 3
1
4
901
901
RN1
RN1
RN1
RN1
902
902
2 3
1
SRN10KJ-5-GP
SRN10KJ-5-GP
12
918 SCD1U16V2KX-L-GP
918 SCD1U16V2KX-L-GP
C1
C1
12
C1
C1
915 SCD1U16V2KX-L-GP
915 SCD1U16V2KX-L-GP
12
916 SCD1U16V2KX-L-GP
916 SCD1U16V2KX-L-GP
C1
C1
12
R1
R1
930
930
402R2F-GP
402R2F-GP
1 2
_CLKREQ3_CPU#
PEG
_CLKREQ4_CPU#
PEG
WL
AN_CLKREQ_WLAN#
N_CLKREQ_LAN#
LA
4
PCI
PCI
PCI
PCI
LA
N_CLKREQ_LAN#
WL
PEG
PEG
E_RCOMP_P_CPU
PCI
E_RCOMP_N_CPU
PCI
AN_CLKREQ_WLAN#
_CLKREQ3_CPU#
_CLKREQ4_CPU#
E_TX_CPU_P0
E_TX_CPU_N0
E_TX_CPU_P1
E_TX_CPU_N1
4
U1D
U1D
CP
CP
BRASWELL
C24
B24
G20
A25
C25
D20
F20
B26
C26
D22
F22
A27
C27
G24
AM10
AM12
AK14
AM14
A21
C21
C19
B20
C18
B18
C17
A17
C16
B16
D26
F26
V14
Y13
Y12
V13
V12
J20
J24
IE_TXP0
PC
PC
IE_TXN0
PC
IE_RXP0
IE_RXN0
PC
PC
IE_TXP1
PC
IE_TXN1
IE_RXP1
PC
IE_RXN1
PC
PC
IE_TXP2
IE_TXN2
PC
IE_RXP2
PC
PC
IE_RXN2
IE_TXP3
PC
IE_TXN3
PC
PC
IE_RXP3
PCIE_RXN3
PC
IE_CLKREQ0#
PC
IE_CLKREQ1#
IE_CLKREQ2#
PC
IE_CLKREQ3#
PC
CL
K_DIFF_P_0
K_DIFF_N_0
CL
K_DIFF_P_1
CL
CL
K_DIFF_N_1
CL
K_DIFF_P_2
K_DIFF_N_2
CL
K_DIFF_P_3
CL
CL
K_DIFF_N_3
CL
K_DIFF_P_4
K_DIFF_N_4
CL
PC
IE_OBSP
PCIE_OBSN
SPI
1_CLK
SPI
1_CS0#
1_CS1#
SPI
1_MISO
SPI
SPI
1_MOSI
BRASWELL-GP
BRASWELL-GP
BRASWELL
PC
PC
Ie
Ie
SPI
SPI
SATA
SATA
FAST SPI
FAST SPI
_HDA_DOCKEN#
MF
MF
_HDA_DOCKRST#
AUDIO
AUDIO
SAT
SAT
SAT
SAT
SAT
SAT
SAT
SAT
SAT
SAT
SAT
FST_SPI_CLK
FS
T_SPI_CS0#
FS
T_SPI_CS1#
T_SPI_CS2#
FS
FS
FS
FS
FS
MF
_HDA_RST#
_HDA_SDI1
MF
MF
MF
_HDA_SDI0
MF
_HDA_SYNC
MF
GP
_SSP_2_CLK
_SSP_2_FS
GP
_SSP_2_TXD
GP
GP
_SSP_2_RXD
4 OF 13
4 OF 13
A_TXP0
A_TXN0
A_RXP0
A_RXN0
A_TXP1
A_TXN1
A_RXP1
A_RXN1
A_LED#
SAT
A_GP0
A_GP1
SAT
A_GP2
SAT
SAT
A_GP3
A_OBSP
A_OBSN
T_SPI_D0
T_SPI_D1
T_SPI_D2
T_SPI_D3
_HDA_CLK
_HDA_SDO
SPKR
3
C31
B30
N28
M28
C29
A29
J28
K28
AH3
AH2
AG3
AG1
AF3
N30
M30
W3
V4
V6
V7
V2
V3
U1
U3
AF13
AD6
AD9
AD7
AF12
AF14
AB9
AB7
H4
AK9
AK10
AK12
AK13
SPI
_CLK_CPU
SPI
_CS_CPU_N0
SPI
_SI_CPU
HDA_
HDA_
HDA_
HDA_
HDA_
UCH_INT 52
TO
UCH_RST 52
TO
A_OBSP
SAT
A_OBSN
SAT
R1
R1
911 10R2J-2-GP
911 10R2J-2-GP
R1
R1
909 33R2J-2-GP
909 33R2J-2-GP
R1
R1
910 10R2J-2-GP
910 10R2J-2-GP
1 2
RST#_CPU
BITCLK_CPU
SDIN0_CPU
SYNC_CPU
SDOUT_CPU
HDA_
RST#_CPU
BITCLK_CPU
HDA_
HDA_
SYNC_CPU
HDA_
SDOUT_CPU
RST#_CPU
HDA_
SAT
SAT
SAT
SAT
SAT
SAT
SAT
SAT
1 2
1 2
A_TX_CPU_P0 56
A_TX_CPU_N0 56
A_RX_CPU_P0 56
A_RX_CPU_N0 56
A_TX_CPU_P1 56
A_TX_CPU_N1 56
A_RX_CPU_P1 56
A_RX_CPU_N1 56
931 402R2F-GP
931 402R2F-GP
R1
R1
12
_WP_CPU 25
SPI
SPI
_HOLD_CPU 25
SDIN0_CPU 27
HDA_
HDA_
SPKR 27
R1
R1
928 75R2J-1-GP
928 75R2J-1-GP
1 2
927 75R2J-1-GP
927 75R2J-1-GP
R1
R1
1 2
R1
R1
926 75R2J-1-GP
926 75R2J-1-GP
1 2
R1
R1
929 75R2J-1-GP
929 75R2J-1-GP
1 2
2
HDD
ODD
_CLK_CPU_SW 25
SPI
SPI
_CS_CPU_SW 25
_SI_ROM 24,25
SPI
_SO_CPU 24,25
SPI
HDA_
RST#_CODEC 27
HDA_
BITCLK_CODEC 27
SYNC_CODEC 27
HDA_
SDOUT_CODEC 27
HDA_
1
12
910
910
C1
C1
DY
DY
SC22P50V2JN-4GP
SC22P50V2JN-4GP
<Variant Name>
<Variant Name>
A A
5
4
3
2
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CP
CP
CP
U (SATA/PCIE/IHDA)
U (SATA/PCIE/IHDA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
U (SATA/PCIE/IHDA)
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Do
Taipei Hsien 221, Taiwan, R.O.C.
mino
mino
mino
1
of
of
of
19 102
19 102
19 102
-1
-1
-1
5
4
3
2
1
SSID = PCH
D D
C C
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
(R
(R
(R
eserved)
eserved)
eserved)
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
20
20
20
-1
-1
-1
102
102
of
of
of
1
102
5
4
3
2
1
SSID = CPU
D D
1D
3D
3V_S5_PRIME
3V_S0
3D
C C
B B
3D
1D
1D
20140304 SC
R2
R2
Imax=141mA (VSDIO 3.3V)
R2
R2
114 0R2J-2-GP
114 0R2J-2-GP
DY
DY
3V_S5_PRIME
5V_S0
8V_S5
20140304 SC
Imax=147.59mA
20140304 SC
Imax=16.53mA
113
113
R2
R2
R2
R2
R2
R2
3V_1D8V_VCCPADCF3SI0
3D
0R0402-PAD
0R0402-PAD
12
12
3D
3V_1D8V_VCCPADCF1SI0
115 0R0402-PAD
115 0R0402-PAD
12
1D
105
105
0R0402-PAD
0R0402-PAD
12
106 0R2J-2-GP
106 0R2J-2-GP
12
DY
DY
SD IO SUPPLY
LPC IO SUPPLY
8V_VCCCFIOAZA
AUDIO IO SUPPLY
1D
20150226 SB
8V_VCCCFIOAZA
1D
8V_S5
35V_CPU_VDDQ_S3
1D
20150302 SC
3D
3V_1D8V_VCCPADCF1SI0
Imax=550mA
35V_CPU_VDDQ_S3
Imax=1.9A (VDDQ)
3D
3V_1D8V_VCCPADCF3SI0
8V_S5
1D
1D
35V_CPU_VDDQ_S3
AN27
AM25
BE53
BJ49
BH50
BH5
BH49
BH4
BG51
BG3
BJ51
BJ52
AY10
AY44
AV44
AV10
BE51
AV38
AV16
AU36
AU18
AN36
AN35
AN19
AN18
AM36
AM18
AH4
AD33
AK18
AF33
AK19
CP
CP
U1I
U1I
DDRS
DDR_
BE1
DDR_
DDR_
BJ2
DDR_
BJ3
DDR_
DDR_
BJ5
DDR_
DDR_
DDR_
DDR_
DDR_VDDQ_G_S422
BE3
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_
DDR_VDDQ_G_S43
DDR_
E1
IO_V3P3A_V1P8A_G31
SD
E2
IO_V3P3A_V1P8A_G32
SD
G1
SD
IO_V3P3A_V1P8A_G33
UNCO
AF4
UNCO
Y18
IO_V1P8A_G35
GP
GP
IO_V1P8A_G31
GP
IO_V1P8A_G33
IO_V1P8A_G32
GP
IO_V1P8A_G34
GP
BRASWELL-GP
BRASWELL-GP
FR_VDDQ_G_S4
VDDQ_G_S42
VDDQ_G_S416
VDDQ_G_S419
VDDQ_G_S426
VDDQ_G_S427
VDDQ_G_S428
VDDQ_G_S429
VDDQ_G_S425
VDDQ_G_S424
VDDQ_G_S423
VDDQ_G_S417
VDDQ_G_S421
VDDQ_G_S420
VDDQ_G_S430
VDDQ_G_S431
VDDQ_G_S414
VDDQ_G_S415
VDDQ_G_S413
VDDQ_G_S410
VDDQ_G_S418
VDDQ_G_S412
VDDQ_G_S411
VDDQ_G_S49
VDDQ_G_S48
VDDQ_G_S47
VDDQ_G_S46
VDDQ_G_S45
VDDQ_G_S44
VDDQ_G_S41
RE_V1P8A_G32
RE_V1P8A_G31
P21
BRASWELL
BRASWELL
Removal of 1.24V VR
Imax=0.55A (1.24V)
DDR
DDR
DDI
_VDDQ_G31
_VDDQ_G32
DDI
MI
PI_V1P2A_G 32
MI
PI_V1P2A_G 31
LK_VSFR_G32
IC
IC
LK_VSFR_G31
RE_VSFR_G35
CO
RE_VSFR_G36
CO
PC
IE_V1P05A_G31#AC30
CORE_VSFR_G3
CO
RE_VSFR_G34
CO
RE_VSFR_G32
RE_VSFR_G33
CO
RE_VSFR_G31
CO
BHSIC_V1P2A_G3
US
B_VDDQ_G32
US
BRTCFUSE
BRTCFUSE
US
B_VDDQ_G33
US
US
US
B_VDDQ_G31
BSSIC_V1P2A_G3
US
US
B_V1P8A_G3
B_V3P3A_G32
US
US
B_V3P3A_G31
C_V3P3RTC_G52
RT
C_V3P3RTC_G51
RT
RT
C_V3P3A_G51
C_V3P3A_G52
RT
FU
SE_V1P8A_G3
SE1_V1P05A_G4
FU
SE0_V1P05A_G3
FU
RS
VD_VSS#A3
RS
RS
9 OF 13
9 OF 13
VD#K20
VD#M20
V36
Y36
T40
P40
Y27
Y25
P38
V30
AC30
AF35
AD35
AD38
AC36
M41
U35
V35
H44
P41
AA29
C23
B22
C5
B6
D4
E3
U16
H10
G10
A3
K20
M20
1D
24V_S5
RSVD_
VSS#A3
1D
24V_S5
1D24V_S5
C_AUX_S5
RT
1D
8V_S5
24V_S5
1D
MI
PI_V1P2A
12
DY
C_V1P2A
TP
TP
2101 TPAD14-OP-GP
2101 TPAD14-OP-GP
DY
3D
3V_S5_PRIME
Imax=200mA (3.3V_PRIME)
24V_S5
1D
24V_S5
1D
USBHSI
24V_S5
1D
1D
8V_S5
3D
3V_S5_PRIME
05V_S5
1D
1
102
102
R2
R2
0R2J-2-GP
0R2J-2-GP
12
DY
DY
R2
R2
101
101
12
0R2J-2-GP
0R2J-2-GP
R2
R2
103
103
0R2J-2-GP
0R2J-2-GP
R2
R2
12
0R2J-2-GP
0R2J-2-GP
24V_S5
1D
104
104
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
A A
5
4
3
2
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CP
CP
CP
U (POWER1)
U (POWER1)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
U (POWER1)
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
mino
mino
mino
1
of
of
of
21 102
21 102
21 102
-1
-1
-1
5
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2
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Blanking
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Wistron Confidential document, Anyone can not
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<Variant Name>
<Variant Name>
A A
tle
Title
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Ti
Size Document Number Rev
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A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
(R
(R
(R
eserved)
eserved)
eserved)
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
22
22
22
-1
-1
-1
102
102
of
of
of
1
102
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
<Variant Name>
<Variant Name>
<Variant Name>
A A
tle
Title
Title
Ti
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
(R
(R
(R
eserved)
eserved)
eserved)
mino
mino
mino
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
2
Do
23
23
23
-1
-1
-1
102
102
of
of
of
1
102
402
402
418
418
12
RN2
RN2
2 3
1
SRN2K2J-5-GP
SRN2K2J-5-GP
418
418
1 2
DY
DY
417
417
12
RN2
RN2
1
2 3
SRN100KJ-6-GP
SRN100KJ-6-GP
405
405
437
437
12
422
422
R2
R2
BAT_SCL
1234
BAT
_SDA
RST#
EC
401
401
4
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
FA
N_TACH1
408
408
4
4
TO
10KR2F-L1-GP
10KR2F-L1-GP
5
3D
3V_KBC_AVCC
1D
8V_S01D8V_S5
12
C2
C2
SM
L1_CLK
SML1_DATA
AD
_IA
BATTERY / CHARGER ------>
USB HUB ------>
_ENABLE
H_
H_
RCIN#
A20GATE
CHG
_ON#
BAT
_IN#
UCH_DET#
S5
LI
D_CLOSE#
FUN_OFF#
3D
3V_AUX_S5
410
410
R2
R2
12
0R0402-PAD
0R0402-PAD
12
12
421
421
439
439
C2
C2
C2
C2
SC
SC
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1KP50V2KX-1GP
1KP50V2KX-1GP
EC
_AGND
1D
12
C2
C2
440
440
428
428
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
SC
SC
1
2 3
SYS_
PWROK
1
PR
OCHOT_EC
2 3
AD
_OFF
1KR2J-L2-GP
1KR2J-L2-GP
ME
_UNLOCK#16
05V_S5
SRN10KJ-5-GP
SRN10KJ-5-GP
RN2
RN2
407
407
RN2
RN2
406
406
SRN100KJ-6-GP
SRN100KJ-6-GP
R2452
R2452
1 2
4
4
12
DY
DY
413
413
R2
R2
0R2J-L-GP
0R2J-L-GP
12
422
422
C2
C2
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
12
DY
DY
SML1_DATA35
3D3V_S03D3V_AUX_S5
E51_TxD58
EC_SMI#15,16
SSID = KBC
3V_AUX_S5
3D
RN2
RN2
SRN4K7J-8-GP
3V_S5
3D
20141225 SA
3V_S0
3D
3V_AUX_S5
3D
3V_S0
3D
SRN4K7J-8-GP
R2
R2
10KR2F-L1-GP
10KR2F-L1-GP
C2
C2
R2
R2
10KR2F-L1-GP
10KR2F-L1-GP
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
RN2
RN2
R2
R2
10KR2F-L1-GP
10KR2F-L1-GP
1 2
D D
C C
C2
C2
BAT
BAT
SM
12
_VTT
EC
441SCD1U16V2KX-L-GP
441SCD1U16V2KX-L-GP
_SCL43,44
_SDA43,44
L1_CLK35
140409
4
DY
DY
DY
DY
12
12
423
423
424
424
C2
C2
C2
C2
SC
SC
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
20140304 SC
12
411
411
R2
R2
0R0402-PAD
0R0402-PAD
WL
AN_PERST#58
TO
PT
P_PWR_EN#62
TO
UCH_DET#52
_HUB_RESET#35,86
EC
CHG
_ON#44
eD
P_BLEN_CPU8
UETOOTH_EN58
BL
L_SYS_PWRGD36
AL
DY
DY
PM
12
12
425
425
C2
C2
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
AD
VD
_IN226
UCH_EN52
EC
RT
BL
FAN_TACH126,86
_PWRBTN#86
PM
PC
PM
CHA
DC_
ST
FA
VD
FI_RF_EN58
WI
R2471
R2471
_CLKRUN#_EC18,88
AM
427
427
426
426
C2
C2
C2
C2
SC
SC
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
404
404
U2
U2
19
C
VC
46
C
VC
76
C
VC
115
VC
8V_S5
1D
3D
3V_KBC_AVCC
1D
8V_S0
_VTT
EC
_IA44
PC
B_VER_AD
T_TYPE_AD
AD
DEL_ID_AD
MO
_IN1
VD
AC
_PRESENT
PR
OCHOT_EC
C_WAKE_SCI#_KBC
SO
EC
_TPCLK62
_TPDATA62
CRST_ON18
_TP_IN#62
EC
FU
N_OFF#62,86
ON_OUT52
PM
IE_WAKE#18,30,58
_SLP_S3#18,36,37,48,49,50,51
RGE_LED61
KBC
DBY_LED61
P_MUTE#27
_PWRBTN#
_BEEP27
BATFULL61
RLED61
PW
N1_PWM26,86
_IN126
VD_OUT126
A20GATE
H_
ECSMI#_KBC
12
0R2J-2-GP
0R2J-2-GP
C
88
C1D8
VC
!!Notice:
!!Notice:
102
C
AVC
4
VD
D1D8
12
VTT
97
GP
IO90/AD0
98
GP
IO91/AD1
99
GP
IO92/AD2
100
IO93/AD3
GP
108
IO5/AD4
GP
96
GP
IO4/AD5
95
IO3/EXT_PURST#/A D6
GP
94
GP
IO7/AD7/VD_IN2
101
IO94/DA0
GP
105
IO95/DA1
GP
106
GP
IO96/DA2
107
IO97/DA3
GP
70
IO17/SCL1/N2TCK
GP
69
GP
IO22/SDA1/N2TMS
67
GPIO73/SCL2/N2TCK
68
GP
IO74/SDA2/N2TMS
119
IO23/SCL3/N2TCK
GP
120
IO31/SDA3/N2TMS
GP
24
GP
IO47/SCL4/N2TCK
28
GP
IO53/SDA4/N2TMS
26
GP
IO51/TA3/N2TCK
123
IO67/N2TMS
GP
72
GP
IO37/PSCLK1
71
GP
IO35/PSDAT1
10
IO26/PSCLK2
GP
11
GPIO27/PSDAT2
25
IO50/PSCLK3/TDO
GP
27
GP
IO52/PSDAT3/RDY#
31
GP
IO56/TA1
117
IO20/TA2/IOX_DIN_DIO
GP
63
GP
IO14/TB1
64
IO1/TB2
GP
32
IO15/A_PWM
GP
118
IO21/B_PWM
GP
62
GP
IO13/C_PWM
65
GP
IO32/D_PWM
22
GP
IO45/E_PWM
16
IO40/F_PWM/1_WIRE
GP
81
GP
IO66/G_PWM
66
O33/H_PWM/VD1_EN#
GP
104
GP
IO80/VD_IN1
110
IO82/IOX_LDSH/VD_OUT1
GP
112
IO84/IOX_SCLK/VD_OUT2
GP
84
GP
IO77/SPI_MISO
83
IO76/SPI_MOSI
GP
82
GP
IO75/SPI_SCK
79
GPIO2/SPI_CS#
124
GP
IO10/LPCPD#
121
IO85/GA20
GP
111
GPIO83/SOUT_CR
9
GP
IO65/SMI#
8
IO11/CLKRUN#
GP
30
GPIO55/CLKOUT/IOX_DIN_DI O
NPCE985PB1DX-GP-U
NPCE985PB1DX-GP-U
VCC1D8
VCC1D8
KBSOUT0/GPOB0/SOUT_CR/JENK#
N0/GPIOA0/N2TCK
KBSI
N1/GPIOA1/N2TMS
KBSI
KBSI
KBSI
KBSI
KBSI
KBSI
KBSI
UT1/GPIOB1/TCK
KBSO
UT2/GPIOB2/TMS
KBSO
KBSO
UT3/GPIOB3/TDI
KBSO
UT4/GPOB4/JEN0#
KBSO
UT5/GPIOB5/TDO
UT6/GPIOB6/RDY#
KBSO
KBSO
KBSO
UT9/GPOC1/SDP_VIS#
KBSO
KBSO
UT10/P80_CLK/GPIOC2
UT11/P80_DAT/GPIOC3
KBSO
UT12/GPO64/TEST#
KBSO
UT13/GPIO63/TRIST#
KBSO
UT14/GPIO62/XORTR#
KBSO
KBSO
UT15/GPIO61/XOR_OUT
IO60/KBSOUT16
GP
GPIO57/KBSOUT17
LF
LR
PSL
_IN2#/GPI6/EXT_PURST#
PSL
PSL
KBR
SER
IO46/CIRRXM/TRST #
GP
IO87/CIRRXM/SIN_CR
GP
3
N2/GPIOA2
N3/GPIOA3
N4/GPIOA4
N5/GPIOA5
N6/GPIOA6
N7/GPIOA7
UT7/GPIOB7
UT8/GPIOC0
LA
D0/GPIOF1
LAD1/GPIOF2
LA
D2/GPIOF3
D3/GPIOF4
LA
LK/GPIOF5
LC
RAME#/GPIOF6
ESET#/GPIOF7
F_
F_
GP
IO30/F_WP#
GP
IO41/F_WP#
F_
IO81/F_WP#
GP
GP
IO0/EXTCLK
_IN1#/GPI70
_OUT#/GPIO71
EC
SCI#/GPIO54
_RST#
EXT
ST#/GPIO86
VBKU
VC
IRQ/GPIOF0
GP
GP
IO36/TB3
IO44/TDI
GP
IO43/TMS
GP
GP
IO42/TCK
GP
IO34/CIRRXL
2
OW0
KR
54
KR
OW1
55
KR
OW2
56
KROW3
57
KR
OW4
58
OW5
KR
59
KR
OW6
60
OW7
KR
61
OL0
KC
53
KC
OL1
52
OL2
KC
51
KC
OL3
50
KC
OL4
49
OL5
KC
48
OL6
KC
47
OL7
KC
43
KC
OL8
42
KC
OL9
41
KCOL10
40
OL11
KC
39
OL12
KC
38
KC
OL13
37
KC
OL14
36
KC
OL15
35
OL16
KC
34
OL17
KC
33
126
127
128
1
2
3
7
SPI
90
CS0#
SPI
92
SCK
109
80
SPI
87
SDO
SPI
86
F_SDI
91
77
73
93
74
SOC_RUNTIME_SCI#
29
EC
85
H_
RCIN#
122
75
VSBY
114
P
_VCORF
KBC
44
ORF
13
PEC
I
125
6
IO24
15
21
20
17
23
113
14
5
D
GN
18
GN
D
45
D
GN
78
GND
89
GN
D
116
GN
D
103
AGND
_CS_KBC_N0
_CLK_KBC
_SO_KBC
_SI_KBC
KBC
_PWRBTN#_R
RST#
EC
_AGND
1 2
1 2
1 2
1 2
20140304 SC
403
403
R2
R2
R2
R2
R2
R2
R2
R2
R2
R2
LP
LP
LPC_AD_CPU_P 2 18, 65,88
LP
412 33R2J-L1-GP
412 33R2J-L1-GP
407 33R2J-L1-GP
407 33R2J-L1-GP
402 33R2J-L1-GP
402 33R2J-L1-GP
405 0R0402-PAD
405 0R0402-PAD
SOC_WAKE_SCI#_KBC
C_AD_CPU_P0 18,65,88
C_AD_CPU_P1 18,65,88
C_AD_CPU_P3 18,65,88
K_PCI_KBC 18,86
CL
LP
C_FRAME#_CPU 18, 65,88
PL
T_RST# 18,30,58,65,86,88
SYS_
PWROK 36
B_PWR_EN# 34,63
US
_IN# 44
AC
KBC_PWRBTN#_R 86
3D
3V_AUX_S5RTC_AUX_S5
IN
T_SERIRQ 18,88
AD
_OFF 42
LA
N_PCIE_WAKE # 30
PM_SLP_S4# 18,36,49
MRST#_KBC 18,25,86
RS
LI
D_CLOSE# 63,86
E5
1_RxD 58
_ENABLE 36,86
S5
0R0402-PAD
0R0402-PAD
12
OW[0..7] 62,86
KR
KC
OL[0..17] 62,86
_CS_EC_SW 25
SPI
SPI
_CLK_EC_SW 25
WL
AN_PCIE_WAKE # 58,86
BAT
_IN# 43
_SI_ROM 19,25
SPI
_SO_CPU 19,25
SPI
427 100KR2F-L3-GP
427 100KR2F-L3-GP
R2
R2
1 2
SO
C_RUNTIME_SCI# 15,16
12
C2
C2
431
431
SC
SC
2D2U10V2KX-GP
2D2U10V2KX-GP
477
477
R2
R2
0R0402-PAD
0R0402-PAD
12
SO
C_WAKE_SCI# 15,16
K_PCI_KBC
CL
3D
3V_S0
DY
DY
R2
R2
473
PM
_PWRBTN#
473
10KR2J-L-GP
10KR2J-L-GP
R2
R2
0R0402-PAD
0R0402-PAD
12
470
470
12
_PWRBTN#_CPU 18,86
PM
_CLKRUN#_EC
PM
3D
3V_S5
12
436
436
C2
C2
SC22P50V2JN-L-GP
SC22P50V2JN-L-GP
DY
DY
1
12
R2
R2
431
431
20KR2F-L3-GP
20KR2F-L3-GP
12
436
436
R2
R2
100KR2F-L3-GP
100KR2F-L3-GP
GPIO0 High Active
PROCHOT_EC
RE_HW_SHUTDOWN#26,36
PU
402
402
Q2
Q2
G
S
2N7002K-2-GP
2N7002K-2-GP
2N702.J31
2N702.J31
84.
84.
2ND = 84.2N702.031
2ND = 84.2N702.031
RN2
RN2
2 3
1
SRN10KJ-5-GP
SRN10KJ-5-GP
3D
AD
T_TYPE_AD
3V_AUX_S5
EC
_AGND
12
R2
R2
425
425
100KR2F-L3-GP
100KR2F-L3-GP
12
430
430
R2
R2
20KR2F-L3-GP
20KR2F-L3-GP
40W setting
3D
3V_AUX_S5
12
R2424
R2424
47KR2F-GP
47KR2F-GP
PC
B_VER_AD
20150302 SC
12
426
426
R2
R2
100KR2F-L3-GP
100KR2F-L3-GP
EC
_AGND
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
D
H_
PROCHOT# 18,44,46,48,86
RST#
EC
Q2
Q2
401
401
MMBT3906-4-GP
MMBT3906-4-GP
404
404
RST#_Q
EC
4
3D
3V_AUX_S5
B
E
84.T3906.A11
84.T3906.A11
2n
2n
d = 84.M3906.B11
d = 84.M3906.B11
C
12
C2415
C2415
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
3D3V_AUX_S5
? 10K for GPIO table,but before is 330K
401
401
R2
R2
330KR2J-L-GP
330KR2J-L-GP
1 2
R2
R2
404
404
_PWRBTN#_R
KBC
470R2J-2-GP
470R2J-2-GP
2 1
401
401
G2
G2
GAP-OPEN
GAP-OPEN
468
468
R2
R2
1 2
0R0402-PAD
0R0402-PAD
12
_PRESENT_CPU 18
AC
KBC_PWRBTN#63,86
B B
AC_PRESENT
EC HW Strap
UETOOTH_EN
BL
R2
R2
429
429
4K7R2J-L-GP
4K7R2J-L-GP
1 2
MO
DEL_ID_AD
12
C2420
C2420
DY
DY
3D3V_AUX_S5
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
_AGND
EC
A A
<Variant Name>
<Variant Name>
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
21F
21F
21F
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
KBC_
KBC_
KBC_
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cu
Cu
Cu
stom
stom
stom
Friday, Marc h 20, 2015
Friday, Marc h 20, 2015
Friday, Marc h 20, 2015
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
NPCE985
NPCE985
NPCE985
Domino
Domino
Domino
1
Taipei Hsien 221, Taiwan, R.O.C.
24 102
24 102
24 102
-1
-1
-1
of
of
of
5
4
3
2
1
SSID = Flash.ROM
D D
20140304 SC
_HOLD_CPU19
SPI
C C
SPI
_SI_ROM19,24
R2
R2
511 0R0402-PAD
511 0R0402-PAD
12
8V_S5
1D
_SI_ROM
SPI
SPI
_CLK_ROM
SPI
_HOLD_ROM
SSID = RBAT
RT
C_AUX_S5
1 2
DY
DY
B B
SPI FLASH ROM (8M byte) for PCH
_CS_ROM_N0
SPI
SPI
_HOLD_ROM
SPI
_WP_ROM
U2
U2
5
SI
6
SC
7
SI
8
VC
MX25U6473FM2I-10G-GP
MX25U6473FM2I-10G-GP
Q2
Q2
501
501
3
C2
C2
505
505
CH715FPT-GP
CH715FPT-GP
SC1
SC1
83.R0304.B81
83.R0304.B81
U6D3V3KX-L1-GP
U6D3V3KX-L1-GP
2n
2n
d = 83.00040.E81
d = 83.00040.E81
509 4K7R2J-L-GP
509 4K7R2J-L-GP
R2
R2
502
502
/SIO0
O3
LK
C
1
2
GN
SI
SO
/SIO1
CS
20150320 SC
C_PWR
RT
1 2
501
501
RN2
RN2
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
4
D
3
O2
2
1
#
Width=20mils
1KR2J-L2-GP
1KR2J-L2-GP
3D
4
SPI
_WP_ROM
SPI
_SO_ROM
SPI
_CS_ROM_N0
R2
R2
517
517
1 2
3V_AUX_S5
1D
8V_S5
20140304 SC
R2
R2
510 0R0402-PAD
510 0R0402-PAD
12
R2
R2
506 22R2J-L1-GP
506 22R2J-L1-GP
12
3V_RTC_VCC
3D
_WP_CPU 19
SPI
_SO_CPU 19,24
SPI
RT
RT
C1
C1
1
PW
2
GN
NP1
NP
NP2
NP
BAT-060003HA002M213ZL-GP-U1
BAT-060003HA002M213ZL-GP-U1
62.70014.001
62.70014.001
2n
2n
d = 20.F2316.002
d = 20.F2316.002
3rd =
3rd =
R
D
1
2
62.70001.061
62.70001.061
1D
8V_S5
3V_S5
3D
SC1
SC1
0U6D3V5KX-L-1-GP
0U6D3V5KX-L-1-GP
DY
DY
506
506
12
503
503
C2
C2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SPI_CS_EC_SW24
_CLK_EC_SW24
SPI
_CS_CPU_SW19
SPI
_CLK_CPU_SW19
SPI
_CS_ROM_N0
SPI
_CLK_ROM
SPI
12
C2
C2
12
R2
R2
0R0402-PAD
0R0402-PAD
3D
512
512
3V_S5_R
20140304 SC
U2
U2
10
8
7
1
2
3
4
NCT3956Y-GP
NCT3956Y-GP
VC
D+
DÂ1D
1D
2D+
2D
503
503
C
+
-
-
OE
GND
GN
3V_S5
3D
12
R2
R2
522
522
100KR2J-4-GP
100KR2J-4-GP
DY
DY
OE
R2
R2
#
6
#
9
S
5
11
D
20150112 SA
20140304 SC
513 0R0402-PAD
513 0R0402-PAD
1 2
RST#_KBC 18,24,86
RSM
BOM use NCT3950Y
T = 073.03950.0003
T = 073.03950.0003
1S
1S
3D
3V_S5
12
R2
R2
508
508
10KR2J-L-GP
10KR2J-L-GP
RT
C_DET# 8
D
502
502
Q2
Q2
2N7002K-2-GP
2N7002K-2-GP
84.
84.
2N702.J31
2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
S
G
507
507
R2
R2
10MR2J-L-GP
10MR2J-L-GP
1 2
RT
C_PWR
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A A
5
4
3
2
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Fl
Fl
Fl
ash(KBC+PCH)/RTC
ash(KBC+PCH)/RTC
ash(KBC+PCH)/RTC
Do
Do
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Do
Taipei Hsien 221, Taiwan, R.O.C.
mino
mino
mino
1
of
25
of
25
of
25
-1
-1
-1
102
102
102
5
4
3
2
1
SSID = Thermal
*Layout* 15 mil
3V_AUX_S5
3D
D D
PT2601 close CPU and Vcore chock
C C
PT2602 close CPU and memory
B B
T8
12
12
3D
3V_AUX_S5
DY
DY
DY
DY
611
611
R2
R2
16KR2F-GP
16KR2F-GP
2601
2601
RT
RT
NTC-100K-11-GP-U
NTC-100K-11-GP-U
12
R2612
R2612
16KR2F-GP
16KR2F-GP
12
2602
2602
RT
RT
NTC-100K-11-GP-U
NTC-100K-11-GP-U
12
C2
C2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
12
C2
C2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
VD_
IN1 24
12
C2
607
607
610
610
C2
608
608
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
DY
DY
12
609
609
C2
C2
SC100P50V2JN-L-GP
SC100P50V2JN-L-GP
VD_
IN2 24
FA
N_TACH124,86
603
603
Q2
Q2
C2
C2
606
606
SCD1
SCD1
DY
DY
U10V2KX-L1-GP
U10V2KX-L1-GP
D
2N7002K-2-GP
2N7002K-2-GP
84.
84.
2N702.J31
2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.2N702.W31
3rd = 84.2N702.W31
PURE_HW_SHUTDOW N#24,36
12
R2
R2
10KR2J-L-GP
10KR2J-L-GP
DY
DY
12
608
608
KA
D2
D2
RB551V30-1-GP
RB551V30-1-GP
083.
083.
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
FA
N1_PWM24,86
602
602
D2
D2
RB551V30-1-GP
RB551V30-1-GP
083.
083.
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
TH
S
G
601
601
55130.008F
55130.008F
FA
KA
55130.008F
55130.008F
ERM_SYS_SHDN#_R
VP_ PWRG D_G
IM
N_TACH1_C
N_TACH1_C
FA
5V
_S0
12
_S0
5V
3D
3V_S0
12
R2
R2
2KR2F-L1-GP
2KR2F-L1-GP
R2
R2
1 2
0R0402-PAD
0R0402-PAD
DY
DY
R2
R2
0R2J-L-GP
0R2J-L-GP
1 2
C2
C2
603
603
SC4
SC4
D7U25V5KX-L2-GP
D7U25V5KX-L2-GP
606
606
1 2
0R0402-PAD
0R0402-PAD
607
607
609
609
12
C2
C2
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
FA
FA
4
3
2
1
ACES-CON4-7-GP-U
ACES-CON4-7-GP-U
20.
20.
F0772.004
F0772.004
610
610
R2
R2
602
602
N1
N1
6
5
3D
3V_S0
IM
VP_ PWRG D 36 ,46,4 9,86
VD_
OUT1 24
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
A A
5
4
3
2
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
The
The
The
rmal 7718/Fan Controllor P2793
rmal 7718/Fan Controllor P2793
rmal 7718/Fan Controllor P2793
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
Date: Sheet
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
mino
mino
mino
1
of
26
of
26
of
26
-1
-1
-1
102
102
102
5
_BITCLK_CODEC
HDA
12
702
702
C2
C2
SC
SC
10P50V2JN-L1-GP
10P50V2JN-L1-GP
D D
_S0
5V
DY
DY
Close to Pin46
12
12
C2
C2
712
712
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
C2
C2
716
716
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
12
C2713
C2713
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
DY
DY
12
C2
C2
719
719
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
R2727 75R2J-1-GPR2727 75R2J-1-GP
IC_CLK29
0R0603-PAD
0R0603-PAD
12
C2
C2
734
734
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
R2
R2
2701
2701
EN
EN
711
711
1 2
701
701
C2
C2
SC10U6D3V3MX-L-GP
SC10U6D3V3MX-L-GP
1 2
SRN33J-5-GP-U
SRN33J-5-GP-U
1
2 3
IC_C
IC_C
DM
DM
12
AU
4
DIO_DVDD
HDA
_SDIN0_CPU19
HDA_BITCLK_CODEC19
HDA
_SDOUT_CODEC19
DMIC_DATA29
DM
20150304 SC
3D
3V_S0
Close to Pin41
U2
U2
701
_S0
C C
5V_AUDIO_AVDD2
1D
12
12
724
724
725
725
C2
C2
C2
C2
SC
SC
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
AU
D_AGND
5V
5V_S0
1D
R2
R2
716 0R0402-PAD
716 0R0402-PAD
1 2
C2722 SC10U6D3V3MX-L-GPC2722 SC10U6D3V3MX-L-GP
1 2
D_AGND
AU
1D
5V_AUDIO_AVDD2
3V
_LDO2_CAP
AU
D_CBP
12
C2
C2
SC
SC
2D2U10V2KX-GP
2D2U10V2KX-GP
PD
723
723
AU
D_SPK1_R+29,86
D_SPK1_R-29,86
AU
AU
D_SPK1_L-29,86
D_SPK1_L+29,86
AU
701
49
GN
D
48
SPDIF-OUT/GPIO2
#
47
PD
B
46
D2
PVD
45
SPK-
OUT-R+
44
SPK-
OUT-R-
43
SPK-
OUT-L-
42
SPK-
OUT-L+
41
D1
PVD
40
AVD
D2
39
O2-CAP
LD
38
AVSS2
37
CB
P
11/8
3V_S0
3D
Close to Pin40
AU
D_SPK1_R+
AU
B B
2
2
1
3
1
3
D_SPK1_R-
D2
D2
704
704
AZ5125-02S-R7G-GP
AZ5125-02S-R7G-GP
AU
D_SPK1_L+
AU
D_SPK1_L-
D2
D2
705
705
AZ5125-02S-R7G-GP
AZ5125-02S-R7G-GP
735
735
C2
C2
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
1 2
R2
R2
722 57D6R2F-GP
722 57D6R2F-GP
D_HP1_JACK_R229
AU
D_HP1_JACK_L229
AU
1 2
R2
R2
723 57D6R2F-GP
723 57D6R2F-GP
1 2
2
1
D2703
D2703
AZ5125-02S-R7G-GP
AZ5125-02S-R7G-GP
3
AU
12
C2703
C2703
SC
SC
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
Close to Pin1
_SDIN0_CODEC
HDA
3V
_LDO3_CAP
DM
IC_DATA_audio
DMIC_CLK_audio
1
2
DD
DV
00255.0003
00255.0003
071.
071.
VDD
CP
35
36
D_CBN
AU
12
C2726
C2726
SC
SC
4D7U6D3V2MX-GP-U
4D7U6D3V2MX-GP-U
4
DIO_DVDD
12
C2704
C2704
4
3
IO1/DMIC-CLK
IO0/DMIC-DATA
GP
GP
N
VEE
CB
CP
33
34
VEE
CP
_OUT_R_AUD
HP
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
7
6
5
LK
DET
BC
DC_
ATA-OUT
SD
SPD
OUT-L_PORT-I-L
OUT-R_PORT-I-R
NE1-VREFO-L
HP
HP
LI
32
30
31
_OUT_L_AUD
NE1_VREFO_R
NE1_VREFO_L
LI
HP
LI
20150313 SC
DY
DY
20140304 SC
R2
R2
706
706
12
12
705
705
C2
C2
C2
C2
SC
SC
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
10U6D3V3MX-L-GP
10U6D3V3MX-L-GP
DY
DY
Close to Pin9
HDA_SYNC_CODEC 19
HDA
AU
DIO_PC_BEEP
3V
_AUDIO_DVDIO
9
10
8
11
12
C
SET#
BEEP
SYN
DD-IO
ATA-IN
O3-CAP
RE
PC
DV
SD
LD
HP/LINE1_JD_JD1
MI
C2/LINE2_JD_JD2
IFO/FRONT_JD_JD 3/GPIO3
MO
NO-OUT
MI
C2-L_PORT-F-L/RING
MI
C2-R_PORT-F-R/SLEEVE
MI
C_CAP
33_STB
VD
LI
NE1-R_PORT-C-R
NE1-L_PORT-C-L
LI
LI
NE2-R_PORT-E-R
LI
NE2-L_PORT-E-L
D1
EF
O1-CAP
C2-VREFO
NE1-VREFO-R
AVD
AVSS1
MI
LI
LD
VR
ALC255-CG-GP-U
ALC255-CG-GP-U
25
26
29
27
28
_MIC2V
AU
_LDO1_CAP
3V
3V
12
C2727
C2727
SC
SC
4D7U6D3V2MX-GP-U
4D7U6D3V2MX-GP-U
2D
5V_AUDIO_VREF
1 2
706
706
_RST#_CODEC 19
13
14
15
16
17
18
19
20
21
22
23
24
5V
_Audio_S0
D_AGND
12
C2728
C2728
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
5V_S0
1D
0R0402-PAD
0R0402-PAD
C282_SENSE_A
AL
MI
C2-L_PORT-B/RING2
C2-R_PORT-B/SLEEVE
MI
MI
C-CAP
33_STB
VD
LI
NE1_R
LI
NE1_L
LI
N2-R_PORT-C
LI
N2-L_PORT-C
12
C2729
C2729
SC
SC
4D7U6D3V2MX-GP-U
4D7U6D3V2MX-GP-U
D_AGND
AU
DY
DY
R2
R2
1 2
0R0603-PAD
0R0603-PAD
G2701
G2701
1 2
GAP-CLOSE
GAP-CLOSE
G2
G2
1 2
GAP-CLOSE
GAP-CLOSE
AUD_AGND close to codec IC
R2
R2
721
721
100KR2J-4-GP
100KR2J-4-GP
1 2
1 2
R2
R2
712
712
200KR2F-L-3-GP
200KR2F-L-3-GP
12/2
731 SC4D7U6D3V2MX-GP-U
731 SC4D7U6D3V2MX-GP-U
C2
C2
1 2
C2
C2
715 SC4D7U6D3V2MX-GP-U
715 SC4D7U6D3V2MX-GP-U
1 2
C2718 SC4D7U6D3V2MX-GP-UC2718 SC4D7U6D3V2MX-GP-U
1 2
C2
C2
737 SC2D2U10V2KX-GP
737 SC2D2U10V2KX-GP
12
736 SC2D2U10V2KX-GP
736 SC2D2U10V2KX-GP
C2
C2
12
20150302 SC
Close to Pin26
12
C2
C2
730
730
SC
SC
10U6D3V2MX-GP-U
10U6D3V2MX-GP-U
AUD_AGND
Close to Pin28
3
702
702
702
702
AU
D_AGND
3D
3V_S0
717 0R0402-PAD
717 0R0402-PAD
R2
R2
R2715 0R0402-PADR2715 0R0402-PAD
AM
AM
AMIC
AMIC
12
C2
C2
732
732
SC
SC
2D2U10V2KX-GP
2D2U10V2KX-GP
2
1
20150302 SC
5V_S0
12
C2707
C2707
SC
SC
2D2U10V3KX-L-GP
2D2U10V3KX-L-GP
DY
DY
DIO_PC_BEEP
AU
R2703
R2703
0R0805-PAD
0R0805-PAD
1 2
5V
_Audio_S0
C2
C2
711
711
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1 2
1 2
KBC
R2
R2
730
730
10KR2J-3-GP
10KR2J-3-GP
_BEEP_C
R2
R2
729
729
1 2
47KR2J-2-GP
47KR2J-2-GP
KBC
_BEEP 24
placed nearby codec PIN12(5/9)
C2
C2
714
714
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
1 2
D_HP1_JD# 29
AU
12
12
AU
D_AGND
703
703
RN2
RN2
SRN4K7J-8-GP
SRN4K7J-8-GP
R2
R2
726
726
AM
AM
IC
IC
#
33_STB
4
R2707
R2707
1 2
R2708
R2708
1 2
20140304 SC
LI
NE1_VREFO_R
LI
NE1_VREFO_L
IN
12
10KR2J-L-GP
10KR2J-L-GP
R2
R2
720
720
100KR2J-4-GP
100KR2J-4-GP
1 2
T_MIC _L_R 2 9
0R0402-PAD
0R0402-PAD
0R0402-PAD
0R0402-PAD
HP
_OUT_R_AUD
HP
_OUT_L_AUD
IC
IC
12
C2
C2
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
AU
D_AGND
2 3
1
717
717
DY
DY
_LDO1_CAP
3V
PD
VD
3V
_LDO1_CAP
HDA_SPKR_C
12
R2
R2
731
731
22KR2J-GP
22KR2J-GP
3V
_MIC2V
D_AGND
AU
P_MUTE# 24
AM
3D
3V_S5
2
1 2
1
3
728
728
R2
R2
47KR2J-2-GP
47KR2J-2-GP
4
RN2
RN2
701
701
SRN2K2J-5-GP
SRN2K2J-5-GP
1
2 3
2701
2701
ED
ED
AZ5125-02S-R7G-GP
AZ5125-02S-R7G-GP
NG2 29,86
RI
SEL
EEVE 29,86
HDA
_SPKR 19
A A
5
4
3
2
Wistron Confidential document, Anyone can not Duplicate,
Modify, Forward or any other purpose application without
get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Au
Au
Au
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
dio Codec_ALC255
dio Codec_ALC255
dio Codec_ALC255
Do
Do
Do
mino
mino
mino
1
27
27
27
-1
-1
-1
102
102
102
5
D D
C C
4
3
2
1
Blanking
B B
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
tron Corporation
tron Corporation
tron Corporation
Wis
Wis
A A
Title
Title
Ti
tle
Re
Re
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Re
Do
Do
Do
Wis
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F,
21F,
21F,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
served
served
served
mino
mino
mino
-1
-1
-1
102
102
28
28
28
of
of
of
1
102
5
4
3
2
1
SSID = AUDIO
D D
Combo Jack
C C
DY
DY
12
C2
C2
AUD_
902
902
SC1
SC1
0U6D3V2MX-GP-U
0U6D3V2MX-GP-U
Speaker
HP1_JD#_R
12
DY
DY
C2
C2
100KR2J-4-GP
100KR2J-4-GP
AGND
AUD_
SPK1
SPK1
ER2
ER2
901 0R0402-PAD
901 0R0402-PAD
AUD_
1 2
ER2
ER2
902 0R0402-PAD
902 0R0402-PAD
1 2
ER2
ER2
903 0R0402-PAD
903 0R0402-PAD
1 2
904 0R0402-PAD
904 0R0402-PAD
ER2
ER2
1 2
HP1_JD# 27
3D
DY
DY
AUD_
3V_S0
R2
R2
905
905
10KR2J-L-GP
10KR2J-L-GP
1 2
AUD_
R2
R2
0R0402-PAD
0R0402-PAD
1 2
AGND
Layout Note:
Trace width=40mil
HP1_JD#_TYPE
906
906
901 SC22P50V2JN-L-GP
901 SC22P50V2JN-L-GP
EC2
EC2
1 2
EC2
EC2
902 SC22P50V2JN-L-GP
902 SC22P50V2JN-L-GP
1 2
EC2
EC2
903 SC22P50V2JN-L-GP
903 SC22P50V2JN-L-GP
1 2
904 SC22P50V2JN-L-GP
904 SC22P50V2JN-L-GP
EC2
EC2
1 2
AUD_
AUD_
AUD_
HP1_JD#_R
AUD_
HP1_JACK_R1
AUD_
AUD_
HP1_JACK_L1
AUD_SPK1_L-27,86
SPK1_L+27,86
AUD_
SPK1_R-27,86
AUD_
AUD_
SPK1_R+27,86
R2
R2
910
910
1 2
0R0402-PAD
0R0402-PAD
Q2
Q2
901
901
DY
DY
G
D
901
901
S
2N7002K-2-GP
2N7002K-2-GP
84.
84.
2N702.J31
2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
AUD_
AUD_
AUD_
AUD_
NG227,86
RI
HP1_JACK_L227
HP1_JACK_R227
EEVE27,86
SEL
HP1_JD#_TYPE 86
SPK1_L-_CON
SPK1_L+_CON
SPK1_R-_CON
SPK1_R+_CON
DY
DY
DY
DY
DY
DY
DY
DY
AUD_
HP1_JD#_R 86
AUD_
HP1_JACK_R1 86
HP1_JACK_L1 86
AUD_
5
1
2
3
4
6
ACES-
ACES-
EL
EL
2901 0R0402-PAD
2901 0R0402-PAD
1 2
EL
EL
2902 0R0402-PAD
2902 0R0402-PAD
1 2
20.
20.
2nd = 20.F1937.004
2nd = 20.F1937.004
3rd =
3rd =
CON4-17-GP-U1
CON4-17-GP-U1
F1621.004
F1621.004
020.F0243.0004
020.F0243.0004
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
905 SC22P50V2JN-L-GP
905 SC22P50V2JN-L-GP
EC2
EC2
1 2
EC2
EC2
906 SC22P50V2JN-L-GP
906 SC22P50V2JN-L-GP
1 2
EC2
EC2
907 SC22P50V2JN-L-GP
907 SC22P50V2JN-L-GP
1 2
EC2
EC2
908 SC22P50V2JN-L-GP
908 SC22P50V2JN-L-GP
1 2
EC2
EC2
909 SC22P50V2JN-L-GP
909 SC22P50V2JN-L-GP
1 2
AUD_
HP1_JACK_L1
HP1_JD#_TYPE
AUD_
HP1_JD#_R
AUD_
AUD_
HP1_JACK_R1
AUD_
AGND
LO
LO
UT1
UT1
3
1
5
6
2
4
MS
Audio(IP/NK comb)
Audio(IP/NK comb)
AUDIO-JK492-GP
AUDIO-JK492-GP
022.10002.0811
022.10002.0811
022.10002.0901
022.10002.0901
2nd =
2nd =
DMIC
B B
A A
AMIC
5
3V_S0
3D
R2
R2
901
901
0R2J-L-GP
0R2J-L-GP
T_M IC_L_R27
IN
DM
IC_DATA27
DM
IC_CLK27
EC2
EC2
EC2
EC2
R2
R2
904
904
20140304 SC
12
0R0402-PAD
0R0402-PAD
T_M IC_L_R27
IN
1 2
AMIC_C
AMIC_C
910 SC22P50V2JN-L-GP
910 SC22P50V2JN-L-GP
1 2
911 SC22P50V2JN-L-GP
911 SC22P50V2JN-L-GP
1 2
IN
T_M IC_CON
4
DY
DY
DY
DY
R2903
R2903
12
0R2J-L-GP
0R2J-L-GP
DMIC_C
DMIC_C
DM
DM
MICROPHONE-96-GP
MICROPHONE-96-GP
+
+
1
-
-
082.
082.
AMIC_B
AMIC_B
2
= 082.40008.0001
= 082.40008.0001
1st
1st
2nd = 082.40010.0001
2nd = 082.40010.0001
AUD_
AGND
IC1
IC1
40008.0001
40008.0001
R2902
R2902
0R2J-L-GP
0R2J-L-GP
AMIC_C
AMIC_C
MI
12
AUD_
C_GND
AGND
20150302 SC
C1
C1
AMI
AMI
5
ADMIC_C
ADMIC_C
1
2
3
4
6
ACES-CON4-17-GP-U1
ACES-CON4-17-GP-U1
F1621.004
F1621.004
20.
20.
d = 20.F1937.004
d = 20.F1937.004
2n
2n
3rd =
3rd =
020.F0243.0004
020.F0243.0004
3
AMIC on board: mount DMIC1, R2904, DY AMIC1, R2901, R2902, R2903, EC2910, EC2911
AMIC for cable: mount AMIC1, R2901, R2902, DY R2903, EC2910, EC2911, DMIC1, R2904
DMIC for cable: mount AMIC1, R2903, DY R2901, R2902, EC2910, EC2911, DMIC1, R2904
Wistron Confidential document, Anyone can not Duplicate, Modify,
Forward or any other purpose application without get Wistron
permission
<Variant Name>
<Variant Name>
<Variant Name>
stron Corporation
stron Corporation
stron Corporation
Wi
Wi
Wi
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Cu
Cu
Cu
stom
stom
stom
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
Date: Sheet
Date: Sheet
2
Date: Sheet
Do
Do
Do
Taipei Hsien 221, Taiwan, R.O.C.
dio Jack
dio Jack
dio Jack
Au
Au
Au
mino
mino
mino
29 102
29 102
29 102
1
of
of
of
-1
-1
-1
5
RS
ET
12
R3
R3
008
008
2K49R2F-2-L-GP
2K49R2F-2-L-GP
D D
U3001
U3001
33
GND
MD
MD
LAN_CLK_CPU19
N_CLK_CPU#19
LA
LA
N_PCIE_WAKE# 24
IE_WAKE# 18,24,58
PC
1
IP0
MD
2
MDIN0
3
AVD
4
MD
IP1
5
MD
IN1
6
MD
IP2
7
IN2
MD
8
AVDD10
RTL8111G-CGT-1-GP-U2
RTL8111G-CGT-1-GP-U2
I3+31
I3-31
I0+31
MD
MD
I0-31
I1+31
MD
I1-31
MD
I2+31
MD
I2-31
MD
C C
017
017
R3
N_WAKE#_R
LA
R3
1 2
0R0402-PAD
0R0402-PAD
R3
R3
016
016
0R2J-L-GP
0R2J-L-GP
1 2
3D
3D
3V_S5
3V_S5
R3
R3
10KR2J-L-GP
10KR2J-L-GP
1 2
DY
DY
_LAN_VDD10
1V
1V_LAN_VDD10
N_CLKREQ_LAN#19
LA
PC
IE_TX_LAN_P019
PC
IE_TX_LAN_N019
015
015
4
3D
3V_S5
LA
N_XTAL_25M_IN
R3
R3
009
009
1MR2J-L3-GP
GOUT
3V_LAN_VDD33
_LAN_VDD10
N_WAKE#_R
OLATEB
PC
IE_RX_LAN_N0
PCIE_RX_LAN_P0
1MR2J-L3-GP
DY
DY
1 2
OLATEB
IS
ET
_LAN_VDD10LAN_XTAL_25M_INLAN_XTAL_25M_OUT
RS
1V
26
25
32
31
30
29
28
27
ET
D0
D33
D10
LE
RS
XTAL2
XTAL1
D1/GPO
AVD
AVD
CK
CK
LE
D10
D33
IP3
IN3
IP
IN
FCLK_P
KREQ#
HS
HS
RE
CL
MD
MD
AVD
9
13
14
15
16
12
10
11
LA
N_XTAL_25M_OUT
D2
LE
RE
24
GOUT
RE
VDDREG
DV
LA
NWAKE#
IS
OLATE#
PER
FCLK_N
RE
DD10
HS
HSOP
3D
23
1V
22
LA
21
IS
20
19
ST#
18
ON
17
BOM use RTL8111H-CG
1ST = 071.8111H.0003
1ST = 071.8111H.0003
3
001
001
X3
X3
41
2 3
XTAL-25MHZ-181-GP
XTAL-25MHZ-181-GP
82.
82.
30020.G71
30020.G71
2nd = 82.30020.G61
2nd = 82.30020.G61
C3
C3
1 2
C3028SCD1U16V2KX-L-GP C3028SCD1U16V2KX-L-GP
1 2
3V_S0
3D
R3
R3
010
010
1KR2J-L2-GP
1KR2J-L2-GP
1 2
12
R3
R3
013
013
15K4R2F-GP
15K4R2F-GP
029SCD1U16V2KX-L-GP
029SCD1U16V2KX-L-GP
C3
C3
022
022
SC15P50V2JN-L-GP
SC15P50V2JN-L-GP
12
023
023
C3
C3
SC15P50V2JN-L-GP
SC15P50V2JN-L-GP
12
T_RST# 18,24,58,65,86,88
PL
IE_RX_CPU_N0 19
PC
PC
IE_RX_CPU_P0 19
2
yout:
La
For RTL8111G(S)
* Place C3021 to C3024 close to each VDD10 pin--3, 8,
R3
R3
001
GOUT
RE
001
1 2
0R0603-PAD
0R0603-PAD
12
C3
C3
002
002
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
3V_S5
3D
12
12
C3007
C3007
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
DY
DY
C3008: close to Pin32
C3007: close to Pin11 (RTL8111 only)
C3008
C3008
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
12
C3
C3
DY
DY
004
004
R3
R3
0R0805-PAD
0R0805-PAD
mils
40
027
027
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
3D
12
3V_LAN_VDD33
_LAN_VDD10
1V
12
C3
C3
SC
SC
1U10V2KX-L1-GP
1U10V2KX-L1-GP
12
030
030
C3015
C3015
SC
SC
4D7U6D3V3KX-L-GP
4D7U6D3V3KX-L-GP
1
024: colse t o Pin8
C3
C3025 close t o Pin30
C3026: close to Pin3
C3027: close to Pin22
12
C3
C3
025
025
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
DY
DY
DY
DY
12
12
C3
C3
C3
C3
024
024
026
026
SC
SC
SC
SC
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
D1U16V2KX-L-GP
Need level shift for BM
B B
A A
5
4
3
2
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
<Variant Name>
<Variant Name>
<Variant Name>
Wi
Wi
Wi
stron Corporation
stron Corporation
stron Corporation
, 88, Sec.1, Hsin Tai Wu Rd., Hsic hih,
, 88, Sec.1, Hsin Tai Wu Rd., Hsic hih,
, 88, Sec.1, Hsin Tai Wu Rd., Hsic hih,
21F
21F
21F
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Do
Do
Do
mino
mino
mino
Taipei Hsien 221, Taiwan, R.O.C.
30 102
30 102
30 102
1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
stom
stom
stom
Cu
Cu
Cu
Date: Sheet of
Date: Sheet of
Date: Sheet of
N(RTL8111)
N(RTL8111)
N(RTL8111)
LA
LA
LA
Friday, March 20, 2015
Friday, March 20, 2015
Friday, March 20, 2015
-1
-1
-1
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