Wistron Colossus 15 DIS, Colossus 17 DIS Schematic

5

D D

4

3

2

1

Colossus 15/17

DIS_OPT Schematic

IVY Bridge (rPGA989)

C C

Intel PCH (Panther Point)

REV:-1

B B

DY:No stuff DIS_OPT:DISCRTE OPTIMUS installed

DY_35W:No stuff on 35W CPU DY_45W:No stuff on 45W CPU

A A

CR_Balen17:Stuff for 17" CR_Goya:Stuff for 15"

5

4

2012-01-05.

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Cover Page

Size Document Number Rev

A4

Date: Sheet of

2

Cover Page

Colossus

1 103Wednesday, January 04, 2012

1

5

4

VRAM/DDR3

64MBx16

88,89,90,91

VRAM/DDR3

D D

64MBx16

88,89,90,91

DDR3

Nvidia N13P GL

83,84,85,86,87

C C

LED Panel

CRT

HDMI 1.4

49

50

51

LVDS(Dual Channel)

RGB CRT

HDMI

Cardreader SD/MMC CONN

74

RJ45

B B

CONN

59

Realtek

RTS5229

Gigabit NIC

Realtek

RTL8111F

32

31

MIC IN

AUDIO CODEC

Internal Digital MIC

HP

AMP

IDT 92HD91

HPA0929RTJR

2nd SPEAKE

2nd AMP TPA2012D2R

A A

Woofer

Subwoofer AMP TPA3111D1

5

58

30

HD Audio

29

58

Main SPEAKER

4

3

COLOSSUS Block Diagram

4

PCIe x8

PCIE

SPI Flash

8MB

4

FDIx2

2.7GT/s

PCH Panther Point-M

17,18,19,20,21,22,23,24,25

SPI

Accelerometer

HP3DC2

60

Intel CPU

IVY Bridge-M

4,5,6,7,8,9,10

DMI2.0x4 5GT/s

Intel

USB 3.0/2.0 ports (14)

ETHERNET (10/100/1000Mb)

High Definition Audio

SATA ports (6) PCIE ports (8)

LPC I/F ACPI 1.1

SM Bus

LPC Bus

79

KBC

ENE

KB9016QF

Touch PAD

69

Int. KB

LPC debug port

27

69 28

Project code : 91.4ST01.001 PCB P/N : 11254 Revision : -1

DDRIII 1600/1333 Channel A

DDRIII 1600/1333 Channel B

USB 2.0

USB3.0

PCIE+USB2.0

SATA

71

D/A

A/D

PWM FAN

Thermal

G709/P2800

3

25

28

2

DDRIII

Slot 0

1600/1333

DDRIII

Slot 1

1600/1333

Finger Printer

AES2665

WEBCAM

USB 2.0 CONN x1

USB 3.0 CONN x3

Mini-Card

802.11a/b/g/n Bluetooth combo

HDD1

56

HDD2

56

ODD

56

mSATA

103

2

1

SYSTEM DC/DC

TPS51461

INPUTS

5V_S5

14

15

64

49

82

62

65

OUTPUTS

VCCSA=0D85V_S0

48

CPU DC/DC

VT1323

INPUTS

DCBATOUT(5V_S5)

OUTPUTS

SYSTEM DC/DC

SN1003055RUWR

INPUTS

5V_S5/3D3V_S5

OUTPUTS

1D05V_S0

SYSTEM DC/DC

RT8223M_5V/3D3V

INPUTS

DCBATOUT 5V_S5

OUTPUTS

5V_AUX_S5 3D3V_AUX_S5

3D3V_S5

SYSTEM DC/DC

RT8207MZ

INPUTS

DCBATOUT

OUTPUTS

1D5V_S3 0D75V_S0 DDR_VREF_S3

GFX DC/DC

VT1323

INPUTS

DCBATOUT(5V_S5)

OUTPUTS

VCC_GFXCORE

VGA

NCP3218G

INPUTS

DCBATOUT

OUTPUTS

VGA_CORE

CHARGER

BQ24738

INPUTS

AD+ BT+

26

SYSTEM DC/DC

OUTPUTS

DCBATOUT

RT8068A

INPUTS

3D3V_S5

OUTPUTS

1D8V_S0

SYSTEM DC/DC

VT385FCX

INPUTS OUTPUTS

26

3D3V_S0 3D3V_VGA_S0 1D5V_S0 1D5V_S3

Switches

INPUTS OUTPUTS

1D5V_S3 5V_S5

1D5V_VGA_S0 1V05_VGA_S0

1D5V_S0 5V_S0 3D3V_S03D3V_S5

42~44

VCC_CORE

45

41

46

42~44

92

40

47

93

36

PCB LAYER (DISCRETE)

L1:Top L2:GND L3:Signal L4:Signal

Title

Size Document Number Rev

A3

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Colossus

1

L5:VCC L6:Signa L7:GND L8::Bottom

2 103Wednesday, January 04, 2012

1

5

PCH Strapping

Chief River Schematic Checklist Rev0.72

Name Schematics Notes

SPKR

INIT3_3V# Weak internal pull-up. Leave as "No Connect". GNT3#/GPIO55

D D

GNT2#/GPIO53 GNT1#/GPIO51

SPI_MOSI

NV_ALE

NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

HAD_DOCK_EN# /GPIO[33]

C C

HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. HDA_SYNC

GPIO15

GPIO8

B B

GPIO27

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

GNT[3:0]# functionality is not available on Mobile. Mobile: Used as GPIO only Pull-up resistors are not required on these signals. If pull-ups are used, they should be tied to the Vcc3_3power rail.

Enable Danbury:

Disable Danbury:

Enable Danbury:

Disable Danbury:

Low (0) - Flash Descriptor Security will be overridden. Also, when this signals is sampled on the rising edge of PWROK then it will also disable Intel ME and its features. High (1) - Security measure defined in the Flash Descriptor will be enabled. Platform design should provide appropriate pull-up or pull-down depending on the desired settings. If a jumper option is used to tie this signal to GND as required by the functional strap, the signal should be pulled low through a weak pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently. Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for strapping functions.

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#. Low(0) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no

confidentiality. High(1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with confidentiality.

Note : This is an un-muxed signal. This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low. Sampled at rising edge of RSMRST#. CRB has a 1-kohm pull-up on this signal to +3.3VA rail.

GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is enabled.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kohm weak pull-up resistor [CRB has it pulled up with 1-kohm no-stuff resistor]

Leave floating (internal pull-down)

USB2.0 Table

PCIe Routing

LANE1 LANE2 LANE3 LANE4

A A

LANE5 LANE6 LANE7 LANE8

N/A

17"Card Reader 15"Card Reader Mini Card1(WLAN)

N/A

Intel GBE LAN / LAN

N/A N/A

5

Pair Device

0 1 2 3 4 5 6 7 8 9 10 11 12 13

USB 3.0 I/O CONN. 1

N/A

USB 3.0 I/O CONN. 2 USB 3.0 I/O CONN. 3

FREE BT WLAN combo FREE FREE Fingerprint

USB 2.0 I/O CONN.

Camera FREE FREE FREE

4

USB3.0 Table

Pair Device

1 2 3 4

4

USB

I/O CONN. 1 FREE I/O CONN. 2 I/O CONN. 3

3

Processor Strapping

Pin Name Strap Description Configuration (Default value for each bit is

CFG[2]

CFG[4]

CFG[6:5]

CFG[7]

POWER PLANE

5V_S0 3D3V_S0 1D8V_S0 1D5V_S0 1D05V_S0 VCCSA_OD85V 0D75V_S0 VCC_CORE VCC_GFXCORE 3D3V_VGA_S0 1D5V_VGA_S0 1D05V_VGA_S0

5V_USBX_S3 1D5V_S3 DDR_VREF_S3

BT+ DCBATOUT 5V_S5 5V_AUX_S5 3D3V_S5 3D3V_AUX_S5

3D3V_M 1D05V_M 1.05V S0/M0, SX/M3, WOL_EN

3D3V_AUX_KBC 3.3V

3D3V_AUX_S5

PCI-Express Static Lane Reversal

PCI-Express Port Bifurcation Straps

PEG DEFER TRAINING

VOLTAGE DESCRIPTION

5V

3.3V

1.8V

1.5V

1.05V

0.9 - 0.675V

0.75V

0.35V to 1.5V

0.4 to 1.25V

3.3V 1D5V 1D05V

5V

1.5V

0.75V

6V-14.1V 6V-14.1V 5V 5V

3.3V

1 unless specified otherwise)

1:

Normal Operation. Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Disabled - No Physical Display Port attached to

1:

Embedded DisplayPort. Enabled - An external Display Port device is

0:

connectd to the EMBEDDED display Port

11 : x16 - Device 1 functions 1 and 2 disabled 10 : x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01 : Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00 : x8, x4, x4 - Device 1 functions 1 and 2 enabled

1:

PEG Train immediately following xxRESETB de assertion PEG Wait for BIOS for training

0:

Voltage Rails

ACTIVE IN

S0

S3

All S states

DSW, Sx ON for supporting Deep Sleep states

G3, Sx

2

Chief River Schematic Checklist Rev0.72

CPU Core Rail Graphics Core Rail

AC Brick Mode only

ON whenever iAMT is active1D05V_LAN 1.05V S0/M0, SX/M3

ON for iAMTLegacy WOL

Powered by Li Coin Cell in G3 and 3D3V_S5 in Sx

SMBus ADDRESSES

2

I C / SMBus Addresses

Device

EC SMBus 1 Battery CHARGER

EC SMBus 2 PCH eDP

PCH SMBus SO-DIMMA (SPD) SO-DIMMB (SPD) Digital Pot G-Sensor MINI

3

Ref Des

Chief River CRV

Address Hex Bus

BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA

SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK

2

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

1

Default Value

1

0

11

1

SATA Table

Pair

HDD1

0

mSATA

1

HDD2

2

N/A

3

ODD

4

N/A

5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

Colossus

1

SATA Device

3 103Monday, December 26, 2011

1

of

1

5

4

3

2

1

CPU(1/7)

IVY BRIDGE PROCESSOR (DMI,DP,PEG,FDI)

D D

1 OF 9

CPU1A

Note: Intel DMI supports both Lane Reversal and polarity inversion but only at PCH side. This is enabled via a soft strap.

C C

Note: Intel FDI supports both Lane Reversal and polarity inversion but only at PCH side. This is enabled via a soft strap.

Note: Lane reversal does not apply to FDI sideband signals.

DP Compensation, within 500mil

1D05V_S0

B B

NOTE: EDP_HPD Select a Fast FET similar to 2N7002E whose rise/ fall time is less than 6 ns. If HPD on eDP interface is disabled, connect it to CPU VCCIO via a 10-k resistor on the motherboard. This signal can be left as no connect if entire eDP interface is disabled.

Signal Routing Guideline: EDP_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. EDP_COMPIO keep W/S=4/15 mils and routing length less than 500 mils.

NOTE. Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

A A

DMI_TXN[3:0]19

DMI_TXP[3:0]19

DMI_RXN[3:0]19

DMI_RXP[3:0]19

FDI_TX_N[7:0]19

FDI_TX_P[7:0]19

FDI_FSYNC019 FDI_FSYNC119

FDI_INT19 FDI_LSYNC019

FDI_LSYNC119

R402 24D9R2F-L-GPR402 24D9R2F-L-GP

1 2

Ω pull-Up

4mil

12mil

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

FDI_TX_N0 FDI_TX_N1 FDI_TX_N2 FDI_TX_N3 FDI_TX_N4 FDI_TX_N5 FDI_TX_N6 FDI_TX_N7

FDI_TX_P0 FDI_TX_P1 FDI_TX_P2 FDI_TX_P3 FDI_TX_P4 FDI_TX_P5 FDI_TX_P6 FDI_TX_P7

DP_COMP

B27 B25 A25 B24

B28 B26 A24 B23

G21 E22 F21 D21

G22 D22 F20 C21

A21 H19 E19 F18 B21 C20 D18 E17

A22 G19 E20 G18 B20 C19 D19 F17

J18 J17

H20

J19

H17

A18 A17 B16

C15 D15

C17 F16 C16 G15

C18 E16 D16 F15

633996-302

2ND = 62.10055.321

2ND = 62.10055.321 3RD = 62.10055.551

3RD = 62.10055.551

DMI_RX#0 DMI_RX#1 DMI_RX#2 DMI_RX#3

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX#0 DMI_TX#1 DMI_TX#2 DMI_TX#3

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI0_TX#0 FDI0_TX#1 FDI0_TX#2 FDI0_TX#3 FDI1_TX#0 FDI1_TX#1 FDI1_TX#2 FDI1_TX#3

FDI0_TX0 FDI0_TX1 FDI0_TX2 FDI0_TX3 FDI1_TX0 FDI1_TX1 FDI1_TX2 FDI1_TX3

FDI0_FSYNC FDI1_FSYNC

FDI_INT FDI0_LSYNC

FDI1_LSYNC

EDP_COMPIO EDP_ICOMPO EDP_HPD

EDP_AUX EDP_AUX#

EDP_TX0 EDP_TX1 EDP_TX2 EDP_TX3

EDP_TX#0 EDP_TX#1 EDP_TX#2 EDP_TX#3

IVY-BRIDGE

DMI

Intel(R) FDI

eDP

Hand control CPU1 P/N

1st 633996-302 2nd 633996-501 3rd 633996-301

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8

PEG_RX#9 PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9

PEG_TX#10 PEG_TX#11

PCI EXPRESS* - GRAPHICS

PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

1 OF 9

J22 J21 H22

K33 M35 L34 J35 J32 H34 H31 G33 G30 F35 E34 E32 D33 D31 B33 C32

J33 L35 K34 H35 H32 G34 G31 F33 F30 E35 E33 F32 D34 E31 C33 B32

M29 M32 M31 L32 L29 K31 K28 J30 J28 H29 G27 E29 F27 D28 F26 E25

M28 M33 M30 L31 L28 K30 K27 J29 J27 H28 G28 E28 F28 D27 E26 D25

PEG_COMP

PEG_RXN0 PEG_RXN1 PEG_RXN2 PEG_RXN3 PEG_RXN4 PEG_RXN5 PEG_RXN6 PEG_RXN7

PEG_RXP0 PEG_RXP1 PEG_RXP2 PEG_RXP3 PEG_RXP4 PEG_RXP5 PEG_RXP6 PEG_RXP7

PEG_C_TXN0 PEG_C_TXN1 PEG_C_TXN2 PEG_C_TXN3 PEG_C_TXN4 PEG_C_TXN5 PEG_C_TXN6 PEG_C_TXN7

PEG_C_TXP0 PEG_C_TXP1 PEG_C_TXP2 PEG_C_TXP3 PEG_C_TXP4 PEG_C_TXP5 PEG_C_TXP6 PEG_C_TXP7

R401 24D9R2F-L-GPR401 24D9R2F-L-GP

PEG_RXN[0..7] 83

PEG_RXP[0..7] 83

C416 SCD22U10V2KX-1GP

DIS_OPT

DIS_OPT DIS_OPT

DIS_OPT

DIS_OPT DIS_OPT

DIS_OPT

1 2

C415 SCD22U10V2KX-1GP

1 2

C414 SCD22U10V2KX-1GP

1 2

C413 SCD22U10V2KX-1GP

1 2

C412 SCD22U10V2KX-1GP

1 2

C411 SCD22U10V2KX-1GP

1 2

C410 SCD22U10V2KX-1GP

1 2

C409 SCD22U10V2KX-1GP

1 2

C432 SCD22U10V2KX-1GP

1 2

C431 SCD22U10V2KX-1GP

1 2

C430 SCD22U10V2KX-1GP

1 2

C429 SCD22U10V2KX-1GP

1 2

C428 SCD22U10V2KX-1GP

1 2

C427 SCD22U10V2KX-1GP

1 2

C425 SCD22U10V2KX-1GP

1 2

C426 SCD22U10V2KX-1GP

1 2

PEG Compensation

1D05V_S0

1 2

Signal Routing Guideline: PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils. PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

PEG_TXN0 PEG_TXN1 PEG_TXN2 PEG_TXN3 PEG_TXN4 PEG_TXN5 PEG_TXN6 PEG_TXN7

PEG_TXP0 PEG_TXP1 PEG_TXP2 PEG_TXP3 PEG_TXP4 PEG_TXP5 PEG_TXP6 PEG_TXP7

NOTE. If PEG is not implemented, the RX&TX pairs can be left as No Connect

PEG_TXN[0..7] 83

PEG_TXP[0..7] 83

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(1/7): DMI/PEG/FDI

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

CPU(1/7): DMI/PEG/FDI

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

4 103Wednesday, January 04, 2012

1

of

1

5

4

3

2

1

CPU(2/7)

IVY BRIDGE PROCESSOR (CLK,MISC,JTAG)

2 OF 9

1 2

MISC

R530

R530 51R2J-2-GP

51R2J-2-GP

XDP_TDO

2 OF 9

BCLK

BCLK#

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PRDY# PREQ#

TRST#

DBR#

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

CPU_BCLK_P

A28

CPU_BCLK_N

A27

CLK_DP_P_R

A16

CLK_DP_N_R

A15

CPUDRAMR ST#

R8

SM_RCOMP_0

AK1

SM_RCOMP_1

A5

SM_RCOMP_2

A4

XDP_PRDY#

AP29

XDP_PREQ#

AP27

XDP_TCK

AR26

TCK

XDP_TMS

AR27

TMS

XDP_TRST#

AP30

XDP_TDI

AR28

TDI

XDP_TDO

AP26

TDO

H_DBR#_R

AL35

AT28 AR29 AR30 AT30 AP32 AR31 AT31 AR32

1 2 3

2 3 1

1

R516

R516 0R0402-PAD

0R0402-PAD

RN501

4

SRN0J-6-GP

SRN1KJ-7-G P

4

RN504

TP503 TPAD14-OP-G PTP503 TPAD14-O P-GP

TP509 TPAD14-OP-G PTP509 TPAD14-O P-GP

12

CLKOUT_DM I_P 18 CLKOUT_DM I_N 18

1D05V_S0

XDP_DBRESE T# 19

DDR3 Compensation Signals

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2

12

R510

200R2F-L-GP

PU/PD for JTAG signals

XDP_TMS

R506 51R 2J-2-GPR506 51R 2J-2-GP

XDP_TDI XDP_PREQ#

XDP_TCK XDP_TRST#

1 2

R509 51R 2J-2-GPR509 51R 2J-2-GP

1 2

R505 51R 2J-2-GP

1 2

1 2 3

SRN51J-GP

RN505

12

DY

R503

R504

140R2F-GP

25D5R2F-GP

1D05V_S0

4

CPU1B

DY

CPUDRAMR ST#_R

Q502

DMN5L06K-7-G P

G

12

CPU1B

C26

AN34

AL33

AN33

AL32

AN32

AM34

AP33

V8

AR33

DS

84.05067.031

2ND = 84.00138.H31

3RD = 84.2N702.W 31

C501

SCD047U25V2KX-GP

PROC_SELECT#

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

PM_SYNC

UNCOREPWRGOOD

SM_DRAMPWROK

RESET#

1D5V_S3

12

R513

R513 1KR2F-3-GP

1KR2F-3-GP

1 2

IVY-BRIDGE

1KR2J-1-GP

R514

1KR2J-1-GP

PCH_DDR _RST# 8,18

MISCTHERMALPWR MANAGEMENT

3D3V_S0 1D05V_S0

R529

1 2

DDR3_DR AMRST# 14,15

CLOCKS

DDR3

JTAG & BPM

XDP_DBRESE T#

1D05V_S0

12

R501

R501 62R2F-GP

D D

PROCHOT _EC27

12

R525

100KR2J-1-GP

PM_DRAM_PWRGD Traces impedance= 50 ohm

3D3V_S0

12

R523

200R2F-L-GP

PM_DRAM_PW RGD19

R532 0R2J-2-GPR532 0R2J-2-GP

0D85V_EN45,48 RUNPW ROK36,46,47

C C

S0_PWR_GOOD DY R531 and stuff R532

-1 1220

1 2

R531 0R2J-2-GP

1 2

DY

󲒂󲒂󲒂󲒂󲅙󲅙󲅙󲅙

0D85V_EN(Follow Gable1.1)

PLT_RST#21,27,31,32,36,65,71,82,83,103

U501

1

IN B

2

IN A GND3OUT Y

74VHC1G09DF T2G-GP

73.01G09.AAH

3D3V_S5

12

5

VCC

PM_DRAM_PW RGD_M

4

U502

1

NC#1

2

A GND3Y

74LVC1G07GW -GP

Buffered reset to CPU

73.01G07.0HG

2ND = 73.01G07.CHH

3RD = 73.17S07.0AG

C503

C503 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

200R2F-L-GP

1D05V_S0

R526

75R2J-1-GP

5

VCC

DY

4

Q501

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.W 31

1D5V_S0

12

R524

12

DY

BUF_CPU_R ST#_R

D

12

C502

C502 SC1U6D3V2KX- GP

SC1U6D3V2KX- GP

1 2

R512 130R2F-1- GPR512 130R2F -1-GP

3D3V_S0

12

1 2

DY

R517

R517 43R2J-GP

43R2J-GP

1 2

R527

R527 1K5R2F-2-GP

1K5R2F-2-GP

DY

C504

C504 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

62R2F-GP

TPAD14-OP-G P

H_PROCHO T# 42

H_PECI22,27

H_PROCHO T# H_PROCHO T#_D

H_PM_SYNC19

H_CPUPW RGD22

12

R521

R521 750R2F-GP

750R2F-GP

4K99R2F-L-GP

H_SNB_IVB#22

TP501TPAD14-OP-GP TP501TPAD14-OP-GP

1

TP502

1

1 2

R508 56R2F-1-GPR508 56R2F-1-GP

H_THRMTR IP#22,36

H_CPUPW RGD_R

1 2

R518 10KR2J-3- GPR518 10KR2J-3- GP

R519

H_PM_SYNC_R

1 2

0R0402-PAD-1- GP

R520

H_CPUPW RGD_R

1 2

0R0402-PAD-1- GP

PM_DRAM_PW RGD_R

BUF_CPU_R ST#

S3 Power Reduction Circuit SM_DRAMRST#

CPUDRAMR ST#

12

R515

TP_SKTOCC #_R

H_CATERR #

R522

1 2

0R2J-2-GP

B B

A A

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .

Taipei Hsie n 221, Taiwan, R.O.C .

Title

CPU(2/7): CLK/MISC/JTAG

Size Document Number Rev

A2

Date: Sheet of

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C .

Colossus

1

of

5 103Wednesd ay, January 04, 2012

5

4

3

2

1

CPU(3/7)

D D

3 OF 9

CPU1C

IVY-BRIDGE

M_A_DQ[63:0]14 M_B_DQ[63:0]15

C C

B B

M_A_BS014 M_A_BS114 M_A_BS214

M_A_CAS#14 M_A_RAS#14 M_A_WE#14

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AP11 AN11

AL12 AM12 AM11

AL11

AP12 AN12

AJ14

AH14

AL15

AK15

AL14

AK14

AJ15

AH15

AE10

AF10

G10

N10

M10

AG6 AG5 AK6 AK5 AH5 AH6

AK8 AK9

AH8 AH9 AL9 AL8

AE8 AD9 AF9

C5

SA_DQ0

D5

SA_DQ1

D3

SA_DQ2

D2

SA_DQ3

D6

SA_DQ4

C6

SA_DQ5

C2

SA_DQ6

C3

SA_DQ7

F10

SA_DQ8

F8

SA_DQ9 SA_DQ10

G9

SA_DQ11

F9

SA_DQ12

F7

SA_DQ13

G8

SA_DQ14

G7

SA_DQ15

K4

SA_DQ16

K5

SA_DQ17

K1

SA_DQ18

J1

SA_DQ19

J5

SA_DQ20

J4

SA_DQ21

J2

SA_DQ22

K2

SA_DQ23

M8

SA_DQ24 SA_DQ25

N8

SA_DQ26

N7

SA_DQ27 SA_DQ28

M9

SA_DQ29

N9

SA_DQ30

M7

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37

AJ5

SA_DQ38

AJ6

SA_DQ39

AJ8

SA_DQ40 SA_DQ41

AJ9

SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

V6

SA_BS2

SA_CAS# SA_RAS# SA_WE#

IVY-BRIDGE

DDR SYSTEM MEMORY A

3 OF 9

SA_CK0

SA_CLK#0

SA_CKE0

SA_CK1

SA_CLK#1

SA_CKE1

SA_CK2

SA_CLK#2

SA_CKE2

SA_CK3

SA_CLK#3

SA_CKE3

SA_CS#0 SA_CS#1 SA_CS#2 SA_CS#3

SA_ODT0 SA_ODT1 SA_ODT2 SA_ODT3

SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

AB6 AA6 V9

AA5 AB5 V10

AB4 AA4 W9

AB3 AA3 W10

AK3 AL3 AG1 AH1

AH3 AG3 AG2 AH2

C4 G6 J3 M6 AL6 AM8 AR12 AM15

D4 F6 K3 N6 AL5 AM9 AR11 AM14

AD10 W1 W2 W7 V3 V2 W3 W6 V1 W5 AD8 V4 W4 AF8 V5 V7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

IVY BRIDGE PROCESSOR (DDR3)

M_A_DIM0_CLK_DDR0 14 M_A_DIM0_CLK_DDR#0 14 M_A_DIM0_CKE0 14

M_A_DIM0_CLK_DDR1 14 M_A_DIM0_CLK_DDR#1 14 M_A_DIM0_CKE1 14

M_A_DIM0_CS#0 14 M_A_DIM0_CS#1 14

M_A_DIM0_ODT0 14 M_A_DIM0_ODT1 14

M_A_DQS#[7:0] 14

M_A_DQS[7:0] 14

M_A_A[15:0] 14

M_B_BS015 M_B_BS115 M_B_BS215

M_B_CAS#15 M_B_RAS#15 M_B_WE#15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AM5 AM6 AR3

AN3 AN2 AN1

AN9

AN8 AR6 AR5 AR9

AJ11

AH11

AR8

AJ12 AH12 AT11 AN14 AR14 AT14 AT12 AN15 AR15 AT15

AA10

4 OF 9

CPU1D

IVY-BRIDGE

C9

SB_DQ0

A7

SB_DQ1

D10

SB_DQ2

C8

SB_DQ3

A9

SB_DQ4

A8

SB_DQ5

D9

SB_DQ6

D8

SB_DQ7

G4

SB_DQ8

F4

SB_DQ9

F1

SB_DQ10

G1

SB_DQ11

G5

SB_DQ12

F5

SB_DQ13

F2

SB_DQ14

G2

SB_DQ15

J7

SB_DQ16

J8

SB_DQ17

K10

SB_DQ18

K9

SB_DQ19

J9

SB_DQ20

J10

SB_DQ21

K8

SB_DQ22

K7

SB_DQ23

M5

SB_DQ24

N4

SB_DQ25

N2

SB_DQ26

N1

SB_DQ27

M4

SB_DQ28

N5

SB_DQ29

M2

SB_DQ30

M1

SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34

AP3

SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38

AP2

SB_DQ39

AP5

SB_DQ40 SB_DQ41

AT5

SB_DQ42

AT6

SB_DQ43

AP6

SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49

AT8

SB_DQ50

AT9

SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

AA9

SB_BS0

AA7

SB_BS1

R6

SB_BS2

SB_CAS#

AB8

SB_RAS#

AB9

SB_WE#

DDR SYSTEM MEMORY B

4 OF 9

SB_CK0

SB_CLK#0

SB_CKE0

SB_CK1

SB_CLK#1

SB_CKE1

SB_CK2

SB_CLK#2

SB_CKE2

SB_CK3

SB_CLK#3

SB_CKE3

SB_CS#0 SB_CS#1 SB_CS#2 SB_CS#3

SB_ODT0 SB_ODT1 SB_ODT2 SB_ODT3

SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

AE2 AD2 R9

AE1 AD1 R10

AB2 AA2 T9

AA1 AB1 T10

AD3 AE3 AD6 AE6

AE4 AD4 AD5 AE5

D7 F3 K6 N3 AN5 AP9 AK12 AP15

C7 G3 J6 M3 AN6 AP8 AK11 AP14

AA8 T7 R7 T6 T2 T4 T3 R2 T5 R3 AB7 R1 T1 AB10 R5 R4

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DIM0_CLK_DDR0 15 M_B_DIM0_CLK_DDR#0 15 M_B_DIM0_CKE0 15

M_B_DIM0_CLK_DDR1 15 M_B_DIM0_CLK_DDR#1 15 M_B_DIM0_CKE1 15

M_B_DIM0_CS#0 15 M_B_DIM0_CS#1 15

M_B_DIM0_ODT0 15 M_B_DIM0_ODT1 15

M_B_DQS#[7:0] 15

M_B_DQS[7:0] 15

M_B_A[15:0] 15

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU(3/7): DDR3

Colossus

6 103Wednesday, January 04, 2012

1

5

4

3

2

1

CPU(4/7)

POWER

CPU1F

53A

D D

POWER

C722

C713

SC22U6D3V5MX-2GP

12

C736

C727

SC22U6D3V5MX-2GP

12

Place Bottom

C735

C721

PROCESSOR CORE

C721

SC22U6D3V5MX-2GP

DY

SC22U6D3V5MX-2GP

DY

C745

12

C749

12

SC22U6D3V5MX-2GP

12

C701

SC10U10V5KX-2GP

12

C702

SC22U6D3V5MX-2GP

12

C704

SC22U6D3V5MX-2GP

12

DY

Power 78.22610.51L

C744

SC22U6D3V5MX-2GP

12

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

12

C C

C742

C740

12

DY

C742

12

C738

12

C739

SC22U6D3V5MX-2GP

12

DY

C746

SC22U6D3V5MX-2GP

12

C748

SC22U6D3V5MX-2GP

12

Place Top

B B

A A

5

C750

C728

C726

SC10U10V5KX-2GP

12

C703

C741

SC22U6D3V5MX-2GP

12

C707

C706

SC22U6D3V5MX-2GP

12

C712

C710

SC22U6D3V5MX-2GP

12

C743

C752

SC22U6D3V5MX-2GP

12

DY

C747

SC22U6D3V5MX-2GP

12

SC10U6D3V5KX-1GP

DY

VCC_CORE

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

C714

SC10U10V5KX-2GP

SC22U6D3V5MX-2GP

12

C723

SC10U10V5KX-2GP

12

C709

SC22U6D3V5MX-2GP

12

C708

SC22U6D3V5MX-2GP

12

DY

C711

SC22U6D3V5MX-2GP

12

C751

SC22U6D3V5MX-2GP

12

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

4

POWER

IVY-BRIDGE

CORE SUPPLY

SENSE LINES SVID

6 OF 9

VCCIO1 VCCIO2 VCCIO3 VCCIO4 VCCIO5 VCCIO6 VCCIO7 VCCIO8

VCCIO9 VCCIO10 VCCIO11 VCCIO12 VCCIO13 VCCIO14 VCCIO15 VCCIO16 VCCIO17 VCCIO18 VCCIO19 VCCIO20 VCCIO21 VCCIO22 VCCIO23 VCCIO24

VCCIO25 VCCIO26 VCCIO27 VCCIO28 VCCIO29 VCCIO30

PEG AND DDR

VCCIO31 VCCIO32 VCCIO33 VCCIO34 VCCIO35 VCCIO36 VCCIO37 VCCIO38 VCCIO39

VCCIO40

VIDALERT#

VIDSCLK VIDSOUT

VCC_SENSE VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

AH13 AH10 AG10 AC10 Y10 U10 P10 L10 J14 J13 J12 J11 H14 H12 H11 G14 G13 G12 F14 F13 F12 F11 E14 E12

E11 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

J23

AJ29 AJ30 AJ28

AJ35 AJ34

B10 A10

IVY BRIDGE PROCESSOR (POWER)

PROCESSOR UNCORE POWER

C730

C731

VCC_SENSE_R VSS_SENSE_R

R707

3

VIDALERT#

12

10R2F-L-GP

R705 43R2J-GPR705 43R2J-GP

1 2

R703 130R2F-1-GPR703 130R2F-1-GP

R702

0R0402-PAD

R701

0R0402-PAD

12

R708

10R2F-L-GP

C729

SC22U6D3V5MX-2GP

12

1 2

12 12

VTT_SENSE 45 VSSP_SENSE 45

1D05V_S0

C731

SC22U6D3V5MX-2GP

SC10U10V5KX-2GP

12

1D05V_S0

R709

R709 75R2F-2-GP

75R2F-2-GP

1 2

1D05V_S0

Differential Sense feedback

C732

SC10U10V5KX-2GP

12

VR_SVID_ALERT# 42

H_CPU_SVIDCLK 42

H_CPU_SVIDDAT 42

VCC_CORE

12

R706

R706 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R704

R704 100R2F-L1-GP-U

100R2F-L1-GP-U

2

C715

12

SC22U6D3V5MX-2GP

12

VCCSENSE 42 VSSSENSE 42

C716

SC10U6D3V5KX-1GP

8.5A

1D05V_S0

C718

C733

C717

12

SC22U6D3V5MX-2GP

C733

SC22U6D3V5MX-2GP

C725

12

DY

Custom

SC22U6D3V5MX-2GP

12

C737

SC22U6D3V5MX-2GP

12

Title

Size Document Number Rev

Date: Sheet of

C719

C734

SC22U6D3V5MX-2GP

12

C705

SC22U6D3V5MX-2GP

12

DY

CPU(4/7): PWR

Colossus

C720

SC22U6D3V5MX-2GP

12

C724

SC22U6D3V5MX-2GP

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

7 103Wednesday, January 04, 2012

1

5

33A

VCC_GFXCORE

D D

C C

Under Socket and Closed to CPU

DY

470U*2 22U*6

12

C820

SC22U6D3V5MX-2GP

VCC_GFXCORE

12

C822

C821

SC22U6D3V5MX-2GP

22U*6

Closed to CPU Socket

12

C827

12

C828

SC22U6D3V5MX-2GP

12

C836

C837

SC22U6D3V5MX-2GP

C826

DY

SC22U6D3V5MX-2GP

12

C823

SC22U6D3V5MX-2GP

12

C829

SC22U6D3V5MX-2GP

Power 78.22610.51L

12

C835

SC22U6D3V5MX-2GP

12

C825

C824

SC22U6D3V5MX-2GP

12

C830

C831

SC22U6D3V5MX-2GP

12

C834

12

C832

C833

SC22U6D3V5MX-2GP

SC10U6D3V5KX-1GP

DY

1.5A

1D8V_S0

B B

C819

12

C816

12

SC10U6D3V5KX-1GP

C818

C817

12

SC1U10V2KX-1GP

4

3

CPU(5/7)

IVY BRIDGE PROCESSOR (GRAPHICS POWER)

POWER

AT24 AT23 AT21 AT20 AT18 AT17 AR24 AR23 AR21 AR20 AR18 AR17 AP24 AP23 AP21 AP20 AP18 AP17 AN24 AN23 AN21 AN20 AN18 AN17 AM24 AM23 AM21 AM20 AM18 AM17

AL24 AL23 AL21 AL20 AL18

AL17 AK24 AK23 AK21 AK20 AK18 AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17 AH24 AH23 AH21 AH20 AH18 AH17

CPU1G

VAXG1 VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36 VAXG37 VAXG38 VAXG39 VAXG40 VAXG41 VAXG42 VAXG43 VAXG44 VAXG45 VAXG46 VAXG47 VAXG48 VAXG49 VAXG50 VAXG51 VAXG52 VAXG53 VAXG54

B6

VCCPLL1

A6

VCCPLL2

A2

VCCPLL3

POWER

IVY-BRIDGE

GRAPHICS

1.8V RAIL

SENSE

VREFMISC

DDR3 -1.5V RAILS

SA RAIL

H_VCCP_SEL Voltage

7 OF 9

VAXG_SENSE

VSSAXG_SENSE

LINES

SM_VREF

SA_DIMM_VREFDQ SB_DIMM_VREFDQ

VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8

VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15

VCCSA1 VCCSA2 VCCSA3 VCCSA4 VCCSA5 VCCSA6 VCCSA7 VCCSA8

VCCSA_SENSE

VCCSA_VID0 VCCSA_VID1

VCCIO_SEL

SNB: No Connect IVB: VSS

1

0

AK35 AK34

+V_SM_VREF_CNT

AL1

B4:VREF_DQ CHA D1:VREF_DQ CHB

B4 D1

12

R815

1KR2F-3-GP

DY

AF7 AF4 AF1 AC7 AC4 AC1 Y7 Y4 Y1 U7 U4 U1 P7 P4 P1

M27 M26 L26 J26 J25 J24 H26 H25

H23

C22 C24

H_VCCP_SEL

A19

1.05V

1.0V

DDR_VREF_S3_B4 DDR_VREF_S3_D1

12

R816

R816 1KR2F-3-GP

1KR2F-3-GP

DY

12

C803

C813

SC10U6D3V5KX-1GP

12

H_FC_C22 VCCSA_SEL

VCC_AXG_SENSE 42 VSS_AXG_SENSE 42

CAD Note: +V_SM_VREF should have 10 mil trace width

12

C801

SCD1U16V2ZY-2GP

DY

C805

C806

SC4D7U6D3V3KX-GP

SC10U6D3V5KX-1GP

0R2J-2-GP

SC10U6D3V5KX-1GP

12

C804

SC4D7U6D3V3KX-GP

C814

12

VCCUSA_SENSE

R817

12

DY

C806

SC10U6D3V5KX-1GP

12

DY

C815

SC10U6D3V5KX-1GP

12

H_SNB_IVB#_PWRCTRL

R818

R818 0R2J-2-GP

0R2J-2-GP

1 2

C802

SC2D2U10V3ZY-1GP

33OU*1 10U*6

SC10U6D3V5KX-1GP

12

DY

6A

0D85V_S0

SRN1KJ-11-GP-U

C807

1

12

C808

SC10U10V5KX-2GP

RN801

M_VREF_DQ_DIMM014

M_VREF_DQ_DIMM115

2

M3 - Processor Generated SO-DIMM VREF_DQ

DDR_VREF_S3

84.05067.031

0R2J-2-GP

0R2J-2-GP R812

R812 R813

R813 0R2J-2-GP

0R2J-2-GP

84.05067.031

2ND = 84.00138.H31

3RD = 84.2N702.W31

PCH_DDR_RST#

1 2 1 2

3RD = 84.2N702.W31

2ND = 84.00138.H31

84.05067.031

G

D S

M_VREF_DQ_DIMM0_R M_VREF_DQ_DIMM1_R

DS

G

12

R808

R808 0R2J-2-GP

0R2J-2-GP

DY

12

R809

R809 0R2J-2-GP

0R2J-2-GP

DY

PCH_DDR_RST#5,18

12~16A

1D5V_S0

12

TC801

TC801 ST330U2D5VDM-9GP

ST330U2D5VDM-9GP

77.23371.13L

77.23371.13L 2nd = 79.33719.L01

2nd = 79.33719.L01

0D85V_S0

12

DY

4

1

2 3

TP801 TPAD14-OP-GPTP801 TPAD14-OP-GP

R801

R801 100R2J-2-GP

100R2J-2-GP

VCCUSA_SENSE 48

H_FC_C22 48 VCCSA_SEL 48

-1 1221

1

Q802

Q802 DMN5L06K-7-GP

DMN5L06K-7-GP

R810

R810 0R2J-2-GP

0R2J-2-GP

DY

1 2

R814

R814 0R2J-2-GP

0R2J-2-GP

DMN5L06K-7-GP

DY

Q803

1 2

DDR_VREF_S3_B4 DDR_VREF_S3_D1

S3 Power Reduction Circuit Processor VREF_DQ Implementation

DDR_VREF_S3

A A

M_VREF_DQ_DIMM014

PCH_DDR_RST#5,18

5

PM_SLP_S3#19,27,36,46,47,92

4

1 2

DY

1 2

0R2J-2-GP

R805

0R2J-2-GP

R807

+V_SM_VREF

84.05067.031

2ND = 84.00138.H31

3RD = 84.2N702.W31

R802

1 2

0R2J-2-GP

DY

R811

DY

1 2

0R2J-2-GP

Q801

DMN5L06K-7-GP

D S

Wistron Corporation

+V_SM_VREF_CNT

12

R803

G

R803 100KR2J-1-GP

100KR2J-1-GP

3

2

Title

Size Document Number Rev

Custom

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU(5/7): GFX/PWR

Colossus

8 103Wednesday, January 04, 2012

1

5

4

3

2

1

CPU(6/7)

IVY BRIDGE PROCESSOR (GND)

9 OF 9

8 OF 9

CPU1H

D D

C C

B B

AT35 AT32 AT29 AT27 AT25 AT22 AT19 AT16 AT13 AT10

AT7 AT4

AT3 AR25 AR22 AR19 AR16 AR13 AR10

AR7 AR4

AR2 AP34 AP31 AP28 AP25 AP22 AP19 AP16 AP13 AP10

AP7

AP4

AP1 AN30 AN27 AN25 AN22 AN19 AN16 AN13 AN10

AN7

AN4 AM29 AM25 AM22 AM19 AM16 AM13 AM10

AM7

AM4

AM3

AM2

AM1

AL34 AL31 AL28 AL25 AL22 AL19 AL16 AL13 AL10

AL7 AL4

AL2 AK33 AK30 AK27 AK25 AK22 AK19 AK16 AK13 AK10

AK7 AK4

AJ25

CPU1H

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80

IVY-BRIDGE

VSS

8 OF 9

VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160

AJ22 AJ19 AJ16 AJ13 AJ10 AJ7 AJ4 AJ3 AJ2 AJ1 AH35 AH34 AH32 AH30 AH29 AH28 AH25 AH22 AH19 AH16 AH7 AH4 AG9 AG8 AG4 AF6 AF5 AF3 AF2 AE35 AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE9 AD7 AC9 AC8 AC6 AC5 AC3 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 Y9 Y8 Y6 Y5 Y3 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 U9 U8 U6 U5 U3 U2

T35 T34 T33 T32 T31 T30 T29 T28 T27 T26

N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 M34

L33 L30 L27

K35 K32 K29 K26

J34

J31 H33 H30 H27 H24 H21 H18 H15 H13 H10

G35 G32 G29 G26 G23 G20 G17 G11 F34 F31 F29

CPU1I

IVY-BRIDGE

VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233

IVY-BRIDGE

VSS

9 OF 9

VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258 VSS259 VSS260 VSS261 VSS262 VSS263 VSS264 VSS265 VSS266 VSS267 VSS268 VSS269 VSS270 VSS271 VSS272 VSS273 VSS274 VSS275 VSS276 VSS277 VSS278 VSS279 VSS280 VSS281 VSS282 VSS283 VSS284 VSS285

F22 F19 E30 E27 E24 E21 E18 E15 E13 E10 E9 E8 E7 E6 E5 E4 E3 E2 E1 D35 D32 D29 D26 D20 D17 C34 C31 C28 C27 C25 C23 C10 C1 B22 B19 B17 B15 B13 B11 B9 B8 B7 B5 B3 B2 A35 A32 A29 A26 A23 A20 A3

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

CPU (6/7):GND

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

9 103Monday, December 26, 2011

of

9 103Monday, December 26, 2011

of

9 103Monday, December 26, 2011

1

5

4

3

2

1

CPU(7/7)

D D

C C

VCC_GFXCORE

VCC_CORE

B B

1 2 1 2 1 2 1 2

IVY BRIDGE PROCESSOR (RESERVED)

5 OF 9

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD#L7 RSVD#AG7 RSVD#AE7 RSVD#AK2

RSVD#W8

RSVD#AT26

RSVD#AM33

RSVD#AJ27

RSVD#T8

RSVD#J16 RSVD#H16 RSVD#G16

RSVD_NCTF#AR35 RSVD_NCTF#AT34 RSVD_NCTF#AT33 RSVD_NCTF#AP35 RSVD_NCTF#AR34

RSVD_NCTF#B34 RSVD_NCTF#A33 RSVD_NCTF#A34 RSVD_NCTF#B35 RSVD_NCTF#C35

RSVD#AJ32

RSVD#AK32

BCLK_ITP

BCLK_ITP#

RSVD_NCTF#AT2 RSVD_NCTF#AT1 RSVD_NCTF#AR1

AH27 AH26

L7 AG7 AE7 AK2

W8

AT26 AM33 AJ27

T8 J16 H16 G16

AR35 AT34 AT33 AP35 AR34

B34 A33 A34 B35 C35

AJ32 AK32

AN35 AM35

AT2 AT1 AR1

DY

DY DY

DY

R100149D9R2F-GP

R100149D9R2F-GP R100249D9R2F-GP

R100249D9R2F-GP R100349D9R2F-GP

R100349D9R2F-GP R100449D9R2F-GP

R100449D9R2F-GP

VAXG_VAL_SENSE VSSAXG_VAL_SENSE VCC_VAL_SENSE VSS_VAL_SENSE

CFG2 CFG4

CFG5 CFG6 CFG7

CPU1E

AK28

CFG0

AK29

CFG1

AL26

CFG2

AL27

CFG3

AK26

CFG4

AL29

CFG5

AL30

CFG6

AM31

CFG7

AM32

CFG8

AM30

CFG9

AM28

CFG10

AM26

CFG11

AN28

CFG12

AN31

CFG13

AN26

CFG14

AM27

CFG15

AK31

CFG16

AN29

CFG17

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD#AJ26

F25

RSVD#F25

F24

RSVD#F24

F23

RSVD#F23

D24

RSVD#D24

G25

RSVD#G25

G24

RSVD#G24

E23

RSVD#E23

D23

RSVD#D23

C30

RSVD#C30

A31

RSVD#A31

B30

RSVD#B30

B29

RSVD#B29

D30

RSVD#D30

B31

RSVD#B31

A30

RSVD#A30

C29

RSVD#C29

J20

RSVD#J20

B18

RSVD#B18

J15

RSVD#J15

IVY-BRIDGE

CFG

RESERVED

VCC_DIE_SENSE

TP1004 TPAD14-OP-GPTP1004 TPAD14-OP-GP

1

CFG4

CFG7

DY

12

R1006

R1006 1KR2J-1-GP

1KR2J-1-GP

12

R1009

R1009 1KR2J-1-GP

1KR2J-1-GP

Display Port Presence Strap

CFG4

1:(Default) Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

PEG DEFER TRAINING

CFG7

CFG2

CFG6

1: (Default) PEG Train immediately following xxRESETB de assertion 0: PEG Wait for BIOS for training

PEG Static Lane Reversal

R1005

R1005 1KR2J-1-GP

1KR2J-1-GP

CFG2

CFG5

R1007

R1007 1KR2J-1-GP

1KR2J-1-GP

1:(Default) Normal Operation; Lane # definition matches socket pin map definition 0:Lane Reversed

12

R1008

R1008 1KR2J-1-GP

1KR2J-1-GP

DY

12

PCIE Port Bifurcation Straps

CFG[6:5] 11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled) 00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

0:Enable eDP

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU(7/7): CFG/RSVD/DDR3_VRE

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

10 103Tuesday, December 27, 2011

of

10 103Tuesday, December 27, 2011

of

10 103Tuesday, December 27, 2011

1

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU_XDP

Colossus

11 103Monday, December 26, 2011

of

11 103Monday, December 26, 2011

of

11 103Monday, December 26, 2011

1

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Colossus

12 103Monday, December 26, 2011

of

12 103Monday, December 26, 2011

of

12 103Monday, December 26, 2011

1

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

AOAC

Colossus

13 103Monday, December 26, 2011

of

13 103Monday, December 26, 2011

of

13 103Monday, December 26, 2011

1

5

D D

M_A_DQ[63:0]6

C C

1D5V_S3

12

R1403

1KR2F-3-GP

M_VREF_CA_DIMM0

12

R1405

SCD1U10V2KX-4GP

12

1D5V_S3

R1406

R1407

C1422

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

C1423

DY

SC1U6D3V2KX-GP

DY

1KR2F-3-GP

B B

Place these caps close to VTT1 and VTT2.

A A

1KR2F-3-GP

0D75V_S0

12

C1421

C1420

SC1U6D3V2KX-GP

5

12

C1404

C1403

C1405

12

C1404

SC2D2U6D3V3KX-GP

DY

M_VREF_DQ_DIMM0

12

C1406

C1406 SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

DY

M_A_DIM0_ODT06 M_A_DIM0_ODT16

M_VREF_DQ_DIMM08 DDR3_DRAMRST#5,15

1st 661448-307 2nd 661448-306 3rd 661448-304

010412 Update connetor HP P/N, hanle control but not change library

4

DIMM1 REVERSED

DIM1

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_VREF_CA_DIMM0

M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

0D75V_S0

M_A_BS26 M_A_BS06

M_A_BS16

H=9.2mm

4

DIM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

661448-307

VTT1

204

VTT2

DDR3-204P-86-GP-U

62.10017.U01

62.10017.U01 2nd = 62.10017.U01

2nd = 62.10017.U01 3rd = 62.10024.H81

3rd = 62.10024.H81

RAS#

WE#

CAS# CS0#

CS1# CKE0

CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#77

NC#122

NC#125/TEST

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103 102

CK1

104 11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198 199 197

SA0

201

SA1

77 122 125

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

SA0_DIM0 SA1_DIM0

3

M_A_DQS#[7:0] 6 M_A_DQS[7:0] 6 M_A_A[15:0] 6

M_A_RAS# 6 M_A_WE# 6 M_A_CAS# 6

M_A_DIM0_CS#0 6 M_A_DIM0_CS#1 6

M_A_DIM0_CKE0 6 M_A_DIM0_CKE1 6

M_A_DIM0_CLK_DDR0 6 M_A_DIM0_CLK_DDR#0 6

M_A_DIM0_CLK_DDR1 6 M_A_DIM0_CLK_DDR#1 6

SODIMM1_1_SMB_DATA_R SODIMM1_1_SMB_CLK_R

1D5V_S3

TS#_DIMM0_1 15

12

C1401

2

Note:

SA0_DIM0 SA1_DIM0

R1409 0R0402-PAD-1-GPR1409 0R0402-PAD-1-GP

1 2

R1401 0R0402-PAD-1-GPR1401 0R0402-PAD-1-GP

1 2

12

C1402

SCD1U16V2ZY-2GP

3D3V_S0

SC2D2U6D3V3KX-GP

Thermal EVENT

TS#_DIMM0_1

1D5V_S3

Layout Note: Place these Caps near SO-DIMMA.

SODIMM A DECOUPLING

C1413

SCD1U10V2KX-5GP

DY

2

4

RN1401

RN1401 SRN10KJ-5-GP

SRN10KJ-5-GP

1

2 3

10KR2J-3-GP

C1409

SC10U10V5KX-2GP

C1414

SCD1U10V2KX-5GP

C1409

C1408

SC10U6D3V5KX-1GP

C1415

SCD1U10V2KX-5GP

12

DY

12

C1416

SCD1U10V2KX-5GP

12

DY

C1407

12

If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA2 SO-DIMMA TS Address is 0x32

PCH_SMBDATA 15,18,103 PCH_SMBCLK 15,18,103

3D3V_S0

12

R1402

DY

C1412

C1410

C1412

C1411

SC10U6D3V5KX-1GP

C1417

SC1U10V2KX-1GP

SC10U6D3V5KX-1GP

12

DY

12

DY

12

DY

12

C1418

SC1U10V2KX-1GP

DY

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

C1419

C1419 SC1U10V2KX-1GP

SC1U10V2KX-1GP

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR3 SO-DIMM1

Colossus

1

14 103Wednesday, January 04, 2012

1

of

5

M_B_A[15:0]6

M_B_DQS#[7:0]6

M_B_DQS[7:0]6

D D

M_B_BS26 M_B_BS06

M_B_BS16

M_B_DQ[63:0]6

C C

1D5V_S3

12

R1506

1KR2F-3-GP

M_VREF_CA_DIMM1

12

R1507

1KR2F-3-GP

B B

1KR2F-3-GP

A A

Place these caps close to VTT1 and VTT2.

C1523

1D5V_S3

R1508

R1509

SC1U6D3V2KX-GP

12

C1501

12

5

SCD1U10V2KX-4GP

C1502

SC1U6D3V2KX-GP

12

C1507

DY

M_VREF_DQ_DIMM1

12

DY

C1507 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

C1515

C1515 SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

M_B_DIM0_ODT06 M_B_DIM0_ODT16

M_VREF_DQ_DIMM18 DDR3_DRAMRST#5,14

010412 Update connetor HP P/N, hanle control but not change library

C1506

C1514

0D75V_S0

C1503

SC1U6D3V2KX-GP

12

DY

4

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_VREF_CA_DIMM1

1st 661447-301 2nd 661447-306 3rd 661447-304

4

DIM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-85-GP-U

62.10017.U21

2ND = 62.10017.T91

2ND = 62.10017.T91 3rd = 62.10024.I61

3rd = 62.10024.I61

H=5.2mm

EVENT#

VDDSPD

NC#/TEST

661447-301

RAS#

WE#

CAS# CS0#

CS1# CKE0

CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

NC#1 NC#2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8 VDD9

VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1 NP2

CK0

CK1

SDA SCL

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

3

NP1 NP2

110 113 115

114 121

73 74

101 103

102 104

11 28 46 63 136 153 170 187

200 202

198 199 197

SA0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

DIMM2 REVERSED

M_B_RAS# 6 M_B_WE# 6 M_B_CAS# 6

M_B_DIM0_CS#0 6 M_B_DIM0_CS#1 6

M_B_DIM0_CKE0 6 M_B_DIM0_CKE1 6

M_B_DIM0_CLK_DDR0 6 M_B_DIM0_CLK_DDR#0 6

M_B_DIM0_CLK_DDR1 6 M_B_DIM0_CLK_DDR#1 6

SODIMM0_1_SMB_DATA_R SODIMM0_1_SMB_CLK_R

SB0_DIM0 SB1_DIM0

1D5V_S3

3

R1504 0R0402-PAD-1-GPR1504 0R0402-PAD-1-GP

1 2

R1505 0R0402-PAD-1-GPR1505 0R0402-PAD-1-GP

1 2

TS#_DIMM0_1 14

12

C1504

DY

C1505

SCD1U16V2ZY-2GP

SC2D2U10V3ZY-1GP

Layout Note: Place these Caps near SO-DIMMB.

1D5V_S3

77.23371.13L

77.23371.13L 2nd = 79.33719.L01

2nd = 79.33719.L01

2

SB1_DIM0 SB0_DIM0

PCH_SMBDATA 14,18,103 PCH_SMBCLK 14,18,103

SRN10KJ-5-GP

2

3D3V_S0

RN1501

1

4

2 3

3D3V_S0

SODIMM B DECOUPLING

C1509

C1508

TC1501

ST330U2D5VDM-9GP

C1516

SCD1U10V2KX-5GP

DY

SC10U6D3V5KX-1GP

12

C1518

C1517

SCD1U10V2KX-5GP

DY

1

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

C1511

C1512

C1513

SC10U6D3V5KX-1GP

C1521

C1513

SC10U6D3V5KX-1GP

12

DY

12

C1522

C1520

SC1U10V2KX-1GP

DY

DDR3 SO-DIMM2

12

DY

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

1

15 103Wednesday, January 04, 2012

C1510

12

SC10U10V5KX-2GP

DY

12

C1519

SCD1U10V2KX-5GP

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

1

of

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Colossus

16 103Monday, December 26, 2011

of

16 103Monday, December 26, 2011

of

16 103Monday, December 26, 2011

1

A

RTC_AUX_S5

RTC_X1

R1706

1 2

10MR2J-L-GP

X1701

4 4

SC6D8P50V2CN-GP

3 3

2 2

X1701

1

12

C1702

2 3

82.30001.661

2ND = 82.30001.B21

RTCRST_ON27

4

X-32D768KHZ-34GPU

12

C1703

SC6D8P50V2CN-GP

7pF20PPM

12

R1737

R1737 100KR2J-1-GP

100KR2J-1-GP

RTC_X2

HDA_SDOUT_CODEC29 HDA_BITCLK_CODEC29

RTC_AUX_S5

20KR2J-L2-GP

G

S

12

R1736

R1736 2K2R2J-2-GP

2K2R2J-2-GP

R1708

1 2

C1704

SC1U10V2KX-1GP

Q1701

2N7002K-2-GP

D

NO REBOOT STRAP

No Reboot Strap R1722

HDA_SPKR

3D3V_S0

1 1

1 2

R1722 10KR2J-3-GP

1 2

R1723 10KR2J-3-GPR1723 10KR2J-3-GP

DY

Low = Default High = No Reboot

HDA_SPKR

INT_SERIRQ

A

20KR2J-L2-GP

SC1U10V2KX-1GP

12

EC1701

DY_RF

RTC_RST#

1 2

21

G1701

GAP-OPEN

12

SC2200P50V2KX-2GP

DY_RF

5V_S0

12

HDA_SDO_G

G

DMN5L06K-7-GP

U1703

R1730

R1730 10KR2J-3-GP

10KR2J-3-GP

B

R1705

12

C1701

RTC_AUX_S5

EC1702

SC2200P50V2KX-2GP

HDA_SDIN0_CODEC29

84.05067.031

2ND = 84.00138.H31

3RD = 84.2N702.W31

HDA_SYNCHDA_SYNC_C

DS

B

C

D

PCH(1/9)

INTVRMEN- Integrated

DY

8 7 6

4

PCH_INTVRMEN

HDD_HALTLED_R

ISO_PREP#

PCH_JTAG_TCK_BUF PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

SPI_CS1#

1

RTC_X1 RTC_X2 RTC_RST#

SRTC_RST#

INTRUDER#

PCH_INTVRMEN

HDA_BIT_CLK HDA_SYNC PCH_HDA_SPKR PCH_HDA_RST#

HDA_SYNC_C

HDA_SDO

HDA_SYNC ISO_PREP#

3D3V_S5

PCHXDP

PCHXDP PCHXDP

PCHXDP

DY_PCHXDP

PCHXDP

LAYOUT NOTE: JTAG_TMS TERMINATIONS NEED TO BE PLACED NEAR PCH JTAG_TDI TERMINATIONS NEED TO BE PLACED NEAR PCH JTAG_TDO TERMINATIONS NEED TO BE PLACED NEAR XDP JTAG_TCK TERMINATIONS NEED TO BE PLACED NEAR PCH

1 2

R1707 330KR2J-L1-GP

R1709 1MR2J-1-GPR1709 1MR2J-1-GP

1 2

R1710 330KR2J-L1-GPR1710 330KR2J-L1-GP

1 2

RN1701

R1711

1 2 3 4 5

SRN33J-7-GP

1 2

0R0402-PAD-1-GP

HDA_RST#_CODEC29 HDA_SYNC_CODEC29

HDA_SPKR29

-1 1220

RN1704

ME_UNLOCK27 HDD_HALTLED82 SATA_TXN4 56

1 2 3

SRN1KJ-11-GP-U

PCH_SPI_CLK60 PCH_SPI_CS#060

TP1702TPAD14-OP-GP TP1702TPAD14-OP-GP

PCH_SPI_MOSI60

PCH_SPI_MISO60

3D3V_S5

R1724 1KR2J-1-GPR1724 1KR2J-1-GP

1 2

R1729 10KR2J-3-GPR1729 10KR2J-3-GP

1 2

SUS 1.05V VRM Enable High - Enable internal VRs

PCH1A

A20

RTCX1

C20

RTCX2

D20

RTCRST#

G22

SRTCRST#

K22

INTRUDER#

C17

INTVRMEN

N34

HDA_BCLK

L34

HDA_SYNC

T10

SPKR

K34

HDA_RST#

E34

HDA_SDIN0

G34

HDA_SDIN1

C34

HDA_SDIN2

A34

HDA_SDIN3

A36

HDA_SDO

C36

HDA_DOCK_EN#/GPIO33

N32

HDA_DOCK_RST#/GPIO13

J3

JTAG_TCK

H7

JTAG_TMS

K5

JTAG_TDI

H1

JTAG_TDO

T3

SPI_CLK

Y14

SPI_CS0#

T1

SPI_CS1#

V4

SPI_MOSI

U3

SPI_MISO

PANTHER-GP-NF

R1717 210R2F-L-GP

1 2

R1718 210R2F-L-GP

1 2

R1719 210R2F-L-GP

1 2

RN1703

1 2 3 4 5

R1721 51R2J-2-GP

1 2

R1727 1KR2J-1-GP

1 2

R1728 20KR2J-L2-GP

1 2

C

SRN100F-GP

DY

DY DY

DY

8 7 6

LPC

FWH4/LFRAME#

LDRQ1#/GPIO23

RTCIHDA

SATA 6G

SATA

JTAG

SATA3RCOMPO

SPI

SATA0GP/GPIO21 SATA1GP/GPIO19

PCH_JTAG_TMS PCH_JTAG_TDO PCH_JTAG_TDI

PCH_JTAG_TMS PCH_JTAG_TDI PCH_JTAG_TDO

PCH_JTAG_TCK_BUF HDD_HALTLED_R HDA_SDO

1 OF 10

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3COMPI

SATA3RBIAS

SATALED#

LPC_AD0_L

C38

LPC_AD1_L

A38

LPC_AD2_L

B37

LPC_AD3_L

C37

LPC_FRAME#_R

D36 E36

K36

PCH_GPIO23

V5

AM3 AM1 AP7 AP5

AM10 AM8 AP11 AP10

AD7 AD5 AH5 AH4

AB8 AB10 AF3 AF1

Y7 Y5 AD3 AD1

Y3 Y1 AB3 AB1

Y11

SATA_COMP

Y10

AB12

SATA3_COMP

AB13

RBIAS_SATA3

AH1

NEED TO PLACE CLOSE TO PCH

P3 V14 P1

SATA_LED#

PCH_GPIO19

RTC Battery

RTC1

3 1

2 4

ACES-CON2-18-GP

20.F1637.002

2ND = 20.F1864.002

D

LPC_AD[0..3]27,71

LPC_AD3_L

1

LPC_AD2_L

2

LPC_AD0_L

3

LPC_AD1_L

4 5

33R2J-2-GPR1726 33R2J-2-GPR1726

12

TP1701 TPAD14-OP-GPTP1701 TPAD14-OP-GP

1

INT_SERIRQ 27

SATA_RXN0 56 SATA_RXP0 56

SATA_TXN0 56 SATA_TXP0 56

SATA_RXN1 103 SATA_RXP1 103

SATA_TXN1 103 SATA_TXP1 103

SATA_RXN2 56 SATA_RXP2 56

SATA_TXN2 56 SATA_TXP2 56

SATA_RXN4 56 SATA_RXP4 56

SATA_TXP4 56

1D05V_S0

R1713 37D4R2F-GPR1713 37D4R2F-GP

1 2

1D05V_S0

R1714 49D9R2F-GPR1714 49D9R2F-GP

1 2

R1715 750R2F-GPR1715 750R2F-GP

SATA0GP_GPIO21 22

3D3V_S0

R1731

10KR2J-3-GP

+RTC_VCC

12

3D3V_AUX_S5

1 2

R1720 1KR2J-1-GPR1720 1KR2J-1-GP

Title

PCH(1/9): HDA/JTAG/SATA

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

PCH(1/9): HDA/JTAG/SATA

RN1705

RN1705 SRN47J-8-GP

SRN47J-8-GP

HDD1

mSATA

HDD2

ODD

RTC PWR+RTC_VCC

Colossus

E

8 7 6

LPC_FRAME# 27,71

5V_S0

12

R1716

DY

10KR2J-3-GP

U1701

2

1

CH715FPT-GP

83.R0304.B81

2ND = 83.R2004.C81

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3

SC1U10V3ZY-6GP

17 103Wednesday, January 04, 2012

E

LPC_AD3 27,71 LPC_AD2 27,71 LPC_AD0 27,71 LPC_AD1 27,71

SATA_LED# 82

RTC_AUX_S5

C1705

of

12

1

A

15DY_17UP

15DY_17UP 15DY_17UP

PCIE_RXN2_MEDIA1782 PCIE_RXP2_MEDIA1782

17"Card Read

4 4

15"Card Read

WLAN

LAN

3 3

CLKRQ_W LAN#_C65

PCIE_TXN2_MEDIA1782 PCIE_TXP2_MEDIA1782

PCIE_RXN3_MEDIA32 PCIE_RXP3_MEDIA32 PCIE_TXN3_MEDIA32 PCIE_TXP3_MEDIA32

PCIE_RXN4_WLAN65 PCIE_RXP4_WLAN65 PCIE_TXN4_WLAN65 PCIE_TXP4_WLAN65

PCIE_RXN6_LAN31

PCIE_RXP6_LAN31 PCIE_TXN6_LAN31 PCIE_TXP6_LAN31

3D3V_S0_WLAN

R1808

R1808 1KR2J-1-GP

1KR2J-1-GP

1 2

G

S

17"Card Read

15"Card Read

2 2

WLAN

LAN

1 1

RN1804

CLKREQ_LAN# PCH_GPIO74 CLKRQ_W WAN# GPIO44

3D3V_S5

RN1804

1 2 3 4 5 6

SRN10KJ-L3-GP

A

15DY_17UP

C1808 SCD1U10V2KX-5GP

1 2

C1812 SCD1U10V2KX-5GP

1 2

C1805 SCD1U10V2KX-5GP

1 2

C1806 SCD1U10V2KX-5GP

1 2

15UP_17DY

15UP_17DY 15UP_17DY

15UP_17DY

C1809 SCD1U10V2KX-5GPC1809 SCD1U10V2KX-5GP

1 2

C1807 SCD1U10V2KX-5GPC1807 SCD1U10V2KX-5GP

1 2

C1810 SCD1U10V2KX-5GPC1810 SCD1U10V2KX-5GP

1 2

C1811 SCD1U10V2KX-5GPC1811 SCD1U10V2KX-5GP

1 2

Q1801

D

2N7002K-2-GP

R1809

1 2

0R2J-2-GP

DY

3D3V_S5

10

CLKRQ_W LAN#

9

GPIO56

8

CLKREQ_MEDIA#

7

GPIO73

CLKRQ_W LAN#

CLK_PCIE_MEDIA17#82 CLK_PCIE_MEDIA1782

CLKREQ_MEDIA#1782

CLK_PCIE_MEDIA#32 CLK_PCIE_MEDIA32

CLKREQ_MEDIA#32

CLK_PCIE_WLAN#65 CLK_PCIE_WLAN65

CLK_PCIE_LAN#31

CLK_PCIE_LAN31

CLKREQ_LAN#31

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN3_C PCIE_TXP3_C

PCIE_TXN4_C PCIE_TXP4_C

PCIE_TXN6_C PCIE_TXP6_C

GPIO73

GPIO18

CLKRQ_W LAN#

GPIO44

GPIO56

CLKRQ_W WAN#

3D3V_S0

B

BG34

BJ34

AV32

AU32

BE34 BF34 BB32 AY32

BG36

BJ36

AV34

AU34

BF36 BE36 AY34 BB34

BG37 BH37

AY36 BB36

BJ38 BG38 AU36

AV36

BG40

BJ40

AY40 BB40

BE38

BC38

AW38

AY38

Y40 Y39

J2

AB49 AB47

M1

AA48 AA47

V10

Y37 Y36

A8

Y43 Y45

L12

V45 V46

L14

AB42 AB40

E6

V40 V42

T13 V38

V37 K12

AK14 AK13

RN1805

1 2 3

SRN10KJ-5-GP

B

PCH(2/9)

PCH1B

PERN1 PERP1 PETN1 PETP1

PERN2 PERP2 PETN2 PETP2

PERN3 PERP3 PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

CLKOUT_PCIE6N CLKOUT_PCIE6P

PCIECLKRQ6#/GPIO45 CLKOUT_PCIE7N

CLKOUT_PCIE7P PCIECLKRQ7#/GPIO46 CLKOUT_ITPXDP_N

CLKOUT_ITPXDP_P

PANTHER-GP-NF

GPIO18

4

CLKREQ_MEDIA#17

C

2 OF 10

R1806 10KR2J-3-GPR1806 10KR2J-3-GP

EC_SWI# 27

PCH_SMB_CLK 69

PCH_SMB_DATA 69

R1807

1 2

TP1803 TPAD14-OP-GPTP1803 TPAD14-OP-GP TP1805 TPAD14-OP-GPTP1805 TPAD14-OP-GP

XTAL25_IN

12

R1805

1MR2J-1-GP

XTAL25_OUT

SMBCLK

SMBDATA

SML0CLK

CL_CLK1

CL_DATA1

CL_RST1#

E12 H14 C9

A12 C8 G12

C13 E14 M16

M7

T11

P10

PCH_SMB_CLK PCH_SMB_DATA

PCH_SML0_CLK PCH_SML0_DATA

PCH_GPIO74 PCH_SML1CLK PCH_SML1DATA

12pF30PPM

PCH_DDR_RST# 5,8

1 1

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SMBUSController

SML1ALERT#/PCHHOT#/GPIO74

PCI-E*

Link

SML0DATA

SML1CLK/GPIO58

SML1DATA/GPIO75

-1 1220

R1804

CLKREQ_PEG_A#_C

XTAL25_IN

C

M10

AB37 AB38

AV22 AU22

AM12 AM13

BF18 BE18

BJ30 BG30

G24 E24

AK7 AK5

K45

H45

V47 V49

Y47

K43 F47 H47 K49

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLK_BUF_EXP_N CLK_BUF_EXP_P

CLK_BUF_CPYCLK_N CLK_BUF_CPYCLK_P

CLK_BUF_DOT96_N CLK_BUF_DOT96_P

CLK_BUF_CKSSCD_N CLK_BUF_CKSSCD_P

CLK_BUF_REF14

All resistors need very close to PCH

XTAL25_IN XTAL25_OUT

XCLK_RCOMP

CLK_48_USB30 CLK_27_NSSC

CLK_14M_KBC_P

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N

CLKIN_DOT_96N CLKIN_DOT_96P

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64 CLKOUTFLEX1/GPIO65 CLKOUTFLEX2/GPIO66 CLKOUTFLEX3/GPIO67

FLEX CLOCKS

CLKOUT_DMI_P

CLKOUT_DP_N CLKOUT_DP_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_GND1_N CLKIN_GND1_P

CLKIN_SATA_N CLKIN_SATA_P

REFCLK14IN

XTAL25_OUT

XCLK_RCOMP

CLOCKS

R1804

1 2

0R0402-PAD-1-GP

1

4

2 3

RN1806

1 2 3

RN1807

1 2 3

RN1808

1 2 3

RN1809

1 2 3

R1802 10KR2J-3-GPR1802 10KR2J-3-GP

1 2

1D05V_S0

1 2

R1803 90D9R2F-1-GPR1803 90D9R2F-1-GP

RN1810

RN1810 SRN0J-6-GP

SRN0J-6-GP

D

3D3V_S5

12

3D3V_S5

1KR2J-1-GP

PCH_SMBDATA14,15,103

1 2

41

82.30020.D41

2ND = 82.30020.G71

2ND = 82.30020.G71 3RD = 82.30020.G61

3RD = 82.30020.G61

CLKREQ_PEG_A# 83

CLOCK TERMINATION FOR FCIM

4

SRN10KJ-5-GP

4

SRN10KJ-5-GP

4

SRN10KJ-5-GP

4

SRN10KJ-5-GP

CLK_PCI_FB 21

2 3

CLK_PCIE_VGA# 83 CLK_PCIE_VGA 83

CLKOUT_DMI_N 5 CLKOUT_DMI_P 5

SML1_CLK27,29,79,86

D

X1801

X1801 XTAL-25MHZ-155-GP

XTAL-25MHZ-155-GP

C1802

1 2

SC15P50V2JN-2-GP

1 1

CLK_27M_VGA 86

1

3D3V_S0

4

RN1803

RN1803 SRN2K2J-1-GP

SRN2K2J-1-GP

1

2 3

U1801

1

PCH_SMB_CLK

C1801

SC15P50V2JN-2-GP

PCH_SML1DATA

TP1801 TPAD14-OP-GPTP1801 TPAD14-OP-GP TP1802 TPAD14-OP-GPTP1802 TPAD14-OP-GP

TP1804 TPAD14-OP-GPTP1804 TPAD14-OP-GP

Title

PCH(2/9): PCIE/SMBUS/CLK

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

2 3 4

DMN66D0LDW-7-GP

84.DMN66.03F

3D3V_AUX_S5

U1802

1

6

2

5

3 4

DMN66D0LDW-7-GP

84.DMN66.03F

PCH_SMB_CLK PCH_SMB_DATA

Colossus

E

3D3V_S0

123

RN1802

RN1802 SRN2K2J-4-GP

SRN2K2J-4-GP

PCH_SML1CLK PCH_SML1DATA

3D3V_S5

4

1

2 3

E

PCH_SMB_DATA

PCH_SMBCLK 14,15,103

3D3V_S5

SML1_DATA 27,29,79,86

3D3V_S5

RN1801

RN1801 SRN2K2J-1-GP

SRN2K2J-1-GP

DY

12

C1803

C1803 SC68P50V2JN-1GP

SC68P50V2JN-1GP

18 103Wednesday, January 04, 2012

of

18 103Wednesday, January 04, 2012

of

18 103Wednesday, January 04, 2012

6 5

45

678

PCH_SML1CLK

CLK_14M_KBC_P

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

A

B

C

D

E

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT) (R1917 STUFFED,

PCH(3/9)

3 OF 10

PCH1C

DMI_RXN[3:0]4

4 4

DMI_RXP[3:0]4

DMI_TXN[3:0]4

DMI_TXP[3:0]4

1D05V_S0

R1902 49D9R2F-GPR1902 49D9R2F-GP

1 2

R1903 750R2F-GPR1903 750R2F-GP

3 3

XDP_DBRESET#5

SYS_PWROK36

S0_PWR_GOOD27,36

2 2

R1906 0R0402-PAD-1-GPR1906 0R0402-PAD-1-GP

R1907 0R0402-PAD-1-GPR1907 0R0402-PAD-1-GP

R1908 0R0402-PAD-1-GPR1908 0R0402-PAD-1-GP R1909 0R0402-PAD-1-GPR1909 0R0402-PAD-1-GP

TP1903TPAD14-OP-GP TP1903TPAD14-OP-GP

1 2

1 2 1 2

PM_DRAM_PWRGD5

RSMRST#41

SUS_PW R_ACK27

PM_PWRBTN#27

AC_PRESENT27,86

1

PCH_GPIO72

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_COMP_R

RBIAS_CPY

SUSACK#_R

PM_SYSRST#_R

SYS_PWROK_R

PM_PCH_PWROK PCH_GPIO61

APWROK

R1920

12

100KR2J-1-GP

PM_RI#

PCH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

PANTHER-GP-NF

DMI

SUS_STAT#/GPIO61

System Power Management

Intel ME-EC Interaction Signal List with and without M3 support

Signal Name

SUSPWRDNACK(GPIO30) Required Required

Platform With M3 Support (e.g., Intel AMT)

Platform Without M3 Support

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6

FDI

FDI_RXP7

FDI_INT FDI_FSYNC0 FDI_FSYNC1 FDI_LSYNC0 FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

SLP_LAN#/GPIO29

FDI_TX_N0

BJ14

FDI_TX_N1

AY14

FDI_TX_N2

BE14

FDI_TX_N3

BH13

FDI_TX_N4

BC12

FDI_TX_N5

BJ12

FDI_TX_N6

BG10

FDI_TX_N7

BG9

FDI_TX_P0

BG14

FDI_TX_P1

BB14

FDI_TX_P2

BF14

FDI_TX_P3

BG13

FDI_TX_P4

BE12

FDI_TX_P5

BG12

FDI_TX_P6

BJ10

FDI_TX_P7

BH9

AW16 AV12 BC10 AV14 BB10

DSWODVREN

A18

PCH_DPW ROK

E22

B9

N3

G8

N14

PCH_GPIO63

D10

SLP_S4#_R

H4

SLP_S3#_R

F4

PM_SLP_A#_R PM_SLP_A#

G10

SLP_SUS#

G16

AP14

SLP_LAN#

K14

RSMRST# PCH_GPIO72

R1905 10KR2J-3-GP

-1 1220

R1911 0R0402-PAD-1-GPR1911 0R0402-PAD-1-GP

R1912 0R0402-PAD-1-GPR1912 0R0402-PAD-1-GP R1910 0R2J-2-GP

R1910 0R2J-2-GP R1913 0R0402-PAD-1-GPR1913 0R0402-PAD-1-GP

R1914

1 2

1KR2F-3-GP

FDI_TX_N[7:0] 4

FDI_TX_P[7:0] 4

FDI_INT 4 FDI_FSYNC0 4 FDI_FSYNC1 4 FDI_LSYNC0 4 FDI_LSYNC1 4

-1 1220

R1904 0R0402-PAD-1-GPR1904 0R0402-PAD-1-GP

1 2 1 2

DY

TP1901 TPAD14-OP-GPTP1901 TPAD14-OP-GP

1

TP1904 TPAD14-OP-GPTP1904 TPAD14-OP-GP

1

1 2

1 2 1 2

DY

1 2

TP1908 TPAD14-OP-GPTP1908 TPAD14-OP-GP

1

RSMRST#

RSMRST#_KBC 27

3D3V_S0

PCIE_WAKE# 27,31

PM_CLKRUN# 27

PCH_SUSCLK_KBC 27

PM_SLP_S4# 27,46

PM_SLP_S3# 8,27,36,46,47,92

TP1905 TPAD14-OP-GPTP1905 TPAD14-OP-GP

1

H_PM_SYNC 5

R1901 UNSTUFFED

LOW Disabled (R1917 UNSTUFFED, R1901 STUFFED

R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

DSWODVREN

AC_PRESENT PM_RI#

PCIE_WAKE#

PM_CLKRUN#

SUS_PW R_ACK

SLP_LAN#

1 2

R1901 330KR2J-L1-GP

1 2

DY

RN1901

1 2 3 4 5

SRN10KJ-6-GP

1 2

R1915 8K2R2J-3-GPR1915 8K2R2J-3-GP

SRN10KJ-5-GP

2 3 1

RN1902

1 2

R1919 10KR2J-3-GPR1919 10KR2J-3-GP

RTC_AUX_S5

3D3V_S5

8 7 6

3D3V_S0

3D3V_S5

4

3D3V_S5

1 1

SLP_A# Required

A

Required RequiredACPRESENT(GPIO31)

(Tie to SLP_S3#) Note: If SLP_S3# is not routed from PCH to EC, then SLP_A# becomes required from Intel ME-EC prespecrive.

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH(3/9): DMI/FDI/PM

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

PCH(3/9): DMI/FDI/PM

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

19 103Wednesday, January 04, 2012

of

19 103Wednesday, January 04, 2012

of

19 103Wednesday, January 04, 2012

E

1

A

B

C

D

E

PCH(4/9)

RN2003

RN2003 SRN150F-1-GP

SRN150F-1-GP

4 5

3D3V_S0

23

1

RN2002

RN2002 SRN2K2J-1-GP

SRN2K2J-1-GP

4

L_BKLT_EN27 LCDVDD_EN49

BKLT_CTL49

LCD_SMBCLK49 LCD_SMBDATA49

L_CTRL_CLK L_CTRL_DATA

TXCLKA_L-49 TXCLKA_L+49

TXOUTA_L0-49 TXOUTA_L1-49 TXOUTA_L2-49

TXOUTA_L0+49 TXOUTA_L1+49 TXOUTA_L2+49

TXCLKB_L-49 TXCLKB_L+49

TXOUTB_L0-49 TXOUTB_L1-49 TXOUTB_L2-49

TXOUTB_L0+49 TXOUTB_L1+49 TXOUTB_L2+49

PCH_BLUE50 PCH_GREEN50 PCH_RED50

CRT_DDC_CLK50 CRT_DDC_DATA50

CRT_HSYNC50 CRT_VSYNC50

R2003

1KR2D-1-GP

LVD_IBG

1 2

R2005 2K37R2F-GPR2005 2K37R2F-GP

DAC_IREF

12

M45

AF37 AF36

AE48 AE47

AK39 AK40

AN48 AM47 AK47

AJ48

AN47 AM49 AK49

AJ47

AF40 AF39

AH45 AH47

AF49 AF45

AH43 AH49

AF47 AF43

N48 P49 T49

T39

M40

M47 M49

T43 T42

J47

P45 T40

K47 T45

P39

PCH1D

L_BKLTEN L_VDD_EN

L_BKLTCTL L_DDC_CLK

L_DDC_DATA L_CTRL_CLK

L_CTRL_DATA LVD_IBG

LVD_VBG LVD_VREFH

LVD_VREFL

LVDSA_CLK# LVDSA_CLK

LVDSA_DATA#0 LVDSA_DATA#1 LVDSA_DATA#2 LVDSA_DATA#3

LVDSA_DATA0 LVDSA_DATA1 LVDSA_DATA2 LVDSA_DATA3

LVDSB_CLK# LVDSB_CLK

LVDSB_DATA#0 LVDSB_DATA#1 LVDSB_DATA#2 LVDSB_DATA#3

LVDSB_DATA0 LVDSB_DATA1 LVDSB_DATA2 LVDSB_DATA3

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

DAC_IREF CRT_IRTN

PANTHER-GP-NF

4 OF 10

DDPB_0N

DDPB_0P

DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

AP43 AP45

AM42 AM40

AP39 AP40

P38 M39

AT49 AT47 AT40

AV42 AV40 AV45 AV46 AU48 AU47 AV47 AV49

P46 P42

AP47 AP49 AT38

AY47 AY49 AY43 AY45 BA47 BA48 BB47 BB49

M43 M36

AT45 AT43 BH41

BB43 BB45 BF44 BE44 BF42 BE42 BJ42 BG42

DPD_AUXN DPD_AUXP

3D3V_S0

4

1

2 3

TP2002 TPAD14-OP-GPTP2002 TPAD14-OP-GP

1

TP2001 TPAD14-OP-GPTP2001 TPAD14-OP-GP

1

RN2001

RN2001 SRN2K2J-1-GP

SRN2K2J-1-GP

PCH_HDMI_CLK 51 PCH_HDMI_DATA 51

HDMI_PCH_DET 51 HDMI_DATA2_R# 51

HDMI_DATA2_R 51 HDMI_DATA1_R# 51 HDMI_DATA1_R 51 HDMI_DATA0_R# 51 HDMI_DATA0_R 51 HDMI_CLK_R# 51 HDMI_CLK_R 51

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN SDVO_STALLP

SDVO_INTN

SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

CRT

DDPD_HPD

4 4

3 3

CLOSED IN PCH1

PCH_RED

PCH_GREEN

PCH_BLUE

2 2

678

123

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH(4/9): LVDS/CRT/DDI

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

PCH(4/9): LVDS/CRT/DDI

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

20 103Wednesday, January 04, 2012

of

20 103Wednesday, January 04, 2012

of

20 103Wednesday, January 04, 2012

E

1

A

B

C

D

E

3D3V_S0

R2113

1 2

10KR2J-3-GP

4 4

DY

1 2

10KR2J-3-GP

10KR2J-3-GP R2111

R2111

3D3V_S0

3 3

3D3V_S0

2 2

1 1

1 2

2 3 1

INT_PIRQA# INT_PIRQD# INT_PIRQB# INT_PIRQC#

R2110

DY

10KR2J-3-GP

SRN8K2J-3-GP

RN2101

DY_RF

PE_GPIO0

CAMERA_ON

ACCEL_INT# NMI_SMI_DBG#

4

RN2102

1 2 3 4 5 6

SRN8K2J-2-GP-U

CLK_PCI_KBC

12

EC2101

SC12P50V2JN-3GP

A

10 9 8 7

3D3V_S0

PCH_GPIO5 PCH_GPIO52

CLK_PCI_DEBUG

12

EC2102

SC12P50V2JN-3GP

DY_RF

USB3_RXN162 USB3_RXN362

USB3_RXN482 USB3_RXP162

USB3_RXP362 USB3_RXP482 USB3_TXN162

USB3_TXN362 USB3_TXN482 USB3_TXP162

USB3_TXP362 USB3_TXP482

3D3V_S0

3D3V_S5

CLK_PCI_KBC27 CLK_PCI_FB18

CLK_PCI_DEBUG71,103

PCI_PLTRST#

PCH_GPIO51

USB3.0 Table

Pair Device

1 2 3 4

RN2105

1 2 3

SRN8K2J-3-GP

R2102

1 2

10KR2J-3-GP

R2103 22R2J-2-GPR2103 22R2J-2-GP

R2105 22R2J-2-GPR2105 22R2J-2-GP

R2107 22R2J-2-GPR2107 22R2J-2-GP

USB

I/O CONN. 1 LEFT_DOWN FREE I/O CONN. 2 LEFT_UP I/O CONN. 3 RIGHT_UP

DGPU_HOLD_RST#

4

DGPU_PW R_EN#

DGPU_HOLD_RST#83

TP2102TPAD14-OP-GP TP2102TPAD14-OP-GP

DGPU_PW R_EN#93

TP2107TPAD14-OP-GP TP2107TPAD14-OP-GP TP2103TPAD14-OP-GP TP2103TPAD14-OP-GP

ACCEL_INT#79

SATA_ODD_DA#56

NMI_SMI_DBG#27

PCI_PME#

1 2

1 2 3

2ND = 73.7SZ08.EAH

3RD = 73.7SZ08.DAH

B

TP2108TPAD14-OP-GP TP2108TPAD14-OP-GP TP2106TPAD14-OP-GP TP2106TPAD14-OP-GP

3D3V_S5

U2101

B

VCC

A

Y

GND

74LVC1G08GW-1-GP

73.01G08.L04

1

1 1

AND GATE

5

PLT_RST#

4

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCH_GPIO52

PCH_GPIO51 CAMERA_ON PE_GPIO0

NMI_SMI_DBG# PCH_GPIO5

PCI_PLTRST#

CLK_PCI_SIO_R CLK_PCI_FB_R CLK_OUT_PCI2

1

CLK_OUT_PCI3

1

CLK_PCI_KBC_R

DY

12

BG26 BH25 BG16

AH38 AH37 AK43 AK45

AH12

AB46 AB45

AY16 BG46

BE28 BC30 BE32

BC28 BE30

BG32 AV26 BB26 AU28 AY30 AU26 AY26 AV28

AW30

R2108

R2108 100KR2J-1-GP

100KR2J-1-GP

PCH(5/9)

PCH1E

TP1

BJ26

TP2 TP3

BJ16

TP4 TP5 TP6 TP7 TP8 TP9

C18

TP10

N30

TP11

H3

TP12 TP13

AM4

TP14

AM5

TP15

Y13

TP16

K24

TP17

L24

TP18 TP19 TP20

B21

TP21

M20

TP22 TP23 TP24

USB3RN1 USB3RN2 USB3RN3

BJ32

USB3RN4 USB3RP1 USB3RP2

BF32

USB3RP3 USB3RP4 USB3TN1 USB3TN2 USB3TN3 USB3TN4 USB3TP1 USB3TP2 USB3TP3 USB3TP4

K40

PIRQA#

K38

PIRQB#

H38

PIRQC#

G38

PIRQD#

C46

REQ1#/GPIO50

C44

REQ2#/GPIO52

E40

REQ3#/GPIO54

D47

GNT1#/GPIO51

E42

GNT2#/GPIO53

F46

GNT3#/GPIO55

G42

PIRQE#/GPIO2

G40

PIRQF#/GPIO3

C42

PIRQG#/GPIO4

D44

PIRQH#/GPIO5

K10

PME#

C6

PLTRST#

H49

CLKOUT_PCI0

H43

CLKOUT_PCI1

J48

CLKOUT_PCI2

K42

CLKOUT_PCI3

H40

CLKOUT_PCI4

PANTHER-GP-NF

PLT_RST# 5,27,31,32,36,65,71,82,83,103

C

5 OF 10

AY7

RSVD1

AV7

RSVD2

AU3

RSVD3

BG4

RSVD4

AT10

RSVD5

BC8

RSVD6

AU2

RSVD7

AT4

RSVD8

AT3

RSVD9

AT1

RSVD10

AY3

RSVD11

AT5

RSVD12

AV3

RSVD13

AV1

RSVD14

BB1

RSVD15

BA3

RSVD16

BB5

RSVD17

BB3

RSVD18

BB7

RSVD19

BE8

RSVD20

BD4

RSVD21

BF6

RSVD22

RSVD

PCI

USB

USBRBIAS#

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

RSVD23 RSVD24

RSVD25 RSVD26

RSVD27 RSVD28

RSVD29

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS

AV5 AV10

AT8 AY5

BA2 AT12

BF3

C24 A24 C25 B25 C26 A26 K28 H28 E28 D28 C28 A28 C29 B29 N28 M28 L30 K30 G30 E30 C30 A30 L32 K32 G32 E32 C32 A32

C33

B33

A14 K20 B17 C16 L16 A16 D14 C14

USB_PP3 USB_PN3

USB_PP9 USB_PN9

USB_PN3 USB_PP3

USB_BIAS

RN2108

1 2 3

15DY_17UP

SRN0J-6-GP

SRN0J-6-GP RN2109

RN2109

1 2 3

SRN0J-6-GP

15DY_17UP

RN2106

1 2 3

4

SRN0J-6-GP

15UP_17DY

RN2107

USB_PP9USB_PN9 USB_PN9USB_PP9

RN2107

1

4

2 3

SRN0J-6-GP

15UP_17DY

R2101 22D6R2F-L1-GPR2101 22D6R2F-L1-GP

1 2

OC#

USB_PP3_2 82 USB_PN3_2 82

USB_PP9_2 82 USB_PN9_2 82

USB_PN0 62 USB_PP0 62

USB_PN2 62 USB_PP2 62 USB_PN3_1 82 USB_PP3_1 82

USB_PN5 65 USB_PP5 65

USB_PN8 64 USB_PP8 64

USB_PN10 49 USB_PP10 49

-1 12/15

R2104

1 2

10KR2J-3-GP

USB_PP9_1 82 USB_PN9_1 82

(UB2)

-1 12/15

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

D

Date: Sheet

USB2.0 Table

Pair Device

0 1 2 3 4 5 6 7 8 9 10 11 12 13

USB 3.0 Conn. 1

USB 3.0 Conn. 2 USB 3.0 Conn. 3

BT WLAN combo

Fingerprint

USB 2.0 Conn. 1

Camera

3D3V_S5

PCH(5/9): PCI/USB/NVM

Colossus

USB

USB 3.0 I/O CONN.

N/A

USB 3.0 I/O CONN. USB 3.0 I/O CONN.

FREE BT WLAN combo FREE FREE Fingerprint

USB 2.0 CONN(Debug)

Camera FREE FREE FREE

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

(UB1)

21 103Wednesday, January 04, 2012

(UB1)

of

1

A

3D3V_S0

RP2201

1

PCH_TEMP_ALERT# SATA_ODD_PWR_EN

3D3V_S0

4 4

3 3

2 2

3D3V_S5

GPIO6_FF

GPIO6_DF_DY

2 3 4 5 6

SRN10KJ-L3-GP

DY

R2204 10KR2J-3-GP

1 2

RN2204

1

4

2 3

SRN10KJ-5-GP

3D3V_S0

GPIO22_45W

R2211

10KR2J-3-GP

1 2

R2212

10KR2J-3-GP

1 2

GPIO22_35W

10 9

GPIO34

8 7

EC_SCI#

3D3V_S0

PCH_GPIO24

mSATA_DET#

LAN_DIS#

GPIO1_Balen17

R2206

R2205

10KR2J-3-GP

1 2

R2215

10KR2J-3-GP

1 2

10KR2J-3-GP

1 2

PCH_GPIO6 PCH_GPIO22 PCH_GPIO1

R2216

10KR2J-3-GP

1 2

GPIO1_Goya15

SRN10KJ-5-GP

2 3 1

4

RN2205

1 2

R2218 10KR2J-3-GPR2218 10KR2J-3-GP

3D3V_S0

GPIO69_DIS

R2231

R2231 10KR2J-3-GP

10KR2J-3-GP

1 2

UMA_DIS#

R2230

R2230 10KR2J-3-GP

10KR2J-3-GP

DY

1 2

DGPU_PW ROK

PCH_GPIO38 PCH_GPIO39

B

PCH_TEMP_ALERT#27

TLS_ENcrytion

PCH_GPIO22

C

D

E

3D3V_S0

PCH(6/9)

H_A20GATE

6 OF 10

PCH1F

TP2222TPAD14-OP-GP TP2222TPAD14-OP-GP

EC_SCI#27

TP2229TPAD14-OP-GP TP2229TPAD14-OP-GP TP2202TPAD14-OP-GP TP2202TPAD14-OP-GP

SATA_ODD_DET#56

DGPU_PW ROK93

mSATA_DET#103

TP2230TPAD14-OP-GP TP2230TPAD14-OP-GP

CRD_REQ#_R_R

1

PCH_GPIO1 PCH_GPIO6

EC_SCI# PCH_GPIO8

1

LAN_DIS#

1

PCH_GPIO24

PCH_GPIO28

1

GPIO34

SATA2GP_GPIO36 SATA3GP_GPIO37 PCH_GPIO38 PCH_GPIO39

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/GPIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49/TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1#A4

A44

VSS_NCTF_2#A44

A45

VSS_NCTF_3#A45

A46

VSS_NCTF_4#A46

A5

VSS_NCTF_5#A5

A6

VSS_NCTF_6#A6

B3

VSS_NCTF_7#B3

B47

VSS_NCTF_8#B47

BD1

VSS_NCTF_9#BD1

BD49

VSS_NCTF_10#BD49

BE1

VSS_NCTF_11#BE1

BE49

VSS_NCTF_12#BE49

BF1

VSS_NCTF_13#BF1

BF49

VSS_NCTF_14#BF49

PANTHER-GP-NF

GPIO

NCTF

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

6 OF 10

TACH4/GPIO68 TACH5/GPIO69 TACH6/GPIO70 TACH7/GPIO71

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

INIT3_3V#

DF_TVS

CPU/MISC

TS_VSS1 TS_VSS2 TS_VSS3 TS_VSS4

NC_1

VSS_NCTF_15#BG2

VSS_NCTF_16#BG48

VSS_NCTF_17#BH3

VSS_NCTF_18#BH47

VSS_NCTF_19#BJ4 VSS_NCTF_20#BJ44 VSS_NCTF_21#BJ45 VSS_NCTF_22#BJ46

VSS_NCTF_23#BJ5

VSS_NCTF_24#BJ6

VSS_NCTF_25#C2

VSS_NCTF_26#C48

VSS_NCTF_27#D1

VSS_NCTF_28#D49

VSS_NCTF_29#E1

VSS_NCTF_30#E49

VSS_NCTF_31#F1

VSS_NCTF_32#F49

C40 B41 C41 A40

P4

H_PECI_R

AU16 P5 AY11

PCH_THRMTRIP#_R

AY10

INIT3_3V#

T14

DF_TVS

AY1

AH8 AK11 AH10 AK10

P37

BG2 BG48 BH3 BH47 BJ4 BJ44 BJ45 BJ46 BJ5 BJ6 C2 C48 D1 D49 E1 E49 F1 F49

1 2

DY

R2209 0R2J-2-GP

TP2203 TPAD14-OP-GPTP2203 TPAD14-OP-GP

1

DGPU_PRSNT#

1 2

R2210 390R2F-2GPR2210 390R2F-2GP

VRAM

H_RCIN#

UMA_DIS#

H_A20GATE 27 H_PECI 5,27 H_RCIN# 27 H_CPUPW RGD 5

PROC_SELECT

1 2

R2202 1KR2J-1-GPR2202 1KR2J-1-GP

DMI & FDI Termination Voltage

DF_TVS

DGPU_PRSNT#

"H"GDDR5 "L"DDR3

R2207 10KR2J-3-GPR2207 10KR2J-3-GP

1 2

R2208 10KR2J-3-GPR2208 10KR2J-3-GP

1 2

SATA_ODD_PWR_EN 56

1D05V_S0

12

R2222

DY

56R2J-4-GP

1D8V_S0

12

R2201

R2201 2K2R2J-2-GP

2K2R2J-2-GP

SNB: "1" IVB: "0"

3D3V_S0

R2233

R2233 10KR2J-3-GP

10KR2J-3-GP

DY

1 2

R2232

R2232 10KR2J-3-GP

10KR2J-3-GP

DDR3

1 2

H_THRMTRIP# 5,36

H_SNB_IVB# 5

3D3V_S0

D

SATA0GP_GPIO21 17

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH(6/9): GPIO/NTCF/RSVD

A3

Colossus

1

22 103Thursday, January 05, 2012

of

22 103Thursday, January 05, 2012

of

22 103Thursday, January 05, 2012

E

1

3D3V_S0

1 2

R2217 200KR2J-L1-GP

DY

1 2

1 1

R2226 10KR2J-3-GPR2226 10KR2J-3-GP

FDI TERMINATION VOLTAGE OVERRIDE

GPIO37 (FDI_OVRVLTG)

LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)

A

3D3V_S0

1 2

R2213 200KR2J-L1-GP

DY

1 2

R2227 10KR2J-3-GPR2227 10KR2J-3-GP

SATA2GP_GPIO36SATA3GP_GPIO37

DMI TERMINATION VOLTAGE OVERRIDE

GPIO36

LOW - Tx, Rx terminated to same voltage (DC Coupling Model DEFAULT)

B

3D3V_S5

C

1 2

R2214 1KR2J-1-GPR2214 1KR2J-1-GP

TLS_ENcrytion

RN2202

1 2 3

SRN10KJ-5-GP

4

SATA_ODD_DET#

5

VCC_PCH: 6A

D D

1D05V_S0

1.3A

SC10U6D3V3MX-GP

12

DY

C2313

12

C2314

2.925A

L2301

1D05V_S0

C C

1D05V_S0

B B

1D05V_S0

L2301

DY

1 2

IND-1UH-100-GP

12

C2310

C2311

SC1U10V3KX-3GP

SC1U6D3V2KX-GP

3D3V_S0

1 2

DY

R2302 0R3J-0-U-GP

R2303

1 2

0R0603-PAD-1-GP

-1 1220

12

C2315

SC1U6D3V2KX-GP

1D05V_S0

+V1.05S_VCCAPLL_EXP

SC10U6D3V3MX-GP

SC: decap

12

C2321

SC1U6D3V2KX-GP

12

C2304

C2304 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4

SC1U10V2KX-1GP

12

C2316

SC1U6D3V2KX-GP

DY

12

C2317

DY

12

C2320

C2301

SC1U6D3V2KX-GP

+VCCAFDI_VRM

+V1.05S_VCCAPLL_FDI

+V1.05S_VCCDPLL_FDI

+V1.05S_VCC_DMI

SC1U6D3V2KX-GP

PCH(7/9)

PCH1G

AA23

VCCCORE1

AC23

VCCCORE2

AD21

VCCCORE3

AD23

VCCCORE4

AF21

VCCCORE5

AF23

VCCCORE6

AG21

VCCCORE7

AG23

VCCCORE8

AG24

VCCCORE9

AG26

VCCCORE10

AG27

VCCCORE11

AG29

VCCCORE12

AJ23

VCCCORE13

AJ26

VCCCORE14

AJ27

VCCCORE15

AJ29

VCCCORE16

AJ31

VCCCORE17

AN19

VCCIO28

BJ22

VCCAPLLEXP

AN16

VCCIO15

AN17

VCCIO16

AN21

VCCIO17

AN26

VCCIO18

AN27

VCCIO19

AP21

VCCIO20

AP23

VCCIO21

AP24

VCCIO22

AP26

VCCIO23

AT24

VCCIO24

AN33

VCCIO25

AN34

VCCIO26

BH29

VCC3_3_3

AP16

VCCVRM2

BG6

VCCAFDIPLL

AP17

VCCIO27

AU20

VCCDMI2

PANTHER-GP-NF

POWER

VCC CORE

VCCIO

FDI

CRTLVDS

DMI

DFT / SPI HVCMOS

3

7 OF 10

VCCADAC

VSSADAC

VCCALVDS

VSSALVDS

VCCTX_LVDS1 VCCTX_LVDS2 VCCTX_LVDS3 VCCTX_LVDS4

VCC3_3_6

VCC3_3_7

VCCVRM3

VCCDMI1

VCCCLKDMI

VCCDFTERM1

VCCDFTERM2

VCCDFTERM3

VCCDFTERM4

VCCSPI

U48

U47

AK36 AK37

AM37 AM38 AP36 AP37

266mA

V33

V34

+VCCAFDI_VRM

AT16

AT20

VCCCLKDMI

AB36

C2302

SC1U10V2KX-1GP

AG16

AG17

AJ16

AJ17

V1

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

12

3D3V_S0

SCD1U10V2KX-4GP

C2322

12

C2318

12

SCD01U16V2KX-3GP

12

C2306

C2323

12

SCD01U16V2KX-3GP

12

C2307

160mA

+V1.05S_VCC_DMI 1D05V_S0

12

C2319

C2319 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

3D3V_S5

12

C2303

1 2

0R0603-PAD-1-GP

-1 1220

20mA

SC1U10V2KX-1GP

12

C2305

2

C2312

C2312 SC1U10V2KX-1GP

SC1U10V2KX-1GP

1D8V_S0

SC10U6D3V5KX-1GP

12

C2309

R2301

1 2

0R0402-PAD

R2306

3D3V_S0

1 2

60mA

DY

R2307

R2307 0R3J-0-U-GP

0R3J-0-U-GP

3D3V_S0

1D05V_S0

1D8V_S0

1mA

42mA

20mA

190mA

1mA

U2301

5

VOUT

4

NC#4

G9090-330T11U-GP

74.09090.D3F

2nd = 74.70233.03F

GND

1

5V_S03D3V_DAC_S0

1

VIN

2 3

EN

12

C2308

SC1U10V2KX-1GP

+VCCAFDI_VRM

1D5V_S0

A A

5

1D8V_S0

1 2

R2304 0R3J-0-U-GPR2304 0R3J-0-U-GP

1 2

DY

R2305 0R3J-0-U-GP

4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

PCH(7/9): PWR1

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

1

23 103Monday, December 26, 2011

of

23 103Monday, December 26, 2011

of

23 103Monday, December 26, 2011

1

A

1D05V_S0

3D3V_S5

2mA

3D3V_S0

4 4

3 3

L2401

1 2

IND-10UH-215-GP

68.1001D.10E

2ND = 68.1001E.10N

+V3.3S_VCC_CLKF33

SC10U6D3V3MX-GP

SC1U10V2KX-1GP

12

2ND = 68.1001E.10N

12

C2404

1D05V_S0

C2405

1D05V_S0

2ND = 68.1001E.10N

68.1001D.10E

L2402

1 2

IND-10UH-215-GP

IND-10UH-215-GP L2403

L2403

1 2

IND-10UH-215-GP

68.1001D.10E

1D05V_S0

SC22U6D3V5MX-2GPDYTC2401

SC22U6D3V5MX-2GP

0R0603-PAD-1-GP

-1 1220

L2405

IND-10UH-193-GP

SC10U6D3V3MX-GP

1.01A

SC22U6D3V5MX-2GP

TC2401

SC1U10V2KX-1GP

12

R2401

1 2

DY

SC22U6D3V5MX-2GP

12

C2410

80mA

C2420

12

C2439

SC22U6D3V5MX-2GPDYTC2402

SC22U6D3V5MX-2GP

DY

2 2

AF33, AF34 and AG34 should be VCCDIFFCLKN[3:1]

1D05V_S0

12

C2427

SC1U6D3V2KX-GP

55mA

1D05V_S0

1 1

A

1mA

12

C2432

12

C2426

1 2

DY

R2404 0R3J-0-U-GP

12

C2433

SC1U6D3V2KX-GP

SC1U10V3KX-3GP

B

1 2

DY

R2405 0R3J-0-U-GP

12

C2403

C2403 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C2401

12

SCD1U10V2KX-4GP

DY

+VCCAPLL_CPY_PCH

12

1D05V_S0

DY

SC1U10V2KX-1GP

12

C2411

C2412

+V1.05S_VCCA_A_DPL

+V1.05S_VCCA_B_DPL

TC2402

C2421

SC1U10V2KX-1GP

C2421

SC1U10V2KX-1GP

12

DY

+VCCRTCEXT

12

C2424

C2424 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U6D3V2KX-GP

1D05V_S0

DY

12

C2434

SC1U6D3V2KX-GP

B

+VCCPDSW

PCH_VCCDSW

+V3.3S_VCC_CLKF33

12

C2408

DY

12

C2413

C2414

SC1U6D3V2KX-GP

+VCCAFDI_VRM

160mA

+V1.05S_VCCA_A_DPL +V1.05S_VCCA_B_DPL

95mA

SC1U6D3V2KX-GP

12

C2430

C2429

1 2

SCD1U10V2KX-4GP

+V1.05M_VCCSUS

C2431

12

SC1U10V2KX-1GP

RTC_AUX_S5

SCD1U10V2KX-4GP

12

C2435

DY

+VCCACLK

+VCCSUS1

SC1U6D3V2KX-GP

PCH_DCPSST

6uA

SC1U10V2KX-1GP

12

C2436

DY

AD49

BH23

AA19 AA21 AA24 AA26 AA27 AA29 AA31 AC26 AC27 AC29 AC31 AD29 AD31

BD47

AG34

AG33

C2437

AL29

AL24

W21 W23 W24 W26 W29 W31 W33

BF47

AF17 AF33 AF34

PCH1J

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3_5

VCCAPLLDMI2 VCCIO14

DCPSUS3

VCCASW1 VCCASW2 VCCASW3 VCCASW4 VCCASW5 VCCASW6 VCCASW7 VCCASW8 VCCASW9 VCCASW10 VCCASW11 VCCASW12 VCCASW13 VCCASW14 VCCASW15 VCCASW16 VCCASW17 VCCASW18 VCCASW19 VCCASW20

N16

DCPRTC

Y49

VCCVRM4

VCCADPLLA VCCADPLLB

VCCIO7 VCCDIFFCLKN1 VCCDIFFCLKN2 VCCDIFFCLKN3

VCCSSC

V16

DCPSST

T17

DCPSUS1

V19

DCPSUS2

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-GP-NF

C

PCH(8/9)

POWER

VCCSUS3_3_7 VCCSUS3_3_8 VCCSUS3_3_9

VCCSUS3_3_10

VCCSUS3_3_6

VCCSUS3_3_1

VCCSUS3_3_2 VCCSUS3_3_3 VCCSUS3_3_4 VCCSUS3_3_5

Clock and Miscellaneous

PCI/GPIO/LPCMISC

VCCAPLLSATA

SATA USB

CPURTC

HDA

C

10 OF 10

VCCIO29 VCCIO30 VCCIO31 VCCIO32 VCCIO33

VCCIO34

V5REF_SUS

DCPSUS4

V5REF

VCC3_3_1 VCC3_3_8 VCC3_3_4

VCC3_3_2

VCCIO5

VCCIO12 VCCIO13

VCCIO6

VCCVRM1

VCCIO2 VCCIO3 VCCIO4

VCCASW22

VCCASW23

VCCASW21

VCCSUSHDA

N26 P26 P28 T27 T29

T23 T24 V23 V24 P24

T26

M26

+VCCA_USBSUS

AN23 AN24

P34

N20 N22 P20 P22

AA16 W16 T34

AJ2

AF13

AH13 AH14

AF14

+V1.05S_VCCAPLL_SATA3

AK1

+VCCAFDI_VRM

AF11

AC16 AC17 AD17

1D05V_S0

T21

V21

T19

P32

1D05V_S0

12

C2402

SC1U6D3V2KX-GP

3D3V_S5

12

C2407

C2407 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+V5A_PCH_VCC5REFSUS

+V5S_PCH_VCC5REF

3D3V_S5

12

C2417

C2417 SC1U10V2KX-1GP

SC1U10V2KX-1GP

SCD1U10V2KX-4GP

12

C2418

SC1U6D3V2KX-GP

12

C2423

1D05V_S0

12

C2428

SC1U6D3V2KX-GP

12

C2438

C2438 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2.925A

3D3V_S5

12

1D05V_S0

C2415

12

DY

3D3V_S0

SCD1U10V2KX-4GP

12

C2419

3D3V_S5

D

97mA

C2406

C2406 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_S5

AK

D2401

83.R0304.D8F

CH751H-40-1-GP

12

C2409

C2409 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC1U10V2KX-1GP

2ND = 83.R2004.B8F

2ND = 83.R2004.B8F 3RD = 83.R3004.A8F

3RD = 83.R3004.A8F

266mA

3D3V_S0

12

C2422

C2422 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D05V_S0

1 2

12

C2425

C2425 SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

DY

10mA

D

5V_S5

1mA

DY

IND-10UH-193-GP

E

1mA

12

R2402

R2402 10R2J-2-GP

10R2J-2-GP

3D3V_S0

5V_S0

1mA

12

AK

R2403

D2402

10R2J-2-GP

83.R0304.D8F

CH751H-40-1-GP

C2416

12

SC1U10V2KX-1GP

2ND = 83.R2004.B8F

2ND = 83.R2004.B8F 3RD = 83.R3004.A8F

3RD = 83.R3004.A8F

1D05V_S0

L2404

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

PCH(8/9): PWR2

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

24 103Tuesday, December 27, 2011

E

1

of

1

A

PCH1I

AY4

VSS159

AY42

VSS160

AY46

VSS161

AY8

VSS162

B11

VSS163

B15

VSS164

B19

VSS165

4 4

3 3

2 2

1 1

A

B23 B27 B31 B35 B39

BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48 BD46

BD5 BE22 BE26 BE40

BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28

BD3

BF30 BF38 BF40

BF8 BG17 BG21 BG33 BG44

BG8 BH11 BH15 BH17 BH19

H10 BH27 BH31 BH33 BH35 BH39 BH43

BH7

D12

D16

D18

D22

D24

D26

D30

D32

D34

D38

D42

E18

E26

G18

G20

G26

G28

G36

G48

H12

H18

H22

H24

H26

H30

H32

H34

B7

F45

D3

D8

F3

VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191 VSS192 VSS193 VSS194 VSS195 VSS196 VSS197 VSS198 VSS199 VSS200 VSS201 VSS202 VSS203 VSS204 VSS205 VSS206 VSS207 VSS208 VSS209 VSS210 VSS211 VSS212 VSS213 VSS214 VSS215 VSS216 VSS217 VSS218 VSS219 VSS220 VSS221 VSS222 VSS223 VSS224 VSS225 VSS226 VSS227 VSS228 VSS229 VSS230 VSS231 VSS232 VSS233 VSS234 VSS235 VSS236 VSS237 VSS238 VSS239 VSS240 VSS241 VSS242 VSS243 VSS244 VSS245 VSS246 VSS247 VSS248 VSS249 VSS250 VSS251 VSS252 VSS253 VSS254 VSS255 VSS256 VSS257 VSS258

PANTHER-GP-NF

B

9 OF 10

H46

VSS259

K18

VSS260

K26

VSS261

K39

VSS262

K46

VSS263

K7

VSS264

L18

VSS265

L2

VSS266

L20

VSS267

L26

VSS268

L28

VSS269

L36

VSS270

L48

VSS271

M12

VSS272

P16

VSS273

M18

VSS274

M22

VSS275

M24

VSS276

M30

VSS277

M32

VSS278

M34

VSS279

M38

VSS280

M4

VSS281

M42

VSS282

M46

VSS283

M8

VSS284

N18

VSS285

P30

VSS286

N47

VSS287

P11

VSS288

P18

VSS289

T33

VSS290

P40

VSS291

P43

VSS292

P47

VSS293

P7

VSS294

R2

VSS295

R48

VSS296

T12

VSS297

T31

VSS298

T37

VSS299

T4

VSS300

W34

VSS301

T46

VSS302

T47

VSS303

T8

VSS304

V11

VSS305

V17

VSS306

V26

VSS307

V27

VSS308

V29

VSS309

V31

VSS310

V36

VSS311

V39

VSS312

V43

VSS313

V7

VSS314

W17

VSS315

W19

VSS316

W2

VSS317

W27

VSS318

W48

VSS319

Y12

VSS320

Y38

VSS321

Y4

VSS322

Y42

VSS323

Y46

VSS324

Y8

VSS325

BG29

VSS328

N24

VSS329

AJ3

VSS330

AD47

VSS331

B43

VSS333

BE10

VSS334

BG41

VSS335

G14

VSS337

H16

VSS338

T36

VSS340

BG22

VSS342

BG24

VSS343

C22

VSS344

AP13

VSS345

M14

VSS346

AP3

VSS347

AP1

VSS348

BE16

VSS349

BC16

VSS350

BG28

VSS351

BJ28

VSS352

B

C

PCH(9/9)

C

AA17

AA2

AA3 AA33 AA34 AB11 AB14 AB39

AB4 AB43

AB5

AB7 AC19

AC2 AC21 AC24 AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD19 AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4 AD40 AD42 AD43 AD45 AD46

AD8

AE2

AE3

AF10

AF12 AD14 AD16

AF16

AF19

AF24

AF26

AF27

AF29

AF31

AF38

AF4 AF42 AF46

AF5

AF7

AF8

AG19

AG2 AG31 AG48 AH11

AH3 AH36 AH39 AH40 AH42 AH46

AH7

AJ19 AJ21 AJ24 AJ33 AJ34

AK12

AK3

H5

PCH1H

VSS0 VSS1

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79

PANTHER-GP-NF

D

8 OF 10

AK38

VSS80

AK4

VSS81

AK42

VSS82

AK46

VSS83

AK8

VSS84

AL16

VSS85

AL17

VSS86

AL19

VSS87

AL2

VSS88

AL21

VSS89

AL23

VSS90

AL26

VSS91

AL27

VSS92

AL31

VSS93

AL33

VSS94

AL34

VSS95

AL48

VSS96

AM11

VSS97

AM14

VSS98

AM36

VSS99

AM39

VSS100

AM43

VSS101

AM45

VSS102

AM46

VSS103

AM7

VSS104

AN2

VSS105

AN29

VSS106

AN3

VSS107

AN31

VSS108

AP12

VSS109

AP19

VSS110

AP28

VSS111

AP30

VSS112

AP32

VSS113

AP38

VSS114

AP4

VSS115

AP42

VSS116

AP46

VSS117

AP8

VSS118

AR2

VSS119

AR48

VSS120

AT11

VSS121

AT13

VSS122

AT18

VSS123

AT22

VSS124

AT26

VSS125

AT28

VSS126

AT30

VSS127

AT32

VSS128

AT34

VSS129

AT39

VSS130

AT42

VSS131

AT46

VSS132

AT7

VSS133

AU24

VSS134

AU30

VSS135

AV16

VSS136

AV20

VSS137

AV24

VSS138

AV30

VSS139

AV38

VSS140

AV4

VSS141

AV43

VSS142

AV8

VSS143

AW14

VSS144

AW18

VSS145

AW2

VSS146

AW22

VSS147

AW26

VSS148

AW28

VSS149

AW32

VSS150

AW34

VSS151

AW36

VSS152

AW40

VSS153

AW48

VSS154

AV11

VSS155

AY12

VSS156

AY22

VSS157

AY28

VSS158

Title

PCH(9/9): GND

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

D

Date: Sheet

PCH(9/9): GND

Colossus

E

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

25 103Monday, December 26, 2011

of

25 103Monday, December 26, 2011

of

25 103Monday, December 26, 2011

E

1

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH_XDP

Colossus

26 103Monday, December 26, 2011

of

26 103Monday, December 26, 2011

of

26 103Monday, December 26, 2011

1

5

U2701

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

U2701

12

PCICLK

4

LFRAME#

10

LAD0

8

LAD1

7

LAD2

5

LAD3

3

SERIRQ

1

GA20

2

KBRST#

13

PCIRST#

20

SCI#

38

CLKRUN#

37

ECRST#

21

PWM0

23

PWM1

25

PWM2

26

FANPWM0

27

FANPWM1

28

FANFB0

29

FANFB1

39

KSO0

40

KSO1

41

KSO2

42

KSO3

43

KSO4

44

KSO5

45

KSO6

46

KSO7

47

KSO8

48

KSO9

49

KSO10

50

KSO11

51

KSO12

52

KSO13

53

KSO14

54

KSO15

81

KSO16

82

KSO17

55

KSI0

56

KSI1

57

KSI2

58

KSI3

59

KSI4

60

KSI5

61

KSI6

62

KSI7

78

SDA0

77

SCL0

80

SDA1

79

SCL1

83

PSCLK1

84

PSDAT1

85

PSCLK2

86

PSDAT2

87

PSCLK3

88

PSDAT3

17

GPIO0B

18

GPIO0C

16

GPIO0A

19

GPIO0D

34

GPIO19

30

GPIO16

31

GPIO17

90

GPIO52

92

GPIO54

95

GPIO56

KB9016QF-A3-GP

71.09016.B0G

KB_BL_ON_R#69

R2711

R2711 0R0402-PAD

0R0402-PAD

12

SSID = KBC

D D

20110608 for vendor debug

KROW4 KROW5 KROW6 KROW7

C C

KB_BL_DETECT _C69

B B

LPC_AD[0..3]17,71

1 2 1 2 1 2 1 2

TOUCHPAD _LED68

KROW[0..7]69

KBC_CLK169 KBC_DATA169

CLK_PCI_KBC21

LPC_FRAME#17,71

INT_SERIRQ17 H_A20GATE22

H_RCIN#22

PLT_RST#5,21,31,32,36,65,71,82,83,103

PM_CLKRUN #19

FAN1_PWM28 CAP_LED68

FAN_TACH 128

AOAC_EN#65

KCOL[0..17]69

TP2735

TP2735 GAP-CLOSE-P WR

GAP-CLOSE-P WR TP2737

TP2737 GAP-CLOSE-P WR

GAP-CLOSE-P WR TP2738

TP2738 GAP-CLOSE-P WR

GAP-CLOSE-P WR TP2740

TP2740 GAP-CLOSE-P WR

GAP-CLOSE-P WR

SML1_DATA18,29,79,86 SML1_CLK18,29,79,86

AD_DETECT38

GPU_PROTEC T#86

TPCLK69 TPDATA69

LOGO_BL_ON69

LID_CLOSE#82

L_BKLT_EN20

DC_BATFU LL38

ME_UNLOCK17 CHARGE_LED38 WIFI_RF_EN65

R2731

1 2

51KR2J-1-GP

BAT_IN#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

H_RCIN#

ECSCI#_KBC ECRST#

AD_OFF

KROW4 KROW5 KROW6 KROW7

12

1

KB_BL_DETECT

1 1

KB_BL_DETECT

R2730

R2730 100KR2J-1-GP

100KR2J-1-GP

R2732

1 2

100KR2J-1-GP

R2770

R2770 1KR2J-1-GP

1KR2J-1-GP

FPR_OFF KB_BL_ON

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17

3D3V_AUX_KBC

12

TP2745TPAD14-OP-GP TP2745TPAD14-OP-GP

BAT_SDA39,40 BAT_SCL39,4 0

E51_TXD65 E51_RXD65

TP2750TPAD14-OP-GP TP2750TPAD14-OP-GP TP2751TPAD14-OP-GP TP2751TPAD14-OP-GP

EC_AGND

4

125

VCC

22

VCC

33

VCC

111

VCC

96

VCC

9

VCC

67

AVCC

69

AGND

11

GND

24

GND

35

GND

94

GND

113

GND

124

V18R

68

DA0

70

DA1

71

DA2

72

DA3

63

AD0

64

AD1

65

AD2

66

AD3

75

AD4

76

AD5

73

AD6

74

AD7

97

GPXIOA0

98

GPXIOA1

99

GPXIOA2

100

GPXIOA3

101

GPXIOA4

102

GPXIOA5

103

GPXIOA6

104

GPXIOA7

105

GPXIOA8

106

GPXIOA9

107

GPXIOA10

108

GPXIOA11

109

GPXIOD0

110

GPXIOD1

112

GPXIOD2

114

GPXIOD3

115

GPXIOD4

116

GPXIOD5

117

GPXIOD6

118

GPXIOD7

36

GPIO1A

91

GPIO53

93

GPIO55

122

GPIO5D

123

GPIO5E

127

GPIO59

121

GPIO57

89

GPIO50

32

GPIO18

15

GPIO8

14

GPIO7

6

GPIO4

128

GPIO5A

120

GPIO5C

119

GPIO5B

126

GPIO58

3RD = 84.2N702.W 31

2ND = 84.07002.I31

84.2N702.J31

Q2703

D

2N7002K-2-GP

V18R

PROCHOT _EC

KBC_ECW P_C ECSWI#_KBC

EC_SPI_CS#_C1 EC_SPI_DO_C1 EC_SPI_DI_C1 EC_SPI_CLK_C1

G

S

AIRLINE_VOLT_RC

EC_GPIO70 EC_ENABLE# KBC_PWR BTN#_R

H_PECI_R1

SLP_A#

KB_BL_ON

3D3V_AUX_KBC

VBAT

EC_AGND

1 2

C2711 SC4D7U6D3 V3KX-GPC2711 SC4D7 U6D3V3KX-GP

FAN1_DAC

C2714SCD1U 10V2KX-5GPDYC2714SCD1U 10V2KX-5GP

1 2

DY

PCB_VER_AD ADT_TYPE CPU_THR M SYS_THRM MODEL_ID

1

R2745

1 2

43R2J-GP

TP2739 TPAD14-OP -GPTP2739 TPAD14- OP-GP

1

R2744 0R2J-2-GPR2744 0R2J-2-G P

12

R2742 0R2J- 2-GPR2742 0R2J-2- GP

TP2742 TPAD14-OP- GPTP2742 TPAD14-O P-GP

1

QUICKWEB_ BTN# 82

PROCHOT _EC 5

WLAN_PME_D IS_C 65

AD_IA 40

EC_AGND

TP2748 TPAD14-OP- GPTP2748 TPAD14-O P-GP

1

TP2749 TPAD14-OP- GPTP2749 TPAD14-O P-GP

1

PCIE_WAKE# 19,31 BLON_OUT 49 USB_PWR _EN# 61,62 A_SD# 29

S5_ENABLE 36

PM_PWRBT N# 19

RSMRST#_KBC 19

AD_OFF 38 NMI_SMI_DBG# 21 S0_PWR_GO OD 19,36 RTCRST_O N 17

AC_PRESENT 19,86 BAT_IN# 39

TP2747 TPAD14-OP -GPTP2747 TPAD14- OP-GP

D85V_PWR GD 42,48

PCH_TEMP_ALE RT# 22 SUS_PWR _ACK 19 H_PECI 5,22

WLAN_LED # 65

PCH_SUSCL K_KBC 19

CHG_ON# 40

BLUETOOTH _EN 65

PM_SLP_S4# 19,4 6 STOP_CHG# 40 PM_SLP_S3# 8,19 ,36,46,47,92

33R2J-2-GPR2737 33R2J-2-GPR2737

12

33R2J-2-GPR2743 33R2J-2-GPR2743

12 12

33R2J-2-GPR2719 33R2J-2-GPR2719

12

EC_WLAN _LED# 68 PWRLED 82

KBC_ECW P#

EC_SPI_CS#_C 60 EC_SPI_DO_C 60 EC_SPI_DI_C 60 EC_SPI_CLK_C 60

3

VBAT

12

DY

EC_AGND

12

R2735

R2735 100KR2F-L1-GP

100KR2F-L1-GP

C2708

SCD1U10V2KX-5GP

12

3D3V_AUX_KBC

PCH_SUSCL K_KBC

C2712

SC20P50V2JN-1G P

C2710

SCD1U10V2KX-5GP

12

C2709

SC2D2U10V3KX-1GP

WLAN_PME_D IS_C

MODEL ID

MODEL_ID

3D3V_AUX_S5

3D3V_AUX_KBC

R2729

R2733

10KR2F-2-GP

DY

PM_PWRBT N#

DY

KBC_ECW P#

1 2

D2702

AK

1SS355GP-GP

83.00355.F1F

Prevent BIOS data loss solution

PURE_HW _SHUTDO WN#28,36,86

R2723

R2723 10KR2J-3-GP

10KR2J-3-GP

12

GPIO06-->PWRBTN

12

C2706

C2707

SCD1U10V2KX-5GP

12

R2736

R2736 10KR2J-3-GP

10KR2J-3-GP

PCB VERSION

3D3V_AUX_KBC

R2724

R2724 10KR2F-2-GP

10KR2F-2-GP

1 2

12

R2726

R2726 100KR2F-L1-GP

100KR2F-L1-GP

EC_AGND

SPI_WP#_C 60

2nd = 84.03906.F11

PURE_HW _SHUTDO WN#_B

R2702

12

0R0402-PAD

12

C2705

SCD1U10V2KX-5GP

DY

01/05/12

PCB_1

PCB_VER_AD

Q2701

MMBT3906-4-GP

84.T3906.A11

B

C2704

SCD1U10V2KX-5GP

2

3D3V_AUX_KBC

12

3D3V_AUX_KBC

EC_AGND

EC_SWI#18

EC_SCI#22

E

C

C2701

SC2D2U10V3KX-1GP

12

R2727

R2727 64K9R2F-1-GP

64K9R2F-1-GP

12

R2728

R2728 100KR2F-L1-GP

100KR2F-L1-GP

1

For EC power consumption reserver

3D3V_AUX_KBC 3D3V_AUX_S5

12

ECSWI#_KBC

12

ECSCI#_KBC

12

PURE_HW _SHUTDO WN#

3D3V_AUX_S5

12

ECRST#

R2715

R2715 0R0402-PAD

0R0402-PAD R2712

R2712 0R0402-PAD

0R0402-PAD

R2705

R2705 10KR2J-3-GP

10KR2J-3-GP

R2703

1 2

0R0603-PAD-1- GP

HP Limit Signal Detect

3D3V_AUX_KBC

1

2

BAV99PT-GP-U

D2701

R2738

LIMIT_SIGNAL

A A

AIRLINE_VOLT40

1 2

1KR2F-3-GP

AIRLINE_VOLT_RC

R2739

10KR2J-3-GP

EC_AGND

1 2

83.00099.K11

2ND = 83.00099.M11

2ND = 83.00099.M11 3RD = 83.00099.T11

3RD = 83.00099.T11

12

R2734

R2734 12K4R2F-GP

12K4R2F-GP

C2718 SCD1U16V2KX-3G PC 2718 SCD1U16V2KX-3GP

1 2

3

ADT_TYPE

R2725

100KR2J-1-GP

R2740

10KR2J-3-GP

R2725

1 2

L_BKLT_EN

S5_ENABLE

HP AIRLINE COMBO

5

4

EC GPIO standard PH/PL

SRN4K7J-8-G P

BAT_SCL BAT_SDA

ECRST#

12

C2715

SCD1U10V2KX- 5GP

FAN_TACH 128

BLUETOOTH _EN

RN2713 pull-Low 10K Resistor to DY on BLUETOOTH_EN.

3

4

R2716

1 2

10KR2J-3-GP

R2714

R2714 10KR2J-3-GP

10KR2J-3-GP

R2713

R2713 10KR2J-3-GP

10KR2J-3-GP

SRN4K7J-8-G P

RN2701

1 2

DY

3D3V_AUX_KBC

1 23

3D3V_S0

KBC_PWR BTN#_R

1 2

R2757

R2757 470R2J-2-GP

470R2J-2-GP

GPIO70-->PWR_CHG_ACOK#

EC_GPIO70

12

C2713

SCD1U10V2KX- 5GP

3D3V_AUX_KBC

R2706

R2706 10KR2J-3-GP

10KR2J-3-GP

1 2

R2768

1 2

0R0201-PAD-G P

12

C2717

C2717 SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

LOW active

2

PWR_CH G_ACOK# 40

KBC_PWR BTN# 82

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .

Taipei Hsie n 221, Taiwan, R.O.C .

Title

Size Document N umber Rev

A2

Date: Sheet of

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C .

EC CONTROLLER

Colossus

1

27 103Thursday, Jan uary 05, 2012

of

1

5

4

3

2

1

R2813

12

0R0402-PAD

Q2802

THERM_SYS_SHD N#

D D

PURE_HW _SHUTDO WN#27,36,86

R2812

10KR2J-3-GP

12

C2811

C2811 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

DY

D

2N7002K-2-GP

2ND = 84.07002.I31

2ND = 84.07002.I31 3RD = 84.2N702.W 31

3RD = 84.2N702.W 31

DY

S

G

84.2N702.J31

3D3V_S0

DY

12

R2809

R2809 100KR2J-1-GP

100KR2J-1-GP

IMVP_PWRGD 36,42

90 C

U2803

R2806

22K1R2F-L-GP

1 2

THERM_SYS_SHD N#

C C

U2803

SET VCC

1

SET

2

GND OUT#3HYST

G709T1UF-GP

74.00709.A7F

5

VCC

4

HYST

R2811

-1 1226

R2801

12

C2817

C2817 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

R2810

12

0R2J-2-GP

3D3V_S0

12

150R2F-1-GP

12

0R2J-2-GP

DY

3D3V_S0

B B

5V_S0

0R2J-2-GP

0R2J-2-GP R2807

R2807

1 2

DY

FAN_TACH 127

D2801

D2801 CH551H-30GP -GP

CH551H-30GP -GP

83.R5003.J8F

83.R5003.J8F 2ND = 83.R5003.H8H

2ND = 83.R5003.H8H

12

R2805

R2805 10KR2J-3-GP

10KR2J-3-GP

KA

FAN_TACH 1_C

FOR PWM FAN

-1 0102

20 mil

5V_S0 5V_S0_FAN

R2814

1 2

0R0402-PAD

1KR2J-1-GP

12

DY

FAN1_PWM _R

L2801

L2801 MLVS0402M04-GP

MLVS0402M04-GP

4

R2815

FAN1_PWM27

A A

5

AFTP49AFTE 14P-GP AFTP49AFT E14P-GP AFTP46AFTE 14P-GP AFTP46AFT E14P-GP AFTP45AFTE 14P-GP AFTP45AFT E14P-GP AFTP47AFTE 14P-GP AFTP47AFT E14P-GP

1 1 1 1

5V_S0_FAN FAN1_PWM _R FAN_TACH 1_C

1 2

FAN_TACH 1_C

56

FAN1

1 2

3 4

ACES-CON 4-19-GP

-1 1226

20.F1637.004

20.F1637.004 2nd = 20.F1808.004

2nd = 20.F1808.004 3rd = 20.F1579.004

3rd = 20.F1579.004

5V_S0_FAN

SC4D7U6D3V3KX-GP

KA

12

C2440

D2802

D2802 CH551H-30GP -GP

CH551H-30GP -GP

83.R5003.J8F

83.R5003.J8F 2ND = 83.R5003.H8H

2ND = 83.R5003.H8H

-1 0104

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .

Taipei Hsie n 221, Taiwan, R.O.C .

Title

Size Docum ent Number Rev

A2

Date: Sheet of

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C .

Thermal/FAN

Colossus

1

of

28 103Wednesd ay, January 04, 2012

1

5

3D3V_S0

12

R2902

R2902 4K7R2J-2-GP

4K7R2J-2-GP

HDA_RST#_C ODEC

12

C2901

C2901 SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

D D

HDA_BITCLK_C ODEC17 HDA_SDOU T_CODEC17 HDA_SYNC_C ODEC17 HDA_SDIN0_CO DEC17 HDA_RST#_C ODEC17

DMIC_CLK_R

DMIC_DATA_RF 1

DY_RF

12

EC2906

EC2905

SC18P50V2JN-1-GP

CAP CLOSED IN CODEC

A_SD#27

C C

MUTE#30,58

DMIC_CLK49 DMIC_DATA49

MUTE_LED_CT RL68

D2901

1SS355GP-GP

1 2

DY

R2927

R2927 0R2J-2-GP

0R2J-2-GP

83.00355.F1F

2ND = 83.00355.D1F

3D3V_S0

AK

3D3V_S0

12

C2902

R2901

R2901 10KR2J-3-GP

10KR2J-3-GP

3D3V_S0

12

C2903

C2904

12

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

R2903 33R2J -2-GPR290 3 33R2J-2-G P

1 2

R2903 Need close to Codec

R2913 100R2F-L1-GP-UR2913 100R2F-L1- GP-U

1 2

R2926 0R0402-PADR2926 0R0402-PAD

3D3V_S0

SCD1U10V2KX-5GP

12

1 2

C2906

SC4D7U6D3V 3KX-GP

R2904

1 2

DY

10KR2J-3-GP

AUDIO CODEC(92HD91)

DVDD_COR E

C2905

SC10U10V5KX-2GP

1 2

HDA_SDIN0_CO DEC_C

MUTE# DMIC_CLK_R

DMIC_DATA_RF 1

CAP+

CAP-

MUTE_LED_CT RL

U2901

1

DVDD_CORE

3

DVDD_IO

9

DVDD

6

BITCLK

5

SDATA_OUT

10

SYNC

8

SDATA_IN

11

RESET#

47

EAPD

2

DMIC_CLK/GPIO1

4

DMIC_0/GPIO2

48

SPDIFOUT0/GPIO3

46

DMIC1/GPIO0/SPDIFOUT1

36

CAP+

35

CAP-

7

DVSS

42

PVSS

49

GND

92HD91B2X5NLG XYAX-GP

Headphone Trace = 15mil

AVDD_COD EC

Close to Pin13

SENSE_A

Close to Pin14

B B

SENSE_B

12

AUD_AGND AVDD_COD EC

12

AUD_AGND

R2906

R2906 2K49R2F-GP

2K49R2F-GP

C2922

C2922 SC1KP50V2KX-1G P

SC1KP50V2KX-1G P

R2908

R2908 100KR2F-L1-GP

100KR2F-L1-GP

DY

C2923

C2923 SC1KP50V2KX-1G P

SC1KP50V2KX-1G P

If sense A total length is greater than 6 inches.

Change C2922 to 0.1uF

4

AVDD1 AVDD2

PVDD PVDD

SENSE_A SENSE_B

PORTA_L PORTA_R

VREFOUT_A

PORTB_L PORTB_R

PORTC_L

PORTC_R

VREFOUT_C/GPIO4

PORTE_L PORTE_R

PORTF_L

PORTF_R

PORTD_+L

PORTD_-L

PORTD_+R PORTD_-R

MONO_OUT

PCBEEP

VREFFILT

CAP2

VREG(+2.5V)

AVSS1 AVSS2 AVSS2

Digital GND & AUD_AGNDSENSE Detect

Tie Analog GND and Digital GND under codec by a single point

0818 IDT request Place under U2901

G2901

1 2

GAP-CLOSE-P WR-3-G P

G2902

1 2

GAP-CLOSE-P WR-3-G P

G2903

1 2

GAP-CLOSE-P WR-3-G P

G2904

1 2

GAP-CLOSE-P WR-3-G P

G2905

1 2

GAP-CLOSE-P WR-3-G P

audio ground must be connect to digital ground with an 80 mil copper bridge located directly under codec to prevent ESD latch up.

AVDD_COD EC

C2907

12

C2908

SCD1U10V2KX-5GP

27 38

45 39

13 14

28 29 23

31 32

19 20 24

15 16

17 18

40 41

44 43

25 12

21 22 34

V-

37

26 30 33

AUD_AGND

SENSE_A SENSE_B

MIC_L

C2913 SC 1U16V3KX-5GPC2913 SC1U16V3KX -5GP

MIC_R MIC_R0

AUO_BEEP

AUD_VREFF ILT AUD_CAP2 AUD_VAUD_VREG

AUD_AGND

1 2

C2917 SC1U16V3KX-5GPC 2917 SC1U16V3KX-5GP

1 2

C2918 SC10U10V5KX-2GPC2918 SC10U10V5KX-2GP

1 2

C2919 SCD1U10V2KX-5GPC2919 SCD1U10 V2KX-5GP

1 2

C2920 SC 4D7U6D3V3KX -GPC2920 SC 4D7U6D3V3KX- GP

1 2

C2921 SC 4D7U6D3V3KX -GPC2921 SC 4D7U6D3V3KX- GP

1 2

Place close to codec

SC1U10V2KX-1GP

12

HP_OUT_L HP_OUT_R

PC BEEP

HDA_SPKR17

C2909

MIC_L0

SCD1U10V2KX-5GP

AUD_AGND

C2910

12

AVDD_COD EC

R2909

10KR2J-3-GP

3

SC1U10V2KX-1GP

FSPK_L 58 FSPK_R 58

SPKR_L+ 58 SPKR_L- 58

SPKR_R+ 58 SPKR_R- 58

MONO_OUT 30

G

5V_S0

C2911

12

SC10U10V5KX-2GP

1 2

12

C2914

+VREFOUT _A

1 2

MONO_L AUO_BEEPMONO_L_1MONO_L_0

D

Q2902

Q2902 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.07002.I31

2ND = 84.07002.I31 3RD = 84.2N702.W 31

3RD = 84.2N702.W 31

S

AUD_AGND

R2919

R2919 10KR2J-3-GP

10KR2J-3-GP

AVDD_COD EC_EN

SCD1U10V2KX-5GP

C2924

12

SCD1U16V2KX- 3GP

100KR2J-1-GP

100KR2J-1-GP R2910

R2910

1 2

Q2901

Q2901 HPA01085DBVR- GP

HPA01085DBVR- GP

4

EN3NR

2

GND

1

IN

OUT

74.01085.03F

5

C2915

Port Arrangement

Port A---> Mic In Port B---> HeadPhone Port C---> x Port D--->Main SPKR Port E---> x Port F---> 2ND SPKR

R2911

C2925

1 2

AUD_AGND

C2925 SCD01U16V2KX- 3GP

SCD01U16V2KX- 3GP

1 2

10KR2J-3-GP

Vout = 4.75 V

AVDD_COD EC

12

C2916

C2916 SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

SCD01U16V2KX-3GP

AUD_AGND

C2926

12

SCD1U16V2KX- 3GP

2

C2927

+VREFOUT _A

R2922

4K7R2J-2-GP

MIC_L0

MIC_R0

C2927

1 2

12

R2923

4K7R2J-2-GP

SC1U6D3V2KX- GP

AUD_AGND

R2924

1 2

R2925

1 2

BLM18PG600SN-2G P

SENSE_A

MIC IN

BLM18PG600SN-2G P

12

EC2901

SC220P50V2KX-3GP

R2918

1 2

39K2R2F-L-GP

AUD_AGNDAUD_AGND

ADD TEST PAD

-1 12/15 Add AFTP 30 & 31

1

ME update MIC1 Jack

MIC_L0_jack

MIC_R0_jack

12

EC2902

SC220P50V2KX-3GP

SENSE_A_jack

AUD_AGND SENSE_A_jack MIC_L0_jack MIC_R0_jack

AUD_AGND

1 1 1 1

AFTP31 AFTE14P-GPAFTP31 AFTE14P-GP AFTP30 AFTE14P-GPAFTP30 AFTE14P-GP AFTP21 AFTE14P-GPAFTP21 AFTE14P-GP AFTP27 AFTE14P-GPAFTP27 AFTE14P-GP

MIC1

MIC1 AUDIO-JK306-G P

AUDIO-JK306-G P

9 8 7

5 4

3 6 2 1

22.10270.E11

2ND = 22.10270.F61

HeadPhone

ME update HP1 Jack

HP1

HP1 AUDIO-JK306-G P

AUDIO-JK306-G P

9 8

AUD_AGND

7 5 4

3 6 2 1

22.10270.E11

2ND = 22.10270.F61

HPA_OUT_L_ja ck HPA_OUT_R _jack

SENSE_JACK AUD_AGND

AFTP16 AFTE14P-GPAFTP16 AFTE14P-GP

1

AFTP22 AFTE14P-GPAFTP22 AFTE14P-GP

1

AFTP35 AFTE14P-GPAFTP35 AFTE14P-GP

1

AFTP36 AFTE14P-GPAFTP36 AFTE14P-GP

1

HPA_OUT_L HPA_OUT_R

HP_OUT_L

HP_OUT_R

1 2 1 2

SC1U10V2KX-1G P

R2915

30R3F-GP

R2916

30R3F-GP

3

BLM18PG600SN-2G P

EL2901

HPA_OUT_L HPA_OUT_R

A A

EL2901

1 2

EL2902

1 2

BLM18PG600SN-2G P

SENSE_A

HPA_OUT_L_ja ck HPA_OUT_R _jack

12

EC2904

SC220P50V2KX-3GP

1 2

R2914

20KR2F-L-GP

12

EC2903

SC220P50V2KX-3GP

AUD_AGND AUD_AGNDAUD_AGND

SENSE_JACK

-1 12/15 Add AFTP 35 & 36

5

4

C2930

C2931

1 2

C2932

1 2

SC1U10V2KX-1G P

HPA_OUT_L1 HPA_OUT_R 1

5V_S0

12

SC1U10V2KX-1GP

AUD_AGND

12

C2935

SCD1U10V2KX-5GP

C2929

SC1U10V2KX-1G P

C2933

SC1U10V2KX-1GP

1 2

12

AUD_AGND

LEFTINM LEFTINP

RIGHTINM RIGHTINP

12

C2934

SC1U10V2KX-1GP

CPN CPP

U2902

12

VDD

20

VDD

17

CPN

18

CPP

1

LEFTINM

2

LEFTINP

5

RIGHTINM

4

RIGHTINP

14

HPLEFT HPRIGHT11GND

HPA00929RTJR -GP

CPVSS CPVSS

RN2901

SRN2K2J-1-G P

HP_CLK

HP_DATA

3D3V_S0

4

1

2 3

PQ2903

1

6

2

5

3 4

2N7002KDW -GP

84.2N702.A3F

2nd = 84.2N702.E3F

2nd = 84.2N702.E3F 3RD = 84.2N702.F 3F

3RD = 84.2N702.F 3F

Title

Audio Codec 92HD91/HeadphoneAMP

Size Document N umber Rev

A2

Date: Sheet of

Date: Sheet

SML1_CLK 18,27,79,86

SML1_DATA 18,27,79,86

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih, Taipei Hsie n 221, Taiwan, R.O.C .

Taipei Hsie n 221, Taiwan, R.O.C .

Colossus

1

of

29 103Wednes day, January 04, 2012

5V_S0

12

R2917

R2917 10KR2J-3-GP

10KR2J-3-GP

SD#

6

SD#

HP_DATA

7

SDA

HP_CLK

8

SCL

CPVSS

15 16

12

C2928

SC2D2U10V3KX- 1GP

AUD_AGND

2

C2928

3

GND

9

GND

10

GND

13

GND

19

GND

21

5

4

3

2

1

PVCC

D D

C3007

DY

C3008

DY

12

C3002

SC4D7U25V5KX-GP

WOOFER

WOOFER WOOFER

WOOFER

WOOFER AMP

WOOFER

WOOFER WOOFER

WOOFER

WOOFER WOOFER

12

R3006

100KR2J-1-GP

WOOFER

12

R3007

100KR2J-1-GP

WOOFER

5V_S0

R3004 100KR2J-1-GPR3004 100KR2J-1-GP

1 2

R3005 100KR2J-1-GP

1 2

DY

G1

1 1

DY

G0

GAIN

00

20

100

26 32

1 36

PVCC

DY

GAIN 26dB

C C

B B

MUTE#29,58

G0 G1 BSNL_R_G

R3008 10R5J-GP

1 2

C3014 SC1U25V3KX-1-GP

12

C3015

1 2

R3009

R3009 49K9R2F-L-GP

49K9R2F-L-GP

SC1U16V3KX-5GP

R3010 10KR2J-3-GP

1 2

WOOFER

12

SC1U16V3KX-5GP

WOOFER

R3011

R3011 28K7R2F-GP

28K7R2F-GP

0R0603-PAD

R312

C3016

12

1 2

C3017

12

R3013

R3013 0R0603-PAD

0R0603-PAD

1 2

C3018

12

U3001

1

SD#

2

FAULT#

3

NC#3

4

NC#4

5

GAIN0

6

GAIN1

7

AVCC

8

AGND

9

GVDD

10

PLIMIT

11

INN

12

INP

13

NC#13

14

AVCC

TPA3111D1-GP

74.00836.01G

GND PVCC PVCC

BSN#26

OUTN#25

PGND

OUTN#23

BSN#22 BSP#21

OUTP#20

PGND

OUTP#18

BSP#17

PVCC PVCC

WOOFER

WOOFER WOOFER

WOOFER

29 28 27 26 25 24 23 22 21 20 19 18 17 16 15

C3005

BSNL WOOFER_OUTN

WOOFER_OUTP

BSPL

C3009 SCD47U25V3KX-1GP

SC10U25V5KX-GP

1 2

SCD47U25V3KX-1GP

1 2

WOOFER

12

C3013

12

WOOFER

L3001

L3001 PBY201209T-800Y-N-1GP

PBY201209T-800Y-N-1GP

R3002

1 2

DY

10R5J-GP

R3003

1 2

DY

10R5J-GP

L3002

L3002 PBY201209T-800Y-N-1GP

PBY201209T-800Y-N-1GP

12

C3012

SC1U25V3KX-1-GP

12

C3004

SC1KP50V2KX-1GP

2ND = 68.00216.031

1 2

BSPL_R_G

1 2

2ND = 68.00216.031

PVCC

12

C3011

SCD1U25V3KX-GP

C3003

SCD1U25V3KX-GP

68.00206.051

SC1000P50V3JN-GP-U

68.00206.051

12

C3001

SC4D7U25V5KX-GP

WOOFER_-

C3006

SC1000P50V3JN-GP-U

1 2

WOOFER_+

12

C3010

C3010 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

WOOFER

WOOFER WOOFER

WOOFER

R3001

0R0603-PAD-1-GP

3 1

2 4

ACES-CON2-18-GP

20.F1637.002

WOOFER

DCBATOUT

12

WOOFER_WOOFER_+

WOOFER1

G1=0 G0=0 GAIN=6dB G1=0 G0=1 GAIN=12dB G1=1 G0=0 GAIN=18dB G1=1 G0=1 GAIN=24dB

1 1

1

2ND = 20.F1864.002

HPF=275Hz GAIN=16dB

AFTP29 AFTE14P-GPAFTP29 AFTE14P-GP AFTP28 AFTE14P-GPAFTP28 AFTE14P-GP

AFTP48 AFTE14P-GPAFTP48 AFTE14P-GP

SC1U16V3KX-5GP

WOOFER

MONO_OUT 29

A A

5

4

Woofer use in AUD_AGND ground

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio AMP_SPK/WOOFER

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Colossus

1

30 103Wednesday, January 04, 2012

of

30 103Wednesday, January 04, 2012

of

30 103Wednesday, January 04, 2012

1