Wistron DV15 CP Enrico, Caruso 15 UMA Schematic

5

D D

4

3

2

1

Enrico/Caruso 15" UMA Schematics Document

rPGA988A Mobile Arrandale

C C

Intel Ibex Peak-M

2011-04-22

REV : A00

DY : Nopop Component

B B

HDMI : Pop for HDMI function No_HDMI : Pop for NO HDMI function 10/100 : Pop for 10/100 LAN GIGA : Pop for GIGA LAN Surge : Pop for surge option G709 : Pop G709 thermal solution INS : Pop for Inspirion series ID

A A

VOS : Pop for Vostro series ID S3 : Pop for S3 power reduction Normal : Pop for NO S3 power reduction

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

1

1 99Friday, April 22, 2011

A00

5

39,

3

4

5

4

DV15 Calpella UMA Block Diagram

Clock Generator

60

SLG8SP595

CRT

LCD

Level shifter

CardReader

Realtek RTS5138

Azalia CODEC & OP AMP

IDT92HD87B1

60

7

55

LVDS (Single Channel)

54

57

32

30

D D

C C

HDMI

B B

SD/MMC/MS

3X1

Internal Analog MIC

57

71

60

HP OUT

A A

MIC IN

2CH SPEAKER

(2W, 4ohm /channel)

5

RGB

HDMI

USB2.0

HDA

4

Intel CPU

Arrandale

8,9,10,11,12,13,14

FDI

DMIx4

Intel

PCH

14 USB 2.0/1.1 ports

High Definition Audio

SATA ports (6)

PCIE ports (8)

LPC I/F

ACPI 1.1

PCI/PCI BRIDGE

3

DDRIII 1066 Channel A

DDRIII 1066 Channel B

PCIE

USB 2.0

2

Project code : 91.4IP01.001 PCB P/N : 48.4IP01.011 Revision : 10263-1

DDRIII 1066

PCIE x 1

USB 2.0 x 1

Slot 0

Slot 1

10/100 NIC

Realtek

RTL8105E-VC

Mini-Card

802.11b/g/n BT V3.0+HS

USB 2.0 x 1

USB 2.0 x 2

18

19

RJ45

35

64

CAMERA

Right side: USB x 2

CONN

61

54

63

1

MAXIM CHARGER

BQ24707

INPUTS

+DC_IN +PBATT

OUTPUTS

+PWR_SRC

SYSTEM DC/DC

TPS51123

INPUTS

+PWR_SRC

CPU DC/DC

INPUTS

+PWR_SRC

OUTPUTS

+5V_ALW2

+3.3V_RTC_LDO

+3.3V_ALW +5V_ALW +15V_ALW

ISL62882

OUTPUTS

+VCC_CORE

47,48

SYSTEM DC/DC

RT8237A

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_CPU +1.05V_PCH

SYSTEM DC/DC

RT8207

INPUTS

+PWR_SRC

OUTPUTS

+1.5V_SUS +V_DDR_REF

+0.75V_DDR_VTT

SYSTEM DC/DC

+3.3V_ALW

APW7153B

+1.8V_RUN

INPUTS OUTPUTS

SYSTEM DC/DC

TPS51611

INPUTS

+PWR_SRC53+CPU_GFX_CORE

SYSTEM DC/DC

26

INPUTS OUTPUTS

26

+1.5V_SUS +5V_ALW

OUTPUTS

Switches

+1.5V_CPU +5V_RUN +3.3V_RUN+3.3V_ALW

45

46

49

50

51

42

PCB LAYER

USB 2.0 x 1

20,21,22,23,24,25,26,27,28

LPC Bus

KBC

HDD

SPI

ODD

SATA

5959

SPI

Flash ROM

4MB

62

Flash ROM

256kB

62

SATA

NUVOTON

NPCE781BA0DX

Touch PAD

68

Int. KB

37

Thermal

68

P2800

Thermal

G709

4

3

2

Left side: USB x 1

Fan Control

P2793

39

25

39

25

63

L1: Top L2: GND L3: Signal L4: Signal L5 VCC

Fan

39

DV15 CP U MA second

Title

Size Document N umber Rev

A3

Date: Sheet of

39

Block Diagram

Enrico/Caruso 15 CP

L6: Bottom

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

2 99Friday, April 22, 2011

1

A00

5

D D

4

3

2

1

+DC_IN_SS

+PWR_SRC RT8207

ISL62882

RT8237

TPS51611

Charger

BQ24707

+VCC_CORE

+1.05V_CPU +1.05V_PCH

+CPU_GFX_CORE

+0.75V_DDR_VTT+V_DDR_REF

+1.5V_SUS

Adapter

Battery

AO4407

+VCHGR

AO4407

+PBATT

AO4468

C C

+1.5V_CPU

TPS51123

+15V_ALW

+3.3V_ALW_2

+5V_ALW2

G547F2P81U

+5V_ALW

AO4468

G547F2P81U

AO4468

+3.3V_RTC_LDO

+5V_USB1

B B

+5V_RUN

+5V_USB2

SI3456DDV

+LCDVDD

+3.3V_RUN

RTS5138

+3.3V_RUN_CARD

+3.3V_ALW

PA102FMG

+3.3V_LAN

APW7153B

+1.8V_RUN

Power Shape

A A

Regulator LDO Switch

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document N umber Rev

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Power Block Diagram

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

3 99Friday, April 08, 2011

1

A00

A

B

C

D

E

PCH SMBus Block Diagram

KBC SMBus Block Diagram

+5V_RUN

‧

SRN10KJ-5-GP

TouchPad Conn.

Battery Conn.

SMBus address:16

BQ24707

SCL

SDA

SMBus address:12

KBC

PSDAT1

SCL1

SDA1

TPDATA

TPCLKPSCLK1

BAT_SCL

BAT_SDA

+KBC_PWR

‧

SRN4K7J-8-GP

SRN100J-3-GP

TPDATA

TPCLK

PBAT_SMBCLK1

PBAT_SMBDAT1

+3.3V_RUN

‧

+3.3V_RUN

‧

SRN2K2J-1-GP

PCH_SMBCLK

PCH_SMBDATA

PCH_SMBCLK

PCH_SMBDATA

DIMM 1

SCL

SDA

SMBus Address:A0

DIMM 2

SCL

SDA

18

19

+3.3V_ALW

‧

SRN2K2J-1-GP

SMBCLK

1 1

SMBDATA

SML0CLK

SML0DATA

PCH_SMB_CLK

PCH_SMB_DATA

SML0_CLK

SML0_DATA

‧

DMN66D0LDW-7-GP

SMBus Address:A4

Clock

‧

PCH_SMBDATA

SCL

SDA

7

Generator

PCH_SMBCLK

SMBus address:D2

2 2

SML1CLK/GPIO58

SML1DATA/GPIO75

+3.3V_ALW

‧

SRN2K2J-4-GP

‧

PCH_SMBCLK

PCH_SMBDATA

WLAN

XDP

64

+3.3V_ALW

SRN2K2J-4-GP

‧

9

KBC_SCL1

KBC_SDA1

Minicard

NPCE781BA0DX

GPIO73/SCL2

GPIO74/SDA2

PCH

+3.3V_RUN

‧

SRN2K2J-1-GP

SRN2K2J-GP

SRN2K2J-1-GP

‧

DMN66D0LDW-7-GP

Level Shift

SCLSDVO_CTRLCLK

SDA

LCD CONN

+3.3V_RUN

‧

SCL_SINK

SDA_SINK

54

+5V_CRT_RUN

‧

SRN2K2J-1-GP

DDC_CLK_CON

‧

+5V_RUN

DDC_DATA_CON

CRT CONN

55

‧

SRN1K5J-GP

DDC_CLK_HDMI

‧

DDC_DATA_HDMI

‧

B

HDMI CONN

57

C

D

DV15 CP UMA s econd

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

A2

Enrico/Caruso 15 CP

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

SMBUS Block Diagram

4 99Friday, Apri l 08, 2011

E

4 99Friday, Apri l 08, 2011

A00

3 3

L_DDC_DATA

L_DDC_CLK

LDDC_CLK_PCH

LDDC_DATA_PCH

+3.3V_RUN

‧

CRT_DDC_CLK PCH_CRT_DDCCLK

CRT_DDC_DATA

4 4

SDVO_CTRLDATA

A

PCH_CRT_DDCDATA

23

PCH_HDMI_CLK

PCH_HDMI_DATA

‧

+3.3V_RUN

‧

A

B

C

D

E

Thermal Block Diagram

1 1

PAGE39

UMA Thermal

2 2

PAGE37

KBC NPCE781

GPIO33

GPIO56

GPIO92

GPIO91

GPIO4

SYS_THRM

CPU_THRM

Put under CPU(T8 HW shutdown)

P2800

TDR

TDL

Thermal

G709

FAN_TACH1

3 3

5V

TACH

FAN1_PWM

FAN

VIN

Option

DXP

DXN

MMBT3904-3-GP

T8

OTZ

OUT#

P2800_DXP

P2800_DXN

THERM_SYS_SHDN#

SC2200P50V2KX-2 GP

2N7002

S

PURE_HW_SHUTDOWN#

D

IMVP_PWRGD

G

MMBT3904-3-GP

Place near CPU PWM CORE

PGOD

VR

EN

3V/5V

Audio Block Diagram

PORT_D_L+ PORT_D_L-

PORT_D_R+ PORT_D_R-

Codec IDT

92HD87

HP1_PORT_B_L

HP1_PORT_B_R

HP0_PORT_A_L

HP0_PORT_A_R

VREFOUT_A

SPEAKER

HP

OUT

MIC IN

VSET

PAGE39

VOUT

PORT_C_L

PORT_C_R

VREFOUT_C

DV15 CP UMA second

Title

Thermal/Audio Block Diagram

Size Document Number Rev

Custom

Date: Sheet of

A

B

C

D

Date: Sheet of

Enrico/Caruso 15 CP

Analog MIC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

5 99Friday, April 08, 2011

E

A00

VIN

FAN CONTROL

P2793

4 4

A

B

C

D

E

Calpella Schematic Checklist Rev.0_7

Name Schematics Notes

SPKR

4 4

INIT3_3V# Weak internal pull-down. Do not pull high.

GNT3#/ GPIO55

INTVRMEN

GNT0#, GNT1#/GPIO51

GNT2#/ GPIO53

GPIO33

3 3

SPI_MOSI

NV_ALE

NC_CLE Weak internal pull-up. Do not pull low.

HAD_DOCK_EN# /GPIO[33]

HDA_SDO Weak internal pull-down. Do not pull high.

HDA_SYNC

GPIO15

GPIO8

GPIO27

2 2

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

Internal pull-up.

Default Mode:

(Connect to ground with 4.7-kΩ weak

Low (0) = Top Block Swap Mode

pull-down resistor).

High (1) = Integrated VRM is enabled Low (0) = Integrated VRM is disabled

Left both GNT0# and GNT1# floating. No pull up

Default (SPI):

required.

Connect GNT1# to ground with 1-kΩ pull-down

Boot from PCI:

resistor. Leave GNT0# Floating.

Connect both GNT0# and GNT1# to ground with 1-kΩ

Boot from LPC:

pull-down resistor.

Default - Internal pull-up.

= Configures DMI for ESI compatible operation (for servers

Low (0)

only. Not for mobile/desktops).

Do not pull low.

Default:

Connect to ground with 1-kΩ

Disable ME in Manufacturing Mode:

pull-down resistor.

Connect to Vcc3_3 with 8.2-kΩ weak pull-up resistor.

Enable iTPM:

Left floating, no pull-down required.

Disable iTPM:

Connect to Vcc3_3 with 8.2-kΩ weak pull-up

Enable Danbury:

resistor. Connect to ground with 4.7-kΩ weak pull-down

Disable Danbury:

resistor.

Flash Descriptor Security will be overridden.

Low (0):

Flash Descriptor Security will be in effect.

High (1) :

Weak internal pull-down. Do not pull high.

Weak internal pull-up. Do not pull low.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = Disables the VccVRM. Need to use on-board filter circuits for analog rails.

Pin Name

CFG[4] Disabled - No Physical Display Port attached to

CFG[3]

CFG[0]

CFG[7]

Strap Description Configuration (Default value for each bit is

DisplayPort Presence

PCI-Express Static Lane Reversal

PCI-Express Configuration Select

Reserved Temporarily used for early Clarksfield samples.

1 unless specified otherwise)

1:Embedded

Embedded DisplayPort.

Enabled - An external Display Port device is

0:

connected to the Embedded Display Port.

Normal Operation.

1:

Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Single PCI-Express Graphics

1:

Bifurcation enabled

0:

-

Clarksfield (only for early samples pre-ES1)

Connect to GND with 3.01K Ohm/5% resistor

Only temporary for early CFD samples

Note:

(rPGA/BGA) [For details please refer to the WW33 MoW and sighting report]. For a common motherboard design (for AUB and CFD), the pull-down resistor should be used. Does not impact AUB functionality.

Calpella Schematic Checklist Rev.0_7

Default Value

1

0

Processor StrappingPCH Strapping

USB TablePCIE Routing

USB

Pair

LANE2 MiniCard WLAN

LANE3 LAN

0

1

2

3

4

5

6

7

1 1

8

9

10

11

12

13

Device

X

USB1

USB2

(Ext I/O BD)

USB3

(Ext I/O BD)

X

WLAN + Bluetooth

CARD READER

CAMERA

X

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

6 99Friday, April 08, 2011

A00

5

SSID = CLOCK

4

3

2

1

+3.3V_RU N +3.3V_RU N_SL585

R708

1 2

Do Not Stuff

D D

C C

CLK_PCIE_ SATA#23

CLK_PCIE_ SATA23

CLK_CPU _BCLK#23

CLK_CPU _BCLK23

Do Not Stuff

12

C701

Do Not Stuff

DY

DREFCLK #23

DREFCLK23

CLKIN_DMI#23

CLKIN_DMI23

DY

12

C702

Do Not Stuff

C703

12

C704

SCD1U16V2ZY-2GP

A00-0412

R710 Do Not StuffR710 Do Not Stuff

1 2

R711 Do Not StuffR711 Do Not Stuff

1 2

R712 Do Not StuffR712 Do Not Stuff

1 2

R713 Do Not StuffR713 Do No t Stuff

1 2

R714 Do Not StuffR714 Do Not Stuff

1 2

R715 Do Not StuffR715 Do Not Stuff

1 2

R716 Do Not StuffR716 Do Not Stuff

1 2

R717 Do Not StuffR717 Do Not Stuff

1 2

SCD1U16V2ZY-2GP

DREFCLK #_R DREFCLK _R

CLKIN_DMI#_R CLKIN_DMI_R

CLK_PCIE_ SATA#_R CLK_PCIE_ SATA_R

CLK_CPU _BCLK#_R CLK_CPU _BCLK_R

U701

4

DOT_96#

3

DOT_96

14

SRC_2#

13

SRC_2

11

SRC_1/SATA#

10

SRC_1/SATA

22

CPU_0#

23

CPU_0

19

CPU_1#

20

CPU_1

1 2

24

VDD_CPU

R719

DY

Do Not Stuff

17

VDD_SRC

+1.5V_CP U +1.5V_RU N_SL585

R718

1 2

Do Not Stuff

+3.3V_RU N_SL585+1.5V_RU N_SL585

1

29

VDD_REF

VDD_DOT

Do Not Stuff

12

C705

Do Not Stuff

DY

+1.05V_R UN_SL585_IO

5

15

18

VDD_27

VDD_SRC_IO

VDD_CPU_IO

27MHZ_SS

CPU_STOP#

CKPWRGD/PD#

REF_0/CPU_SEL

XTAL_OUT

XTAL_IN

27MHZ

SDA SCL

DY

6 7

16 25 30

28 27

31 32

12

C706

Do Not Stuff

CPU_STO P# CK_PW RGD FSC

CLK_XTA L_IN CLK_XTA L_OUT

PCH_SMB DATA PCH_SMB CLK

12

C707

12

C708

C713

SCD1U16V2ZY-2GP

C713

SCD1U16V2ZY-2GP

R701 2K2R2J-2-GPR701 2K2R2J-2-GP

R703 33R2J-2-GPR703 33R2J-2-G P

PCH_SMB DATA 18,19,23,64 PCH_SMB CLK 18,19,23,6 4

+1.05V_C PU

R709

1 2

Do Not Stuff

12

C709

DY

12

C709

Do Not Stuff

DY

EC701

EC701 Do Not Stuff

Do Not Stuff

CLK_PCH _14M 23

10KR2J-3 -GP

CK_PW RGD

SCD1U16V2ZY-2GP

+3.3V_RU N

12

C710

SC10U10V5ZY-1GP

+3.3V_RU N_SL585

R705

1 2

C711

SCD1U16V2ZY-2GP

D

+1.05V_R UN_SL585_IO

12

C712

SCD1U16V2ZY-2GP

Q701

2N7002K -2-GP

84.2N702.J31

G

S

VR_CLKE N# 47

B B

SLG8LV5 95VTR-GP

71.08595.003

1st Silego :71.08595.003 2nd IDT :71.93197.B03

GND

26

33

2

12

21

9

C714

SC12P50 V2JN-3GP

C714

1st:82.30005.901 2nd:82.30005.A51 3rd:82.30005.B81

1 2

X-14D318 18M-37GP

82.30005.901

12

X701

CLK_XTA L_OUTCLK_XTA L_IN

12

C715

C715 SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

VSS_DOT

VSS_278VSS_SATA

VSS_SRC

VSS_CPU

VSS_REF

FSC 0 1

+1.05V_C PU

R704

R704 Do Not Stuff

Do Not Stuff

DY

A A

5

DY

1 2

R707

R707 10KR2J-3 -GP

10KR2J-3 -GP

1 2

4

SPEED

FSC

133MHz

(Default)

100MHz

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock Generator SLG8LV595

Size Document N umber Rev

Date: Sheet of

3

2

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

7 99Wednesd ay, April 13, 2011

1

A00

SSID = CPU

5

4

3

2

1

D D

62.10055.321

CPU1A

G24

H23

D25

E23 G23

E22 D21 D19 D18 G21 E19

G18

D22 C21 D20 C18 G22 E20

G19

E17

C17

D17

A24 C23 B22 A21

B24 D23 B23 A22

D24

F23

F24

F21

F20

F17

F18

DMI_RX0# DMI_RX1# DMI_RX2# DMI_RX3#

DMI_RX0 DMI_RX1 DMI_RX2 DMI_RX3

DMI_TX0# DMI_TX1# DMI_TX2# DMI_TX3#

DMI_TX0 DMI_TX1 DMI_TX2 DMI_TX3

FDI_TX0# FDI_TX1# FDI_TX2# FDI_TX3# FDI_TX4# FDI_TX5# FDI_TX6# FDI_TX7#

FDI_TX0 FDI_TX1 FDI_TX2 FDI_TX3 FDI_TX4 FDI_TX5 FDI_TX6 FDI_TX7

FDI_FSYNC0 FDI_FSYNC1

FDI_INT

FDI_LSYNC0 FDI_LSYNC1

DMI_PTX_C RXN022 DMI_PTX_C RXN122 DMI_PTX_C RXN222 DMI_PTX_C RXN322

DMI_PTX_C RXP022 DMI_PTX_C RXP122 DMI_PTX_C RXP222 DMI_PTX_C RXP322

DMI_CTX_P RXN022 DMI_CTX_P RXN122 DMI_CTX_P RXN222 DMI_CTX_P RXN322

DMI_CTX_P RXP022 DMI_CTX_P RXP122 DMI_CTX_P RXP222 DMI_CTX_P RXP322

C C

FDI_TXN022 FDI_TXN122 FDI_TXN222 FDI_TXN322 FDI_TXN422 FDI_TXN522 FDI_TXN622 FDI_TXN722

FDI_TXP022 FDI_TXP122 FDI_TXP222 FDI_TXP322 FDI_TXP422 FDI_TXP522 FDI_TXP622 FDI_TXP722

FDI_FSYNC022 FDI_FSYNC122

FDI_INT22

FDI_LSYNC022 FDI_LSYNC122

62.10055.321

ARRANDALE

DMI

Intel(R) FDI

B B

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS

PEG_RX0# PEG_RX1# PEG_RX2# PEG_RX3# PEG_RX4# PEG_RX5# PEG_RX6# PEG_RX7# PEG_RX8#

PEG_RX9# PEG_RX10# PEG_RX11# PEG_RX12# PEG_RX13# PEG_RX14# PEG_RX15#

PEG_RX10

PEG_RX11

PEG_RX12

PEG_RX13

PEG_RX14

PEG_RX15

PEG_TX0#

PEG_TX1#

PEG_TX2#

PEG_TX3#

PEG_TX4#

PEG_TX5#

PEG_TX6#

PEG_TX7#

PEG_TX8#

PEG_TX9# PEG_TX10# PEG_TX11# PEG_TX12# PEG_TX13# PEG_TX14# PEG_TX15#

PCI EXPRESS -- GRAPHICS

PEG_TX10

PEG_TX11

PEG_TX12

PEG_TX13

PEG_TX14

PEG_TX15

1 OF 9

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8 PEG_RX9

PEG_TX0 PEG_TX1 PEG_TX2 PEG_TX3 PEG_TX4 PEG_TX5 PEG_TX6 PEG_TX7 PEG_TX8 PEG_TX9

B26 A26 B27 A25

K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31

J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30

L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26

L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25

PEG_IRCOM P_R

EXP_RBIAS

R801 49 D9R2F-GPR 801 49D9R2F-GP

1 2

R802 75 0R2F-GPR802 750R2F-GP

1 2

ARRAN

DV15 CP U MA second

A A

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (PCIE/DMI/FDI)

Size Document N umber Rev

Date: Sheet of

CPU (PCIE/DMI/FDI)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

8 99Wednesd ay, April 13, 2011

A00

5

+1.05V_C PU

D D

Processor Pullups

R902 49 D9R2F-GPR 902 49D9R2F-GP

1 2

R933 49 D9R2F-GPR 933 49D9R2F-GP

1 2

R904 Do Not Stuff

1 2

DY

H_CATER R#

H_PROCH OT#_CPU

H_CPURS T#

H_PECI25

H_PROCH OT#45,47

H_THERM TRIP#_CPU25

H_PM_SYNC22

C C

H_PW RGD25,42

H_VTTPW RGD49

PLT_RST #21,35,37,6 4,70

Processor Compensation Signals

1 2

R901 20 R2F-GPR901 20 R2F-GP

1 2

R903 20 R2F-GPR903 20 R2F-GP

1 2

R905 49 D9R2F-GPR 905 49D9R2F-GP

1 2

R906 49 D9R2F-GPR 906 49D9R2F-GP

TP901Do Not Stuff TP901Do Not Stuff

1

1 2

DY

R919 Do N ot Stuff

H_CPURS T#

R908

1 2

Do Not Stuff

H_PW RGD_XDP

1 2

R913

1K6R2F-G P

R915

750R2F-GP

R915

750R2F-GP

B B

XDP_PRE Q# XDP_PRD Y#

XDP_OBS 0 XDP_OBS 1

XDP_OBS 2 XDP_OBS 3

XDP_OBS 4 XDP_OBS 5

+1.05V_C PU

H_PW RGD

PM_PW RBTN#_R22

H_PW RGD_XDP

12

C902

DY

C902 Do Not Stuff

Do Not Stuff

A A

1 2

DY

R927 Do Not Stuff

1 2

DY

R929 Do Not Stuff

1 2

DY

R930 Do Not Stuff

SML0_DA TA23

SML0_CL K23

XDP_OBS 6 XDP_OBS 7

H_CPUPW RGD_XDP PM_PW RBTN#_XDP

PCIE_CLK_ XDP_P

XDP_TCL K

SKTOCC# _R

H_CATER R#

H_PROCH OT#_CPU

VCCPW RGOOD

VDDPW RGOOD_R

PLT_RST #_R

12

C904

DY

XDP1

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Do Not Stuff

4

H_COMP3

H_COMP2

H_COMP1

H_COMP0

Do Not StuffDYC904

Do Not Stuff

close to cpu

NP1 61

62

63 64 NP2

AT23

AT24

G16

AT26

AH24

AK14

AT15

AN26

AK15

AP26

AL15

AN14

AN27

AK13

AM15

AM26

AL14

CPU1B

ARRAN

SSID = CPU

COMP3

COMP2

COMP1

COMP0

SKTOCC#

CATERR#

PECI

PROCHOT#

THERMTRIP#

RESET_OBS#

PM_SYNC

VCCPWRGOOD_1

VCCPWRGOOD_0

SM_DRAMPWROK

VTTPWRGOOD

TAPPWRGOOD

RSTIN#

S3 Power Reduction

BCLK_ITP_ P BCLK_ITP_ N

XDP_RST #_R

XDP_TDO XDP_TRS T# XDP_TDI XDP_TMS

MISC

VTT_PW RGD37,49,50

3

ARRANDALE

THERMAL PWR MANAGEMENT

R931 Do Not Stuff

R932 Do Not Stuff

XDP_TCL K

XDP_TRS T#

DPLL_REF_SSCLK#

CLOCKS

DDR3

MISC

DDR3

MISC

JTAG & BPM

U927

1

B

2

S3

A

3

GND

74LVC1G 08GW-1-GP

PM_DRAM _PWRGD22

1 2

DY

1 2

DY

1 2

DY

R918 Do Not Stuff

1 2

R923 51 R2J-2-GPR923 51R2J-2-GP

2 OF 9

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

DPLL_REF_SSCLK

SM_DRAMRST#

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2

PM_EXT_TS0# PM_EXT_TS1#

PRDY# PREQ#

TCK TMS

TRST#

TDO

TDI_M

TDO_M

DBR#

BPM0# BPM1# BPM2# BPM3# BPM4# BPM5# BPM6# BPM7#

+3.3V_RU N

5

VCC

4

Y

C901 Do N ot Stuff

H_CPURS T#

A16 B16

AR30 AT30

E16 D16

A18 A17

F6

AL1 AM1 AN1

AN15 AP15

AT28 AP27

AN28 AP28 AT27

AT29

TDI

AR27 AR29 AP29

AN25

AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23

R938

Do Not Stuff

VTT_PW RGD_R3

12

DY

BCLK_CP U_P_R BCLK_CP U_N_R

BCLK_ITP_ P BCLK_ITP_ N

PEG_CLK _R PEG_CLK #_R

SM_DRAM RST#

SM_RCOM P_0 SM_RCOM P_1 SM_RCOM P_2

PM_EXTT S#0_C PM_EXTT S#1_C

XDP_PRD Y# XDP_PRE Q#

XDP_TCL K XDP_TMS XDP_TRS T#

XDP_TDI_R XDP_TDO _R XDP_TDI_M XDP_TDO _M

H_DBR#_ R

XDP_OBS 0 XDP_OBS 1 XDP_OBS 2 XDP_OBS 3 XDP_OBS 4 XDP_OBS 5 XDP_OBS 6 XDP_OBS 7

+1.5V_CP U

Normal

1 2

Do Not Stuff

XDP_TMS

XDP_TDI_R

XDP_PRE Q#

XDP_TDO

RN901

2 3 1

Do Not Stuff

RN903

2 3 1

Do Not Stuff

R909

1 2

Do Not Stuff

S3 circuit

Normal

R939

1K6R2F-G P

1 2

S3

1 2

Normal

R977

Do Not Stuff

R912

+1.05V_C PU

XDP_DBR ESET# 22 PLT_RST # 21,35,37,64,70

R914 Do Not Stuff

R916 Do Not Stuff

R917 Do Not Stuff

R920 51 R2J-2-GPR920 51R2J-2-GP

4

RN

4

RN

1 2 3

Do Not Stuff

R939 R940C904

1.6k

VDDPW RGOOD_R

12

R940

750R2F-GP

S3

1 2

DY

1 2

DY

1 2

DY

1 2

RN906

DY

Normal

2

12

RN905

4

SRN10KJ -5-GP

4

XDP_DBR ESET#

0.75k

R937R977

R937

Do Not Stuff

+1.05V_C PU

1

DDR_RST _GATE 25

C915

12

SCD047U 16V2ZY-1GP

S3

BCLK_CP U_P 25 BCLK_CP U_N 25

CLK_EXP _P 23 CLK_EXP _N 23

+1.05V_C PU

1 23

PM_EXTT S#0 18 PM_EXTT S#1 19

S3

Q901

G

S

S3

2N7002K -2-GP

84.2N702.J31

1 2

Normal

R935 Do Not Stu ff

+1.5V_SU S

D

SM_DRAM RST#

12

R934

R934 1KR2J-1-G P

1KR2J-1-G P

S3

12

C903

S3

SCD1U10 V2KX-5GP

+1.5V_CP U

DDR3 Compensation Signals

SM_RCOM P_0

SM_RCOM P_1

SM_RCOM P_2

R907 10 0R2F-L1-GP-UR907 10 0R2F-L1-GP-U

1 2

R910 24 D9R2F-L-GPR910 24 D9R2F-L-GP

1 2

R911 13 0R2F-1-GPR911 130R 2F-1-GP

1 2

R938

DY

R938

Stuff1.27k 3k

XDP_TDI_R

XDP_TDO _M

X01-0123

XDP_TDI_M

XDP_TDO _R

R921

1 2

Do Not Stuff

1 2

DY

R922 Do Not Stuff

12

R924

R924 Do Not Stuff

Do Not Stuff

1 2

DY

R925 Do Not Stuff

R926

1 2

Do Not Stuff

JTAG MAPPING

Scan Chain (Default) CPU Only

GMCH Only

DV15 CP U MA second

Title

CPU (THERMAL/CLOCK/PM )

Size Document N umber Rev

Date: Sheet of

Enrico/Caruso 15 CP

Stuff --> R921, R924, R926 No Stuff --> R922, R925 Stuff --> R921, R922 No Stuff --> R924, R926, R925 Stuff --> R926, R925 No Stuff --> R921, R922, R924

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

9 99Wednesd ay, April 13, 2011

DDR3_DR AMRST# 18,19

12

R936

R936 Do Not Stuff

Do Not Stuff

DY

12

R988

S3

100KR2J -1-GP

XDP_TDI

XDP_TDO

A00

5

SSID = CPU

CPU1C

4

3 OF 9

3

CPU1D

2

4 OF 9

1

W8

AA6

SA_CK0

AA7

M_A_DQ[6 3..0]18

D D

C C

B B

M_A_DQ[6 3..0]

M_A_BS018 M_A_BS118 M_A_BS218

M_A_CAS #18 M_A_RAS #18 M_A_W E#18

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ1 0 M_A_DQ1 1 M_A_DQ1 2 M_A_DQ1 3 M_A_DQ1 4 M_A_DQ1 5 M_A_DQ1 6 M_A_DQ1 7 M_A_DQ1 8 M_A_DQ1 9 M_A_DQ2 0 M_A_DQ2 1 M_A_DQ2 2 M_A_DQ2 3 M_A_DQ2 4 M_A_DQ2 5 M_A_DQ2 6 M_A_DQ2 7 M_A_DQ2 8 M_A_DQ2 9 M_A_DQ3 0 M_A_DQ3 1 M_A_DQ3 2 M_A_DQ3 3 M_A_DQ3 4 M_A_DQ3 5 M_A_DQ3 6 M_A_DQ3 7 M_A_DQ3 8 M_A_DQ3 9 M_A_DQ4 0 M_A_DQ4 1 M_A_DQ4 2 M_A_DQ4 3 M_A_DQ4 4 M_A_DQ4 5 M_A_DQ4 6 M_A_DQ4 7 M_A_DQ4 8 M_A_DQ4 9 M_A_DQ5 0 M_A_DQ5 1 M_A_DQ5 2 M_A_DQ5 3 M_A_DQ5 4 M_A_DQ5 5 M_A_DQ5 6 M_A_DQ5 7 M_A_DQ5 8 M_A_DQ5 9 M_A_DQ6 0 M_A_DQ6 1 M_A_DQ6 2 M_A_DQ6 3

C10

D10

H10

G10

AH5 AF5 AK6 AK7 AF6 AG5

AJ10

AL10

AK12

AK8

AK11

AN8 AM10 AR11

AL11

AM9

AN9

AT11 AP12 AM12 AN12 AM13

AT14

AT12

AL13 AR14 AP14

AC3 AB2

AE1 AB3 AE9

A10

B10

E10

F10

J10

AJ7 AJ6

AJ9

AL7

AL8

SA_DQ0 SA_DQ1

C7

SA_DQ2

A7

SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6

A8

SA_DQ7

D8

SA_DQ8 SA_DQ9

E6

SA_DQ10

F7

SA_DQ11

E9

SA_DQ12

B7

SA_DQ13

E7

SA_DQ14

C6

SA_DQ15 SA_DQ16

G8

SA_DQ17

K7

SA_DQ18

J8

SA_DQ19

G7

SA_DQ20 SA_DQ21

J7

SA_DQ22 SA_DQ23

L7

SA_DQ24

M6

SA_DQ25

M8

SA_DQ26

L9

SA_DQ27

L6

SA_DQ28

K8

SA_DQ29

N8

SA_DQ30

P9

SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

SA_BS0 SA_BS1

U7

SA_BS2

SA_CAS# SA_RAS# SA_WE#

ARRANDALE

SA_CK0#

P7

SA_CKE0

Y6

SA_CK1

Y5

SA_CK1#

P6

SA_CKE1

AE2

SA_CS0#

AE8

SA_CS1#

AD8

SA_ODT0

AF9

SA_ODT1

M_A_DM0

B9

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0

DDR SYSTEM MEMORY A

SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

D7 H7 M7 AG6 AM7 AN10 AN13

C9 F8 J9 N9 AH7 AK9 AP11 AT13

C8 F9 H9 M9 AH8 AK10 AN11 AR13

Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9

M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS #0 M_A_DQS #1 M_A_DQS #2 M_A_DQS #3 M_A_DQS #4 M_A_DQS #5 M_A_DQS #6 M_A_DQS #7

M_A_DQS 0 M_A_DQS 1 M_A_DQS 2 M_A_DQS 3 M_A_DQS 4 M_A_DQS 5 M_A_DQS 6 M_A_DQS 7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_CLK_D DR0 18 M_CLK_D DR#0 18 M_CKE0 18

M_CLK_D DR1 18 M_CLK_D DR#1 18 M_CKE1 18

M_CS#0 18 M_CS#1 18

M_ODT0 18 M_ODT1 18

M_B_DQ[6 3..0]19

M_A_DM[7 ..0] 18

M_A_DQS #[7..0] 1 8

M_A_DQS [7..0] 18

M_A_A[15 ..0] 18

M_B_DQ[6 3..0]

M_B_BS019 M_B_BS119 M_B_BS219

M_B_CAS #19 M_B_RAS #19 M_B_W E#19

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ1 0 M_B_DQ1 1 M_B_DQ1 2 M_B_DQ1 3 M_B_DQ1 4 M_B_DQ1 5 M_B_DQ1 6 M_B_DQ1 7 M_B_DQ1 8 M_B_DQ1 9 M_B_DQ2 0 M_B_DQ2 1 M_B_DQ2 2 M_B_DQ2 3 M_B_DQ2 4 M_B_DQ2 5 M_B_DQ2 6 M_B_DQ2 7 M_B_DQ2 8 M_B_DQ2 9 M_B_DQ3 0 M_B_DQ3 1 M_B_DQ3 2 M_B_DQ3 3 M_B_DQ3 4 M_B_DQ3 5 M_B_DQ3 6 M_B_DQ3 7 M_B_DQ3 8 M_B_DQ3 9 M_B_DQ4 0 M_B_DQ4 1 M_B_DQ4 2 M_B_DQ4 3 M_B_DQ4 4 M_B_DQ4 5 M_B_DQ4 6 M_B_DQ4 7 M_B_DQ4 8 M_B_DQ4 9 M_B_DQ5 0 M_B_DQ5 1 M_B_DQ5 2 M_B_DQ5 3 M_B_DQ5 4 M_B_DQ5 5 M_B_DQ5 6 M_B_DQ5 7 M_B_DQ5 8 M_B_DQ5 9 M_B_DQ6 0 M_B_DQ6 1 M_B_DQ6 2 M_B_DQ6 3

AF3 AG1

AK1 AG4 AG3

AH4 AK3

AK4 AM6 AN2

AK5

AK2 AM4 AM3

AP3 AN5

AT4 AN6 AN4 AN3

AT5

AT6 AN7

AP6

AP8

AT9

AT7

AP9

AR10 AT10

AB1

AC5

AC6

B5

SB_DQ0

A5

SB_DQ1

C3

SB_DQ2

B3

SB_DQ3

E4

SB_DQ4

A6

SB_DQ5

A4

SB_DQ6

C4

SB_DQ7

D1

SB_DQ8

D2

SB_DQ9

F2

SB_DQ10

F1

SB_DQ11

C2

SB_DQ12

F5

SB_DQ13

F3

SB_DQ14

G4

SB_DQ15

H6

SB_DQ16

G2

SB_DQ17

J6

SB_DQ18

J3

SB_DQ19

G1

SB_DQ20

G5

SB_DQ21

J2

SB_DQ22

J1

SB_DQ23

J5

SB_DQ24

K2

SB_DQ25

L3

SB_DQ26

M1

SB_DQ27

K5

SB_DQ28

K4

SB_DQ29

M4

SB_DQ30

N5

SB_DQ31 SB_DQ32 SB_DQ33

AJ3

SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37

AJ4

SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

SB_BS0

W5

SB_BS1

R7

SB_BS2

SB_CAS#

Y7

SB_RAS# SB_WE#

ARRANDALE

DDR SYSTEM MEMORY - B

SB_CK0 SB_CK0# SB_CKE0

SB_CK1 SB_CK1# SB_CKE1

SB_CS0# SB_CS1#

SB_ODT0 SB_ODT1

SB_DM0

SB_DM1

SB_DM2

SB_DM3

SB_DM4

SB_DM5

SB_DM6

SB_DM7

SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_MA0

SB_MA1

SB_MA2

SB_MA3

SB_MA4

SB_MA5

SB_MA6

SB_MA7

SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

W9 M3

V7 V6 M2

AB8 AD6

AC7 AD1

D4 E1 H3 K1 AH1 AL2 AR4 AT8

D5 F4 J4 L4 AH2 AL4 AR5 AR8

C5 E3 H4 M5 AG2 AL5 AP5 AR7

U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS #0 M_B_DQS #1 M_B_DQS #2 M_B_DQS #3 M_B_DQS #4 M_B_DQS #5 M_B_DQS #6 M_B_DQS #7

M_B_DQS 0 M_B_DQS 1 M_B_DQS 2 M_B_DQS 3 M_B_DQS 4 M_B_DQS 5 M_B_DQS 6 M_B_DQS 7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_CLK_D DR2 19 M_CLK_D DR#2 19 M_CKE2 19

M_CLK_D DR3 19 M_CLK_D DR#3 19 M_CKE3 19

M_CS#2 19 M_CS#3 19

M_ODT2 19 M_ODT3 19

M_B_DM[7 ..0] 19

M_B_DQS #[7..0] 1 9

M_B_DQS [7..0] 19

M_B_A[15 ..0] 19

ARRAN

A A

5

4

3

ARRAN

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

1

A00

10 99W ednesday, April 13, 2011

A00

5

4

3

2

1

SSID = CPU

5 OF 9

CPU1E

D D

CFG0

CFG3

C C

CFG4

CFG7

B B

DY

12

R1101

R1101 Do Not Stuff

Do Not Stuff

R1102

R1102 Do Not Stuff

Do Not Stuff

R1103

R1103 Do Not Stuff

Do Not Stuff

R1104

R1104 Do Not Stuff

Do Not Stuff

PCI-Express Configuration Select

1:Single PEG

CFG0

0:Bifurcation enabled

CFG3 - PCI-Express Static Lane Reversal

1 :Normal Operation

CFG3

0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port

CFG4

attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port

CFG7(Reserved) - Temporarily used for early Clarksfield sampl es.

CFG7 Clarks field (only for early samples pre-ES1) -

Connect to GND with 3.01K Ohm/5% resistor.

Note: Only temporary for early CFD sample (rPGA/BGA) [For details please refer to the WW33 MoW and sightin g report]. For a common M/B design (for AUB and CFD), the pull-down resistor shouble be used. Does not impact AUB functionality.

TP1116TP1116 TP1117TP1117

1 1

SA_DIMM_VREF# SB_DIMM_VREF#

CFG0

CFG3 CFG4

CFG7

AP25 AL25 AL24 AL22 AJ33

AM30 AM28

AP31 AL32 AL30

AM31

AN29

AM32

AK32 AK31 AK28 AJ28 AN30 AN32 AJ32 AJ29 AJ30 AK30

AG9 M27

L28 J17

H17 G25 G17

E31

E30

H16

B19

A19

A20

B20

U9 T9

AC9 AB9

J29

J28

RSVD#AP25 RSVD#AL25 RSVD#AL24 RSVD#AL22 RSVD#AJ33 RSVD#AG9 RSVD#M27 RSVD#L28 SA_DIMM_VREF# SB_DIMM_VREF# RSVD#G25 RSVD#G17 RSVD#E31 RSVD#E30

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 RSVD_TP#H16

RSVD#B19 RSVD#A19

RSVD#A20 RSVD#B20

RSVD#U9 RSVD#T9

RSVD#AC9 RSVD#AB9

RSVD#J29 RSVD#J28

ARRAN

ARRANDALE

RESERVED

5 OF 9

RSVD#AJ13 RSVD#AJ12

RSVD#AH25 RSVD#AK26

RSVD#AL26

RSVD_NCTF#AR2

RSVD#AJ26 RSVD#AJ27

RSVD#AL28 RSVD#AL29 RSVD#AP30 RSVD#AP32 RSVD#AL27 RSVD#AT31 RSVD#AT32 RSVD#AP33 RSVD#AR33

RSVD#AR32

RSVD_TP#E15 RSVD_TP#F15

RSVD#D15

RSVD#C15 RSVD#AJ15 RSVD#AH15

RSVD_TP#AA5 RSVD_TP#AA4

RSVD_TP#R8 RSVD_TP#AD3 RSVD_TP#AD2

RSVD_TP#AA2 RSVD_TP#AA1

RSVD_TP#R9 RSVD_TP#AG7 RSVD_TP#AE3

RSVD_TP#V4

RSVD_TP#V5

RSVD_TP#N2 RSVD_TP#AD5 RSVD_TP#AD7

RSVD_TP#W3 RSVD_TP#W2

RSVD_TP#N3 RSVD_TP#AE5 RSVD_TP#AD9

AJ13 AJ12

AH25 AK26

AL26 AR2

AJ26 AJ27

AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33

AR32

E15 F15 A2

KEY

D15 C15 AJ15 AH15

AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3

V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9

AP34

VSS

VSS (AP34) can be left NC is CRB implementation; EDS/DG recommendation to GND.

A A

5

4

3

2

DV15 CP UMA second

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

CPU (RESERVED)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

11 99Friday, April 08, 2011

1

A00

SSID = CPU

5

4

CPU1F

3

6 OF 9

2

1

+VCC_CORE

PROCESSOR CORE POWER

+VCC_CORE

D D

C C

B B

C1206

12

Do Not Stuff

DY

C1212

12

SC10U6D3V5MX-3GP

C1225

12

Do Not Stuff

DY

C1235

12

SC10U6D3V5MX-3GP

DY

C1243

12

SC10U6D3V5MX-3GP

C1208

C1209

C1207

12

SC22U6D3V5MX-2GP

C1213

12

SC4D7U6D3V5KX-3GP

DY

C1226

12

Do Not Stuff

C1236

12

Do Not Stuff

DY

C1209

12

SC10U6D3V5MX-3GP

C1214

C1215

12

Do Not Stuff

DY

C1227

C1228

12

SC4D7U6D3V5KX-3GP

DY

C1237

C1238

12

Do Not Stuff

For POWERFor POWER

C1210

C1220

12

SC10U6D3V5MX-3GP

DY

12

Do Not Stuff

12

Do Not Stuff

DY

12

SC10U6D3V5MX-3GP

DY

C1223

C1229

C1239

SC22U6D3V5MX-2GP

Do Not Stuff

C1224

12

Do Not Stuff

SC10U6D3V5MX-3GP

DY

C1230

C1231

12

SC4D7U6D3V5KX-3GP

Do Not Stuff

12

Do Not Stuff

DY

C1240

Do Not Stuff

DY

C1241

12

Do Not Stuff

DY

48A

C1232

12

Do Not Stuff

C1242

12

SC10U6D3V5MX-3GP

AG35 AG34 AG33 AG32 AG31 AG30 AG29 AG28 AG27 AG26

AF35 AF34 AF33 AF32 AF31 AF30 AF29 AF28 AF27

AF26 AD35 AD34 AD33 AD32 AD31 AD30 AD29 AD28 AD27 AD26 AC35 AC34 AC33 AC32 AC31 AC30 AC29 AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

Y35

VCC

Y34

VCC

Y33

VCC

Y32

VCC

Y31

VCC

Y30

VCC

Y29

VCC

Y28

VCC

Y27

VCC

Y26

VCC

V35

VCC

V34

VCC

V33

VCC

V32

VCC

V31

VCC

V30

VCC

V29

VCC

V28

VCC

V27

VCC

V26

VCC

U35

VCC

U34

VCC

U33

VCC

U32

VCC

U31

VCC

U30

VCC

U29

VCC

U28

VCC

U27

VCC

U26

VCC

R35

VCC

R34

VCC

R33

VCC

R32

VCC

R31

VCC

R30

VCC

R29

VCC

R28

VCC

R27

VCC

R26

VCC

P35

VCC

P34

VCC

P33

VCC

P32

VCC

P31

VCC

P30

VCC

P29

VCC

P28

VCC

P27

VCC

P26

VCC

ARRANDALE

CPU CORE SUPPLY

1.1V RAIL POWER

PROC_DPRSLPVR

CPU VIDS

SENSE LINES

VTT_SELECT

VCC_SENSE

VSS_SENSE_VTT

POWER

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0 VTT0

PSI#

VID0 VID1 VID2 VID3 VID4 VID5 VID6

ISENSE

VSS_SENSE

VTT_SENSE

AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11

AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15

AN33

H_VID0

AK35

H_VID1

AK33

H_VID2

AK34

H_VID3

AL35

H_VID4

AL33

H_VID5

AM33

H_VID6

AM35 AM34

G15

AN35

AJ34 AJ35

B15

TP_VSS_SENSE_VTT

A15

12

C1216

C1201

SC10U6D3V5MX-3GP

C1233

H_VTTVID1

1

H_VTTVID1 = Low, 1.1V H_VTTVID1 = High, 1.05V

1

12

C1202

SC10U6D3V5MX-3GP

12

SC4D7U6D3V5KX-3GP

PSI# 47

H_VID[6..0] 47

PM_DPRSLPVR 47

TP1201Do Not StuffTP1201Do Not Stuff

IMVP_IMON 47

VTT_SENSE 49

TP1202Do Not StuffTP1202Do Not Stuff

12

C1211

12

SC10U6D3V5MX-3GP

C1234

C1217

SC10U6D3V5MX-3GP

12

C1218

C1221

Do Not Stuff

DY

+VCC_CORE

12

C1203

SC4D7U6D3V5KX-3GP

12

DY

12

R1201

R1201 100R2F-L1-GP-U

100R2F-L1-GP-U

12

R1204

R1204 100R2F-L1-GP-U

100R2F-L1-GP-U

12

Do Not Stuff

DY

12

C1222

Do Not Stuff

+1.05V_CPU

C1219

Do Not Stuff

DY

+1.05V_CPU

12

+1.05V_CPU

12

C1204

12

C1205

SC10U6D3V5MX-3GP

Do Not Stuff

DY

The decoupling capacitors, filter recommendations and sense resistors on the CPU/PCH Rails are specific to the CRB Implementation. Customers need to follow the recommendations in the Calpella Platform Design Guide.

Please note that the VTT Rail Values are Auburndale VTT=1.05V; Clarksfield VTT=1.1V

VCC_SENSE 47 VSS_SENSE 47

A A

ARRAN

5

4

3

2

DV15 CP UMA second

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

CPU (VCC_CORE)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

12 99W ednesday, April 13, 2011

1

A00

5

SSID = CPU

+CPU_GF X_CORE

22A

D D

C C

B B

C1327

C1325

12

SC10U6D3V5MX-3GP

+1.05V_C PU

C1328

C1323

C1326

12

DY

12

Do Not Stuff

DY

12

Do Not Stuff

SC10U6D3V5MX-3GP

18A

C1324

12

DY

Do Not Stuff

12

DY

C1308

C1313

Do Not Stuff

4

DY

C1309

12

DY

12

SC10U6D3V5MX-3GP

12

C1314

3

7 OF 9

VAXG_SENSE

VSSAXG_SENSE

LINES

GFX_VR_EN

GFX_DPRSLPVR

DDR3 - 1.5V RAILS

1.1V1.8V

7 OF 9

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3 GFX_VID4 GFX_VID5 GFX_VID6

GFX_IMON

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

VTT1 VTT1 VTT1

AR22 AT22

AM22 AP22 AN22 AP23 AM23 AP24 AN24

R1305 4K7R2J-2 -GPR1305 4K 7R2J-2-GP

AR25 AT25

GFX_IMON_ C

AM24

AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1

P10 N10 L10 K10

J22 J20 J18 H21 H20 H19

L26 L27 M26

12

C1301

SC10U6D 3V5MX-3GP

SC4D7U6 D3V5KX-3GP

1 2

R1304 Do Not Stuff

SC1U6D3V2KX-GP

C1310

C1316

C1318

CPU1G

AT21

VAXG1

AT19

C1312

12

Do Not Stuff

DY

12

C1315

Do Not Stuff

DY

AT18

AT16 AR21 AR19 AR18 AR16 AP21 AP19 AP18 AP16 AN21 AN19 AN18 AN16 AM21 AM19 AM18 AM16

AL21

AL19

AL18

AL16 AK21 AK19 AK18 AK16

AJ21

AJ19

AJ18

AJ16 AH21 AH19 AH18 AH16

J24 J23 H25

K26 J27 J26 J25

H27 G28 G27 G26

F26 E26 E25

VAXG2 VAXG3 VAXG4 VAXG5 VAXG6 VAXG7 VAXG8 VAXG9 VAXG10 VAXG11 VAXG12 VAXG13 VAXG14 VAXG15 VAXG16 VAXG17 VAXG18 VAXG19 VAXG20 VAXG21 VAXG22 VAXG23 VAXG24 VAXG25 VAXG26 VAXG27 VAXG28 VAXG29 VAXG30 VAXG31 VAXG32 VAXG33 VAXG34 VAXG35 VAXG36

VTT1 VTT1 VTT1

VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1 VTT1

ARRAN

SENSE

ARRANDALE

GRAPHICS

GRAPHICS VIDs

POWER

FDI PEG & DMI

2

+1.5V_CP U

12

DY

+1.5V_SU S

VCC_AXG _SENSE 53 VSS_AXG _SENSE 53

12

DY

12

C1302

C1303

SC1U6D3V2KX-GP

12

DY

12

C1319

SC1U6D3V2KX-GP

C1376

C1376 Do Not Stuff

Do Not Stuff

GFX_VID0 53 GFX_VID1 53 GFX_VID2 53 GFX_VID3 53 GFX_VID4 53 GFX_VID5 53 GFX_VID6 53

12

C1304

C1305

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

DY

C1311

C1311 SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

C1317

C1317 Do Not Stuff

Do Not Stuff

12

C1321

C1320

SC2D2U6D3V3KX-GP

SC10U6D3V5MX-3GP

1

+1.5V_CP U

12

DY

+1.5V_SU S

C1377

C1377 Do Not Stuff

Do Not Stuff

+1.5V_CP U

12

DY

+1.5V_SU S

C1378

C1378 Do Not Stuff

Do Not Stuff

+1.5V_CP U

+1.5V_SU S

425302_425302_Calpella_S3PowerReduction_WhitePape

Revision 0.7

GFX_VR_ EN 53 GFX_DPR SLPVR 53 GFX_IMON 53

+1.5V_CP U

3A

12

Do Not Stuff

+1.05V_C PU

C1306

SC10U6D3V5MX-3GP

C1307

12

SC10U6D3V5MX-3GP

TC1301

DY

Do Not Stuff

Please note that the VTT Rail Values are: Auburndale VTT=1.05V

Clarksfield VTT=1.1V

+1.05V_C PU

+1.8V_RU N

12

C1322

Do Not Stuff

DY

1.35A

12

DY

C1379

C1379 Do Not Stuff

Do Not Stuff

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)

Size Document N umber Rev

Date: Sheet of

CPU (VCC_GFXCORE)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

13 99W ednesday, April 13, 2011

1

A00

5

4

3

2

1

SSID = CPU

8 OF 9

CPU1H

AT20

VSS

AT17

VSS

AR31

VSS

AR28

VSS

AR26

VSS

AR24

VSS

D D

C C

B B

AR23 AR20 AR17 AR15 AR12

AR9 AR6

AR3 AP20 AP17 AP13 AP10

AP7

AP4

AP2 AN34 AN31 AN23 AN20 AN17

AM29 AM27 AM25 AM20 AM17 AM14 AM11

AM8 AM5

AM2 AL34 AL31 AL23 AL20 AL17 AL12

AK29 AK27 AK25 AK20 AK17

AJ31

AJ23

AJ20

AJ17

AJ14

AJ11

AH35 AH34 AH33 AH32 AH31 AH30 AH29 AH28 AH27 AH26 AH20 AH17 AH13

AH9 AH6 AH3

AG10

AF8 AF4 AF2

AE35

AL9 AL6 AL3

AJ8 AJ5 AJ2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

ARRANDALE

8 OF 9

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30

K27

H35 H32 H28 H26 H24 H22 H18 H15 H13 H11

G34 G31 G20

F30 F27 F25 F22 F19 F16 E35 E32 E29 E24 E21 E18 E13 E11

D33 D30 D26

C34 C32 C29 C28 C24 C22 C20 C19 C16 B31 B25 B21 B18 B17 B13 B11

A29 A27 A23

CPU1I

VSS

K9

VSS

K6

VSS

K3

VSS

J32

VSS

J30

VSS

J21

VSS

J19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H8

VSS

H5

VSS

H2

VSS VSS VSS VSS

G9

VSS

G6

VSS

G3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

E8

VSS

E5

VSS

E2

VSS VSS VSS VSS

D9

VSS

D6

VSS

D3

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B8

VSS

B6

VSS

B4

VSS VSS VSS VSS

A9

VSS

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

NCTF TEST PIN:

A35,AT1,AT35,B1,A3,A33,A34,AP1,AP35,

VSS

AR1,AR35,AT2,AT3,AT33,AT34,B35,C1,C35

ARRANDALE

9 OF 9

VSS_NCTF#AR34

VSS_NCTF#B34

VSS_NCTF#B2

VSS_NCTF#B1

VSS_NCTF#A35

VSS_NCTF#AT1

VSS_NCTF#AT35 RSVD_NCTF#AT33 RSVD_NCTF#AT34 RSVD_NCTF#AP35 RSVD_NCTF#AR35

RSVD_NCTF#AT3 RSVD_NCTF#AR1 RSVD_NCTF#AP1 RSVD_NCTF#AT2

RSVD_NCTF#C1

RSVD_NCTF#A3 RSVD_NCTF#C35 RSVD_NCTF#B35 RSVD_NCTF#A34 RSVD_NCTF#A33

AR34 B34 B2

B1 A35 AT1 AT35 AT33 AT34 AP35 AR35 AT3 AR1 AP1 AT2 C1 A3 C35 B35 A34 A33

TP_MCP_ VSS_NCTF1 TP_MCP_ VSS_NCTF2 TP_MCP_ VSS_NCTF3 TP_MCP_ VSS_NCTF4

TP1401TP1401

1

TP1402TP1402

1

TP1406TP1406

1

TP1405TP1405

1

ARRAN

A A

5

4

3

ARRAN

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

1

A00

14 99Friday, April 08, 201 1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

15 99Friday, April 08, 201 1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

16 99Friday, April 08, 201 1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

17 99Friday, April 08, 201 1

A00

5

SSID = MEMORY

D D

M_A_BS210

M_A_BS010 M_A_BS110

M_A_DQ[63..0]10

C C

B B

+V_DDR_RE F

Place these caps close to VTT1 and VTT2.

C1817

SCD1U10V2KX- 5GP

12

C1818

DY

Do Not Stuff

+0.75V_DDR_VT T

12

C1820

C1821

C1822

DY

Do Not Stuff

SC1U6D3V2KX-GP

12

C1826

C1826 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

M_ODT010 M_ODT110

+V_DDR_RE F

DDR3_DR AMRST#9,19

12

C1823

DY

Do Not Stuff

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

4

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 106-GP

62.10017.X31

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

M_A_DM[7..0] 10

M_A_DQS#[7..0] 1 0

M_A_DQS[7..0] 10

+1.5V_SUS

M_A_A[15..0] 10

M_A_RAS# 10 M_A_WE# 10 M_A_CAS# 10

M_CS#0 10 M_CS#1 10

M_CKE0 10 M_CKE1 10

M_CLK_DDR0 10 M_CLK_DDR#0 10

M_CLK_DDR1 10 M_CLK_DDR#1 10

PCH_SMBDAT A 7,19,23,64 PCH_SMBCLK 7,19,23,64

PM_EXTTS#0 9

SCD1U10V2KX- 5GP

C1801

SA0_DIM0

SA1_DIM0

+3.3V_RUN

12

C1802

DY

Do Not Stuff

+1.5V_SUS

Layout Note: Place these Caps near SO-DIMMA.

SODIMM A DECOUPLING

C1804

TC1801

Do Not Stuff

12

DY

12

C1805

Do Not Stuff

12

DY

SCD1U10V2KX-5GP

C1813

C1814

12

C1815

S3 Power Reduction

PS_S3CNTRL42,50

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

M_A_DM0

11

DM0

M_A_DM1

28

DM1

M_A_DM2

46

DM2

M_A_DM3

63

DM3

M_A_DM4

136

DM4

M_A_DM5

153

DM5

M_A_DM6

170

DM6

M_A_DM7

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM0

197

SA0

SA1_DIM0

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

C1806

SC10U6D3V5MX-3GP

12

SCD1U10V2KX-5GP

C1816

12

+0.75V_DDR_VT T

G

4

1

2 3

Do Not Stuff

DY

SCD1U10V2KX-5GP

12

S3

DISCHARGE_0D75V

D

2

RN1801

RN1801 SRN10KJ-5-G P

SRN10KJ-5-G P

C1807

SC10U6D3V5MX-3GP

12

R1806

R1806 22R2J-2-GP

22R2J-2-GP

Q1801

Q1801 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

S3

S

1

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 0, SA1_DIM0 = 1 SO-DIMMA SPD Address is 0xA4 SO-DIMMA TS Address is 0x34

C1809

C1808

Do Not Stuff

SC10U6D3V5MX-3GP

12

DY

A A

DV15 CP UMA s econd

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM1

Enrico/Caruso 15 CP

1

A00

18 99Wednesd ay, April 13, 2011

A00

5

SSID = MEMORY

D D

C C

+V_DDR_RE F

12

B B

SCD1U10V2KX- 5GP

Place these caps close to VTT1 and VTT2.

DY

C1923

12

C1924

DY

Do Not Stuff

+0.75V_DDR_VT T

C1920

SC1U6D3V2KX-GP

C1920

SC1U6D3V2KX-GP

C1919

Do Not StuffDYC1919

Do Not Stuff

C1921

Do Not StuffDYC1921

Do Not Stuff

12

DY

M_B_BS210

M_B_BS010 M_B_BS110

M_B_DQ[63..0]10

12

C1925

C1925 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

M_ODT210 M_ODT310

+V_DDR_RE F

DDR3_DR AMRST#9,18

C1922

SC1U6D3V2KX-GP

C1922

SC1U6D3V2KX-GP

12

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 43-GP

62.10017.N71

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

3

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

M_B_DM0

11

DM0

M_B_DM1

28

DM1

M_B_DM2

46

DM2

M_B_DM3

63

DM3

M_B_DM4

136

DM4

M_B_DM5

153

DM5

M_B_DM6

170

DM6

M_B_DM7

187

DM7

200

SDA

202

SCL

198

199

SA0_DIM1

197

SA0

SA1_DIM1

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

+1.5V_SUS

M_B_RAS# 10 M_B_WE# 10 M_B_CAS# 10

M_CS#2 10 M_CS#3 10

M_CKE2 10 M_CKE3 10

M_CLK_DDR2 10 M_CLK_DDR#2 10

M_CLK_DDR3 10 M_CLK_DDR#3 10

PCH_SMBDAT A 7,18,23,64 PCH_SMBCLK 7,18,23,64

PM_EXTTS#1 9

SCD1U10V2KX- 5GP

C1901

12

DY

12

C1902

C1902 Do Not Stuff

Do Not Stuff

M_B_DM[7..0] 10

M_B_DQS#[7..0] 1 0

M_B_DQS[7..0] 10

M_B_A[15..0] 10

+3.3V_RUN

+1.5V_SUS

Layout Note: Place these Caps near SO-DIMMB.

SA1_DIM1

2

+3.3V_RUN

12

R1901

R1902

10KR2J-3-GP

SODIMM B DECOUPLING

C1906

C1905

SC10U6D3V5MX-3GP

Do Not Stuff

12

DY

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

C1915

C1916

C1917

12

C1917

12

SCD1U10V2KX-5GP

SA0_DIM1

C1908

12

1

Note: If SA0 DIM1 = 0, SA1_DIM1 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

If SA0 DIM1 = 0, SA1_DIM1 = 1 SO-DIMMA SPD Address is 0xA4 SO-DIMMA TS Address is 0x34

C1909

SC10U6D3V5MX-3GP

12

SC1U6D3V2KX-GP

C1918

C1911

C1912

Do Not Stuff

12

DY

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

A A

5

4

SO-DIMMB is placed farther from the Processor than SO-DIMMA

DV15 CP UMA s econd

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Date: Sheet of

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM2

Enrico/Caruso 15 CP

1

A00

19 99Wednesd ay, April 13, 2011

A00

5

4

3

2

1

SSID = PCH

D D

+3.3V_RU N

4 OF 10

PCH1D

1

23

RN2003

SRN10KJ -5-GP

C C

4

R2003

DY

Do Not Stuff

LCTRL_D ATA LCTRL_C LK

PCH_LCD VDD_EN

12

LDDC_CL K_PCH54 LDDC_DA TA_PCH54

Place near PCH

Impedance:85 ohm

+3.3V_RU N

123

45

RN2002

RN2002 SRN2K2J -4-GP

SRN2K2J -4-GP

678

PCH_CRT _DDCDATA PCH_CRT _DDCCLK

LDDC_CL K_PCH LDDC_DA TA_PCH

12

R2002

R2002 2K37R2F -GP

2K37R2F -GP

PCH_VGA _BLEN37

PCH_LCD VDD_EN54

PCH_LBK LT_CTL54

TP2001Do Not Stuff TP2001Do Not Stuff

PCH_LVD SA_TXC#54 PCH_LVD SA_TXC54

PCH_LVD SA_TX0#54 PCH_LVD SA_TX1#54 PCH_LVD SA_TX2#54

PCH_LVD SA_TX054 PCH_LVD SA_TX154 PCH_LVD SA_TX254

LDDC_CL K_PCH LDDC_DA TA_PCH

LCTRL_C LK LCTRL_D ATA

LVDS_VB G

1

LIBG

Close to ball <600mil

PCH_CRT _BLUE55

PCH_CRT _GREEN55

B B

PCH_CRT _RED55

RN2005

SRN150F -1-GP

4 5

678

123

PCH_CRT _DDCCLK55 PCH_CRT _DDCDATA55

PCH_CRT _HSYNC55 PCH_CRT _VSYNC55

1 2

R2001 1KR2J-1-GPR2001 1KR2J-1-GP

CRT_IREF

PCH1D

T48

L_BKLTEN

T47

L_VDD_EN

Y48

L_BKLTCTL

AB48

L_DDC_CLK

Y45

L_DDC_DATA

AB46

L_CTRL_CLK

V48

L_CTRL_DATA

AP39

LVD_IBG

AP41

LVD_VBG

AT43

LVD_VREFH

AT42

LVD_VREFL

AV53

LVDSA_CLK#

AV51

LVDSA_CLK

BB47

LVDSA_DATA#0

BA52

LVDSA_DATA#1

AY48

LVDSA_DATA#2

AV47

LVDSA_DATA#3

BB48

LVDSA_DATA0

BA50

LVDSA_DATA1

AY49

LVDSA_DATA2

AV48

LVDSA_DATA3

AP48

LVDSB_CLK#

AP47

LVDSB_CLK

AY53

LVDSB_DATA#0

AT49

LVDSB_DATA#1

AU52

LVDSB_DATA#2

AT53

LVDSB_DATA#3

AY51

LVDSB_DATA0

AT48

LVDSB_DATA1

AU50

LVDSB_DATA2

AT51

LVDSB_DATA3

AA52

CRT_BLUE

AB53

CRT_GREEN

AD53

CRT_RED

V51

CRT_DDC_CLK

V53

CRT_DDC_DATA

Y53

CRT_HSYNC

Y51

CRT_VSYNC

AD48

DAC_IREF

AB51

CRT_IRTN

IBEXPEAK-M-G P-NF

LVDS

Digital Display Interface

CRT

4 OF 10

SDVO_TVCLKINN SDVO_TVCLKINP

SDVO_STALLN

SDVO_STALLP

SDVO_INTN SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN DDPB_AUXP

DDPB_HPD

DDPB_0N DDPB_0P DDPB_1N DDPB_1P DDPB_2N DDPB_2P DDPB_3N DDPB_3P

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN DDPC_AUXP

DDPC_HPD

DDPC_0N DDPC_0P DDPC_1N DDPC_1P DDPC_2N DDPC_2P DDPC_3N DDPC_3P

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN DDPD_AUXP

DDPD_HPD

DDPD_0N DDPD_0P DDPD_1N DDPD_1P DDPD_2N DDPD_2P DDPD_3N DDPD_3P

BJ46 BG46

BJ48 BG48

BF45 BH45

T51 T53

BG44 BJ44 AU38

BD42 BC42 BJ42 BG42 BB40 BA40 AW38 BA38

Y49 AB49

BE44 BD44 AV40

BE40 BD40 BF41 BH41 BD38 BC38 BB36 BA36

U50 U52

BC46 BD46 AT38

BJ40 BG40 BJ38 BG38 BF37 BH37 BE36 BD36

HDMI_DATA 2#_C HDMI_DATA 2_C HDMI_DATA 1#_C HDMI_DATA 1_C HDMI_DATA 0#_C HDMI_DATA 0_C HDMI_CLK# _C HDMI_CLK_ C

+3.3V_RU N

4

RN2006

RN2006 SRN2K2J -1-GP

SRN2K2J -1-GP

HDMI

1

2 3

C2001 SCD1U10 V2KX-5GP

1 2

HDMI

C2002 SCD1U10 V2KX-5GP

1 2

HDMI

C2003 SCD1U10 V2KX-5GP

1 2

HDMI

C2004 SCD1U10 V2KX-5GP

1 2

HDMI

C2005 SCD1U10 V2KX-5GP

1 2

HDMI

C2006 SCD1U10 V2KX-5GP

1 2

HDMI

C2007 SCD1U10 V2KX-5GP

1 2

HDMI

C2008 SCD1U10 V2KX-5GP

1 2

HDMI

Close to PCH

Impedance:85 ohm

PCH_HDM I_CLK 57 PCH_HDM I_DATA 57

HDMI_PCH_ DET 57

HDMI_PCH_ DATA2# 57 HDMI_PCH_ DATA2 57 HDMI_PCH_ DATA1# 57 HDMI_PCH_ DATA1 57 HDMI_PCH_ DATA0# 57 HDMI_PCH_ DATA0 57 HDMI_PCH_ CLK# 57 HDMI_PCH_ CLK 57

Impedance:85 ohm

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

PCH (LVDS/CRT/DDI)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

20 99W ednesday, April 13, 2011

1

A00

5

RN2101

INT_PIRQG# INT_PIRQC# INT_PIRQE#

+3.3V_RU N

D D

+3.3V_RU N

C C

PCI_STOP#

PCI_REQ0# INT_PIRQB# INT_PIRQF# PCI_REQ3#

PCH_GPIO1 725

SIO_EXT_S CI#25,37

PCH_GPIO62 5

SIO_EXT_W AKE#25,37

+3.3V_RU N

RN2101

1 2 3 4 5 6

SRN8K2J -2-GP-U

RN2102

1 2 3 4 5 6

SRN8K2J -2-GP-U

PCH_GPIO1 7 SIO_EXT_S CI# PCH_GPIO6 SIO_EXT_W AKE#

10

PCI_REQ2#

9

INT_PIRQD#

8

PCI_SERR#

7

PCI_IRDY#

10

INT_PIRQH#

9

PCI_TRDY#

8

PCI_REQ1#

7

PCI_FRAME #

RN2103

1 2 3 4 5 6

SRN10KJ -L3-GP

+3.3V_RU N

10

INT_PIRQA#

9

PCI_DEVSE L#

8

PCI_PLOCK #

7

PCI_PERR#

+3.3V_RU N

BOOT BIOS Strap

PCI_GNT#1 BOOT BIOS Locat ionPCI_GNT#0

0 0 LPC

0 1 Reserved

01

11

A16 swap overri de Strap/Top-B lock Swap Override j umper

PCI_GNT#3 Low = A16 swap

B B

+3.3V_RU N

override/Top-Bl ock Swap Override e nabled High = Default

R2119

12

DY

Do Not Stuff

R2109

DY

Do Not Stuff

12

PCI

SPI(Default)

PCI_GNT3#

PCLK_FW H70 CLK_PCI_F B23 PCLK_KB C3 7

DY

4

SSID = PCH

+3.3V_RU N

U2101

5

VCC

DY

LPC

12

4

Y

Do Not Stuff

C2101

C2101 Do Not Stuff

Do Not Stuff

12 12 12

PLT_RST #9,35,37,64,70

R2110 Do Not Stuff

R2110 Do Not Stuff R2108 22R2J-2-G PR2108 22R2J-2-G P R2111 22R2J-2-G PR2111 22R2J-2-G P

Do Not Stuff

EC2101

12

DY

EC2103

EC2102

12

DY

GND

R2104

1 2

1

B

PCI_PLTRS T#

2

A

3

TP2116Do Not Stuff TP21 16Do Not Stuff TP2117Do Not Stuff TP21 17Do Not Stuff TP2103Do Not Stuff TP21 03Do Not Stuff

TP2108Do Not Stuff TP21 08Do Not Stuff

TP2115Do Not Stuff TP21 15Do Not Stuff

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

PCI_REQ0# PCI_REQ1# PCI_REQ2# PCI_REQ3#

PCI_GNT0#

1

PCI_GNT1#

1

PCI_GNT2#

1

PCI_GNT3#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

PCIRST#

1

PCI_SERR# PCI_PERR#

PCI_IRDY#

PCI_DEVSE L# PCI_FRAME #

PCI_PLOCK #

PCI_STOP# PCI_TRDY#

PCH_PME #

1

PCI_PLTRS T#

PCLK_FW H_R CLK_PCI_F B_R PCLK_KB C_R

3

5 OF 10

PCH1E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

AD7

E36

AD8

H48

AD9

E40

AD10

C40

AD11

M48

AD12

M45

AD13

F53

AD14

M40

AD15

M43

AD16

J36

AD17

K48

AD18

F40

AD19

C42

AD20

K46

AD21

M51

AD22

J52

AD23

K51

AD24

L34

AD25

F42

AD26

J40

AD27

G46

AD28

F44

AD29

M47

AD30

H36

AD31

J50

C/BE0#

G42

C/BE1#

H47

C/BE2#

G34

C/BE3#

G38

PIRQA#

H51

PIRQB#

B37

PIRQC#

A44

PIRQD#

F51

REQ0#

A46

REQ1#/GPIO50

B45

REQ2#/GPIO52

M53

REQ3#/GPIO54

F48

GNT0#

K45

GNT1#/GPIO51

F36

GNT2#/GPIO53

H53

GNT3#/GPIO55

B41

PIRQE#/GPIO2

K53

PIRQF#/GPIO3

A36

PIRQG#/GPIO4

A48

PIRQH#/GPIO5

K6

PCIRST#

E44

SERR#

E50

PERR#

A42

IRDY#

H44

PAR

F46

DEVSEL#

C46

FRAME#

D49

PLOCK#

D41

STOP#

C48

TRDY#

M7

PME#

D5

PLTRST#

N52

CLKOUT_PCI0

P53

CLKOUT_PCI1

P46

CLKOUT_PCI2

P51

CLKOUT_PCI3

P48

CLKOUT_PCI4

IBEXPEAK-M-G P-NF

PCI

NV_CE#0 NV_CE#1 NV_CE#2 NV_CE#3

NV_DQS0 NV_DQS1

NV_DQ0/NV_IO0 NV_DQ1/NV_IO1 NV_DQ2/NV_IO2 NV_DQ3/NV_IO3 NV_DQ4/NV_IO4 NV_DQ5/NV_IO5 NV_DQ6/NV_IO6 NV_DQ7/NV_IO7 NV_DQ8/NV_IO8

NV_DQ9/NV_IO9 NV_DQ10/NV_IO10 NV_DQ11/NV_IO11

NVRAM

NV_DQ12/NV_IO12 NV_DQ13/NV_IO13 NV_DQ14/NV_IO14 NV_DQ15/NV_IO15

NV_RCOMP

NV_WR#0_RE# NV_WR#1_RE#

NV_WE#_CK0 NV_WE#_CK1

USB

USBP10N USBP10P USBP11N USBP11P USBP12N USBP12P USBP13N USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59 OC1#/GPIO40 OC2#/GPIO41 OC3#/GPIO42 OC4#/GPIO43

OC5#/GPIO9 OC6#/GPIO10 OC7#/GPIO14

5 OF 10

NV_ALE NV_CLE

NV_RB#

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P

2

AY9 BD1 AP15 BD8

AV9 BG8

AP7 AP6 AT6 AT9 BB1 AV6 BB3 BA4 BE4 BB6 BD6 BB7 BC8 BJ8 BJ6 BG6

BD3 AY6

AU2

AV7

AY8 AY5

AV11 BF5

H18 J18 A18 C18 N20 P20 J20 L20 F20 G20 A20 C20 M22 N22 B21 D21 H22 J22 E22 F22 A22 C22 G24 H24 L24 M24 A24 C24

B25

D25

N16 J16 F16 L16 E14 G16 F12 T15

NV_ALE NV_CLE

NV_RCOM P

change WLAN+BT from port 5 to port9

USB_RBIAS _PN

USB_OC# 0_1 USB_OC# 2_3 USB_OC# 4_5 USB_OC# 6_7 USB_OC# 8_9 USB_OC# 10_11 USB_OC# 12_13 SMC_W AKE_SCI#_R

TP2100TP2100 TP2101TP2101

1 1

TP2102TP2102

1

USB_PN1 63 USB_PP1 63 USB_PN2 63 USB_PP2 63 USB_PN3 63 USB_PP3 63

USB_PN9 64 USB_PP9 64 USB_PN1 0 32 USB_PP1 0 32 USB_PN1 1 54 USB_PP1 1 54

1 2

R2106

R2106 22D6R2F -L1-GP

22D6R2F -L1-GP

Danbury Technol ogy: Disabled when L ow. Enable when Hig h.

Pair

X

0

USB1 (Debug Port)

1

USB2

2

USB3

3

X

4

X

5

X

6

X

7

X

8

WLAN + Bluetooth

9

CARD READER

10

CAMERA

11

X

12

X

13

USB_OC# 0_1 6 3 USB_OC# 2_3 6 3

1

USB

Device

(Ext I/O BD)

RN2104

A A

+3.3V_AL W

5

4

USB_OC# 0_1 USB_OC# 6_7

SMC_W AKE_SCI#_R

3

RN2104

1 2 3 4 5 6

SRN10KJ -L3-GP

10

USB_OC# 12_13

9

USB_OC# 8_9

8

USB_OC# 4_5USB_OC# 2_3

7

USB_OC# 10_11

+3.3V_AL W

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

PCH (PCI/USB/NVRAM)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

21 99W ednesday, April 13, 2011

1

A00

5

4

3

2

1

SSID = PCH

3 OF 10

PCH1C

DMI_CTX_P RXN08 DMI_CTX_P RXN18 DMI_CTX_P RXN28 DMI_CTX_P RXN38

DMI_CTX_P RXP08

R2204

1 2

49D9R2F -GP

R2207

1 2

R2213

1 2

LAN_RST #1 PCH_RSM RST# PM_PW ROK

DMI_CTX_P RXP18 DMI_CTX_P RXP28 DMI_CTX_P RXP38

DMI_PTX_C RXN08 DMI_PTX_C RXN18 DMI_PTX_C RXN28 DMI_PTX_C RXN38

DMI_PTX_C RXP08 DMI_PTX_C RXP18 DMI_PTX_C RXP28 DMI_PTX_C RXP38

R2210

1 2

Do Not Stuff

R2218

1 2

Do Not Stuff

R2216

1 2

Do Not Stuff

DMI_IRCOMP_R

+3.3V_RU N

12

RN2202

1 2 3 4 5

SRN10KJ -6-GP

R2205

R2205 1KR2J-1-G P

1KR2J-1-G P

PM_PW RGD

LAN_RST #1

PM_RSMR ST#_R

SUS_PW R_ACK

PM_PW RBTN#_R

8 7 6

AC_PRESENT

D D

+1.05V_P CH

C C

B B

XDP_DBR ESET#9

PM_PW ROK37

PM_DRAM _PWRGD9

PCH_RSM RST#37 PM_SLP_ S4# 37,50

SUS_PW R_DN_ACK25,37

PM_PW RBTN#_R9

PM_PW RBTN#3 7

AC_PRES ENT_EC25,37

Do Not Stuff

PM_DRAM _PWRGD

Do Not Stuff

PM_BATL OW#_R

PM_RI#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK/GPIO30

P5

PWRBTN#

P7

ACPRESENT/GPIO31

A6

BATLOW#/GPIO72

F14

RI#

IBEXPEAK-M-G P-NF

DMI

System Power Management

3 OF 10

FDI_RXN0 FDI_RXN1 FDI_RXN2 FDI_RXN3 FDI_RXN4 FDI_RXN5 FDI_RXN6 FDI_RXN7

FDI_RXP0 FDI_RXP1 FDI_RXP2 FDI_RXP3 FDI_RXP4 FDI_RXP5 FDI_RXP6 FDI_RXP7

FDI_INT

FDI_FSYNC0

FDI

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

WAKE#

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

SLP_LAN#/GPIO29

BA18 BH17 BD16 BJ16 BA16 BE14 BA14 BC12

BB18 BF17 BC16 BG16 AW16 BD14 BB14 BD12

BJ14

BF13

BH13

BJ12

BG14

PCH_W AKE#_R

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

FDI_TXN0 FDI_TXN1 FDI_TXN2 FDI_TXN3 FDI_TXN4 FDI_TXN5 FDI_TXN6 FDI_TXN7

FDI_TXP0 FDI_TXP1 FDI_TXP2 FDI_TXP3 FDI_TXP4 FDI_TXP5 FDI_TXP6 FDI_TXP7

FDI_FSYNC0

FDI_FSYNC1

FDI_LSYNC0

FDI_LSYNC1

PM_CLKR UN#

PM_SUS_ STAT#

PCH_SUS CLK

PCH_SLP _S5#

PM_SLP_ S4#_R

PM_SLP_ S3#_R

SIO_SLP_M #_R

PM_SLP_ DSW#

H_PM_SYNC

PM_SLP_ LAN#

R2203

1 2

Do Not Stuff

1

FDI_TXN0 8 FDI_TXN1 8 FDI_TXN2 8 FDI_TXN3 8 FDI_TXN4 8 FDI_TXN5 8 FDI_TXN6 8 FDI_TXN7 8

FDI_TXP0 8 FDI_TXP1 8 FDI_TXP2 8 FDI_TXP3 8 FDI_TXP4 8 FDI_TXP5 8 FDI_TXP6 8 FDI_TXP7 8

FDI_FSYNC0 8

FDI_FSYNC1 8

FDI_LSYNC0 8

FDI_LSYNC1 8

TP2201Do Not StuffT P2201Do Not Stuff

TP2202

TP2202 Do Not Stuff

Do Not Stuff

1 2

Do Not Stuff

1 2

Do Not Stuff

TP2203

TP2203 Do Not Stuff

Do Not Stuff

TP2204

TP2204 Do Not Stuff

Do Not Stuff

TP2205

TP2205 Do Not Stuff

Do Not Stuff

FDI_INT 8

PCH_W AKE# 37

PM_CLKR UN# 25,37

R2211

R2212

R2220 10R2J-2-G PR2 220 10R2J-2-G P

12

PM_SLP_ S3# 37,42,50,5 1

H_PM_SYNC 9

PCH_SUS CLK_KBC 37

PCH_GPIO1 123

SIO_EXT_S MI#25,37

PM_BATL OW#_R PCH_GPIO1 1 PM_RI# SIO_EXT_S MI#

PCH_W AKE#

RN2201

1 2 3 4 5

SRN10KJ -6-GP

R2202

1 2

1KR2J-1-G P

+3.3V_AL W

8 7 6

PM_CLKR UN#

12

R2215

A A

Option to " Disable " clkrun. Pulling it down will keep the clks running.

5

Do Not Stuff

R2215

DV15 CP U MA second

DY

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

PCH (DM I/FDI/PM)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

22 99W ednesday, April 13, 2011

1

A00

5

4

3

2

1

SSID = PCH

2 OF 10

PCH1B

BG30

PERN1

BJ30

PERP1

BF29

PETN1

BH29

PETP1

D D

C C

PCIECLKRQ{0,3,4,5,6,7}# should have a 10K pull-up to +3.3V_ALW. PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN

B B

A A

PCIE_RXN264

PCIE_RXP264 PCIE_TXN264 PCIE_TXP26 4

PCIE_RXN335

PCIE_RXP335 PCIE_TXN335 PCIE_TXP33 5

C2305 SCD1U10V2KX-5 GPC2305 SC D1U10V2KX-5GP C2306 SCD1U10V2KX-5 GPC2306 SC D1U10V2KX-5GP

C2303 SCD1U10V2KX-5 GPC2303 SC D1U10V2KX-5GP C2304 SCD1U10V2KX-5 GPC2304 SC D1U10V2KX-5GP

PCIE_CLK_ RQ0#25

CLK_PCIE_ MINI1#64 CLK_PCIE_ MINI164

MINI1_CLK_RE Q#64

CLK_PCIE_ LAN#35 CLK_PCIE_ LAN35

PCIE_CLK_ LAN_REQ#35

+3.3V_RU N

5

PCIE_CLKR Q4#25

PEG_B_C LKRQ#25

1 2 1 2

1 2 3

SRN10KJ -5-GP

PCIE_C_TX N2 PCIE_C_TX P2

PCIE_C_TX N3 PCIE_C_TX P3

PCIE_CLK_ RQ0#

PCIE_CLK_ RQ1#

MINI1_CLK_RE Q#

PCIE_CLK_ LAN_REQ#

PCIE_CLKR Q4#

PCIE_CLK_ RQ5#

PEG_B_C LKRQ#

4

RN2308

AW30

BA30 BC30 BD30

AU30

AT30 AU32 AV32

BA32 BB32 BD32 BE32

BF33 BH33 BG32

BJ32

BA34

AW34

BC34 BD34

AT34 AU34 AU36 AV36

BG34

BJ34 BG36

BJ36

AK48 AK47

AM43 AM45

AM47 AM48

AH42 AH41

AM51 AM53

M9

AJ50

AJ52

AK53 AK51

P13

PCIE_CLK_ RQ1# MINI1_CLK_RE Q#

PERN2 PERP2

WLAN

PETN2 PETP2

PERN3 PERP3

LAN

PETN3 PETP3

PERN4 PERP4 PETN4 PETP4

PERN5 PERP5 PETN5 PETP5

PERN6 PERP6 PETN6 PETP6

PERN7 PERP7 PETN7 PETP7

PERN8 PERP8 PETN8 PETP8

CLKOUT_PCIE0N CLKOUT_PCIE0P

P9

PCIECLKRQ0#/GPIO73

CLKOUT_PCIE1N CLKOUT_PCIE1P

U4

PCIECLKRQ1#/GPIO18

CLKOUT_PCIE2N CLKOUT_PCIE2P

N4

PCIECLKRQ2#/GPIO20

CLKOUT_PCIE3N CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

CLKOUT_PCIE4N CLKOUT_PCIE4P

PCIECLKRQ4#/GPIO26

CLKOUT_PCIE5N CLKOUT_PCIE5P

H6

PCIECLKRQ5#/GPIO44

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

PEG_B_CLKRQ#/GPIO56

IBEXPEAK-M-G P-NF

4

SMBus

PCI-E*

Link

Controller

PEG_A_CLKRQ#/GPIO47

PEG

CLKOUT_DP_N/CLKOUT_BCLK1_N CLKOUT_DP_P/CLKOUT_BCLK1_P

From CLK BUFFER

CLKIN_SATA_N/CKSSCD_N CLKIN_SATA_P/CKSSCD_P

Clock Flex

PCH_GPIO2 82 5

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64

CLKOUTFLEX1/GPIO65

CLKOUTFLEX2/GPIO66

CLKOUTFLEX3/GPIO67

2 OF 10

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1ALERT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_PEG_A_N CLKOUT_PEG_A_P

CLKOUT_DMI_N CLKOUT_DMI_P

CLKIN_DMI_N CLKIN_DMI_P

CLKIN_BCLK_N CLKIN_BCLK_P

CLKIN_DOT_96N CLKIN_DOT_96P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

PCH_GPIO1 1

B9

PCH_SMB _CLK

H14

PCH_SMB _DATA

C8

TPM_ID1

J14

SML0_CL K

C6

SML0_DA TA

G8

LPD_SPI_INTR #

M14

KBC_SCL 1

E10

KBC_SDA 1

G12

CL_CLK

T13

CL_DATA

T11

CL_RST#

T9

PEG_CLK REQ#

H1

AD43 AD45

CLK_EXP _N

AN4

CLK_EXP _P

AN2

AT1 AT3

CLKIN_DMI#

AW24

CLKIN_DMI

BA24

CLK_CPU _BCLK#

AP3

CLK_CPU _BCLK

AP1

DREFCLK #

F18

DREFCLK

E18

CLK_PCIE_ SATA#

AH13

CLK_PCIE_ SATA

AH12

CLK_PCH _14M

P41

CLK_PCI_F B

J42

XTAL25_ IN

AH51

XTAL25_ OUT

AH53

XCLK_RC OMP

AF38

CLK_PCH _GPIO64

T45

P43

T42

CLK48_G PIO

N50

PCH_GPIO2 8 LPD_SPI_INTR #

+3.3V_AL W

PCIE_CLK_ LAN_REQ#

3

PCH_GPIO1 1 22

1

TP2301Do Not StuffT P2301Do Not Stuff

1

TP2302Do Not StuffT P2302Do Not Stuff

1

TP2303Do Not StuffT P2303Do Not Stuff

R2306 90D9R2F -1-GPR2306 9 0D9R2F-1-GP

1 2

TP2304Do Not StuffT P2304Do Not Stuff

1

R2307 33R2J-2-G PR2307 33R2J-2-G P

1 2 3 4 5 6

R2312 10KR2J-3 -GPR2312 10KR2J-3 -GP

RN2310

SRN10KJ -L3-GP

1 2

12

SML0_CL K 9

SML0_DA TA 9

KBC_SCL 1 37

KBC_SDA 1 37

PEG_CLK REQ# 25

CLK_EXP _N 9 CLK_EXP _P 9

CLKIN_DMI# 7 CLKIN_DMI 7

CLK_CPU _BCLK# 7 CLK_CPU _BCLK 7

DREFCLK # 7 DREFCLK 7

CLK_PCIE_ SATA# 7 CLK_PCIE_ SATA 7

CLK_PCH _14M 7

CLK_PCI_F B 21

12

EC2301

EC2301 Do Not Stuff

Do Not Stuff

DY

10

PCH_GPIO1 2

9

TPM_ID1

8

PCIE_CLK_ RQ5#

7

+3.3V_AL W

+1.05V_P CH

CLK_48M _CARD 32

+3.3V_AL W

PCH_GPIO1 2 25

2

123

45

678

KBC_SDA 1 SML0_CLK

KBC_SCL 1 SML0_D ATA

+3.3V_RU N

RN2303

2 3 1

SRN2K2J -1-GP

PCH_SMB _DATA

PCH_SMB _CLK

6

5

DMN66D0 LDW-7-GP

XTAL25_ IN

R2308

1M1R2J-G P

XTAL25_ OUT

1st:82.30020.D41 2nd:82.30020.G71 3rd:82.30020.G61

DV15 CP U MA second

Title

Size Document N umber Rev

Date: Sheet of

RN2301

RN2301 SRN2K2J -4-GP

SRN2K2J -4-GP

4

Q2301

1

2

34

R2311 Do Not Stuff

No_HDMI

41

HDMI

1 2

PCH (PCI-E/SMBUS/CLOCK/CL)

Enrico/Caruso 15 CP

2 3

+3.3V_AL W+3.3V_AL W

1

23

RN2302

RN2302 SRN2K2J -1-GP

SRN2K2J -1-GP

4

PCH_SMB _CLK

PCH_SMB _DATA

PCH_SMB DATA 7,18,19,64

PCH_SMB CLK 7,18,19,64

12

C2308

12

HDMI

SC15P50 V2JN-2-GP

X2301

X2301 XTAL-25M HZ-155-GP

XTAL-25M HZ-155-GP

82.30020.D41

C2307

12

HDMI

SC15P50 V2JN-2-GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

23 99W ednesday, April 13, 2011

1

A00

5

4

3

2

1

+RTC_CE LL

D D

R2401

1 2

10MR2J-L -GP

X2401

C2402

SC15P50V2JN-2-GP

C2402

SC15P50V2JN-2-GP

C C

+3.3V_RU N

1 4

12

X-32D768 KHZ-67-GP

82.30001.A81

1st:82.30001.A81 2nd:82.30001.691 3rd:82.30001.861

NO REBOOT STRAP

DY

ACZ_SPK R

1 2

R2410 Do Not Stuff

32

PCH_RTC X1

PCH_RTC X2

C2403

SC15P50V2JN-2-GP

C2403

SC15P50V2JN-2-GP

12

No Reboot Strap R23

HDA_SPKR

+RTC_CE LL

PCH_AZ_ CODEC_BITCLK30

PCH_AZ_ CODEC_SYNC30

Low = Default High = No Reboot

R2421

20KR2J-L 2-GP

1 2

SC1U10V 3KX-3GP

1 2

R2420

20KR2J-L 2-GP

12

DY

C2404

EC2402

Do Not StuffDYEC2402

Do Not Stuff

12

DY

21

12

C2401

C2401 SC1U10V 3KX-3GP

SC1U10V 3KX-3GP

EC2401

Do Not StuffDYEC2401

Do Not Stuff

G2401

G2401 Do Not Stuff

Do Not Stuff

PCH_AZ_ CODEC_RST#30

PCH_SDIN_ CODEC30

PCH_SDO UT_CODEC30

+RTC_CE LL

ACZ_SPK R30

For EMI

EC2403 Do Not Stuff

1 2

DY

PCH_SPI_C LK6 2

B B

1 2

R2411 10KR2J-3 -GPR2411 10KR2J-3 -GP

CLK_SAT A_OE#

CLK_SAT A_OE# 25

PCH_SPI_C S0#62

PCH_SPI_D O62

PCH_SPI_D I62

PCH_SPI_C LK

PCH_SPI_C S0#

PCH_SPI_D O

PCH_SPI_D I

R2413 Do Not StuffR2413 Do Not Stuff

R2414 Do Not StuffR2414 Do Not Stuff

R2415 Do Not StuffR2415 Do Not Stuff

INTVRMEN- Integrated SUS

1.1V VRM Enable High - Enable internal VRs

1 2

R2406 1MR2J-1-G PR2406 1MR2J-1-G P

1 2

R2404 330KR2F -L-GPR2404 330KR2F -L-GP

1 2

R2417 33R2J-2-G PR2417 33R2J-2-G P

1 2

R2418 33R2J-2-G PR2418 33R2J-2-G P

1 2

R2416 33R2J-2-G PR2416 33R2J-2-G P

1 2

R2419 33R2J-2-G PR2419 33R2J-2-G P

ME_UNLO CK#37

TP2404Do Not Stuff TP2404Do Not Stuff

TP2405Do Not Stuff TP2405Do Not Stuff

TP2406Do Not Stuff TP2406Do Not Stuff

TP2407Do Not Stuff TP2407Do Not Stuff

TP2408Do Not Stuff TP2408Do Not Stuff

1 2

1

PCH_RTC X1 PCH_RTC X2

PCH_RTC RST#

SRTCRST #

SM_INTRUD ER#

PCH_INTVR MEN

ACZ_BIT_C LK

ACZ_SYNC_ R

ACZ_SPK R

ACZ_RST #_R

ACZ_SDA TAOUT_R

PCH_JTA G_TCK

PCH_JTA G_TMS

PCH_JTA G_TDI

PCH_JTA G_TDO

PCH_JTA G_RST#

SPI_CLK_R

SPI_CS#0_ R

SPI_MOSI_R

SSID = PCH

PCH1A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN#/GPIO33

J30

HDA_DOCK_RST#/GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IBEXPEAK-M-G P-NF

RTCIHDA

SPI JTAG

FWH4/LFRAME#

LDRQ1#/GPIO23

LPC

HDD

ODD

SATA

SATAICOMPO

SATAICOMPI

SATA0GP/GPIO21

SATA1GP/GPIO19

1 OF 10

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

SERIRQ

SATA0RXN SATA0RXP SATA0TXN SATA0TXP

SATA1RXN SATA1RXP SATA1TXN SATA1TXP

SATA2RXN SATA2RXP SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATALED#

LPC_LAD 2_PCH LPC_LAD 3_PCH

LPC_LAD 1_PCH

LPC_LAD 0_PCH

D33

LPC_LAD 1_PCH

B33

LPC_LAD 2_PCH

C32

LPC_LAD 3_PCH

A32

LPC_LFR AME#_PCH

C34

A34 F34

AB9

AK7 AK6 AK11 AK9

AH6 AH5 AH9 AH8

AF11 AF9 AF7 AF6

AH3 AH1 AF3 AF1

AD9 AD8 AD6 AD5

AD3 AD1 AB3 AB1

AF16

AF15

T3

Y9

V1

Close to PCH

1 2 3 4 5

1 2

R2426 33R2J-2-G PR2426 33R2J-2-G P

INT_SERIRQ 25,37

SATAICOMP

SATA_LE D# 66

SATA_DE T#0_R

SATA_DE T#1_R

RN2401

RN2401 SRN33J-7 -GP

SRN33J-7 -GP

R2412

1 2

37D4R2F -GP

SATA_DE T#0_R 25

SATA_DE T#1_R 25

8 7 6

LPC_LAD 2 LPC_LAD 3 LPC_LAD 0LPC_LAD 0_PCH LPC_LAD 1

LPC_LAD 2 37,7 0 LPC_LAD 3 37,7 0 LPC_LAD 0 37,7 0 LPC_LAD 1 37,7 0

+1.05V_P CH

LPC_LFR AME# 37,70

SATA_RX N0_C 59

SATA_RX P0_C 59 SATA_TX N0_C 59 SATA_TX P0_C 59

SATA_RX N1_C 59

SATA_RX P1_C 59 SATA_TX N1_C 59 SATA_TX P1_C 59

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (SPI/RTC/LPC/SATA/IHDA)

Size Document N umber Rev

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

24 99W ednesday, April 13, 2011

1

A00

5

4

3

2

1

+3.3V_RU N

D D

+3.3V_AL W

C C

+3.3V_RU N

+3.3V_AL W

12

B B

RN2508

1

8

2

7

3

6

45

SRN10KJ -6-GP

SIO_EXT_W AKE#21,37

Do Not Stuff

1 2

DY

R2514 Do Not Stuff

1 2

R2519 1KR2J-1-G PR251 9 1KR2J-1 -GP

RN2509

1 2 3

SRN100K J-6-GP

R2520

R2520 100KR2J -1-GP

100KR2J -1-GP

RTC_BAT _DET#

4

PCH_GPIO3 9 STP_PCI#

PCH_GPIO2 2 PCH_GPIO3 7 PCH_GPIO3 6

C2501

DY

PCH_GPIO2 4

HOST_AL TERT#1

INT_SERIRQ 2 4,37

12

Do Not Stuff

PCH_TEM P_ALERT#37

C2502

SIO_EXT_S MI#2 2,37

SSID = PCH

SIO_EXT_S CI#21,37

PCH_GPIO621

PCH_GPIO1 223

PCH_GPIO1 721

12

DY

DDR_RST _GATE9

Do Not Stuff

PCH_GPIO2 823

CLK_SAT A_OE#24

R2518

1 2

Do Not Stuff

RTC_BAT _DET#62

TP2510Do Not Stuff TP2510Do Not Stuff

TP2511Do Not Stuff TP2511Do Not Stuff

TP2512Do Not Stuff TP2512Do Not Stuff

TP2509Do Not Stuff TP2509Do Not Stuff

TP2507

S_GPIO

SIO_EXT_S CI#

PCH_GPIO6

SIO_EXT_W AKE#

SIO_EXT_S MI#

PCH_GPIO1 2

HOST_AL TERT#1

DGPU_HO LD_RST#

PCH_GPIO1 7

PCH_GPIO2 2

PCH_GPIO2 4

PCH_GPIO2 7

1

PCH_GPIO2 8

STP_PCI#

CLK_SAT A_OE#

PCH_GPIO3 6

PCH_GPIO3 7

PCH_GPIO3 8

PCH_GPIO3 9

PCH_GPIO4 5

DDR_RST _GATE

PCH_GPIO4 8

PCH_TEM P_ALERT#_C

RTC_BAT _DET#

PCH_NCT F_1

1

PCH_NCT F_2

1

PCH_NCT F_3

1

PCH_NCT F_4

1

PCH1F

Y3

BMBUSY#/GPIO0

C38

TACH1/GPIO1

D37

TACH2/GPIO6

J32

TACH3/GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL/GPIO12

T7

GPIO15

AA2

SATA4GP/GPIO16

F38

TACH0/GPIO17

Y7

SCLOCK/GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI#/GPIO34

V6

SATACLKREQ#/GPIO35

AB7

SATA2GP/GPIO36

AB13

SATA3GP/GPIO37

V3

SLOAD/GPIO38

P3

SDATAOUT0/GPIO39

H3

PCIECLKRQ6#/GPIO45

F1

PCIECLKRQ7#/GPIO46

AB6

SDATAOUT1/GPIO48

AA4

SATA5GP/GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IBEXPEAK-M-G P-NF

MISC

CLKOUT_BCLK0_N/CLKOUT_PCIE8N

CLKOUT_BCLK0_P/CLKOUT_PCIE8P

GPIO

CPU

NCTF

RSVD

6 OF 10

CLKOUT_PCIE6N

CLKOUT_PCIE6P

CLKOUT_PCIE7N

CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP18

TP19

NC_1

NC_2

NC_3

NC_4

NC_5

INIT3_3V#

TP24

TP1

TP2

TP3

TP4

TP5

TP6

TP7

TP8

TP9

AH45 AH46

AF48 AF47

U2

AM3

AM1

BG10

T1

BE10

BD10

BA22

AW22

BB22

AY45

AY46

AV43

AV45

AF13

M18

N18

AJ24

AK41

AK42

M32

N32

M30

N30

H12

AA23

AB45

AB38

AB42

AB41

T39

P6

C10

PCH_THE RMTRIP_R

R2516

Do Not Stuff

R2517

10KR2J-3 -GP

INIT3_3V#

SIO_RCIN# 37

+3.3V_AL W

12

No_HDMI

12

HDMI

1

BCLK_CP U_N 9

BCLK_CP U_P 9

H_PECI 9

H_PW RGD 9,42

Placed Within 2 " from PCH

PCH_GPIO4 5

TP2506Do Not StuffT P2506Do Not Stuff

+1.05V_P CH

SIO_A20GA TE# 37

RN2505

1

4

2 3

SRN56J-4 -GP

1 2

Do Not Stuff

HDMI function detect.

PCH_GPIO45 0 1

HDMI

Function

YES NO

DY

R2521

H_THERM TRIP#_CPU 9

H_THERM TRIP# 37,42

RN2507

A A

PM_CLKR UN#22,3 7

SATA_DE T#1_R24 SATA_DE T#0_R24

+3.3V_RU N

PM_CLKR UN# PCH_GPIO3 8 S_GPIO SATA_DE T#1_R SATA_DE T#0_R

5

RN2507

1 2 3 4 5 6

SRN10KJ -L3-GP

10 9

DGPU_HO LD_RST#

8

PCH_TEM P_ALERT#_C

7

PCH_GPIO4 8

4

+3.3V_RU N

PEG_B_C LKRQ#23 PCIE_CLK_ RQ0#23 PCIE_CLKR Q4#23

AC_PRES ENT_EC22,37

PEG_B_C LKRQ# PCIE_CLK_ RQ0# PCIE_CLKR Q4# AC_PRES ENT_EC

+3.3V_AL W

RN2506

1 2 3 4 5 6

SRN10KJ -L3-GP

3

10

DDR_RST _GATE

9 8

PEG_CLK REQ#

7

SUS_PW R_DN_ACK

+3.3V_AL W

PEG_CLK REQ# 23 SUS_PW R_DN_ACK 22,37

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

PCH (GPIO/CPU)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

25 99W ednesday, April 13, 2011

1

A00

5

SSID = PCH

4

3

2

1

+1.05V_P CH

1.43A

12

C2602

C2601

Do Not Stuff

D D

+1.05V_P CH

Do Not Stuff

TP2601Do Not Stuff TP26 01Do Not Stuff

C2601

+1.05V_P CH

1

DY

C2602 Do Not Stuff

Do Not Stuff

DY

+1.05VS_ VCCAPLL_EXP

3.23A

12

C2608

SC10U6D3V5MX-3GP

C C

+1.05V_P CH

+1.8V_RU N

Do Not Stuff

B B

DY

12

C2609

TP2602

12

C2610

Do Not Stuff

SC1U6D3V2KX-GP

SCD1U10 V2KX-5GP

Do Not Stuff

VCCAFDIPL L

1

12

DY

C2614

R2606

C2611

Do Not Stuff

12

C2612

SC1U6D3V2KX-GP

+3.3V_RU N

VCCAFDI_V RM

PCH1G

AB24

VCCCORE

AB26

VCCCORE

AB28

VCCCORE

AD26

VCCCORE

AD28

VCCCORE

AF26

VCCCORE

AF28

VCCCORE

AF30

VCCCORE

AF31

VCCCORE

AH26

VCCCORE

AH28

VCCCORE

AH30

VCCCORE

AH31

VCCCORE

AJ30

VCCCORE

AJ31

VCCCORE

AK24

VCCIO

BJ24

VCCAPLLEXP

AN20

VCCIO

AN22

VCCIO

AN23

VCCIO

AN24

VCCIO

AN26

VCCIO

AN28

VCCIO

BJ26

VCCIO

BJ28

VCCIO

AT26

VCCIO

AT28

VCCIO

AU26

VCCIO

AU28

VCCIO

AV26

VCCIO

AV28

VCCIO

AW26

VCCIO

AW28

VCCIO

BA26

VCCIO

BA28

VCCIO

BB26

VCCIO

BB28

VCCIO

BC26

VCCIO

BC28

VCCIO

BD26

VCCIO

BD28

VCCIO

BE26

VCCIO

BE28

VCCIO

BG26

VCCIO

BG28

VCCIO

BH27

VCCIO

AN30

VCCIO

AN31

VCCIO

AN35

VCC3_3

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO

IBEXPEAK-M-G P-NF

POWER

VCC CORE

DMI

PCI E*

NAND / SPI

FDI

CRTLVDS

HVCMOS

7 OF 10

VCCADAC

VSSA_DAC

VCCALVDS

VSSA_LVDS

VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS VCCTX_LVDS

VCC3_3

VCCVRM

VCCDMI

VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND VCCPNAND

VCCME3_3 VCCME3_3 VCCME3_3 VCCME3_3

AE50

AE52

AF53

AF51

+3VS_VC CA_LVD +3.3V_RU N

AH38

AH39

AP43 AP45 AT46 AT45

AB34

AB35

AD35

AT24

AT16

AU16

AM16 AK16 AK20 AK19 AK15 AK13 AM12 AM13 AM15

AM8 AM9 AP11 AP9

12

C2607

C2607 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

55mA

12

C2623

C2623 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

PCH_VCC ME3_3

12

C2622

C2622 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

75mA

12

C2603

C2605

SCD01U16V2KX-3GP

+1.8VS_V CCTX_LVDS

SCD01U16V2KX-3GP

12

C2618

305mA

156mA

+1.05VS_ VCC_DMI

C2613

C2613 SC1U10V 3KX-3GP

SC1U10V 3KX-3GP

5.5mA

31mA

SCD1U10V2KX-5GP

Do Not Stuff

SCD01U16V2KX-3GP

12

C2619

+1.8V_RU N

Do Not Stuff

12

C2606

C2616

1 2

+3.3V_RU N

1 2

Do Not Stuff

R2605

1 2

DY

L2602 Do Not Stuff

SC10U6D3V5MX-3GP

1 2

Do Not Stuff

12

C2617

DY

Do Not Stuff

+V_NVRA M_VCCQ

+3.3V_RU N

12

Do Not Stuff

1 2

Do Not Stuff

DY

R2601

R2603

R2611

+3.3V_RU N+3.3V_CRT_LDO

1.1mA

+1.8V_RU N

66mA

+1.05V_P CH

+1.8V_RU N

12

R2607

R2607 Do Not Stuff

Do Not Stuff

+5V_RUN +3.3V_CR T_LDO

12

C2621

SC1U10V 2KX-1GP

+3.3V_RU N

12

R2608

DY

Do Not Stuff

3.3V CRT LDO

U2601

VIN3VOUT

2

GND

1

EN

NC#5

RT9198-3 3PBG-GP

74.09198.07F

4

5

12

C2620

C2620 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

1st:74.09198.07F 2nd:74.09091.H3F

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

PCH (POWER1)

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

26 99Friday, April 08, 201 1

1

A00

5

4

3

2

1

10 OF 10

POWER

PCH1J

TP2515Do Not Stuff TP2515Do Not Stuff

D D

+1.05V_P CH

1.2A

C2704

12

C2711

C2711 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

12

C2714

C2714 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

C2718

87mA

C2726

SCD1U10V2KX-5GP

C2726

SCD1U10V2KX-5GP

12

C2704

12

SC10U6D 3V5MX-3GP

+1.05V_P CH

C C

B B

L2702

1 2

IND-10UH-21 8-GP

Do Not Stuff

L2703

1 2

IND-10UH-21 8-GP

Do Not Stuff

Isolate the Pow er supply for Pin AF34,AH34,A F32 These Pins can be sho rted together. NOT With AH35,A J35

+1.05VS_ VCCA_A_DPL

12

C2734

DY

+1.05VS_ VCCA_B_DPL

12

C2735

DY

+1.05V_P CH

SC1U6D3 V2KX-GP

+3.3V_AL W

+1.05V_P CH

1mA

C2728

SC4D7U1 0V5KX-4GP

A A

+RTC_CE LL

12

DY

88mA 88mA

+1.05V_P CH

C2719

SCD1U10 V2KX-5GP

SCD1U10V2KX-5GP

C2723

12

+3.3V_RU N

12

C2705

Do Not Stuff

+VCCSST

SCD1U10V2KX-5GP

1.1mA

5

VCCACLK

1

SCD1U10V2KX-5GP

C2708

Do Not Stuff

SCD1U10V2KX-5GP

C2713

12

+1.8V_RU N

+1.05VS_ VCCA_A_DPL

+1.05VS_ VCCA_B_DPL

12

SCD1U10 V2KX-5GP

+1.05VAL W_INT_VCCSU S

C2724

12

SCD1U10V2KX-5GP

C2727

SCD1U10V2KX-5GP

12

C2729

C2732

SCD1U10V2KX-5GP

4

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

DCPSUSB YP

C2707

12

SC1U6D3V2KX-GP

12

C2710

DY

+VCCRTC EXT

C2720

12

C2730

12

C2733

AP51

VCCACLK

AP53

VCCACLK

AF23

VCCLAN

AF24

VCCLAN

Y20

DCPSUSBYP

AD38

VCCME

AD39

VCCME

AD41

VCCME

AF43

VCCME

AF41

VCCME

AF42

VCCME

V39

VCCME

V41

VCCME

V42

VCCME

Y39

VCCME

Y41

VCCME

Y42

VCCME

V9

DCPRTC

AU24

VCCVRM

BB51

VCCADPLLA

BB53

VCCADPLLA

BD51

VCCADPLLB

BD53

VCCADPLLB

AH23

VCCIO

AJ35

VCCIO

AH35

VCCIO

AF34

12

VCCIO

AH34

VCCIO

AF32

VCCIO

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3

U19

VCCSUS3_3

U20

VCCSUS3_3

U22

VCCSUS3_3

V15

VCC3_3

V16

VCC3_3

Y16

VCC3_3

AT18

V_CPU_IO

AU18

V_CPU_IO

A12

VCCRTC

IBEXPEAK-M-G P-NF

POWER

USB

Clock and Miscellaneous

PCI/GPIO/LPC

SATA

CPU

RTC PCI/GPIO/LPC

10 OF 10

V24

VCCIO

V26

VCCIO

Y24

VCCIO

Y26

VCCIO

V5REF

VCC3_3

VCCIO

VCCVRM

VCCIO

VCCIO VCCIO VCCIO VCCIO

VCCME VCCME VCCME VCCME

V28 U28 U26 U24 P28 P26 N28 N26 M28 M26 L28 L26 J28 J26 H28 H26 G28 G26 F28 F26 E28 E26 C28 C26 B27 A28 A26

U23

V23

F24

K49

J38

L38

M36

N36

P36

U35

AD13

AK3 AK1

AH22

AT20

AH19

AD20

AF22

AD19 AF20 AF19 AH20

AB19 AB20 AB22 AD22

AA34 Y34 Y35 AA35

L30

8.8mA

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3

V5REF_SUS

VCCSATAPLL VCCSATAPLL

VCCSUSHDA

HDA

3

12

C2706

C2706 Do Not Stuff

Do Not Stuff

DY

12

C2703

C2703 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

+3.3V_AL W +3.3V_ALW

12

C2709

C2709 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

+1.05V_P CH

TP2514 D o Not StuffTP2 514 Do Not Stuff

1

R2707

1 2

1mA

+3.3V_RU N

+1.05V_P CH

2

+5VALW _PCH_VCC5R EFSUS

+5VS_PC H_VCC5REF

12

C2716

C2716 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

VCCSATA PLL

+1.8V_RU N

+3VS_+1 .5VS_HDA_IO +3.3V_AL W

Do Not Stuff

12

C2731

C2731 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

+1.05V_P CH

+3.3V_AL W

21

D2701

D2701 CH751H-4 0PT-GP

CH751H-4 0PT-GP

1 2

R2701 100R2F-L 1-GP-UR2701 100R2F-L 1-GP-U

12

C2712

C2712 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

12

C2717

C2717 SCD1U10 V2KX-5GP

SCD1U10 V2KX-5GP

12

+5V_ALW

12

C2715

C2715 SC1U10V 2KX-1GP

SC1U10V 2KX-1GP

+3.3V_RU N

+1.05V_P CH

C2725

C2725 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

DV15 CP U MA second

Title

PCH (POWER2)

Size Document N umber Rev

Date: Sheet of

PCH (POWER2)

Enrico/Caruso 15 CP

SSID = PCH

+3.3V_RU N

21

D2702

D2702 CH751H-4 0PT-GP

CH751H-4 0PT-GP

1 2

R2702 100R2F-L 1-GP-UR2702 100R2F-L 1-GP-U

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

27 99Friday, April 08, 201 1

1

+5V_RUN

A00

5

4

3

2

1

SSID = PCH

D D

C C

B B

A A

5

PCH1H

AB16

AA19 AA20 AA22

AM19

AA24 AA26 AA28 AA30 AA31 AA32 AB11 AB15 AB23 AB30 AB31 AB32 AB39 AB43 AB47

AB5 AB8

AC2 AC52 AD11 AD12 AD16 AD23 AD30 AD31 AD32 AD34 AU22 AD42 AD46 AD49

AD7

AE2

AE4

AF12

Y13 AH49

AU4

AF35 AP13 AN34

AF45

AF46

AF49

AF5 AF8

AG2 AG52 AH11 AH15 AH16 AH24 AH32 AV18 AH43 AH47

AH7

AJ19

AJ2 AJ20 AJ22 AJ23 AJ26 AJ28 AJ32 AJ34

AT5

AJ4

AK12

AM41

AN19 AK26 AK22 AK23 AK28

IBEXPEAK-M-G P-NF

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

8 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AK30 AK31 AK32 AK34 AK35 AK38 AK43 AK46 AK49 AK5 AK8 AL2 AL52 AM11 BB44 AD24 AM20 AM22 AM24 AM26 AM28 BA42 AM30 AM31 AM32 AM34 AM35 AM38 AM39 AM42 AU20 AM46 AV22 AM49 AM7 AA50 BB10 AN32 AN50 AN52 AP12 AP42 AP46 AP49 AP5 AP8 AR2 AR52 AT11 BA12 AH48 AT32 AT36 AT41 AT47 AT7 AV12 AV16 AV20 AV24 AV30 AV34 AV38 AV42 AV46 AV49 AV5 AV8 AW14 AW18 AW2 BF9 AW32 AW36 AW40 AW52 AY11 AY43 AY47

PCH1I

AY7

VSS

B11

VSS

B15

VSS

B19

VSS

B23

VSS

B31

VSS

B35

VSS

B39

VSS

B43

VSS

B47

VSS

B7

VSS

BG12

VSS

BB12

VSS

BB16

VSS

BB20

VSS

BB24

VSS

BB30

VSS

BB34

VSS

BB38

VSS

BB42

VSS

BB49

VSS

BB5

VSS

BC10

VSS

BC14

VSS

BC18

VSS

BC2

VSS

BC22

VSS

BC32

VSS

BC36

VSS

BC40

VSS

BC44

VSS

BC52

VSS

BH9

VSS

BD48

VSS

BD49

VSS

BD5

VSS

BE12

VSS

BE16

VSS

BE20

VSS

BE24

VSS

BE30

VSS

BE34

VSS

BE38

VSS

BE42

VSS

BE46

VSS

BE48

VSS

BE50

VSS

BE6

VSS

BE8

VSS

BF3

VSS

BF49

VSS

BF51

VSS

BG18

VSS

BG24

VSS

BG4

VSS

BG50

VSS

BH11

VSS

BH15

VSS

BH19

VSS

BH23

VSS

BH31

VSS

BH35

VSS

BH39

VSS

BH43

VSS

BH47

VSS

BH7

VSS

C12

VSS

C50

VSS

D51

VSS

E12

VSS

E16

VSS

E20

VSS

E24

VSS

E30

VSS

E34

VSS

E38

VSS

E42

VSS

E46

VSS

E48

VSS

E6

VSS

E8

VSS

F49

VSS

F5

VSS

G10

VSS

G14

VSS

G18

VSS

G2

VSS

G22

VSS

G32

VSS

G36

VSS

G40

VSS

G44

VSS

G52

VSS

AF39

VSS

H16

VSS

H20

VSS

H30

VSS

H34

VSS

H38

VSS

H42

VSS

IBEXPEAK-M-G P-NF

3

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

H49 H5 J24 K11 K43 K47 K7 L14 L18 L2 L22 L32 L36 L40 L52 M12 M16 M20 N38 M34 M38 M42 M46 M49 M5 M8 N24 P11 AD15 P22 P30 P32 P34 P42 P45 P47 R2 R52 T12 T41 T46 T49 T5 T8 U30 U31 U32 U34 P38 V11 P16 V19 V20 V22 V30 V31 V32 V34 V35 V38 V43 V45 V46 V47 V49 V5 V7 V8 W2 W52 Y11 Y12 Y15 Y19 Y23 Y28 Y30 Y31 Y32 Y38 Y43 Y46 P49 Y5 Y6 Y8 P24 T43 AD51 AT8 AD47 Y47 AT12 AM6 AT13 AM5 AK45 AK39 AV14

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

2

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

PCH (VSS)

1

A00

28 99Friday, April 08, 201 1

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

DV15 CP U MA second

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

29 99Friday, April 08, 201 1

A00

SSID = AUDIO

5

4

3

2

1

R3003

Do Not Stuff

R3004

Do Not Stuff

+5V_RUN+5V_RUN+AVDD

12

AUD_SPK_L-

34

35

36

37

38

39

40

PVSS

EAPD

PVDD

PORTD_-L

PORTD_-R

PORTD_+L

PORTD_+R

SENSE_A11SENSE_B12PORTF_L13PORTF_R14PORTC_L15PORTC_R16VREFFILT17CAP218VREFOUT_A19VREFOUT_C

AUD_SENSE_B

AUD_SENSE_A

AUD_PC_BEEP

AUD_VREFFLT

AUD_INT_MIC_R_L

C3030

SC1U10V3KX-3GP

120KR2J-L-GP

SB_SPKR_RAUD_PC_BEEP

KBC_BEEP_R

470KR2J-2-GP

AUD_SPK_L+

+AVDD+PVDD

AUD_VREG

31

32

33

PVDD

AVDD2

VREG/+2_5V

20

AUD_CAP2

AUD_VREFOUT_A

AUD_VREFOUT_C

12

R3009

1 2

R3010

D D

AMP_MUTE#37

AUD_SPK_R+60

AMP_MUTE#

For EMI

Close to codec

PCH_SDIN_CODEC

12

EC3001

EC3001 Do Not Stuff

Do Not Stuff

DY

+3.3V_RUN

Close to codec

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

C3003

C3004

12

1 2

C C

+3.3V_RUN

12

R3008

R3008 10KR2J-3-GP

10KR2J-3-GP

C3023

SC1U10V2KX-1GP

AMP_MUTE#

AUD_VREFOUT_C

PCH_AZ_CODEC_BITCLK_1

12

C3007

DY

Do Not Stuff

2010/07/15 EMI request

R3007

1 2

DY

Do Not Stuff

PCH_AZ_CODEC_BITCLK

PCH_SDOUT_CODEC24

PCH_AZ_CODEC_BITCLK24

PCH_SDIN_CODEC24

SCD1U10V2KX-5GP

PCH_AZ_CODEC_SYNC24

C3002

PCH_AZ_CODEC_RST#24

1 2

R3001

1 2

33R2J-2-GP

AUD_PC_BEEP Trace width>15 mils

AUD_DVDDCORE

12

C3001

C3001 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

PCH_SDOUT_CODEC PCH_AZ_CODEC_BITCLK

PCH_SDIN_CODEC_C0

PCH_AZ_CODEC_SYNC PCH_AZ_CODEC_RST#

AUD_PC_BEEP

C3012 SCD1U10V2KX-5GPC3012 SCD1U10V2KX-5GP

C3013 SCD1U10V2KX-5GPC3013 SCD1U10V2KX-5GP

1 2 3 4 5 6 7 8 9

10

12

U3001

DVDD_LV DMIC_CLK/GPIO_1 DMIC_0/GPIO_2 SDATA_OUT BITCLK SDATA_IN DVDD SYNC RESET# PCBEEP

41

THERMAL_PAD

92HD87B1A5NDGXTBX8-GP

AUD_SPK_L- 60AUD_SPK_R-60

AUD_SPK_L+ 60

30

CAP+

29

CAP-

28

V-

27

AVSS2

26

PORTB_R

25

PORTB_L

24

AVSS2

23

PORTA_R

22

PORTA_L

21

AVDD1

71.92H87.A03

R3011

INT_MIC_L_R

1 2

2K2R2J-2-GP

AUD_VREFOUT_A 60

INT_MIC_L_R 60

From SB

ACZ_SPKR 24

KBC_BEEP 37

From EC

1 2

PUMP_CAPP

PUMP_CAPN AUD_V_B

AUD_HP1_JACK_R AUD_HP1_JACK_L

MIC_IN_R MIC_IN_L

+AVDD

SC1U10V2KX-1GP

SCD1U10V2KX-5GP

C3005

Do Not Stuff

Do Not Stuff C3006

C3006

12

C3014

C3014 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

R3006 60D4R2F-GPR3006 60D4R2F-GP

1 2

R3005 60D4R2F-GPR3005 60D4R2F-GP

1 2

C3022 SC1U10V3KX-3GPC3022 SC1U10V3KX-3GP C3021 SC1U10V3KX-3GPC3021 SC1U10V3KX-3GP

Put C3021 and C3022 close to codec

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

R3002

12

12 12

SC10U6D3V5MX-3GP

SC4D7U6D3V3KX-GP

C3018

C3017

12

SCD1U10V2KX-5GP

C3008

1 2

AUD_HP1_JACK_R2 60

AUD_HP1_JACK_L2 60

AUD_EXT_MIC_R 60 AUD_EXT_MIC_L 60

SC10U6D3V5MX-3GP

C3015

12

C3009

12

SC1U6D3V2KX-GP

C3016

+PVDD

SC10U6D3V5MX-3GP

SC1U10V2KX-1GP

C3010

12

Close to codec

B B

R3014

12

Do Not Stuff

R3017

12

Do Not Stuff

2

Do Not Stuff

R3020

Do Not Stuff

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Audio Codec 92HD87B1

Custom

Enrico/Caruso 15 CP

Taipei Hsien 221, Taiwan, R.O.C.

30 99Wednesday, April 13, 2011

1

30 99Wednesday, April 13, 2011

A00

Azalia I/F EMI

PCH_SDOUT_CODEC

A A

5

DY

12

PCH_AZ_CODEC_SDOUT1

12

R3012

R3012 Do Not Stuff

Do Not Stuff

C3020

C3020 Do Not Stuff

Do Not Stuff

AUD_SENSE_A

4

+AVDD

12

R3015

R3015 2K49R2F-GP

2K49R2F-GP

12

C3019

C3019 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

Close to Pin13

R3013

1 2

20KR2F-L-GP

R3019

39K2R2F-L-GP

12

AUD_HP1_JD# 60

EXT_MIC_JD# 60

+AVDD

12

R3016

R3016 2K49R2F-GP

2K49R2F-GP

AUD_SENSE_B

12

R3018

R3018 20KR2F-L-GP

20KR2F-L-GP

Close to Pin14

3