Vitek VT-4002 Circuit diagrams

5

DSPVCC33

+

EC10

R35
1R

47uF/16V

23

Q2

R36 220R

1

8550

+

EC13
47uF/16V

SL_MOT+
SL_MOT­HOMESW

SP_MOT+
SP_MOT-

LOAD­LOAD+

DSPVCC33

R40

+

1R

23

Q3

1

8550

2.1V

HOMESW

D D

CN201 is used for Sany o/Samsung/Sony OPUs

C49

CN2

24Pin OPU connector

24

GND-LD

23

DVD-LD

22

NC

21

HFM

20

MD

19

CD-LD

18

VR-DVD

17

VR-CD

16

NC

15

E

OPU5V

14

VCC

VC1

13

VC(VREF)

12

GND/PD

11

F

10

B

9

A

8

RF

7

CD/DVD_SW

6

D

5

C

TACT-

4

T-

TACT+

3

T+

FACT+

2

F+

FACT-

1

F-

25

26

25

26

C C

B B

For 5888

6P 2.0: SLED & SPINDLE Con

1nF

C52

0.1uF

SLED+
SLED­HOMESW
GND
SP+
SP-

LOAD­LOAD+
OUTSW
GND
INSW

5p 2.0: TRAY_Con

C50
1nF

DVDLD
OPU_HFM
CDLD

VR_DVD
VR_CD

L2 10uH
R46 33R

C53

0.1uF

CN4

1
2
3
4
5
6

CN5

1
2
3
4
5

EC11
47uF/16V

R44 220R

C51
1nF

R45
0R [300R]

RF_E
VC
RF_F

RF_B
RF_A
RF

RF_D
RF_C

R63

4.7K

C58
1nF

LD_DVD

LD_CD

DSPVCC33

R64

4.7K

C59
1nF

+

EC12
100uF/16V

R65

4.7K

C60
1nF

RFA5V

HOMESW
IN_OUT_SW
INSW

RFA5V

R47

3.3K

CD_DVD

HOMESW
IN_OUT_SW
INSW

CD_DVD

PDIC Control:
DVD=LOW
CD=HIGH

4

FOCUS_S

SLED_S

CLOSE

3

OPU 313A HD62 502W
R39: 100R 0R 91R
R41: 100R 0R 91R

R39
100R

VR_CD
VR_DVD

R41
100R

U5
AM5888s

FOCUS_S

SLED_S

OPEN

OPEN

R58 0R

CLOSE

R61 0R

M5V

+

C57

EC14

0.1uF

220uF/10V

3V3_DRV

R52 0R

1V8_FB

3V3_FB

R57 0R

LOAD­LOAD+
SL_MOT+
SL_MOT­FACT­FACT+

3V3_DRV

3V3_FB

(value) is for AM5888s

1

VINFC

2

CFCERR1(TRB_1)

3

CFCERR2(REGO2)

4

R68

1.2K 1%

1

R66
2K 1%

5
6
7

8

9
10
11
12
13
14

M5V

VINSL+
VINSL-(REGO1)
VOSL(FWD)
VNFFC(REV)

VCC
PVCC1(LOAD-)
PGND(LOAD+)
VOSL-(VOSL+)
VOSL+(VOSL-)
VOFC­VOFC+

12

23

CTKERR1(TRB_2)

GND

GND1

29

30

D4
1N4001

D5
1N4001

1 2

Q4
8550

+

EC15
220uF/10V

NC

1.25V 1.25V

CTKERR2(NC)

PREGND

VNFTK(NC)

PGND(VCC2)

1V8_DRV

1V8_FB

PVCC2

VOLD+

VOTK+

STBY

BIAS

VINTK

VINLD

VOLD-

VOTK-

R37
0R

[NM]

R42
NM

[91R]

28
27
26
25
24
23
22

21
20
19
18
17
16
15

23

Q5

1

8550

R67
430R 1%

R69
1K 1%

MD_DVD
MD_CD

R38
0R

[NM]

R43
NM

[91R]

VC2

1V8_DRV

TRACK_S

R55 0R

SPDL_S

M5V

SP_MOT+

S8050/S8550

2 E

1 B

DSPVCC18DSPVCC33

Q210, 211 must have
enough large pads
for thermal spreading

Close to motor driver.

VC2

TRACK_S

SPDL_S

SP_M-

TACT­TACT+

Q210, Q211 must be
genuine 8550, such
as PHILIPS
PSS8550D, Jiangsu
Changdian S8550.

3 C

DSPVCC33

R48
1K 1%

R50

C54

1K 1%

0.1uF

R54

C56

1K

100pF

DRVSB

R49
33K

C55

0.1uF

2

BEMF

Current Type

SP_M-

SP_MOT-

1

R51
2K

R56
1R

R62
2K

2

1

SPDL_SENS-

D3

BAT54C

SPDL_SENS+

SPDL_SENS-

DSPVCC33

3

SPDL_SENS+

A A

Title

Size Document Number Rev
Custom

5

4

3

2

Date: Sheet

Grand_V962

Front End & Regulator

1

35Thursday, August 03, 2006

of

2.0