Vitek VT-4000new Circuit diagrams

PICK UP
RECORDER LOADER
MONOBOARD(LSI8602+SANYO SERVO)_BLOCK_DIAGRAM
SCART_AUDIO_INPUT1 SCART_AUDIO_INPUT2
RF_IN
RF_OUT
ATAPI_INTERFACE
AUDIO_R+L VIDEO_IN
TUNER
TV_IF TV_MONO
TV_CVBS_OUTPUT
REAR_LINE_AUDIO_INPUT REAR_LINE_AUDIO_INPUT FRONT_LINE_AUDIO_INPUT FRONT_LINE_AUDIO_INPUT
R_Y_IN R_C_IN REAR_CVBS_IN
F_C_IN F_CVBS_IN F_Y_IN Pr/R Y/G_IN Pb/B_IN
AK8569C 0407EFY
AK8583A 0348JBY
MSP3455
TV_CVBS_OUTPUT
DV INPUT
USB_INPUT
BTSC_AINR
BTSC_AINL
SCART_A_IN
SCART_A_IN
CD4052
TPA+ TPA_ TPB+ TPB-
USB_D0-
USB_D0+ USB_OC0 USB_PO0
YC9AHE-E
AIN_R
AIN_L
TVP5146
PHY_LINK
TSB41AB1
LC897491
AUDIO_A/D
PCM1801
VIDEO_A/D_CONVERTER
VI_(D2..D9) VI_VSYNC0 VI_CLK0
PHY_(DATA0..DATA7)
3MGJG
AI_FSYNC AI_D0
AI_MCLK AI_SCLK
PHY_CLK PHY_CTL0 PHY_CTL1 BIO_LREQ RST_PHY BIO_LINK_ON
DATA_INPUT
DMN-8602
MAIN CHIP
DATA_OUTPUT
AO_D0 AO_FSYNC AO_MCLK AO_SCLK
CVBS Y_O C_O Y/G_O Pr/R_O PB/B_O
CLKE RAS# CAS# WE# DQM(0..3) DQS(0..3) CLK(0..1) SDRAM(A15..0) SDRAM(DQ15..0)
PCM1742
AUDIO_D/A
VIDEO_FILTER_AMP
HD(15..00) BA(1..5) E5_ALE E5_OE E5_CS0 /SYS_RST
AUDIO_R+L
VIDEO_IN
AUDIO_OUT_L
AUDIO_OUT_R
CVBS Y_O C_O Y/G_O Pr/R_O PB/B_O
8MX16bit/4BANKS
DDR_SDRAM
FLASH
AUDIO_OUT_L
NJM4558
AUDIO_OUT_R
8MX16bit/4BANKS
TOTAL MEMORY:32MBYTES 4BANKS
16MBIT/AM29LV160
ETHERRTE I/F(ELINK-II)
SOFTWARE DEBUG
SPDIF
DDR_SDRAM
LP2995
VTT(1.25V)
BD7905FS
TOPSWITCH_TOP243
INPUT_PLUS
MAIN_POWER_ON +5V_STBAND BY
-24V
FLASH
16MBIT/AM29LV160
GPIO0
SPI_MOSI
SPI_MISO
SPI_CLK
LED DISPLAY
HD6928_LED_DRIVER
FRONT_PANEL
GPIO2
FRONT_LINE_AUDIO_INPUT FRONT_LINE_AUDIO_INPUT F_CVBS_IN F_Y_IN F_C_IN
DV_INPUT
Title
<Title>
Size Document Number Rev
<Doc> <RevCode>
A3
Date: Sheet
11Thursday, July 21, 2005
of
K660 DVD RECORD CONNECT
TO SCART
1
50
DVD_RECORDER_LOADER
1
CHART
J8
FRONT_INPUT_BOARD
J4
7
AIN_R_F GND_AIN AIN_L_F
4
1
SE_J1
50
1
SE_J5
1394 USB
J5
1
1
USB_PC0
USB_OC0
GND
USB_D0+
USB_D0-
7
GND
VCC
7
7
A+
A-
7
J9
F_Y_IN
F_CVBS
J10
1
GND_VIN
F_C_IN
1
1
CHASSIS_GND
1
J8
B-
B+
GND_PHY_A
GND_PHY_A
J2
mainboard
LSI8602(DECODE)+SANYO(SERVO)
1
E5_GPIOx25
1
JP2
E5_GPIOx24
E5_GPIOx41
E5_GPIOx42
E5_GPIO0
J4
FRONT_KB_board
8
E5_SIO_IRRX
/RST_HOST
GND
8
J1
J7
1
10
1
1
J3
5
1
5
POWER_LED
J1
KB_board
JP1
1
7
GND
GND
12V
+5V STB
PW_C
FAN_C
+22V
1
7
CN1
GND GND
3.3V
3.3V 5V
2.5V
2.5V GND GND NG
+5V GND GND +12V
4
1
CN6
10
POWER_board
1
J8
4
17
CN4
17
1
5
1
CVBS_OUT GND AFT_OUT
J7
TV_TUNER
J9
JP2
AV_BOARD
1
JP1
7
IF_OUT GND TUN_AO
6
VTUN_STB
1
GND +32V +B SDA SCL
6 1
IEC_AUDIO IEC_AUDIO_DG GND_AV AO_LT_OUT VCC_VOUT AO_RT_OUT
6
B G R GND Y C CVBS
1
CN2
5
E5_SPI_CS2
AO-FSYNC
AO-D0
AO-D3
AO-D1
E5-GPIOX5
AO-SCLK
JP2
E5-SPI_CLK
AO-MCLKO
I2C_SCL
JP2
AO_IEC958
AI_FSYNC
I2C-SDA
E5_GPIO5
AI_MCLKO
AI_D0
AI_SCLK
GND
Pr/R-OUT
V33
GND
Y/G_OUT
GND
CVBS-OUT
Rb/B-OUT
GND
Y-OUT
GND
E5_GPIOX2
C-OUT
VI_GPIO_C3
E5_GPIOX1
E5_GPIO4
50
VI_GPIO_C1
VI_GPIO_C2
50
J1
J8
GND
1
+5V STB GND +5V
-12V GND +12V GND +32V
9
LF_IN
1
GND_AV AIN_R_F
3
FRONT_INPUT_BOARD
TO
J6
1
VI_GPIO_C5
VI_GPIO_C6
GND
VI_GPIO_C7
JP7
E5_GPIOX32
VI_GPIO_C8
VI_GPIO_C9
VI_FSS
8
E5_SPI_MOSI
TV_CVBS_IN
Pr/R_IN
R_C_IN
GND
GND
1
8
E5_SPI_MISO
Rb/B_IN
CVBS_IN
Y/G_IN
AO-D2
GND
GND
E5_GPIOX35
R_Y_IN
1
6
1
1
J9
1
J7
6 1
AV_SCART_BOARD
JP8
6
1
JP1
7
1
Title
Size Document Number Rev
A2
Date: Sheet
9
<Title>
<Doc> <RevCode>
J4
11Thursday, July 21, 2005
of
1
+32V
FB3 0805
V+12+5VSTB
J5
1 2
FROM POWER SUPPLY
CON/9/2MM
C112
0.1UF
+5VSTB
3
GND
4
V+5
5
V-12
6 7
V+12
8 9
GND_AV
V12
R61
1 2
1K/0805
+
C113
47UF/25V
Audio Interface
AO_D3 AO_D2 AO_D1
AO_D0
V33
AO_FSYNC
AO_SCLK
1 1
AO_MCLKO
E5_SPI_MOSI E5_SPI_MISO
E5_SPI_CS2 E5_SPI_CLK
MUTE
/RST_AUD
IDC_SDA
IDC_SCL
AI_D0
AI_FSYNC
AI_SCLK
AI_MCLKO
AO_IEC958
TUN_DET
AIN_SEL0 AIN_SEL1
IDC_SDA IDC_SCL
+3.3V
GND
GND_AV
FB4
BK1608HM601-T
FB5 1206 FB6 DIP
FB7 1206 FB8 1206
Q7
13
S9014
2
D3
8.7V/0.5W
1 2
GND_AV
JP4
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
FMN32/1.0mm
FLEXIBLE CABLE To Main Board
C97
0.1UF
VCC_STB1
V33
GND
C98
+
22UF/50V
VCC_STB V12-V12
C103
0.1UF
C114
0.1UF
C117
0.1UF
C106
0.1UF
V8+
C109 100UF/16V
+
C104 220UF/16V
+
C107
0.1UF
+
C105 47UF/25V
RTC is used with NEC FP to reserve time while power off. RTC is not stuffed if Holtek FP be used.
VCC
U2
INT1 XIN XOUT GND RESET
HT1381
C118 3.3UF/16V
1 2
+
C119 0.1UF
GND_AV
343536373840414243
AHVSS
AGNDC
CAPL_M
AHVSUP
SC1_OUT_L SC1_OUT_R
DACM_L DACM_R
DVSS
I2S_DA_IN2
RESETQ
MSP3455G-PMQFP44
VCC_STB1
8
VCC
7
INT
6
SCL
VCC1
SCL SDA
12
+
C126 10UF/16V/short
NC
VREF1
NC
VREF2
NC NC
12
R57
4.7K
C44 22UF/16V
+
R60 1K
D2 RB751
8
IDC_SCL
7
IDC_SDA
6
BTSC
IDC Slave Addr: 0x80/81
USA: MSP3425G EURO: MSP3415G FULL: MSP3455G
V8+
C127
100UF/10V/short
33 32 31 30 29 28 27 26 25 24 23
GND_AV
+
GND_AV
12
12
C135 1000PF
C100
0.1UF
BATTERY3V
D45
E1
3.3V/0.5W
C128 1500PF
C132 0.47uF
C134 0.47uF
C136 1000PF
INT_FP IDC_SCL
IDC_SDA
R58 0
1 2
C129
0.01UF
J6
VCC_STB1
BTSC_AINL
BTSC_AINR
1 2 3 4
+
PH2/2MM
2MM PITCH PH2-TH
C111 47UF/16V
To Front Panel
C99
Y1
DNS-10pF
C124
10UF/16V
U3
1
AVSUP
2
ANA_IN1+
3
ANA_IN-
4
TESTEN
5
XTAL_IN
6
XTAL_OUT
7
TP
8
D_CTR_I/O_1
9
D_CTR_I/O_0 ADR_SEL STANDBYQ
C138
0.01UF
32.768KHZ
2 1
D50 RB751
1 2
D1 RB751
1 2
C110 12.5P
Y2
32.768K
12
+
44
AVSS
MONO_IN
I2C_SCL
I2C_SDA
1213141516171819202122
U1
1
OSCI
2
OSCO
3
BAT
4 5
GND SDA
M41T81
IDC Slave Addr: D0H/D1H
VCC1
1 2 3 4 5
C125
0.1UF
39
ASG1
SC2_IN_L
SC1_IN_L
VREFTOP
SC2_IN_R
SC1_IN_R
I2S_CL
I2S_WS
I2S_DA_OUT
I2S_DA_IN1
TP_CO
DVSUP
C102
C101
0.1UF
+
47UF/16V
GND
To Scart Board
+5VSTB V+5
V+12 IDC_SDA IDC_SCL
From Scart Board
Two D_CTR_IO used to control SCART
Flexible Cable
C120
47UF/16V/short
+5VSTB V+5
V+12 IDC_SDA IDC_SCL
VCC
+
12
FB11
BK1608HM601-T
TV_MONO
BDCOMP
C131 15PF
C133 15PF
C121
100UF/10V
/RST_AUD
+
TV_MONO
BDCOMP
Y3
18.432MHz
IDC_SCL
IDC_SDA
12
GND_AV
CLK_MSP_XIN CLK_MSP_XOUT
C122 1500PF
C130 56PF
/RST_AUD
VCC
VCC_STB1
C123
0.01UF
DNS-10pF
VCC1
12
R59(SHORT) 10K(0805)
12
R62(OPEN) 22K(0805)
VCC_A
100UF/16V/short
C108
C9 12.5P
10 11
DVSUP
+
C137
FB15 FBA04HA450BA
GND_AVGND_TUN
V1.0
日 期
日 期
日 期
A3
10/8/2004
第 页 共 页
27
吴朝阳
TCL AV R&D
海外 业务中心
型 号
1
名 称
TD-K600/00
AV_POWER/BTSC/TIMER
设计
审核
批准
版本
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