Vishay IRFZ24S, SiHFZ24S Data Sheet

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N-Channel MOSFET
G
D
S
Available
Available
IRFZ24S, SiHFZ24S
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 60
R
()V
DS(on)
Q
max. (nC) 25
g
Q
(nC) 5.8
gs
Q
(nC) 11
gd
Configuration Single
= 10 V 0.10
GS
FEATURES
• Advanced process technology
• Surface mount (IRFZ24S, SiHFZ24S)
• 175 °C operating temperature
• Fast switching
• Material categorization: for definitions of compliance please see
www.vishay.com/doc?99912
Note
*
Thi s datasheet pro vi des information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant.
D2PAK (TO-263)
Please see the information / tables in this datasheet for details.
DESCRIPTION
Third generation power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that
D
G
S
power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2PAK is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the last lowest possible on-resistance in any existing surface mount package. The D2PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application.
ORDERING INFORMATION
Package D2PAK (TO-263) D2PAK (TO-263)
Lead (Pb)-free and Halogen-free SiHFZ24S-GE3 SiHFZ24STRR-GE3
Lead (Pb)-free
IRFZ24SPbF IRFZ24STRRPbF
- IRFZ24STRLPbF
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
Continuous Drain Current V
Pulsed Drain Current
a, e
at 10 V
GS
C
= 100 °C 12
C
DS
± 20
GS
I
D
IDM 68
Linear Derating Factor 0.40 W/°C
c, e
b, e
E
AS
T
= 25 °C
C
= 25 °C 3.7
T
A
P
D
dV/dt 4.5 V/ns
, T
J
d
for 10 s 300
stg
Single Pulse Avalanche Energy
Maximum Power Dissipation
Peak Diode Recovery dV/dt
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak temperature)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. V
= 25 V, starting TJ = 25 °C, L = 400 μH, Rg = 25 , IAS = 17 A (see fig. 12).
DD
c. I
17 A, dI/dt 140 A/μs, VDD VDS, TJ 175 °C.
SD
d. 1.6 mm from case. e. Uses IRFZ24, SiHFZ24 data and test conditions.
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60
17
100 mJ
60
-55 to +175
Document Number: 90366
  
V
AT
W
°C
IRFZ24S, SiHFZ24S
S
D
G
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THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient (PCB mounted, steady-state)
a
Maximum Junction-to-Case (Drain) R
R
thJA
thJC
-40
-2.5
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient VDS/TJ Reference to 25 °C, ID = 1 mA
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 10 A
DS(on)
fs
Dynamic
Input Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Source Inductance L
iss
- 360 -
oss
-79-
rss
g
--5.8
gs
--11
gd
d(on)
r
-25-
d(off)
-42-
f
S
V
Between lead, and center of die contact - 7.5 - nH
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol showing the integral reverse p - n junction diode
TJ = 25 °C, IF = 17 A, dI/dt = 100 A/μs
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width 300 μs; duty cycle  2 %. c. Uses IRFZ24/SiHFZ24 data and test conditions.
VGS = 0, ID = 250 μA 60 - - V
c
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 60 V, VGS = 0 V - - 25
= 48 V, VGS = 0 V, TJ = 150 °C - - 250
V
DS
VDS = 25 V, ID = 10 A
b
d
VGS = 0 V,
V
= 25 V,
DS
f = 1.0 MHz, see fig. 5
= 17 A, VDS = 48 V,
I
= 10 V
GS
V
R
= 18 , RD = 1.7 , see fig. 10
g
D
see fig. 6 and 13
= 30 V, ID = 17 A,
DD
TJ = 25 °C, IS = 17 A, VGS = 0 V
d
b, c
b, c
b
b, c
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Vishay Siliconix
°C/W
-0.061-V/°C
- - 0.10
5.5 - - S
- 640 -
--25
-13-
-58-
--17
--68
--1.5V
- 88 180 ns
-0.290.64nC
μA
pFOutput Capacitance C
nC Gate-Source Charge Q
ns
A
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Document Number: 90366
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
IRFZ24S, SiHFZ24S
Vishay Siliconix
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, T
= 175 °C
C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
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Document Number: 90366
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IRFZ24S, SiHFZ24S
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
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Document Number: 90366
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Pulse width 1 µs Duty factor 0.1 %
R
D
V
GS
R
g
D.U.T.
10 V
+
-
V
DS
V
DD
V
DS
90 %
10 %
V
GS
t
d(on)
t
r
t
d(off)
t
f
R
g
I
AS
0.01 W
t
p
D.U.T.
L
V
DS
+
-
V
DD
10 V
Var y t
p
to obtain
required I
AS
IRFZ24S, SiHFZ24S
Vishay Siliconix
Fig. 10a - Switching Time Test Circuit
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig. 10b - Switching Time Waveforms
V
DS
t
p
V
DD
Fig. 12a - Unclamped Inductive Test Circuit
S16-0013-Rev. D, 18-Jan-16
V
DS
I
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For technical questions, contact: hvm@vishay.com
AS
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 90366
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Q
GS
Q
GD
Q
G
V
G
Charge
10 V
IRFZ24S, SiHFZ24S
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
0.2 µF
12 V
V
GS
0.3 µF
D.U.T.
3 mA
I
G
Current sampling resistors
I
D
+
-
Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit
V
DS
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P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple 5 %
Body diode forward drop
Re-applied voltage
Reverse recovery current
Body diode forward
current
V
GS
= 10 Va
I
SD
Driver gate drive
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
V
DD
dV/dt controlled by R
g
Driver same type as D.U.T.
I
SD
controlled by duty factor “D”
D.U.T. - device under test
D.U.T.
Circuit layout considerations
Low stray inductance
Ground plane
Low leakage inductance
current transformer
R
g
Note
a. V
GS
= 5 V for logic level devices
V
DD
IRFZ24S, SiHFZ24S
Vishay Siliconix
Fig. 14 - For N-Channel
         
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90366
S16-0013-Rev. D, 18-Jan-16
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
.
7
For technical questions, contact: hvm@vishay.com
Document Number: 90366
Package Information
M
*
3
2
1
L
L(1)
D
H(1)
Q
Ø P
A
F
J(1)
b(1)
e(1)
e
E
b
C
D2
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Vishay Siliconix
TO-220AB
MILLIMETERS INCHES
DIM. MIN. MAX. MIN. MAX.
A 4.25 4.65 0.167 0.183
b 0.69 1.01 0.027 0.040
b(1) 1.20 1.73 0.047 0.068
c 0.36 0.61 0.014 0.024
D 14.85 15.49 0.585 0.610
D2 12.19 12.70 0.480 0.500
E 10.04 10.51 0.395 0.414
e 2.41 2.67 0.095 0.105
e(1) 4.88 5.28 0.192 0.208
F 1.14 1.40 0.045 0.055
H(1) 6.09 6.48 0.240 0.255
J(1) 2.41 2.92 0.095 0.115
L 13.35 14.02 0.526 0.552
L(1) 3.32 3.82 0.131 0.150
Ø P 3.54 3.94 0.139 0.155
Q 2.60 3.00 0.102 0.118
ECN: T14-0413-Rev. P, 16-Jun-14 DWG: 5471
Note
* M = 1.32 mm to 1.62 mm (dimension including protrusion) Heatsink hole for HVM
Revison: 16-Jun-14
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Document Number: 71195
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Disclaimer
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Revision: 13-Jun-16
1
Document Number: 91000
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