Viewsonic VA702-1 Service Manual

Service Manual

ViewSonic VA702/b

Model No. VS10781

17” Color TFT LCD Display

ViewSonic

(VA702/b_SM Rev. 1a Oct. 2005)



381 Brea Canyon Road, Walnut, California 91789 USA - [phone]

Copyright

Copyright
reproduced, transmitted, transcribed, stored in a retrieval system, or translated into any language or
computer language, in any form or by any means, electronic, mechanical, magnetic, optical, chemical,
manual or otherwise, without the prior written permission of ViewSonic Corporation.

Disclaimer

ViewSonic makes no representations or warranties, either expressed or implied, with respect to the
contents hereof and specifically disclaims any warranty of merchantability or fitness for any particular
purpose. Further, ViewSonic reserves the right to revise this publication and to make changes from time
to time in the contents hereof without obligation of ViewSonic to notify any person of such revision or
changes.

Trademarks

Optiquest is a registered trademark of ViewSonic Corporation.
ViewSonic is a registered trademark of ViewSonic Corporation.
All other trademarks used within this document are the property of their respective owners.

2005 by ViewSonic Corporation. All rights reserved. No part of this publication may be

¤

Revision History

ECR Number

1a

10/20/05

Initial Release

Description of Changes

EditorRevision SM Editing Date

G. Han

ViewSonic Corporation Confidential

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TABLE OF CONTENTS

1. Precautions and Safety Notices

2. Service Tools & Equipment Required

3. Circuit Theory

4. Disassembly & Assembly

5. Test and Adjustment

6. Troubleshooting

7. Recommended Parts List

8. Schematic Diagrams

9. PCB Layout Diagrams

1
3

4

14
19
24

32
42

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1. Precautions and Safety Notices

1. Appropriate Operation

(1) Turn off the product before cleaning.
(2) Use only a dry soft cloth when cleaning the LCD panel surface.
(3) Use a soft cloth soaked with mild detergent to clean the display housing.
(4) Use only a high quality, safety approved AC/DC power cord.
(5) Disconnect the power plug from the AC outlet if the product will not be used for a long period of time.
(6) If smoke, abnormal noise, or strange odor is present, immediately switch the LCD display off.
(7) Do not touch the LCD panel surface with sharp or hard objects.
(8) Do not place heavy objects on the LCD display, video cable, or power cord.
(9) Do not use abrasive cleaners, waxes or solvents for your cleaning.
(10) Do not operate the product under the following conditions:

- Extremely hot, cold or humid environment.

- Areas containing excessive dust and dirt.

- Near any appliance generating a strong magnetic field.

- In direct sunlight.

2. Caution

No modification of any circuit should be attempted. Service work should only be performed after you are thoroughly familiar

with all of the following safety checks and servicing guidelines.

3. Safety Check

Care should be taken while servicing this LCD display. Because of the high voltage used in the inverter circuit, the voltage is

exposed in such areas as the associated transformer circuits.

4. LCD Module Handling Precautions

4.1 Handling Precautions

(1) Since front polarizer is easily damaged, pay attention not to scratch it.
(2) Be sure to turn off power supply when connecting or disconnecting input connector.
(3) Wipe off water drops immediately. Long contact with water may cause discoloration or spots.
(4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
(5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
(6) Since CMOS LSI is used in this module, take care of static electricity and ensure human earth when handling.
(7) Do not open or modify the Module Assembly.
(8) Do not press the reflector sheet at the back of the module in any direction.
(9) In the event that a Module must be put back into the packing container slot after it was taken out of the

container, do not press the center of the CCFL Reflector edge. Instead, press at the far ends of the
CFL Reflector edge softly. Otherwise the TFT Module may be damaged.

(10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate or tilt the Interface

Connector of the TFT Module.

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(11) After installation of the TFT Module into an enclosure (LCD monitor housing, for example), do not twist or

bend the TFT Module even momentarily. When designing the enclosure, it should be taken into consideration
that no bending/twisting forces may be applied to the TFT Module from outside. Otherwise the TFT Module
may be damaged.

(12) The cold cathode fluorescent lamp in the LCD contains a small amount of mercury. Please follow local

ordinances or regulations for disposal.

(13) The LCD module contains a small amount of materials having no flammability grade. The LCD module

should be supplied with power that complies with the requirements of Limited Power Source
(IEC60950 or UL1950), or an exemption should be applied for.

(14) The LCD module is designed so that the CCFL in it is supplied by a Limited Current Circuit (IEC60950

or UL1950). Do not connect the CCFL to a Hazardous Voltage Circuit.

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2. SERVICE TOOLS & EQUIPMENT REQUIRED

1. SIGNAL GENERATOR

2. MULTIMETER

3. SCREW DRIVER

4. OSCILLOSCOPE

5. Soldering IRON

6. SOLDER

7. VGA Cable (Black, 15pins point to point)

8. Color Analyzer

9. ISP Board

10. EDID Board

11. FOXISP. EXE file

12. EDID program file

13. Power Adapter output 5V/2A

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3. CIRCUIT THEORY

1. Block Diagram

TFT LCD Panel 17"

MT170EN01(Innolux)

Lamp1

1

Transformer1

AOP605L

AOP605L

Transformer2

Lamp2

On/Off

OZ9910

Open

Protection

3

4

Block Diagram

12V

24C16

5V

W78E65p

MCU

XTAL1

22.118MHz

LDO
5V-3.3V
5V-1.8V

Panel Enable

On/Off

PMBT3906

XTAL2

14.318MHz

24C02

AP2301

2

Rectifier &

Filter Circuit

Power

Transformer

Brightness

1

2

Rectifier &

Filter Circuit

AC Line Filter

Feedback

OVP

LTV817

TOP246Y
OPP/OCP

Power

5V

Panel Interface

Scaler

TSU16AK

Brightness

3

Lamp3

Lamp4

4

AC Socket

AC Input 90V-264V

Keypad

Connector

Keyboard

VGA Connector

VGA Input

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2. Electronic Circuit Theory

2.1 Switching Mode Power Supply

2.1.1 AC Current Input Circuit
P801 is a connector for connecting AC Power. F801 is a fuse to protect all the circuit. AC input voltage
is from 90V to 264V. R820 and R821 joined between two inputting main circuit to prevent man from
shock. L801 is used to clear up low frequency wave. C801 and C806 are used to discharge the waves
that L801 produced. High frequency waves are damped by C801 and C806. D801 is a rectifier which
composed of 4 build-in diodes, it inverts AC to DC.

2.1.2 High Voltage to Low Voltage Control Circuit
C805 is used to smooth the wave from rectifier. IC802 is a highly integrated PWM controller, which
build-in a power MOSFET. When rectified DC high voltage is applied to the DRAIN pin during start-up,
the MOSFET is off initially, and the CONTROL pin capacitor is charged through a switched high
voltage current source connected internally between the DRAIN and CONTROL pins. When the
CONTROL pin voltage Vc reaches approximately 5.8V, the control circuitry is activated and the
soft-start begins. The soft-start circuit gradually increases the duty cycle of the MOSFET from zero to
the maximum value over approximately 10ms. If no external feedback/supply current is fed into the
CONTROL pin by the end of the soft-start, the high voltage current source is turned off and the
CONTROL pin will start discharging in response to the supply current drawn by the control circuitry.

Resistor R803, R807, R824 and R825 are for line over voltage shut-down (OVP) and line under-voltage
detection (UVP).Resistors R801, R805, R822, and R823 are for external current limit adjustment, and
used to reduce the current limit externally to a value close to the operating peak current of primary about

1.35A. The mean is power will protected when the primary current over about 1.35A.

When PWM is turned off, the main current flow will be consumed through D804 and ZD802, This will
prevent MOSFET which built-in IC802 from being damaged under large current impulse and voltage
spike.

D806 and C815 provide internal Auxiliary current to CONTROL pin during normal operation. In
addition, error amplifier and feedback current to the CONTROL pin are for duty cycle control.

2.1.3 DC_5V and DC_14V Output Circuit
For DC 5V, D805 is used to rectify the inducted current. R806 and C811 are used to store energy when
current is reversed. The parts including C812, C814, C822, C821, B801 and L803 are used to smooth
the current waves.
For DC 14V, D803 is used to rectify the inducted current. R802 and C802 are used to store energy when
current is reversed. The parts including C808, C810 and L802 are used to smooth the current waves.

2.1.4 Feedback and OVP Protect Circuit
Pin R of IC803 is supplied 2.5V stable voltage. It is connected to 5V and 14V output through R811,
R810 and R818. R811, R810 and R818 are output sampling resistor. When the sampling voltage more
than 2.5V or less than 2.5V, feedback current of IC802 will change, this can change the voltage from
transformer T801.

For 5VDC output OVP, ZD803 is a zener diode, when 5V output voltage becomes up to 5.6V, the zener
current cause R819 voltage become up to 0.7V, Q801 is triggered and OVP starts. For 12VDC output
OVP, ZD804 is a Zener Diode, when 14V output voltage becomes up to 16V, the zener current cause
R819 voltage become up to 0.7V, Q801 is triggered and OVP starts. The collector current of Q801 is
used to make build-in diode light. FB Current of IC802 will be changed; it can change the voltage from
T801.

Q802, R827, R828 and ZD801 make up of dummy loading circuit. For start-up sequence, during 5V
output take place high loading first, this dummy loading circuit operated to insure 14V not be increased.

2. 2 Inverter circuit

2.2.1 Low voltage to high voltage circuit

12VDC supplies the power to IC501 through F501; the control signals that BRIGHTNESS and ON/OFF

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come from I/F board. ON/OFF signal connect to pin8 of IC501 and makes IC501 enabled.
BRIGHTNESS is connected to pin7 of IC501 to adjust the panel luminance. R524, R529, C505 make
up of a delay-time circuit and R528, R523, R524 make up of a voltage divided circuit. C504 is used to
filter the high frequency noise. The operation frequency is determined by R522 and C529. For BURST
MODE, its dimming frequency is determined by R527 and C506. C502 is used for soft start and
compensation, C502, C528 are used to filter noise.
The output drives, including NDR4, NDRV2, PDRV3, PDRV1 (pins1, 3, 15, 16 respectively), generate a
square pulses to drive MOSFET U501, U502. And U501, U502 works as full-bridge topology, it is high
efficient, zero voltage switch.

During start up, VSEN (pin9) detects the voltage at the transformer secondary. When VSEN reaches

3.0V, the output voltage is regulated. If no current is detected for around 1.5 seconds, IC501 will shut
down.
The current flowing through CCFL is detected and regulated through sense resistor R509, R511. The
feedback voltage through R506, R507, and C508 connected to Pin11 (ISEN), and then compared with a
reference voltage (1.5V) via a current amplifier, resulting in PWM drive outputs to full-bridge switches.

2.2.2 Protection circuit

Over Voltage Protection: R501and R502 are connected in high voltage output connector, the divided AC
voltage is inverted DC voltage through D508, R505 and C507are used to rectify wave & dump noise.
Then the voltage signal reaches Pin9 VSEN of IC501, when the voltage changes, build-in PWM of
IC501 will adjust output voltage.
Open Lamp Protection: In normal operation, the resistors R510, R511, R512, R509 are sensed a high
level AC voltage, the AC signal IS1 invert DC voltage through D509, R515, C533, and the high level
DC voltage reaches the gate pin of Q502, similarly, the gate pin of Q503, Q504, Q505 has high level DC
voltage. So the gate pin of Q501 has a low level voltage, and the IC501 is normal operation. Once one
of signal IS1, IS2, IS3, and IS4 is low, the voltages of Q501 gate pin is high level, and make the voltage
of ISEN low level, the IC501 will shut down.

2.3 I/F Board Circuit

2.3.1 Power Input

+5V is from the power board and supply for U101(FS8860-18PJ)﹑U102(FS8860-33PJ)﹑
U105(MCU:W78E65P) and panel. +3.3V output is generated from +5V through C169 and C102

filtering, and U102 outputs. +3.3V is used for U104 (Scaler: TSU16AK). +1.8V output is generated
from +5V through C169, C105 and C102 filtering, and U101 outputs. +1.8V is also used for U104.

2.3.2 MCU (W78E65P)

VDD is +5V and its frequency of XTAL1 is 22.1184MHz. U105 #2 is defined as panel-enable. When
the I/O port is low, Q101 and Q102 are conducted. And then after C109 and C110 filtering, obtain the
voltage of VLCD, which will be connected to CN103. U105 #3 is defined as CCFL-enable. When the
I/O port is low, Q103 is pulled up and the backlights are on; When the I/O port is high, Q103 is
conducted and the backlights are off. U105 #4 is defined as DET-VGA, connected with CN102 #5.
U105 #14, #36, #37, #38, #39, #40, #41, #42, #43 are the communications with U104 (Scaler), which
are connected to #72, #31, #78, #77, #30, #70, #71, #69, #32 of Scaler. U105 #43 outputs reset signal to
U104 (Scaler).
U106 is EEPROM used for saving EDID data, which is connected by SCL and SDA pins with #16 and
#17 of MCU. Connect #12 to #26 of U105 for ISP.

2.3.3 Scaler (TSU16AK)

The frequency of XTAL2 is 14.318MHz. U104 #1, #102-#103, #106-#113, #118-#125, #128 output
LVDS digital data of 8 bit to panel control circuit through CN103. U104 #73 generates a PWM
waveform by regulating the duty to control the brightness of the backlights. U104 #30-#32, #69-#72,
#77-#78 are the communications with U105 (MCU) that are connected to #36-#43 of MCU. These
communications include HWRESET, CSZ/ALE, SCL/RDZ, SDA/WRZ, and AD0-AD3.

2.3.4 VGA Input

Signal R, G, B, SOG input through CN102 #1, #2, #3, and C115, C116, C117 and C118 filtering the

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high frequency noise. Signal HSYNC and VSYNC input through CN102 #13 and #14, and C119, R119,
C120, R120 filtering. Then the analog signal enters U104, and then U104 deals with it internally. In
addition, TVS101, TVS102, TVS103 (the three are BAV99), TVS104, TVS105, TVS106, TVS107 (they
are constant voltage diode of 5V6) are ESD protector. Signal DDC-SCL inputs via CN102 #15, and then
passes through TVS107 for ESD protection, goes into EDID EEPROM IC U103. Signal DDC-SDA
inputs via CN102 #12, and then passes through TVS106 for ESD protection, goes into EDID EEPROM
IC U103. CN102 #5 is defined as cable detect pin, this detector realizes via R107 and U105 #4. The
PC-5V of U103 is supplied by PC via CN103 #9 with D103 for ESD protection, or supplied by Monitor
self via D104.U103 is an EEPROM IC, which is a kind of memory and used for saving EDID data.

2.3.5 Button Control

Button “Key-Power” is defined as power on/off, which is connected to U105 #24 through CN106 #4.
Button “Key-2” is defined as two functions of selecting and adjustment, which is connected to U105
#25 through CN106 #1.
Button “Key-Up” is defined as plus, which is connected to U105 #26 through CN106 #3.
Button “Key-Down” is defined as minus, which is connected to U105 #27 through CN106 #5.
Button “Key-1” is defined as two functions of menu and exit, which is connected to U105 #28 through
CN106 #2.
LED indicator on the front bezel is defined as follows:
a. When press button “Key-Power”, U105 #6 is pulled down and U105 #7 is pulled high, so Q104 is

conducted and the LED indicator is green.

b. When in power-saving mode, U105 #6 is pulled high and U105 #7 is pulled down, so Q105 is

conducted and the LED indicator is orange.

3. FACTORY PRESET TIMING TABLE

Item Resolution

1 640 x 350 31.5kHz 70Hz 25.2
2 640 x 400 31.5kHz 60Hz 25.2
3 640 x 400 31.5kHz 70Hz 25.2
4 24.7kHz 50Hz 19.8
5 31.5kHz 60Hz 25.2
6 35.0kHz 67Hz 30.2
7 37.9kHz 72Hz, 31.5

640 x 480

8 37.5kHz 75Hz, 31.5

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10 720 x 400 31.5kHz 70Hz 28.3
11 35.1kHz 56Hz 36.0
12 37.9kHz 60Hz 40.0
13 48.1kHz 72Hz 50.0

800 x 600
14 46.9kHz 75Hz 49.5
15
16 832 x 624 49.7kHz 75Hz 57.3
17 48.4kHz 60Hz 65.0
18 56.5kHz 70Hz 75.0
19 58.1kHz 72Hz 78.5

1024 x 768

20 60.0kHz 75Hz 78.8
21
22 1152 x 870 68.6kHz 75Hz 100
23 63.4kHz 60Hz 108
24

1280 x 1024

25 1280 x 720 45kHz 60Hz 74.2

H-Freq.

(KHz)

43.27kHz 85Hz 36.0

53.7kHz 85Hz 56.3

68.67kHz 85Hz 94.5

79.97kHz 75Hz 135

V-Freq.

(Hz)

Dot Clock

(MHz)

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4. Power On/Off Sequence

4.1 Hardware Power ON

When power cord is plugged into AC socket, SMPS starts work and provides U105 and U106 with
VCC5V. When VCPU inputs to U105, U105 resets circuit active, sets U105 all registers to preset modes,
and then U105 #43 sends out a HWRESET signal voltage to reset U104, and then monitor goes into
stand-by mode. That means hardware power on has been completed.

4.2 Software Power ON/OFF

When press power key, U105 #24 recieves low pulse, and sends out “Power on/off” order back to U104,
and then U104 will do the power on/off.

- If Power ON, U105 #6 (LED_Green) will send out High potential, and then LED green on.

- If Power OFF, U105 #7 (LED_Orange) will send out High potential, and then LED Orange on.

The Panel_Vcc, Backlight_En, CLK/DATA output to panel will follow the following sequency.

T1 (ms) T2 (ms) T3 (ms) T4 (ms) T5 (ms) T6 (ms) T7 (ms)

0.1~10 0~10 >200 >100 0~50 0.1~10 >1000

5. AC Outlet Pin Assignment

Pin Symbol Description

3

1 L Live

1

2

2 N Neutral

3 E GND

P801

6. Inner Connector Pin Assignment

6.1 CN501, CN502, CN503, CN504 (Connect to Panel Backlight, SM02B-BHSS-1-TB or equivalent)

Pin Symbol Description

1 H.V. High voltage for lamp
2 L.V. Low voltage for lamp

6.2 CN101 (Power BD to Interface BD)

Pin
No.

1,2 +5V (VCC5V) +5.2V output
3,6 GND Ground

Symbol Description

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4 BRIGHTNESS Brightness Control

)

)

5 ON/OFF CCFL on/off Control

6.3 CN106 (Interface BD to Keypad)

Pin

No.

Symbol Description

1 KEY_SELECT/AUTO Select control and auto adjustment control
2 KEY_MENU/EXIT OSD page selection and exit
3 KEY_UP OSD “▲” control to adjust value to increase
4 KEY_POWER DC power on/off control
5 KEY_DOWN OSD “▼” control to adjust value to decrease
6 LED_GREEN Green LED lighting control
7 GND Ground
8 LED_ORANGE Orange LED lighting control

6.4 CN103 (Connect I/F BD to panel, FI-X30S-H or Equivalent)

Pin No. Symbol Function

1 RXO0- minus signal of odd channel 0(LVDS)
2 RXO0+ plus signal of odd channel 0(LVDS)
3 RXO1- minus signal of odd channel 1(LVDS)
4 RXO1+ plus signal of odd channel 1(LVDS)
5 RXO2- minus signal of odd channel 2(LVDS)
6 RXO2+ plus signal of odd channel 2(LVDS)
7 GND Ground

8 RXOC- minus signal of odd clock channel (LV DS
9 RXOC+ plus signal of odd clock channel (LVDS)

10 RXO3- minus signal of odd channel 3(LVDS
11 RXO3+ plus signal of odd channel 3(LVDS)

12 RXE0- minus signal of even channel 0(LVDS)
13 RXE0+ plus signal of even channel 0(LVDS)
14 GND Ground

15 RXE1- minus signal of even channel 1(LVDS)
16 RXE1+ plus signal of even channel 1(LVDS)
17 GND Ground
18 RXE2- minus signal of even channel 2(LVDS)
19 RXE2+ plus signal of even channel 2(LVDS)
20 RXEC- minus signal of even clock channel (LVDS)
21 RXEC+ plus signal of even clock channel (LVDS)
22 RXE3- minus signal of even channel 3(LVDS)
23 RXE3+ plus signal of even channel 3(LVDS)
24 GND Ground
25
26
27

GND Ground
GND Ground or Open

GND Ground
28 VCC Power supply (5.0 V)
29 VCC Power supply (5.0 V)
30 VCC Power supply (5.0 V)

6.5 CN102 (D-SUB Connector)

Pin Symbol Pin Symbol Pin Symbol

1 Red video input 6 Red GND 11 NC
2 Green video input 7 Green GND 12 Serial data (SDA)
3 Blue video input 8 Blue GND 13 H / H+V SYNC

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4 NC 9 +5V(from PC) 14 VSYNC

d

r

d

d

d

d

d

d

r

d

d

d

5 Cable Detect 10 GND 15 Data clock line (SCL)

7. Key Parts Pin Assignment

7.1 IC802 (TOP246Y, Power Control IC)

Pin Symbol I/O Description

1 C I Control
2 L I Line Sense
3 X I External Current Limit
4 S O Source of MOSFET(GND)
5 F I Frequency
6 D I Drain of MOSFET

7.2 IC501 (OZ9910G, CCFL inverter controller IC)

Pin No. Symbol I/O Description

1 NDRV4 O

2 PGND High-current power ground

3 NDRV2 O

4 GNDA Low-current signal ground
5 CT I Timing capacitor of high frequency oscillator

6 LCT I Timing capacitor of set LPWM frequency
7 ADJ I Control command input –DC
8 ENA I Enable input

9 VSEN

Bottom MOSFET gate drive output in dual forward
converter

Bottom MOSFET gate drive output in dual forward
converter

I

Voltage sense feedback

10 CMP_SST

11 ISEN

12 VREF

13 VIN

14 HSB
15 PDRV3

16 PDRV1

I

Soft start and loop compensation capacitor

I

Current sense feedback

O

Reference voltage output

I

Supply voltage for IC

I

High side driver buffer output

O

Top MOSFET gate drive output in dual forward converter

O

Top MOSFET gate drive output in dual forward converter

7.3 U104 (TSU16AK)

Pin Symbol I/O Description

1 LVBOM O

B-LinkNegative LVDS Differential Data

2 GND Groun
3 BYPASS

For External Bypass Capacito

4 NC Not connecte
5 NC Not connecte
6 BUSTYPE IN Low : Serial bus; High : Direct bus

7 NC Not connecte
8 NC Not connecte

9 NC Not connecte
10 GND Groun
11 VDDP O Digital Output Powe
12 NC Not connected

13 NC Not connecte
14 NC Not connecte
15 NC Not connecte

16 NC Not connected

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17 NC Not connecte

d

r

d

d

r

d

d

d

d

d

d

d

d

r

d

d

r

d

r

r

d

r

d

d

r

d

d

18 VDDC I

Digital Core Powe
19 GND Groun
20 GND Groun
21 VDDP O Digital Output Powe
22 NC Not connecte
23 NC Not connecte
24 NC Not connecte
25 NC Not connecte
26 NC Not connecte
27 NC Not connecte
28 NC Not connecte
29 NC Not connecte
30 AD0 I/O DDR direct bus AD0; 4mA driving strength
31 AD3 I/O DDR direct bus AD3; 4mA driving strength
32 HWRESET I Hardware reset; active high
33 XIN I Crystal Oscillator Input
34 XOUT O Crystal Oscillator Output

35 AVDD_MPLL

MPLL Powe
36 GND Groun

37 HSYNC0 I Analog HSYNC input
38 VSYNC0 I Analog VSYNC input
39 GND Ground
40 NC Not connected
41 NC Not connected
42 GND Groun

43 NC Not connected
44 NC Not connected
45 VDD_ADC I

ADC Powe
46 NC Not connected

47 NC Not connected
48 GND Groun

49 NC Not connected
50 NC Not connected
51 VDD_ADC I

ADC Powe
52 REXT External resistor 390 ohm to AVDD ADC

53 AVDD PLL I PLL Powe
54 GND Groun
55 AVDD ADC I ADC Powe
56 GND Groun
57 BINOM I

Reference ground for analog blue input
58 BINO I Analog blue input
59 GINOM I

60 GINO I
61 SOGIN0 I

62 RINOM I
63 RINO I
64 GND
65 AVDD_ADC I
66 REFP

Reference ground for analog green input

Analog green input

Sync-on-green input

Reference ground for analog red input

Analog red input

Groun

ADC Powe

Internal ADC top de-coupling pin
67 REFM Internal ADC bottom de-coupling pin

68 GND Groun
69 ALE/CS I DDR direct bus ALE; active high

70 WRZ/SDA I/O DDR direct bus WRZ; active low
71 RDZ/SCL I DDR direct bus RDZ; active low
72 INT O CPU interrupt; 4mA driving strength

73 PWM0 O
74 PWM1 O

PWM0; 4mA driving strength

PWM1; 4mA driving strength
75 NC Not connecte

76 NC Not connected

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77 AD1 I/O DDR direct bus AD1; 8mA driving strength

r

r

r

78 AD2 I/O DDR direct bus AD2; 8mA driving strength
79 NC Not connected
80 NC Not connected
81 NC Not connected
82 NC Not connected
83 NC Not connected
84 VDDP O

Digital Output Powe

85 GND Ground
86 GND Ground
87 VDDC I

Digital Core Powe

88 NC Not connected
89 NC Not connected
90 NC Not connected
91 NC Not connected

92 NC Not connected
93 NC Not connected
94 VDDP O Digital Output Power
95 GND Ground
96 GND Ground
97 VDDC I Digital Core Power
98 NC Not connected
99 NC Not connected

100 NC Not connected
101 NC Not connected
102 LVA3P O

103 LVA3M O

A-Link Positive LVDS Differential Data

A-Link Negative LVDS Differential Data

104 VDDP O Digital Output Powe
105 GND Ground

106 LVACKP O
107 LVACKM O
108 LVA2P O
109 LVA2M O

110 LVA1P O
111 LVA1M O
112 LVA0P O
113 LVA0M O

A-Link Positive LVDS Differential Clock

A-Link Negative LVDS Differential Clock

A-Link Positive LVDS Differential Data

A-Link Negative LVDS Differential Data

A-Link Positive LVDS Differential Data

A-Link Negative LVDS Differential Data

A-Link Positive LVDS Differential Data

A-Link Negative LVDS Differential Data

114 VDDP O Digital Output Power
115 GND Ground
116 GND Ground
117 VDDC Digital Core Power
118 LVB3P O

119 LVB3M O
120 LVBCKP O
121 LVBCKM O
122 LVB2P O
123 LVB2M O
124 LVB1P O
125 LVB1M O

B-Link Positive LVDS Differential Data
B-Link Negative LVDS Differential Data
B-Link Positive LVDS Differential Clock
B-Link Negative LVDS Differential Clock
B-Link Positive LVDS Differential Data
B-Link Negative LVDS Differential Data
B-Link Positive LVDS Differential Data
B-Link Negative LVDS Differential Data

126 VDDP O Digital Output Power

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127 GND Ground

k

p

p

p

d

d

128 LVBOP O

B-Link Positive LVDS Differential Data

7.4 U105 (Micro-controller: W78E65P-40)

Pin Symbol I/O Description

1 P4.2/INT3
2 P1,0/T2 O
3 P1.1/T2EX O

A bi-directional I/O port with alternate
Enable panel power on

Enable CCFL wor
4 P1.2 I VGA cable detection
5 P1.3/PWM0 O
6 P1.4/PWM1 O
7 P1.5/PWM2 O
8 P1.6/PWM3
9 P1.7/PWM4

rovide alternated function of PWM Volume
rovide alternated function of PWM Green

rovide alternated function of PWM Orange
Function is the same as that of standard 8052
Function is the same as that of standard 8052

10 RST I Reset control pin

11 P3.0/RXD
12 P4.3/INT2
13 P3.1/TXD
14 P3.2/INT0

I Interrupt request control pin
15 P3.3/INT1 O
16 P3.4/T0
17 P3.5/T1

O SCL line of I2C communication with

I/O SDA line of I2C communication with
18 P3.6/WR I
19 P3.7/RD O

SCL line of I2C for EDID,
PORT 4: A bi-directional I/O port with
SDA line of I2C for EDID,debug function

Shut Down Volume Mute

DVI cable detection
EEPROM write protection control for DVI

ebug function

20 XTAL2 Crystal 22.1184MHz In
21 XTAL1 Crystal 22.1184MHz out
22 GND Sink voltage ground
23 P4.0
24 P2.0/A8
25 P2.1/A9
26 P2.2/A10
27 P2.3/A11
28 P2.4/A12
29 P2.5/A13
30 P2.6/A14
31 P2.7/A15

A bi-directional I/O port with alternate
DC power on/off control
OSD “►” control to adjust value to increase
OSD “◄” control to adjust value to decrease
Selection of menu command liste
OSD page selection
Auto adjustment control
A bi-directional I/O port with internal

A bi-directional I/O port with internal
32 PSEN Program Store Enable
33 ALE Address Latch Enable
34 P4.1
35 EA I

A bi-directional I/O port with alternate

External Access Enable
36 P0.7/AD7 I/O DDR Direct Bus Communication with Scaler
37 P0.6/AD6 I/O DDR Direct Bus Communication with Scaler
38 P0.5/AD5 I/O DDR Direct Bus Communication with Scaler
39 P0.4/AD4 I/O DDR Direct Bus Communication with Scaler
40 P0.3/AD3 I/O WRZ line of DDR Direct Bus
41 P0.2/AD2 I/O RDZ line of DDR Direct Bus
42 P0.1/AD1 I/O ALE line of DDR Direct Bus
43 P0.0/AD0 O

Hardware reset to Scaler
44 +5V I +5V for MCU working voltage

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4. DISASSEMBLY &ASSEMBLY

1. Exploded Diagram

C

D

D

A

C

D

D

D

D

D

D

C

B

B

B

C

B

D

A

A

A

C

F

F

ViewSonic Corporation Confidential

14

-

Do Not Copy VA702/b

ViewSonic Corporation

E

E

E

E

Model

Title
Date Rev: