UNITRODE UCC1889, UCC2889, UCC3889 Technical data
The UCC1889 controller is optimized for use as an off-line, low power, low voltage,
regulated bias supply. The unique circuit topology utilized in this device can be
visualized as two cascaded flyback converters, each operating in the discontinuous mode, and both driven from a single external power switch. The significant
benefit of this approach is the abili ty t o achieve voltage conversion ratios of 400V
to 12V with no t ra nsf or m er an d low int er nal los ses .
The control algorithm utilized by the UCC1889 is to force the switch on time to be
inversely proportional to the input line voltage while the switch off time is made inversely proportional to the output volta ge . This act io n is autom atica lly cont r olled by
an internal feedback loop and reference. The casc aded con fig uratio n allow s a voltage conversion from 400V to 12V to be achieved with a switch duty cycle greater
than 10%. This topology also offers inherent short circuit protection since as the
output volta g e fa lls to zer o, th e swit c h of f time appr oac hes infin ity.
The output voltage can be easily set to 12V or 18V. Moreover, it can be programmed for other output voltages less than 18V with a few additional components. An isolated version can be achieved with this topology as described further
in Unitr ode Application Note U- 1 4 9 .
With reference to the application d iagram below, when input voltage is fir st a pplied ,
the RON current into TON is directed to VCC where it charges the extern al capacitor,
C3, connected to VCC. As voltage builds on VCC, an internal undervoltage lockout
holds the circuit off and the output at DRIVE low until VCC reaches 8.4V. At this
time, DRIVE goes high turning on the power switch, Q1, and redirectin g the cur rent
into TON to the timing capacitor, CT. CT charges to a fixed threshold with a current
ICHG=0.8 • (VIN - 4.5V)/RON. Since DRIVE will only be high for as long as CT
charges, the power switch on time will be inversely proportional to line voltage.
This provides a const ant line volt age- switc h on tim e pro duct.
UDG-93060-1
查询UCC1889供应商
Off-line Power Supply Controller
UCC1889
UCC2889
UCC3889
FEATURES
• Transformerless O ff-line
Applications
• Ideal Primary-side Bias Supply
• Efficient BiCMOS Design
• Wide Input Range
• Fixed or Adjustable
Low Voltage Output
• Uses Low Cost SMD Inductors
• Short Circuit Protecte d
• Optional Isolation Capability
DESCRIPTI ON
OPERATION
TYPICAL APPLI CATIO N
Note: This device incorpo rat es patent ed t ech nology used un der license from Lambd a E lectronics, Inc.
2/95
OPERATION (cont. )
UDG-93062-3
At the end of the on time, Q1 is turned off and the RON
current into TON is again diverted to VCC. Thus the current through R
contributes to supplying control power during the off time.
The power switch off time is controlled by the di scharge
of C
T which, in turn, is programmed by the regulated out-
put voltage. The relationship between C
rent, I
DCHG, and output voltage is illustrated as follows:
ON, which charges CT during the on time,
T discharge cur-
UCC1889
UCC2889
UCC3889
IDCHG = (VOUT - 0.7V) / ROFF
As V
reduction of off time. The frequency of operation increases and V
3. In this region, a transconductance amplifier reduces
I
DCHG in order to maintain VOUT in regulation.
4. If V
falls to zero and the circuit returns to the minimum frequency established by R
The range of switching frequencies is established by
R
ON, ROFF, RS, and CT as follows:
increases, IDCHG increases resulting in the
OUT
OUT rises quickly to its regulated value.
OUT should rise above its regulation range, IDCHG
S and CT.
Frequency = 1/(T
T
ON = RON • CT • 4.6 V/(VIN - 4.5V)
T
OFF (max) = 1.4 • RS • CT
ON + TOFF)
Regions 1 and 4
T
1. When V
OUT = 0, the off time is infinite. This feature
provides inherent short circuit protection. However, to
ensure output voltage startup when the output is not a
short, a high value resistor, R
with C
T to establish a minimum switching frequency.
2. As V
OUT rises above approxi mately 0.7V to its regu-
lated value, I
DCHG is defined by ROFF, and therefore is
S, is placed in parallel
equal to:
The above equations assume that V
voltage at T
6.5V while C
is adjusted by 4.5V in the calculation of TON. The voltage
at T
OFF = ROFF • CT • 3.7V /(VOUT - 0.7V)
Region 2, excluding the effects of R
which have a minimal impact on TOFF.
ON increases from approximately 2.5V to
T is chargin g. To take this into account, VIN
OFF is approximately 0.7V.
S
CC equals 9V. The
DESIGN EXAMPL E
The UCC3889 regulates a 12 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this example, the IC i s pro grammed to deliver a maximum on time gate drive pulse width of 2.4 microseconds which occurs
at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overal l efficiency is approximately 50%. Additional design informat ion is ava ilable in Unitrode Application Note U-149.
2
Unless otherwise stated , thes e specificat ions hold fo r TA = 0°C to 70°C for the
UCC3889, -40°C to +85°C for the UCC2889, and -55°C to +12 5°C for the UCC1889.
No load at DRIVE pin (C LOAD=0).
ABSOLUTE MAXI MUM RATING S
ICC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Current into T
Voltag e on V
Current into T
ON Pi n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA
OUT Pi n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V
OFF Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA
CONNECTION DIAG RAM
DIL-8, SOIC-8 (Top View)
N or J, D Package
Storage Temperature . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Note: Unless oth erwise indicated, voltages are refere nced to
ground and current s are pos itive int o, negative out of, the spe cified terminals .
ELECTRICAL CHARACTERISTICS
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
General
CC Zener Voltage ICC < 1.5mA 8.6 9.0 9.3 V
V
Startup Current V
Operating Cur ren t I(V
OUT) VOUT = 11V, F = 150kHz 1.2 2.5 mA
Under-Voltage-Locko ut
Start Thresh o ld V
Minimum Oper ating Volt age af t er Start V
Hysteresis V
Oscillato r
Amplitude V
T to DRIVE high Propagation Delay Overdrive = 0.2V 100 200 ns
C
T to DRIVE low Propagation Delay Overdrive = 0.2V 50 100 ns
C
Driver
VOL I = 20mA, V
VOH I = −20mA, V
Rise Time C
Fall Time C
Line Voltage Det ect i on
Charge Coefficient : I
CHG / I(TON) VCT = 3V, DRIVE = High, I(TON) = 1mA 0.73 0.79 0.85
Minimum Line Voltage for Fault R
Minimum Current I(T
ON) for Fault RON = 330k 220 µA
On Time During Fault C
Oscillator Restart Delay after Fault 0.5 ms
OUT Error Amp
V
OUT Regulated 12 V (ADJ Open ) VCC = 9V, IDCHG = I(TOFF)/2 11.2 11.9 12.8 V
V
OUT Regulated 18 V (ADJ = 0V) VCC = 9V, IDCHG = I(TOFF)/2 16.5 17.5 19.5 V
V
Discharge Ratio: IDCHG / I(TOFF)I(TOFF) = 50µA 0.95 1.01 1.07
Voltage at T
OFF I(TOFF) = 50µ A 0.6 0.95 1.3 V
Regulation gm (Note 1) Max I
Note 1: gm is def ined as
I
DCHG
at 65% and 35% of its maximum value.
∆IDCHG
for the values of V
∆VOUT
OUT = 0 150 250 µA
OUT = 0 8.0 8.4 8.8 V
OUT = 0 6.0 6.3 6.6 V
OUT = 0 1. 8 V
CC = 9V 3.5 3.7 3.9 V
CC = 9V 0.15 0.4 V
I = 100mA, V
CC = 9V 0.7 1.8 V
CC = 9V 8.5 8.8 V
I = −100mA, VCC = 9V 6.1 7.8 V
LOAD = 1nF 35 70 ns
LOAD = 1nF 30 60 ns
ON = 330k 60 80 100 V
T = 150pF, VLINE = Min − 1V 2 µs
DCHG = 50µA 1.0 mA/V
DCHG = 125µA 0.8 1.7 2.9 mA/V
Max I
OUT
when V
OUT
is in regulation. The t wo point s used to calculate gm are for
3
UCC1889
UCC2889
UCC3889
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