UNITRODE UCC1581, UCC2581, UCC3581 Technical data

Micropower Voltage Mode PWM
application
INFO
available
UCC1581 UCC2581 UCC3581
FEATURES
Low 85µA Startup Current
Low 300µA Operating Current
Automatically Disabled
Startup Preregulator Programmable Minimum Duty
Cycle with Cycle Skipping Programmable Maximum
Duty Cycle Output Current 1A Peak
Source and Sink Programmable Soft Start
Programmable Oscillator
Frequency
External Oscillator Synchronization Capability
BLOCK DIAGRAM
Note: Pin Connection shown for 14-pin Package
DESCRIPTION
The UCC3581 voltage mode pulse width modulator is de signed to control low power isolated DC - DC converters in applications such as Subscriber Line Power (ISDN I.430). Primarily used for single switch forward and flyback converters, the UCC3581 features BiCMOS cir cuitry for low startup and operating current, while main taining the ability to drive power MOSFETs at frequencies up to 100kHz. The UCC3581 oscillator al lows the flexibility to program both the frequency and the maximum duty cycle with two resistors and a capacitor. A TTL level input is also provided to allow synchronization to an external frequency source.
The UCC3581 includes programmable soft start circuitry, overcurrent detection, a 7.5V linear preregulator to con trol chip V supply.
The UCC3581 provides functions to maximize light load efficiency that are not normally found in PWM controllers.
DD during startup, and an on-board 4.0V logic
UDG-95011-1
-
A linear preregulator driver in conjunction with an exter nal depletion mode N-MOSFET provides initial controller power. Once the bootstrap supply is functional, the preregulator is shut down to conserve power. During light
-
load, power is saved by providing a programmable mini
-
mum duty cycle clamp. When a duty cycle below the minimum is called for, the modulator skips cycles to pro
-
vide the correct average duty cycle required for output regulation. This effectively reduces the switching fre quency, saving significant gate drive and power stage losses.
The UCC3581 is available in 14-pin plastic and ceramic dual-in-line packages and in a 14-pin narrow body small
-
outline IC package (SOIC). The UCC1581 is specified for operation from 55°C to +125°C, the UCC2581 is speci fied for operation from 40°C to +85°C, and the UCC3581 is specified for operation from 0°C to +70°C.
-
-
-
-
-
MARCH 1999 - REVISED MARCH 2003 - SLUS295B
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (IDD 10mA). . . . . . . . . . . . . . . . . . . . . . . . 15V
Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
V
Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10mA
REF
OUT Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 1A
Analog Inputs
EN. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to (VDD + 0.3V)
VC, ISEN, SYNC, DCMIN. . . . . . . . . . –0.3V to (V
Power Dissipation at T
(N, J, Q, L Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1W
(D Package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.65W
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . –55C to +150°C
Lead Temperature (Soldering, 10 sec.). . . . . . . . . . . . . +300°C
= 25°C
D
Unless otherwise specified, all voltages are with respect to Ground. Currents positive into, negative out of the specified ter minal. Consult Packaging Section of Databook for thermal limi tations and considerations of packages.
REF
+ 0.3V)
UCC1581 UCC2581 UCC3581
CONNECTION DIAGRAMS
DIL-14, SOIC-14 (Top View) N or J, D Packages
-
-
ORDERING INFORMATION
TEMPERATURE RANGE PACKAGE
UCC1581J –55°C to +125°C CDIP UCC2581D –40°C to +85°C SOIC UCC2581N –40°C to +85°C PDIP UCC3581D 0°C to +70°C SOIC UCC3581N 0°C to +70°C PDIP
ELECTRICAL CHARACTERISTICS:
from VDD to GND, 1.0µF capacitor from REF to GND, RT1 = 680k, RT2 = 12k, CT = 750pF and T
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Reference Section
Output Voltage I = –0.2mA 3.94 4.0 4.06 V Load Regulation –5.0mA < I < –0.2mA 20 45 mV
Undervoltage Lockout Section
Start Threshold 6.7 7.3 7.9 V Minimum Operating Voltage After Start 6.2 6.8 7.4 V Hysteresis 0.2 0.5 0.8 V
Linear Preregulator Section
Regulated VDD Voltage 7.0 7.5 8.0 V Regulated VDD to UVLO Delta 100 230 600 mV VDD Override Threshold 8.2 V
Oscillator Section
Frequency 25°C 18 19.5 21 kHz Temperature Stability (Note 1) 3.0 % CT Peak Voltage (Note 1) 2.5 V CT Valley Voltage (Note 1) 1.0 V SYNC VIH 1.9 2.1 2.3 V SYNC VIL (Note 1) 1.8 V
PWM SECTION
Maximum Duty Cycle 81 84 87 % Minimum Duty Cycle (VC < 1.0V) DCMIN = 0V 0 %
Input Bias Current (DCMIN), (Note 1) –150 20 150 nA
Unless otherwise stated, these specifications apply for VDD = 10V, 0.1µF capacitor
A =TJ.
(VC > 1.0V at start of cycle) DCMIN = 1.18V 7 10 13 %
(VC), (Note 1) –150 20 150 nA
2
UCC1581 UCC2581 UCC3581
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications apply for VDD = 10V, 0.1µF capacitor
from VDD to GND, 1.0µF capacitor from REF to GND, RT1 = 680k, RT2 = 12k, CT = 750pF and T
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Current Sense Section
Input Bias Current –150 20 150 nA Overcurrent Threshold 0.4 0.5 0.6 V
Output Section
OUT Low Level I = 100mA 0.6 1.2 V OUT High Level I = –100mA, VDD – OUT 0.6 1.2 V Rise/Fall Time (Note 1) 20 100 ns
Soft start Section
Soft start Current SS = 2V –9 –11.5 –14 µA
Chip Enable Section
VIH 1.9 2.0 2.1 V VIL 1.7 1.8 1.9 V Hysteresis 180 230 280 mV Source Current 51015µA
Overall Section
Start-Up Current VDD < Start Threshold 85 130 µA Operating Supply Current VC = 0V 300 600 µA VDD Zener Shunt Voltage I
DD Stand-by Shunt Voltage EN = 0V 100 150 µA
I
= 10mA 13.5 15 16.5 V
DD
A =TJ.
Note 1: Guaranteed by design.Not 100% tested in production
PIN DESCRIPTIONS
CT: Oscillator timing capacitor pin. Minimum value is
100pF. DCMIN: Input for programming minimum duty cycle
where pulse skipping begins. This pin can be grounded to disable minimum duty cycle feature and pulse skipping.
EN: Enable input. This pin has an internal 10µA pull-up. A logic low input inhibits the PWM output and causes the soft start capacitor to be discharged.
GND: Circuit ground. GT: Pin for controlling the gate of an external depletion
mode N-MOSFET for the startup supply. The external N-MOSFET regulates VDD to 7.5V until the bootstrap supply comes up, then GT goes low.
ISEN: Input for overcurrent comparator. This function can be used for pulse-by-pulse current limiting. The threshold is 0.5V nominal.
OUT:Gate drive output to external N-MOSFET. REF: 4.0V reference output. A minimum value bypass
capacitor of 1.0µF is required for stability. RT1: Resistor pin to program oscillator charging current.
V
20
The oscillator charging current is
92
..•
RT
.
1
See Application Diagram Fig.1.
201.
V
The current into this pin is
RT
.
The value of RT1 should be between 220k and 1MΩ.
RT2: Resistor pin to program oscillator discharge time. The minimum value of RT2 is 10k. See Application Diagram Fig.1.
SS: Soft start capacitor pin. The charging current out of SS is 3.75X the current in RT1.
SYNC: Oscillator synchronization pin. Rising edge triggered CMOS/TTL compatible input with a 2.1V threshold. SYNC should be grounded if not used. The minimum pulse width of the SYNC signal is 100ns.
VC: Control voltage input to PWM comparator. The nominal control range of VC is 1.0V to 2.5V.
VDD: Chip input power with an 15V internal clamp. VDD is regulated by startup FET to 7.5V until the bootstrap voltage comes up. VDD should be bypassed at the chip with a 0.1µF minimum capacitor.
3
APPLICATION INFORMATION
The UCC3581’s oscillator allows the user the flexibility to program the frequency and the duty cycle by adjusting two resistors and a capacitor. Application Diagram Fig. 1 shows these components as RT1, RT2, and C grams the timing capacitor charging current which results in a linear ramp charging C
T. Discharge of CT is accom
plished though RT2 which results in a standard RC dis charge waveform. The oscillator on-time (C calculated by the formula
tRTC
=••0082 1.
ON T
The off-time (C
tRTC
OFF T
T discharging) is calculated by the formula
=••095 1.
.
.
Resistor RT1 programs the charging current. The current is:
2.0V .
RT
1
CT charging current is 9.2 times the current in RT1. RT1 can range from 220kto 1M. Minimum capacitor size is 100pF, and minimum RT2 size is 10k.
A Block Diagram of the Oscillator is shown in Fig. 2. The oscillator also has an external synchronization pin. When a low to high level is detected, and if the oscilla­tor’s output is in the high state (C
T charging), the oscilla-
tor output immediately goes low and C discharging. The sync input is rising edge sensitive and is ignored when the oscillator output is low.
T. RT1 pro
T charging) is
T starts
-
1
CT
V
C
-
-
T
BSS129 OR
EQUIV.
IN
GT
D2
REF
V
IN
T1
2
3
VDD
1µF
Q1
4
OUT
5
GND
6
REF
1µF
7
ISEN
D1
Figure 1. Application diagram.
RT2
UCC3581
REF &
E/A
R
L
RT2
UCC1581 UCC2581 UCC3581
14
13SYNC
12RT1
RT1
11EN
10SS
C
9DCMIN
8VC
U1
SS
REF
REF
U1
UDG-99043
Figure 2. Oscillator.
UDG-96105
4
APPLICATION INFORMATION (cont.)
The externally bypassed 4.0V reference is controlled by undervoltage lockout and chip enable circuitry. The en able input is internally tied to a 10µA current source which allows the pin to be driven by an open collector driver. The part is also enabled if EN floats. The UCC3581 has a soft start function which requires a user supplied external timing capacitor. When in soft start mode, the soft start capacitor, C constant current source. The soft start current is 3.75X the current in RT1.
There is an on-chip control amplifier, which when driving the gate of an external depletion mode N-MOSFET, acts as a 7.5V linear preregulator supplying VDD directly from the primary input power line. The preregulator may sub sequently be fully disabled by a tertiary bootstrap winding providing a minimum of 8.2V to the VDD pin.
Computation of DCMIN
DCMIN for a given duty cycle is calculated as follows:
()
tt
+
Vi DC
=••
OSC
ON OFF
C
T
where:
i = oscillator charge current = 9.2 . (2.0V/RT1)
DC = Duty Cycle, as a fraction of 1
t
= 0.082 RT1 CT
ON
t
= 0.95 RT2 CT
OFF
C
= Oscillator Capacitor
T
The CT pin ramp slews from 1V to 2.5V. Therefore, add V to 1V to get DCMIN voltage.
Example: For 10% duty cycle with RT1 = 680k, RT2 = 12k, and CT = 705pF,
SS, is charged with a
UCC1581 UCC2581 UCC3581
A Typical Micropower Application
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The circuit shown in Fig. 3 illustrates the use of the UCC3581 in a micropower application. The isolated 5V flyback power supply uses a minimum of parts and oper ates over an 8:1 input voltage range (15VDC to 120VDC) while delivering a regulated 5V output with a load swing from 0W to 1W. It operates in the discontinuous mode at light load or high line, and continuous mode at heavier loads and lower line voltages. Higher input line voltages are possible by simply increasing the voltage ratings of C1, Q1, D1 and D2.
The most notable feature of the design is its efficiency. With a load of 1 watt, the typical efficiency is 82%, drop
-
ping to 70% around 50mW. With a load of only 12.5mW, the efficiency remains as high as 50%. At this load, with an input of 50V, the total input current is only 500µA. Note that the power supply can be disabled by pulling the UCC3581 enable pin low, in which case the input current drops to less than 150µA.
The UCC3581 achieves very low losses by means of low quiescent current and pulse skipping at light loads which reduces switching losses. The degree of pulse skipping is controlled by programming the minimum duty cycle. In this example, the frequency is 35kHz at maximum load and drops to <2kHz at 12.5mW load (minimum pulse width of around 6µsec, or 21% duty cycle at 35kHz). Another way losses are reduced is operating with a VDD of around 10V rather than the more common 12V to 16V. At such light primary currents, the MOSFET remains in full saturation with a gate drive voltage well below 10V.
Gate drive losses are minimized by choosing a MOSFET with low total gate charge, in this case only 8nC maxi mum. By choosing a large gate drive resistor, EMI is min imized by reducing peak currents. Due to pulse skipping, switching times are less critical for efficiency at light load.
-
-
-
-
Vi DC
=••
OSC
V
20
.
92
.
• 
=
680
VV
=018.
()
01 4 182 10 8 55 10
. . sec . sec
•• • +•
k
Therefore,
DCMIN V V V
=+ =1018118..
()
tt
+
ON OFF
C
T
−−
56
750 1012•
The shunt regulator (LM3411) and optocoupler (MOC8100) are also key to the efficiency at such light loads, and were chosen for their low operating current. The LM3411 has a quiescent current of only 150µA max imum (compared to 1mA for the more common TL431). In addition, because it is not a three terminal device, the LM3411’s quiescent current does not flow in the optocoupler LED. Since this bias current is not in the feedback control path, a higher value pull-up resistor can be used on the optocoupler output transistor, further re ducing losses.
5
-
-
TYPICAL APPLICATION
UCC1581 UCC2581 UCC3581
Figure 3. Micropower power supply with 50% efficiency at 12.5mW load.
90
80
25V Line
70
60
100V Line
50
40
Efficiency [%]
30
20
10
0
UDG-96104
10 100 1000
Figure 4. UCC3581 efficiency vs. line and load.
Output Load [mW]
6
APPLICATION INFORMATION (cont.)
A rather large soft start capacitor was chosen to give a startup time of several hundred milliseconds, reducing the input surge current while the output is coming up.
UCC1581 UCC2581 UCC3581
If the sync input is used, it should not be left in a high im pedance state where noise could cause false triggering. If unused, it should be grounded.
-
Note that for stability, the UCC3581 V tor needs to be at least 1µF. The V
REF bypass capaci
DD supply also needs
some capacitance to hold it up between pulses at light load and high line, where the frequency may drop to less than 1kHz due to pulse skipping. Otherwise it may drop low enough for the startup MOSFET to be biased on, lowering efficiency.
TYPICAL CHARACTERISTIC CURVES
4.10
4.08
4.06
4.04
4.02
4.00
3.98
VREF [V]
3.96
3.94
3.92
3.90
-75 -50 -25 0 25 50 75 100 125
TEMPERATURE [°C]
Figure 5. Reference voltage vs. temperature.
The transformer was designed with a standard Magnetics
­RM8 ferrite core using P material, gapped for an A 1600mH/1000Turn
2
. The primary consists of 44 turns, while the 5V secondary has 10 turns and the bootstrap winding 18 turns. For simplicity, all the windings can be #28 AWG.A two section bobbin was used to provide high primary to secondary isolation. A much smaller design, with reduced isolation, could have been done for this low power level.
140
470k/47k
120 100
FREQUENCY [kHz]
680k/12k
80 60 40
1M/10k
20
0
100 1000 10000
CT [pF]
220k/10k
Figure 6. Frequency vs. CT vs. RT1 and RT2.
L of
100
90
1M/10K
80
680K/12K
70
220K/10K
470K/47K
DUTY CYCLE [%]
60 50 40 30
0 20406080100
FREQUENCY [kHz]
Figure 7. Duty cycle vs. frequency vs. RT1 / RT2.
1600 1400 1200 1000
[uA]
800
DD
I
600 400 200
0
0 20 40 60 80 100
FREQUENCY [kHz]
1nF LOAD
Figure 8. IDDvs. frequency RT1 = 680k, RT2 = 12k.
7
NO LOAD
TYPICAL CHARACTERISTIC CURVES (cont.)
40 35 30 25 20 15
ISOFT START [uA]
10
5 0
200 400 600 800 1000 1200
RT1 [kW]
Figure 9. Soft start current vs. RT1.
UCC1581 UCC2581 UCC3581
UNITRODE CORPORATION 7 CONTINENTAL BLVD.• MERRIMACK, NH 03054 TEL. (603) 424-2410 FAX (603) 424-3460
8
PACKAGE OPTION ADDENDUM
www.ti.com
27-Feb-2008
PACKAGING INFORMATION
Orderable Device Status
(1)
Package
Type
Package Drawing
Pins Package
Qty
Eco Plan
UCC2581D ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
UCC2581DG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
UCC2581DTR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
UCC2581DTRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
UCC2581J OBSOLETE UTR TBD Call TI Call TI UCC2581Q OBSOLETE UTR TBD Call TI Call TI UCC3581D ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
UCC3581DG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br)
UCC3581DTR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
UCC3581DTRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br)
UCC3581N ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br)
UCC3581NG4 ACTIVE PDIP N 14 25 Green (RoHS &
no Sb/Br)
UCC3581Q OBSOLETE UTR TBD Call TI Call TI
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Lead/Ball Finish MSL Peak Temp
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
(3)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
27-Feb-2008
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
TAPE AND REEL INFORMATION
11-Mar-2008
*All dimensions are nominal
Device Package
Type
UCC2581DTR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 UCC3581DTR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
Package Drawing
Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm)W(mm)
Pin1
Quadrant
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UCC2581DTR SOIC D 14 2500 346.0 346.0 33.0 UCC3581DTR SOIC D 14 2500 346.0 346.0 33.0
Pack Materials-Page 2
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