查询UC17131供应商
Smart Power Switch
UC17131/2/3
UC27131/2/3
UC37131/2/3
FEATURES
• 300mA Continuous Output Current
• Low Side or High Side Switch
Configuration
• 8V to 65V Operation
• Overload and Short Circuit Protection
• Power Interruption Protection
• +6V Regulated Voltage
• 2mA Quiescent Current
• Programmable Overcurrent and
Power Interruption Protection
• 1% to 30% Programmable Input
Comparator Hysteresis (on UC37132)
• Low and High Side Internal High
Current Clamps When Driving
Inductive Loads
DESCRIPTION
The UC37131, UC37132 and UC37133 are a family of smart power
switches which can drive resistive or inductive loads from the high side or
low side.
The UC37132 is available in 14 pin (DIP), 16 pin (SOIC), or 20 pin (CLCC)
packages and can accommodate both low side (load to VCC) or high side
(load to GND) configurations. The UC37131 and UC37133 are exclusively
for a low side or a high side configuration respectively and both are available in an 8 pin package.Both high side and low side configurations provide
high current switching with low saturation voltages which can drive resistive
or inductive loads.
The input to the switch is driven by a low voltage signal, typically 5V. Additionally, UC37132 features adjustable hysteresis. The output of the device
can switch a load between 8V and 65V.Output current capability is 300mA
continuous or 700mA peak.
The device also has inherent smart features that allow for programmable
turn-on delay in enabling the output following startup. The same capacitor
that specifies the turn-on delay is also used to program a VCC power interruption time. If VCC drops below a threshold for a time specified by this capacitor, the output is turned off and a new turn-on delay will be re-triggered.
Similarly, if high current persists longer than the response delay, the output
driver will operate in a very low duty cycle mode to protect the IC.
UC37132 BLOCK DIAGRAM
11VREF
6V/8mA
13
IN
1/2
VREF
12
HYST
INPUT
COMPARATOR
9
LED
6V
PRE-REGULATOR
TURN-ON/OFF
AND
SHORT CIRCUIT
PROTECTION
10
CDEL
Q
OUT
72V
7VCC
6
CSH
5
LS
4HS
3
CSL
2GND
UDG-98026
SLUS340 - APRIL 1999
UC37131 BLOCK DIAGRAM
UC17131/2/3
UC27131/2/3
UC37131/2/3
3VREF
6V/8mA
INPUT
IN
4
COMPARATOR
HYST (FIXED) =
30%
1/2
VREF
UC37133 BLOCK DIAGRAM
PRE-REGULATOR
6V
1
LED
TURN-ON/OFF
AND
SHORT CIRCUIT
PROTECTION
2
CDEL
8VCC
7
LS
72V
Q
OUT
6
CSL
5GND
UDG-98059
6V/8mA
IN
3VREF
INPUT
4
1/2
VREF
COMPARATOR
HYST (FIXED) =
30%
TURN-ON/OFF
SHORT CIRCUIT
PROTECTION
1
LED
6V
PRE-REGULATOR
AND
2
CDEL
Q
OUT
72V
8VCC
CSH
7
6HS
5GND
UDG-98060
2
ABSOLUTE MAXIMUM RATINGS
VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65V
LS – HS (Clamped by internal circuitry) . . . . . . . . . . . . . . . 78V
CSH, LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65V
Output Current
Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400mA
Peak . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900mA
Remaining Pin Voltages . . . . . . . . . . . . . . . . . . . . . –0.3V to 9V
Storage Temperature . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 sec.). . . . . . . . . . . . . +300°C
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages.
PLCC-20 (Top View)
(for UCX7132)
L Packages
N/C
LS
CSH
N/C
VCC
N/C
N/C
N/C
N/C
LED
3
4
5
6
7
8
91110 12 13
122019
HS
CSL
18
N/C
17
GND
16
N/C
15
N/C
14
IN
HYST
VREF
CDEL
CONNECTION DIAGRAMS
SOIC-16 (Top View)
(for UCX7132)
D Package
N/C
1
GND
2
CSL
3
HS
4
LS
5
CSH
6
N/C
7
VCC
8
DIL-8, SOIC-8 (Top View)
(for UCX7131)
J, N, or D Packages
LED
1
CDEL
VREF
IN
2
3
4
UC17131/2/3
UC27131/2/3
UC37131/2/3
N/C
16
IN
15
HYST
14
VREF
13
CDEL
12
LED
11
N/C
10
N/C
9
VCC
8
LS
7
CSL
6
GND
5
DIL-14 (Top View)
(for UCX7132)
J, or N Packages
N/C
GND
CSL
HS
LS
CSH
VCC
1
2
3
4
5
6
7
N/C
14
IN
13
HYST
12
VREF
11
CDEL
10
LED
9
N/C
8
PRODUCT SELECTION TABLES
PART
NUMBER CONFIGURATIONS
UCX7131 Low Side Only 8
UCX7132 Low Side or High Side 14, 16, 20
UCX7133 High Side Only 8
PACKAGE
PIN COUNT
DIL-8, SOIC-8 (Top View)
(for UCX7133)
J, N, or D Packages
LED
1
CDEL
VREF
PART
NUMBER
2
3
IN
4
TEMPERATURE
RANGE
UC1713X –55°C to +125°C J, L
UC2713X –40°C to +85°C D, N
UC3713X 0°C to +70°C D, N
VCC
8
CSH
7
HS
6
GND
5
AVAILABLE
PACKAGES
3
UC17131/2/3
UC27131/2/3
UC37131/2/3
ELECTRICAL CHARACTERISTICS
R
= 0.5Ω (Note 1); IN=0V (for OFF condition) and IN=5V (for ON condition); TA=TJ.
CSH
Unless otherwise specified, CDEL = 10nF, VCC = 25V, CSL = GND, CSH = LS;
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Reference
VREF 25°C 5.8 6 6.2 V
–55°C to 125°C 5.6 6 6.4 V
Line Regulation VCC = 8V to 64V 10 35 mV
Load Regulation 0 < I
REF < 8mA 10 50 mV
Short Circuit Current REF = 0V 20 35 mA
Input Comparator
Turn-On Threshold Voltage 2.7 3 3.3 V
Input Bias Current V
Hysteresis R
IN = 3.5V 5 µA
HYST = GND (Internally for X31, X33) 0.775 0.9 1.025 V
HYST = 96.67k for (X32) 30 mV
R
Output: High Side (UCX7133: CSH = LS and CSL = GND Internally; See Fig. 2a)
Rise Time (Off to On) R
Fall Time (On to Off) R
= 250Ω to GND 30 80 V/µs
LOAD
= 250Ω to GND 30 80 V/µs
LOAD
Output Short Circuit HS = 0.25Ω to GND 500 900 mA
Voltage Clamp LS–HS 67 72 77 V
Saturation Voltage 25°C, R
–40°C, R
–55°C, R
= 100Ω to GND 1.2 V
LOAD
= 100Ω to GND 1.3 V
LOAD
= 100Ω to GND 1.4 V
LOAD
Leakage Current 5 µA
Output: Low Side (UCX7131; CSH = VCC and CSL = HS Internally; See Fig. 2b)
Rise Time (On to Off) R
Fall Time (Off to On) R
= 250Ω to VCC, R
LOAD
= 250Ω to VCC, R
LOAD
= 0.5Ω 15 50 V/µs
CSL
= 0.5Ω 25 60 V/µs
CSL
Output Short Circuit LS = 0.25Ω to VCC 500 700 900 mA
Voltage Clamp LS–HS 67 72 77 V
Saturation Voltage 25°C, R
–40°C, R
–55°C, R
= 100Ω to VCC, R
LOAD
= 100Ω to VCC, R
LOAD
= 100Ω to VCC, R
LOAD
= 0.5Ω 1.2 V
CSL
= 0.5Ω 1.3 V
CSL
= 0.5Ω 1.4 V
CSL
Leakage Current 5 µA
VCC Fault Section
Output Turn-On Delay, t
Output Turn-Off Delay, t
D(ON)
D(OFF)
Step VCC from 0V to 8V (See Fig. 3a) 9.5 11 13.5 ms
Pulse VCC from 25V to VCC Turn-Off
300 500 700 µs
Threshold
VCC Turn-Off Threshold Pulse VCC Low 6.5 7 7.5 V
CDEL Section
V
CDEL_MAX
V
FAULT_H
V
FAULT_L
5.8 V
4.9 V
1.0 V
Overcurrent Fault Section (See Fig. 3c)
Short Circuit Turn-Off Delay, t
Short Circuit Recovery Time, t
High Side Current Threshold, I
Low Side Current Threshold, I
SC
ROFF
TH-H
TH-L
Overcurrent Duty Cycle R
Step I
I
LOAD
R
CSH
R
CSL
LOAD
0mA to 400mA 75 µs
LOAD:
= 400mA, 100µs10ms
= 0.5Ω 250 325 400 mA
= 0.5Ω 250 325 400 mA
= 0.25Ω to GND 0.6 0.8 1.0 %
4
UC17131/2/3
UC27131/2/3
UC37131/2/3
ELECTRICAL CHARACTERISTICS
R
= 0.5Ω (Note 1); IN=0V (for OFF condition) and IN=5V (for ON condition); TA=TJ.
CSH
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
LED Output
I
SINK,tDOFF,tROFF
I
LEAKAGE
Overall
Delay to Output 36µs
ICC Output Off 2.0 2.8 mA
Note 1: All test conditions are for a high side configuration as in Fig. 2a, unless otherwise specified.
Unless otherwise specified, CDEL = 10nF, VCC = 25V, CSL = GND, CSH = LS;
V
= 7V 5.0 8.0 11.0 mA
LED
15µA
= 1mA, 250mA (High Side) 2.3 3 mA
I
L
= 1mA, 250mA (Low Side) 2.5 4 mA
I
L
PIN DESCRIPTIONS
CDEL: A capacitor connected to this pin is used to pro-
gram both VCC pulse interruption time and power
turn-on delay. The capacitor discharge time corresponds
to VCC interruption and the charge time to VCC turn-on
delay. The ratio between turn-on delay and turn-off delay
will be fixed based on internal charge and discharge currents and voltage thresholds.
The same fault circuitry and capacitor is used for short
circuit and overload protection. If an overcurrent or short
circuit is detected, the capacitor starts charging and
turns off the output if the condition persists at the end of
its charge time. The output will then operate in a low-duty
cycle mode to protect the IC. After short circuit recovery,
the output will be reactivated in order to check if the short
circuit was removed. If the overcurrent persists the chip
will continue in this pulsing mode.
CSH: (For UC37132 and UC37133) This high side current sense pin is used to program the current limit for
high side applications by connecting a resistor between
VCC and CSH. An over load current is detected when
the voltage drop between VCC and CSH exceeds
150mV. For the UC37132, in a high side application, the
CSH pin must be tied to the LS pin; in a low side application, the CSH pin must be tied to VCC
CSL: (For UC37131 and UC37132) This low side current sense pin is used to program the current limit for low
side applications by connecting a resistor between CSL
and GND.An over load current is detected when the voltage drop between CSL and GND exceeds 150mV. For
the UC37132, in a high side application, the CSL pin
must be tied to GND; in a low side application, the CSL
pin must be tied to the HS pin.
HS: (For UC37132 and UC37133) The output of the
switching transistor in the high side configuration. The
emitter of the output transistor is the HS pin which is connected to the load. For the UC37132, the HS pin must be
tied to the CSL pin in a low side application.
HYST: (For UC37132) The pin used to program the input comparator hysteresis by connecting a resistor to
ground. The hysteresis defaults to 30% with HYST
grounded (internally for UC37131 and UC37133).
V
HYST
=
3000
R
+
3330()
HYST
IN: The input to the comparator that detects when the
output transistor should be turned on. The input threshold is 3.0V (1/2 VREF) and the input voltage range is 0V
to VREF.
LED: Open collector output intended to drive an LED.
This pin is driven low whenever the output is turned off
and is externally pulled high when the output is turned on
(see Fig. 3b and 3c).
LS: (For UC37131 and UC37132) The output of the
switching transistor in the low side configuration. The collector of the output transistor is the LS pin which is connected to the load. For the UC37132, the LS pin must be
tied to the CSH pin in a high side application.
VREF: The 6V regulated reference capable of supplying
up to 8mA. The recommended decoupling capacitor is
1nF.
VCC: The supply voltage for the chip. Decouple this pin
with a good quality ceramic capacitor to ground.
GND: The reference point for the internal reference, all
thresholds, and the return for the remainder of the device.
5
DESCRIPTION OF OPERATION
Reference
The UC37131/2/3 family of devices features a 6V
bandgap reference that is used to bias on-chip logic. Although the 6V reference is not trimmed, this bandgap reference provides less than 200ppm/°C. It is also used to
generate the on-chip 3V input comparator threshold and
is needed for the programmable hysteresis. The on-chip
reference has 8mA maximum current sourcing capacity
that is designed to power up external circuitry.
Input Comparator
The input comparator is a high gain comparator with hysteresis that fully switches with either a small signal
(30mV, minimum for 1% hysteresis) or a logic signal (0 to
6V max). Only a 5mV overdrive of the 3V threshold is
needed to switch the driver.
The hysteresis is set to 30% on the UC37131 and
UC37133. (This is 30% of 3V equating to 0.9V of hysteresis.) On the UC37132 it is programmable from 1% to
30%.
Fault Logic
The output of the comparator is logic ANDed with the
output of the fault logic. If a fault, either a power interrupt
or an overcurrent condition, persists longer than it takes
for the CDEL to discharge from its V
5.8V to its V
FAULT_L
of 1.3V, the fault protection block will
CDEL_MAX
output a logic 0 to the NAND gate and turn off the output
driver. If the fault goes away prior to CDEL being discharged to 1.3V, the chip will resume normal operation
without going through a turn-on delay.
The power interrupt normal operation consists of the chip
turning the driver immediately back on if the interrupt
goes away prior to CDEL reaching its lower threshold as
described above. The CDEL capacitor is chosen based
upon the maximum power interrupt time (t
without the output experiencing a turn-on delay. This interrupt time must be less than t
D(OFF)
where t
equal to the time it takes the CDEL capacitor to discharge from V
CDEL_MAX
(5.8V) to V
FAULT_L
discharge current of approximately 94µA. If the power
stays off only as long as t
, the minimum power up
D(OFF)
delay will be equal to the time it takes to charge CDEL
from V
FAULT_L
(1.3V) to V
FAULT_H
(4.9V) with a charge
level of
) allowed
INT
D(OFF)
(1.3V) with a
UC17131/2/3
UC27131/2/3
UC37131/2/3
current of approximately 4µA. If the power stays off longer than this time, then a power up delay will be initialized once power is resumed. This delay is the time it
takes for CDEL to charge from 0V to V
The overcurrent fault normal operation consists of the
chip staying off until CDEL fully recharges to V
4.9V. This is t
. Once CDEL reaches 4.9V, the driver
R(OFF)
will turn back on. If the overcurrent fault is still present,
the chip will operate in a very low duty cycle (approximately 0.7%) based on the discharge (driver on) and
charge time (driver off) of the CDEL capacitor. This
overcurrent timing makes the chip act "smart" by allowing
very high currents needed to drive large capacitive loads
without setting off an overcurrent fault.
The overcurrent and current limit thresholds are programmed with the resistor R
side) or R
a 150mV (I
from CSL to GND (low side). For example,
CSL
• R
LOAD
CSH
CSH
) threshold will set the high side
overcurrent fault threshold. An overall short circuit protection threshold is set at 300mV. Therefore, the recommended R
circuit. By changing the R
of 0.5Ω will result in the 600mA short
CSH
CSH
mally set the overcurrent and short circuit current limits.
Output Driver
Once the turn-on signal is gated through from the input
comparator, the output transistor is turned on. The output
drive transistor is a composite PNP, NPN structure. This
is a specially designed structure that keeps all the drive
current needed for the load to be sourced through the LS
pin. This keeps the overall power dissipation to less than
4mA independent of the load.
The output driver also has a 72V zener diode wired between its base and collector. This allows the output to
swing and clamp to 72V above ground when discharging
an inductive load in a low side application. The inductive
zener clamp can discharge the 250mA to 400mA full
is
load current. This consequently allows the LS pin to
safely swing above VCC. Similarly, the 72V zener diode
will allow the HS pin to safely swing and clamp 72V below LS/VCC when discharging an inductive load in a high
side application. This 72V zener diode simplifies the user
application by eliminating the need for external clamp diodes.
FAULT_H
from CSH to VCC (high
value the user can opti-
of 4.9V.
FAULT_H
of
6
APPLICATION INFORMATION
Choosing The CDEL Capacitor
The maximum amount of time that VCC power can be interrupted and not require the outputs to go through a
turn-on delay cycle is user programmable by the CDEL
capacitor value. While VCC is interrupted, the outputs
will be in an indeterminate state and they may turn off
during this interval, t
grammed interruption time is not exceeded, the outputs
will immediately turn back on with the return of VCC.
For example:
ts
≈ 500µ
INT
CDEL is selected such that the time it takes for this capacitor to discharge from V
(1.3V) with a discharge current of 94µA is just greater
than this t
. This time is referred to as t
INT
3b.
It
DISCHARGE D
=
VV
CDEL MAX FAULT L
is set equal to t
If t
CDEL
D(OFF)
to be 500µs, the minimum CDEL capacitor is calculated:
As
94 500
CDEL
µµ
=
VV
58 13
..
For this application, the CDEL capacitor value calculates
to 10.4nF. By using a 10nF capacitor on CDEL, VCC can
be interrupted for up to 478µs and the outputs will experi-
. However, as long as the pro-
INT
(User specified)
CDEL_MAX
•
OFF
()
−
__
, which the user has selected
INT
(5.8V) to V
D(OFF)
•
−
FAULT_L
in Fig.
UC17131/2/3
UC27131/2/3
UC37131/2/3
ence an indeterminate state during this interruption, but
resume normal operation when VCC power returns to
normal.
If the VCC power is interrupted for a time equal to or longer than t
D(OFF)
As the CDEL capacitor discharges past the V
threshold, the output is fully disabled and must cycle
through a power up delay equal to t
current for the CDEL capacitor is equal to 4µA. The outputs will turn on when the CDEL capacitor charges up to
the V
FAULT_H
delay the outputs will experience will occur if t
actly equal to the t
has only discharged to V
mum turn-on delay time and is calculated with the following equation:
t
DON
()
=
min
Using the 10nF CDEL capacitor, for example, the minimum turn-on delay calculates to 9ms. If the CDEL capacitor discharges completely to zero, then the 10nF
CDEL capacitor would cause a turn-on delay of 12.25ms.
The outputs would be off for this amount of time after
VCC power is restored. The total amount of time the outputs could be disabled is equal to the t
may include the indeterminate time of t
t
time, as shown in Fig.3b.
D(ON)
then the following relationships apply.
FAULT_L
. The charge
D(ON)
threshold of 4.9V. The minimum turn-on
INT
D(OFF)
CDEL V V
•−
time and the CDEL capacitor
FAULT_L
FAULT L FAULT H
I
CHARGE
. This would be the mini-
__
INT
D(OFF)
time, which
, and the
is ex-
VREF
11
C
REF
IN
VREF
GND
13
1/2
VREF
HYST
INPUT
COMPARATOR
12
LED
R
HYST
9
Figure 2a. High side application.
6V
PRE-REGULATOR
TURN-ON/OFF
AND SHORT
CIRCUIT
PROTECTION
10
CDEL
VCC
7
I
CC
CSH
6
LS
5
72V
Q
OUT
C
CDEL
HS
4
CSL
3
GND
2
+L
R
CSH
POWER
SUPPLY
C
CC
OUT
LOAD
–L
I
GND
UDG-98027
7
APPLICATION INFORMATION (cont.)
UC17131/2/3
UC27131/2/3
UC37131/2/3
VREF
C
REF
IN
VREF
GND
11
13
1/2
VREF
HYST
INPUT
COMPARATOR
12
LED
R
HYST
PRE-REGULATOR
9
Figure 2b. Low side application.
6V
TURN-ON/OFF
AND SHORT
CIRCUIT
PROTECTION
10
CDEL
C
CDEL
VCC
7
I
CC
CSH
6
LS
5
72V
Q
OUT
HS
4
CSL
3
GND
2
+L
C
CC
OUT
R
CSL
–L
LOAD
POWER
SUPPLY
I
GND
UDG-98028
t
INT
VCC
V
CDEL
OUTPUT
t
D(ON)
V
CDEL_MAX
V
FAULT_H
=5.8V
=4.9V
DRIVER
DISABLED ENABLED
INDETERMINATE
STATE
Figure 3a. Power interrupt ignore operation, high side configuration, VIN= 5VDC.
V
FAULT_H
ENABLED
t
t
t
UDG-98029
8
APPLICATION INFORMATION (cont.)
VCC
UC17131/2/3
UC27131/2/3
UC37131/2/3
tINT
t
V
CDEL
OUTPUT
DRIVER
LED
V
CDEL_MAX
V
FAULT_H
t
D(ON)
DISABLED ENABLED
=5.8V
=4.9V
t
D(OFF)
V
FAULT_L
DISABLED
=1.0V
t
D(ON)
V
FAULT_H
ENABLED
INDETERMINATE
STATE
Figure 3b. Power interrupt fault operation, high side configuration, VIN= 5VDC.
I
LOAD
t
t
t
UDG-98030
t
V
CDEL
OUTPUT
DRIVER
LED
Figure 3c. Overcurrent fault operation.
UNITRODE CORPORATION
7 CONTINENTAL BOULEVARD • MERRIMACK, NH 03054
TEL (603) 424-2410 • FAX (603) 424-3460
4.9V
t
tSC
t
tR(OFF)
t
UDG-98031
9
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