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TS2GLH72V1B
User Manual
11 pgs877.08 Kb0

Transcend TS2GLH72V1B User Manual

1
Symbol
Function
A0–A14
SDRAM address bus
BA0, BA1
SDRAM bank select
BG0, BG1
SDRAM bank group select
RAS_n
SDRAM row address strobe
CAS_n
SDRAM column address strobe
WE_n
SDRAM write enable
CS0_n, CS1_n
DIMM Rank Select Lines
CKE0, CKE1
SDRAM clock enable lines
ODT0, ODT1
SDRAM on-die termination control lines
ACT_n
SDRAM activate
DQ0–DQ63
DIMM memory data bus
CB0–CB7
DIMM ECC check bits
DM_n/DBI_n/
Input data mask and data bus inversion
DQS0_t–DQS8_t
SDRAM data strobes (positive line of differential pair)
DQS0_c–DQS8_c
SDRAM data strobes (negative line of differential pair)
CK0_t, CK1_t
SDRAM clocks (positive line of differential pair)
CK0_c, CK1_c
SDRAM clocks (negative line of differential pair)
PARITY
SDRAM parity input
VDD
SDRAM I/O and core power supply
VREFCA
SDRAM command/address reference supply
VSS
Power supply return (ground)
VDDSPD
Serial SPD EEPROM positive power supply
SCL
I2C serial bus clock for EEPROM
SDA
I2C serial bus data line for EEPROM
SA0–SA2
I2C slave address select for EEPROM
ALERT_n
SDRAM ALERT_n
VPP
SDRAM Supply
RESET_n
Set DRAMs to a Known State
EVENT_n
SPD signals a thermal event has occurred
VTT
SDRAM I/O termination supply
RFU
Reserved for future use
NC
No Connection
NF
No function
TS1GSH72V1H
Description
DDR4 ECC SO-DIMMs are high-speed, low power memory modules that use 512Mx8bits DDR4 SDRAM in FBGA package and a 4K-bit serial EEPROM on a 260-pin printed circuit board. DDR4 ECC SO-DIMMs are Dual In-Line memory modules and are intended for mounting into 260-pin edge connector sockets. The synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. The large range of operation frequencies and programmable latencies allow the same device to be useful for a variety of high bandwidth and high performance memory system applications.
Pin Identification
Features
RoHS compliant JEDEC standard 1.2V ± 0.06V power supply VDDQ=1.2V ± 0.06V Clock Freq: 1067MHZ for 2133Mb/s/Pin. Programmable CAS Latency: 10,11,12,13,14,15,16 Programmable Additive Latency (Posted /CAS):
0,CL-2 or CL-1 clock
Programmable /CAS Write Latency (CWL)
= 11, 14(DDR4-2133)
8 bit pre-fetch Burst Length: 4, 8 Bi-directional Differential Data-Strobe On Die Termination with ODT pin Serial presence detect with EEPROM On DIMM Thermal Sensor Asynchronous reset
2
Dimensions (Unit: millimeter)
Note:
1. Tolerances on all dimensions +/-0.15mm unless otherwise specified.
3
Pin
No
Pin
Name
Pin
No
Pin
Name
Pin
No
Pin
Name
Pin
No
Pin
Name
Pin
No
Pin
Name
Pin
No
Pin
Name
01
VSS
89
VSS
177
DQS4_c
02
VSS
90
VSS
178
DM4_n/ DBI4_n
03
DQ5
91
CB1/NC
179
DQS4_t
04
DQ4
92
CB0/NC
180
VSS
05
VSS
93
VSS
181
VSS
06
VSS
94
VSS
182
DQ39
07
DQ1
95
DQS8_c
183
DQ38
08
DQ0
96
DM8_n/
DBI_n/NC
184
VSS
09
VSS
97
DQS8_t
185
VSS
10
VSS
98
VSS
186
DQ35
11
DQS0_c
99
VSS
187
DQ34
12
DM0_n/
DBI0_n
100
CB6/NC
188
VSS
13
DQS0_t
101
CB2/NC
189
VSS
14
VSS
102
VSS
190
DQ45
15
VSS
103
VSS
191
DQ44
16
DQ6
104
CB7/NC
192
VSS
17
DQ7
105
CB3/NC
193
VSS
18
VSS
106
VSS
194
DQ41
19
VSS
107
VSS
195
DQ40
20
DQ2
108
RESET_n
196
VSS
21
DQ3
109
CKE0
197
VSS
22
VSS
110
CKE1
198
DQS5_c
23
VSS
111
VDD
199
DM5_n/
DBI5_n
24
DQ12
112
VDD
200
DQS5_t
25
DQ13
113
BG1
201
VSS
26
VSS
114
ACT_n
202
VSS
27
VSS
115
BG0
203
DQ46
28
DQ8
116
ALERT_n
204
DQ47
29
DQ9
117
VDD
205
VSS
30
VSS
118
VDD
206
VSS
31
VSS
119
A12
207
DQ42
32
DQS1_c
120
A11
208
DQ43
33
DM1_n/
DBI_n
121
A9
209
VSS
34
DQS1_t
122
A7
210
VSS
35
VSS
123
VDD
211
DQ52
36
VSS
124
VDD
212
DQ53
37
DQ15
125
A8
213
VSS
38
DQ14
126
A5
214
VSS
39
VSS
127
A6
215
DQ49
40
VSS
128
A4
216
DQ48
41
DQ10
129
VDD
217
VSS
42
DQ11
130
VDD
218
VSS
43
VSS
131
A3
219
DQS6_c
44
VSS
132
A2
220
DM6_n/
DBI6_n
45
DQ21
133
A1
221
DQS6_t
46
DQ20
134
EVENT_n,
NF
222
VSS
47
VSS
135
VDD
223
VSS
48
VSS
136
VDD
224
DQ54
49
DQ17
137
CK0_t
225
DQ55
50
DQ16
138
CK1_t/NF
226
VSS
51
VSS
139
CK0_c
227
VSS
52
VSS
140
CK1_c/NF
228
DQ50
53
DQS2_c
141
VDD
229
DQ51
54
DM2_n/
DBI2_n
142
VDD
230
VSS
55
DQS2_t
143
PARITY
231
VSS
56
VSS
144
A0
232
DQ60
57
VSS
145
BA1
233
DQ61
58
DQ22
146
A10/AP
234
VSS
59
DQ23
147
VDD
235
VSS
60
VSS
148
VDD
236
DQ57
61
VSS
149
CS0_n
237
DQ56
62
DQ18
150
BA0
238
VSS
63
DQ19
151
WE_n/
A14
239
VSS
64
VSS
152
RAS_n/
A16
240
DQS7_c
65
VSS
153
VDD
241
DM7_n/
DBI7_n
66
DQ28
154
VDD
242
DQS7_t
67
DQ29
155
ODT0
243
VSS
68
VSS
156
CAS_n/
A15
244
VSS
69
VSS
157
CS1_n
245
DQ62
70
DQ24
158
A13
246
DQ63
71
DQ25
159
VDD
247
VSS
72
VSS
160
VDD
248
VSS
73
VSS
161
ODT1
249
DQ58
74
DQS3_c
162
C0/
CS2_n/NC
250
DQ59
75
DM3_n/
DBI3_n
163
VDD
251
VSS
76
DQS3_t
164
VREFCA
252
VSS
77
VSS
165
C1, CS3_n,
NC
253
SCL
78
VSS
166
SA2
254
SDA
79
DQ30
167
VSS
255
VDDSPD
80
DQ31
168
VSS
256
SA0
81
VSS
169
DQ37
257
VPP
82
VSS
170
DQ36
258
VTT
83
DQ26
171
VSS
259
VPP
84
DQ27
172
VSS
260
SA1
85
VSS
173
DQ33 - -
86
VSS
174
DQ32 - -
87
CB5/NC
175
VSS - -
88
CB4/NC
176
VSS - -
Note:
1. NC for Non ECC SO-DIMM.
Pin Assignments
4
Block Diagram 8GB, 1Gx72 Module(2 Rank x8)
This technical information is based on industry standard data and tests believed to be reliable. However, Transcend makes no warranties, either expressed or implied, as to its accuracy and assume no liability in connection with the use of this product. Transcend reserves the right to make changes
in specifications at any time without prior notice.
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