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Description
Description
DescriptionDescription
The Transcend TSxGMSA500/TSxGMSA300 is a
series of mSATA SSD device with high performance and
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mSATA SSD
Features
Features
Features Features
• RoHS compliant
• Power Supply: 3.3V±5%
quality Flash Memory assembled on a printed circuit
board. These devices feature cutting-edge technique to
enhance product life and data retention. By using these
techniques, the product is designed especially for some
tough applications, like industrial PC, vehicle PC and
road surveillance record.
Placement
Placement
PlacementPlacement
• Operating Temperature: 0oC to 70oC
• Storage Temperature: -40oC to 85oC
• Humidity (Non condensation): 0% to 95%
• TSxGMSA500 Built-in 8-bit/512Byte ECC (Error
Correction Code) functionality ensures highly reliable of
data transfer.
• TSxGMSA300 Built-in 15-bit/512Byte ECC (Error
Correction Code) functionality ensures highly reliable of
data transfer.
• Global wear-leveling algorithm eliminates excessive write
operation and extends product life.
• Support StaticDataRefresh & EarlyRetirement
technology to monitor error bit level and react before
data is corrupted.
•
Support S.M.A.R.T (Self-defined)
•
Support Security Command
• Fully compatible with devices and OS that support the
SATA 3Gb/s standard
Transcend Information Inc.
• Non-volatile SLC/MLC Flash Memory for outstanding
data retention
Dimensions
Dimensions
DimensionsDimensions
Side Millimeters Inches
W 29.85 1.175
L 50.80 2.000
1
H 3.5 0.137
V1.3
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Specifications
Specifications
SpecificationsSpecifications
Physical Specification
Form Factor
Storage Capacities
Dimensions (mm)
Input Voltage
Weight
Connector
Environmental Specifications
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Length
Width
Height
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MO-300
2GB~64GB
50.8 ± 0.15
29.85 ± 0.15
3.5 ± 0.1
3.3V ± 5%
9g
PCI Express Mini Card Connector
mSATA SSD
Operating Temperature
Storage Temperature
Humidity
Regulations
Compliance
Performance
Model P/N Read Write Random Read Random Write
TS2GMSA500
TS4GMSA500
TS8GMSA500
TS16GMSA500
Performance
Model P/N Read Write Random Read Random Write
Operating
Non-Operating
0 ℃ to 70 ℃
-40 ℃ to 85 ℃
0% to 95% (Non-condensing)
0% to 95% (Non-condensing)
CE, FCC and BSMI
50 MB/s 25 MB/s 50 MB/s 8 MB/s
50 MB/s 45 MB/s 50 MB/s 12 MB/s
100 MB/s 80 MB/s 80 MB/s 15 MB/s
100 MB/s 90 MB/s 80 MB/s 15 MB/s
TS16GMSA300
TS32GMSA300
TS64GMSA300
Transcend Information Inc.
95 MB/s 15 MB/s 55 MB/s 5 MB/s
95 MB/s 20 MB/s 70 MB/s 5 MB/s
95 MB/s 30 MB/s 55 MB/s 9 MB/s
2
V1.3
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Note:25 ℃, Typical value, test on ASUS P4S800-MX, 1GB RAM, Windows® XP Version 2002 SP2, benchmark utility
HDBENCH (version 3.4006), copied file 1GB
Actual Capacity
Model P/N User Max. LBA Cylinder Head Sector
TS2GMSA500 3,865,680 3,835 16 63
TS4GMSA500 7,732,368 7,671 16 63
TS8GMSA500 15,465,344 15,343 16 63
TS16GMSA500 30,932,992 16,383 15 63
TS16GMSA300 30,932,992 16,383 15 63
TS32GMSA300 61,865,984 16.383 15 63
TS64GMSA300 123,731,968 16,383 15 63
Power Requirements
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mSATA SSD
Input Voltage
Mode Max. (mA)
Write
(peak)
Power Consumption
SHOCK & Vibration Test
Condition Standard
Mechanical Shock Test
Vibration Test
Read
(peak)
Idle
(peak)
1500G, 0.5ms, 3 axes IEC 60068-2-27
20G (Peak-to-Peak)
20Hz to 2000Hz (Frequency)
3.3V ± 5%
352
371
141
IEC 60068-2-6
Transcend Information Inc.
3
V1.3
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Package Dimensions
Package Dimensions
Package DimensionsPackage Dimensions
Below figure illustrates the Transcend mSATA Solid State Disk product. All dimensions are in mm.
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mSATA SSD
Transcend Information Inc.
4
V1.3
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Pin
Pin Assignments
Assignments
Pin Pin
AssignmentsAssignments
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mSATA SSD
Pin No.
01 NC 02 3.3V
03 NC 04 GND
05 NC 06 NC
07 NC 08 NC
09 GND 10 NC
11 NC 12 NC
13 NC 14 NC
15 GND 16 NC
17 NC 18 GND
19 NC 20 NC
21 GND 22 NC
23 TX+ 24 3.3V
25 TX- 26 GND
27 GND 28 NC
29 GND 30 NC
31 RX- 32 NC
33 RX+ 34 GND
35 GND 36 NC
37 GND 38 NC
39 3.3V 40 GND
41 3.3V 42 NC
43 GND 44 NC
45 NC 46 NC
47 NC 48 NC
49 DNU 50 GND
51 Presence Detection 52 3.3V
Pin Name Pin No. Pin Name
Pin
Pin Layout
Layout
Pin Pin
LayoutLayout
Transcend Information Inc.
5
V1.3
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Block Diagram
Block Diagram
Block DiagramBlock Diagram
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mSATA Interface
SATA Flash
CTL
mSATA SSD
Flash
Flash
FlashFlash
Flash
Flash
FlashFlash
Flash
Flash
FlashFlash
Flash
Flash
FlashFlash
Transcend Information Inc.
6
V1.3
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Reliability
Reliability
Reliability Reliability
Wear-Leveling algorithm
The controller supports static/dynamic wear leveling. When the host writes data, the controller will find and use the block
with the lowest erase count among the free blocks. This is known as dynamic wear leveling. When the free blocks' erase
count is higher than a threshold value plus data blocks', it will activate the static wear leveling, replacing the not so
frequently used user blocks with the high erase count free blocks.
ECC algorithm
Using 15bit BCH Error Correction Code with each channel, the controller can correct 15 random bits per 512 byte data
sector for MLC NAND flash. The hardware executes parity generation and error detection/correction features.
StaticDataRefresh Technology
Normally, ECC engine corrections are taken place without affecting the host normal operations. As time passes by, the
number of error bits accumulated in the read transaction exceeds the correcting capability of the ECC engine, resulting in
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mSATA SSD
corrupted data being sent to the host. To prevent this, the controller monitors the error bit levels at each read operation;
when it reaches the preset threshold value, the controller automatically performs data refresh to “restore” the correct
charge levels in the cell. This implementation practically restores the data to its original, error-free state, and hence,
lengthening the life of the data.
EarlyRetirement Technology
The StaticDataRefresh feature functions well when the cells in a block are still healthy. As the block ages over time, it
cannot reliably store charge anymore and EarlyRetirement enters the scene. EarlyRetirement works by moving the static
data to another block (a health block) before the previously used block becomes completely incapable of holding charges
for data. When the charge loss error level exceeds another threshold value (higher from that for StaticDataRefresh), the
controller automatically moves its data to another block. In addition, the original block is then marked as a bad block,
which prevents its further use, and thus the block enters the state of “EarlyRetirement.”
Note that, through this process, the incorrect data are detected and effectively corrected by the ECC engine, thus the data
in the new block is stored error-free.
Transcend Information Inc.
7
V1.3