SERVICE MANUAL
8M266 CHASSIS
Design and specifications are subject to change without prior notice.
(Only Referrence)
SIZE:A5
Description:
MODEL.
JOB NO.
Engineering Dept:
Artwork By:
Checked By:
Approved By:
SERVICE MANUAL 8M26S
Brand Name:
SKYWORTH
Date:
Date:
Date:
2011-8-10
Content--------------------------------------------------------------2
11-17
18
19-20
21-28
29-45
46-49
50-57
NTSC-M PAL-M PAL-N
Component
VHF LOW 2~B
VHF HIGH C~W+11
VHF W+12~69
TOSHIBA CODE
55.25MHz ~ 127.25MHz
133.25MHz ~ 311.25MHz
367MHz ~ 801.25MHz
IC Block Diagram
U20 U23 U31(3.3V/1A 3-TERMINAL POSITIVE VOL TAGEREGULATOR) LD1117-3.3 SOT-223
-
8᧤9$/2:'523287/,1($5$55(*8/$725᧥/'$'-72
Thermal
Protection
A1
B
A2
For Adjustable Output, disconnect A1 and A2, connect B
For Fixed Output, connect A1 and A2, disconnect B
-
+
3
2
1
INPUT
OUTPUT
ADJ/
GND
-11-
U28˄1A 3.3V SOT-223˅AS1117L-ADJ
U6 ˄(1MHZ,800MA SYNCHRONOUS STEP-DOWN CONVERTER˅MP2105DJ TSOT23-5
-12-
IC Block Diagram
U10(LCDTV CONTROLLER WITH VIDEO ECODE)MST6E181VS
PIN DIAGRAM (MST6E181VS)
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
NC
NC
LDQS0
LDQM0
A_DDR1_BA0
DVDD_DDR_1.2V
A_DDR1_DQ8
A_DDR1_DQ9
AVDDIO_2.5V
A_DDR1_DQ10
A_DDR1_DQ11
A_DDR1_DQ12
A_DDR1_DQ13
A_DDR1_DQ14
AVDDIO_2.5V
A_DDR1_DQ15
A_DDR1_MCLKZ
AVDDIO_2.5V
A_DDR1_MCLK
A_DDR1_CKE
A_DDR1_A12
A_DDR1_A11
A_DDR1_A9
AVDDIO_2.5V
A_DDR1_A8
A_DDR1_A7
A_DDR1_A6
A_DDR1_A5
A_DDR1_A4
AVDD_NODIE
DVDD_NODIE
GND_EFUSE
GPIO11/SAR0
GPIO12/SAR1
GPIO13/SAR2
GPIO10/PMGPIO
GPIO6/PM1/TX
GPIO8/PM5/RX
GPIO9/PM6/CS1
AVDDIO_2.5V
GPIO7/PM4/POWER_ON
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
AVDD_PLL
UDQM0
UDQS0
A_MVREF
NC
VDDC
DDCR_DA
VDDP_3
DDCR_CK
TESTPIN
DM_P0
DP_P0
DM_P1
DP_P1
SPI_CK
SPI_DI
SPI_DO
SPI_CZ
DDCA_CK
DDCA_DA
E-pad
AVDDIO_2.5V
A_DDR1_DQ4
A_DDR1_DQ7
A_DDR1_DQ6
A_DDR1_DQ5
AVDDIO_2.5V
A_DDR1_DQ3
A_DDR1_DQ2
A_DDR1_DQ1
A_DDR1_DQ0
AVDDIO_2.5V
A_DDR1_CAS
A_DDR1_RAS
A_DDR1_WEZ
A_DDR1_BA1
A_DDR1_A0
A_DDR1_A1
A_DDR1_A2
A_DDR1_A3
A_DDR1_A10
NC
NC
VDDC
VDDP_2
GPIO21/PWM1
GPIO20/PWM0
GPIO77/I2S_OUT_MUTE/PWM3/LVSYNC
MST6E181VS
128
127
126
125
124
123
122
121
120
119
118
117
116
115
VDDC
AVDD_LPLL
R_ODD7/RXO0-
R_ODD5/RXO1-
AVDD2P5_MOD
GPIO75/I2S_IN_SD/PWM5/TX3/LDE
GPIO74/I2S_IN_WS/PWM4/RX3/LCK
GPIO76/I2S_IN_BCK/PWM2/LHSYNC
R_ODD3/RXO2-
R_ODD1/RXOC-
R_ODD6/RXO0+
R_ODD4/RXO1+
R_ODD2/RXO2+
114
113
112
111
110
109
G_ODD3/RXE0-
G_ODD7/RXO3-
G_ODD5/RXO4-
G_ODD6/RXO3+
G_ODD4/RXO4+
R_ODD0/RXOC+
G_ODD2/RXE0+
AVDD2P5_MOD
108
G_ODD1/RXE1-
107
G_ODD0/RXE1+
106
B_ODD7/RXE2-
105
B_ODD6/RXE2+
104
B_ODD5/RXEC-
103
B_ODD4/RXEC+
102
B_ODD3/RXE3-
101
B_ODD2/RXE3+
100
B_ODD1/RXE4-
99
B_ODD0/RXE4+
98
NC
97
GPIO49
96
GPIO47
95
GPIO45
94
GPIO38
93
GPIO37
92
GPIO36
91
GPIO32/I2S_OUT_BCK
90
GPIO30/I2S_OUT_MCK
89
GPIO28
88
VDDP_1
87
VDDC
86
GPIO27/SPDIF_OUT
85
GPIO26/SPDIF_IN/RX1/PWM3
84
GPIO25/TUNER_SDA
83
GPIO24/TUNER_SCL
82
GPIO23/I2S_OUT_SD/TX2
81
GPIO22/I2S_OUT_WS/RX2
80
TAGC
79
SIFM
78
SIFP
77
AVDD25_PGA
76
VIFP
75
VIFM
74
AVSS_PGA
73
AVDD25_REF
72
AVDD_DMPLL
71
XTAL_OUT
70
XTAL_IN
69
NC
68
NC
67
NC
66
LINEOUT_R0
65
LINEOUT_L0
64
LINEOUT_R3
63
LINEOUT_L3
62
AVDD_AU33
61
LINEIN_R5
60
LINEIN_L5
59
LINEIN_R4
58
LINEIN_L4
57
LINEIN_R3
56
LINEIN_L3
55
U?
IRIN
2
1
9876543
10
RX1N
AVDD_DVI_3.3V
RX0P
RX0N
RXCP
RXCN
HOTPLUGA
RESET
CEC
HSYNC0
VDDC
NC
NC
SOGIN0
BIN0P
2726252423222120191817161514131211
GIN0M
GIN0P
VSYNC0
RIN0P
SOGIN1
BIN1P
AVDD2P5_ADC
AVDD1P2
GIN1M
GIN1P
CVBS3
CVBS4
AVDD3P3_ADC
RIN1P
CVBS1
CVBS2
CVBS0
4443424140393837363534333231302928
45
CVBS_OUT1
VCOM
LINEIN_L0
LINEIN_R1
LINEIN_L1
LINEIN_R0
VRM
VRP
VAG
545352515049484746
AVDD_AU25
NCNCNCNCNC
ARC
DDCDA_CK
RX2P
RX2N
DDCDA_DA
RX1P
-13-
IC Block Diagram
U29 (4MX16BIT BANKS DDR) M13S2561616A-5TG2K
-14-
IC Block Diagram
8᧤0%,7&0266(5,$/)/$6+᧥623
Address
Generator
MemoryArray
Page Buffer
SI/SIO0
SO /S IO1
CS#,
WP#,
HOLD#
S CLK Clock G enerator
Data
Register
SRAM
B uffer
M ode
Logic
S tate
Machine
Y-D ecoder
Sense
Am plifier
HV
Generator
Output
B uffer
-15-
IC Block Diagram
U19(HDMI SWITCH) PS331TQFP64G
SiI9185 Pin Mapping
POW_SINK
HPD3
SDA3
SCL3
B31
A31
POW3
B32
A32
GND
B33
A33
VCC
B34
A34
CEXT
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
SDA_SINK
48 47
Z1
SCL_SINK
46
HPD_SINK
Y1
Y2
Z2
45 44 43 42 41
GND
Z4
Z3
Y3
VCC
Y4
PS331
1
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
I2C_ADDR
SCL_CTL
SDA_CTL
3334353637383940
POWDN
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
REXT
A14
B14
NC
A13
B13
GND
A12
B12
VCC
A11
B11
SCL1
SDA1
I2C_RST
B21
SDA2
HPD2
SCL2
A21
B22
POW2
A22
GND
B23
A23
B24
VCC
A24
HPD1
POW1
-16-
IC Block Diagram
U1(DUAL BTLCLASS DAUDIO AMPLIFIER) TPA3113D2
SD
FAULT
LINP
LINN
GAIN0
GAIN1
AVCC
AGND
GVDD
PLIMIT
RINN
RINP
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
28
27
26
25
24
23
22
21
20
19
18
17
16
PVCCL
PVCCL
BSPL
OUTPL
PGND
OUTNL
BSNL
BSNR
OUTNR
PGND
OUTPR
BSPR
PVCCR
PBTL
14
-17-
15
PVCCR