Texas Instruments UCC2891EVM User Manual
48-V to 3.3-V Forward Converter with
Active Clamp Reset Using the
UCC2891 Active Clamp Current Mode
PWM Controller
User's Guide
December 2006 Power Supply MAN
SLUU178A
48-V to 3.3-V Forward Converter with Active
Clamp Reset Using the UCC2891 Active
Clamp Current Mode PWM Controller
User's Guide
Literature Number: SLUU178A
November 2003 – Revised December 2006
User's Guide
SLUU178A – November 2003 – Revised December 2006
Using the UCC2891 Active Clamp Current Mode PWM
Controller
1 Introduction
The UCC2891EVM evaluation module (EVM) is a forward converter providing a 3.3-V regulated output at
30 A of load current, operating from a 48-V input. The EVM operates over the full 36 V to 72 V telecom
input range, and is able to fully regulate down to zero load current. The module uses the UCC2891 current
mode active clamp PWM controller for effectively demonstrating the active clamp transformer reset
technique.
Benefits of the active clamp include a control driven transformer reset scheme allowing zero voltage
switching (ZVS) to increase overall efficiency, lower drain-to-source voltage stress, extended duty cycle
beyond 50% and reduced electromagnetic radiated emissions. Combined with synchronous rectification,
this EVM is configured to operate at 300 kHz and exhibits a peak efficiency of just over 92%, with a full
load efficiency of 89%. The EVM displays many features that might be typical of a more complex design,
yet its compact board layout and low component count make it elegantly simple.
2 Description
The UCC2891 controller family provides advanced active clamp control features such as programmable
maximum duty cycle clamp, programmable dead time between the two primary switches and the ability to
drive either a P-channel, or N-channel MOSFET in either a high-side or low-side active clamp
configuration. The UCC2891 also allows the ability to start-up directly from the 48-V telecom bus voltage,
eliminating the need for external start-up circuitry. It includes programmable soft start, internal slope
compensation for peak current mode control, internal low-line voltage sensing, internal syncronizable clock
input, cycle-by-cycle current limiting, and a robust 2-A sink/source TrueDrive™ internal gate drive circuit.
The result is a highly efficient design loaded with features, requiring very few external components.
The TrueDrive™ hybrid output architecture used in the UCC2891 uses TI's unique TrueDrive™
Bipolar/CMOS output. To the user, this simply means ultra-fast rise and fall times by providing the highest
possible drive current where it is needed most, at the MOSFET Miller plateau region.
The UCC2891/2/3/4 is available in either a 16-pin SOIC or 16-pin TSSOP package for applications where
absolute minimal board space is required.
The UCC2891EVM highlights the many benefits of using the UCC2891 active clamp current mode PWM
controller. This user's guide provides the schematic, component list, assembly drawing, artwork and test
set up necessary to evaluate the UCC2891 in a typical telecom application. More detailed design
information can be found listed in the References section.
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Description
2.1 Applications
The UCC2891 is suited for use in isolated telecom 48-V input systems requiring high-efficiency and
high-power density for very low-output voltage, high-current converter applications, including:
• Server Systems
• Datacom
• Telecom
• DSP's, ASIC's, FPGA's
2.2 Features
The UCC2891EVM features include:
• ZVS transformer reset using active clamp technique in forward converter
• All surface mount components, double sided half brick (2.2 × 2.28 × 0.5) inches
• Complementary auxilliary drive for active clamp with programmable dead time for ZVS
• Current mode control with synchronization function
• Internal PWM slope compensation
• Start-up directly from telecom input voltage
• Synchronous rectifier output stage allows high-efficiency operation
• Programmable soft-start
• Up to 30-A dc output current
• Regulation to zero load current
• Non-latching, output overcurrent and short circuit protection
• Non-latching, Input undervoltage protection
• 1500-V isolation primary to secondary
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3 UCC2891EVM Electrical Performance Specifications
The UCC2891EVM electrical performance specifications are listed in Table 1 .
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
Input Characteristics
Input voltage range 36 48 72 V
No load intput current VIN= 36 V, I
Maximum input current VIN= 36 V, I
Input voltage ripple VIN= 72 V, I
Input voltage ripple
Output voltage 36 V ≤ VIN≤ 72 V, 0 A ≤ I
Output voltage regulation Line regulation (36 V ≤ VIN≤ 72 V, I
Output voltage ripple VIN= 48 V, I
Output load current VIN= 48 V, I
Output current limit 36 V ≤ VIN≤ 72 V 32
Output current limit
Switching frequency 275 325
Control loop bandwidth 36 V ≤ VIN≤ 72 V, I
Control loop bandwidth 36 V ≤ VIN≤ 72 V, 2 A ≤ I
Peak efficiency 92%
Full load efficiency VIN= 48 V, I
Table 1. UCC2891EVM Performance Summary
= 0 A 75 100 mA
OUT
= 30 A 3.00 3.25 A
OUT
= 30 A 1.50 1.75 V
OUT
≤ 30 A 3.25 3.30 3.35 V
OUT
Load regulation (0 A ≤ I
= 30 A 30 35 mV
OUT
= 30 A 0 30
OUT
= 30 A 89%
OUT
≤ 30 A, VIN= 48 V) 0.060%
OUT
= 10 A 5 8
OUT
≤ 30 A 30 50 ° C
OUT
UCC2891EVM Electrical Performance Specifications
= 0 A) 0.003%
OUT
P-P
P-P
A
kHz
4 Schematic
A schematic of the UCC2891EVM is shown in Figure 1 . Terminal block J1 is the 48-V input voltage source
connector and J8 is the output and return for the 3.3-V output voltage.
On the primary side, U1 is the UCC2891 shown with the necessary discrete circuitry for configuring the
controller to operate at 300 kHz with the maximum duty clamp set for 0.65. The EVM is programmed to
start at VIN=36 V, as determined by R11 and R12. To minimize power dissipation in the current sense, a
current sense transformer, T1 is used, as opposed to simply using a sense resistor between the source of
Q2 and power ground. Q2 is the primary switching MOSFET and is selected based upon VDS and low
RDS(on). Q1 is the AUX (active reset) MOSFET and is selected based upon preferred package only, with
only minor consideration given for R
referenced, Q1 must be a P-channel type MOSFET. The reason for this is further explained in application
note SLUA299[2]. C9 is the clamp capacitor used to maintain a constant dc voltage. The input voltage is
subtracted from the clamp voltage to allow transformer reset during the active clamp period.
and Qg. Since the active clamp used in this design is low-side
DS(on)
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+
+
+
+
Schematic
6 Using the UCC2891 Active Clamp Current Mode PWM Controller SLUU178A – November 2003 – Revised December 2006
Figure 1. UCC2891EVM Schematic
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V2
-
+
J1
+Vout -V out
J9
J10
Loop+
Loop-
J6
J7
Texas Instruments
HPA034
UCC2891 Active Clamp Converter
J3
V-Clamp
J2
Q2 Gate
J4
SR-QF Gate
J5
SR-QR Gate
LOAD1
3.3V/30A
-
+
A1
VIN
-
+
V1
FAN
+
+
--
-+
+VIN
-VIN
DANGER HIGH VOLTAGE
+VOUT
-VOUT
J8
High efficiency is achieved using self-driven synchronous rectification on the secondary side. Q3 and Q4
are placed in parallel and make up the forward synchronous rectifier (SR), while the reverse SR is made
up of the parallel combination of Q5, Q7 and Q8. If the duty cycle were limited to 50% then the reverse SR
could be reduced to only two parallel MOSFETs, but since these devices are operating near 60% duty
cycle during the freewheel mode, they carry a higher average current than seen by Q3 and Q4. The
output inductor L1 has a coupled secondary, referenced to the primary side, used to provide bootstrapping
voltage to U1. A stable bias for the optocoupler, U2 is provided by the series pass regulator made up of
D6, Q6 and some associated filtering.
Scope jacks J2 and J3 allow the user to measure the gate-to-source and drain-to-source signals for Q2,
the primary MOSFET. J4 and J5 allow convenient access to the gate drive signals of each SR on the
secondary side. J6 and J7 are available allowing the option of using a network analyzer to non-invasively
measure the control to output loop gain and phase.
5 EVM Test Setup
Figure 2 shows the basic test set up recommended to evaluate the UCC2891EVM.
EVM Test Setup
Figure 2. Recommended EVM Test Configuration
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