TEXAS INSTRUMENTS UC1525A, UC1527A, UC2525A, UC2527A, UC3525A Technical data

...

15 12

3 6 5 7

9 1 2 8

Reference

Regulator

16 4

OSC

50 m

COMP

+VIN

GROUND

SYNC

DISCHARGE

COMPENSATION

INV INPUT

NI INPUT

SOFTSTART

SHUTDOWN OUTPUT B

OUTPUT A

OUTPUT B

OUTPUT A

NOR

REF

Error Amp

VREF

OSC OUT

To Internal

Circutry

UVLO

Lockout

Flip

Flop

PWM

Latch

3 kW

5 kW

UC1527A

Output Stage

UC1525A

Output Stage

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REGULATING PULSE WIDTH MODULATORS

FEATURES

• 8-V to 35-V Operation

• 5.1-V Reference Trimmed to 1%

• 100-Hz to 500-kHz Oscillator Range

• Separate Oscillator Sync Terminal

• Adjustable Deadtime Control

• Internal Soft-Start

• Pulse-by-Pulse Shutdown

• Input Undervoltage Lockout With Hysteresis

• Latching PWM to Prevent Multiple Pulses

• Dual Source/Sink Output Drivers

UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008

DESCRIPTION

The UC1525A/1527A series of pulse width modulator integrated circuits are designed to offer improved performance and lowered external parts count when used in designing all types of switching power supplies. The on-chip +5.1-V reference is trimmed to 1% and the input common-mode range of the error amplifier includes the reference voltage, eliminating external resistors. A sync input to the oscillator allows multiple units to be slaved or a single unit to be synchronized to an external system clock. A single resistor between the C provides a wide range of dead-time adjustment. These devices also feature built-in soft-start circuitry with only an external timing capacitor required. A shutdown terminal controls both the soft-start circuitry and the output stages, providing instantaneous turn off through the PWM latch with pulsed shutdown, as well as soft-start recycle with longer shutdown commands.

and the discharge terminals

BLOCK DIAGRAM

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

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UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION (continued)

These functions are also controlled by an undervoltage lockout which keeps the outputs off and the soft-start capacitor discharged for sub-normal input voltages. This lockout circuitry includes approximately 500 mV of hysteresis for jitter- free operation. Another feature of these PWM circuits is a latch following the comparator. Once a PWM pulse has been terminated for any reason, the outputs will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem-pole designs capable of sourcing or sinking in excess of 200 mA. The UC1525A output stage features NOR logic, giving a LOW output for an OFF state. The UC1527A utilizes OR logic which results in a HIGH output level when OFF.

ABSOLUTE MAXIMUM RATINGS

(1) Values beyond which damage may occur. (2) See Thermal Characteristics table.

Supply voltage 40 Collector supply voltage 40 Logic inputs – 0.3 to +5.5 Analog inputs – 0.3 to +V Output current, source or sink 500 Reference output current 50 mA Oscillator charging current 5 Power dissipation at TA= +25 ° C Power dissipation at TC= +25 ° C Operating junction temperature – 55 to 150 Storage temperature range – 65 to 150 ° C Lead temperature (soldering, 10 seconds) 300

(1)

(2) (2)

RECOMMENDED OPERATING CONDITIONS

(1) Range over which the device is functional and parameter limits are assured.

Input voltage 8 35 Collector supply voltage 4.5 35 Sink/source load current (steady state) 0 100 Sink/source load current (peak) 0 400 mA Reference load current 0 20 Oscillator frequency range 100 400 Hz Oscillator timing resistor 2 150 k Ω Oscillator timing capacitorm 0.001 0.01 µ F Dead time resistor range 0 500 Ω

Operating ambient temperature range UC2525A, UC2527A – 25 85 ° C

UCx52xA UNIT

1000 2000

(1)

MIN MAX UNIT

UC1525A, UC1527A – 55 125

UC3525A, UC3527A 0 70

Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

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THERMAL CHARACTERISTICS

1 2 3 4 5 6 7 8

16 15 14 13 12 11 10

INV Input

NI Input

SYNC

OSC Output

Discharge

Soft Start

REF

Output B V

Ground Output A Shutdown Compensation

J or N PACKAGE

(TOP VIEW)

3 2 1 20 19

9 10 11 12 13

4 5 6 7 8

18 17 16 15 14

Output B V

NC Ground Output A

SYNC

OSC Output

Q AND L PACKAGES

(TOP VIEW)

NI Input

INV Input

Compensation

Shutdown

Discharge

Soft Start

REF

NC − No internal connection

over operating free-air temperature range (unless otherwise noted)

PACKAGE θ

J-16 80-120 28

N-16 90 45

DW-16 45-90 25

PLCC-20 43-75 34

LCC-20 70-80 20

UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008

CONNECTION DIAGRAMS

PLCC-20, LCC-20

DIL-16

Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

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f +

0.7RT) 3R

UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008

ELECTRICAL CHARACTERISTICS

= 20 V, and over operating temperature, unless otherwise specified, TA= T

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

REFERENCE

Output voltage TJ= 25 ° C V

UC152xA, UC252xA 5.05 5.10 5.15

Line regulationg VIN= 8 V to 35 V 10 20 Load regulationg IL= 0 mA to 20 mA 20 50 mV Temperature stability

Total output variation

Shorter circuit current V Output noise Voltage Long term stability

OSCILLATOR SECTION

Initial accuracy

Voltage stability

Temperature stability

(1)

(2)

(1) (2)

(1)

Over operating range 20 50

Line, load, and temperature V

= 0, TJ= 25 ° C 80 100 mA

REF

UC152xA, UC252xA 5.0 5.2

10 Hz ≤ 10 kHz, TJ= 25 ° C 40 200 µ Vrms TJ= 125 ° C 20 50 mV

TJ= 25 ° C 2% 6%

VIN= 8 V to 35 V

UC152xA, UC252xA 0.3% 1%

Over operating range 3% 6% Minimum frequency RT= 200 k Ω , CT= 0.1 µ F 120 Hz Maximum frequency RT= 2 k Ω , CT= 470 pF 400 kHz Current mirror IRT= 2 mA 1.7 2.0 2.2 mA Clock amplitude Clock width Syncronization threshold

(1) (2)

TJ= 25 ° C 0.3 0.5 1.0 µ s

Sync input current Sync voltage = 3.5 V 1.0 2.5 mA

ERROR AMPLIFIER SECTION (V

Input offset voltage

= 5.1 V)

UC152xA, UC252xA 0.5 5 mV

Input bias current 1 10 Input offset current 1 DC open loop gain RL≥ 10 M Ω 60 75 dB Gain-bandwidth product DC transconductanc

(1)

(1) (3)

AV= 0 dB, TJ= 25 ° C 1 2 MHz

TJ= 25 ° C, 30 k Ω ≤ RL≤ 1 M Ω 1.1 1.5 mS Low-level output voltage 0.2 0.5 High-level output voltage 3.8 5.6 Common mode rejection V

= 1.5 V to 5.2 V 60 75

Supply voltage rejection VIN= 8 V to 35 V 50 60

(1) These parameters, although ensured over the recommended operating conditions, are not 100% tested in production. (2) Tested at f

OSC

= 40 kHz (R

= 3.6 k Ω , CT= 0.01 µ F, RD= 0. Approximate oscillator frequency is defined by:

UC352xA 5.0 5.1 5.2

UC352xA 4.95 5.25

UC352xA 1% 2%

3.0 3.5 V

1.2 2.0 2.8 V

UC352xA 2 10

µ A

(3) DC transconductance (gM) relates to DC open-loop voltage gain (AV) according to the following equation: AV= gMRLwhere RLis the

resistance from pin 9 to ground. The minimum gMspecification is used to calculate minimum AVwhen the error amplifier output is loaded.

Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A

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