Texas instruments TUSB8040 Data Manual
TUSB8040
USB 3.0 Four Port Hub
Data Manual
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Literature Number: SLLSE42
September 2010
TUSB8040
SLLSE42–SEPTEMBER 2010
www.ti.com
Contents
1 PRODUCT OVERVIEW ......................................................................................................... 5
1.1 Features ...................................................................................................................... 5
1.2 Introduction .................................................................................................................. 6
1.3 Functional Block Diagram .................................................................................................. 7
2 PIN DESCRIPTIONS ............................................................................................................. 8
2.1 Clock and Reset Signals ................................................................................................... 9
2.2 USB Upstream Signals ..................................................................................................... 9
2.3 USB Downstream Signals ................................................................................................ 10
2.4 I
2.5 Test and Miscellaneous Signals ......................................................................................... 11
2.6 Power Signals .............................................................................................................. 12
3 FUNCTIONAL DESCRIPTION ............................................................................................... 13
3.1 I
3.2 SMBus Slave Operation .................................................................................................. 13
3.3 Configuration Registers ................................................................................................... 14
4 CLOCK GENERATION ........................................................................................................ 21
4.1 Crystal Requirements ..................................................................................................... 21
4.2 Input Clock Requirements ................................................................................................ 21
5 POWER UP AND RESET ..................................................................................................... 22
6 ELECTRICAL SPECIFICATIONS (PRELIMINARY DATA) .......................................................... 23
6.1 ABSOLUTE MAXIMUM RATINGS ...................................................................................... 23
6.2 RECOMMENDED OPERATING CONDITIONS ....................................................................... 23
6.3 HUB INPUT SUPPLY CURRENT ....................................................................................... 23
2
C/SMBUS Signals ....................................................................................................... 11
2
C EEPROM Operation .................................................................................................. 13
3.3.1 ROM Signature Register ....................................................................................... 14
3.3.2 Vendor ID LSB Register ....................................................................................... 14
3.3.3 Vendor ID MSB Register ...................................................................................... 14
3.3.4 Product ID LSB Register ....................................................................................... 15
3.3.5 Product ID MSB Register ...................................................................................... 15
3.3.6 Device Configuration Register ................................................................................ 15
3.3.7 Battery Charging Support Register ........................................................................... 16
3.3.8 Device Removable Configuration Register .................................................................. 16
3.3.9 Port Used Configuration Register ............................................................................ 17
3.3.10 UUID Registers ................................................................................................. 17
3.3.11 Language ID LSB Register .................................................................................... 17
3.3.12 Language ID MSB Register ................................................................................... 18
3.3.13 Serial Number String Length Register ....................................................................... 18
3.3.14 Manufacturer String Length Register ........................................................................ 18
3.3.15 Product String Length Register ............................................................................... 19
3.3.16 Serial Number Registers ....................................................................................... 19
3.3.17 Manufacturer String Registers ................................................................................ 19
3.3.18 Product String Registers ....................................................................................... 20
3.3.19 Device Status and Command Register ...................................................................... 20
2 Contents Copyright © 2010, Texas Instruments Incorporated
TUSB8040
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SLLSE42–SEPTEMBER 2010
List of Figures
1-1 Typical Application................................................................................................................. 6
1-2 Functional Block Diagram ........................................................................................................ 7
4-1 TUSB8040 Clock ................................................................................................................. 21
Copyright © 2010, Texas Instruments Incorporated List of Figures 3
TUSB8040
SLLSE42–SEPTEMBER 2010
www.ti.com
List of Tables
2-1 Clock and Reset Signals.......................................................................................................... 9
2-2 USB Upstream Signals............................................................................................................ 9
2-3 USB Downstream Signals....................................................................................................... 10
2-4 I
2-5 Test and Miscellaneous Signals................................................................................................ 11
2-6 Power Signals .................................................................................................................... 12
3-1 TUSB8040 Register Map........................................................................................................ 13
3-2 Register Offset 0h................................................................................................................ 14
3-3 Bit Descriptions – ROM Signature Register .................................................................................. 14
3-4 Register Offset 1h................................................................................................................ 14
3-5 Bit Descriptions – Vendor ID LSB Register .................................................................................. 14
3-6 Register Offset 2h................................................................................................................ 14
3-7 Bit Descriptions – Vendor ID MSB Register ................................................................................. 14
3-8 Register Offset 3h................................................................................................................ 15
3-9 Bit Descriptions – Product ID MSB Register ................................................................................. 15
3-10 Register Offset 4h................................................................................................................ 15
3-11 Bit Descriptions – Product ID MSB Register ................................................................................. 15
3-12 Register Offset 5h................................................................................................................ 15
3-13 Bit Descriptions – Device Configuration Register ........................................................................... 15
3-14 Register Offset 6h................................................................................................................ 16
3-15 Bit Descriptions – Battery Charging Support Register ...................................................................... 16
3-16 Register Offset 7h................................................................................................................ 16
3-17 Bit Descriptions – Device Removable Configuration Register ............................................................. 16
3-18 Register Offset 8h................................................................................................................ 17
3-19 Bit Descriptions – Port Used Configuration Register ....................................................................... 17
3-20 Register Offset 10h-1Fh......................................................................................................... 17
3-21 Bit Descriptions – UUID Byte N Register ..................................................................................... 17
3-22 Register Offset 20h .............................................................................................................. 17
3-23 Bit Descriptions – Language ID LSB Register ............................................................................... 17
3-24 Register Offset 21h .............................................................................................................. 18
3-25 Bit Descriptions – Language ID LSB Register ............................................................................... 18
3-26 Register Offset 22h .............................................................................................................. 18
3-27 Bit Descriptions – Serial Number String Length Register .................................................................. 18
3-28 Register Offset 23h .............................................................................................................. 18
3-29 Bit Descriptions – Manufacturer String Length Register ................................................................... 18
3-30 Register Offset 24h .............................................................................................................. 19
3-31 Bit Descriptions – Product String Length Register .......................................................................... 19
3-32 Register Offset 30h-4Fh......................................................................................................... 19
3-33 Bit Descriptions – Serial Number Byte N Register .......................................................................... 19
3-34 Register Offset 50h-8Fh......................................................................................................... 19
3-35 Bit Descriptions – Manufacturer String Register ............................................................................ 19
3-36 Register Offset 90h-CFh ........................................................................................................ 20
3-37 Bit Descriptions – Product String Register ................................................................................... 20
3-38 Register Offset F8h .............................................................................................................. 20
3-39 Bit Descriptions – Device Status and Command Register ................................................................. 20
2
C/SMBUS Signals.............................................................................................................. 11
4 List of Tables Copyright © 2010, Texas Instruments Incorporated
TUSB8040
www.ti.com
SLLSE42–SEPTEMBER 2010
USB 3.0 Four Port Hub
Check for Samples: TUSB8040
1 PRODUCT OVERVIEW
1.1 Features
1
• USB 3.0 Compliant Four Port Hub, TID# 330000003
– Upstream Port Supports SuperSpeed, High-Speed and Full-Speed Connections
– Each of the Four Downstream Ports Support SuperSpeed, High-Speed, Full-Speed/Low-Speed
Connections
• USB 2.0 Hub Features
– Four Transaction Translators, One Per Port
– Four (Over USB Required Minimum of Two) Asynchronous Endpoint Buffers Per Transaction
Translator for Better Throughput
• Supports Charging Downstream Port (CDP) Applications
– Battery Charging 1.1 Compliant
• Supports Operation as a USB 3.0 or USB 2.0 Compound Device
• Supports Ganged Power Switching and Over-Current Protection
• Provides the following status outputs:
– High-Speed Operation
– High-Speed Upstream Port Suspended
– SuperSpeed Upstream Connection
– SuperSpeed Upstream Port Suspended
• Optional Serial EEPROM or SMBus Slave Interface for Custom Configurations:
– VID/PID
– Manufacturer and Product Strings
– UUID
– Serial Number
• Via EEPROM or SMBus Slave Interface, Each Downstream Port Can Be Independently:
– Enabled or Disabled
– Marked as Removable or Permanently Attached (for Compound Applications)
• Provides Unique 12-Hex-Character Serial Number String and 128-Bit Universally Unique Identifier
(UUID)
• Configurable SMBus Address to Support Multiple Devices on the Same SMBus Segment
• Supports On-Board and In-System EEPROM Programming Via the USB 2.0 Upstream Port
• Single Clock Input, 24-MHz Crystal or Oscillator
• Industrial Temperature Range, –40°C to 85°C
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
USB 3.0 Host Controller
USB 2.0
Device
USB 3.0
Device
TUSB8040
USB 3.0
Hub
USB 2.0 Hub
USB 3.0
Device
USB 2.0
Device
USB 2.0 Connection
USB 3.0 Connection
USB 2.0/3.0 Device
USB 3.0 Device
USB 2.0 Device
USB 3.0 System Implementation
USB 1.x Device
USB 2.0
Device
USB 3.0
Device
USB 1.1
Device
USB 1.1
Device
USB 1.x Connection
TUSB8040
SLLSE42–SEPTEMBER 2010
1.2 Introduction
The TUSB8040 is USB 3.0 compliant hub available in an 80-pin QFP package. The device is designed for
operation over the industrial temperature range of –40°C to 85°C.
The TUSB8040 provides simultaneous SuperSpeed and high-speed/full-speed connections on the
upstream port and provides SuperSpeed, high-speed, full-speed, or low-speed connections on the
downstream ports. When the upstream port is connected to an electrical environment that only supports
high-speed or full-speed/low-speed connections, SuperSpeed connectivity is disabled on the downstream
ports. When the upstream port is connected to an electrical environment that only supports
full-speed/low-speed connections, SuperSpeed and high-speed connectivity are disabled on the
downstream ports.
The TUSB8040 supports up to four downstream ports. It may be configured to report one to four
downstream ports by an attached EEPROM or SMBus controller. The configuration options provide the
ability to scale the device by application.
A typical system view of the TUSB8040 is shown in Figure 1-1.
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6 PRODUCT OVERVIEW Copyright © 2010, Texas Instruments Incorporated
Figure 1-1. Typical Application
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VBUS
Detect
SuperSpeed HubUSB 2.0 Hub
USB_DP_UP
USB_SSRXP_UP
USB_SSRXM_UP
USB_SSTXP_UP
USB_SSTXM_UP
USB_DM_UP
USB_SSRXP_DN0
USB_SSRXM_DN0
USB_SSTXP_DN0
USB_SSTXM_DN0
USB_SSRXP_DN1
USB_SSRXM_DN1
USB_SSTXP_DN1
USB_SSTXM_DN1
USB_SSRXP_DN2
USB_SSRXM_DN2
USB_SSTXP_DN2
USB_SSTXM_DN2
USB_SSRXP_DN3
USB_SSRXM_DN3
USB_SSTXP_DN3
USB_SSTXM_DN3
USB_DP_DN0
USB_DM_DN0
USB_DP_DN1
USB_DM_DN1
USB_DP_DN2
USB_DM_DN2
USB_DP_DN3
USB_DM_DN3
Oscilator
USB_R1
USB_R1RTN
USB_VBUS
XI
VSSOSC
XO
Clock
and
Reset
Distribution
Control
Registers
Boundary
Scan
Power
Distribution
JTAG_TRSTn
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TCK
VDD33
VSS
GRSTz
I2C/
SMBUS
SCL/SMBCLK
SDA/SMDAT
SMBUSz
VDD11
GPIO
Block
PWRON0z_BATEN0
OVERCUR0z
SS
HS
HS_SUSPEND
SS_SUSPEND
FULLPWRMGMTz_SMBA1
TUSB8040
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1.3 Functional Block Diagram
The TUSB8040PFP is a reduced footprint hub that supports ganged power switching and over-current
protection. A ganged hub switches on power to all its downstream ports when power is required to be on
for any port. The power to the downstream ports is not switched off unless all ports are in a state that
allows power to be removed. Also when a ganged hub sense an over-current event, power to all
downstream ports will be switched off. It also provides customization using an I2C EEPROM or
configuration via an SMBus host for vendor specific PID, VID, and strings. Ports can also be marked as
disabled or permanently attached using an I2C EEPROM or an SMBus host.
The Device Status and Command Register at F8h cannot be modified by the contents of the I2C
EEPROM.
SLLSE42–SEPTEMBER 2010
Copyright © 2010, Texas Instruments Incorporated PRODUCT OVERVIEW 7
Figure 1-2. Functional Block Diagram
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40 OVERCUR0z
39 PWRON0z_BATEN0
38 VDD33
37 VDD11
36 SMBUSz
35 SDA_SMBDAT
34 SCL_SMBCLK
33 GRSTz
32 VDD11
31 JTAG_TDI
30 JTAG_RSTz
29 JTAG_TDO
28 JTAG_TMS
27 JTAG_TCK
26 VDD11
25 SS_SUSPEND
24 HS_SUSPEND
23 SS
22 HS
21 VDD33
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VDD11
VDD11
USB_SSTXM_UP
USB_SSTXP_UP
USB_SSRXM_UP
USB_SSRXP_UP
VDD11
VDD33
USB_DM_UP
USB_DP_UP
VDD11
VDD33
USB_VBUS
XO
VSS_OSC
XI
VDD33
USB_R1
USB_R1RTN
VDD33
USB_DP_DN1
USB_DM_DN1
VDD33
VDD11
USB_SSTXM_DN1
USB_SSTXP_DN1
USB_SSRXM_DN1
USB_SSRXP_DN1
VDD11
VDD11
USB_SSTXM_DN3
USB_SSTXP_DN3
USB_SSRXM_DN3
USB_SSRXP_DN3
VDD11
USB_DP_DN3
USB_DM_DN3
VDD33
VDD11
FULLPWRMGMTz_SMBA1
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
VDD11
USB_DP_DN0
USB_DM_DN0
VDD33
VDD11
USB_SSRXP_DN0
USB_SSRXM_DN0
USB_SSTXP_DN0
USB_SSTXM_DN0
VDD11
VDD11
USB_SSRXP_DN2
USB_SSRXM_DN2
USB_SSTXP_DN2
USB_SSTXM_DN2
VDD11
USB_DP_DN2
USB_DM_DN2
VDD33
VDD11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Thermal Pad
PFP PACKAGE
(TOP VIEW)
TUSB8040
SLLSE42–SEPTEMBER 2010
2 PIN DESCRIPTIONS
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TYPE DESCRIPTION
I Input
O Output
I/O Input/output
PD, PU Internal pull-down/pull-up
PT Passive pass through
P Power Supply
G Ground
8 PIN DESCRIPTIONS Copyright © 2010, Texas Instruments Incorporated
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