Texas Instruments TUSB1042 User Manual
User's Guide
SLLU277–September 2017
TUSB1042 Evaluation Module
The TUSB1042EVM (EVM) is a VESA USB Type-C™ Alternate Mode redriving switch supporting data
rates up to 10 Gbps for a downstream facing port (Host). This guide describes how to bring up the EVM
and includes schematics that can be used as reference design for the alternate mode implementations of
the host system with the TUSB1042 device.
Contents
1 TUSB1042EVM .............................................................................................................. 2
2 TUSB1042EVM Configuration ............................................................................................. 2
3 TUSB1042EVM Schematics ............................................................................................... 4
4 Bill of Materials............................................................................................................... 9
List of Figures
1 TUSB1042EVM .............................................................................................................. 2
2 Test Board Setup ............................................................................................................ 2
3 TUSB1042EVM Block Diagram............................................................................................ 4
4 TUSB1042EVM (Schematic 1 of 4) ....................................................................................... 5
5 TUSB1042EVM (Schematic 2 of 4) ....................................................................................... 6
6 TUSB1042EVM (Schematic 3 of 4) ....................................................................................... 7
7 TUSB1042EVM (Schematic 4 of 4) ....................................................................................... 8
1 TUSB1042 Configuration Pins ............................................................................................. 2
2 Configuration Pin-Level Definitions........................................................................................ 3
3 USB 3.1 EQ Settings........................................................................................................ 3
4 TUSB1042EVM Bill of Materials ........................................................................................... 9
Trademarks
USB Type-C is a trademark of USB Implementers Forum.
DisplayPort is a trademark of Video Electronics Standards Association.
All other trademarks are the property of their respective owners.
List of Tables
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TUSB1042 Evaluation Module
1
USB Host
USB
USB HUB/Device
USB
USB Type-C
USB Type-C
TUSB1042EVM
1 TUSB1042EVM
Figure 1 illustrates the EVM board.
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Figure 1. TUSB1042EVM
The TUSB1042EVM can be used with a legacy DP Source or USB Host system to evaluate the USB
Type-C implementation. Figure 2 is a typical test set-up.
Figure 2. Test Board Setup
The EVM comes with a legacy Type B USB receptacle to connect to USB host systems. The TUSB1042
EVM uses the Texas Instruments TPS65982 (http://www.ti.com/product/TPS65982/product) controller for
power delivery and CC pin control.
2 TUSB1042EVM Configuration
This section provides the configuration options available in the TUSB1042EVM.
2.1 TUSB1042 EVM Default EQ Configuration
The following headers are provided for TUSB1042 EQ configuration by default, configuration settings may
need to be optimized depending on the amount of loss of each channel in the system.
Table 1. TUSB1042 Configuration Pins
Reference Designator JMP Control Configuration
JMP1 Downstream EQ0 No Connect
JMP2 Downstream EQ1 Shunt on pin 2–4 (20K PD)
JMP3 Upstream SSEQ0 Shunt on pin 2–1 (1K PU)
JMP4 Upstream SSEQ1 Shunt on pin 2–4 (20K PD)
2
TUSB1042 Evaluation Module
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2.2 TUSB1042 EQ Control
Each of the TUSB1042 receiver lanes has individual controls for receiver equalization. Table 2 and
Table 3 detail the gain values for each available combination for downstream, upstream and all
DisplayPort™ configurations.
Level Settings
0 Option 1: Tie 1KΩ 5% to GND.
R Tie 20K Ω 5% to GND.
F Float (Leave pin open)
1 Option 1: Tie 1K Ω 5% to VCC.
USB 3.1 Downstream Facing Ports USB 3.1 Upstream Facing Ports
EQ1 Pin
Level
0 0 0 0 0 0
0 R 1 0 R 1
0 F 2 0 F 2
0 1 3 0 1 3
R 0 4 R 0 4
R R 5 R R 5
R F 6 R F 6
R 1 7 R 1 7
F 0 8 F 0 8
F R 9 F R 9
F F 10 F F 10
F 1 11 F 1 11
1 0 12 1 0 12
1 R 13 1 R 13
1 F 14 1 F 14
1 1 15 1 1 15
EQ0 Pin
Level
Table 2. Configuration Pin-Level Definitions
Option 2: Tie directly to GND.
Option 2: Tie directly to VCC.
Table 3. USB 3.1 EQ Settings
EQ Gain @ 5 GHz (dB) SSEQ1 Pin
Level
SSEQ0 Pin
Level
TUSB1042EVM Configuration
EQ Gain @ 5 GHz (dB)
2.3 Power
The EVM is designed to operate off of the VBUS from a USB host connected via USB Type B J4. No
external power to be applied via J14 unless standalone operation is desired.
If testing DisplayPort only, or if bypassing VBUS power, the EVM must be powered via J14 (5-V, 1-A
input).
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TUSB1042 Evaluation Module
3
TUSB104 2
USB Type-B
Receptac le
USB-C(TM) Connector
TPS6598 2
3P3V
3P3V 5 V
SSTX
SSRX
C_SSTX1
C_SSTX2
C_SSRX1
C_SSRX2
Type_C VBUS
5V_IN
VBUS_5 V
5 V to 3.3 V
3.3 V
3.3 V
5 V
SBU
SBU
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TUSB1042EVM Schematics
3 TUSB1042EVM Schematics
Figure 3 through Figure 7 illustrate the EVM schematics.
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Figure 3. TUSB1042EVM Block Diagram
4
TUSB1042 Evaluation Module
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SILKSCREEN:
CTL0
POL/FLIP
1KPU
EQ0
SILKSCREEN
1KPD
20KPD
1KPU
EQ1
SILKSCREEN
1KPD
20KPD
1KPU
SSEQ0
SILKSCREEN
1KPD
20KPD
1KPU
SSEQ1
SILKSCREEN
1KPD
20KPD
1KPU
A1
SILKSCREEN
1KPD
20KPD
1KPU
20KPD
SILKSCREEN
1KPD
I2CEN
I2C_EN Header Config
1021_EQ* Config
1021_SSEQ* Config
SilkScreen:
Pad Sharing
TUSB1021
FLIP CTL0
X LOW POWER DOWN
POL Mux Operation
USB3.1 Orientation 1
USB3.1 Orientation 2
HIGH
HIGH
LOW
HIGH
Input from
TPS65982
1021_3P3V
SilkScreen:
BRD_3P3V
SilkScreen:
GND
Config Switch
SILKSCREEN
DCI_CLK
SILKSCREEN
DCI_DAT
TUSB1042 INT053A-002
Place R1 49 and R150 close to TUSB1021
CTL0
1021_EQ0
1021_I2C_EN
1021_EQ1
1021SSEQ0 1021SSEQ1
A1
CRX1N
CRX1P
CRX2P
CRX2N
DCI_DAT
I2C_SCL1021
I2C_SCL_Ext
POL
I2C_SDA1021
I2C_SDA_Ext
CTL0
1021SSEQ1
1021_EQ0
1021_EQ1
A1
1021_I2C_EN
1021SSEQ0
CTX2P_C
CTX2N_C
CTX1P_C
CTX1N_C
CTX2N
CTX2P
CTX1P
CTX1N
DCI_CLK
POL
1021_3P3V
BOARD_3P3V BOARD_3P3V
BOARD_3P3V BOARD_3P3V
BOARD_3P3V
BOARD_3P3V
LDO_1V8D
1021_3P3V
1021_3P3V
1021_3P3V
BOARD_3P3V
1021_3P3V
SSRXP_UP pg3
SSRXM_UP pg3
SSTXP_UP pg3
SSTXM_UP pg3
I2C_SCL_Ext pg4
POLpg3,4
I2C_SDA_Ext pg4
I2C_SDA1021 pg4
I2C_SCL1021 pg4
CRX2P pg3
CRX2N pg3
CRX1N pg3
CRX1P pg3
CTX2P pg3
CTX2N pg3
CTX1N pg3
CTX1P pg3
CTL0pg4
R116
1K +/- 5%
LP5
R156 0
R113 NC, 0
R153
NC,4.7K
LP3
C32 0.1uF
0201
JMP5
4 Pin-TBerg Jumper
1
234
C26
0.1uF
R155 NC, 0
SW1
SW DIP-2
R73
0
JMP1
4 Pin-TBerg Jumper
1
234
C33 0.1uF
0201
C28 0.1uF
0201
C34
10uF
R149 22
JMP7
4 Pin-TBerg Jumper
1
234
FB4
220 @ 100MHZ
R18
NC,10K
C29 0.1uF
0201
R132
1K +/- 5%
C27
0.1uF
R74
0
R127
20K +/- 5%
R117
1K +/- 5%
R125
20K +/- 5%
R123
1K +/- 5%
R150 22
R121
20K +/- 5%
R120
1K +/- 5%
LP4
C30 0.1uF
0201
R104 0
R124
1K +/- 5%
J16
NC, HEADER 2
1
2
C35
0.1uF
R134
1K +/- 5%
C31 0.1uF
0201
R119
1K +/- 5%
J17
NC, HEADER 2
1
2
R122
1K +/- 5%
C36
0.1uF
R126
1K +/- 5%
R114
1K +/- 5%
R17
4.7K
JMP2
4 Pin-TBerg Jumper
1
234
JMP3
4 Pin-TBerg Jumper
1
234
JMP4
4 Pin-TBerg Jumper
1
234
R151
NC,10K
TUSB1042
U9
RSVD1
RSVD2
SSEQ0_A0
RSVD3
RSVD4
A1
RSVD5
RSVD6
I2C_EN
RSVD7
RSVD8
VCC
DCI_DAT
RX1P
RX1N
DCI_CLK
TX1P
TX1N
EQ1
TX2N
TX2P
EQ0
RX2N
RX2P
GND
VCC
TEST2
SSEQ1
SSRXN
SSRXP
VCC
SSTXN
SSTXP
FLIP_SCL
CTL0_SDA
TEST1
RSVD9
RSVD10
RSVD11
RSVD12
VCC
R115
20K +/- 5%
R128
1K +/- 5%
R118
20K +/- 5%
R133
20K +/- 5%
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TUSB1042EVM Schematics
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TUSB1042 Evaluation Module
Figure 4. TUSB1042EVM (Schematic 1 of 4)
A10
VBUS
GND
A11
A12
SSRXP1
SSRXP2
SSRXN1
SSRXN2
B9
B8
B7
B6
B5
B4
B3
B2
B1
DN2
SBU2
GND
VBUS
B12
B11
B10
CC1
GND
DP1
DN1
SBU1
VBUS
SSTXP1
SSTXP2
SSTXN1
SSTXN2
SSRXP2
SSRXP1
SSRXN2
SSRXN1
DP2
SSTXP2
SSTXP1
SSTXN2
SSTXN1
GND
VBUS
CC2
TypeC Connector and Source
Pin Mapping
A1
A2
A3
A4
A5
A6
A7
A8
A9
Test Purpose
Headers and
Options
place near J2 Type-C connector
SILKSCREEN
GND
GND
GND
ESD
Components
SILKSCREEN:
5V_IN
USB Host
Connecti on
USB and DP Connectors
TUSB1042 INT053A-002
CSBU1
CSBU2
C_CC1C_CC2
CTX1N
CTX1P
CRX1N
CRX1P
C_CC1
C_CC2
CSBU1
CSBU2
C_CC1
C_CC2
CSBU1
CSBU2
CTX1N
CTX1P
CRX1N
CRX1P
C_T_DM
C_T_DP
C_B_DP
C_B_DM
CRX2P
CRX2N
CTX2N
CTX2P
CTX2N
CTX2P
CRX2N
CRX2P
C_USB_TN
C_USB_TP
C_USB_BP
C_USB_BN
C_USB_TN
C_USB_TP
C_USB_BN
C_USB_BP
5V_COM
C_CC2
C_CC1
SSTXM_UP
SSTXP_UP
SSRXM_UP
SSRXP_UP
BOARD_3P3V BOARD_3P3V
TypeC_VBUS
5V_COMVBUS_TYPEB
C_CC1 pg4
C_CC2 pg4
CSBU1_65982 pg4
CSBU2_65982 pg4
C_USB_TP pg4
C_USB_TN pg4
C_USB_BP pg4
C_USB_BN pg4
CTX2P pg2
CTX2N pg2
CTX1N pg2
CTX1P pg2
CRX2P pg2
CRX2N pg2
CRX1N pg2
CRX1P pg2
DM_UPpg4
DP_UPpg4
SSTXM_UPpg2
SSTXP_UPpg2
SSRXM_UPpg2
SSRXP_UPpg2
R4
NC, 10K
D2
LED Green 0805
D1
PMEG3050EP, 115
12
U2
TPD4E05U06
D1+
1
D1-
2
GND
3
D2+
4
D2-5NC6
6
NC7
7
GND
8
NC9
9
NC10
10
R1
NC, 10K
R25
330
0402
5%
USB2
USB3
J1
USB3_MICRO_B
VBUS
1
D-
2
D+
3
USB_OTG
4
GND
5
TX-
6
TX+
7
GND1
8
RX-
9
RX+
10
SLD1
11
SLD2
12
TP1
TEST POINT
1
J2
TypeC_Receptacle_DualSMT_TOP
GND0
A1
SSTXP1
A2
SSTXN1
A3
VBUS1
A4
CC1
A5
DP1
A6
DN1
A7
SBU1
A8
VBUS2
A9
SSRXN2
A10
SSRXP2
A11
GND1
A12
GND2
B1
SSTXP2
B2
SSTXN2
B3
VBUS3
B4
CC2
B5
DP2
B6
DN2
B7
SBU2
B8
VBUS4
B9
SSRXN1
B10
SSRXP1
B11
GND3
B12
Shield1
1
Shield2
2
Shield3
3
Shield4
4
Shield5
5
Shield6
6
Shield8
8
Shield7
7
Shield10
10
Shield9
9
U5
TPD4E05U06
D1+
1
D1-
2
GND
3
D2+
4
D2-5NC6
6
NC7
7
GND
8
NC9
9
NC10
10
TP6
TEST POINT
1
C2
10uF
R7 0
U3
TPD4E05U06
D1+
1
D1-
2
GND
3
D2+
4
D2-5NC6
6
NC7
7
GND
8
NC9
9
NC10
10
TP5
TEST POINT
1
TP7
TEST POINT
1
R10 0
R15 0
R2
NC, 1M
U4
TPD4E05U06
D1+
1
D1-
2
GND
3
D2+
4
D2-5NC6
6
NC7
7
GND
8
NC9
9
NC10
10
TP2
TEST POINT
1
C1
10uF
R16 0
TP3
TEST POINT
1
R12 0
R5
NC, 1M
R11 0
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TUSB1042 Evaluation Module
Figure 5. TUSB1042EVM (Schematic 2 of 4)
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