•Switch Matrix
– USB
– UART Supports USB 2.0 High Speed
•Charger Detection
– USB BCDv1.1 Compliant
– VBUS Detection
– Data Contact Detection
– Primary and Secondary Detection
•Compatible Accessories
– USB Chargers (DCP, CDP)
– Factory Cable
•Additional Features
– I2C Interface with Host Processor
– Switches Controlled by Automatic
Detection or Manual Control
– Interrupts Generated for Plug/Unplug
– Support Control Signals used In
Manufacturing (JIG, BOOT)
SCDS331A –FEBRUARY 2012–REVISED AUGUST 2012
Check for Samples: TSU6111A
•Max Voltage
– 28V VBUS rating
•ESD Performance Tested Per JESD 22
– 5000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
•IEC ESD Performance
– ±8kV Contact Discharge (IEC 61000-4-2) for
VBUS/DP_CON/DM_CON/ID_CON to GND
•Surge Protection on VBUS/DP_CON/DM_CON
– USB Connector Pins Without External
Component
APPLICATIONS
•Cell Phones and Smart Phones
•Tablet PCs
•Digital Cameras and Camcorders
•GPS Navigation Systems
•Micro USB interface with USB/UART
TYPICAL APPLICATION DIAGRAM
T
A
–40°C to 85°CuQFN 0.4-mm pitch – RSVTape and ReelTSU6111ARSVRZTN
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
PACKAGE
ORDERING INFORMATION
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
The TSU6111A is a high performance differential autonomous SP2T switch with impedance detection. The
switch supports the detection of various accessories that are attached through DP, DM, and ID. The charger
detection satisfies USB charger specification v1.1 and V
external protection. Power for this device is supplied through VBAT of the system or through V
attached to a charger.
The SP2T switch is controlled by the automatic detection logic or through manual configuration of the I2C. JIG
and BOOT pins are used when a USB or UART JIG cable is used to test the device in the development and
manufacturing. TSU6111A has open-drain JIG output (active low).
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PINOUT DIAGRAM (TOP VIEW)
PIN FUNCTIONS
PIN
NO.NAME
1DM_HOSTI/OUSB DM connected to host
2DP_HOSTI/OUSB DP connected to host
3TxDI/OUART Tx
4RxDI/OUART Rx
5VBATIConnected to battery
6BOOTOBOOT mode out (push-pull). Used for factory test modes.
7JIGOJIG detection JIG detection (Open-drain). Used for factory test modes
8VDDIOOI/O voltage reference
9INTBOInterrupt to host (push-pull)
10SCLII2C clock
11SDAI/OI2C data
12GNDGround
13VBUS_INIVBUS connected to USB receptacle
14DM_CONI/OUSB DM connected to USB receptacle
15DP_CONI/OUSB DP connected to USB receptacle
16ID_CONI/OUSB ID connected to USB receptacle
over operating free-air temperature range (unless otherwise noted)
MINMAXUNIT
V
BUS
V
BAT
V
DDIO
V
ID_CON
V
USBIO
V
UARTIO
V
JIG
V
LOGIC_O
I
K
I
SW-DC
I
SW
I
IK
I
LOGIC_O
I
GND
T
stg
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
Supply voltage from USB connector–0.528
Supply voltage from battery–0.56.0
Logic supply voltage–0.54.6V
ID Connector voltage–0.5V
Switch I/O voltage rangeUSB Switch–0.5V
Switch I/O voltage rangeUART Switch–0.5V
JIG voltage–0.5V
+0.5V
BAT
+0.5V
BAT
+0.5V
BAT
+0.5V
BAT
Voltage applied to logic output (SCL, SDA, INTB, BOOT)–0.54.6V
Analog port diode current–5050mA
ON-state continuous switch current–6060mA
ON-state peak switch current PEAK–150150mA
Digital logic input clamp currentV
< 0–50mA
DDIO
Continuous current through logic output (SCL, SDA, INTB, BOOT)–5050mA
Continuous current through GND100mA
Storage temperature range–65150°C
The TSU6111A will automatically detect accessories plugged into the phone via the mini/micro USB 5 pin
connector. The type of accessory detected will be stored in I2C registers within the TSU6111A for retrieval by the
host. The TSU6111A has a network of switches that are automatically opened and closed based on the
accessory detection. See Table 1 for details of which switches are open during each mode of operation. The
TSU6111A also offers a manual switching mode that allows the host processor to decide which switches should
be opened and closed. The manual switching settings are executed through the I2C interface.
STANDBY MODE
Standby mode is the default mode upon power up and occurs when no accessory has been detected. During this
mode, the VBUS and ID lines are continually monitored through comparators to determine when an accessory is
inserted. Power consumption is minimal during standby mode.
POWER SUPERVISOR
TSU6111A uses VBAT as the primary supply voltage. VBUS is the secondary supply. VDDIO is used for I2C
communication.
Table 1. Function Table
TSU6111A
VBATVBUSVDDIODETECTIONI2CCOMMENTS
YesNoNoEnabledNot enabledVBAT is supply
YesYesNoEnabledNot enabledVBAT is supply
YesNoYesEnabledEnabledVBAT is supply
YesYesYesEnabledEnabledVBAT is supply
NoYesNoEnabledNot enabledVBUS is supply
NoYesYesNot valid
NoNoYesNot valid
NoNoNoPower Down Reset
registers and I2C state machine initialize to their default states.
After the initial power-up phase, V
(V
) for a power-reset cycle.
DDIO
BAT
, an internal power-on reset holds the TSU6111A in a reset condition
BAT
has reached V
BAT
, the reset condition is released, and the TSU6111A
POR
must be lowered to below 0.2 V and then back up to the operating voltage
Software Reset
The TSU6111A has software reset feature.
•Hold low both I2C_SCL and I2C_SDA for more than 30ms to reset digital logic of the TSU6111A.
After resetting the digital logic, INTB will keep low until INT_Mask bit of Control register (0x02) is cleared.