TEXAS INSTRUMENTS TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 Technical data

查询TPS77501供应商
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
D
Open Drain Power-On Reset With 200-ms Delay (TPS775xx)
D
Open Drain Power Good (TPS776xx)
D
500-mA Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V , 2.8-V (TPS77628 Only), 3.3-V Fixed Output and Adjustable Versions
D
Dropout Voltage to 169 mV (Typ) at 500 mA (TPS77x33)
D
Ultra Low 85 µA Typical Quiescent Current
D
Fast Transient Response
D
2% Tolerance Over Specified Conditions for Fixed-Output Versions
D
8-Pin SOIC and 20-Pin TSSOP PowerPAD (PWP) Package
D
Thermal Shutdown Protection
description
The TPS775xx and TPS776xx devices are designed to have a fast transient response and be stable with a 10-µF low ESR capacitors. This combination provides high performance at a reasonable cost.
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
10
2
10
10
1
IO = 500 mA
50
0
– Change in
O
V
–50
Output Voltage – mV
PWP PACKAGE
(TOP VIEW)
1
GND/HSINK GND/HSINK
GND
NC EN
IN IN
NC GND/HSINK GND/HSINK
NC – No internal connection
D PACKAGE
GND
EN
IN IN
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
(TOP VIEW)
1 2 3 4
8 7 6 5
TPS77x33
LOAD TRANSIENT RESPONSE
CO = 2x47 µF ESR = 1/2x100 m VO = 3.3 V VI = 4.3 V
GND/HSINK GND/HSINK NC NC RESET
/PG FB/NC OUT OUT GND/HSINK GND/HSINK
RESET
/PG FB/NC OUT OUT
0
10
– Dropout Voltage – mV
DO
V
–1
10
CO = 10 µF
–2
10
PowerPAD is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
–40 0 20 120
–60 40 60 80 100
–20 140
TA – Free-Air Temperature – °C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IO = 10 mA
IO = 0
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
500
0
O
I – Output Current – mA
0
604020 80 100 140120 160 180 200
Copyright 1999, Texas Instruments Incorporated
t – Time – µs
1
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
J
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 169 mV at an output current of 500 mA for the TPS77x33) and is directly proportional to the output current. Additionally , since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 500 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN quiescent current to 1 µA at T
= 25°C.
J
The RESET output of the TPS775xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS775xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage.
Power good (PG) of the TPS776xx is an active high output, which can be used to implement a power-on reset or a low-battery indicator.
The TPS775xx and TPS776xx are offered in 1.5-V , 1.8-V , 2.5-V , 2.8 V (TPS77628 only), and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V for TPS77501 option and
1.2 V to 5.5 V for TPS77601 option). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS775xx and TPS776xx families are available in 8 pin SOIC and 20 pin TSSOP packages.
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
T
–40°C to 125°C
The TPS77x01 is programmable using an external resistor divider (see application information). The D and PWP packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS77501DR).
The TPS775xx has an open-drain power-on reset with a 200-ms delay function. The TPS776xx has an open-drain power good function.
(V)
TYP
3.3 TPS77533PWP TPS77633PWP TPS77533D TPS77633D
2.5 TPS77525PWP TPS77625PWP TPS77525D TPS77625D
2.8 TPS77628PWP TPS77628D
1.8 TPS77518PWP TPS77618PWP TPS77518D TPS77618D
1.5 TPS77515PWP TPS77615PWP TPS77515D TPS77615D
Adjustable
1.2 V to 5.5 V Adjustable
1.5 V to 5.5 V
TPS77501PWP TPS77501D
TSSOP
(PWP)
TPS77601PWP TPS77601D
(enable) shuts down the regulator, reducing the
PACKAGED DEVICES
SOIC
(D)
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
6
V
I
0.1 µF
See application information section for capacitor selection details.
IN
7
IN
5
EN
Figure 1. Typical Application Configuration for Fixed Output Options
functional block diagram—adjustable version
IN
EN
_ +
GND
3
RESET/
PG
OUT OUT
16
14 13
+
RESET
C
10 µF
/PG
V
O
O
PG or RESET
OUT
V
= 1.1834 V
ref
GND
+ _
200 ms Delay
(for RESET
Option)
R1
FB/NC
R2
External to the device
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
functional block diagram—fixed-voltage version
IN
EN
PG or RESET
_
V
= 1.1834 V
ref
+
+ _
GND
200 ms Delay
(for RESET
Option)
R1
R2
OUT
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
I/O
DESCRIPTION
I/O
DESCRIPTION
I/O
DESCRIPTION
I/O
DESCRIPTION
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
Terminal Functions
SOIC Package (TPS775xx)
TERMINAL
NAME NO.
EN 2 I Enable input FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options) GND 1 Regulator ground IN 3, 4 I Input voltage OUT 5, 6 O Regulated output voltage RESET 8 O RESET output
TSSOP Package (TPS775xx)
TERMINAL
NAME NO.
EN 5 I Enable input FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options) GND 3 Regulator ground GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20 IN 6, 7 I Input voltage NC 4, 8, 17, 18 No connect OUT 13, 14 O Regulated output voltage RESET 16 O RESET output
Ground/heatsink
SOIC Package (TPS776xx)
TERMINAL
NAME NO.
EN 2 I Enable input FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options) GND 1 Regulator ground IN 3, 4 I Input voltage OUT 5, 6 O Regulated output voltage PG 8 O PG output
TSSOP Package (TPS776xx)
TERMINAL
NAME NO.
EN 5 I Enable input FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options) GND 3 Regulator ground GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20 IN 6, 7 I Input voltage NC 4, 8, 17, 18 No connect OUT 13, 14 O Regulated output voltage PG 16 O PG output
Ground/heatsink
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TPS775xx RESET timing diagram
V
I
V
res
V
res
t
V
O
Threshold
Voltage
RESET Output
Output
Undefined
V
is the minimum input voltage for a valid RESET . The symbol V
res
for semiconductor symbology.
VIT –Trip voltage is typically 5% lower than the output voltage (95%VO) V to V
is the hysteresis voltage.
IT+
V
IT+
V
IT–
200 ms Delay
V
IT+
Less than 5% of the output voltage
res
V
IT–
t
200 ms Delay
Output Undefined
t
is not currently listed within EIA or JEDEC standards
IT–
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
D
PWP
#
PWP
||
Output voltage range, V
V
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum RESET
Maximum PG voltage (TPS776xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T Storage temperature range, T
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network terminal ground.
PACKAGE
PACKAGE
#
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper, 2-in × 2-in coverage (4 in2).
||
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer to TI technical brief SLMA002.
voltage (TPS775xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
0 568 mW 5.68 mW/°C 312 mW 227 mW
250 904 mW 9.04 mW/°C 497 mW 361 mW
DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
0 2.9 W 23.5 mW/°C 1.9 W 1.5 W
300 4.3 W 34.6 mW/°C 2.8 W 2.2 W
0 3 W 23.8 mW/°C 1.9 W 1.5 W
300 7.2 W 57.9 mW/°C 4.6 W 3.8 W
TA < 25°C
POWER RATING
TA < 25°C
POWER RATING
J
DERATING FACTOR
ABOVE TA = 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 85°C
POWER RATING
Ĕ
recommended operating conditions
Input voltage, V
Output current, IO (Note 1) 0 500 mA Operating virtual junction temperature, TJ (Note 1) –40 125 °C
k
To calculate the minimum input voltage for your maximum output current, use the following equation: V
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
k
I
p
device operate under conditions beyond those specified in this table for extended periods of time.
O
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
MIN MAX UNIT
2.7 10 V TPS77501 1.5 5.5 TPS77601 1.2 5.5
I(min)
= V
O(max)
+ V
DO(max load)
.
7
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77501
TPS77601
TPS77x15
(10 µA to 500 mA load) (see
)
TPS77x18
V
(see Note 2)
TPS77x25
TPS77628
TPS77x33
()
A
Standby current PG
(TPS776xx)
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
electrical characteristics over recommended operating free-air temperature range, V
= V
i
Output voltage
Note 2
Quiescent current (GND current) EN = 0V, (see Note 2)
Output voltage line regulation (∆VO/V (see Notes 2 and 3)
Load regulation 3 mV Output noise voltage Output current Limit VO = 0 V 1.7 2 A
Thermal shutdown junction temperature 150 °C
FB input current TPS77x01 FB = 1.5 V 2 nA High level enable input voltage 1.7 V Low level enable input voltage 0.9 V
Power supply ripple rejection (see Note 2)
Reset (TPS775xx)
NOTE 2: Minimum IN operating voltage is 2.7 V or V
+ 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted)
O(typ)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
1.5 V ≤ VO 5.5 V, TJ = 25°C V
1.5 V ≤ VO 5.5 V, TJ = –40°C to 125°C 0.98V
1.2 V ≤ VO 5.5 V, TJ = 25°C V
1.2 V ≤ VO 5.5 V, TJ = –40°C to 125°C 0.98V TJ = 25°C, 2.7 V < VIN < 10 V 1.5 TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.470 1.530 TJ = 25°C, 2.8 V < VIN < 10 V 1.8 TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.764 1.836 TJ = 25°C, 3.5 V < VIN < 10 V 2.5 TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.450 2.550 TJ = 25°C, 3.8 V < VIN < 10 V 2.8 TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.744 2.856 TJ = 25°C, 4.3 V < VIN < 10 V 3.3 TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.234 3.366 10 µA < IO < 500 mA, TJ = 25°C 85 IO = 500 mA, TJ = –40°C to 125°C 125
O
)
Minimum input voltage for valid RESET I Trip threshold voltage VO decreasing 92 98 %V Hysteresis voltage Measured at V Output low voltage VI = 2.7 V, I Leakage current V RESET time-out delay 200 ms Minimum input voltage for valid PG I Trip threshold voltage VO decreasing 92 98 %V
Hysteresis voltage Measured at V Output low voltage VI = 2.7 V, I Leakage current V
VO + 1 V < VI 10 V, TJ = 25°C 0.01 %/V
BW = 300 Hz to 50 kHz, CO = 10 µF, TJ = 25°C
EN = V
I,
EN = V
I,
f = 1 KHz, CO = 10 µF, TJ = 25°C
O(RESET)
(RESET)
O(PG)
(PG)
+ 1 V, whichever is greater. Maximum IN voltage 10V.
O(typ)
= 300µA 1.1 V
O
= 5 V 1 µA
= 300µA 1.1 V
O
= 5 V 1 µA
TJ = 25°C,
2.7 V < VI < 10 V TJ = –40°C to 125°C
2.7 V < VI < 10 V
O(RESET)
O(PG)
= 1mA 0.15 0.4 V
= 1mA 0.15 0.4 V
O
O
O
O
190 µVrms
1 µA
60 dB
0.5 %V
0.5 %V
1.02V
1.02V
O
O
µ
10 µA
O O
O O
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
Input current (EN)
A
TPS77628
g
TPS77533
mV
TPS77633
VOOutput voltage
VDODropout voltage
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
electrical characteristics over recommended operating free-air temperature range, V
= V
i
p
Dropout voltage (See Note 4)
NOTES: 3. If VO≤ 1.8 V then V
O(typ)
+ 1 V, I
PARAMETER TEST CONDITIONS
= 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted) (continued)
O
EN = 0 V –1 0 1 EN = V
I
IO = 500 mA, TJ = 25°C 285 IO = 500 mA, TJ = –40°C to 125°C 410 IO = 500 mA, TJ = 25°C 169 IO = 500 mA, TJ = –40°C to 125°C 287 IO = 500 mA, TJ = 25°C 169 IO = 500 mA, TJ = –40°C to 125°C 287
= 2.7 V, V
imin
Line Reg. (mV)
= 10 V:
imax
+ǒ%ńVǓ
ǒ
V
V
imax
O
100
*
2.7 V
MIN TYP MAX UNIT
–1 1
µ
Ǔ
1000
If VO 2.5 V then V
4. IN voltage equals VO(Typ) – 100 mV; TPS77x15, TPS77x18, and TPS77x25 dropout voltage limited by input voltage range limitations (i.e., TPS77x33 input voltage needs to drop to 3.2 V for purpose of this test).
= VO + 1 V, V
imin
Line Reg. (mV)
= 10 V:
imax
+ǒ%ńVǓ
ǒ
V
imax
*ǒVO)
100
V
O
1V
Ǔ
Ǔ
1000
Table of Graphs
FIGURE
p
Ground current vs Free-air temperature 8 Power supply ripple rejection vs Frequency 9 Output spectral noise density vs Frequency 10
Z
o
Output impedance vs Frequency 11
p
Line transient response 14, 16 Load transient response 15, 17 Output voltage vs Time 18 Equivalent series resistance (ESR) vs Output current 20 – 23
vs Output current 2, 3, 4 vs Free-air temperature 5, 6, 7
vs Input voltage 12 vs Free-air temperature 13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
3.2835
3.2830
3.2825
3.2820
3.2815
– Output Voltage – V
3.2810
O
V
3.2805
3.2800
TPS77x33
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 4.3 V TA = 25°C
0
0.1 0.3
0.2
IO – Output Current – A
0.4 0.5
1.4985
1.4980
1.4975
1.4970
1.4965
– Output Voltage – V
1.4960
O
V
1.4955
1.4950
0.1 0.30.20 0.4 0.5
Figure 2
TPS77x15
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 2.7 V TA = 25°C
IO – Output Current – A
Figure 3
2.4960
2.4955
2.4950
2.4945
2.4940
2.4935
– Output Voltage – V
O
V
2.4930
2.4925
2.4920
TPS77x25
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 3.5 V TA = 25°C
0 0.5
0.1 0.3
0.2 0.4
IO – Output Current – A
Figure 4
TPS77x33
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3.32 VI = 4.3 V
3.31
3.30
3.29
IO = 500 mA
3.28
– Output Voltage – V
O
3.27
V
3.26
3.25
–40 0
–60 120
–20 100 140
TA – Free-Air Temperature – °C
IO = 1 mA
20 40 60 80
Figure 5
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
1.515
1.510
1.505
1.500
1.495
– Output Voltage – V
O
V
1.490
1.485
TPS77x15
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VI = 2.7 V
IO = 500 mA
IO = 1 mA
–40 0
–20 100–60 120
TA – Free-Air Temperature – °C
20 40 60 80
Figure 6
140
2.515
2.510
2.505
2.500
2.495
– Output Voltage – V
O
2.490
V
2.485
2.480
TPS77x25
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VI = 3.5 V
IO = 500 mA
IO = 1 mA
–40 0–20 100–60 12020 40 60 80
TA – Free-Air Temperature – °C
Figure 7
TPS77xxx
GROUND CURRENT
POWER SUPPLY RIPPLE REJECTION
vs
FREE-AIR TEMPERATURE
100
VI = 2.7 V
95
90
85
Ground Current – Aµ
80
75
IO = 1 mA
IO = 500 mA
–40 0–20 100–60 12020 40 60 80 140
TA – Free-Air Temperature – °C
90 80
70
60 50 40
30
20
10
0
PSRR – Power Supply Ripple Rejection – dB
–10
Figure 8
TPS77x33
vs
FREQUENCY
1k10010
f – Frequency – Hz
Figure 9
VI = 4.3 V CO = 10 µF TA = 25°C
100k10k
1M
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
TPS77x33
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
–5
10
V HzOutput Spectral Noise Density – µ
10
10
10
–6
–7
–8
10
IO = 500 mA
2
3
10
f – Frequency – Hz
IO = 7 mA
10
4
VI = 4.3 V CO = 10 µF TA = 25°C
10
5
0
VI = 4.3 V CO = 10 µF TA = 25°C
10
– Output Impedance –Z
o
10
–1
–2
10
IO = 1 mA
1
10
2
Figure 10
TPS77x33
OUTPUT IMPEDANCE
vs
FREQUENCY
IO = 500 mA
10
4
3
10
f – Frequency – kHz
Figure 11
10
5
10
6
350
300
250
200
150
– Dropout Voltage – mV
100
DO
V
50
0
TPS77x01
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
IO = 500 mA
TA = 25°C
TA = –40°C
34
3.52.5
VI – Input Voltage – V
TA = 125°C
4.5 5
Figure 12
TPS77x33
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
10
2
10
1
10
0
10
– Dropout Voltage – mV
DO
V
–1
10
CO = 10 µF
–2
10
–40 0 20 120
–60 40 60 80 100
–20 140
TA – Free-Air Temperature – °C
IO = 500 mA
IO = 10 mA
IO = 0
Figure 13
12
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TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
TPS77x15
LINE TRANSIENT RESPONSE
3.7
2.7
– Input Voltage – V
I
V
10
0
– Change in
–10
O
V
Output Voltage – mV
CL = 10 µF TA = 25°C
0604020 80 100 140120 160 180 200
t – Time – µs
Figure 14
TPS77x33
LINE TRANSIENT RESPONSE
LOAD TRANSIENT RESPONSE
CO = 2x47 µF ESR = 1/2x100 m
50
VO = 1.5 V VIN = 2.7 V
0
– Change in
O
–50
V
Output Voltage – mV
500
0
O
I – Output Current – mA
0604020 80 100 140120 160 180 200
LOAD TRANSIENT RESPONSE
TPS77x15
t – Time – µs
Figure 15
TPS77x33
5.3
– Input Voltage – V
I
V
4.3
10
0
– Change in
–10
O
V
Output Voltage – mV
0
CL = 10 µF TA = 25°C
604020 80 100 140120 160 180 200
t – Time – µs
Figure 16
CO = 2x47 µF
50
– Change in
O
V
–50
Output Voltage – mV
500
O
I – Output Current – mA
ESR = 1/2x100 m VO = 3.3 V VI = 4.3 V
0
0
0
604020 80 100 140120 160 180 200
t – Time – µs
Figure 17
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
TPS77x33
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
4
3
2
1
– Output Voltage – V
O
V
0
Enable Pulse – V
604020 80 100 140120 160 180 2000
t – Time – µs
Figure 18
+
C
ESR
To Load
O
R
R
L
V
I
IN
EN
OUT
GND
Figure 19. Test Circuit for Typical Regions of Stability (Figures 20 through 23) (Fixed Output Options)
14
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
TYPICAL CHARACTERISTICS
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
Region of Instability
1
Region of Stability
ESR – Equivalent series restance –
Vo = 3.3 V CL = 4.7 µF VI = 4.3 V TA = 25°C
0.1 0 100 200 300 400 500
IO – Output Current – mA
Figure 20
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
Region of Instability
1
Region of Stability
ESR – Equivalent Series Resistance –
Vo = 3.3 V Cl = 4.7 µF VI = 4.3 V TJ = 125°C
0.1 0 100 200 300 400 500
IO – Output Current – mA
Figure 21
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
10
Region of Instability
1
Region of Stability
ESR – Equivalent series restance –
Vo = 3.3 V CL = 22 µF VI = 4.3 V TA = 25°C
0.1 0 100 200 300 400 500
IO – Output Current – mA
10
1
ESR – Equivalent series restance –
0.1 0 100 200 300 400 500
Figure 22
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
vs
OUTPUT CURRENT
Region of Instability
Region of Stability
Vo = 3.3 V Cl = 22 µF VI = 4.3 V TJ = 125°C
IO – Output Current – mA
Figure 23
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
The TPS775xx family includes four fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, and 3.3 V), and an adjustable regulator, the TPS77501 (adjustable from 1.5 V to 5.5 V).
The TPS776xx family includes five fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.8 V, and 3.3 V), and an adjustable regulator, the TPS77601 (adjustable from 1.2 V to 5.5 V).
device operation
The TPS775xx and TPS776xx feature very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (I transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS775xx and TPS776xx quiescent currents remain low even when the regulator drops out, eliminating both problems.
= IC/β). The TPS775xx and TPS776xx use a PMOS
B
The TPS775xx and TPS776xx families also feature a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown feature is not used, EN regulated output voltage is typically reestablished in 120 µs.
should be tied to ground. Response to an enable transition is quick;
minimum load requirements
The TPS775xx and TPS776xx families are stable even at zero load; no minimum load is required for operation.
FB - pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 25. Normally , this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally , FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS775xx or TPS776xx are located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS775xx and TPS776xx require an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 50 m and 1.5 . Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5 . Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously.
16
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TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
APPLICATION INFORMATION
external capacitor requirements (continued)
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
V
C1
0.1 µF
6
RESET/
I
IN
7
IN
5
EN
GND
OUT OUT
3
PG
16
14 13
+
10 µF
RESET
250 k
V
O
C
O
/PG
Figure 24. Typical Application Circuit (Fixed Versions)
programming the TPS77x01 adjustable LDO regulator
The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as shown in Figure 25. The output voltage is calculated using:
R1
VO+
V
ǒ1
ref
Where
V
= 1.1834 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 10-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 110 kΩ to set the divider current at approximately 10 µA and then calculate R1 using:
)
R2
Ǔ
(1)
1.7 V
R1
V
I
+
0.1 µF
0.9 V
V
O
ǒ
*
1
Ǔ
TPS77x01
RESET
IN
EN
FB / NC
GND
R2
PG
OUT
/
Reset or PG Output
250 k
R1
R2
V
O
C
O
OUTPUT
VOLTAGE
2.5 V
3.3 V
3.6 V
4.75 V
V
ref
Figure 25. TPS77x01 Adjustable LDO Regulator Programming
OUTPUT VOLTAGE
PROGRAMMING GUIDE
R1 R2
121
110
196
110
226
110
332
110
(2)
UNIT
k k k k
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
reset indicator
The TPS775xx features a RESET output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the RESET output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. RESET a low-battery indicator. RESET does not assert itself when the regulated output voltage falls outside the specified 2% tolerance, but instead reports an output voltage low relative to its nominal regulated value (refer to timing diagram for start-up sequence).
power-good indicator
The TPS776xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator.
can be used to drive power-on reset circuitry or as
regulator protection
The TPS775xx and TPS776xx PMOS-pass transistors have a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate.
The TPS775xx and TPS776xx also feature internal current limiting and thermal protection. During normal operation, the TPS775xx and TPS776xx limit output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.
18
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TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P or equal to P
The maximum-power-dissipation limit is determined using the following equation:
D(max)
.
, and the actual dissipation, PD, which must be less than
D(max)
P
D(max)
Where
T
max is the maximum allowable junction temperature
J
R
is the thermal resistance junction-to-ambient for the package, i.e., 176°C/W for the 8-terminal
θJA
SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.
T
is the ambient temperature.
A
The regulator dissipation is calculated using:
PD+
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.
+
ǒ
VI*
TJmax*T
R
Ǔ
V
O
A
q
JA
I
O
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
14
1
0.069 (1,75) MAX
0.050 (1,27)
A
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
0.004 (0,10)
8
7
0.010 (0,25)
0.157 (4,00)
0.150 (3,81)
M
0.244 (6,20)
0.228 (5,80)
Seating Plane
0.004 (0,10)
PINS **
DIM
A MAX
A MIN
0.008 (0,20) NOM
Gage Plane
0°–8°
8
0.197
(5,00)
0.189
(4,80)
14
0.344 (8,75)
0.337 (8,55)
0.010 (0,25)
0.044 (1,12)
0.016 (0,40)
4040047/B 03/95
16
0.394
(10,00)
0.386
(9,80)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Four center pins are connected to die mount pad. E. Falls within JEDEC MS-012
20
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TPS77501, TPS77515, TPS77518, TPS77525, TPS77533 WITH RESET OUTPUT
TPS77601, TPS77615, TPS77618, TPS77625, TPS77628, TPS77633 WITH PG OUTPUT
FAST-TRANSIENT-RESPONSE 500-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS232B – SEPTEMBER 1999 – REVISED NOVEMBER 1999
MECHANICAL DATA
PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE
20-PIN SHOWN
0,65
20
1
1,20 MAX
0,30 0,19
11
4,50 4,30
10
A
0,15 0,05
PINS **
DIM
M
0,10
6,60 6,20
Seating Plane
0,10
1614
Thermal Pad (See Note D)
20
0,15 NOM
0°–8°
Gage Plane
0,25
0,75 0,50
2824
A MAX
A MIN
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically
and thermally connected to the backside of the die and possibly selected leads.
E. Falls within JEDEC MO-153
PowerPAD is a trademark of Texas Instruments Incorporated.
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
4073225/E 03/97
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
21
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