TEXAS INSTRUMENTS TPS77101, 115, 118, 127, 128 Technical data

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUAR Y 2000 – REVISED OCT OBER 2000

D Open Drain Power-On Reset With 220-ms

Delay (TPS771xx)

D Open Drain Power-Good (PG) Status

Output (TPS772xx)

D 150-mA Low-Dropout Voltage Regulator D Available in 1.5-V, 1.8-V, 2.7-V, 2.8-V, 3.3-V,

5.0-V Fixed Output and Adjustable Versions

FB/SENSE

RESET

GND

TPS771xx

DGK Package

(TOP VIEW)

1 2 3 4

8 7 6 5

OUT OUT IN IN

D Dropout Voltage Typically 115 mV

at 150 mA (TPS77133, TPS77233)

D Ultralow 92-µA Quiescent Current (Typ)

TPS772xx

DGK Package

(TOP VIEW)

D 8-Pin MSOP (DGK) Package D Low Noise (55 µV

) Without External

rms

Filter (Bypass) Capacitor (TPS77118, TPS77218)

D 2% Tolerance Over Specified Conditions

for Fixed-Output Versions

D Fast Transient Response D Thermal Shutdown Protection

FB/SENSE

300

PG EN

GND

2 3 4

TPS77x33

DROPOUT VOLTAGE

JUNCTION TEMPERATURE

8 7 6 5

description

The TPS771xx and TPS772xx are low-dropout regulators with integrated power-on reset and power good (PG) function respectively. These devices are capable of supplying 150 mA of output current with a dropout of 115 mV (TPS77133, TPS77233). Quiescent current is 92 µA at full load dropping down to 1 µA when device is disabled. These devices are optimized to be stable with a wide range of output capacitors including low ESR ceramic (10 µF) or low capacitance (1 µF) tantalum capacitors. These devices have extremely low noise output performance (55 µV

rms

) without using any added filter capacitors. TPS771xx and TPS772xx are designed to have fast transient response for larger load current changes.

The TPS771xx or TPS772xx is offered in 1.5 V,

1.8-V, 2.7-V, 2.8-V, 3.3-V, and 5.0 V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is 2% over line, load, and temperature ranges. The TPS771xx and TPS772xx families are available in 8-pin MSOP (DGK) packages.

250

200

150

100

– Dropout Voltage – mV

–50

–40 0 40 80 120 160

TJ – Junction Temperature – °C

IO = 150 mA

IO = 10 mA

OUT OUT IN IN

IO = 0 A

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 115 mV at an output current of 150 mA for 3.3 volt option) and is directly proportional to the output current. Additionally , since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 92 µA over the full range of output current, 0 mA to 150 mA). These two key specifications yield a significant improvement in operating life for battery-powered systems.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

125°C

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

description (continued)

The device is enabled when the EN pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN current to less than 1 µA at T

= 25°C.

The TPS771xx features an integrated power-on reset, commonly used as a supply voltage supervisor (SVS) or reset output voltage. The RESET

output of the TPS771xx initiates a reset in DSP, microcomputer or microprocessor systems at power up and in the event of an undervoltage condition. An internal comparator in the TPS771xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When OUT a 220 ms delay . RESET

reaches 95% of its regulated voltage, RESET will go to a high-impedance state after

will go to low-impedance state when OUT is pulled below 95% (i.e. over load condition)

of its regulated voltage. For the TPS772xx, the power good terminal (PG) is an active high output, which can be used to implement a

power-on reset or a low-battery indicator. An internal comparator in the TPS772xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When OUT of its regulated voltage, PG will go to a low-impedance state. PG will go to a high-impedance state when OUT is above 82% of its regulated voltage.

AVAILABLE OPTIONS

OUTPUT VOLTAGE

–40°C to

NOTE: The TPS77101 and TPS77201 are programmable using an external resistor divider (see application information).

The DGK package is available taped and reeled. Add an R suffix to the device type (e.g., TPS77101DGKR).

(V)

TYP

5.0 TPS77150DGK AFV TPS77250DGK AGE

3.3 TPS77133DGK AFU TPS77233DGK AGD

2.8 TPS77128DGK AFS TPS77228DGK AGB

2.7 TPS77127DGK AFR TPS77227DGK AGA

1.8 TPS77118DGK AFP TPS77218DGK AFY

1.5 TPS77115DGK AFO TPS77215DGK AFX

Adjustable

1.5 V to 5.5 V

(enable) shuts down the regulator, reducing the quiescent

falls below 82%

PACKAGED DEVICES

MSOP (DGK)

TPS771xx

SYMBOL

TPS77101DGK AFN TPS77201DGK AFW

TPS772xx

SYMBOL

0.1 µF

SENSE

PG or

RESET

GND

OUT OUT

7 8 1

PG or RESET

10 µF

Figure 1. Typical Application Configuration (For Fixed Output Options)

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functional block diagrams

adjustable version

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

PG or RESET

= 1.1834 V

ref

fixed-voltage version

= 1.1834 V

ref

+ _

GND

_ +

220 ms Delay

(for TPS771xx Option)

+ _

220 ms Delay

(for TPS771xx Option)

OUT

FB/SENSE

External to the Device

PG or RESET

OUT

SENSE

GND

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

Terminal Functions

TERMINAL

NAME NO.

TPS771XX

FB/SENSE 1 I Feedback input voltage for adjustable device (sense input for fixed options) RESET 2 O Reset output EN 3 I Enable input GND 4 Regulator ground IN 5, 6 I Input voltage OUT 7, 8 O Regulated output voltage

TPS772XX

FB/SENSE 1 I Feedback input voltage for adjustable device (sense input for fixed options) PG 2 O Power good EN 3 I Enable input GND 4 Regulator ground IN 5, 6 I Input voltage OUT 7, 8 O Regulated output voltage

I/O

DESCRIPTION

TPS771xx RESET timing diagram

†

res

†

res

Threshold

Voltage

RESET Output

Output

Undefined

†

is the minimum input voltage for a valid RESET

res

semiconductor symbology .

‡

VIT – Trip voltage is typically 5% lower than the output voltage (95%VO) V

‡

IT+

‡

IT–

220 ms Delay

. The symbol V

‡

IT+

‡

IT–

220 ms Delay

Output Undefined

is not currently listed within EIA or JEDEC standards for

res

to V

IT–

is the hysteresis voltage.

IT+

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

TPS772xx PG timing diagram

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

†

res

Threshold

Voltage

Output

Undefined

†

is the minimum input voltage for a valid PG. The symbol V

res

symbology.

‡

VIT – Trip voltage is typically 18% lower than the output voltage (82%VO) V

IT+

‡

IT–

is not currently listed within EIA or JEDEC standards for semiconductor

res

IT+

‡

IT–

to V

is the hysteresis voltage.

IT+

‡

IT–

†

res

Output Undefined

absolute maximum ratings over operating junction temperature range (unless otherwise noted)

Input voltage range, V Voltage range at EN Maximum RESET

Maximum PG voltage (TPS772xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, V Operating virtual junction temperature range, T Storage temperature range, T

ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltage values are with respect to network terminal ground.

, (see Note 1) –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

voltage (TPS771xx) 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

(OUT, FB) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

DGK

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

DISSIPATION RATING TABLE – FREE-AIR TEMPERA TURES

PACKAGE

DGK

AIR FLOW

(CFM)

0 266.2 3.84 376 mW 3.76 mW/°C 207 mW 150 mW 150 255.2 3.92 392 mW 3.92 mW/°C 216 mW 157 mW 250 242.8 4.21 412 mW 4.12 mW/°C 227 mW 165 mW

recommended operating conditions

Input voltage, V Output voltage range, V Output current, IO (see Note 2) 0 150 mA Operating virtual junction temperature, TJ (see Note 2) –40 125

†

To calculate the minimum input voltage for your maximum output current, use the following equation: V

NOTE 2: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

†

device operate under conditions beyond those specified in this table for extended periods of time.

(°C/W)

TA < 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

= V

I(min)

O(max)

TA = 85°C

POWER RATING

MIN MAX UNIT

2.7 10 V

1.5 5.5 V

°C

+ V

DO(max load)

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

Out ut voltage

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

electrical characteristics over recommended operating junction temperature range (–40°C to 125°C), V

Output voltage (see Notes 3 and 4)

Quiescent current (GND current) (see Notes 3 and 4)

Output voltage line regulation (∆VO/VO) (see Note 5) Load regulation TJ = 25°C 1 mV Output noise voltage Output current Limit VO = 0 V 0.9 1.3 A

Peak output current 2 ms pulse width, 50% duty cycle 400 mA Thermal shutdown junction temperature 144 °C

Standby current FB input current Adjustable voltage FB = 1.5 V 1 µA

High level enable input voltage 2 V Low level enable input voltage 0.7 V Enable input current –1 1 µA Power supply ripple rejection (TPS77118, TPS77218) f = 1 KHz, TJ = 25°C 55 dB

NOTES: 3. Minimum input operating voltage is 2.7 V or V

= V

O(typ)

current 1 mA.

4. If VO < 1.8 V then V

Line regulation (mV) +ǒ%ńV

+ 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Adjustable voltage

1.5-V Output

1.8-V Output

2.7-V Output

2.8-V Output

3.3-V Output

5.0-V Output

= 10 V, V

I(max)

1.5 V ≤ VO ≤ 5.5 V, TJ = 25°C V

1.5 V ≤ VO ≤ 5.5 V 0.98V TJ = 25°C, 2.7 V < VIN < 10 V 1.5

2.7 V < VIN < 10 V 1.470 1.530 TJ = 25°C, 2.8 V < VIN < 10 V 1.8

2.8 V < VIN < 10 V 1.764 1.836 TJ = 25°C, 3.7 V < VIN < 10 V 2.7

3.7 V < VIN < 10 V 2.646 2.754 TJ = 25°C, 3.8 V < VIN < 10 V 2.8

3.8 V < VIN < 10 V 2.744 2.856 TJ = 25°C, 4.3 V < VIN < 10 V 3.3

4.3 V < VIN < 10 V 3.234 3.366 TJ = 25°C, 6 V < VIN < 10 V 5.0 6 V < VIN < 10 V 4.900 5.100 TJ = 25°C 92

VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.005 %/V VO + 1 V < VI ≤ 10 V 0.05 %/V

BW = 300 Hz to 100 kHz, TJ = 25°C, TPS771 18, TPS77218

I(min)

EN = V EN = V

O(typ)

= 2.7 V:

I, I

+ 1 V , whichever is greater. Maximum input voltage = 10 V, minimum output

* 2.7 V

I(max)

100

TJ = 25°C 1 µA

1000

1.02V

55 µVrms

125

3 µA

µA

If VO > 2.5 V then V

Line regulation (mV) +ǒ%ńV

5. IO = 1 mA to 150 mA

I(max)

= 10 V, V

= Vo + 1 V:

I(min)

100

I(max)

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VO) 1

1000

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

(TPS772xx)

Reset

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

electrical characteristics over recommended operating junction temperature range (–40°C to 125°C), V

Reset (TPS771xx)

NOTE 6: IN voltage equals VO(typ) – 100 mV; 1.5 V, 1.8 V, and 2.7 V dropout voltage limited by input voltage range limitations (i.e., 3.3 V input

= V

O(typ)

Minimum input voltage for valid PG I Trip threshold voltage VO decreasing 79 85 %V Hysteresis voltage Measured at V Output low voltage VI = 2.7 V, I Leakage current V Minimum input voltage for valid RESET I Trip threshold voltage VO decreasing 92 98 %V Hysteresis voltage Measured at V Output low voltage VI = 2.7 V, I Leakage current V RESET time-out delay 220 ms

Dropout voltage (see Note 6) 3.3-V Output

voltage needs to drop to 3.2 V for purpose of this test).

+ 1 V, IO = 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted) (continued)

PARAMETER TEST CONDITIONS

= 300µA V

2.8-V Output

5.0-V Output

(PG)

= 5 V 1 µA

(PG)

(RESET)

IO = 150 mA, TJ = 25°C 150 IO = 150 mA, 265 IO = 150 mA, TJ = 25°C 115 IO = 150 mA 200 IO = 150 mA, TJ = 25°C 75 IO = 150 mA 115

= 300 µA 1.1 V

(RESET)

= 5 V 1 µA

(PG)

(RESET)

≤ 0.8 V 1.1 V

= 1mA 0.15 0.4 V

= 1 mA 0.15 0.4 V

MIN TYP MAX UNIT

0.5 %V

O O

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Output voltage Ground current vs Junction temperature 6

Power supply rejection ratio vs Frequency 7 Output spectral noise density vs Frequency 8 Output impedance vs Frequency 9

Dropout voltage Line transient response 12, 14

Load transient response 13, 15 Output voltage and enable pulse vs Time 16 Equivalent series resistance (ESR) vs Output current 18 – 21

vs Output current 2, 3 vs Junction temperature

vs Input voltage 10 vs Junction temperature

4, 5

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

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150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

– Output Voltage – V

TPS77x33

OUTPUT VOLTAGE

OUTPUT CURRENT

3.302

3.301

3.3

3.299

3.298 0 50 100 150

IO – Output Current – mA

Figure 2

– Output Voltage – V

TPS77x18

OUTPUT VOLTAGE

OUTPUT CURRENT

1.802

1.801

1.800

1.799

1.798 0 50 100 150

IO – Output Current – mA

Figure 3

OUTPUT VOLTAGE

JUNCTION TEMPERATURE

3.35 VI = 4.3 V

3.33

3.31

3.29

– Output Voltage – V

3.27

3.25

–40 0 40 80

TJ – Junction Temperature – °C

Figure 4

TPS77x33

IO = 150 mA

120 160

TPS77x18

OUTPUT VOLTAGE

JUNCTION TEMPERATURE

1.86 VI = 2.8 V

1.84

1.82 IO = 150 mA

1.80

– Output Voltage – V

1.78

1.76 –40 0 40 80 120 160

TJ – Junction Temperature – °C

Figure 5

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

TPS77xxx

GROUND CURRENT

JUNCTION TEMPERATURE

115

110

105

100

IO = 150 mA

100

90 80 70 60

Ground Current – Aµ

TPS77x33

IO = 1 mA

–40 10 60

TJ – Junction Temperature – °C

POWER SUPPLY REJECTION RATIO

FREQUENCY

IO = 1 mA

CO = 10 µF TJ = 25°C

Figure 6

110 160

V HzOutput Spectral Noise Density – µ

TPS77x33

OUTPUT SPECTRAL NOISE DENSITY

FREQUENCY

CO = 10 µF TJ = 25°C

IO = 150 mA

IO = 1 mA

40 30 20 10

PSRR – Power Supply Rejection Ratio – dB

10 100 1k 10k

IO = 150 mA

100k 10M

f – Frequency – Hz

Figure 7

0.1

0.01

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100 1k 10k 100k

f – Frequency – Hz

Figure 8

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

TPS77x33

OUTPUT IMPEDANCE

FREQUENCY

IO = 1 mA

Ω

0.1

– Output Impedance –Z

IO = 150 mA

– Dropout Voltage – mV

250

200

150

100

0.01 10 100 100k 10M

TPS77x01

DROPOUT VOLTAGE

INPUT VOLTAGE

IO = 150 mA

TJ = 125 °C

TJ = 25 °C

TJ = –40 °C

10k1k

f – Frequency – Hz

Figure 9

300

250

200

150

100

– Dropout Voltage – mV

TPS77x33

DROPOUT VOLTAGE

JUNCTION TEMPERATURE

IO = 150 mA

IO = 10 mA

IO = 0 A

2.7 3.2 3.7 4.2 VI – Input Voltage – V

Figure 10

4.7

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–50

–40 0 40 80 120 160

TJ – Junction Temperature – °C

Figure 11

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

3.8

2.8

– Input Voltage – V

–10

– Change in

∆

Output Voltage – mV

TPS77x18

LINE TRANSIENT RESPONSE

IO = 150 mA CO = 10 µF TJ = 25°C

0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1

t – Time – ms

Figure 12

TPS77x33

LINE TRANSIENT RESPONSE

– Change in∆ V

I – Output Current – mA

TPS77x18

LOAD TRANSIENT RESPONSE

150

–50

IO = 150 mA

–100

Output Voltage – mV

0 0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 1

t – Time – ms

CO = 10 µF TJ = 25°C

Figure 13

TPS77x33

LOAD TRANSIENT RESPONSE

5.3

4.3

– Change in

∆

Output Voltage – mV

+10

–10

– Input Voltage – V

0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 10 t – Time – ms

Figure 14

IO = 150 mA CO = 10 µF TJ = 25°C

– Change in∆

I – Output Current – mA

–100

Output Voltage – mV

150

–50

IO = 150 mA CO = 10 µF TJ = 25°C

0.30.20.1 0.4 0.5 0.70.6 0.8 0.9 10 t – Time – ms

Figure 15

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

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150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

TPS77x33

OUTPUT VOLTAGE AND

ENABLE PULSE

TIME (AT STARTUP)

Enable Pulse – V

– Output Voltage – V

0 2.0

0.2 1.81.61.41.21.00.4 0.6 0.8 t – Time – ms

CO = 10 µF TJ = 25°C

Figure 16

ESR

To Load

OUT

GND

Figure 17. Test Circuit for Typical Regions of Stability (Figures 18 through 21) (Fixed Output Options)

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

TYPICAL CHARACTERISTICS

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

OUTPUT CURRENT

Region of Instability

VO = 3.3 V CO = 1 µF VI = 4.3 V TJ = 25°C

Region of Stability

ESR – Equivalent Series Resistance – Ω

0.1 0 50 100 150

IO – Output Current – mA

Region of Instability

Figure 18

†

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

Region of Stability

0.1 VO = 3.3 V CO = 10 µF VI = 4.3 V

ESR – Equivalent Series Resistance – Ω

TJ = 25°C

0.01 0 50 100 150

IO – Output Current – mA

Region of Instability

Figure 19

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

OUTPUT CURRENT

Region of Instability

VO = 3.3 V CO = 1 µF VI = 4.3 V TJ = 125 °C

Region of Stability

ESR – Equivalent Series Resistance – Ω

0.1 0 50 100 150

IO – Output Current – mA

Region of Instability

Figure 20

†

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

Region of Stability

0.1 VO = 3.3 V CO = 10 µF VI = 4.3 V

ESR – Equivalent Series Resistance – Ω

TJ = 125°C

0.01 0 50 100 150

IO – Output Current – mA

Region of Instability

Figure 21

†

Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

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pin functions

enable (EN)

TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

The EN shutdown mode. When EN

terminal is an input which enables or shuts down the device. If EN is a logic high, the device will be in

goes to logic low, then the device will be enabled.

power good (PG) (TPS772xx)

The PG terminal is an open drain, active high output that indicates the status of V V

reaches 82% of the regulated voltage, PG will go to a high-impedance state. It will go to a low-impedance

out

state when V PG terminal requires a pullup resistor

falls below 82% (i.e. over load condition) of the regulated voltage. The open drain output of the

out

(output of the LDO). When

out

sense (SENSE)

The SENSE terminal of the fixed-output options must be connected to the regulator output, and the connection should be as short as possible. Internally, SENSE connects to a high-impedance wide-bandwidth amplifier through a resistor-divider network and noise pickup feeds through to the regulator output. It is essential to route the SENSE connection in such a way to minimize/avoid noise pickup. Adding RC networks between the SENSE terminal and V

to filter noise is not recommended because it may cause the regulator to oscillate.

out

feedback (FB)

FB is an input terminal used for the adjustable-output options and must be connected to an external feedback resistor divider. The FB connection should be as short as possible. It is essential to route it in such a way to minimize/avoid noise pickup. Adding RC networks between FB terminal and V

to filter noise is not

out

recommended because it may cause the regulator to oscillate.

reset (RESET

The RESET of the regulated voltage, RESET low-impedance state when V

) (TPS771xx)

terminal is an open drain, active low output that indicates the status of V

will go to a high-impedance state after a 220-ms delay. RESET will go to a

is below 95% of the regulated voltage. The open-drain output of the RESET

out

. When V

out

reaches 95%

out

terminal requires a pullup resistor.

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT 150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

external capacitor requirements

An input capacitor is not usually required; however, a bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS771xx or TPS772xx is located more than a few inches from the power supply. A higher-capacitance capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated.

Most low noise LDOs require an external capacitor to further reduce noise. This will impact the cost and board space. The TPS771xx and TPS772xx have very low noise specification requirements without using any external components.

Like all low dropout regulators, the TPS771xx or TPS772xx requires an output capacitor connected between OUT (output of the LDO) and GND (signal ground) to stabilize the internal control loop. The minimum recommended capacitance value is 1 µF provided the ESR meets the requirement in Figures 19 and 21. In addition, a low-ESR capacitor can be used if the capacitance is at least 10 µF and the ESR meets the requirements in Figures 18 and 20. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described previously.

Ceramic capacitors have different types of dielectric material with each exhibiting different temperature and voltage variation. The most common types are X5R, X7R, Y5U, Z5U, and NPO. The NPO type ceramic type capacitors are generally the most stable over temperature. However, the X5R and X7R are also relatively stable over temperature (with the X7R being the more stable of the two) and are therefore acceptable to use. The Y5U and Z5U types provide high capacitance in a small geometry, but exhibit large variations over temperature; therefore, the Y5U and Z5U are not generally recommended for use on this LDO. Independent of which type of capacitor is used, one must make certain that at the worst case condition the capacitance/ESR meets the requirement specified in Figures 18 – 21.

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150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

Figure 22 shows the output capacitor and its parasitic impedances in a typical LDO output stage.

LDO

–

ESR

LOAD

–

Figure 22. LDO Output Stage With Parasitic Resistances ESR and ESL

In steady state (dc state condition), the load current is supplied by the LDO (solid arrow) and the voltage across the capacitor is the same as the output voltage (V branch. If I

suddenly increases (transient condition), the following occurs:

out

D The LDO is not able to supply the sudden current need due to its response time (t

capacitor C

provides the current for the new load condition (dashed arrow). C

out

Cout

= V

. This means no current is flowing into the C

out)

in Figure 23). Therefore,

now acts like a battery

out

with an internal resistance, ESR. Depending on the current demand at the output, a voltage drop will occur at R

D When C

the discharge of C

. This voltage is shown as V

ESR

is conducting current to the load, initial voltage at the load will be V

out

, the output voltage V

out

in Figure 22.

ESR

out

= V

Cout

– V

ESR

. Due to

will drop continuously until the response time t1 of the LDO is reached and the LDO will resume supplying the load. From this point, the output voltage starts rising again until it reaches the regulated voltage. This period is shown as t

in Figure 23.

The figure also shows the impact of different ESRs on the output voltage. The left brackets show different levels of ESRs where number 1 displays the lowest and number 3 displays the highest ESR.

From above, the following conclusions can be drawn:

D The higher the ESR, the larger the droop at the beginning of load transient. D The smaller the output capacitor, the faster the discharge time and the bigger the voltage droop during the

LDO response period.

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SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

conclusion

To minimize the transient output droop, capacitors must have a low ESR and be large enough to support the minimum output voltage requirement.

out

ESR 1 ESR 2

ESR 3

Figure 23. Correlation of Different ESRs and Their Influence to the Regulation of V

Load Step From Low-to-High Output Current

out

at a

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

)

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

programming the TPS77x01 adjustable LDO regulator

The output voltage of the TPS77x01 adjustable regulator is programmed using an external resistor divider as shown in Figure 24. The output voltage is calculated using:

VO+ V

ref

1 )

Where:

= 1.1834 V typ (the internal reference voltage)

ref

Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided, as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:

* 1Ǔ R2

ref

R1 +

0.1 µF

TPS77x01

FB/SENSE

GND

PG or

RESET

OUT

PG or RESET

250 kΩ

Output

OUTPUT VOLTAGE

PROGRAMMING GUIDE

OUTPUT

VOLTAGE

2.5 V

3.3 V

3.6 V

NOTE: To reduce noise and prevent oscillation, R1 and R2 need to be as close as possible to the FB/SENSE terminal.

R1 R2

30.1

33.5

30.1

53.8

30.1

61.5

(2)

UNIT

kΩ kΩ kΩ

Figure 24. TPS77x01 Adjustable LDO Regulator Programming

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SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

APPLICATION INFORMATION

regulator protection

The TPS771xx or TPS772xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate.

The TPS771xx or TPS772xx also features internal current limiting and thermal protection. During normal operation, the TPS771xx or TPS772xx limits output current to approximately 0.9 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.

power dissipation and junction temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P or equal to P

The maximum-power-dissipation limit is determined using the following equation:

D(max)

, and the actual dissipation, PD, which must be less than

D(max)

Where:

max is the maximum allowable junction temperature.

is the thermal resistance junction-to-ambient for the package, i.e., 266.2°C/W for the 8-terminal

θJA

MSOP with no airflow.

is the ambient temperature.

The regulator dissipation is calculated using:

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.

VI* V

TJmax * T

qJA

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TPS77101/115/118/127/128 / 133 / 150 WITH RESET OUTPUT

TPS77201/215/218/227 / 228 / 233/250 WITH POWER GOOD OUTPUT

150-mA LDO REGULATORS WITH 8-PIN MSOP PACKAGING

SLVS225D – FEBRUARY 2000 – REVISED OCTOBER 2000

MECHANICAL DATA

DGK (R-PDSO-G8) PLASTIC SMALL-OUTLINE PACKAGE

0,65

1,07 MAX

3,05 2,95

0,38 0,25

3,05 2,95

Seating Plane

0,15 0,05

0,25

4,98 4,78

0,10

0,15 NOM

Gage Plane

0°–ā6°

0,25

0,69

0,41

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. D. Falls within JEDEC MO-187

4073329/B 04/98

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PACKAGE OPTION ADDENDUM

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PACKAGING INFORMATION

Orderable Device Status

TPS77101DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77101DGKG4 ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77101DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77101DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77115DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77115DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77115DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77118DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77118DGKG4 ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77118DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77118DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77127DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77127DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77127DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77128DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77128DGKG4 ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77128DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77128DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77133DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77133DGKG4 ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77133DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77133DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77150DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

TPS77150DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

TPS77150DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

13-Sep-2005

(3)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

TPS77201DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

13-Sep-2005

(3)

no Sb/Br)

TPS77201DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77201DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77215DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77215DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77215DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77218DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77218DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77218DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77227DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77227DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77227DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77228DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77228DGKG4 ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77228DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77228DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77233DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77233DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77233DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77250DGK ACTIVE MSOP DGK 8 80 Green(RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77250DGKR ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TPS77250DGKRG4 ACTIVE MSOP DGK 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

13-Sep-2005

Addendum-Page 3

IMPORTANT NOTICE

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TEXAS INSTRUMENTS TPS77101, 115, 118, 127, 128 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual