Texas Instruments TPS77050DBVT, TPS77050DBVR, TPS77033DBVT, TPS77033DBVR, TPS77030DBVT Datasheet

...
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
D
50-mA Low-Dropout Regulator
D
2.8-V, 3.0-V, 3.3-V, and 5-V Fixed-Output and
DBV PACKAGE
(TOP VIEW)
1
IN
OUT
5
Adjustable Versions
D
Only 17 µA Quiescent Current at 50 mA
D
1 µA Quiescent Current in Standby Mode
D
Dropout Voltage Typically 35 mV @ 50mA
D
Over Current Limitation
D
–40°C to 125°C Operating Junction
GND
EN
2
3
4
NC/FB
T emperature Range
D
5-Pin SOT-23 (DBV) Package
description
The TPS770xx family of low-dropout (LDO) voltage regulators offers the benefits of low dropout voltage, ultra low-power operation, and miniaturized packaging. These regulators feature low dropout voltages and ultra low quiescent current compared to conventional LDO regulators. Offered in a 5-terminal small outline integrated-circuit SOT-23 package, the TPS770xx series devices are ideal for micropower operations and where board space is at a premium.
A combination of new circuit design and process innovation has enabled the usual PNP pass transistor to be replaced by a PMOS pass element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low — typically 35 mV at 50 mA of load current (TPS77050) — and is directly proportional to the load current. Since the PMOS pass element is a voltage-driven device, the quiescent current is ultra low (28 µA maximum) and is stable over the entire range of output load current (0 mA to 50 mA). Intended for use in portable systems such as laptops and cellular phones, the ultra low-dropout voltage feature and ultra low-power operation result in a significant increase in system battery operating life.
The TPS770xx also features a logic-enabled sleep mode to shut down the regulator, reducing quiescent current to 1 µA typical at T
= 25°C. The
J
TPS770xx is offered in 1.2-V, 1.5-V, 1.8-V, 2.5-V,
2.7-V, 2.8-V, 3.0-V, 3.3-V, and 5-V fixed-voltage versions and in a variable version (programmable over the range of 1.2 V to 5.5 V).
22
21
20
19
18
FREE-AIR TEMPERATURE
VI = 4.3 V CO = 4.7 µF
TPS77033
GROUND CURRENT
vs
IO = 50 mA
IO = 0 mA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Ground Current – Aµ
17
16
15
–40 0–20 20 140–60 40 80 100 12060
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TA – Free-Air Temperature – °C
Copyright 1999, Texas Instruments Incorporated
1
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025
(DBV)
TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
AVAILABLE OPTIONS
T
J
–40°C to 125°C
The DBVT indicates tape and reel of 250 parts.
The DBVR indicates tape and reel of 3000 parts.
functional block diagram
VOLTAGE PACKAGE PART NUMBER SYMBOL
Variable
1.2V to 5.5V
1.2 V TPS77012DBVT†TPS77012DBVR
1.5 V TPS77015DBVT†TPS77015DBVR
1.8 V
2.5 V
2.7 V
2.8 V TPS77028DBVT†TPS77028DBVR
3.0 V TPS77030DBVT†TPS77030DBVR
3.3 V TPS77033DBVT†TPS77033DBVR
5.0 V TPS77050DBVT†TPS77050DBVR
SOT-23
TPS77001DBVT†TPS77001DBVR
TPS77018DBVT†TPS77018DBVR TPS77025DBVT†TPS77025DBVR TPS77027DBVT†TPS77027DBVR
TPS77001
PCPI
PCQI
PCRI
PCSI
PCTI
PCUI
PCVI
PCWI
PCXI
PCYI
EN
GND
GND
IN
EN
OUT
Current Limit
/ Thermal
V
REF
TPS77012/15/18/25/27/28/30/33/50
IN
V
REF
Protection
FB
OUT
Current Limit
/ Thermal
Protection
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
I/O
DESCRIPTION
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
Terminal Functions
TERMINAL
NAME NO.
GND 2 Ground EN 3 I Enable input FB 4 I Feedback voltage (TPS77001 only) IN 1 I Input supply voltage NC 4 No connection (Fixed options only) OUT 5 O Regulated output voltage
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range
Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage on OUT, FB 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T Storage temperature range, T
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to network ground terminal.
Recommended DBV 350 mW 3.5 mW/°C 192 mW 140 mW
Absolute Maximum DBV 437 mW 3.5 mW/°C 280 mW 227 mW
(see Note 1)
stg
PACKAGE
–0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–40°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
J
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DISSIPATION RATING TABLE
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
POWER RATING
TA = 85°C
recommended operating conditions
MIN NOM MAX UNIT
Input voltage, VI (see Note 2) 2.7 10 V Output voltage range, V Continuous output current, IO (see Note 3) 0 50 mA Operating junction temperature, T
NOTES: 2. To calculate the minimum input voltage for your maximum output current, use the following formula:
VI(min) = VO(max) + VDO (max load)
3. Continuous output current and operating junction temperature are limited by internal protection circuitry , but it is not recommended that the device operate under conditions beyond those specified in this table for extended periods of time.
O
J
1.2 5.5 V
–40 125 °C
Ĕ
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025
TPS77001
TPS77012
TPS77015
TPS77018
TPS77025
(10 µA to 50 mA Load) (See
)
V
(See Note 4)
TPS77027
TPS77028
TPS77030
TPS77033
TPS77050
()
A
Output voltage line regulation (VO/V Standby current
TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating free–air temperature range, VI = V 1 V, I
NOTES: 4. Minimum IN operating voltage is 2.7 V or VO (typ) + 1 V , whichever is greater. Maximum IN voltage 10 V, minimum output current
= 50 mA, EN = 0V, C
O
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Output voltage
Note 4
Quiescent current (GND current) (See Note 4)
p
(See Notes 4 and 5)
Load regulation
Output noise voltage Output current limit VO = 0V , See Note 4 350 750 mA
10 µA, maximum output current 50 mA.
5. If VO≤ 1.8 V then V
= 4.7 µF (unless otherwise noted)
O
1.2 V ≤ VO 5.5 V, TJ = 25°C V
1.2 V ≤ VO 5.5 V, TJ = –40°C to 125°C 0.97V TJ = 25°C, 2.7 V < VIN < 10 V 1.224 TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.187 1.261 TJ = 25°C, 2.7 V < VIN < 10 V 1.5 TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.455 1.545 TJ = 25°C, 2.8 V < VIN < 10 V 1.8 TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.746 1.854 TJ = 25°C, 3.5 V < VIN < 10 V 2.5 TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.425 2.575 TJ = 25°C, 3.7 V < VIN < 10 V 2.7 TJ = –40°C to 125°C, 3.7 V < VIN < 10 V 2.619 2.781 TJ = 25°C, 3.8 V < VIN < 10 V 2.8 TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.716 2.884 TJ = 25°C, 4.0 V < VIN < 10 V 3.0 TJ = –40°C to 125°C, 4.0 V < VIN < 10 V 2.910 3.090 TJ = 25°C, 4.3 V < VIN < 10 V 3.3 TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.201 3.399 TJ = 25°C, 6.0 V < VIN < 10 V 5.0 TJ = –40°C to 125°C, 6.0 V < VIN < 10 V 4.850 5.150 EN = 0V, 0 mA < IO < 50mA,
TJ = 25°C EN = 0V, IO = 50mA,
TJ = –40°C to 125°C
O
)
= 2.7 V, V
imin
imax
Line Reg. (mV)
VO + 1 V < VI 10 V, TJ = 25°C 0.04 VO + 1 V < VI 10 V,
TJ = –40°C to 125°C EN = 0V, IO = 0 to 50 mA,
TJ = 25°C BW = 300 Hz to 50 kHz,
Co = 10 µF, TJ = 25°C
EN = VI , 2.7 < VI < 10 V 1 µA TJ = –40°C to 125°C 2 µA
= 10 V:
ǒ
V
V
+ǒ%ńVǓ
O
imax
100
*
2.7 V
O
O
1.03V
O
17
28
0.1
8 mV
190 µVrms
Ǔ
1000
O(typ)
µ
%/V
+
If VO≥ 2.5 V then V
4
= VO + 1 V, V
imin
Line Reg. (mV)
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
= 10 V:
imax
+ǒ%ńVǓ
ǒ
V
imax
*ǒVO)
V
O
100
1V
Ǔ
Ǔ
1000
Input current (EN)
TPS77028
TPS77030
g
mV
TPS77033
TPS77050
VOOutput voltage
Equivalent series resistance (ESR)
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
electrical characteristics over recommended operating free–air temperature range, VI = V 1 V, I
NOTES: 4. Minimum IN operating voltage is 2.7 V or VO (typ) + 1 V , whichever is greater. Maximum IN voltage 10 V, minimum output current
= 50 mA, EN = 0V, C
O
PARAMETER TEST CONDITIONS
FB input current FB = 1.224 V (TPS77001) –1 1 µA High level enable input voltage 2.7 V < VI < 10 V 1.7 V Low level enable input voltage 2.7 V < VI < 10 V 0.9 V
Power supply ripple rejection
p
Dropout voltage (See Note 6)
10 µA, maximum output current 50 mA.
6. IN voltage equals VO(Typ) –100mV; TPS77001 output voltage set to 3.3 V nominal with external resistor divider. TPS77012, TPS77015, TPS77018, TPS77025, and TPS77027 dropout voltage limited by input voltage range limitations.
= 4.7 µF (unless otherwise noted) (continued)
O
f = 1 kHz, CO = 10 µF, TJ = 25°C, See Note 4
EN = 0 V –1 0 1 µA EN = V
I
IO = 50 mA, TJ = 25°C 60 IO = 50 mA TJ = –40°C to 125°C 125 IO = 50 mA, TJ = 25°C 57 IO = 50 mA TJ = –40°C to 125°C 115 IO = 50 mA, TJ = 25°C 48 IO = 50 mA TJ = –40°C to 125°C 100 IO = 50 mA, TJ = 25°C 35 IO = 50 mA TJ = –40°C to 125°C 85
MIN TYP MAX UNIT
60 dB
–1 1 µA
O(typ)
+
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
p
Ground current vs Free-air temperature 7 Output spectral noise density vs Frequency 8
Z
o
V
DO
Output impedance vs Frequency 9 Dropout voltage vs Free-air temperature 10 Ripple rejection vs Frequency 11 LDO startup time 12 Line transient response 13, 15 Load transient response 14, 16
vs Output current 1, 2, 3 vs Free-air temperature 4, 5, 6
vs Output current 17, 19 vs Added ceramic capacitance 18, 20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
2.498
2.496
2.494
2.492
2.490
2.488
– Output Voltage – V
O
V
2.486
2.484
2.482
TPS77025
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
VI = 3.5 V CO = 4.7 µF TA = 25° C
050
10 30
20 40
IO – Output Current – mA
1.498
1.496
1.494
1.492
1.490
– Output Voltage – V
1.488
O
V
1.486
1.484 050
10 30
Figure 1
TPS77015
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
20 40
IO – Output Current – mA
Figure 2
VI = 2.7 V CO = 4.7 µF TA = 25° C
3.284
3.282
3.280
3.278
3.276
– Output Voltage – V
3.274
O
V
3.272
3.270
TPS77033
OUTPUT VOLTAGE
vs
OUTPUT CURRENT
1.496
VI = 4.3 V CO = 4.7 µF TA = 25° C
10 3020 40050
IO – Output Current – mA
1.494
1.492
1.490
1.488
1.486
– Output Voltage – V
O
V
1.484
1.482
1.480 –60
FREE-AIR TEMPERATURE
–40 0
–20 20 140
TA – Free-Air Temperature – °C
Figure 3
TPS77015
OUTPUT VOLTAGE
vs
IO = 1 mA
IO = 50 mA
40 80
60
Figure 4
VI = 2.7 V CO = 4.7 µF
100 120
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
2.496
2.494
2.492
2.490
2.488
2.486
2.484
– Output Voltage – V
2.482
O
V
2.480
2.478
2.476
TPS77025
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
IO = 1 mA
IO = 50 mA
VI = 3.5 V CO = 4.7 µF
–40 0–20 20 140–60 40 80 100 12060
TA – Free-Air Temperature – °C
Figure 5
3.285
3.280
3.275
3.270
3.265
– Output Voltage – V
O
V
3.260
3.255
TPS77033
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VI = 4.3 V CO = 4.7 µF
–40 0–20 20 140–60 40 80 100 12060
TA – Free-Air Temperature – °C
IO = 1 mA
IO = 50 mA
Figure 6
TPS77033
GROUND CURRENT
vs
OUTPUT SPECTRAL NOISE DENSITY
FREE-AIR TEMPERATURE
22
VI = 4.3 V CO = 4.7 µF
21
20
19
IO = 50 mA
18
Ground Current – Aµ
17
16
15
–40 0–20 20 140–60 40 80 100 12060
TA – Free-Air Temperature – °C
IO = 0 mA
2
1.8
V HzOutput Spectral Noise Density – µ
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2 0
100
CO = 4.7 µF IO = 50 mA
VI = 4.3 V
f – Frequency – Hz
Figure 7
TPS77033
vs
FREQUENCY
CO = 10 µF IO = 1 mA
CO = 4.7 µF IO = 1 mA
CO = 10 µF IO = 50 mA
1k 10k 100k
Figure 8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
vs
FREQUENCY
2
VI = 4.3 V CO = 4.7 µF
1.8
1.6
1.4
1.2
1
0.8
0.6
– Output Impedance –Z
o
0.4
0.2 0
IO = 1 mA
IO = 50 mA
100 1M10 1k
f – Frequency – Hz
10k
100k
100
10
– Dropout Voltage – mV
DO
V
1
FREE-AIR TEMPERATURE
VI = 3.2 V CO = 4.7 µF
–40 0–20 20 140–60 40 80 100 12060
TA – Free-Air Temperature – °C
Figure 9
TPS77033
DROPOUT VOLTAGE
vs
IO = 50 mA
IO = 10 mA
Figure 10
RIPPLE REJECTION
100
90 80
70 60 50 40 30
Ripple Rejection – dB
20 10
VI = 4.3 V CO = 4.7 µF
0
ESR = 0.3
–10
10
TPS77033
vs
FREQUENCY
IO = 1 mA
IO = 50 mA
f – Frequency – Hz
Figure 11
LDO STARTUP TIME
EN
V
O
10 M1 M100 k10 k1 k100
0604020 80 100 140120 160 180 200
t – Time – µs
Figure 12
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS77015
LINE TRANSIENT RESPONSE
10
0
–10
– Output Voltage – mV
O
V
3.7
2.7 IL = 10 mA
– Input Voltage – V
I
V
CO = 4.7 µF ESR = 0.3
0604020 80 100 140120 160 180 200
t – Time – µs
Figure 13
TPS77033
LINE TRANSIENT RESPONSE
50
0
Current Load – mA
0
–50
–100
Output Voltage – mV
– Change In
O
V
0604020 80 100 140120 160 180 200
TPS77015
LOAD TRANSIENT RESPONSE
VI = 2.7 V CO = 10 µF ESR = 0.3
t – Time – µs
Figure 14
TPS77033
LOAD TRANSIENT RESPONSE
10
0
–10
– Output Voltage – mVV
O
V
5.3
4.3 IL = 10 mA
– Input Voltage – V
I
CO = 4.7 µF ESR = 0.3
0604020 80 100 140120 160 180
t – Time – µs
Figure 15
50
0
Current Load – mA
0
–20
Output Voltage – mV
– Change In
–40
O
V
0604020 80 100 140120 160 180
t – Time – µs
Figure 16
VI = 4.3 V CO = 4.7 µF ESR = 0.3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TPS77033
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
100
VIN = 4.3 V CO = 4.7 µF ESR = 0.3
3.3 V LDO
10
1
ESR – Equivalent Series Resistance –
0.1 02550
Region of Instability
Region of Stability
ESR – Equivalent Series Resistance –
5 1015 20 30354045
IO – Output Current – mA
Figure 17
TPS77033
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
ADDED CERAMIC CAPACITANCE
100
VIN = 4.3 V CO = 4.7 µF IL = 50 mA
Region of Instability
10
Region of Stability
1
0 0.1 0.2 0.3 0.4 0.5
Added Ceramic Capacitance – µF
0.6 0.7 0.8 0.9 1
Figure 18
TPS77033
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
OUTPUT CURRENT
100
VIN = 4.3 V CO = 10 µF ESR = 0.3
Region of Instability
10
Region of Stability
ESR – Equivalent Series Resistance –
1
02550
5101520 30354045
IO – Output Current – mA
3.3 V LDO
ESR – Equivalent Series Resistance –
Figure 19
TPS77033
TYPICAL REGIONS OF STABILITY
EQUIVALENT SERIES RESISTANCE (ESR)
vs
ADDED CERAMIC CAPACITANCE
100
VIN = 4.3 V CO = 10 µF IL = 50 mA
Region of Instability
10
Region of Stability
1
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Added Ceramic Capacitance – µF
Figure 20
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
The TPS770xx family of low-dropout (LDO) regulators have been optimized for use in battery-operated equipment. They feature extremely low dropout voltages, low quiescent current (17 µA nominally), and enable inputs to reduce supply currents to less than 1 µA when the regulators are turned off.
device operation
The TPS770xx uses a PMOS pass element to dramatically reduce both dropout voltage and supply current over more conventional PNP-pass-element LDO designs. The PMOS pass element is a voltage-controlled device and, unlike a PNP transistor, it does not require increased drive current as output current increases. Supply current in the TPS770xx is essentially constant from no load to maximum load.
Current limiting and thermal protection prevent damage by excessive output current and/or power dissipation. The device switches into a constant-current mode at approximately 350 mA; further load reduces the output voltage instead of increasing the output current. The thermal protection shuts the regulator off if the junction temperature rises above approximately 165°C. Recovery is automatic when the junction temperature drops approximately 25°C below the high temperature trip point. The PMOS pass element includes a back gate diode that conducts reverse current when the input voltage level drops below the output voltage level.
A voltage of 1.7 V or greater on the EN input will disable the TPS770xx internal circuitry, reducing the supply current to 1µA. A voltage of less than 0.9 V on the EN operation to resume. The EN input does not include any deliberate hysteresis, and it exhibits an actual switching threshold of approximately 1.5 V.
input will enable the TPS770xx and will enable normal
A typical application circuit is shown in Figure 21.
1
V
I
C1
1 µF
TPS77012, TPS77015, TPS77018, TPS77025, TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 (fixed-voltage options).
IN
3
EN
Figure 21. Typical Application Circuit
TPS770xx
NC/FB
OUT
GND
2
4
5
V
O
+
4.7 µF
ESR = 0.2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
external capacitor requirements
Although not required, a 0.047-µF or larger ceramic input bypass capacitor , connected between IN and GND and located close to the TPS770xx, is recommended to improve transient response and noise rejection. A higher-value electrolytic input capacitor may be necessary if large, fast-rise-time load transients are anticipated and the device is located several inches from the power source.
Like all low dropout regulators, the TPS770xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance is 4.7 µF. The ESR (equivalent series resistance) of the capacitor should be between 0.2 and 10 . to ensure stability . Capacitor values larger than 4.7 µF are acceptable, and allow the use of smaller ESR values. Capacitances less than 4.7 µF are not recommended because they require careful selection of ESR to ensure stability. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 4.7 µF surface-mount solid tantalum capacitors, including devices from Sprague, Kemet, and Nichico, meet the ESR requirements stated above. Multilayer ceramic capacitors may have very small equivalent series resistances and may thus require the addition of a low value series resistor to ensure stability.
CAP ACITOR SELECTION
PART NO. MFR. VALUE MAX ESR
T494B475K016AS KEMET 4.7 µF 1.5 1.9 × 3.5 × 2.8 195D106x0016x2T SPRAGUE 10 µF 1.5 Ω 1.3 × 7.0 × 2.7 695D106x003562T SPRAGUE 10 µF 1.3 Ω 2.5 × 7.6 × 2.5 TPSC475K035R0600 AVX 4.7 µF 0.6 Ω 2.6 × 6.0 × 3.2
Size is in mm. ESR is maximum resistance in Ohms at 100 kHz and TA = 25°C. Contact manufacturer for minimum ESR values.
SIZE (H × L × W)
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
output voltage programming
The output voltage of the TPS77001 adjustable regulator is programmed using an external resistor divider as shown in Figure 22. The output voltage is calculated using:
R1
VO+
V
ǒ1
ref
where
V
= 1.224 V typ (the internal reference voltage)
ref
Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using:
V
R1
+ ǒ
O
*
V
ref
)
1
Ǔ
R2
Ǔ
R2
(1)
(2)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE
(V)
2.5
3.3
3.6
4.0
5.0
1% values shown.
DIVIDER RESISTANCE
TPS77001
(kΩ)
R1 R2
174 287 324 383 523
169 169 169 169 169
V
1.7 V
I 1 µF
0.9 V
1
IN
5
OUT
3
EN
GND
4
FB
2
Figure 22. TPS77001 Adjustable LDO Regulator Programming
R1
R2
V
O
4.7 µF
ESR = 0.2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
13
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050 ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
APPLICATION INFORMATION
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P or equal to P
The maximum-power-dissipation limit is determined using the following equation:
D(max)
.
, and the actual dissipation, PD, which must be less than
D(max)
P
D(max)
Where
TJmax is the maximum allowable junction temperature
R
θJA
SOT23. T
is the ambient temperature.
A
The regulator dissipation is calculated using:
PD+ǒVI*
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.
TJmax*T
+
R
is the thermal resistance junction-to-ambient for the package, i.e., 285°C/W for the 5-terminal
Ǔ
V
O
A
q
JA
I
O
regulator protection
The TPS770xx PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate.
The TPS770xx features internal current limiting and thermal protection. During normal operation, the TPS770xx limits output current to approximately 350 mA. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds approximately 165°C, thermal-protection circuitry shuts it down. Once the device has cooled down to below approximately 140°C, regulator operation resumes.
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TPS77001, TPS77012, TPS77015, TPS77018, TPS77025 TPS77027, TPS77028, TPS77030, TPS77033, TPS77050
ULTRA LOW-POWER 50-mA LOW-DROPOUT LINEAR REGULATORS
SLVS210C – JUNE 1999 – REVISED SEPTEMBER 1999
MECHANICAL DATA
DBV (R-PDSO-G5) PLASTIC SMALL-OUTLINE PACKAGE
0,95
1,30 1,00
0,40 0,20
45
1,80 1,50
1
3,10
2,70
3
0,05 MIN
M
0,25
3,00 2,50
Seating Plane
0,10
0,15 NOM
0°–8°
Gage Plane
0,25
0,55 0,35
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice. C. Body dimensions include mold flash or protrusion.
4073253-4/B 10/97
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
15
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