Texas Instruments TPS76801QDR, TPS76801QD, TPS76850QPWPR, TPS76850QPWP, TPS76850QDR Datasheet

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TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

1 A Low-Dropout Voltage Regulator

Available in 1.5-V, 1.8-V, 2.5-V , 2.7-V, 2.8-V,

3.0-V, 3.3-V, 5.0-V Fixed Output and Adjustable Versions

Dropout Voltage Down to 230 mV at 1 A (TPS76850)

Ultra Low 85 µA Typical Quiescent Current

Fast Transient Response

2% Tolerance Over Specified Conditions for Fixed-Output Versions

Open Drain Power Good (See TPS767xx for Power-On Reset With 200-ms Delay Option)

8-Pin SOIC and 20-Pin TSSOP (PWP) Package

Thermal Shutdown Protection

description

This device is designed to have a fast transient response and be stable with 10-µF low ESR capacitors. This combination provides high performance at a reasonable cost.

PWP PACKAGE

(TOP VIEW)

NC EN

IN IN

1 2 3 4 5 6 7 8 9 10

D PACKAGE

(TOP VIEW)

1 2 3 4

GND/HSINK GND/HSINK

GND

GND/HSINK GND/HSINK

NC – No internal connection

GND

GND/HSINK

FB/NC

OUT

GND/HSINK

FB/NC

OUT

6 5

OUT

TPS76833

DROPOUT VOLTAGE

FREE-AIR TEMPERATURE

IO = 1 A

– Dropout Voltage – mV

–1

CO = 10 µF

–2

–40 0 20 120

–60 40 60 80 100

–20 140

TA – Free-Air Temperature – °C

IO = 10 mA

IO = 0

100

– Change in∆

–50

Output Voltage – mV

–100

0.5

I – Output Current – A

LOAD TRANSIENT RESPONSE

CL = 10 µF TA = 25°C

604020 80 100 140120 160 180 200

t – Time – µs

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

–40 C to 125 C

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

description (continued)

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV at an output current of 1 A for the TPS76850) and is directly proportional to the output current. Additionally , since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep mode; applying a TTL high signal to EN less than 1 µA at TJ = 25°C.

Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS768xx is offered in 1.5-V, 1.8-V , 2.5-V, 2.7-V , 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 5.5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS768xx family is available in 8 pin SOIC and 20 pin PWP packages.

–

The TPS76801 is programmable using an external resistor divider (see application information). The D and PWP packages are available taped and reeled. Add an R suffix to the device type (e.g., TPS76801QDR).

0.1 µF

(enable) shuts down the regulator, reducing the quiescent current to

AVAILABLE OPTIONS

OUTPUT

VOLTAGE

(V)

TYP

5.0 TPS76850Q TPS76850Q

3.3 TPS76833Q TPS76833Q

3.0 TPS76830Q TPS76830Q

2.8 TPS76828Q TPS76828Q

2.7 TPS76827Q TPS76827Q

2.5 TPS76825Q TPS76825Q

1.8 TPS76818Q TPS76818Q

1.5 TPS76815Q TPS76815Q

Adjustable

1.2 V to 5.5 V

TPS768xx

GND

PACKAGED DEVICES

TSSSOP

(PWP)

TPS76801Q TPS76801Q

OUT

SOIC

(D)

10 µF

†

See application information section for capacitor selection details.

Figure 1. Typical Application Configuration (For Fixed Output Options)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

functional block diagram—adjustable version

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

SLVS211B – JUNE 1999 – REVISED JULY 1999

= 1.1834 V

ref

GND

functional block diagram—fixed-voltage version

_ +

OUT

FB/NC

External to the device

OUT

= 1.1834 V

ref

+ _

GND

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

I/O

DESCRIPTION

I/O

DESCRIPTION

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

Terminal Functions – SOIC Package

TERMINAL

NAME NO.

GND 1 Regulator ground EN 2 I Enable input IN 3 I Input voltage IN 4 I Input voltage OUT 5 O Regulated output voltage OUT 6 O Regulated output voltage FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options) PG 8 O PG output

Terminal Functions – PWP Package

TERMINAL

NAME NO.

GND/HSINK 1 Ground/heatsink GND/HSINK 2 Ground/heatsink GND 3 LDO ground NC 4 No connect EN 5 I Enable input IN 6 I Input IN 7 I Input NC 8 No connect GND/HSINK 9 Ground/heatsink GND/HSINK 10 Ground/heatsink GND/HSINK 11 Ground/heatsink GND/HSINK 12 Ground/heatsink OUT 13 O Regulated output voltage OUT 14 O Regulated output voltage FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options) PG 16 O PG output NC 17 No connect NC 18 No connect GND/HSINK 19 Ground/heatsink GND/HSINK 20 Ground/heatsink

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PWP

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum PG voltage 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage, V

Operating virtual junction temperature range, TJ –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

‡

All voltage values are with respect to network terminal ground.

PACKAGE

This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper, 2-in × 2-in coverage (4 in2).

This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer to TI technical brief SLMA002.

(OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES

AIR FLOW

(CFM)

0 568.18 mW 5.6818 mW/°C 312.5 mW 227.27 mW

250 904.15 mW 9.0415 mW/°C 497.28 mW 361.66 mW

DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES

AIR FLOW

(CFM)

0 2.9 W 23.5 mW/°C 1.9 W 1.5 W

300 4.3 W 34.6 mW/°C 2.8 W 2.2 W

0 3 W 23.8 mW/°C 1.9 W 1.5 W

300 7.2 W 57.9 mW/°C 4.6 W 3.8 W

TA < 25°C

POWER RATING

TA < 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

TA = 85°C

POWER RATING

recommended operating conditions

MIN MAX UNIT

Input voltage, V Output voltage range, V Output current, IO (Note 1) 0 1.0 A Operating virtual junction temperature, TJ (Note 1) –40 125 °C

To calculate the minimum input voltage for your maximum output current, use the following equation: V

NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the

I(min)

device operate under conditions beyond those specified in this table for extended periods of time.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

= V

2.7 10 V

1.2 5.5 V

+ V

O(max)

DO(max load)

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76801

TPS76815

TPS76818

TPS76825

(10 µA to 1 A load) (see

)

TPS76827

(see Note 2)

TPS76828

TPS76830

TPS76833

TPS76850

()

Standby current Input current (EN)

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

electrical characteristics over recommended operating free-air temperature range, V

= V

Output voltage

Note 2

Quiescent current (GND current) EN = 0V, (see Note 2)

Output voltage line regulation (∆VO/V (see Notes 2 and 3)

Load regulation 3 mV Output noise voltage Output current Limit VO = 0 V 1.7 2 A

Thermal shutdown junction temperature 150 °C

FB input current TPS76801 FB = 1.5 V 2 nA High level enable input voltage 1.7 V Low level enable input voltage 0.9 V

Power supply ripple rejection (see Note 2)

NOTE: 2. Minimum IN operating voltage is 2.7 V or V

+ 1 V, I

O(typ)

Minimum input voltage for valid PG I Trip threshold voltage VO decreasing 92 98 %V Hysteresis voltage Measured at V Output low voltage VI = 2.7 V, I Leakage current V

= 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

5.5 V ≥ VO ≥ 1.2 V, TJ = 25°C V

5.5 V ≥ VO ≥ 1.2 V, TJ = –40°C to 125°C 0.98V TJ = 25°C, 2.7 V < VIN < 10 V 1.5 TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.470 1.530 TJ = 25°C, 2.8 V < VIN < 10 V 1.8 TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.764 1.836 TJ = 25°C, 3.5 V < VIN < 10 V 2.5 TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.450 2.550 TJ = 25°C, 3.7 V < VIN < 10 V 2.7 TJ = –40°C to 125°C, 3.7 V < VIN < 10 V 2.646 2.754 TJ = 25°C, 3.8 V < VIN < 10 V 2.8 TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.744 2.856 TJ = 25°C, 4.0 V < VIN < 10 V 3.0 TJ = –40°C to 125°C, 4.0 V < VIN < 10 V 2.940 3.060 TJ = 25°C, 4.3 V < VIN < 10 V 3.3 TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.234 3.366 TJ = 25°C, 6.0 V < VIN < 10 V 5.0 TJ = –40°C to 125°C, 6.0 V < VIN < 10 V 4.900 5.100 10 µA < IO < 1 A, TJ = 25°C 85 IO = 1 A, TJ = –40°C to 125°C 125

)

VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V

BW = 300 Hz to 50 kHz, CO = 10 µF, TJ = 25°C

EN = V

f = 1 KHz, CO = 10 µF, TJ = 25°C

= 300µA 1.1 V

O(PG)

= 5 V 1 µA

(PG) EN = 0 V –1 0 1 EN = V

+ 1 V, whichever is greater. Maximum IN voltage 10 V.

O(typ)

TJ = 25°C,

2.7 V < VI < 10 V TJ = –40°C to 125°C

2.7 V < VI < 10 V

= 1mA 0.15 0.4 V

O(PG)

–1 1

190 µVrms

1 µA

60 dB

0.5 %V

1.02V

10 µA

O O

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76828

TPS76830

TPS76833

TPS76850

VOOutput voltage

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

electrical characteristics over recommended operating free-air temperature range, V

= V

Dropout voltage (See Note 4)

NOTES: 3. If VO ≤ 1.8 V then V

O(typ)

+ 1 V, I

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

= 1 mA, EN = 0 V, CO = 10 µF (unless otherwise noted) (continued)

IO = 1 A, TJ = 25°C 500 IO = 1 A, TJ = –40°C to 125°C 825 IO = 1 A, TJ = 25°C 450 IO = 1 A, TJ = –40°C to 125°C 675 IO = 1 A, TJ = 25°C 350 IO = 1 A, TJ = –40°C to 125°C 575 IO = 1 A, TJ = 25°C 230 IO = 1 A, TJ = –40°C to 125°C 380

= 10 V, V

imax

Line Reg. (mV)

= 2.7 V:

imin

+ǒ%ńVǓ

imax

100

2.7 V

1000

If VO ≥ 2.5 V then V

4. IN voltage equals VO(Typ) – 100 mV; TPS76801 output voltage set to 3.3 V nominal with external resistor divider. TPS76815, TPS76818, TPS76825, and TPS76827 dropout voltage limited by input voltage range limitations (i.e., TPS76830 input voltage needs to drop to 2.9 V for purpose of this test).

= 10 V, V

imax

Line Reg. (mV)

imin

= VO + 1 V:

+ǒ%ńVǓ

imax

*ǒVO)

100

1000

Table of Graphs

FIGURE

Ground current vs Free-air temperature 8, 9 Power supply ripple rejection vs Frequency 10 Output noise vs Frequency 11

Output impedance vs Frequency 12 Dropout voltage vs Free-air temperature 13 Line transient response 14, 16 Load transient response 15, 17 Output voltage vs Time 18 Dropout voltage vs Input voltage 19 Equivalent series resistance (ESR) vs Output current 21 – 24

vs Output current 2, 3, 4 vs Free-air temperature 5, 6, 7

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

3.2835

3.2830

3.2825

3.2820

3.2815

– Output Voltage – V

3.2810

3.2805

3.2800

TPS76833

OUTPUT VOLTAGE

OUTPUT CURRENT

VI = 4.3 V TA = 25°C

0.1 0.3

0 0.9

0.2 0.8 1

0.4 0.5 0.6 0.7

IO – Output Current – A

Figure 2

1.4985

1.4980

1.4975

1.4970

1.4965

– Output Voltage – V

1.4960

1.4955

1.4950

TPS76815

OUTPUT VOLTAGE

OUTPUT CURRENT

VI = 2.7 V TA = 25°C

0.1 0.30.2 0.8 10 0.90.4 0.5 0.6 0.7 IO – Output Current – A

Figure 3

2.4960

2.4955

2.4950

2.4945

2.4940

2.4935

– Output Voltage – V

2.4930

2.4925

2.4920

TPS76825

OUTPUT VOLTAGE

OUTPUT CURRENT

0.1 0.3

0 0.5

0.2 0.4 0.6 IO – Output Current – A

Figure 4

VI = 3.5 V TA = 25°C

0.80.7 0.9 1

TPS76833

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

3.32 VI = 4.3 V

3.31

3.30

3.29

IO = 1 A

3.28

– Output Voltage – V

3.27

3.26

3.25 –40 0

–60 120

–20 100 140

TA – Free-Air Temperature – °C

IO = 1 mA

20 40 60 80

Figure 5

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

1.515

1.510

1.505

1.500

1.495

– Output Voltage – V

1.490

1.485

TPS76815

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

VI = 2.7 V

IO = 1 A

IO = 1 mA

–40 0

–20 100–60 120

TA – Free-Air Temperature – °C

20 40 60 80

Figure 6

140

2.515

2.510

2.505

2.500

2.495

– Output Voltage – V

2.490

2.485

2.480

TPS76825

OUTPUT VOLTAGE

FREE-AIR TEMPERATURE

VI = 3.5 V

IO = 1 A

IO = 1 mA

–40 0–20 100–60 12020 40 60 80

TA – Free-Air Temperature – °C

Figure 7

TPS76833

GROUND CURRENT

FREE-AIR TEMPERATURE

82 80

Ground Current – Aµ

74 72

VI = 4.3 V

IO = 1 mA

IO = 1 A

IO = 500 mA

–40 0–20 100–60 12020 40 60 80 140

TA – Free-Air Temperature – °C

100

Ground Current – Aµ

FREE-AIR TEMPERATURE

VI = 2.7 V

IO = 1 mA

–40 0–20 100–60 12020 40 60 80 140

TA – Free-Air Temperature – °C

TPS76815

GROUND CURRENT

IO = 1 A

IO = 500 mA

Figure 8 Figure 9

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

TPS76833

POWER SUPPLY RIPPLE REJECTION

FREQUENCY

90 80

60 50 40

PSRR – Power Supply Ripple Rejection – dB

–10

1k10010

f – Frequency – Hz

Figure 10

VI = 4.3 V CO = 10 µF IO = 1 A TA = 25°C

100k10k

TPS76833

OUTPUT SPECTRAL NOISE DENSITY

FREQUENCY

–5

V HzOutput Spectral Noise Density – µ

–6

–7

–8

IO = 1 A

f – Frequency – Hz

IO = 7 mA

VI = 4.3 V CO = 10 µF TA = 25°C

Figure 11

TPS76833

OUTPUT IMPEDANCE

FREQUENCY

VI = 4.3 V CO = 10 µF TA = 25°C

Ω

– Output Impedance –Z

–1

–2

IO = 1 mA

f – Frequency – kHz

IO = 1 A

– Dropout Voltage – mV

–1

–2

–60 40 60 80 100

FREE-AIR TEMPERATURE

CO = 10 µF

–40 0 20 120

–20 140

TA – Free-Air Temperature – °C

Figure 12

TPS76833

DROPOUT VOLTAGE

IO = 1 A

IO = 10 mA

IO = 0

Figure 13

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

TPS76815

LINE TRANSIENT RESPONSE

3.7

2.7

– Input Voltage – V

– Change in

–10

∆

Output Voltage – mV

CL = 10 µF TA = 25°C

0604020 80 100 140120 160 180 200

t – Time – µs

Figure 14

TPS76833

LINE TRANSIENT RESPONSE

CL = 10 µF TA = 25°C

100

– Change in∆

–50

Output Voltage – mV

–100

0.5

I – Output Current – A

100

TPS76815

LOAD TRANSIENT RESPONSE

CL = 10 µF TA = 25°C

0604020 80 100 140120 160 180 200

t – Time – µs

Figure 15

TPS76833

LOAD TRANSIENT RESPONSE

CL = 10 µF TA = 25°C

5.3

– Input Voltage – V

4.3

– Change in

–10

∆

Output Voltage – mV

604020 80 100 140120 160 180 200

t – Time – µs

Figure 16

– Change in∆

–50

Output Voltage – mV

–100

0.5

I – Output Current – A

604020 80 100 140120 160 180 200

t – Time – µs

Figure 17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

– Output Voltage – V

Enable Pulse – V

TPS76833

OUTPUT VOLTAGE

TIME (AT STARTUP)

604020 80 100 140120 160 180 2000

t – Time – µs

Figure 18

900

800

700

600

500

400

300

– Dropout Voltage – mV

200

100

TPS76801

DROPOUT VOLTAGE

INPUT VOLTAGE

IO = 1 A

TA = 25°C

TA = –40°C

3.52.5

VI – Input Voltage – V

TA = 125°C

4.5 5

Figure 19

ESR

To Load

OUT

GND

Figure 20. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)

†

Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

TYPICAL CHARACTERISTICS

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

OUTPUT CURRENT

Region of Instability

Region of Stability

ESR – Equivalent series restance – Ω

Vo = 3.3 V CL = 4.7 µF VI = 4.3 V TA = 25°C

0.1 0 200 400 600 800 1000

IO – Output Current – mA

Figure 21

†

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

Ω

Region of Instability

Vo = 3.3 V Cl = 4.7 µF VI = 4.3 V TJ = 125°C

Region of Stability

ESR – Equivalent Series Resistance –

0.1 0 200 400 600 800 1000

IO – Output Current – mA

Figure 22

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

†

OUTPUT CURRENT

Region of Instability

Region of Stability

ESR – Equivalent series restance – Ω

Vo = 3.3 V CL = 22 µF VI = 4.3 V TA = 25°C

0.1 0 200 400 600 800 1000

IO – Output Current – mA

ESR – Equivalent series restance – Ω

0.1 0 200 400 600 800 1000

Figure 23

†

Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added externally , and PWB trace resistance to CO.

TYPICAL REGION OF STABILITY

EQUIVALENT SERIES RESISTANCE

OUTPUT CURRENT

Region of Instability

Vo = 3.3 V Cl = 22 µF VI = 4.3 V TJ = 125°C

Region of Stability

IO – Output Current – mA

Figure 24

†

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TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

APPLICATION INFORMATION

The TPS768xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,

3.3 V, and 5.0 V), and offers an adjustable device, the TPS76801 (adjustable from 1.2 V to 5.5 V).

device operation

The TPS768xx features very low quiescent current, which remains virtually constant even with varying loads. Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the load current through the regulator (IB = IC/β). The TPS768xx uses a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.

Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems, it means rapid battery discharge when the voltage decays below the minimum required for regulation. The TPS768xx quiescent current remains low even when the regulator drops out, eliminating both problems.

The TPS768xx family also features a shutdown mode that places the output in the high-impedance state (essentially equal to the feedback-divider resistance) and reduces quiescent current to 2 µA. If the shutdown feature is not used, EN voltage is reestablished in typically 120 µs.

should be tied to ground. Response to an enable transition is quick; regulated output

minimum load requirements

The TPS768xx family is stable even at zero load; no minimum load is required for operation.

FB - pin connection (adjustable version only)

The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 26. Normally , this connection should be as short as possible; however, the connection can be made near a critical circuit to improve performance at that point. Internally , FB connects to a high-impedance wide-bandwidth amplifier and noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup is essential.

external capacitor requirements

An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves load transient response and noise rejection if the TPS768xx is located more than a few inches from the power supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load transients with fast rise times are anticipated.

Like all low dropout regulators, the TPS768xx requires an output capacitor connected between OUT and GND to stabilize the internal control loop. The minimum recommended capacitance value is 10 µF and the ESR (equivalent series resistance) must be between 50 mΩ and 1.5 Ω. Capacitor values 10 µF or larger are acceptable, provided the ESR is less than 1.5 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer ceramic capacitors are all suitable, provided they meet the requirements described above. Most of the commercially available 10 µF surface–mount ceramic capacitors, including devices from Sprague and Kemet, meet the ESR requirements stated above.

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TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

APPLICATION INFORMATION

external capacitor requirements (continued)

TPS768xx

0.1 µF

GND

Figure 25. Typical Application Circuit (Fixed Versions)

programming the TPS76801 adjustable LDO regulator

OUT OUT

14 13

10 µF

SLVS211B – JUNE 1999 – REVISED JULY 1999

250 kΩ

The output voltage of the TPS76801 adjustable regulator is programmed using an external resistor divider as shown in Figure 26. The output voltage is calculated using:

VO+

ǒ1

ref

)

(1)

Where

= 1.1834 V typ (the internal reference voltage)

ref

Resistors R1 and R2 should be chosen for approximately 50-µA divider current. Lower value resistors can be used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage currents at FB increase the output voltage error. The recommended design procedure is to choose R2 = 30.1 kΩ to set the divider current at 50 µA and then calculate R1 using:

≥ 1.7 V

0.1 µF

≤ 0.9 V

TPS76801

FB / NC

GND

OUT

250 kΩ

OUTPUT VOLTAGE

PROGRAMMING GUIDE

OUTPUT

VOLTAGE

2.5 V

3.3 V

3.6 V

4.75 V

R1 R2

33.2

30.1

53.6

30.1

61.9

30.1

90.8

30.1

ref

(2)

UNIT

kΩ kΩ kΩ kΩ

Figure 26. TPS76801 Adjustable LDO Regulator Programming

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SLVS211B – JUNE 1999 – REVISED JULY 1999

APPLICATION INFORMATION

power-good indicator

The TPS768xx features a power-good (PG) output that can be used to monitor the status of the regulator. The internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a low-battery indicator. PG does not assert itself when the regulated output voltage falls out of the specified 2% tolerance, but instead reports an output voltage low, relative to its nominal regulated value.

regulator protection

The TPS768xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be appropriate.

The TPS768xx also features internal current limiting and thermal protection. During normal operation, the TPS768xx limits output current to approximately 1.7 A. When current limiting engages, the output voltage scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross device failure, care should be taken not to exceed the power dissipation ratings of the package. If the temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has cooled below 130°C(typ), regulator operation resumes.

power dissipation and junction temperature

Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits, calculate the maximum allowable dissipation, P or equal to P

The maximum-power-dissipation limit is determined using the following equation:

D(max)

Where

TJmax is the maximum allowable junction temperature R

is the thermal resistance junction-to-ambient for the package, i.e., 172°C/W for the 8-terminal

θJA

SOIC and 32.6°C/W for the 20-terminal PWP with no airflow.

is the ambient temperature.

The regulator dissipation is calculated using:

PD+ǒVI*

Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the thermal protection circuit.

D(max)

TJmax*T

D(max)

, and the actual dissipation, PD, which must be less than

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TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q

TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q

FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

MECHANICAL DATA

D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PIN SHOWN

0.069 (1,75) MAX

0.050 (1,27)

0.020 (0,51)

0.014 (0,35)

0.010 (0,25)

0.004 (0,10)

0.010 (0,25)

0.157 (4,00)

0.150 (3,81)

0.244 (6,20)

0.228 (5,80)

Seating Plane

0.004 (0,10)

PINS **

DIM

A MAX

A MIN

0.008 (0,20) NOM

Gage Plane

0°–8°

0.197

(5,00)

0.189

(4,80)

0.344

(8,75)

0.337

(8,55)

0.010 (0,25)

0.044 (1,12)

0.016 (0,40)

4040047/B 03/95

0.394

(10,00)

0.386

(9,80)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Four center pins are connected to die mount pad. E. Falls within JEDEC MS-012

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TPS76815Q, TPS76818Q, TPS76825Q, TPS76827Q TPS76828Q, TPS76830Q TPS76833Q, TPS76850Q, TPS76801Q FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS

SLVS211B – JUNE 1999 – REVISED JULY 1999

MECHANICAL DATA

PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE PACKAGE

20-PIN SHOWN

0,65

1,20 MAX

0,30

0,19

4,50 4,30

0,15 0,05

PINS **

DIM

0,10

6,60 6,20

Seating Plane

0,10

1614

Thermal Pad (See Note D)

0,15 NOM

0°–8°

Gage Plane

0,25

0,75 0,50

2824

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane. This pad is electrically

and thermally connected to the backside of the die and possibly selected leads.

E. Falls within JEDEC MO-153

PowerPAD is a trademark of Texas Instruments Incorporated.

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

4073225/E 03/97

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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Texas Instruments TPS76801QDR, TPS76801QD, TPS76850QPWPR, TPS76850QPWP, TPS76850QDR Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual