Texas Instruments TPS51123ARGER Schematic [ru]

TPS51123A
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SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
Dual-Synchronous, Step-Down Controller with Out-of-Audio™ Operation and 100-mA
LDOs for Notebook System Power
Check for Samples: TPS51123A
1

FEATURES

2
Wide-Input Voltage Range: 5.5 V to 28 V
Output Voltage Range: 2 V to 5.5 V I/O Supplies
Built-in 100-mA 5-V/3.3-V LDO with Switches System Power Supplies
Built-in 1% 2-V Reference Output
With/Without Out-of-Audio™ Mode Selectable Light-Load and PWM-Only Operation
Internal 1.6-ms Voltage Servo Soft-Start
Adaptive On-Time Control Architecture with Four Selectable Frequency Setting
4500 ppm/°C R
Built-In Output Discharge
Power Good Output
Built-in OVP/UVP/OCP
Thermal Shutdown (Non-latch)
24-Pin QFN (RGE) Package
Current Sensing
DS(on)
Notebook Computers

DESCRIPTION

The TPS51123A is a cost effective, dual-synchronous buck controller targeted for notebook system power supply solutions. It provides 5-V and 3.3-V LDOs and requires few external components. The TPS51123A supports high-efficiency, fast transient responses and provides a combined power-good signal. Out-of­Audio™ mode light-load operation enables low acoustic noise at much higher efficiency than conventional forced PWM operation. Adaptive on­time D-CAP™ control provides convenient and efficient operation. The part operates with supply input voltages ranging from 5.5 V to 28 V and supports output voltages from 2 V to 5.5 V. The TPS51123A is available in a 24-pin QFN package and is specified from -40°C to 85°C ambient temperature range.
Table 1. Differences Between the TPS51123 and TPS51123A
LDO Output Capacitance Requirement
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Out-of-Audio, D-CAP are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
(1 µF acceptable at no load) (1 µF acceptable at no load)
TPS51123 TPS51123A
VREG5: at least 33 µF VREG5: 10 µF or larger (X5R or X7R) VREG3: at most 10 µF VREG3: 10 µF or larger (X5R or X7R)
VREF: 0.22 µF to 1 µF VREF: 0.22 µF to 1 µF (X5R or X7R)
Copyright © 2011–2012, Texas Instruments Incorporated
7
8
9
10
24
23
22
21
VO1
PGOOD
VBST1
DRVH1
VO2
VREG3
VBST2
DRVH2
TPS51123ARGE
(QFN-24)
11
12
20
19
LL1
DRVL1
LL2
DRVL2
13 14 15 16 17 18
EN0
SKIPSEL
GND
VIN
VREG5
ENC
6 5 4 3 2 1
TRIP2
VFB2
TONSEL
VREF
VFB1
TRIP1
PowerPAD
220 nF
20 kW 20 kW 30 kW
100 kW
VREG5
10 mF
5.1 W
0.1 mF
130 kW130 kW
3.3 mF
330 mF
VO1
5 V
VIN
VREG5
ENC
VIN
10 mF x 2
VIN
5.5 V to
28 V
EN0
5.1 W
0.1 mF
3.3 mF
330 mF
VO2
3.3 V
10 mF x 2
10 mF
13 kW
UDG-10086
VIN
TPS51123A
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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TPS51123A
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ORDERING INFORMATION
T
A
-40°C to 85°C 24
PACKAGE PINS ECO PLAN
Plastic Quad Flat Pack Green (RoHS and
(QFN) no Sb/Br)
ORDERABLE OUTPUT MINIMUM
DEVICE SUPPLY QUANTITY
TPS51123ARGER Tape/Reel 3000 TPS51123ARGET Small Tape/Reel 250
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
(1)
(1) For the most current spcifications and package information, see the Package Option Addendum located at the end of this data sheet or
refer to our web site at http://www.ti.com.

ABSOLUTE MAXIMUM RATINGS

(1)
over operating free-air temperature range (unless otherwise noted)
PARAMETER UNIT
VBST1, VBST2 –0.3 36 VIN –0.3 30 LL1, LL2 –2.0 30 LL1, LL2, pulse width < 20 ns –5.0 30 VBST1, VBST2
(2)
Input voltage range
(1)
EN0, ENC, TRIP1, TRIP2, VFB1, VFB2, VO1, VO2, TONSEL, SKIPSEL
DRVH1, DRVH2 –1.0 36
Output voltage range
(1)
DRVH1, DRVH2
(2)
PGOOD, VREG3, VREG5, VREF, DRVL1, DRVL2 –0.3 6
Electrostatic discharge
Junction temperature range, T Storage temperature, T
Human body model QSS 009-105 (JESD22-A114A) 2 kV Charged device model QSS 009-147 (JESD22-C101B.01) 1.5 kV
J
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to the corresponding LLx terminal.
VALUE
MIN MAX
V
–0.3 6 –0.3 6
–0.3 6 V
–40 125 °C –55 150 °C

DISSIPATION RATINGS

2-oz. trace and copper pad with solder.
PACKAGE TA< 25°C POWER RATING TA= 85°C POWER RATING
24-pin RGE
(1)
1.85 W 18.5 mW/°C 0.74 W
DERATING FACTOR ABOVE T
= 25°C
(1) Enhanced thermal conductance by 3 x 3 thermal vias beneath thermal pad.
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A
TPS51123A
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)
PARAMETER MIN TYP MAX UNIT
Supply voltage VIN 5.5 28
VBST1, VBST2 -0.1 34
Input voltage range
Output voltage range LL1, LL2 -1.8 28
T
A
VBST1, VBST2 (wrt LLx) -0.1 5.5 EN0, ENC, TRIP1, TRIP2, VFB1, VFB2, VO1, VO2,
TONSEL, SKIPSEL DRVH1, DRVH2 -0.8 34 DRVH1, DRVH2 (wrt LLx) -0.1 5.5
VREF, VREG3, VREG5 -0.1 5.5 PGOOD, DRVL1, DRVL2 -0.1 5.5 Operating free-air temperature -40 85 °C
-0.1 5.5
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ELECTRICAL CHARACTERISTICS

over operating free-air temperature range, VIN = 12 V (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
SUPPLY CURRENT
I
VIN1
I
VIN2
I
VO1
I
VO2
I
VINSTBY
I
VINSDN
VIN supply current1 VO2 = 0 V, EN0=open, ENC = 5 V, 0.55 1.00 mA
VIN supply current2 VO2 = 3.3 V, EN0=open, ENC = 5 V, 4.0 6.5 μA
VO1 current VO2 = 3.3 V, EN0=open, ENC = 5 V, 0.8 1.5 mA
VO2 current VO2 = 3.3 V, EN0=open, ENC = 5 V, 12 100
VIN standby current 95 150
VIN shutdown current 10 25
VREF OUTPUT
V
VREF
VREF output voltage V
VREG5 OUTPUT
V
VREG5
I
VREG5
V
TH5VSW
R
5VSW
VREG5 output voltage 4.75 5 5.25 V
VREG5 output current VO1 = 0 V, VREG5 = 4.5 V 100 175 250 mA
Switch over threshold V
5 V SW R
ON
VREG3 OUTPUT
V
VREG3
I
VREG3
V
TH3VSW
R
3VSW
VREG3 output voltage VO2 = 0 V, I
VREG3 output current VO2 = 0 V, VREG3 = 3 V 100 175 250 mA
Switch over threshold V
3 V SW R
ON
INTERNAL REFERENCE VOLTAGE
V
IREF
V
VFB
I
VFB
OUTPUT VOLTAGE, V
I
Dischg
Internal reference voltage I
VFB regulation voltage
VFB input current VFBx = 2.0 V, TA= 25°C -20 20 nA
DISCHARGE
OUT
V
discharge current ENC = 0 V, VOx = 0.5 V 10 60 mA
OUT
(1) Ensured by design. Not production tested.
VIN current, TA= 25°C, no load, VO1 = 0 V, TRIP1 = TRIP2 = 2 V, VFB1 = VFB2 = 2.05 V
VIN current, TA= 25°C, no load, VO1 = 5 V, TRIP1 = TRIP2 = 2 V, VFB1 = VFB2 = 2.05 V
VO1 current, TA= 25°C, no load, VO1 = 5 V, TRIP1 = TRIP2 = 2 V, VFB1 = VFB2 = 2.05 V
VO2 current, TA= 25°C, no load, VO1 = 5 V, TRIP1 = TRIP2 = 2 V, VFB1 = VFB2 = 2.05 V
VIN current, TA= 25°C, no load, μA EN0 = 1.2 V, ENC = 0 V
VIN current, TA= 25°C, no load, EN0 = ENC = 0 V
I
= 0 A 1.98 2.00 2.02
VREF
–5 μA < I
VO1 = 0 V, I VO1 = 0 V, I
6.5 V < VIN < 28 V VO1 = 0 V, I
< 100 μA 1.97 2.00 2.03
VREF
< 100 mA, TA= 25°C 4.8 5 5.2
VREG5
< 100 mA,
VREG5
< 50 mA, 5.5 V < VIN < 28 V 4. 75 5 5.25
VREG5
Turns on 4.55 4.7 4.85 Hysteresis 0.15 0.25 0.3 VO1 = 5 V, I
VO2 = 0 V, I
VO2 = 0 V, I
= 100 mA 1 3
VREG5
< 100 mA, TA= 25°C 3.2 3.33 3.46
VREG3
< 100 mA, 6.5 V < VIN < 28 V 3.13 3.33 3.5 V
VREG3
< 50 mA, 5.5 V < VIN < 28 V 3.13 3.33 3.5
VREG3
Turns on 3.05 3.15 3.25 Hysteresis 0.1 0.2 0.25 VO2 = 3.3 V, I
= 0 A, beginning of ON state 1.95 1.98 2.01
VREF
FB voltage, I FB voltage, I FB voltage, I
(1)
mode
= 100 mA 1.5 4
VREG3
= 0 A, skip mode 1.98 2.01 2.04
VREF
= 0 A, OOA mode
VREF
= 0 A, continuous conduction
VREF
(1)
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
2.00 2.035 2.07
V
2.00
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SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, VIN = 12 V (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
OUTPUT DRIVERS
R
DRVH
R
DRVL
t
DEAD
DRVH resistance
DRVL resistance
Dead time ns
Source, V Sink, V Source, V Sink, V DRVHx-off to DRVLx-on 10 DRVLx-off to DRVHx-on 30
INTERNAL BST DIODE
V
FBST
I
VBSTLK
Forward voltage V
VREG5-VBSTx
VBST leakage current VBSTx = 34 V, LLx = 28 V, TA= 25 °C 0.1 1 μA
DUTY AND FREQUENCY CONTROL
t
ON11
t
ON12
t
ON13
t
ON14
t
ON21
t
ON22
t
ON23
t
ON24
t
ON(min)
t
OFF(min)
CH1 on time 1 VIN= 12 V, VO1 = 5 V, 200 kHz setting 2080 CH1 on time 2 VIN= 12 V, VO1 = 5 V, 245 kHz setting 1700 CH1 on time 3 VIN= 12 V, VO1 = 5 V, 300 kHz setting 1390 CH1 on time 4 VIN= 12 V, VO1 = 5 V, 365 kHz setting 1140 CH2 on time 1 VIN= 12 V, VO2 = 3.3 V, 250 kHz setting 1100 CH2 on time 2 VIN= 12 V, VO2 = 3.3 V, 305 kHz setting 900 CH2 on time 3 VIN= 12 V, VO2 = 3.3 V, 375 kHz setting 730 CH2 on time 4 VIN= 12 V, VO2 = 3.3 V, 460 kHz setting 600 Minimum on time TA= 25 °C 80 Minimum off time TA= 25 °C 300
SOFT-START
t
SS
Internal SS time Internal soft start 1.1 1.6 2.1 ms
POWERGOOD
PG in from lower 92.50% 95% 97.50%
V
THPG
PG threshold PG in from higher 102.50% 105% 107.50%
PG hysteresis 2.50% 5% 7.50%
I
PGMAX
t
PGDEL
PG sink current PGOOD = 0.5 V 5 12 mA PG delay Delay for PG in 350 510 670 μs
LOGIC THRESHOLD AND SETTING CONDITIONS
V
EN0
I
EN0
V
ENC
V
EN(trip)
EN0 setting voltage V
EN0 current V
ENC threshold voltage V
TRIP1, TRIP2 threshold mV
Shutdown 0.4 Enable 2.4
= 0.2 V 2 3.5 5 μA
EN0
Shutdown 0.6 Enable 2 Shutdown 350 400 450 Hysteresis 10 30 60 200 kHz/250 kHz 1.5
V
TONSEL
TONSEL setting voltage V
245 kHz/305 kHz 1.9 2.1 300 kHz/375 kHz 2.7 3.6 365 kHz/460 kHz 4.7 Auto skip 1.5
V
SKIPSEL
SKIPSEL setting voltage PWM only 1.9 2.1 V
OOA auto skip 2.7
BSTx - DRVHx
DRVHx - LLx
VREG5 - DRVLx
= 100 mV 1.5 4
DRVLx
, IF= 10 mA, TA= 25 °C 0.7 0.8 0.9 V
= 100 mV 4 8
= 100 mV 1.5 4
= 100 mV 4 8
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, VIN = 12 V (unless otherwise noted)
PARAMETER CONDITIONS MIN TYP MAX UNIT
PROTECTION: CURRENT SENSE
I
TRIP
TC
ITRIP
V
OCLoff
V
OCL(max)
V
ZC
V
TRIP
PROTECTION: UNDERVOLTAGE AND OVERVOLTAGE PROTECTION
V
OVP
t
OVPDEL
V
UVP
t
UVPDEL
t
UVPEN
UNDERVOLTAGE LOCKOUT (UVLO)
V
UVVREG5
V
UVVREG3
THERMAL SHUTDOWN
T
SDN
TRIPx source current V TRIPx current temperature
coefficient OCP comparator offset -8 0 8 Maximum OCL setting V
Zero cross detection comparator offset
Current limit threshold V
= 920 mV, TA= 25°C 9.4 10 10.6 μA
TRIPx
On the basis of 25°C ((V
TRIPx-GND
GND
TRIPx
V
GND-LLx
TRIPx-GND
/9)-24 mV -V
= 920 mV
= 5 V 185 205 225 mV
voltage -5 0 5
voltage
(2)
) voltage, V
GND-LLx
(2)
OVP trip threshold OVP detect 110% 115% 120% OVP prop delay 2 μs
Output UVP trip threshold
UVP detect 55% 60% 65%
Hysteresis 10% Output UVP prop delay 20 32 40 μs Output UVP enable delay 1.4 2 2.6 ms
VREG5 UVLO threshold
VREG3 UVLO threshold Shutdown
Thermal shutdown threshold °C
Wake up 4.1 4.2 4.3
Hysteresis 0.38 0.43 0.48 V
(2)
Shutdown temperature
Hysteresis
(2)
(2)
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
4500 ppm/°C
TRIPx-
0.515 2 V
VO2-1
150
10
(2) Ensured by design. Not production tested.
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TPS51123A
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012

DEVICE INFORMATION

Table 2.
TERMINAL
NAME NO.
DRVH1 21 DRVH2 10 DRVL1 19 DRVL2 12
EN0 13 I/O Open : LDOs on, and ready to turn both switcher channels.
ENC 18 I GND 15 Ground.
LL1 20 LL2 11 PGOOD 23 O Powergood window comparator output for channel 1 and 2. (Logical AND)
SKIPSEL 14 I
TRIP1 1 TRIP2 6
TONSEL 4 I 300 kHz/375 kHz setting: connect to VREG3
VBST1 22 VBST2 9 VFB1 2 VFB2 5 VIN 16 I High voltage power supply input for 5-V/3.3-V LDO. VO1 24 VO2 7
VREF 3 O
VREG3 8 O
VREG5 17 O
I/O DESCRIPTION
O High-side N-channel MOSFET driver outputs. LL referenced drivers.
O Low-side N-channel MOSFET driver outputs. GND referenced drivers.
Master enable input. GND : disable all circuit
Channel 1 and Channel 2 enable input. Pull up to the voltage ranging 3.3-V to 5-V to turn on both switcher channels. Short to ground to shutdown them.
I Switch node connections for high-side drivers, current limit and control circuitry.
Selection pin for operation mode: OOA auto skip : Connect to VREG3 or VREG5 PWM only: Connect to VREF Auto skip: Connect to GND
I/O
I/O
Channel 1 and Channel 2 enable and OCL trip setting pins. Connect resistor from this pin to GND to set threshold for synchronous R
On-time adjustment pin. 365 kHz/460 kHz setting: connect to VREG5
245 kHz/305 kHz setting: connect to VREF 200 kHz/250 kHz setting: connect to GND
I Supply input for high-side N-channel MOSFET driver (boost terminal).
I SMPS feedback inputs. Connect with feedback resistor divider.
Output connection to SMPS. These terminals work as fixed voltage inputs and output discharge inputs. VO1 and VO2 also work as 5-V and 3.3-V switch over return power input respectively.
2-V reference voltage output. Connect a high-quality X5R or X7R ceramic capacitor with a value between 220-nF and 1-µF to signal GND near the device.
3.3-V power supply output. Connect a high-quality X5R or X7R ceramic capacitor with a value of 10­µF or larger to power GND near the device. A 1-μF ceramic capacitor is acceptable when not loaded.
5-V power supply output. Connect a high-quality X5R or X7R ceramic capacitor with a value of 10-µF or larger to power GND near the device.
sense. Short to ground to shut down a switcher channel.
DS(on)
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TPS51123ARGE
(QFN-24)
VO1
PGOOD
VO2
VREG3
VBST1
DRVL1
LL1
DRVH1
VBST2
DRVH2
LL2
DRVL2
EN0
TRIP2
VFB2
VREF
TONSEL
VFB1
TRIP1
SKIPSEL
GND
VIN
ENC
VREG5
2
3
4
5
6
7 8
9 10
11
1
12
13
14
15
16
17
18
24 23
22 21
20 19
TPS51123A
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SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
QFN PACKAGE (TOP VIEW)
Functional Block Diagram
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TPS51123A
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
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Switcher Controller Block
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VIN SUPPLY CURRENT2
vs
JUNCTION TEMPERATURE
0
1
2
3
4
5
6
7
8
9
-50 0 50 100 150
TJ- Junction Temperature - °C
I
VIN2
- VIN Supply Current2 - mA
VIN SUPPLY CURRENT2
vs
INPUT VOLTAGE
0
1
2
3
4
5
6
7
8
9
5 10 15 20 25
VIN- Input Voltage - V
I
VIN2
- VIN Supply Current2 - mA
VIN SUPPLY CURRENT1
vs
INPUT VOLTAGE
0
100
200
300
400
500
600
700
800
5 10 15 20 25
VIN- Input Voltage - V
I
VIN1
- VIN Supply Current1 - mA
VIN SUPPLY CURRENT1
vs
JUNCTION TEMPERATURE
0
100
200
300
400
500
600
700
800
-50 0 50 100 150
TJ- Junction Temperature - °C
I
VIN1
- VIN Supply Current1 - m A
TPS51123A
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TYPICAL CHARACTERISTICS

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Figure 1. Figure 2.
Figure 3. Figure 4.
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VIN SHUTDOWN CURRENT
vs
INPUT VOLTAGE
0
5
10
15
20
25
5 10 15 20 25
VIN- Input Voltage - V
I
VINSDN
- VIN Shutdown Current - mA
VIN SHUTDOWN CURRENT
vs
JUNCTION TEMPERATURE
0
5
10
15
20
25
-50 0 50 100 150
TJ- Junction Temperature - °C
I
VINS DN
- VIN Shutdown Current - mA
VIN STANDBY CURRENT
vs
JUNCTION TEMPERATURE
0
50
100
150
200
250
-
50
0 50 100 150
TJ- Junction Temperature - °C
I
VINST BY
- VIN Standby Cu rrent - mA
0
50
100
150
200
250
I
VINSTBY
–VIN Standby Current – µA
5 10 15 20 25
VIN– Input Voltage – V
VIN STANDBY CURRENT
vs
INPUT VOLTAGE
.
TPS51123A
SLUSAA6C –APRIL 2011–REVISED SEPTEMBER 2012
TYPICAL CHARACTERISTICS (continued)
Figure 5. Figure 6.
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Figure 7. Figure 8.
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