Dual-Synchronous, Step-Down Controller with Out-of-Audio™ Operation and 100-mA
LDOs for Notebook System Power
Check for Samples: TPS51123A
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FEATURES
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•Wide-Input Voltage Range: 5.5 V to 28 V
•Output Voltage Range: 2 V to 5.5 V•I/O Supplies
•Built-in 100-mA 5-V/3.3-V LDO with Switches•System Power Supplies
•Built-in 1% 2-V Reference Output
•With/Without Out-of-Audio™ Mode Selectable
Light-Load and PWM-Only Operation
•Internal 1.6-ms Voltage Servo Soft-Start
•Adaptive On-Time Control Architecture with
Four Selectable Frequency Setting
•4500 ppm/°C R
•Built-In Output Discharge
•Power Good Output
•Built-in OVP/UVP/OCP
•Thermal Shutdown (Non-latch)
•24-Pin QFN (RGE) Package
Current Sensing
DS(on)
APPLICATIONS
•Notebook Computers
DESCRIPTION
The TPS51123A is a cost effective, dual-synchronous
buck controller targeted for notebook system power
supply solutions. It provides 5-V and 3.3-V LDOs and
requires few external components. The TPS51123A
supports high-efficiency, fast transient responses and
provides a combined power-good signal. Out-ofAudio™ mode light-load operation enables low
acoustic noise atmuch higher efficiencythan
conventional forced PWM operation. Adaptive ontime D-CAP™ control provides convenient and
efficient operation. The part operates with supply
input voltages ranging from 5.5 V to 28 V and
supports output voltages from 2 V to 5.5 V. The
TPS51123A is available in a 24-pin QFN package
and is specified from -40°C to 85°C ambient
temperature range.
Table 1. Differences Between the TPS51123 and TPS51123A
LDO Output Capacitance Requirement
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2Out-of-Audio, D-CAP are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
(1 µF acceptable at no load)(1 µF acceptable at no load)
TPS51123TPS51123A
VREG5: at least 33 µFVREG5: 10 µF or larger (X5R or X7R)
VREG3: at most 10 µFVREG3: 10 µF or larger (X5R or X7R)
VREF: 0.22 µF to 1 µFVREF: 0.22 µF to 1 µF (X5R or X7R)
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Junction temperature range, T
Storage temperature, T
Human body model QSS 009-105 (JESD22-A114A)2kV
Charged device model QSS 009-147 (JESD22-C101B.01)1.5kV
J
stg
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Voltage values are with respect to the corresponding LLx terminal.
VALUE
MINMAX
V
–0.36
–0.36
–0.36V
–40125°C
–55150°C
DISSIPATION RATINGS
2-oz. trace and copper pad with solder.
PACKAGETA< 25°C POWER RATINGTA= 85°C POWER RATING
24-pin RGE
(1)
1.85 W18.5 mW/°C0.74 W
DERATING FACTOR ABOVE T
= 25°C
(1) Enhanced thermal conductance by 3 x 3 thermal vias beneath thermal pad.
Channel 1 and Channel 2 enable input. Pull up to the voltage ranging 3.3-V to 5-V to turn on both
switcher channels. Short to ground to shutdown them.
ISwitch node connections for high-side drivers, current limit and control circuitry.
Selection pin for operation mode:
OOA auto skip : Connect to VREG3 or VREG5
PWM only: Connect to VREF
Auto skip: Connect to GND
I/O
I/O
Channel 1 and Channel 2 enable and OCL trip setting pins. Connect resistor from this pin to GND to
set threshold for synchronous R
On-time adjustment pin.
365 kHz/460 kHz setting: connect to VREG5
245 kHz/305 kHz setting: connect to VREF
200 kHz/250 kHz setting: connect to GND
ISupply input for high-side N-channel MOSFET driver (boost terminal).
ISMPS feedback inputs. Connect with feedback resistor divider.
Output connection to SMPS. These terminals work as fixed voltage inputs and output discharge
inputs. VO1 and VO2 also work as 5-V and 3.3-V switch over return power input respectively.
2-V reference voltage output. Connect a high-quality X5R or X7R ceramic capacitor with a value
between 220-nF and 1-µF to signal GND near the device.
3.3-V power supply output. Connect a high-quality X5R or X7R ceramic capacitor with a value of 10µF or larger to power GND near the device. A 1-μF ceramic capacitor is acceptable when not loaded.
5-V power supply output. Connect a high-quality X5R or X7R ceramic capacitor with a value of 10-µF
or larger to power GND near the device.
sense. Short to ground to shut down a switcher channel.