Texas Instruments TPD8S300 User Manual
User's Guide
SLVUAU1–October 2016
TPD8S300 Evaluation Module
This user's guide describes the characteristics, operation, and use of the TPD8S300 evaluation module
(EVM). This EVM is a TPD8S300 integrated chip set into a USB Type-C passthrough board to allow the
user to test the operation of the TPD8S300 overvoltage protection and ESD protection in their own
system. This user's guide includes setup instructions, schematic diagrams, a bill of materials, and printedcircuit board layout drawings for the EVM.
Contents
1 Introduction ................................................................................................................... 2
2 Board Setup .................................................................................................................. 2
2.1 Overvoltage Protection Testing ................................................................................... 2
2.2 ESD Testing ......................................................................................................... 3
3 Schematic..................................................................................................................... 4
4 Board Layout ................................................................................................................. 5
5 Bill of Materials............................................................................................................... 7
List of Figures
1 CC1 Line Short to 20-V Waveform........................................................................................ 3
2 TPD8S300EVM .............................................................................................................. 3
3 TPD8S300EVM Schematic................................................................................................. 4
4 Top Layer .................................................................................................................... 5
5 Ground Plane 1 ............................................................................................................. 5
6 Midlayer 1..................................................................................................................... 5
7 Ground Plane 2 ............................................................................................................. 5
8 Power Plane 1................................................................................................................ 5
9 Midlayer 2..................................................................................................................... 5
10 Ground Plane 3 .............................................................................................................. 6
11 Bottom Layer ................................................................................................................. 6
1 Bill of Materials............................................................................................................... 7
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List of Tables
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TPD8S300 Evaluation Module
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Introduction
1 Introduction
Texas Instrument’s TPD8S300 evaluation module helps designers evaluate the operation and
performance of the TPD8S300 device. The TPD8S300 is a single-chip solution for protection of the USB
Type-C configuration channel (CC), sideband use channel (SBU), and D± data lines. The device provides
Short-to-VBUS Over Voltage Protection up to 22 V for CC1, CC2, SBU1, and SBU2 pins to prevent
damage caused by a faulty connecter or mechanical twist shorting pins. The TPD8S300 also provides 8channels of IEC 61000-4-2 ESD protection for CC1, CC2, SBU1, SBU2, D± (Top Side), and D± (Bottom
Side) pins of the USB Type-C connecter.
2 Board Setup
The pass-through EVM allows the user to ensure that the TPD8S300 will not impede typical operation of
their USB port while also allowing the user to test the TPD8S300 protection during an overvoltage or ESD
event.
To test the TPD8S300 EVM, plug the male (“system side”, J1) connector on the EVM into a USB Type-C
female port and plug a typical USB Type-C cable or peripheral into the EVM’s female connector
(“connector side”, J2). The TPD8S300 is intended to be placed very close to the port in a typical system,
so this setup will closely simulate a designed in TPD8S300. When plugged in, the user can ensure that
the TPD8S300 will not impede standard USB operation.
The 0 Ω resistors R2 and R3 allow the user to determine whether the TPD8S300 dead battery resistors
are active. By default, the resistors will short the CC1 and CC2 pins to the RPD_G1 and RPD_G2 pins
and enable the dead battery resistor function, allowing the TPD8S300 to serve as either a UFP or a DFP
port. To simulate a use case where the TPD8S300 will not function as a UFP, turn off the dead battery
functionality by manually removing these resistors.
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The EVM requires 3.3 V between the Vpwr (TP1) and Ground (TP3) pins to power up the TPD8S300. If
the system supports USB charging from a dead battery condition, it is recommended that the EVM be
powered from the protected USB Controller to show that the dead battery functionality works properly. The
EVM includes a 0.1uF (C2) capacitor to ground on the Vbias pin of the TPD8S300, a 100-kΩ (R1) resistor
to Vpwr on the FLT pin, and a 1-uF (C1) capacitor to ground on the Vpwr pin. These are recommended
for proper operation of the TPD8S300 in all applications.
2.1 Overvoltage Protection Testing
The EVM is designed to allow the user to ensure that the TPD8S300 can protect their system from
overvoltage events. By shorting either a CC line or SBU line to a high voltage on the connecter side of the
EVM, the user can confirm that the TPD8S300 will protect their system. The short can be created by
applying 20 V to one of the protected lines on a USB Type-C breakout board plugged into J2 or by using a
custom board that discharges 20 V over a capacitor when plugged in. When the TPD8S300 sees a
voltage over the overvoltage threshold on a protected line it will isolate all four CC and SBU lines within
100 ns to protect the system. Use an oscilloscope to measure the voltage on both the system side and the
connector side of the EVM to view the clamped voltage that the protected system is seeing.
The waveform in Figure 1, where channel one is the system side of the TPD8S300EVM and channel two
is the connector side, was taken when CC1 from a TPD8S300EVM in DFP mode in series with a
TPD8S300EVM was shorted to a 24-V Vbus line. The event was created by a plugging in a one foot cable
to a custom USB Type-C board that simulates a faulty peripheral, pulling Vbus to 24 V and discharging
the voltage to the CC line over a capacitor. Measuring the voltage over the TPD8S300EVM shows the
device clamping the overvoltage event to a maximum voltage of 7.5 V and completely isolating the
controller within 60 ns.
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TPD8S300 Evaluation Module
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2.2 ESD Testing
Figure 2 shows the TPD8S300EVM. The EVM has four ESD test points, one on each CC and SBU line,
that allow the user to use a ESD simulator in either contact or air-gap test mode to measure the ESD
protection provided by the TPD8S300. Probe points one and two correspond to the SBU2 and SBU1 lines
respectively. Probe points four and five correspond to the CC1 and CC2 lines respectively. To measure
the ESD response on the D± lines use an ESD simulator on the respective points on a break-out board
plugged into J2. Refer to the application report, IEC 61000-4-x Tests for TI’s Protection Devices for
specifics on proper ESD testing methods.
Board Setup
Figure 1. CC1 Line Short to 20-V Waveform
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Figure 2. TPD8S300EVM
Copyright © 2016, Texas Instruments Incorporated
TPD8S300 Evaluation Module
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