Texas Instruments TMP102AIDRLR Schematic [ru]

Diode Temp.

Sensor

A/D

Converter

OSC

Control

Logic

Serial

Interface

Config.

andTemp.

Temperature

SCL

ALERT

SDA

GND

2 5

V+

ADD0

SCL

GND

ALERT

ADD0

V+

0.01 µF

Two-Wire

Host Controller

TMP102

1.4 V to 3.6 V

SDA

Pullup Resistors

Supply Bypass

Capacitor

Supply Voltage

5 k

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Reference Design

SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

TMP102 Low-Power Digital Temperature Sensor With SMBus and Two-Wire Serial

Interface in SOT563

1 Features 3 Description

• SOT563 Package (1.6-mm × 1.6-mm) is a 68% Smaller Footprint than SOT-23

• Accuracy Without Calibration: – 2.0°C (max) from –25°C to 85°C – 3.0°C (max) from –40°C to 125°C

• Low Quiescent Current: – 10-μA Active (max) – 1-μA Shutdown (max)

• Supply Range: 1.4 to 3.6 V

• Resolution: 12 Bits

• Digital Output: SMBus™, Two-Wire, and I2C Interface Compatibility

• NIST Traceable

2 Applications

• Portable and Battery-Powered Applications

• Power-supply Temperature Monitoring

• Computer Peripheral Thermal Protection

• Notebook Computers

• Battery Management

• Office Machines

• Thermostat Controls

• Electromechanical Device Temperatures

• General Temperature Measurements: – Industrial Controls – Test Equipment – Medical Instrumentations

Simplified Schematic

The TMP102 device is a digital temperature sensor ideal for NTC/PTC thermistor replacement where high accuracy is required. The device offers an accuracy of ±0.5°C without requiring calibration or external component signal conditioning. Device temperature sensors are highly linear and do not require complex calculations or lookup tables to derive the temperature. The on-chip 12-bit ADC offers resolutions down to 0.0625°C.

The 1.6-mm × 1.6-mm SOT563 package is 68% smaller footprint than an SOT-23 package. The TMP102 device features SMBus™, two-wire and I2C interface compatibility, and allows up to four devices on one bus. The device also features an SMBus alert function. The device is specified to operate over supply voltages from 1.4 to 3.6 V with the maximum quiescent current of 10 µA over the full operating range.

The TMP102 device is ideal for extended temperature measurement in a variety of communication, computer, consumer, environmental, industrial, and instrumentation applications. The device is specified for operation over a temperature range of –40°C to 125°C.

The TMP102 production units are 100% tested against sensors that are NIST-traceable and are verified with equipment that are NIST-traceable through ISO/IEC 17025 accredited calibrations.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

TMP102 SOT563 (6) 1.60 mm × 1.20 mm (1) For all available packages, see the orderable addendum at

the end of the data sheet.

(1)

TMP102

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

Block Diagram

TMP102

SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

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1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 3

6.1 Absolute Maximum Ratings ..................................... 3

6.2 Handling Ratings....................................................... 3

6.3 Recommended Operating Conditions....................... 4

6.4 Thermal Information.................................................. 4

6.5 Electrical Characteristics........................................... 4

6.6 Timing Requirements ............................................... 5

6.7 Typical Characteristics.............................................. 6

7 Detailed Description .............................................. 7

7.1 Overview................................................................... 7

7.2 Functional Block Diagram ......................................... 7

7.3 Feature Description................................................... 7

7.4 Device Functional Modes........................................ 13

7.5 Programming........................................................... 14

8 Application and Implementation........................ 20

8.1 Application Information............................................ 20

8.2 Typical Application .................................................. 20

9 Power Supply Recommendations...................... 22

10 Layout................................................................... 22

10.1 Layout Guidelines................................................. 22

10.2 Layout Example.................................................... 22

11 Device and Documentation Support................. 23

11.1 Documentation Support ....................................... 23

11.2 Community Resources.......................................... 23

11.3 Trademarks........................................................... 23

11.4 Electrostatic Discharge Caution............................ 23

11.5 Glossary................................................................ 23

12 Mechanical, Packaging, and Orderable

Information........................................................... 23

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision E (April 2015) to Revision F Page

• Added TI Design .................................................................................................................................................................... 1

• Added NIST Features bullet .................................................................................................................................................. 1

• Added last paragraph of Description section ......................................................................................................................... 1

Changes from Revision D (December 2014) to Revision E Page

• Changed the MAX value for the Supply voltage from 3.6 to 4 in the Absolute Maximum Ratings table............................... 3

• Changed MIN, TYP, and MAX values for the Temperature Accuracy (temperature error) parameter.................................. 4

• Changed the frequency from 2.85 to 3.4 MHz in the POWER SUPPLY section of the Electrical Characteristics table ....... 5

• Changed the Temperature Error vs Temperature graph in the Typical Characteristics section............................................ 6

• Changed the Temperature Error at 25°C graph in the Typical Characteristics section......................................................... 6

Changes from Revision C (October 2012) to Revision D Page

• Added Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation

Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 3

• Changed parameters in Timing Requirements ...................................................................................................................... 5

Changes from Revision B (October 2008) to Revision C Page

• Changed values for Data Hold Time parameter in Timing Requirements .......................................................................... 11

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SDA

V+

ADD0

SCL

GND

ALERT

CBZ

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SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

5 Pin Configuration and Functions

DRL Package 6-Pin SOT563

Top View

Pin Functions

NO. NAME

1 SCL I Serial clock. Open-drain output; requires a pullup resistor. 2 GND — Ground 3 ALERT O Overtemperature alert. Open-drain output; requires a pullup resistor. 4 ADD0 I Address select. Connect to GND or V+ 5 V+ I Supply voltage, 1.4 V to 3.6 V 6 SDA I/O Serial data. Open-drain output; requires a pullup resistor.

I/O DESCRIPTION

TMP102

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

Supply Voltage 4 V Input Voltage Output voltage 3.6 V Operating temperature –55 150 °C Junction temperature 150 °C Storage temperature, T

(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may

degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported.

(2) Input voltage rating applies to all TMP102 input voltages.

(2)

stg

6.2 Handling Ratings

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001

(ESD)

(1) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows (2) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe

Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22-C101

Machine model (MM) ±200

safe manufacturing with a standard ESD control process. manufacturing with a standard ESD control process.

(1)

MIN MAX UNIT

–0.5 3.6 V

–60 150 °C

VALUE UNIT

(1)

(2)

±2000 ±1000 V

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6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN NOM MAX UNIT

V+ Supply voltage 1.4 3.3 3.6 V T

Operating free-air temperature –40 125 °C

6.4 Thermal Information

TMP102

THERMAL METRIC

(1)

DRL (SOT563) UNIT

6 PINS

θJA

θJC(top)

θJB

Junction-to-ambient thermal resistance 200 °C/W Junction-to-case (top) thermal resistance 73.7 °C/W Junction-to-board thermal resistance 34.4 °C/W Junction-to-top characterization parameter 3.1 °C/W Junction-to-board characterization parameter 34.2 °C/W

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

At TA= 25°C and VS= 1.4 to 3.6 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

TEMPERATURE INPUT

Range –40 125 °C

Accuracy (temperature error) °C

vs supply 0.2 0.5 °C/V Resolution 0.0625 °C

DIGITAL INPUT/OUTPUT

Input capacitance 3 pF V V I

Input logic high 0.7 × (V+) 3.6 V

Input logic low –0.5 0.3 × (V+) V

Input current 0 < VIN< 3.6 V 1 μA

Output logic V

Resolution 12 Bit

Conversion time 26 35 ms

Conversion modes Conv/s

Timeout time 30 40 ms

SDA

ALERT

–25°C to 85°C ±0.5 ±2 –40°C to 125°C ±1 ±3

V+ > 2 V, IOL= 3 mA 0 0.4 V+ < 2 V, IOL= 3 mA 0 0.2 × (V+) V+ > 2 V, IOL= 3 mA 0 0.4 V+ < 2 V, IOL= 3 mA 0 0.2 × (V+)

CR1 = 0, CR0 = 0 0.25 CR1 = 0, CR0 = 1 1 CR1 = 1, CR0 = 0 (default) 4 CR1 = 1, CR0 = 1 8

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Electrical Characteristics (continued)

At TA= 25°C and VS= 1.4 to 3.6 V, unless otherwise noted.

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

POWER SUPPLY

Operating supply range +1.4 +3.6 V

Serial bus inactive, CR1 = 1, CR0 = 0 (default)

Average quiescent current 15 μA

Shutdown current 400 kHz μA

TEMPERATURE

Specified range –40 125 °C

Operating range –55 150 °C

Serial bus active, SCL frequency = 400 kHz

Serial bus active, SCL frequency =

3.4 MHz Serial bus inactive 0.5 1 Serial bus active, SCL frequency =

Serial bus active, SCL frequency =

3.4 MHz

6.6 Timing Requirements

See the Timing Diagrams section for additional information.

(SCL)

(BUF)

(HDSTA)

(SUSTA)

(SUSTO)

(HDDAT)

(SUDAT)

(LOW)

(HIGH)

SCL operating frequency V+ 0.001 0.4 0.001 2.85 MHz

Bus-free time between STOP and

START condition

Hold time after repeated START

condition.

After this period, the first clock is

generated.

See Figure 7

repeated start condition setup time 600 160 ns

STOP condition setup time 600 160 ns

Data hold time 100 900 25 105 ns

Data setup time 100 25 ns

SCL-clock low period V+ , see Figure 7 1300 210 ns

SCL-clock high period See Figure 7 600 60 ns

Data fall time See Figure 7 300 80 ns

See Figure 7 300 ns

Data rise time

SCLK ≤ 100 kHz,

see Figure 7 Clock fall time See Figure 7 300 40 ns Clock rise time See Figure 7 300 40 ns

TMP102

SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

7 10

FAST MODE HIGH-SPEED MODE

MIN TYP MAX MIN TYP MAX

600 160 ns

1000 ns

UNIT

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Temperature (qC)

Temperature Error (qC)

-60 -40 -20 0 20 40 60 80 100 120 140

-1

-0.8

-0.6

-0.4

-0.2

0.2

0.4

0.6

0.8

D002

Mean Mean + 3 V Mean  3 V

Temperature Error (qC)

Population

-0.35

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

D001

Temperature (°C)

-60 -20 40 60 140 160

Conversion Time (ms)

3.6 V Supply

1.4 V Supply

-40 200 80 100 120

100

Bus Frequency (Hz)

1k 10k 100k 1M 10M

I ( A)

-55 °C

+25 °C

+125 °C

Temperature (°C)

-60 -40 0 40 140 160

I ( A)

3.6 V Supply

1.4 V Supply

-20 20 60 80 100 120

Temperature (°C)

-60 -20 40 60 140 160

I ( A)

3.6 V Supply

-40 0 20 80 100 120

1.4 V Supply

TMP102

SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

6.7 Typical Characteristics

At TA= 25°C and V+ = 3.3 V, unless otherwise noted.

Four conversions per second

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Figure 1. Average Quiescent Current vs Temperature

Figure 2. Shutdown Current vs Temperature

Figure 3. Conversion Time vs Temperature Figure 4. Quiescent Current vs Bus Frequency

(Temperature at 3.3-V Supply)

Figure 5. Temperature Error vs Temperature

Figure 6. Temperature Error at 25°C

Product Folder Links: TMP102

Diode Temp.

Sensor

A/D

Converter

OSC

Control

Logic

Serial

Interface

Config.

andTemp.

Temperature

SCL

ALERT

SDA

GND

2 5

V+

ADD0

TMP102

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SBOS397F –AUGUST 2007–REVISED DECEMBER 2015

7 Detailed Description

7.1 Overview

The TMP102 device is a digital temperature sensor that is optimal for thermal-management and thermalprotection applications. The TMP102 device is two-wire, SMBus and I2C interface-compatible. The device is specified over an operating temperature range of –40°C to 125°C. See Functional Block Diagram for a block diagram of the TMP102 device.

The temperature sensor in the TMP102 device is the chip itself. Thermal paths run through the package leads as well as the plastic package. The package leads provide the primary thermal path because of the lower thermal resistance of the metal.

An alternative version of the TMP102 device is available. The TMP112 device has highest accuracy, the same micro-package, and is pin-to-pin compatible.

Table 1. Advantages of TMP112 versus TMP102

DEVICE PACKAGE VOLTAGE VOLTAGE RESOLUTION CALIBRATION

TMP112 10 µA 1.4 V 3.6 V Yes

TMP102 10 µA 1.4 V 3.6 V No

COMPATIBLE SUPPLY LOCAL SENSOR ACCURACY INTERFACES CURRENT (MAX)

I2C

SMBus

I2C

SMBus

SOT563 12 bit 0.5°C: (0°C to 65°C)

1.2 × 1.6 × 0.6 0.0625°C 1°C: (-40°C to 125°C) SOT563 12 bit 2°C: (25°C to 85°C)

1.2 × 1.6 × 0.6 0.0625°C 3°C: (-40°C to 125°C)

SUPPLY SUPPLY SPECIFIED

(MIN) (MAX) DRIFT SLOPE

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Digital Temperature Output

The digital output from each temperature measurement is stored in the read-only temperature register. The temperature register of the TMP102 device is configured as a 12-bit, read-only register (configuration register EM bit = 0, see the Extended Mode (EM) section), or as a 13-bit, read-only register (configuration register EM bit = 1) that stores the output of the most recent conversion. Two bytes must be read to obtain data and are listed in

Table 8 and Table 9. Byte 1 is the most significant byte (MSB), followed by byte 2, the least significant byte

(LSB). The first 12 bits (13 bits in extended mode) are used to indicate temperature. The least significant byte does not have to be read if that information is not needed. The data format for temperature is summarized in

Table 2 and Table 3. One LSB equals 0.0625°C. Negative numbers are represented in binary twos-complement

format. Following power-up or reset, the temperature register reads 0°C until the first conversion is complete. Bit D0 of byte 2 indicates normal mode (EM bit = 0) or extended mode (EM bit = 1) , and can be used to distinguish between the two temperature register data formats. The unused bits in the temperature register always read 0.

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Feature Description (continued)

Table 2. 12-Bit Temperature Data Format

TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) HEX

128 0111 1111 1111 7FF

127.9375 0111 1111 1111 7FF 100 0110 0100 0000 640

80 0101 0000 0000 500 75 0100 1011 0000 4B0 50 0011 0010 0000 320 25 0001 1001 0000 190

0.25 0000 0000 0100 004

0 0000 0000 0000 000

–0.25 1111 1111 1100 FFC

–25 1110 0111 0000 E70 –55 1100 1001 0000 C90

(1) The resolution for the Temp ADC in Internal Temperature mode is 0.0625°C/count.

Table 2 does not list all temperatures. Use the following rules to obtain the digital data format for a given

temperature or the temperature for a given digital data format. To convert positive temperatures to a digital data format:

1. Divide the temperature by the resolution

2. Convert the result to binary code with a 12-bit, left-justified format, and MSB = 0 to denote a positive sign. Example: (50°C) / (0.0625°C / LSB) = 800 = 320h = 0011 0010 0000

To convert a positive digital data format to temperature:

1. Convert the 12-bit, left-justified binary temperature result, with the MSB = 0 to denote a positive sign, to a decimal number.

2. Multiply the decimal number by the resolution to obtain the positive temperature. Example: 0011 0010 0000 = 320h = 800 × (0.0625°C / LSB) = 50°C

To convert negative temperatures to a digital data format:

1. Divide the absolute value of the temperature by the resolution, and convert the result to binary code with a 12-bit, left-justified format.

2. Generate the twos complement of the result by complementing the binary number and adding one. Denote a negative number with MSB = 1.

Example: (|–25°C|) / (0.0625°C / LSB) = 400 = 190h = 0001 1001 0000 Two's complement format: 1110 0110 1111 + 1 = 1110 0111 0000

To convert a negative digital data format to temperature:

1. Generate the twos compliment of the 12-bit, left-justified binary number of the temperature result (with MSB = 1, denoting negative temperature result) by complementing the binary number and adding one. This represents the binary number of the absolute value of the temperature.

2. Convert to decimal number and multiply by the resolution to get the absolute temperature, then multiply by –1 for the negative sign.

Example: 1110 0111 0000 has twos compliment of 0001 1001 0000 = 0001 1000 1111 + 1 Convert to temperature: 0001 1001 0000 = 190h = 400; 400 × (0.0625°C / LSB) = 25°C = (|–25°C|);

(|–25°C|) × (–1) = –25°C

(1)

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Table 3. 13-Bit Temperature Data Format

TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) HEX

150 0 1001 0110 0000 0960 128 0 1000 0000 0000 0800

127.9375 0 0111 1111 1111 07FF 100 0 0110 0100 0000 0640

80 0 0101 0000 0000 0500 75 0 0100 1011 0000 04B0 50 0 0011 0010 0000 0320 25 0 0001 1001 0000 0190

0.25 0 0000 0000 0100 0004

0 0 0000 0000 0000 0000

–0.25 1 1111 1111 1100 1FFC

–25 1 1110 0111 0000 1E70 –55 1 1100 1001 0000 1C90

7.3.2 Serial Interface

The TMP102 device operates as a slave device only on the two-wire bus and SMBus. Connections to the bus are made through the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP102 device supports the transmission protocol for both fast (1 kHz to 400 kHz) and high-speed (1 kHz to 2.85 MHz) modes. All data bytes are transmitted MSB first.

7.3.3 Bus Overview

The device that initiates the transfer is called a master, and the devices controlled by the master are called slaves. The bus must be controlled by a master device that generates the serial clock (SCL), controls the bus

access, and generates the START and STOP conditions. To address a specific device, a START condition is initiated, indicated by pulling the data-line (SDA) from a high

to low logic level when SCL is high. All slaves on the bus shift in the slave address byte on the rising edge of the clock, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse, the slave being addressed responds to the master by generating an acknowledge and by pulling SDA pin low.

A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During the data transfer the SDA pin must remain stable when SCL is high, because any change in SDA pin when SCL pin is high is interpreted as a START signal or STOP signal.

When all data have been transferred, the master generates a STOP condition indicated by pulling SDA pin from low to high, when the SCL pin is high.

7.3.4 Serial Bus Address

To communicate with the TMP102, the master must first address slave devices via a slave address byte. The slave address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or write operation.

The TMP102 features an address pin to allow up to four devices to be addressed on a single bus. Table 4 describes the pin logic levels used to properly connect up to four devices.

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Table 4. Address Pin and Slave Addresses

DEVICE TWO-WIRE ADDRESS A0 PIN CONNECTION

1001000 Ground 1001001 V+ 1001010 SDA 1001011 SCL

7.3.5 Writing and Reading Operation

Accessing a particular register on the TMP102 device is accomplished by writing the appropriate value to the pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the R/W bit low. Every write operation to the TMP102 device requires a value for the pointer register (see Figure 8).

When reading from the TMP102 device, the last value stored in the pointer register by a write operation determines which register is read by a read operation. To change the register pointer for a read operation, a new value must be written to the pointer register. This action is accomplished by issuing a slave address byte with the R/W bit low, followed by the pointer register byte. No additional data are required. The master then generates a START condition and sends the slave address byte with the R/W bit high to initiate the read command. See

Figure 7 for details of this sequence. If repeated reads from the same register are desired, continually sending

the Pointer Register bytes is not necessary because the TMP102 remembers the Pointer Register value until it is changed by the next write operation.

7.3.6 Slave Mode Operations

The TMP102 can operate as a slave receiver or slave transmitter. As a slave device, the TMP102 never drives the SCL line.

7.3.6.1 Slave Receiver Mode

The first byte transmitted by the master is the slave address, with the R/W bit low. The TMP102 then acknowledges reception of a valid address. The next byte transmitted by the master is the pointer register. The TMP102 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the register addressed by the pointer register. The TMP102 acknowledges reception of each data byte. The master can terminate data transfer by generating a START or STOP condition..

7.3.6.2 Slave Transmitter Mode

The first byte transmitted by the master is the slave address, with the R/W bit high. The slave acknowledges reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of the register indicated by the pointer register. The master acknowledges reception of the data byte. The next byte transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The master terminates data transfer by generating a Not-Acknowledge on reception of any data byte, or generating a START or STOP condition.

7.3.7 SMBus Alert Function

The TMP102 device supports the SMBus alert function. When the TMP102 device operates in Interrupt Mode (TM = 1), the ALERT pin can be connected as an SMBus alert signal. When a master senses that an ALERT condition is present on the ALERT line, the master sends an SMBus alert command (0001 1001) to the bus. If the ALERT pin is active, the device acknowledges the SMBus alert command and responds by returning the slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates if the ALERT condition was caused by the temperature exceeding T temperature is greater than or equal to T

HIGH

or falling below T

HIGH

. For POL = 0, the LSB is low if the

LOW

; this bit is high if the temperature is less than T

. The polarity of

LOW

this bit is inverted if POL = 1. See Figure 10 for details of this sequence. If multiple devices on the bus respond to the SMBus alert command, arbitration during the slave address portion

of the SMBus alert command determines which device clears the ALERT status. The device with the lowest twowire address wins the arbitration. If the TMP102 device wins the arbitration, its ALERT pin inactivates at the completion of the SMBus alert command. If the TMP102 device loses the arbitration, its ALERT pin remains active.

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Texas Instruments TMP102AIDRLR Schematic [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Features 3 Description

2 Applications

Table of Contents

4 Revision History

5 Pin Configuration and Functions

6 Specifications

6.1 Absolute Maximum Ratings

6.2 Handling Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

6.5 Electrical Characteristics

6.6 Timing Requirements

6.7 Typical Characteristics

7 Detailed Description

7.1 Overview

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Digital Temperature Output

7.3.2 Serial Interface

7.3.3 Bus Overview

7.3.4 Serial Bus Address

7.3.5 Writing and Reading Operation

7.3.6 Slave Mode Operations

7.3.6.1 Slave Receiver Mode

7.3.6.2 Slave Transmitter Mode

7.3.7 SMBus Alert Function