Texas Instruments TLV2324IPWR, TLV2324IPWLE, TLV2324IPW, TLV2324IN, TLV2324IDR Datasheet

...
TLV2322, TLV2322Y, TLV2324, TLV2324Y
LinCMOS LOW-VOLTAGE LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Wide Range of Supply Voltages Over Specified Temperature Range:
T
A
= –40°C to 85°C...2 V to 8 V
D
Fully Characterized at 3 V and 5 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range Extends Below the Negative Rail and up to V
DD
–1 V at TA = 25°C
D
Output Voltage Range Includes Negative Rail
D
High Input Impedance...10
12
Typical
D
ESD-Protection Circuitry
D
Designed-In Latch-Up Immunity
description
The TL V232x operational amplifiers are in a family of devices that has been specifically designed for use in low-voltage single-supply applications. This amplifier is especially well suited to ultra-low-power systems that require devices to consume the absolute minimum of supply currents. Each amplifier is fully functional down to a minimum supply voltage of 2 V, is fully characterized, tested, and specified at both 3-V and 5-V power supplies. The common-mode input voltage range includes the negative rail and extends to within 1 V of the positive rail.
These amplifiers are specifically targeted for use in very low-power, portable, battery-driven applications with the maximum supply current per operational amplifier specified at only 27 µA over its full temperature range of –40°C to 85°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
V
IO
max
AT
25°C
SMALL OUTLINE
(D)
PLASTIC DIP
(N)
PLASTIC DIP
(P)
TSSOP
(PW)
CHIP FORM
§
(Y)
°
°
9 mV TLV2322ID TLV2322IP TLV2322IPWLE TLV2322Y
40°C to 85°C
10 mV TLV2324ID TLV2324IN TLV2324IPWLE TLV2324Y
The D package is available taped and reeled. Add R suffix to the device type (e.g., TL V2322IDR).
The PW package is only available left-end taped and reeled (e.g., TLV2322IPWLE).
§
Chip forms are tested at 25°C only.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
1 2 3 4
8 7 6 5
1OUT
1IN– 1IN+
V
DD–
/GND
V
DD
2OUT 2IN– 2IN+
1 2 3
4
8 7 6 5
1OUT
1IN–
1IN+
V
DD –
/GND
V
DD+
2OUT 2IN– 2IN+
1 2 3 4 5 6 7
14 13 12 11 10
9 8
1OUT
1IN – 1IN +
V
DD+
2IN + 2IN –
2OUT
4OUT 4IN – 4IN + V
DD –
/GND 3IN + 3IN – 3OUT
1
14
8
7
4OUT 4IN – 4IN + V
DD –
/GND 3IN + 3IN – 3OUT
1OUT
1IN – 1IN + V
DD+
2IN + 2IN –
2OUT
TLV2322
D OR P PACKAGE
(TOP VIEW)
TLV2322
PW PACKAGE
(TOP VIEW)
TLV2324
D OR N PACKAGE
(TOP VIEW)
TLV2324
PW PACKAGE
(TOP VIEW)
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
Low-voltage and low-power operation has been made possible by using the Texas Instruments silicon-gate LinCMOS technology . The LinCMOS process also features extremely high input impedance and ultra-low bias currents making these amplifiers ideal for interfacing to high-impedance sources such as sensor circuits or filter applications.
T o facilitate the design of small portable equipment, the TL V232x is made available in a wide range of package options, including the small-outline and thin-shrink small-outline packages (TSSOP). The TSSOP package has significantly reduced dimensions compared to a standard surface-mount package. Its maximum height of only
1.1 mm makes it particularly attractive when space is critical. The device inputs and outputs are designed to withstand –100-mA currents without sustaining latch-up. The
TL V232x incorporates internal ESD-protection circuits that prevent functional failures at voltages up to 2000 V as tested under MIL-STD 883C, Method 3015.2; however, care should be exercised in handling these devices as exposure to ESD can result in the degradation of the device parametric performance.
TLV2322Y chip information
This chip, when properly assembled, displays characteristics similar to the TL V2322I. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS.
+
1OUT
1IN+
1IN–
V
DD
V
DD–
/GND
(8)
(3)
(2)
(4)
+
2OUT
2IN+
2IN–
(5)
(6)
59
72
(5)
(4)
(3)
(2)
(6)
(7)
(8)
(1)
TLV2322, TLV2322Y, TLV2324, TLV2324Y
LinCMOS LOW-VOLTAGE LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2324Y chip information
This chip, when properly assembled, display characteristics similar to the TLV2324. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
+
1OUT
1IN+
1IN–
V
DD
(4)
(6)
(3)
(2)
(5)
(1)
2IN+
2IN–
2OUT
(11)
V
DD–
/GND
+
3OUT
3IN+
3IN–
(13)
(10)
(9)
(12)
(8)
+
(14)
4OUT
4IN+
4IN–
+
(7)
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (12) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
68
108
(1)
(2)
(3) (4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)(12)
(13)
(14)
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
equivalent schematic (each amplifier)
IN+
P1
P2
P3 P4
P5 P6
IN–
R1
R2
R3
R4
R5
R6
R7
N1 N2
N3
N4
N5
N6
N7
D1
D2
C1
OUT
V
DD
GND
ACTUAL DEVICE COMPONENT COUNT
COMPONENT TLV2342 TLV2344
Transistors 54 108 Resistors 14 28 Diodes 4 8 Capacitors 2 4
Includes both amplifiers and all ESD, bias, and trim circuitry.
TLV2322, TLV2322Y, TLV2324, TLV2324Y
LinCMOS LOW-VOLTAGE LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
DD
(see Note 1) 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, V
ID
(see Note 2) VDD±. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(any input) –0.3 V to V
DD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, I
I
±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) T
A
= 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
–40°C to 85° C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at the noninverting input with respect to the inverting input.
3. The output may be shorted to either supply. Temperature and /or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
TA 25°C DERATING FACTOR TA = 85°C
PACKAGE
POWER RATING ABOVE TA = 25°C POWER RATING
D–8 725 mW 5.8 mW/°C 377 mW
D–14 950 mW 7.6 mW/°C 494 mW
N 1575 mW 12.6 mW/°C 819 mW P 1000 mW 8.0 mW/°C 520 mW
PW–8 525 mW 4.2 mW/°C 273 mW
PW–14 700 mW 5.6 mW/°C 364 mW
recommended operating conditions
MIN MAX UNIT
Supply voltage, V
DD
2 8 V
p
VDD = 3 V –0.2 1.8
Common-mode input voltage, V
IC
VDD = 5 V –0.2 3.8
V
Operating free-air temperature, T
A
–40 85 °C
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2322 electrical characteristics at specified free-air temperature
TLV2322
PARAMETER TEST CONDITIONS
T
A
VDD = 3 V VDD = 5 V
UNIT
A
MIN TYP MAX MIN TYP MAX
p
VO = 1 V, V
I
= 1 V,
25°C 1.1 9 1.1 9
VIOInput offset voltage
IC
,
RS = 50 Ω, RL = 1 M
Full range 11 11
mV
α
VIO
Average temperature coefficient of input offset voltage
25°C to
85°C
1 1.1 µV/°C
p
V
= 1 V,
25°C 0.1 0.1
p
IIOInput offset current (see Note 4)
O
,
VIC = 1 V
85°C 22 1000 24 1000
pA
p
V
= 1 V,
25°C 0.6 0.6
p
IIBInput bias current (see Note 4)
O
,
VIC = 1 V
85°C 175 2000 200 2000
pA
°
–0.2
–0.3
–0.2
–0.3
Common-mode input voltage
25°C
to2to
2.3
to4to
4.2
V
V
ICR
g
range (see Note 5)
–0.2
–0.2
Full range
to
1.8
to
3.8
V
p
VIC = 1 V,
25°C 1.75 1.9 3.2 3.8
VOHHigh-level output voltage
V
ID
=
100 mV
,
IOH = –1 mA
Full range 1.7 3
V
p
VIC = 1 V,
25°C 115 150 95 150
VOLLow-level output voltage
V
ID
= –
100 mV
,
IOL = 1 mA
Full range 190 190
mV
Large-signal differential voltage
VIC = 1 V,
25°C 50 400 50 520
A
VD
gg g
amplification
R
L
= 1 M,
See Note 6
Full range 50 50
V/mV
VO = 1 V,
25°C 65 88 65 94
CMRR
Common-mode rejection ratio
V
IC
=
V
ICR
min
,
RS = 50
Full range 60 60
dB
Supply-voltage rejection ratio
VIC = 1 V,
25°C 70 86 70 86
k
SVR
ygj
(VDD/VIO)
V
O
= 1 V,
RS = 50
Full range 65 65
dB
pp
V
= 1 V, V
= 1 V,
25°C 12 34 20 34
IDDSupply current
O
,
IC
,
No load
Full range 54 54
µ
A
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, V
O(PP)
= 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5
TLV2322, TLV2322Y, TLV2324, TLV2324Y
LinCMOS LOW-VOLTAGE LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2322 operating characteristics at specified free-air temperature, VDD = 3 V
TLV2322
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
VIC = 1 V,
V
I(PP)
= 1 V,
p
25°C 0.02
SR
Slew rate at unity gain
R
L
= 1 M,
C
L
= 20 F,
°
V/µs
S
ee Figure 35
85°C
0.02
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 36
RS = 20 ,
25°C 68
nV/Hz
p
V
= V
, C
= 20 pF,
25°C 2.5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 35
85°C 2
kH
z
V
= 10 mV, C
= 20 pF,
25°C 27
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 37
85°C
21
kH
z
V
= 10 mV
,
f= B
,
–40°C 39°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 37
85°C 28°
TLV2322 operating characteristics at specified free-air temperature, VDD = 5 V
TLV2322
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 0.03
V
IC
= 1 V,
RL = 1 M,
V
I(PP)
= 1
V
85°C 0.03
SR
Slew rate at unity gain
L
,
CL = 20 pF,
25°C 0.03
V/µs
See Figure 35
V
I(PP)
= 2.5
V
85°C 0.02
V
n
Equivalent input noise voltage
f = 1 kHz, See Figure 36
RS = 20 ,
25°C 68
nV/Hz
p
V
= V
, C
= 20 pF,
25°C 5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 35
85°C
4
kH
z
V
= 10 mV, C
= 20 pF,
25°C 85
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 37
85°C
55
kH
z
V
= 10 mV
,
f = B
,
–40°C 38°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 37
85°C 28°
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2324I electrical characteristics at specified free-air temperature
TLV2324I
PARAMETER TEST CONDITIONS
T
A
VDD = 3 V VDD = 5 V
UNIT
A
MIN TYP MAX MIN TYP MAX
V
= 1 V,
°
p
V
O
1 V,
V
I
= 1 V,
25°C
1.1101.1
10
VIOInput offset voltage
IC
,
RS = 50 Ω,
mV
S
RL = 1 M,
Full range
12
12
Average temperature coefficient 25°C to
°
α
VIO
g
of input offset voltage 85°C
1
1.1µV/°C
p
V
= 1 V,
25°C 0.1 0.1
p
IIOInput offset current (see Note 4)
O
,
VIC = 1 V
85°C 22 1000 24 1000
pA
p
V
= 1 V,
25°C 0.6 0.6
p
IIBInput bias current (see Note 4)
O
,
VIC = 1 V
85°C 175 2000 200 2000
pA
–0.2 –0.3 –0.2 –0.3
25°C
to to to to
V
Common-mode input
2 2.3 4 4.2
V
ICR
voltage range (see Note 5)
–0.2 –0.2
Full range
to to
V
g
1.8 3.8
°
V
IC
= 1 V,
25°C
1.75
1.9
3.2
3.8
VOHHigh-l
evel output voltage
V
ID
=
100 mV
,
IOH = –1 mA
Full range 1.7 3
V
°
V
IC
= 1 V,
25°C
115
15095150
VOLL
ow-level output voltage
V
ID
= –
100 mV
,
IOL = 1 mA
Full range 190 190
m
V
°
Large-signal differential
V
IC
= 1 V,
25°C5040050520
A
VD
gg
voltage amplification
R
L
= 1 M,
See Note 6
Full range 50 50
V/mV
°
V
O
= 1 V,
25°C65886594
CMRR
C
ommon-mode rejection ratio
V
IC
=
V
ICR
min,
RS = 50
Full range 60 60
dB
°
Supply-voltage rejection ratio VIC = 1 V, VO = 1 V,
25°C70867086
k
SVR
ygj
(VDD/VIO)
IC O
RS = 50
Full range 65 65
dB
°
pp
VO = 1 V, VIC = 1 V,
25°C24683968
IDDSu ly current
OIC
No load
Full range 108 108
µA
Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, V
O(PP)
= 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
TLV2322, TLV2322Y, TLV2324, TLV2324Y
LinCMOS LOW-VOLTAGE LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2324I operating characteristics at specified free-air temperature, VDD = 3 V
TLV2324I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
°
V
IC
= 1 V,
V
I(PP)
= 1 V,
p
25°C
0.02
SR
Slew rate at unity gain
R
L
= 1 M,
C
L
= 20 pF,
°
V/µs
S
ee Figure 35
85°C
0.02
p
f = 1 kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 36
S
,
25°C
68
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 2.5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 35
85°C
2
kH
z
V
= 10 mV, C
= 20 pF,
25°C 27
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 37
85°C
21
kH
z
V
= 10 mV
,
f = B
,
–40°C 39°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 37
85°C 28°
TLV2324I operating characteristics at specified free-air temperature, VDD = 5 V
TLV2324I
PARAMETER
TEST CONDITIONS
T
A
MIN TYP MAX
UNIT
25°C 0.03
V
IC
= 1 V,
RL = 1 M,
V
I(PP)
= 1
V
85°C 0.03
SR
Slew rate at unity gain
L
,
CL = 20 pF,
25°C 0.03
V/µs
See Figure 35
V
I(PP)
=
2.5 V
85°C 0.02
p
f = 1 kHz, R
= 20 ,
°
VnEquivalent input noise voltage
,
See Figure 36
S
,
25°C
68
n
V/H
z
p
V
= V
, C
= 20 pF,
25°C 5
BOMMaximum output-swing bandwidth
OOH
,
RL = 1 M,
L
,
See Figure 35
85°C
4
kH
z
V
= 10 mV, C
= 20 pF,
25°C 85
B1Unity-gain bandwidth
I
,
RL = 1 M,
L
,
See Figure 37
85°C
55
kH
z
V
= 10 mV
,
f = B
,
–40°C 38°
φ
m
Phase margin
V
I
10
mV,
CL = 20 pF,
f B1,
RL = 1 M,
25°C
34°
See Figure 37
85°C 28°
TLV2322, TLV2322Y, TLV2324, TLV2324Y LinCMOS LOW-VOLTAGE LOW-POWER OPERATIONAL AMPLIFIERS
SLOS187 – FEBRUARY 1997
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLV2322Y electrical characteristics, T
A
= 25°C
TLV2322Y
PARAMETER TEST CONDITIONS
VDD = 3 V VDD = 5 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
VO = 1 V, RS = 50 ,
VIC = 1 V, RL = 1 M
1.1 1.1 mV
I
IO
Input offset current (see Note 4) VO = 1 V, VIC = 1 V 0.1 0.1 pA
I
IB
Input bias current (see Note 4) VO = 1 V, VIC = 1 V 0.6 0.6 pA
V
ICR
Common-mode input voltage range (see Note 5)
–0.3
to
2.3
–0.3
to
4.2
V
V
OH
High-level output voltage
VIC = 1 V, IOH = –1 mA
VID = –100 mV,
1.9 3.8 V
V
OL
Low-level output voltage
VIC = 1 V, IOL = 1 mA
VID = 100 mV ,
115 95 mV
A
VD
Large-signal differential voltage amplification
VIC = 1 V, See Note 6
RL = 1 MΩ,
400 520 V/mV
CMRR Common-mode rejection ratio
VO = 1 V, RS = 50
VIC = V
ICR
min,
88 94 dB
k
SVR
Supply-voltage rejection ratio (VDD / VID)
VO = 1 V, RS = 50
VIC = 1 V,
86 86 dB
I
DD
Supply current
VO = 1 V, No load
VIC = 1 V,
12 20 µA
NOTES: 4. The typical values of input bias current offset current below 5 pA are determined mathematically.
5. This range also applies to each input individually.
6. At VDD = 5 V, VO = 0.25 V to 2 V; at VDD = 3 V, VO = 0.5 V to 1.5 V.
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