Texas Instruments TLC0820AIN, TLC0820AIFN, TLC0820AIDWR, TLC0820AIDW, TLC0820ACN Datasheet

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TOTAL

Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL

Advanced LinCMOS Silicon-Gate Technology

8-Bit Resolution

Differential Reference Inputs

Parallel Microprocessor Interface

Conversion and Access Time Over T emperature Range Read Mode...2.5 µs Max

No External Clock or Oscillator Components Required

On-Chip Track and Hold

Single 5-V Supply

TLC0820A Is Direct Replacement for National Semiconductor ADC0820C/CC and Analog Devices AD7820K/B/T

description

TLC0820AC, TLC0820AI

CONVERTERS USING MODIFIED FLASH TECHNIQUES

SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994

DB, DW, OR N PACKAGE

(TOP VIEW)

ANLG IN

(LSB) D0

D1 D2 D3

/RDY

MODE

INT

GND

1 2 3 4 5 6 7 8 9 10

FN PACKAGE

(TOP VIEW)

20 19 18 17 16 15 14 13 12 11

NC OFLW D7 (MSB) D6 D5 D4 CS REF+ REF–

The TLC0820AC and the TLC0820AI are Advanced LinCMOS 8-bit analog-to-digital converters each consisting of two 4-bit flash converters, a 4-bit digital-to-analog converter, a summing (error) amplifier, control logic, and a result latch circuit. The modified flash technique allows low-power integrated circuitry to complete an 8-bit conversion in 1.18 µs over temperature. The on-chip track-and-hold circuit has a 100-ns sample window and allows these devices to convert continuous analog signals having slew rates of up to 100 mV/µs without external sampling components. TTL-compatible 3-state

3 2 1 20 19

4 5 6 7 8

910111213

D2 D3

/RDY

MODE

INT

NC–No internal connection

D0 (LSB)

ANLG IN

GND

REF+

REF –

18 17 16 15 14

OFLW D7 (MSB) D6 D5 D4

output drivers and two modes of operation allow interfacing to a variety of microprocessors. Detailed information on interfacing to most popular microprocessors is readily available from the factory.

AVAILABLE OPTIONS

PACKAGE

0°C to 70°C ±1 LSB TLC0820ACDB TLC0820ACDW TLC0820ACFN TLC0820ACN

–40°C to 85°C ±1 LSB — TLC0820AIDW TLC0820AIFN TLC0820AIN

UNADJUSTED

ERROR

SSOP

(DB)

PLASTIC

SMALL OUTLINE

(DW)

PLASTIC

CHIP CARRIER

(FN)

PLASTIC DIP

(N)

Advanced LinCMOS is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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2–1

TLC0820AC, TLC0820AI Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES

SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994

functional block diagram

REF+

REF–

ANLG IN

Summing

Amplifier

–1

4-Bit Flash

Analog-to-Digital

Converter

(4 MSBs)

4-Bit

Digital-to-Analog

Converter

4-Bit Flash

Analog-to-Digital

Converter

(4 LSBs)

Output

Latch

and

3-State

Buffers

OFLW

D0 (LSB)

D7 (MSB)

Digital Outputs

MODE

/RDY

CS RD

7 6 13 8

Timing

and

Control

INT

2–2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

I/O

DESCRIPTION

TLC0820AC, TLC0820AI

Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL

CONVERTERS USING MODIFIED FLASH TECHNIQUES

SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994

Terminal Functions

TERMINAL

NAME NO.

ANLG IN 1 I Analog input CS 13 I Chip select. CS must be low in order for RD or WR to be recognized by the ADC. D0 2 O Digital, 3-state output data, bit 1 (LSB) D1 3 O Digital, 3-state output data, bit 2 D2 4 O Digital, 3-state output data, bit 3 D3 5 O Digital, 3-state output data, bit 4 D4 14 O Digital, 3-state output data, bit 5 D5 15 O Digital, 3-state output data, bit 6 D6 16 O Digital, 3-state output data, bit 7 D7 17 O Digital, 3-state output data, bit 8 (MSB) GND 10 Ground INT 9 O Interrupt. In the write-read mode, the interrupt output (INT) going low indicates that the internal count-down delay

MODE 7 I Mode select. MODE is internally tied to GND through a 50-µA current source, which acts like a pulldown resistor .

NC 19 No internal connection OFLW 18 O Overflow . Normally OFL W is a logical high. However , if the analog input is higher than V

RD 8 I Read. In the write-read mode with CS low, the 3-state data outputs D0 through D7 are activated when RD goes

REF– 11 I Reference voltage. REF– is placed on the bottom of the resistor ladder. REF+ 12 I Reference voltage. REF+ is placed on the top of the resistor ladder. V

WR/RDY 6 I/O Write ready . In the write-read mode with CS low, the conversion is started on the falling edge of the WR input signal.

20 Power supply voltage

time, t after the rising edge of WR INT the rising edge of either RD

When MODE is low, the read mode is selected. When MODE is high, the write-read mode is selected.

the end of conversion. It can be used to cascade two or more devices to improve resolution (9 or 10 bits).

low. RD count-down delay time. As a result, the data transferred to the output latch is latched after the falling edge of RD In the read mode with CS on completion of the conversion. RDY going into the high-impedance state and INT of the conversion.

The result of the conversion is strobed into the output latch after the internal count-down delay time, t that the RD RDY (an open-drain output) goes low after the falling edge of CS the conversion is strobed into the output latch. It is used to simplify the interface to a microprocessor system.

, is complete and the data result is in the output latch. The delay time t

d(int)

goes low at the end of t

can also be used to increase the conversion speed by reading data prior to the end of the internal

input does not go low prior to this time. The delay time t

(see operating characteristics and Figure 3). If RD goes low prior to the end of t

and the conversion results are available sooner (see Figure 2). INT is reset by

d(RIL)

or CS.

low, the conversion starts with RD going low . RD also enables the 3-state data outputs

is approximately 800 ns. In the read mode,

d(int)

and goes into the high-impedance state when

is typically 800 ns starting

d(int)

, OFLW will be low at

ref+

going low indicate completion

d(int)

, provided

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

2–3

TLC0820AC, TLC0820AI

High-level input voltage, V

Low-level input voltage, V

Operating free-air temperature, T

°C

Advanced LinCMOS HIGH-SPEED 8-BIT ANALOG-TO-DIGITAL CONVERTERS USING MODIFIED FLASH TECHNIQUES

SLAS064A – SEPTEMBER 1986 – REVISED JUNE 1994

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

(see Note 1) 10 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Supply voltage, V Input voltage range, all inputs (see Note 1) –0.2 V to V Output voltage range, all outputs (see Note 1) –0.2 V to V

+0.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

+0.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range: TLC0820AC 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

TLC0820AI –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Case temperature for 10 seconds: FN package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DB, DW or N package 260°C. . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: All voltages are with respect to network GND.

recommended operating conditions

MIN NOM MAX UNIT

Supply voltage, V Analog input voltage –0.1 VCC+0.1 V Positive reference voltage, V Negative reference voltage, V

Pulse duration, write in write-read mode, t

ref+

ref–

(see Figures 2, 3, and 4) 0.5 50 µs

w(W)

= 4.75 V to 5.25

TLC0820AC 0 70 TLC0820AI –40 85

CS, WR/RDY, RD 2 MODE 3.5 CS, WR/RDY, RD 0.8 MODE 1.5

4.5 5 8 V

ref–

GND V

ref+

V V

†

2–4

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