Texas Instruments SN74AC86D, SN74AC86DBLE, SN74AC86DBR, SN74AC86DR, SN74AC86N Datasheet

SN54AC86, SN74AC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS533A – AUGUST 1995 – REVISED MA Y 1996

D

EPIC

 (Enhanced-Performance Implanted

CMOS) 1-µm Process

D

Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flatpacks (W), and Standard Plastic (N) and
Ceramic (J) DIPs

description

The ’AC86 are quadruple 2-input exclusive-OR
gates. The devices perform the Boolean function
Y = A  B or Y = AB + AB in positive logic.

A common application is as a true/complement
element. If one of the inputs is low, the other input
is reproduced in true form at the output. If one of
the inputs is high, the signal on the other input is
reproduced inverted at the output.

The SN54AC86 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The SN74AC86 is characterized for
operation from –40°C to 85°C.

SN54AC86 ... J OR W PACKAGE

SN74AC86 ... D, DB, N, OR PW PACKAGE

SN54AC86 . . . FK PACKAGE

1Y

NC

2A

NC

2B

(TOP VIEW)

1A
1B
1Y
2A
2B
2Y

GND

(TOP VIEW)

1B1ANC

3 2 1 20 19

4
5
6
7
8

910111213

14
13
12
11
10

V

9
8

CC

4B

18
17
16
15
14

V
4B
4A
4Y
3B
3A
3Y

CC

4A
NC
4Y
NC
3B

1
2
3
4
5
6
7

FUNCTION TABLE

(each gate)

INPUTS

A B

L L L
L HH

H LH
H H L

OUTPUT

Y

3Y

NC

3A

2Y

GND

NC – No internal connection

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

EPIC is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Copyright  1996, Texas Instruments Incorporated

1

SN54AC86, SN74AC86
QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS533A – AUGUST 1995 – REVISED MA Y 1996

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, DB, J, N, PW, and W packages.

†

1A
1B

2A
2B

3A
3B

4A
4B

1
2
4
5

9
10

12
13

= 1

3

1Y

6

2Y

8

3Y

11

4Y

exclusive-OR logic

An exclusive-OR gate has many applications, some of which can be represented better by alternative logic
symbols.

EXCLUSIVE OR

= 1

These five equivalent exclusive-OR symbols are valid for an ’AC86 gate in positive logic; negation may be
shown at any two ports.

LOGIC-IDENTITY ELEMENT EVEN-PARITY ELEMENT ODD-PARITY ELEMENT

= 2k 2k + 1

The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).

The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.

The output is active (high)
if an odd number of inputs
(i.e., only 1 of the 2) are
active.

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

UNIT

SN54AC86, SN74AC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS533A – AUGUST 1995 – REVISED MA Y 1996

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

Input voltage range, VI (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output voltage range, VO (see Note 1) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, IIK (VI < 0 or VI > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output clamp current, IOK (VO < 0 or VO > VCC) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current, I

Continuous current through VCC or GND ±200 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum power dissipation at TA = 55°C (in still air) (see Note 2):D package 1.25 W. . . . . . . . . . . . . . . . . . .

Storage temperature range, T

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2. The maximum package power dissipation is calculated using a junction temperature of 150_C and a board trace length of 750 mils,
except for the N package, which has a trace length of zero.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(VO = 0 to VCC) ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

DB package 0.5 W. . . . . . . . . . . . . . . . . . .

N package 1.1 W. . . . . . . . . . . . . . . . . . . .

PW package 0.5 W. . . . . . . . . . . . . . . . . . .

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

recommended operating conditions (see Note 3)

SN54AC86 SN74AC86

MIN MAX MIN MAX

V

V

V

V
V

I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 8 0 8 ns/V
T

NOTE 3: Unused inputs must be held high or low to prevent them from floating.

Supply voltage 2 6 2 6 V

CC

VCC = 3 V 2.1 2.1

High-level input voltage

IH

Low-level input voltage

IL

Input voltage 0 V

I

Output voltage 0 V

O

High-level output current

Low-level output current

Operating free-air temperature –55 125 –40 85 °C

A

VCC = 4.5 V
VCC = 5.5 V 3.85 3.85
VCC = 3 V 0.9 0.9
VCC = 4.5 V
VCC = 5.5 V 1.65 1.65

VCC = 3 V –12 –12
VCC = 4.5 V
VCC = 5.5 V –24 –24
VCC = 3 V 12 12
VCC = 4.5 V
VCC = 5.5 V 24 24

3.15 3.15

1.35 1.35

CC
CC

–24 –24

24 24

0 V
0 V

CC
CC

V

V

V
V

mA

mA

†

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3

SN54AC86, SN74AC86

PARAMETER

TEST CONDITIONS

V

UNIT

V

V

I

mA

V

V

I

24 mA

PARAMETER

UNIT

A or B

Y

ns

PARAMETER

UNIT

A or B

Y

ns

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS533A – AUGUST 1995 – REVISED MA Y 1996

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

CC

3 V 2.9 2.9 2.9

IOH = –50 µA

OH

OL

I

I

I

CC

C

†

Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.

i

IOH = –12 mA 3 V 2.56 2.4 2.46

= –24

OH

IOH = –50 mA
IOH = –75 mA

IOL = 50 µA

IOL = 12 mA 3 V 0.36 0.5 0.44

=

OL

IOL = 50 mA
IOL = 75 mA
VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA
VI = VCC or GND, IO = 0 5.5 V 2 40 20 µA
VI = VCC or GND 5 V 2.6 pF

†
†

†
†

4.5 V 4.4 4.4 4.4

5.5 V 5.4 5.4 5.4

4.5 V 3.86 3.7 3.76

5.5 V 4.86 4.7 4.76

5.5 V 3.85

5.5 V 3.85
3 V 0.002 0.1 0.1 0.1

4.5 V 0.001 0.1 0.1 0.1

5.5 V 0.001 0.1 0.1 0.1

4.5 V 0.36 0.5 0.44

5.5 V 0.36 0.5 0.44

5.5 V 1.65

5.5 V 1.65

TA = 25°C SN54AC86 SN74AC86

MIN TYP MAX MIN MAX MIN MAX

switching characteristics over recommended operating free-air temperature range,

= 3.3 V " 0.3 V (unless otherwise noted) (see Figure 1)

V

CC

TA = 25°C SN54AC86 SN74AC86

MIN TYP MAX MIN MAX MIN MAX

2 6.5 11.5 1 14 1.5 12.5
2 6 11.5 1 14 1.5 12.5

t

PLH

t

PHL

FROM TO

(INPUT) (OUTPUT)

switching characteristics over recommended operating free-air temperature range,
V

= 5 V " 0.5 V (unless otherwise noted) (see Figure 1)

CC

TA = 25°C SN54AC86 SN74AC86

MIN TYP MAX MIN MAX MIN MAX

1.5 4.5 8.5 1 10 1 9

1.5 4.5 8.5 1 10 1 9.5

t

PLH

t

PHL

FROM TO

(INPUT) (OUTPUT)

operating characteristics, VCC = 5 V, TA = 25°C

PARAMETER TEST CONDITIONS TYP UNIT

C

Power dissipation capacitance CL = 50 pF, f = 1 MHz 25 pF

pd

4

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From Output

Under Test

CL = 50 pF

(see Note A)

Input

PARAMETER MEASUREMENT INFORMATION

500 Ω

500 Ω

LOAD CIRCUIT

t

w

50% V

CC

VOLTAGE WAVEFORMS

50% V

S1

CC

SN54AC86, SN74AC86

QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES

SCAS533A – AUGUST 1995 – REVISED MA Y 1996

2 × V

CC

Open

2.7 V

0 V

Input

t

PLH/tPHL

50% V

CC

S1TEST

Open

50% V

CC

V

0 V

CC

50% V

50% V

CC

CC

t

h

50% V

Timing Input

t

su

Data

Input

VOLTAGE WAVEFORMS

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr v 2.5 ns, tf v 2.5 ns.

C. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

CC

V

0 V

V

0 V

CC

CC

In-Phase

Output

Out-of-Phase

Output

t

PLH

50% V

t

PHL

50% V

VOLTAGE WAVEFORMS

CC

CC

t

PHL

50% V

t

PLH

50% V

CC

CC

V

OH

V

OL

V

OH

V

OL

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5

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