Texas Instruments SN74ABT543ADBLE, SN74ABT543ADBR, SN74ABT543ADW, SN74ABT543ADWR, SN74ABT543ANT Datasheet

SN74ABT543A

OCTAL REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

• State-of-the-Art

EPIC-ΙΙB

 BiCMOS Design

Significantly Reduces Power Dissipation

• ESD Protection Exceeds 2000 V Per

MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)

• Latch-Up Performance Exceeds 500 mA

Per JEDEC Standard JESD-17

• T ypical V

at V

= 5 V, TA = 25°C

CC

• High-Drive Outputs (–32-mA I

(Output Ground Bounce) < 1 V

OLP

,

OH

64-mA IOL)

• Package Options Include Plastic

Small-Outline (DW) and Shrink

DB, DW, OR NT PACKAGE

(TOP VIEW)

1
2
3
4
5
6
7
8
9
10
11
12

24
23
22
21
20
19
18
17
16
15
14
13

V
CEBA
B1
B2
B3
B4
B5
B6
B7
B8
LEAB
OEAB

LEBA

OEBA

A1
A2
A3
A4
A5
A6
A7
A8

CEAB

GND

CC

Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (JT)

description

The SN74ABT543A octal transceiver contains two sets of D-type latches for temporary storage of data flowing
in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are
provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is
low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the
A latches in the storage mode. With CEAB
data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA, LEBA,
and OEBA inputs.

and OEAB both low, the 3-state B outputs are active and reflect the

T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74ABT543A is packaged in TI’s shrink small-outline package (DB), which provides the same I/O pin
count and functionality of standard small-outline packages in less than half the printed-circuit-board area.

The SN74ABT543A is characterized for operation from –40°C to 85°C.

†

OUTPUT

B

‡

0

, LEBA, and OEBA.

Copyright  1994, Texas Instruments Incorporated

CEAB LEAB OEAB A

H X X X Z
X XHX Z

L HLXB
L LLL L
L L L H H

†

A-to-B data flow is shown; B-to-A flow control is the
same except that it uses CEBA

‡

Output level before the indicated steady-state input
conditions were established.

EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

FUNCTION TABLE

INPUTS

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1

SN74ABT543A
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

†

OEBA
CEBA

LEBA
OEAB
CEAB

LEAB

A1

A2
A3
A4

A5
A6

A7
A8

2
23
1
13
11
14

3

4
5
6

7
8

9
10

1EN3
G1
1C5
2EN4
G2
2C6

3

6D

5D

114

22

21
20

19
18

17
16
15

B1

B2
B3

B4
B5

B6
B7
B8

logic diagram (positive logic)

A1

2

23

1

13

11

14

3

OEBA

CEBA

LEBA

OEAB

CEAB

LEAB

C1
1D

C1
1D

22

B1

To Seven Other Channels

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

SN74ABT543A

OCTAL REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V

Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Voltage range applied to any output in the high state or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . .

Current into any output in the low state, IO 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input clamp current, I
Output clamp current, I

Maximum power dissipation at TA = 55°C (in still air): DB package 0.7 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DW package 1 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

NT package 1.3 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

CC

(V

< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

IK

I

(V

OK

< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

O

recommended operating conditions (see Note 2)

MIN MAX UNIT

V

CC

V

IH

V

IL

V

I

I

OH

I

OL

∆t/∆v Input transition rise or fall rate Outputs enabled 5 ns/V
T

A

NOTE 2: Unused or floating pins (input or I/O) must be held high or low.

Supply voltage 4.5 5.5 V
High-level input voltage 2 V
Low-level input voltage 0.8 V
Input voltage 0 V
High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature –40 85 °C

CC

V

†

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3

SN74ABT543A

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

V

V

V

4.5 V

V

V

V

V

I

V

V

V

GND

A

,

V

CC

5.5 V,

Data before LEAB or LEBA↑

tsuSetup time

ns

Data before CEAB or CEBA↑

thHold time

ns

OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)

TA = 25°C

MIN TYP†MAX

V

IK

OH

OL

I

‡

I

OZH

‡

I

OZL

I

OFF

I

CEX

§

I

O

I

CC

¶

∆I

CC

C

i

C

†

All typical values are at VCC = 5 V.

‡

The parameters I

§

Not more than one output should be tested at a time, and the duration of the test should not exceed one second.

¶

This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

io

VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V, IOH = –3 mA 2.5 2.5
VCC = 5 V, IOH = –3 mA 3 3

=

CC

= 4.5

CC

= 5.5 V,

CC

VCC = 5.5 V, VO = 2.7 V 50 50 µA
VCC = 5.5 V, VO = 0.5 V –50 –50 µA
VCC = 0, VI or VO ≤ 4.5 V ±100 ±100 µA
VCC = 5.5 V, VO = 5.5 V Outputs high 50 50 µA
VCC = 5.5 V, VO = 2.5 V –50 –100 –180 –50 –180 mA

V

= 5.5 V
IO = 0,
VI = VCC or GND

VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND

VI = 2.5 V or 0.5 V Control inputs 4 pF
VO = 2.5 V or 0.5 V A or B ports 7 pF

OZH

and I

include the input leakage current.

OZL

IOH = –24 mA 2
IOH = –32 mA 2
IOL = 48 mA 0.55
IOL = 64 mA 0.55

=

or

I

CC

A or B ports

Control inputs ±1 ±1
A or B ports ±100 ±100

Outputs high 1 250 250 µA
Outputs low 24 34 34 mA
Outputs disabled 0.5 250 250 µA

1.5 1.5 mA

µ

timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)

VCC = 5 V,

TA = 25°C
MIN MAX

t

w

Pulse duration, LEAB or LEBA low 3.5 3.5 ns

High 2.5 2.5

p

Data after LEAB or LEBA↑ 1 1
Data after CEAB or CEBA↑ 1 1

Low 3 3
High 2.5 2.5
Low 2.5 2.5

MIN MAX UNIT

4

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SN74ABT543A

(INPUT)

(OUTPUT)

A or B

B or A

ns

LEBA

LEAB

A or B

ns

OEBA

OEAB

A or B

ns

OEBA

OEAB

A or B

ns

CEBA

CEAB

A or B

ns

CEBA or CEAB

A or B

ns

OCTAL REGISTERED TRANSCEIVER

WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C

PARAMETER

t

PLH

t

PHL

t

PLH

t

PHL

t

PZH

t

PZL

t

PHZ

t

PLZ

t

PZH

t

PZL

t

PHZ

t

PLZ

= 50 pF (unless otherwise noted) (see Figure 1)

L

FROM

or

or

or

or

TO

VCC = 5 V,

TA = 25°C

MIN TYP MAX

1.6 3.3 4.4 1.6 5

1.6 4.1 5.1 1.6 6

1.6 3.9 5.1 1.6 6.2

1.6 4.4 5.4 1.6 6.3

1.4 3.1 4.1 1.4 5
2 3.9 4.9 2 5.7

2.5 4.2 5.8 2.5 6.7

2.5 4.8 6.1 2.5 7

1.4 3.4 4.4 1.4 5.4
2 4.1 5.2 2 6.1

3.2 4.7 6.1 3.2 7

2.5 5 6.7 2.5 7.3

MIN MAX UNIT

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5

SN74ABT543A
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS

SCBS464A – JUNE 1992 – REVISED JUNE 1994

PARAMETER MEASUREMENT INFORMATION

From Output

Under Test

CL = 50 pF

(see Note A)

Input

500 Ω

500 Ω

LOAD CIRCUIT FOR OUTPUTS

t

w

1.5 V 1.5 V

VOLTAGE WAVEFORMS

PULSE DURATION

S1

7 V

Open

GND

3 V

0 V

Timing Input

Data Input

TEST S1

t

PLH/tPHL

t

PLZ/tPZL

t

PHZ/tPZH

t

su

1.5 V 1.5 V

VOLTAGE WAVEFORMS

SETUP AND HOLD TIMES

Open

Open

1.5 V

t

7 V

h

3 V

0 V

3 V

0 V

Input

(see Note B)

t

PLH

Output

t

PHL

Output

PROPAGATION DELAY TIMES

INVERTING AND NONINVERTING OUTPUTS

NOTES: A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

D. The outputs are measured one at a time with one transition per measurement.

1.5 V 1.5 V

1.5 V

VOLTAGE WAVEFORMS

Figure 1. Load Circuit and Voltage Waveforms

t

PHL

1.5 V

t

PLH

1.5 V1.5 V

3 V

0 V

V

V

V

V

OH

OL

OH

OL

Output

Control

Output

Waveform 1

S1 at 7 V

(see Note C)

Output

Waveform 2

S1 at Open

(see Note C)

1.5 V

t

PZL

t

PLZ

1.5 V

t

t

PZH

ENABLE AND DISABLE TIMES

LOW- AND HIGH-LEVEL ENABLING

PHZ

1.5 V

VOLTAGE WAVEFORMS

1.5 V

VOL + 0.3 V

VOH – 0.3 V

3 V

0 V

3.5 V

V

OL

V

OH

[

0 V

6

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Copyright  1998, Texas Instruments Incorporated