Texas Instruments SN74ABT543ADBLE, SN74ABT543ADBR, SN74ABT543ADW, SN74ABT543ADWR, SN74ABT543ANT Datasheet

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SN74ABT543A
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS464A – JUNE 1992 – REVISED JUNE 1994
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
T ypical V
at V
= 5 V, TA = 25°C
CC
High-Drive Outputs (–32-mA I
(Output Ground Bounce) < 1 V
OLP
,
OH
64-mA IOL)
Package Options Include Plastic
Small-Outline (DW) and Shrink
DB, DW, OR NT PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
V CEBA B1 B2 B3 B4 B5 B6 B7 B8 LEAB OEAB
LEBA
OEBA
A1 A2 A3 A4 A5 A6 A7 A8
CEAB
GND
CC
Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (JT)
description
The SN74ABT543A octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA, LEBA, and OEBA inputs.
and OEAB both low, the 3-state B outputs are active and reflect the
T o ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74ABT543A is packaged in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN74ABT543A is characterized for operation from –40°C to 85°C.
OUTPUT
B
0
, LEBA, and OEBA.
Copyright 1994, Texas Instruments Incorporated
CEAB LEAB OEAB A
H X X X Z X XHX Z
L HLXB L LLL L L L L H H
A-to-B data flow is shown; B-to-A flow control is the same except that it uses CEBA
Output level before the indicated steady-state input conditions were established.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
FUNCTION TABLE
INPUTS
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1
SN74ABT543A OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SCBS464A – JUNE 1992 – REVISED JUNE 1994
logic symbol
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
OEBA CEBA
LEBA OEAB CEAB
LEAB
A1
A2 A3 A4
A5 A6
A7 A8
2 23 1 13 11 14
3
4 5 6
7 8
9 10
1EN3 G1 1C5 2EN4 G2 2C6
3
6D
5D
114
22
21 20
19 18
17 16 15
B1
B2 B3
B4 B5
B6 B7 B8
logic diagram (positive logic)
A1
2
23
1
13
11
14
3
OEBA
CEBA
LEBA
OEAB
CEAB
LEAB
C1 1D
C1 1D
22
B1
To Seven Other Channels
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
SN74ABT543A
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCBS464A – JUNE 1992 – REVISED JUNE 1994
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . .
Current into any output in the low state, IO 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I Output clamp current, I
Maximum power dissipation at TA = 55°C (in still air): DB package 0.7 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 1 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NT package 1.3 W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(V
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
recommended operating conditions (see Note 2)
MIN MAX UNIT
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
t/v Input transition rise or fall rate Outputs enabled 5 ns/V T
A
NOTE 2: Unused or floating pins (input or I/O) must be held high or low.
Supply voltage 4.5 5.5 V High-level input voltage 2 V Low-level input voltage 0.8 V Input voltage 0 V High-level output current –32 mA Low-level output current 64 mA
Operating free-air temperature –40 85 °C
CC
V
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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