Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
D
Low Supply-Current Requirements . . .
30 mA Max
D
Wide Positive and Negative Input/Output
Bus-Voltage Ranges
D
Thermal Shutdown Protection
D
Driver Positive and Negative Current
Limiting
D
Receiver Input Hysteresis
D
Glitch-Free Power-Up and Power-Down
Protection
D
Receiver Open-Circuit Fail-Safe Design
description
D OR P PACKAGE
(TOP VIEW)
RE
DE
1
R
2
3
4
D
8
7
6
5
V
CC
B
A
GND
The SN65ALS176 and SN75ALS176 series differential bus transceivers are designed for bidirectional data
communication on multipoint bus transmission lines. They are designed for balanced transmission lines and
meet TIA/EIA-422-B, TIA/EIA-485-A, and ITU Recommendations V.1 1 and X.27.
The SN65ALS176 and SN75ALS176 series combine a 3-state, differential line driver and a differential input line
receiver, both of which operate from a single 5-V power supply. The driver and receiver have active-high and
active-low enables, respectively, that can be connected together externally to function as a direction control.
The driver differential outputs and the receiver differential inputs are connected internally to form a differential
input/output (I/O) bus port that is designed to offer minimum loading to the bus when the driver is disabled or
V
= 0. This port features wide positive and negative common-mode voltage ranges, making the device
CC
suitable for party-line applications.
The SN65ALS176 is characterized for operation from –40°C to 85°C, and the SN75ALS176 series is
characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B
†
DIFFERENTIAL BUS TRANSCEIVERS
SLLS040G – AUGUST 1987 – REVISED DECEMBER 1999
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
0°C to 70°C
–40°C to 85°C15SN65ALS176DSN65ALS176P
†
t
This is the maximum range that the driver or receiver delay times vary
sk(lim)
over temperature, VCC, and process (device to device).
‡
The D package is available taped and reeled. Add the suffix R to the device type
(e.g., SN75ALS176DR).
t
sk(lim)
10
7.5
5
SMALL OUTLINE
SN75ALS176D
SN75ALS176AD
SN75ALS176BD
(D)
‡
Function Tables
DRIVER
INPUT
DDE
HHHL
LHLH
XLZZ
H = high level, L = low level, X = irrelevant,
Z = high impedance
ENABLE
OUTPUTS
AB
PLASTIC DIP
(P)
SN75ALS176P
SN75ALS176AP
SN75ALS176BP
DIFFERENTIAL INPUTS
VID ≥ 0.2 VLH
–0.2 V < VID < 0.2 VL?
VID ≤ –0.2 VLL
Inputs openLH
H = high level, L = low level, X = irrelevant,
Z = high impedance
logic symbol
3
DE
2
RE
4
D
1
R
§
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
§
EN1
EN2
1
1
2
RECEIVER
A–BRER
XHZ
ENABLEOUTPUT
logic diagram (positive logic)
3
DE
4
RE
D
2
1
R
6
A
7
B
6
A
7
Bus
B
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs and outputs
SN65ALS176, SN75ALS176, SN75ALS176A, SN75ALS176B
DIFFERENTIAL BUS TRANSCEIVERS
SLLS040G – AUGUST 1987 – REVISED DECEMBER 1999
EQUIVALENT OF EACH INPUT
V
CC
R
(eq)
Input
Driver Input: R
Enable Inputs: R
R
= equivalent resistor
(eq)
= 3 kΩ NOM
(eq)
= 8 kΩ
(eq)
NOM
TYPICAL OF A AND B I/O PORTSTYPICAL OF RECEIVER OUTPUT
V
CC
180 kΩ
NOM
Connected
on A Port
A or B
18 kΩ
NOM
180 kΩ
NOM
Connected
on B Port
3 kΩ
NOM
1.1 kΩ
NOM
85 Ω
NOM
V
CC
Output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51.
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONS
V
IK
V
O
| V
OD1
| V
OD2
V
OD3
∆| VOD |
∆| VOC |
I
IH
I
IL
I
OS
†
The power-off measurement in TIA/EIA-422-B applies to disabled outputs only and is not applied to combined inputs and outputs.
‡
All typical values are at VCC = 5 V and TA = 25°C.
§
The minimum V
¶
∆ | VOD | and ∆ | VOC | are the changes in magnitude of VOD and VOC, respectively, that occur when the input is changed from one logic state
to the other.
#
Duration of the short circuit should not exceed one second for this test.
NOTE 4: This applies for power on and power off. Refer to TIA/EIA-485-A for exact conditions. The TIA/EIA-422-B limit does not apply for a