Texas Instruments SN54AS821AJT, SN74AS821ADW, SN74AS821ADWR, SN74AS821ANT, SNJ54AS821AFK Datasheet

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SN54AS821A . . . JT PACKAGE
SN74AS821A . . . DW OR NT PACKAGE
(TOP VIEW)
SN54AS821A . . . FK PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
OE
10D
GND
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q CLK
NC – No internal connection
3212827
12 13
5 6 7 8 9 10 11
25 24 23 22 21 20 19
3Q 4Q 5Q NC 6Q 7Q 8Q
NC
426
14 15 16 17 18
10D
GND
NC
CLK
10Q
9Q
2D1DOE
NC
1Q
2Q
V
CC
SN54AS821A, SN74AS821A
10-BIT BUS-INTERFACE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SDAS230A – DECEMBER 1983 – REVISED AUGUST 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Functionally Equivalent to AMD’s AM29821
Provide Extra Data Width Necessary for
Wider Address/Data Paths or Buses With Parity
Outputs Have Undershoot-Protection
Circuitry
Power-Up High-Impedance State
Buffered Control Inputs to Reduce
dc Loading Effects
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
description
These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input.
A buffered output-enable (OE
) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high­impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
OE
does not affect the internal operation of the flip-flops. Previously stored data can be retained or new data
can be entered while the outputs are in the high-impedance state. The SN54AS821A is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74AS821A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE CLK D
Q
L H H L LL LLX Q
0
HXX Z
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN54AS821A, SN74AS821A 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS230A – DECEMBER 1983 – REVISED AUGUST 1995
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic symbol
6Q
18
7Q
17
8Q
16
9Q
15
10Q
14
7
6D
8
7D
9
8D
10
9D
EN
1
1Q
23
3
2D
4
3D
5
4D
6
5D
2Q
22
3Q
21
4Q
20
5Q
19
13
CLK
OE
11
10D
C1
1D
2
1D
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
logic diagram (positive logic)
1D
OE
2
1
13
1Q
23
CLK
1D
To Nine Other Channels
C1
Pin numbers shown are for the DW, JT, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54AS821A –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74AS821A 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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