Texas Instruments SN54AS574J, SN54AS575JT, SN54ALS574BJ, SNJ54AS574FK, SNJ54AS574J Datasheet

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SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3-State Buffer-Type Noninverting Outputs
Bus-Structured Pinout
Buffered Control Inputs
SN74ALS575A and ′AS575 Have
Synchronous Clear
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), Standard Plastic (N, NT) and Ceramic (J, JT) 300-mil DIPs, and Ceramic Flat (W) Packages
description
These octal D-type edge-triggered flip-flops feature 3-state outputs designed specifically for bus driving. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The eight flip-flops enter data on the low-to-high transition of the clock (CLK) input. The SN74ALS575A, SN54AS575, and SN74AS575 may be synchronously cleared by taking the clear (CLR
) input low.
The output-enable (OE
) input does not affect internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The SN54ALS574B, SN54AS574, and SN54AS575 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS574B, SN74ALS575A, SN74AS574, and SN74AS575 are characterized for operation from 0°C to 70°C.
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
OE
1D 2D 3D 4D 5D 6D 7D 8D
GND
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK
SN54ALS574B, SN54AS574 ...J OR W PACKAGE
SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE
(TOP VIEW)
3212019
9
10 111213
4 5 6 7 8
18 17 16 15 14
2Q 3Q 4Q 5Q 6Q
3D 4D 5D 6D 7D
2D1DOE
8Q
7Q
1Q
8D
GND
CLK
V
CC
SN54ALS574B, SN54AS574 . . . FK PACKAGE
(TOP VIEW)
SN54AS575 . . . JT OR W PACKAGE
SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE
(TOP VIEW)
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
CLR
OE
1D 2D 3D 4D 5D 6D 7D 8D
NC
GND
V
CC
NC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q CLK NC
SN54AS575 ...FK PACKAGE
(TOP VIEW)
321
13
14
5 6 7 8 9 10 11
2Q 3Q 4Q NC 5Q 6Q 7Q
2D 3D 4D
NC
5D 6D 7D
4
1516 17
18
NC
GND
NC
NC
CLK
8Q
1DOECLR
NC
28 27 26
25 24 23 22 21 20 19
12
8D
NC
1Q
V
CC
NC – No internal connection
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Function Tables
SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574
(each flip-flop)
INPUTS
OUTPUT
OE CLK D
Q
L H H L LL LLX Q
0
HXX Z
SN74ALS575A, SN54AS575, SN74AS575
(each flip-flop)
INPUTS
OUTPUT
OE CLR CLK D
Q
L L X L L H HH LH↑LL LHLX Q
0
HXHX Z
logic symbols
OE
1D
2
1D
3
2D
4
3D
5
4D
6
5D
11
CLK
1Q
19
2Q
18
3Q
17
4Q
16
5Q
15
6Q
14
7Q
13
8Q
12
7
6D
8
7D
9
8D
EN
1
C1
OE
1D
3
1D
4
2D
5
3D
6
4D
7
5D
14
CLK
1Q
22
2Q
21
3Q
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
8
6D
9
7D
10
8D
EN
2
C1
CLR
1R
1
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
SN74ALS575A, SN54AS575,
SN74AS575
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, JT, N, and NT packages.
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
logic diagrams (positive logic)
OE
CLK
1D
1Q
1
11
2
19
To Seven Other Channels
1D
C1
OE
CLK
1D
1Q
2
14
3
22
To Seven Other Channels
1D
C1
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
SN74ALS575A, SN54AS575,
SN74AS575
1
CLR
Pin numbers shown are for the DW, J, JT, N, and NT packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54ALS574B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ALS574B, SN74ALS575A 0°C to 70°C. . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54ALS574B
SN74ALS574B SN74ALS575A
UNIT
MIN NOM MAX MIN NOM MAX
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.7 0.8 V
I
OH
High-level output current –1 –2.6 mA
I
OL
Low-level output current 12 24 mA
ALS574B 0 28 0 35
f
clock
Clock frequenc
y
SN74ALS575A
0 30
MH
z
ALS574B, CLK high or low 16.5 14
twPulse duration
SN74ALS575A, CLK high or low 16.5
ns
Data 15 15
t
su
S
etup time before
CLK
SN74ALS575A, CLR 15
ns
Data 4 0
t
h
Hold ti
me after
CLK
SN74ALS575A, CLR 0
ns
T
A
Operating free-air temperature –55 125 0 70 °C
SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS
SN54ALS574B
SN74ALS574B SN74ALS575A
UNIT
MIN TYP†MAX MIN TYP†MAX
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC –2 VCC –2
V
OH
IOH = –1 mA 2.4 3.3
V
V
CC
= 4.5
V
IOH = –2.6 mA 2.4 3.2 IOL = 12 mA 0.25 0.4 0.25 0.4
VOLV
CC
=
4.5 V
IOL = 24 mA 0.35 0.5
V
I
OZH
VCC = 5.5 V, VO = 2.7 V 20 20 µA
I
OZL
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
I
I
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
I
IH
VCC = 5.5 V, VI = 2.7 V 20 20 µA
I
IL
VCC = 5.5 V, VI = 0.4 V –0.2 –0.2 mA
I
O
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
Outputs high 11 18 11 18
ALS574B VCC = 5.5 V
Outputs low 17 27 17 27 Outputs disabled 17 28 17 28
I
CC
Outputs high 10 17 10 17
mA
SN74ALS575A VCC = 5.5 V
Outputs low 15 24 15 24 Outputs disabled 16 30 16 30
All typical values are at VCC = 5 V, TA = 25°C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500
,
R2 = 500 Ω, TA = MIN to MAX
§
UNIT
SN54ALS574B SN74ALS574B SN74ALS575A
MIN MAX MIN MAX MIN MAX
f
max
28 35 30 MHz
t
PLH
4 22 3 14 4 14
t
PHL
CLK
Q
4 17 4 14 4 14
ns
t
PZH
4 21 3 18 4 18
t
PZL
OE
Q
4 26 4 18 4 18
ns
t
PHZ
2 16 1 10 2 10
t
PLZ
OE
Q
2 25 2 12 3 13
ns
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, V
I
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: SN54AS574, SN54AS575 –55°C to 125°C. . . . . . . . . . . . . . . . . .
SN74AS574, SN74AS575 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS574 SN54AS575
SN74AS574 SN74AS575
UNIT
MIN NOM MAX MIN NOM MAX
V
CC
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
I
OH
High-level output current –12 –15 mA
I
OL
Low-level output current 32 48 mA
f
clock
* Clock frequency 0 100 0 90 MHz
*
CLK high 5 5.5
tw*
Pulse duration
CLK low 4 5.5
ns
*
Data 3 5.5
tsu*
S
etup time before
CLK
AS575, CLR high or low 6.5 6.5
ns
*
Data 3 3
th*
Hold ti
me after
CLK
AS575, CLR 0 0
ns
T
A
Operating free-air temperature –55 125 0 70 °C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
SN54ALS574B, SN54AS574, SN54AS575 SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS
SN54AS574 SN54AS575
SN74AS574 SN74AS575
UNIT
MIN TYP†MAX MIN TYP†MAX
V
IK
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = –2 mA VCC –2 VCC –2
V
OH
IOH = –12 mA 2.4 3.2
V
V
CC
= 4.5
V
IOH = –15 mA 2.4 3.3 IOL = 32 mA 0.29 0.5
VOLV
CC
=
4.5 V
IOL = 48 mA 0.34 0.5
V
I
OZH
VCC = 5.5 V, VO = 2.7 V 50 50 µA
I
OZL
VCC = 5.5 V, VO = 0.4 V –50 –50 µA
I
I
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
I
IH
VCC = 5.5 V, VI = 2.7 V 20 20 µA
OE, CLK, CLR
–0.5 –0.5
I
IL
D
V
CC
= 5.5 V,
V
I
= 0.4
V
–3 –2
mA
I
O
VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 73 116 73 116
AS574 VCC = 5.5 V
Outputs low 85 134 85 134 Outputs disabled 84 134 84 134
I
CC
Outputs high 78 126 78 126
mA
AS575 VCC = 5.5 V
Outputs low 89 142 89 142 Outputs disabled 88 142 88 142
All typical values are at VCC = 5 V, TA = 25°C.
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
switching characteristics (see Figure 1)
PARAMETER
FROM
(
INPUT
)
TO
(
OUTPUT
)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500
,
R2 = 500 Ω, TA = MIN to MAX
§
UNIT
(INPUT)
(OUTPUT)
SN54AS574 SN54AS575
SN74AS574 SN74AS575
MIN MAX MIN MAX
f
max
* 100 90 MHz
t
PLH
3 11 3 8
t
PHL
CLK
A
ny
Q
4 11 4 9
ns
t
PZH
2 7 2 6
t
PZL
OE
A
ny
Q
3 11 3 10
ns
t
PHZ
2 7 2 6
t
PLZ
OE
A
ny
Q
2 7 2 6
ns
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
t
PHZ
t
PLZ
t
PHL
t
PLH
0.3 V
t
PZL
t
PZH
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
From Output
Under Test
Test Point
R1
S1
C
L
(see Note A)
7 V
1.3 V
1.3 V1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
1.3 V 1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
High-Level
Pulse
Low-Level
Pulse
t
w
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note C)
1.3 V 1.3 V
1.3 V1.3 V
1.3 V 1.3 V
1.3 V1.3 V
1.3 V
1.3 V
3.5 V
3.5 V
0.3 V
0.3 V
V
OL
V
OH
V
OH
V
OL
Output
Control
(low-level
enabling)
Waveform 1
S1 Closed
(see Note B)
Waveform 2
S1 Open
(see Note B)
[
0 V
V
OH
V
OL
[
3.5 V
In-Phase
Output
0.3 V
1.3 V 1.3 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
R2
V
CC
R
L
Test Point
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
From Output
Under Test
Test Point
C
L
(see Note A)
R
L
RL = R1 = R2
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. When measuring propagation delay items of 3-state outputs, switch S1 is open. D. All input pulses have the following characteristics: PRR 1 MHz, tr = tf = 2 ns, duty cycle = 50%. E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
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Copyright 1998, Texas Instruments Incorporated
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