SN100KT5539
OCTAL ECL-TO-TTL TRANSLATOR
WITH OPEN-COLLECTOR OUTPUTS
SDZS008 – JANUARY 1990 – REVISED OCTOBER 1990
• 100K Compatible
R NT PACKAGE
(T0P VIEW)
• Open-Collector Outputs Drive Bus Lines or
Y1
Buffer Memory Address Registers
• ECL and TTL Output-Enable Inputs
• Flow-Through Architecture Optimizes PCB
Layout
• Center-Pin V
, VEE, and GND
CC
Configurations Minimize High-Speed
Switching Noise
• Package Options Include “Small Outline”
Packages and Standard Plastic 300-mil
DIPs
GND
GND
GND
1
Y2
2
Y3
3
Y4
4
V
5
CC
6
7
8
Y5
9
Y6
10
Y7
11
Y8
12
description
This octal ECL-to-TTL translator is designed to provide efficient translation between a 100K signal environment
and a TTL signal environment. This device is designed specifically to improve the performance and density of
ECL-to-TTL CPU/bus-oriented functions such as memory-address drivers, clock drivers, and bus-oriented
receivers and transmitters while eliminating the need for three-state overlap protection.
Two pins OE
1 being ECL-compatible and OE2 being TTL-compatible. This offers the choice of controlling the outputs
OE
of the device from either a TTL or ECL signal environment.
1 and OE2 are provided for output-enable control. These control inputs are ANDed together with
24
23
22
21
20
19
18
17
16
15
14
13
A1
A2
A3
A4
OE
V
EE
GND
OE
A5
A6
A7
A8
2 (TTL)
1 (ECL)
The SN100KT5539 is characterized for operation from 0°C to 85°C.
FUNCTION TABLE
OUTPUT
ENABLE INPUT (TTL)
OE1 OE2 A Y
H X X H
X HX H
LLL L
LLH H
DATA OUTPUT
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1990, Texas Instruments Incorporated
1
SN100KT5539
OCTAL ECL-TO-TTL TRANSLATOR
WITH OPEN-COLLECTOR OUTPUTS
SDZS008 – JANUARY 1990 – REVISED OCTOBER 1990
A2
A3
A4
A5
A6
A7
A8
†
17
20
2
24
23
22
21
16
15
14
13
ECL/TTL
&
EN
ECL/TTL
logic symbol
OE1
OE
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
10
11
12
logic diagram (positive logic)
24
A1
23
A2
1
Y1A1
2
Y2
3
Y3
4
Y4
9
Y5
Y6
Y7
Y8
OE1 (ECL)
2 (TTL)
OE
A3
A4
A5
A6
A7
22
21
17
20
16
15
14
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
ECL/TTL
10
11
1
Y1
2
Y2
3
Y3
4
Y4
9
Y5
Y6
Y7
A8
13
ECL/TTL
12
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Supply voltage range, V
Input voltage range: TTL (see Note 1) –1.2 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current range: TTL –30 mA to 5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to any output in the high state –0.5 V to V
Current into any output in the low state 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range 0°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The TTL input voltage ratings may be exceeded provided the input current ratings are observed.
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
–8 V to 0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EE
ECL V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
EE
to 0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Y8
‡
CC
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265